branches/alto2/src/emu/cpu/alto2/alto2dsm.c
r26346 | r26347 | |
251 | 251 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(T) "); |
252 | 252 | break; |
253 | 253 | case 2: // T?: BUS OR T |
254 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS OR T) "); |
| 254 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS|T) "); |
255 | 255 | break; |
256 | 256 | case 3: // : BUS AND T |
257 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS AND T) "); |
| 257 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS&T) "); |
258 | 258 | break; |
259 | 259 | case 4: // : BUS XOR T |
260 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS XOR T) "); |
| 260 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS^T) "); |
261 | 261 | break; |
262 | 262 | case 5: // T?: BUS + 1 |
263 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS + 1) "); |
| 263 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS+1) "); |
264 | 264 | break; |
265 | 265 | case 6: // T?: BUS - 1 |
266 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS - 1) "); |
| 266 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS-1) "); |
267 | 267 | break; |
268 | 268 | case 7: // : BUS + T |
269 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS + T) "); |
| 269 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS+T) "); |
270 | 270 | break; |
271 | 271 | case 8: // : BUS - T |
272 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS - T) "); |
| 272 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS-T) "); |
273 | 273 | break; |
274 | 274 | case 9: // : BUS - T - 1 |
275 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS - T - 1) "); |
| 275 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS-T-1) "); |
276 | 276 | break; |
277 | 277 | case 10: // T?: BUS + T + 1 |
278 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS + T + 1) "); |
| 278 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS+T+1) "); |
279 | 279 | break; |
280 | 280 | case 11: // T?: BUS + SKIP |
281 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS + SKIP) "); |
| 281 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS+SKIP) "); |
282 | 282 | break; |
283 | 283 | case 12: // T?: BUS, T (AND) |
284 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS, T) "); |
| 284 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS,T) "); |
285 | 285 | break; |
286 | 286 | case 13: // : BUS AND NOT T |
287 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS AND NOT T) "); |
| 287 | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS&~T) "); |
288 | 288 | break; |
289 | 289 | case 14: // : undefined |
290 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(14) "); |
| 290 | dst += snprintf(dst, len - (size_t)(dst - buffer), "*ALUF(BUS) "); |
291 | 291 | break; |
292 | 292 | case 15: // : undefined |
293 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(15) "); |
| 293 | dst += snprintf(dst, len - (size_t)(dst - buffer), "*ALUF(BUS) "); |
294 | 294 | break; |
295 | 295 | } |
296 | 296 | |
r26346 | r26347 | |
329 | 329 | dst += snprintf(dst, len - (size_t)(dst - buffer), "MAR←ALU "); |
330 | 330 | break; |
331 | 331 | case 2: // switch tasks if higher priority wakeup is pending |
332 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "[TASK] "); |
| 332 | dst += snprintf(dst, len - (size_t)(dst - buffer), "TASK "); |
333 | 333 | break; |
334 | 334 | case 3: // disable the current task until re-enabled by a hardware-generated condition |
335 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "[BLOCK] "); |
| 335 | dst += snprintf(dst, len - (size_t)(dst - buffer), "BLOCK "); |
336 | 336 | break; |
337 | 337 | case 4: // SHIFTER output will be L shifted left one place |
338 | 338 | dst += snprintf(dst, len - (size_t)(dst - buffer), "SHIFTER←L(LSH1) "); |
r26346 | r26347 | |
356 | 356 | case 0: // no operation |
357 | 357 | break; |
358 | 358 | case 1: // NEXT ← NEXT OR (BUS==0 ? 1 : 0) |
359 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "[BUS==0 ? %s : %s] ", |
360 | | addrname((prefetch | 1) & MCODE_MASK), |
361 | | addrname(prefetch & MCODE_MASK)); |
| 359 | dst += snprintf(dst, len - (size_t)(dst - buffer), "[BUS==0 ? %s:%s] ", |
| 360 | addrname((prefetch | 1) & MCODE_MASK), addrname(prefetch & MCODE_MASK)); |
362 | 361 | break; |
363 | 362 | case 2: // NEXT ← NEXT OR (SHIFTER==0 ? 1 : 0) |
364 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "[SH==0 ? %s : %s] ", |
365 | | addrname((prefetch | 1) & MCODE_MASK), |
366 | | addrname(prefetch & MCODE_MASK)); |
| 363 | dst += snprintf(dst, len - (size_t)(dst - buffer), "[SH==0 ? %s:%s] ", |
| 364 | addrname((prefetch | 1) & MCODE_MASK), addrname(prefetch & MCODE_MASK)); |
367 | 365 | break; |
368 | 366 | case 3: // NEXT ← NEXT OR (SHIFTER<0 ? 1 : 0) |
369 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "[SH<0 ? %s : %s] ", |
370 | | addrname((prefetch | 1) & MCODE_MASK), |
371 | | addrname(prefetch & MCODE_MASK)); |
| 367 | dst += snprintf(dst, len - (size_t)(dst - buffer), "[SH<0 ? %s:%s] ", |
| 368 | addrname((prefetch | 1) & MCODE_MASK), addrname(prefetch & MCODE_MASK)); |
372 | 369 | break; |
373 | 370 | case 4: // NEXT ← NEXT OR BUS |
374 | 371 | dst += snprintf(dst, len - (size_t)(dst - buffer), "NEXT←BUS "); |
375 | 372 | break; |
376 | 373 | case 5: // NEXT ← NEXT OR ALUC0. ALUC0 is the carry produced by last L loading microinstruction. |
377 | | dst += snprintf(dst, len - (size_t)(dst - buffer), "[ALUC0 ? %s : %s] ", |
378 | | addrname((prefetch | 1) & MCODE_MASK), |
379 | | addrname(prefetch & MCODE_MASK)); |
| 374 | dst += snprintf(dst, len - (size_t)(dst - buffer), "[ALUC0 ? %s:%s] ", |
| 375 | addrname((prefetch | 1) & MCODE_MASK), addrname(prefetch & MCODE_MASK)); |
380 | 376 | break; |
381 | 377 | case 6: // deliver BUS data to memory |
382 | 378 | dst += snprintf(dst, len - (size_t)(dst - buffer), "MD←BUS "); |
branches/alto2/src/emu/cpu/alto2/alto2cpu.c
r26346 | r26347 | |
86 | 86 | alto2_cpu_device::alto2_cpu_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock) : |
87 | 87 | cpu_device(mconfig, ALTO2, "Xerox Alto-II", tag, owner, clock, "alto2", __FILE__), |
88 | 88 | #if ALTO2_DEBUG |
89 | | m_log_types(LOG_DISK), |
| 89 | m_log_types(LOG_ETH), |
90 | 90 | m_log_level(8), |
91 | 91 | m_log_newline(true), |
92 | 92 | #endif |
r26346 | r26347 | |
105 | 105 | m_mpc(0), |
106 | 106 | m_mir(0), |
107 | 107 | m_rsel(0), |
| 108 | m_d_rsel(0), |
| 109 | m_d_aluf(0), |
| 110 | m_d_bs(0), |
| 111 | m_d_f1(0), |
| 112 | m_d_f2(0), |
| 113 | m_d_loadt(0), |
| 114 | m_d_loadl(0), |
108 | 115 | m_next(0), |
109 | 116 | m_next2(0), |
110 | 117 | m_r(), |
r26346 | r26347 | |
345 | 352 | return ROM_NAME( alto2_cpu ); |
346 | 353 | } |
347 | 354 | |
348 | | //------------------------------------------------- |
349 | | // device_memory_interface overrides |
350 | | //------------------------------------------------- |
351 | | |
352 | | const address_space_config*alto2_cpu_device::memory_space_config(address_spacenum spacenum) const |
353 | | { |
354 | | if (AS_0 == spacenum) |
355 | | return &m_ucode_config; |
356 | | if (AS_1 == spacenum) |
357 | | return &m_const_config; |
358 | | if (AS_2 == spacenum) |
359 | | return &m_iomem_config; |
360 | | return NULL; |
361 | | } |
362 | | |
363 | 355 | /** |
364 | 356 | * @brief list of microcode PROM loading options |
365 | 357 | */ |
r26346 | r26347 | |
676 | 668 | } |
677 | 669 | }; |
678 | 670 | |
679 | | //! 82S23 32x8 BPROM; display HBLANK, HSYNC, SCANEND, HLCGATE ... |
680 | | static const prom_load_t pl_displ_a63 = |
681 | | { |
682 | | "displ.a63", |
683 | | 0, |
684 | | "82a20d60", |
685 | | "39d90703568be5419ada950e112d99227873fdea", |
686 | | /* size */ 0040, |
687 | | /* amap */ AMAP_DEFAULT, |
688 | | /* axor */ 0, |
689 | | /* dxor */ 0, |
690 | | /* width */ 8, |
691 | | /* shift */ 0, |
692 | | /* dmap */ DMAP_DEFAULT, |
693 | | /* dand */ ZERO, |
694 | | /* type */ sizeof(UINT8) |
695 | | }; |
696 | | |
697 | | //! P3601 256x4 BPROM; display FIFO control: STOPWAKE, MBEMPTY |
698 | | static const prom_load_t pl_displ_a38 = |
699 | | { |
700 | | "displ.a38", |
701 | | 0, |
702 | | "fd30beb7", |
703 | | "65e4a19ba4ff748d525122128c514abedd55d866", |
704 | | /* size */ 0400, |
705 | | /* amap */ AMAP_REVERSE_0_7, // reverse address lines A0-A7 |
706 | | /* axor */ 0, |
707 | | /* dxor */ 0, |
708 | | /* width */ 4, |
709 | | /* shift */ 0, |
710 | | /* dmap */ DMAP_DEFAULT, |
711 | | /* dand */ ZERO, |
712 | | /* type */ sizeof(UINT8) |
713 | | }; |
714 | | |
715 | | //! P3601 256x4 BPROM; display VSYNC and VBLANK |
716 | | static const prom_load_t pl_displ_a66 = |
717 | | { |
718 | | "displ.a66", |
719 | | 0, |
720 | | "9f91aad9", |
721 | | "69b1d4c71f4e18103112e8601850c2654e9265cf", |
722 | | /* size */ 0400, |
723 | | /* amap */ AMAP_DEFAULT, |
724 | | /* axor */ 0, |
725 | | /* dxor */ 0, |
726 | | /* width */ 4, |
727 | | /* shift */ 0, |
728 | | /* dmap */ DMAP_DEFAULT, |
729 | | /* dand */ ZERO, |
730 | | /* type */ sizeof(UINT8) |
731 | | }; |
732 | | |
733 | 671 | //! 3601-1 256x4 BPROM; Emulator address modifier |
734 | 672 | static const prom_load_t pl_2kctl_u3 = |
735 | 673 | { |
r26346 | r26347 | |
819 | 757 | /* type */ sizeof(UINT8) |
820 | 758 | }; |
821 | 759 | |
822 | | static const prom_load_t pl_madr_a32 = |
823 | | { |
824 | | "madr.a32", |
825 | | 0, |
826 | | "a0e3b4a7", |
827 | | "24e50afdeb637a6a8588f8d3a3493c9188b8da2c", |
828 | | /* size */ 0400, |
829 | | /* amap */ AMAP_DEFAULT, |
830 | | /* axor */ 0, |
831 | | /* dxor */ 017, // invert D0-D3 |
832 | | /* width */ 4, |
833 | | /* shift */ 0, |
834 | | /* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0 |
835 | | /* dand */ ZERO, |
836 | | /* type */ sizeof(UINT8) |
837 | | }; |
838 | | |
839 | 760 | static const prom_load_t pl_madr_a64 = |
840 | 761 | { |
841 | 762 | "madr.a64", |
r26346 | r26347 | |
904 | 825 | /* type */ sizeof(UINT8) |
905 | 826 | }; |
906 | 827 | |
907 | | static const prom_load_t pl_enet_a41 = |
908 | | { /* P3601 256x4 BPROM; Ethernet phase encoder 1 "PE1" */ |
909 | | "enet.a41", |
910 | | 0, |
911 | | "d5de8d86", |
912 | | "c134a4c898c73863124361a9b0218f7a7f00082a", |
913 | | /* size */ 0400, |
914 | | /* amap */ AMAP_DEFAULT, |
915 | | /* axor */ 0, |
916 | | /* dxor */ 0, |
917 | | /* width */ 4, |
918 | | /* shift */ 0, |
919 | | /* dmap */ DMAP_DEFAULT, |
920 | | /* dand */ ZERO, |
921 | | /* type */ sizeof(UINT8) |
922 | | }; |
| 828 | //------------------------------------------------- |
| 829 | // device_memory_interface overrides |
| 830 | //------------------------------------------------- |
923 | 831 | |
924 | | static const prom_load_t pl_enet_a42 = |
925 | | { /* P3601 256x4 BPROM; Ethernet phase encoder 2 "PE2" */ |
926 | | "enet.a42", |
927 | | 0, |
928 | | "9d5c81bd", |
929 | | "ac7e63332a3dad0bef7cd0349b24e156a96a4bf0", |
930 | | /* size */ 0400, |
931 | | /* amap */ AMAP_DEFAULT, |
932 | | /* axor */ 0, |
933 | | /* dxor */ 0, |
934 | | /* width */ 4, |
935 | | /* shift */ 0, |
936 | | /* dmap */ DMAP_DEFAULT, |
937 | | /* dand */ ZERO, |
938 | | /* type */ sizeof(UINT8) |
939 | | }; |
| 832 | const address_space_config*alto2_cpu_device::memory_space_config(address_spacenum spacenum) const |
| 833 | { |
| 834 | if (AS_0 == spacenum) |
| 835 | return &m_ucode_config; |
| 836 | if (AS_1 == spacenum) |
| 837 | return &m_const_config; |
| 838 | if (AS_2 == spacenum) |
| 839 | return &m_iomem_config; |
| 840 | return NULL; |
| 841 | } |
940 | 842 | |
941 | | static const prom_load_t pl_enet_a49 = |
942 | | { /* P3601 256x4 BPROM; Ethernet FIFO control "AFIFO" */ |
943 | | "enet.a49", |
944 | | 0, |
945 | | "4d2dcdb2", |
946 | | "583327a7d70cd02702c941c0e43c1e9408ff7fd0", |
947 | | /* size */ 0400, |
948 | | /* amap */ AMAP_REVERSE_0_7, // reverse address lines A0-A7 |
949 | | /* axor */ 0, |
950 | | /* dxor */ 0, |
951 | | /* width */ 4, |
952 | | /* shift */ 0, |
953 | | /* dmap */ DMAP_DEFAULT, |
954 | | /* dand */ ZERO, |
955 | | /* type */ sizeof(UINT8) |
956 | | }; |
957 | | |
958 | 843 | //------------------------------------------------- |
959 | 844 | // device_start - device-specific startup |
960 | 845 | //------------------------------------------------- |
r26346 | r26347 | |
965 | 850 | // get a pointer to the IO address space |
966 | 851 | m_iomem = &space(AS_2); |
967 | 852 | |
968 | | // decode micro code PROMs to CROM |
| 853 | // decode ALTO2_UCODE_PAGES = 1 or 2 pages of micro code PROMs to CROM |
969 | 854 | m_ucode_crom = prom_load(machine(), pl_ucode, memregion("ucode_proms")->base(), ALTO2_UCODE_ROM_PAGES, 8); |
970 | 855 | |
971 | 856 | // allocate micro code CRAM |
972 | 857 | m_ucode_cram = auto_alloc_array(machine(), UINT8, sizeof(UINT32) * ALTO2_UCODE_RAM_PAGES * ALTO2_UCODE_PAGE_SIZE); |
973 | | // fill with inverted bits value |
| 858 | // fill with the micro code inverted bits value |
974 | 859 | for (offs_t offset = 0; offset < ALTO2_UCODE_RAM_PAGES * ALTO2_UCODE_PAGE_SIZE; offset++) |
975 | 860 | *reinterpret_cast<UINT32 *>(m_ucode_cram + offset * 4) = ALTO2_UCODE_INVERTED; |
976 | 861 | |
977 | | // decode constant PROMs to const data |
| 862 | // decode constant PROMs to m_const_data |
978 | 863 | m_const_data = prom_load(machine(), pl_const, memregion("const_proms")->base(), 1, 4); |
979 | 864 | |
980 | | m_disp_a38 = prom_load(machine(), &pl_displ_a38, memregion("displ_a38")->base()); |
981 | | m_disp_a63 = prom_load(machine(), &pl_displ_a63, memregion("displ_a63")->base()); |
982 | | m_disp_a66 = prom_load(machine(), &pl_displ_a66, memregion("displ_a66")->base()); |
983 | 865 | m_ctl2k_u3 = prom_load(machine(), &pl_2kctl_u3, memregion("2kctl_u3")->base()); |
984 | 866 | m_ctl2k_u38 = prom_load(machine(), &pl_2kctl_u38, memregion("2kctl_u38")->base()); |
985 | 867 | m_ctl2k_u76 = prom_load(machine(), &pl_2kctl_u76, memregion("2kctl_u76")->base()); |
986 | 868 | m_alu_a10 = prom_load(machine(), &pl_alu_a10, memregion("alu_a10")->base()); |
987 | 869 | m_cram3k_a37 = prom_load(machine(), &pl_3kcram_a37, memregion("3kcram_a37")->base()); |
988 | | m_madr_a32 = prom_load(machine(), &pl_madr_a32, memregion("madr_a32")->base()); |
989 | 870 | m_madr_a64 = prom_load(machine(), &pl_madr_a64, memregion("madr_a64")->base()); |
990 | 871 | m_madr_a65 = prom_load(machine(), &pl_madr_a65, memregion("madr_a65")->base()); |
991 | 872 | m_madr_a90 = prom_load(machine(), &pl_madr_a90, memregion("madr_a90")->base()); |
992 | 873 | m_madr_a91 = prom_load(machine(), &pl_madr_a91, memregion("madr_a91")->base()); |
993 | | m_ether_a41 = prom_load(machine(), &pl_enet_a41, memregion("ether_a41")->base()); |
994 | | m_ether_a42 = prom_load(machine(), &pl_enet_a42, memregion("ether_a42")->base()); |
995 | | m_ether_a49 = prom_load(machine(), &pl_enet_a49, memregion("ether_a49")->base()); |
996 | 874 | |
997 | 875 | #if 0 // dump ALU a10 PROM after loading |
998 | 876 | for (UINT8 i = 0; i < 32; i++) { |
r26346 | r26347 | |
1126 | 1004 | save_item(NAME(m_eth.tx_count)); |
1127 | 1005 | save_item(NAME(m_eth.duckbreath)); |
1128 | 1006 | |
| 1007 | state_add( A2_TASK, "TASK", m_task).callimport().formatstr("%6s"); |
| 1008 | state_add( A2_MPC, "MPC", m_mpc).formatstr("%06O"); |
| 1009 | state_add( A2_NEXT, "NEXT", m_next).formatstr("%06O"); |
| 1010 | state_add( A2_NEXT2, "NEXT2", m_next2).formatstr("%06O"); |
| 1011 | state_add( A2_BUS, "BUS", m_bus).formatstr("%06O"); |
| 1012 | state_add( A2_T, "T", m_t).formatstr("%06O"); |
| 1013 | state_add( A2_ALU, "ALU", m_alu).formatstr("%06O"); |
| 1014 | state_add( A2_ALUC0, "ALUC0", m_aluc0).mask(1); |
| 1015 | state_add( A2_L, "L", m_l).formatstr("%06O"); |
| 1016 | state_add( A2_SHIFTER, "SHIFTER", m_shifter).formatstr("%06O"); |
| 1017 | state_add( A2_LALUC0, "LALUC0", m_laluc0).mask(1); |
| 1018 | state_add( A2_M, "M", m_m).formatstr("%06O"); |
| 1019 | state_add_divider(-1); |
1129 | 1020 | state_add( A2_AC3, "AC(3)", m_r[000]).formatstr("%06O"); |
1130 | 1021 | state_add( A2_AC2, "AC(2)", m_r[001]).formatstr("%06O"); |
1131 | 1022 | state_add( A2_AC1, "AC(1)", m_r[002]).formatstr("%06O"); |
r26346 | r26347 | |
1216 | 1107 | state_add( A2_SEEKOK, "SEEKOK", m_dsk.seekok).formatstr("%1u"); |
1217 | 1108 | state_add( A2_OKTORUN, "OKTORUN", m_dsk.ok_to_run).formatstr("%1u"); |
1218 | 1109 | state_add( A2_READY, "READY", m_dsk.kstat).formatstr("%1u"); |
1219 | | state_add_divider(-1); |
1220 | | state_add( A2_TASK, "TASK", m_task).formatstr("%03O"); |
1221 | | state_add( A2_MPC, "MPC", m_mpc).formatstr("%06O"); |
1222 | | state_add( A2_NEXT, "NEXT", m_next).formatstr("%06O"); |
1223 | | state_add( A2_NEXT2, "NEXT2", m_next2).formatstr("%06O"); |
1224 | | state_add( A2_BUS, "BUS", m_bus).formatstr("%06O"); |
1225 | | state_add( A2_T, "T", m_t).formatstr("%06O"); |
1226 | | state_add( A2_ALU, "ALU", m_alu).formatstr("%06O"); |
1227 | | state_add( A2_ALUC0, "ALUC0", m_aluc0).formatstr("%1u"); |
1228 | | state_add( A2_L, "L", m_l).formatstr("%06O"); |
1229 | | state_add( A2_SHIFTER, "SHIFTER", m_shifter).formatstr("%06O"); |
1230 | | state_add( A2_LALUC0, "LALUC0", m_laluc0).formatstr("%1u"); |
1231 | | state_add( A2_M, "M", m_m).formatstr("%06O"); |
1232 | 1110 | |
1233 | 1111 | state_add(STATE_GENPC, "curpc", m_mpc).formatstr("%03X").noshow(); |
1234 | 1112 | state_add(STATE_GENFLAGS, "GENFLAGS", m_aluc0).formatstr("%5s").noshow(); |
r26346 | r26347 | |
1238 | 1116 | hard_reset(); |
1239 | 1117 | } |
1240 | 1118 | |
| 1119 | //------------------------------------------------- |
| 1120 | // state_string_export - export state as a string |
| 1121 | // for the debugger |
| 1122 | //------------------------------------------------- |
| 1123 | |
| 1124 | void alto2_cpu_device::state_string_export(const device_state_entry &entry, astring &string) |
| 1125 | { |
| 1126 | switch (entry.index()) |
| 1127 | { |
| 1128 | case A2_TASK: |
| 1129 | string.printf("%s", task_name(m_task)); |
| 1130 | break; |
| 1131 | case STATE_GENFLAGS: |
| 1132 | string.printf("%s%s%s%s", |
| 1133 | m_aluc0 ? "C":"-", |
| 1134 | m_laluc0 ? "c":"-", |
| 1135 | m_shifter == 0 ? "0":"-", |
| 1136 | static_cast<INT16>(m_shifter) < 0 ? "<":"-"); |
| 1137 | break; |
| 1138 | } |
| 1139 | } |
| 1140 | |
1241 | 1141 | //! read microcode CROM |
1242 | 1142 | READ32_MEMBER ( alto2_cpu_device::crom_r ) |
1243 | 1143 | { |
r26346 | r26347 | |
1331 | 1231 | { |
1332 | 1232 | } |
1333 | 1233 | |
1334 | | //------------------------------------------------- |
1335 | | // state_string_export - export state as a string |
1336 | | // for the debugger |
1337 | | //------------------------------------------------- |
1338 | | |
1339 | | void alto2_cpu_device::state_string_export(const device_state_entry &entry, astring &string) |
1340 | | { |
1341 | | switch (entry.index()) |
1342 | | { |
1343 | | case STATE_GENFLAGS: |
1344 | | string.printf("%s%s%s%s", |
1345 | | m_aluc0 ? "C":"-", |
1346 | | m_laluc0 ? "c":"-", |
1347 | | m_shifter == 0 ? "0":"-", |
1348 | | static_cast<INT16>(m_shifter) < 0 ? "<":"-"); |
1349 | | break; |
1350 | | } |
1351 | | } |
1352 | | |
1353 | 1234 | void alto2_cpu_device::fatal(int exitcode, const char *format, ...) |
1354 | 1235 | { |
1355 | 1236 | va_list ap; |
branches/alto2/src/emu/cpu/alto2/a2ether.c
r26346 | r26347 | |
8 | 8 | * |
9 | 9 | *****************************************************************************/ |
10 | 10 | #include "alto2cpu.h" |
| 11 | #include "a2roms.h" |
11 | 12 | |
12 | 13 | #define DEBUG_PACKETS 1 |
13 | 14 | |
| 15 | |
| 16 | /** |
| 17 | * @brief BPROMs P3601-1; 256x4; enet.a41 "PE1" and enet.a42 "PE2" |
| 18 | * |
| 19 | * Phase encoder |
| 20 | * |
| 21 | * a41: P3601-1; 256x4; "PE1" |
| 22 | * a42: P3601-1; 256x4; "PE2" |
| 23 | * |
| 24 | * PE1/PE2 inputs |
| 25 | * ---------------- |
| 26 | * A0 (5) OUTGO |
| 27 | * A1 (6) XDATA |
| 28 | * A2 (7) OSDATAG |
| 29 | * A3 (4) XCLOCK |
| 30 | * A4 (3) OCNTR0 |
| 31 | * A5 (2) OCNTR1 |
| 32 | * A6 (1) OCNTR2 |
| 33 | * A7 (15) OCNTR3 |
| 34 | * |
| 35 | * PE1 outputs |
| 36 | * ---------------- |
| 37 | * D0 (12) OCNTR0 |
| 38 | * D1 (11) OCNTR1 |
| 39 | * D2 (10) OCNTR2 |
| 40 | * D3 (9) OCNTR3 |
| 41 | * |
| 42 | * PE2 outputs |
| 43 | * ---------------- |
| 44 | * D0 (12) n.c. |
| 45 | * D1 (11) to OSLOAD flip flop J and K' |
| 46 | * D2 (10) XDATA |
| 47 | * D3 (9) XCLOCK |
| 48 | */ |
| 49 | static const prom_load_t pl_enet_a41 = |
| 50 | { /* P3601 256x4 BPROM; Ethernet phase encoder 1 "PE1" */ |
| 51 | "enet.a41", |
| 52 | 0, |
| 53 | "d5de8d86", |
| 54 | "c134a4c898c73863124361a9b0218f7a7f00082a", |
| 55 | /* size */ 0400, |
| 56 | /* amap */ AMAP_DEFAULT, |
| 57 | /* axor */ 0, |
| 58 | /* dxor */ 0, |
| 59 | /* width */ 4, |
| 60 | /* shift */ 0, |
| 61 | /* dmap */ DMAP_DEFAULT, |
| 62 | /* dand */ ZERO, |
| 63 | /* type */ sizeof(UINT8) |
| 64 | }; |
| 65 | |
| 66 | static const prom_load_t pl_enet_a42 = |
| 67 | { /* P3601 256x4 BPROM; Ethernet phase encoder 2 "PE2" */ |
| 68 | "enet.a42", |
| 69 | 0, |
| 70 | "9d5c81bd", |
| 71 | "ac7e63332a3dad0bef7cd0349b24e156a96a4bf0", |
| 72 | /* size */ 0400, |
| 73 | /* amap */ AMAP_DEFAULT, |
| 74 | /* axor */ 0, |
| 75 | /* dxor */ 0, |
| 76 | /* width */ 4, |
| 77 | /* shift */ 0, |
| 78 | /* dmap */ DMAP_DEFAULT, |
| 79 | /* dand */ ZERO, |
| 80 | /* type */ sizeof(UINT8) |
| 81 | }; |
| 82 | |
| 83 | /** |
| 84 | * @brief BPROM; P3601-1; 265x4 enet.a49 "AFIFO" |
| 85 | * |
| 86 | * Perhaps try with the contents of the display FIFO, as it is |
| 87 | * the same type and the display FIFO has the same size. |
| 88 | * |
| 89 | * FIFO control |
| 90 | * |
| 91 | * a49: P3601-1; 256x4; "AFIFO" |
| 92 | * |
| 93 | * inputs |
| 94 | * ---------------- |
| 95 | * A0 (5) fifo_wr[0] |
| 96 | * A1 (6) fifo_wr[1] |
| 97 | * A2 (7) fifo_wr[2] |
| 98 | * A3 (4) fifo_wr[3] |
| 99 | * A4 (3) fifo_rd[0] |
| 100 | * A5 (2) fifo_rd[1] |
| 101 | * A6 (1) fifo_rd[2] |
| 102 | * A7 (15) fifo_rd[3] |
| 103 | * |
| 104 | * outputs active low |
| 105 | * ---------------------------- |
| 106 | * D0 (12) BE' (buffer empty) |
| 107 | * D1 (11) BNE' (buffer next empty ?) |
| 108 | * D2 (10) BNNE' (buffer next next empty ?) |
| 109 | * D3 (9) BF' (buffer full) |
| 110 | */ |
| 111 | static const prom_load_t pl_enet_a49 = |
| 112 | { /* P3601 256x4 BPROM; Ethernet FIFO control "AFIFO" */ |
| 113 | "enet.a49", |
| 114 | 0, |
| 115 | "4d2dcdb2", |
| 116 | "583327a7d70cd02702c941c0e43c1e9408ff7fd0", |
| 117 | /* size */ 0400, |
| 118 | /* amap */ AMAP_REVERSE_0_7, // reverse address lines A0-A7 |
| 119 | /* axor */ 0, |
| 120 | /* dxor */ 0, |
| 121 | /* width */ 4, |
| 122 | /* shift */ 0, |
| 123 | /* dmap */ DMAP_DEFAULT, |
| 124 | /* dand */ ZERO, |
| 125 | /* type */ sizeof(UINT8) |
| 126 | }; |
| 127 | |
14 | 128 | #define GET_ETH_WLF(st) X_BIT(st,16,4) //!< hardware status: write latch full/filled (? set by EODFCT) |
15 | 129 | #define PUT_ETH_WLF(st,val) X_WRBITS(st,16,4,4,val) |
16 | 130 | |
r26346 | r26347 | |
687 | 801 | // intialize all ethernet variables |
688 | 802 | memset(&m_eth, 0, sizeof(m_eth)); |
689 | 803 | |
| 804 | m_ether_a41 = prom_load(machine(), &pl_enet_a41, memregion("ether_a41")->base()); |
| 805 | m_ether_a42 = prom_load(machine(), &pl_enet_a42, memregion("ether_a42")->base()); |
| 806 | m_ether_a49 = prom_load(machine(), &pl_enet_a49, memregion("ether_a49")->base()); |
| 807 | |
690 | 808 | // FIXME: read configuration for m_eth.duckbreath enable |
| 809 | m_eth.duckbreath = m_duckbreath_sec; |
691 | 810 | |
692 | 811 | set_bs(task, bs_ether_eidfct, &alto2_cpu_device::bs_early_eidfct, 0); |
693 | 812 | |
r26346 | r26347 | |
714 | 833 | |
715 | 834 | m_eth.rx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(alto2_cpu_device::rx_duckbreath),this)); |
716 | 835 | if (m_eth.duckbreath) |
717 | | m_eth.rx_timer->adjust(attotime::from_seconds(m_duckbreath_sec), 0); |
| 836 | m_eth.rx_timer->adjust(attotime::from_seconds(m_eth.duckbreath), 0); |
718 | 837 | else |
719 | 838 | m_eth.rx_timer->reset(); |
720 | 839 | } |