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r26290 Tuesday 19th November, 2013 at 22:38:39 UTC by Tafoid

jedutil.c:  [Kevin Eshbach] - Corrected the output of the PAL20X4, PAL20X8, PAL20X10 to show the XOR on the relevant sum of products. - When viewing a device the size of the JED file is verified to match the size of the device. - Replaced hard-coded symbol strings with constants. - Started experimental work for supporting RICOH PAL’s.  (Currently ifdef'ed out.) - Added support for viewing the following devices and the corresponding regression test data.  (PALCE16V8, PAL10P8, PAL12P6, PAL14P4, PAL16P2, PAL16P8, PAL16RP4, PAL16RP6, PAL16RP8, PAL6L16, PAL8L14, PAL12H10, PAL12L10, PAL14H8, PAL14L8, PAL16H6, PAL16L6, PAL18H4, PAL18L4, PAL20C1 and PAL20L2)

[src/regtests/jedutil/baseline/pal10p8]	pal10p8.txt*
[src/regtests/jedutil/baseline/pal12h10]	pal12h10.txt*
[src/regtests/jedutil/baseline/pal12l10]	pal12l10.txt*
[src/regtests/jedutil/baseline/pal12p6]	pal12p6.txt*
[src/regtests/jedutil/baseline/pal14h8]	pal14h8.txt*
[src/regtests/jedutil/baseline/pal14l8]	pal14l8.txt*
[src/regtests/jedutil/baseline/pal14p4]	pal14p4.txt*
[src/regtests/jedutil/baseline/pal16h6]	pal16h6.txt*
[src/regtests/jedutil/baseline/pal16l6]	pal16l6.txt*
[src/regtests/jedutil/baseline/pal16p2]	pal16p2.txt*
[src/regtests/jedutil/baseline/pal16p8]	pal16p8.txt*
[src/regtests/jedutil/baseline/pal16rp4]	pal16rp4.txt*
[src/regtests/jedutil/baseline/pal16rp6]	pal16rp6.txt*
[src/regtests/jedutil/baseline/pal16rp8]	pal16rp8.txt*
[src/regtests/jedutil/baseline/pal18h4]	pal18h4.txt*
[src/regtests/jedutil/baseline/pal18l4]	pal18l4.txt*
[src/regtests/jedutil/baseline/pal20l2]	pal20l2.txt*
[src/regtests/jedutil/baseline/pal20x10]	pal20x10.txt
[src/regtests/jedutil/baseline/pal20x4]	pal20x4.txt
[src/regtests/jedutil/baseline/pal20x8]	pal20x8.txt
[src/regtests/jedutil/baseline/pal6l16]	pal6l16.txt*
[src/regtests/jedutil/baseline/pal8l14]	pal8l14.txt*
[src/regtests/jedutil/baseline/palce16v8]	pal10h8-as-palce16v8.txt* pal12h6-as-palce16v8.txt* pal14h4-as-palce16v8.txt* pal16r4-as-palce16v8.txt*
[src/regtests/jedutil/eqns/Opal_Jr/pal10p8]	pal10p8.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal12h10]	pal12h10.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal12l10]	pal12l10.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal12p6]	pal12p6.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal14h8]	pal14h8.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal14p4]	pal14p4.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal16h6]	pal16h6.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal16l6]	pal16l6.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal16p8]	pal16p8.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal16rp4]	pal16rp4.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal16rp6]	pal16rp6.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal16rp8]	pal16rp8.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal18h4]	pal18h4.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal18l4]	pal18l4.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal20c1]	pal20c1.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal20l2]	pal20l2.eqn*
[src/regtests/jedutil/eqns/Opal_Jr/pal20x10]	pal20x10.eqn
[src/regtests/jedutil/eqns/Opal_Jr/pal20x4]	pal20x4.eqn
[src/regtests/jedutil/eqns/Opal_Jr/pal20x8]	pal20x8.eqn
[src/regtests/jedutil/eqns/PALASM/pal6l16]	pal6l16.pds*
[src/regtests/jedutil/eqns/PALASM/pal8l14]	pal8l14.pds*
[src/regtests/jedutil/jeds/pal10p8]	pal10p8.jed*
[src/regtests/jedutil/jeds/pal12h10]	pal12h10.jed*
[src/regtests/jedutil/jeds/pal12l10]	pal12l10.jed*
[src/regtests/jedutil/jeds/pal12p6]	pal12p6.jed*
[src/regtests/jedutil/jeds/pal14h8]	pal14h8.jed*
[src/regtests/jedutil/jeds/pal14l8]	pal14l8.jed*
[src/regtests/jedutil/jeds/pal14p4]	pal14p4.jed*
[src/regtests/jedutil/jeds/pal16h6]	pal16h6.jed*
[src/regtests/jedutil/jeds/pal16l6]	pal16l6.jed*
[src/regtests/jedutil/jeds/pal16p8]	pal16p8.jed*
[src/regtests/jedutil/jeds/pal16rp4]	pal16rp4.jed*
[src/regtests/jedutil/jeds/pal16rp6]	pal16rp6.jed*
[src/regtests/jedutil/jeds/pal18h4]	pal18h4.jed*
[src/regtests/jedutil/jeds/pal18l4]	pal18l4.jed*
[src/regtests/jedutil/jeds/pal20c1]	pal20c1.jed*
[src/regtests/jedutil/jeds/pal20l2]	pal20l2.jed*
[src/regtests/jedutil/jeds/pal6l16]	pal6l16.jed*
[src/regtests/jedutil/jeds/pal8l14]	pal8l14.jed*
[src/regtests/jedutil/jeds/palce16v8]	pal10l8-as-palce16v8.jed* pal16r6-as-palce16v8.jed*
[src/tools]	jedutil.c

trunk/src/tools/jedutil.c

r26289	r26290
21	21	20-pin devices:
22	22	PAL10H8     = QP20 QF0320
23	23	PAL12H6     = QP20 QF0320
24		PAL14H4     = QP20
25		PAL16H2     = QP20
26		PAL16C1     = QP20
	24	PAL14H4     = QP20 QF0448
	25	PAL16H2     = QP20 QF0512
	26	PAL16C1     = QP20 QF0512
27	27	PAL10L8     = QP20 QF0320
28		PAL12L6     = QP20
29		PAL14L4     = QP20
30		PAL16L2     = QP20
	28	PAL12L6     = QP20 QF0320
	29	PAL14L4     = QP20 QF0448
	30	PAL16L2     = QP20 QF0512
31	31
	32	PAL10P8     = QP20 QF0328
	33	PAL12P6     = QP20 QF0390
	34	PAL14P4     = QP20 QF0452
	35	PAL16P2     = QP20 QF0514
	36	PAL16P8     = QP20 QF2056
	37	PAL16RP4    = QP20 QF2056
	38	PAL16RP6    = QP20 QF2056
	39	PAL16RP8    = QP20 QF2056
	40
32	41	15S8        = QP20 QF0448
33	42
34	43	CK2605      = QP20 QF1106
r26289	r26290
37	46
38	47	PAL16L8     = QP20 QF2048
39	48
40		PAL16R4     = QP20
41		PAL16R6     = QP20
42		PAL16R8     = QP20
43		PAL16RA8    = QP20 QF2056
	49	PAL16R4     = QP20 QF2048
	50	PAL16R6     = QP20 QF2048
	51	PAL16R8     = QP20 QF2048
	52	PAL16RA8    = QP20 QF2056?
44	53
45	54	PAL16V8R    = QP20 QF2194
46	55	PALCE16V8   = QP20 QF2194
r26289	r26290
48	57
49	58	18CV8       = QP20 QF2696
50	59
	60	EPL10P8     = QP20
	61	EPL12P6     = QP20
	62	EPL14P4     = QP20
	63	EPL16P2     = QP20
	64	EPL16P8     = QP20
	65	EPL16RP8    = QP20
	66	EPL16RP6    = QP20
	67	EPL16RP4    = QP20
	68
51	69	24-pin devices:
52		PAL20L8     = QP24
53		PAL20L10    = QP24
54		PAL20R4     = QP24
55		PAL20R6     = QP24
56		PAL20R8     = QP24
	70	PAL6L16     = QP24 QF0192
	71	PAL8L14     = QP24 QF0224
	72	PAL12H10    = QP24 QF0480
	73	PAL12L10    = QP24 QF0480
	74	PAL14H8     = QP24 QF0560
	75	PAL14L8     = QP24 QF0560
	76	PAL16H6     = QP24 QF0640
	77	PAL16L6     = QP24 QF0640
	78	PAL18H4     = QP24 QF0720
	79	PAL18L4     = QP24 QF0720
	80	PAL20C1     = QP24 QF0640
	81	PAL20L2     = QP24 QF0640
57	82
58		PAL20X4     = QP24
59		PAL20X8     = QP24
60		PAL20X10    = QP24
	83	PAL20L8     = QP24 QF2560
	84	PAL20L10    = QP24 QF1600
	85	PAL20R4     = QP24 QF2560
	86	PAL20R6     = QP24 QF2560
	87	PAL20R8     = QP24 QF2560
61	88
62		PAL22V10    = QP24
	89	PAL20X4     = QP24 QF1600
	90	PAL20X8     = QP24 QF1600
	91	PAL20X10    = QP24 QF1600
63	92
	93	PAL22V10    = QP24 QF5828?
	94
64	95	GAL20V8A    = QP24 QF2706
65	96	GAL22V10    = QP24 QF5892
66	97
r26289	r26290
69	100
70	101	****************************************************************************
71	102
72		Thanks to Charles MacDonald for providing information on how to decode
73		the PLS153/82S153 and CK2605 fuse map.
	103	Thanks to Charles MacDonald (http://cgfm2.emuviews.com/) for providing
	104	information on how to decode the PLS153/82S153 and CK2605 fuse map.
74	105
75	106	***************************************************************************/
76	107
r26289	r26290
134	165	#define LOWHIGH_FUSE_BLOWN 0x00000004
135	166	#define NO_FUSE_BLOWN      0x00000008
136	167
	168
	169
	170	/* Symbols */
	171	#define AND_SYMBOL "&"
	172	#define OR_SYMBOL "+"
	173	#define XOR_SYMBOL ":+:"
	174
	175	#define LOW_SYMBOL "/"
	176
	177	#define INPUT_SYMBOL "i"
	178	#define OUTPUT_SYMBOL "o"
	179	#define REGISTERED_FEEDBACK_OUTPUT_SYMBOL "rfo"
	180	#define OUTPUT_FEEDBACK_SYMBOL "of"
	181	#define REGISTERED_FEEDBACK_SYMBOL "rf"
	182
	183	#define COMBINATORIAL_ASSIGNMENT "="
	184	#define REGISTERED_ASSIGNMENT ":="
	185
	186
	187
137	188	/***************************************************************************
138	189	TYPE DEFINITIONS
139	190	***************************************************************************/
r26289	r26290
181	232	struct _pal_data
182	233	{
183	234	const char *name;
	235	UINT32 numfuses;
184	236	const pin_fuse_rows *pinfuserows;
185	237	UINT16 pinfuserowscount;
186	238	const pin_fuse_columns *pinfusecolumns;
r26289	r26290
233	285	static void print_pal20x10_product_terms(const pal_data* pal, const jed_data* jed);
234	286	static void print_82s153_pls153_product_terms(const pal_data* pal, const jed_data* jed);
235	287	static void print_ck2605_product_terms(const pal_data* pal, const jed_data* jed);
	288	#if defined(ricoh_pals)
	289	static void print_epl10p8_product_terms(const pal_data* pal, const jed_data* jed);
	290	static void print_epl12p6_product_terms(const pal_data* pal, const jed_data* jed);
	291	static void print_epl14p4_product_terms(const pal_data* pal, const jed_data* jed);
	292	static void print_epl16p2_product_terms(const pal_data* pal, const jed_data* jed);
	293	static void print_epl16p8_product_terms(const pal_data* pal, const jed_data* jed);
	294	static void print_epl16rp8_product_terms(const pal_data* pal, const jed_data* jed);
	295	static void print_epl16rp6_product_terms(const pal_data* pal, const jed_data* jed);
	296	static void print_epl16rp4_product_terms(const pal_data* pal, const jed_data* jed);
	297	#endif
	298	static void print_pal10p8_product_terms(const pal_data* pal, const jed_data* jed);
	299	static void print_pal12p6_product_terms(const pal_data* pal, const jed_data* jed);
	300	static void print_pal14p4_product_terms(const pal_data* pal, const jed_data* jed);
	301	static void print_pal16p2_product_terms(const pal_data* pal, const jed_data* jed);
	302	static void print_pal16p8_product_terms(const pal_data* pal, const jed_data* jed);
	303	static void print_pal16rp4_product_terms(const pal_data* pal, const jed_data* jed);
	304	static void print_pal16rp6_product_terms(const pal_data* pal, const jed_data* jed);
	305	static void print_pal16rp8_product_terms(const pal_data* pal, const jed_data* jed);
	306	static void print_pal6l16_product_terms(const pal_data* pal, const jed_data* jed);
	307	static void print_pal8l14_product_terms(const pal_data* pal, const jed_data* jed);
	308	static void print_pal12h10_product_terms(const pal_data* pal, const jed_data* jed);
	309	static void print_pal12l10_product_terms(const pal_data* pal, const jed_data* jed);
	310	static void print_pal14h8_product_terms(const pal_data* pal, const jed_data* jed);
	311	static void print_pal14l8_product_terms(const pal_data* pal, const jed_data* jed);
	312	static void print_pal16h6_product_terms(const pal_data* pal, const jed_data* jed);
	313	static void print_pal16l6_product_terms(const pal_data* pal, const jed_data* jed);
	314	static void print_pal18h4_product_terms(const pal_data* pal, const jed_data* jed);
	315	static void print_pal18l4_product_terms(const pal_data* pal, const jed_data* jed);
	316	static void print_pal20c1_product_terms(const pal_data* pal, const jed_data* jed);
	317	static void print_pal20l2_product_terms(const pal_data* pal, const jed_data* jed);
236	318
237	319
238	320
r26289	r26290
263	345	static void config_pal20x10_pins(const pal_data* pal, const jed_data* jed);
264	346	static void config_82s153_pls153_pins(const pal_data* pal, const jed_data* jed);
265	347	static void config_ck2605_pins(const pal_data* pal, const jed_data* jed);
	348	#if defined(ricoh_pals)
	349	static void config_epl10p8_pins(const pal_data* pal, const jed_data* jed);
	350	static void config_epl12p6_pins(const pal_data* pal, const jed_data* jed);
	351	static void config_epl14p4_pins(const pal_data* pal, const jed_data* jed);
	352	static void config_epl16p2_pins(const pal_data* pal, const jed_data* jed);
	353	static void config_epl16p8_pins(const pal_data* pal, const jed_data* jed);
	354	static void config_epl16rp8_pins(const pal_data* pal, const jed_data* jed);
	355	static void config_epl16rp6_pins(const pal_data* pal, const jed_data* jed);
	356	static void config_epl16rp4_pins(const pal_data* pal, const jed_data* jed);
	357	#endif
	358	static void config_pal10p8_pins(const pal_data* pal, const jed_data* jed);
	359	static void config_pal12p6_pins(const pal_data* pal, const jed_data* jed);
	360	static void config_pal14p4_pins(const pal_data* pal, const jed_data* jed);
	361	static void config_pal16p2_pins(const pal_data* pal, const jed_data* jed);
	362	static void config_pal16p8_pins(const pal_data* pal, const jed_data* jed);
	363	static void config_pal16rp4_pins(const pal_data* pal, const jed_data* jed);
	364	static void config_pal16rp6_pins(const pal_data* pal, const jed_data* jed);
	365	static void config_pal16rp8_pins(const pal_data* pal, const jed_data* jed);
	366	static void config_pal6l16_pins(const pal_data* pal, const jed_data* jed);
	367	static void config_pal8l14_pins(const pal_data* pal, const jed_data* jed);
	368	static void config_pal12h10_pins(const pal_data* pal, const jed_data* jed);
	369	static void config_pal12l10_pins(const pal_data* pal, const jed_data* jed);
	370	static void config_pal14h8_pins(const pal_data* pal, const jed_data* jed);
	371	static void config_pal14l8_pins(const pal_data* pal, const jed_data* jed);
	372	static void config_pal16h6_pins(const pal_data* pal, const jed_data* jed);
	373	static void config_pal16l6_pins(const pal_data* pal, const jed_data* jed);
	374	static void config_pal18h4_pins(const pal_data* pal, const jed_data* jed);
	375	static void config_pal18l4_pins(const pal_data* pal, const jed_data* jed);
	376	static void config_pal20c1_pins(const pal_data* pal, const jed_data* jed);
	377	static void config_pal20l2_pins(const pal_data* pal, const jed_data* jed);
266	378
267	379
268	380
r26289	r26290
391	503	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};    /* Registered Output */
392	504
393	505	static pin_fuse_rows palce16v8pinfuserows[] = {
394		{12, 1792, 1824, 2016},
395		{13, 1536, 1568, 1760},
396		{14, 1280, 1312, 1504},
397		{15, 1024, 1056, 1248},
398		{16, 768, 800, 992},
399		{17, 512, 544, 736},
400		{18, 256, 288, 480},
401		{19, 0, 32, 224}};
	506	{12, 0, 0, 0},
	507	{13, 0, 0, 0},
	508	{14, 0, 0, 0},
	509	{15, 0, 0, 0},
	510	{16, 0, 0, 0},
	511	{17, 0, 0, 0},
	512	{18, 0, 0, 0},
	513	{19, 0, 0, 0}};
402	514
403	515	static pin_fuse_rows gal16v8pinfuserows[] = {
404	516	{12, 0, 0, 0},
r26289	r26290
544	656	{18, 1024, 0, 0},
545	657	{19, 1060, 0, 0}};
546	658
	659	#if defined(ricoh_pals)
	660	static pin_fuse_rows epl10p8pinfuserows[] = {
	661	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 560, 620},
	662	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 480, 540},
	663	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 400, 460},
	664	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 380},
	665	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 300},
	666	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 220},
	667	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 140},
	668	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 60}};
	669
	670	static pin_fuse_rows epl12p6pinfuserows[] = {
	671	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 576, 744},
	672	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 480, 552},
	673	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 456},
	674	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 360},
	675	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 264},
	676	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 168}};
	677
	678	static pin_fuse_rows epl14p4pinfuserows[] = {
	679	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 672, 868},
	680	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 644},
	681	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 420},
	682	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 196}};
	683
	684	static pin_fuse_rows epl16p2pinfuserows[] = {
	685	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 992},
	686	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 480}};
	687
	688	static pin_fuse_rows epl16p8pinfuserows[] = {
	689	{12, 1792, 1824, 2016},
	690	{13, 1536, 1568, 1760},
	691	{14, 1280, 1312, 1504},
	692	{15, 1024, 1056, 1248},
	693	{16, 768, 800, 992},
	694	{17, 512, 544, 736},
	695	{18, 256, 288, 480},
	696	{19, 0, 32, 224}};
	697
	698	static pin_fuse_rows epl16rp8pinfuserows[] = {
	699	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016}, /* Registered Output */
	700	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
	701	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	702	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	703	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	704	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
	705	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},   /* Registered Output */
	706	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};    /* Registered Output */
	707
	708	static pin_fuse_rows epl16rp6pinfuserows[] = {
	709	{12, 1792, 1824, 2016},
	710	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
	711	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	712	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	713	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	714	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
	715	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},   /* Registered Output */
	716	{19, 0, 32, 224}};
	717
	718	static pin_fuse_rows epl16rp4pinfuserows[] = {
	719	{12, 1792, 1824, 2016},
	720	{13, 1536, 1568, 1760},
	721	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	722	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	723	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	724	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
	725	{18, 256, 288, 480},
	726	{19, 0, 32, 224}};
	727	#endif
	728
	729	static pin_fuse_rows pal10p8pinfuserows[] = {
	730	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 300},
	731	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 260},
	732	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 200, 220},
	733	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 180},
	734	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 120, 140},
	735	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 100},
	736	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 40, 60},
	737	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 20}};
	738
	739	static pin_fuse_rows pal12p6pinfuserows[] = {
	740	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 360},
	741	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
	742	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
	743	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
	744	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
	745	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 72}};
	746
	747	static pin_fuse_rows pal14p4pinfuserows[] = {
	748	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 420},
	749	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 308},
	750	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 196},
	751	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
	752
	753	static pin_fuse_rows pal16p2pinfuserows[] = {
	754	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
	755	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
	756
	757	static pin_fuse_rows pal16p8pinfuserows[] = {
	758	{12, 1792, 1824, 2016},
	759	{13, 1536, 1568, 1760},
	760	{14, 1280, 1312, 1504},
	761	{15, 1024, 1056, 1248},
	762	{16, 768, 800, 992},
	763	{17, 512, 544, 736},
	764	{18, 256, 288, 480},
	765	{19, 0, 32, 224}};
	766
	767	static pin_fuse_rows pal16rp4pinfuserows[] = {
	768	{12, 1792, 1824, 2016},
	769	{13, 1536, 1568, 1760},
	770	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	771	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	772	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	773	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
	774	{18, 256, 288, 480},
	775	{19, 0, 32, 224}};
	776
	777	static pin_fuse_rows pal16rp6pinfuserows[] = {
	778	{12, 1792, 1824, 2016},
	779	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
	780	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	781	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	782	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	783	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
	784	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},   /* Registered Output */
	785	{19, 0, 32, 224}};
	786
	787	static pin_fuse_rows pal16rp8pinfuserows[] = {
	788	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016}, /* Registered Output */
	789	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
	790	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	791	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	792	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	793	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
	794	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},   /* Registered Output */
	795	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};    /* Registered Output */
	796
	797	static pin_fuse_rows pal6l16pinfuserows[] = {
	798	{1, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	799	{2, NO_OUTPUT_ENABLE_FUSE_ROW, 24, 24},
	800	{3, NO_OUTPUT_ENABLE_FUSE_ROW, 36, 36},
	801	{10, NO_OUTPUT_ENABLE_FUSE_ROW, 132, 132},
	802	{11, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 168},
	803	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 180, 180},
	804	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 156, 156},
	805	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 144},
	806	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 120, 120},
	807	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 108, 108},
	808	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 96},
	809	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 84, 84},
	810	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 72, 72},
	811	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 60, 60},
	812	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 48},
	813	{23, NO_OUTPUT_ENABLE_FUSE_ROW, 12, 12}};
	814
	815	static pin_fuse_rows pal8l14pinfuserows[] = {
	816	{1, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	817	{2, NO_OUTPUT_ENABLE_FUSE_ROW, 32, 32},
	818	{11, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 192},
	819	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 208, 208},
	820	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 176, 176},
	821	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 160},
	822	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 144},
	823	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 128},
	824	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 112},
	825	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 96},
	826	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 80},
	827	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 64, 64},
	828	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 48},
	829	{23, NO_OUTPUT_ENABLE_FUSE_ROW, 16, 16}};
	830
	831	static pin_fuse_rows pal12h10pinfuserows[] = {
	832	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 432, 456},
	833	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 408},
	834	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 360},
	835	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 312},
	836	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
	837	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
	838	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
	839	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
	840	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 72},
	841	{23, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 24}};
	842
	843	static pin_fuse_rows pal12l10pinfuserows[] = {
	844	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 432, 456},
	845	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 408},
	846	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 360},
	847	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 312},
	848	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
	849	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
	850	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
	851	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
	852	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 72},
	853	{23, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 24}};
	854
	855	static pin_fuse_rows pal14h8pinfuserows[] = {
	856	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 532},
	857	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 392, 420},
	858	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 364},
	859	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 308},
	860	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 252},
	861	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 196},
	862	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 140},
	863	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
	864
	865	static pin_fuse_rows pal14l8pinfuserows[] = {
	866	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 532},
	867	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 392, 420},
	868	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 364},
	869	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 308},
	870	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 252},
	871	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 196},
	872	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 140},
	873	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
	874
	875	static pin_fuse_rows pal16h6pinfuserows[] = {
	876	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 608},
	877	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 480},
	878	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 352},
	879	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 288},
	880	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 224},
	881	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 96}};
	882
	883	static pin_fuse_rows pal16l6pinfuserows[] = {
	884	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 608},
	885	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 480},
	886	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 352},
	887	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 288},
	888	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 224},
	889	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 96}};
	890
	891	static pin_fuse_rows pal18h4pinfuserows[] = {
	892	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 504, 684},
	893	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 360, 468},
	894	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 216, 324},
	895	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 180}};
	896
	897	static pin_fuse_rows pal18l4pinfuserows[] = {
	898	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 504, 684},
	899	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 360, 468},
	900	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 216, 324},
	901	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 180}};
	902
	903	static pin_fuse_rows pal20c1pinfuserows[] = {
	904	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280},
	905	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600}};
	906
	907	static pin_fuse_rows pal20l2pinfuserows[] = {
	908	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600},
	909	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280}};
	910
547	911	static pin_fuse_columns pal10l8pinfusecolumns[] = {
548	912	{1, 3, 2},
549	913	{2, 1, 0},
r26289	r26290
1047	1411	{18, 33, 32},
1048	1412	{19, 35, 34}};
1049	1413
	1414	#if defined(ricoh_pals)
	1415	static pin_fuse_columns epl10p8pinfusecolumns[] = {
	1416	{1,  3,  2},
	1417	{2,  1,  0},
	1418	{3,  5,  4},
	1419	{4,  7,  6},
	1420	{5,  9,  8},
	1421	{6,  11, 10},
	1422	{7,  13, 12},
	1423	{8,  15, 14},
	1424	{9,  17, 16},
	1425	{11, 19, 18}};
	1426
	1427	static pin_fuse_columns epl12p6pinfusecolumns[] = {
	1428	{1,  3,  2},
	1429	{2,  1,  0},
	1430	{3,  5,  4},
	1431	{4,  9,  8},
	1432	{5,  11, 10},
	1433	{6,  13, 12},
	1434	{7,  15, 14},
	1435	{8,  17, 16},
	1436	{9,  19, 18},
	1437	{11, 21, 20},
	1438	{12, 19, 18},
	1439	{19, 7,  6}};
	1440
	1441	static pin_fuse_columns epl14p4pinfusecolumns[] = {
	1442	{1,  3,  2},
	1443	{2,  1,  0},
	1444	{3,  5,  4},
	1445	{4,  9,  8},
	1446	{5,  13, 12},
	1447	{6,  15, 14},
	1448	{7,  17, 16},
	1449	{8,  21, 20},
	1450	{9,  25, 24},
	1451	{11, 27, 26},
	1452	{12, 23, 22},
	1453	{13, 19, 18},
	1454	{18, 11, 10},
	1455	{19, 7,  6}};
	1456
	1457	static pin_fuse_columns epl16p2pinfusecolumns[] = {
	1458	{1,  3,  2},
	1459	{2,  1,  0},
	1460	{3,  5,  4},
	1461	{4,  9,  8},
	1462	{5,  13, 12},
	1463	{6,  17, 16},
	1464	{7,  21, 20},
	1465	{8,  25, 24},
	1466	{9,  29, 28},
	1467	{11, 31, 30},
	1468	{12, 27, 26},
	1469	{13, 23, 22},
	1470	{14, 19, 18},
	1471	{17, 15, 14},
	1472	{18, 11, 10},
	1473	{19, 7,  6}};
	1474
	1475	static pin_fuse_columns epl16p8pinfusecolumns[] = {
	1476	{1,  3,  2},
	1477	{2,  1,  0},
	1478	{3,  5,  4},
	1479	{4,  9,  8},
	1480	{5,  13, 12},
	1481	{6,  17, 16},
	1482	{7,  21, 20},
	1483	{8,  25, 24},
	1484	{9,  29, 28},
	1485	{11, 31, 30},
	1486	{13, 27, 26},
	1487	{14, 23, 22},
	1488	{15, 19, 18},
	1489	{16, 15, 14},
	1490	{17, 11, 10},
	1491	{18, 7,  6}};
	1492
	1493	static pin_fuse_columns epl16rp8pinfusecolumns[] = {
	1494	{2,  1,  0},
	1495	{3,  5,  4},
	1496	{4,  9,  8},
	1497	{5,  13, 12},
	1498	{6,  17, 16},
	1499	{7,  21, 20},
	1500	{8,  25, 24},
	1501	{9,  29, 28},
	1502	{12, 31, 30},
	1503	{13, 27, 26},
	1504	{14, 23, 22},
	1505	{15, 19, 18},
	1506	{16, 15, 14},
	1507	{17, 11, 10},
	1508	{18, 7,  6},
	1509	{19, 3,  2}};
	1510
	1511	static pin_fuse_columns epl16rp6pinfusecolumns[] = {
	1512	{2,  1,  0},
	1513	{3,  5,  4},
	1514	{4,  9,  8},
	1515	{5,  13, 12},
	1516	{6,  17, 16},
	1517	{7,  21, 20},
	1518	{8,  25, 24},
	1519	{9,  29, 28},
	1520	{12, 31, 30},
	1521	{13, 27, 26},
	1522	{14, 23, 22},
	1523	{15, 19, 18},
	1524	{16, 15, 14},
	1525	{17, 11, 10},
	1526	{18, 7,  6},
	1527	{19, 3,  2}};
	1528
	1529	static pin_fuse_columns epl16rp4pinfusecolumns[] = {
	1530	{2,  1,  0},
	1531	{3,  5,  4},
	1532	{4,  9,  8},
	1533	{5,  13, 12},
	1534	{6,  17, 16},
	1535	{7,  21, 20},
	1536	{8,  25, 24},
	1537	{9,  29, 28},
	1538	{12, 31, 30},
	1539	{13, 27, 26},
	1540	{18, 7,  6},
	1541	{19, 3,  2}};
	1542	#endif
	1543
	1544	static pin_fuse_columns pal10p8pinfusecolumns[] = {
	1545	{1, 3, 2},
	1546	{2, 1, 0},
	1547	{3, 5, 4},
	1548	{4, 7, 6},
	1549	{5, 9, 8},
	1550	{6, 11, 10},
	1551	{7, 13, 12},
	1552	{8, 15, 14},
	1553	{9, 17, 16},
	1554	{11, 19, 18}};
	1555
	1556	static pin_fuse_columns pal12p6pinfusecolumns[] = {
	1557	{1, 3, 2},
	1558	{2, 1, 0},
	1559	{3, 5, 4},
	1560	{4, 9, 8},
	1561	{5, 11, 10},
	1562	{6, 13, 12},
	1563	{7, 15, 14},
	1564	{8, 17, 16},
	1565	{9, 21, 20},
	1566	{11, 23, 22},
	1567	{12, 19, 18},
	1568	{19, 7, 6}};
	1569
	1570	static pin_fuse_columns pal14p4pinfusecolumns[] = {
	1571	{1, 3, 2},
	1572	{2, 1, 0},
	1573	{3, 5, 4},
	1574	{4, 9, 8},
	1575	{5, 13, 12},
	1576	{6, 15, 14},
	1577	{7, 17, 16},
	1578	{8, 21, 20},
	1579	{9, 25, 24},
	1580	{11, 27, 26},
	1581	{12, 23, 22},
	1582	{13, 19, 18},
	1583	{18, 11, 10},
	1584	{19, 7, 6}};
	1585
	1586	static pin_fuse_columns pal16p2pinfusecolumns[] = {
	1587	{1, 3, 2},
	1588	{2, 1, 0},
	1589	{3, 5, 4},
	1590	{4, 9, 8},
	1591	{5, 13, 12},
	1592	{6, 17, 16},
	1593	{7, 21, 20},
	1594	{8, 25, 24},
	1595	{9, 29, 28},
	1596	{11, 31, 30},
	1597	{12, 27, 26},
	1598	{13, 23, 22},
	1599	{14, 19, 18},
	1600	{17, 15, 14},
	1601	{18, 11, 10},
	1602	{19, 7, 6}};
	1603
	1604	static pin_fuse_columns pal16p8pinfusecolumns[] = {
	1605	{1, 3, 2},
	1606	{2, 1, 0},
	1607	{3, 5, 4},
	1608	{4, 9, 8},
	1609	{5, 13, 12},
	1610	{6, 17, 16},
	1611	{7, 21, 20},
	1612	{8, 25, 24},
	1613	{9, 29, 28},
	1614	{11, 31, 30},
	1615	{13, 27, 26},
	1616	{14, 23, 22},
	1617	{15, 19, 18},
	1618	{16, 15, 14},
	1619	{17, 11, 10},
	1620	{18, 7, 6}};
	1621
	1622	static pin_fuse_columns pal16rp4pinfusecolumns[] = {
	1623	{2, 1, 0},
	1624	{3, 5, 4},
	1625	{4, 9, 8},
	1626	{5, 13, 12},
	1627	{6, 17, 16},
	1628	{7, 21, 20},
	1629	{8, 25, 24},
	1630	{9, 29, 28},
	1631	{12, 31, 30},
	1632	{13, 27, 26},
	1633	{14, 23, 22}, /* Registered Output */
	1634	{15, 19, 18}, /* Registered Output */
	1635	{16, 15, 14}, /* Registered Output */
	1636	{17, 11, 10}, /* Registered Output */
	1637	{18, 7, 6},
	1638	{19, 3, 2}};
	1639
	1640	static pin_fuse_columns pal16rp6pinfusecolumns[] = {
	1641	{2, 1, 0},
	1642	{3, 5, 4},
	1643	{4, 9, 8},
	1644	{5, 13, 12},
	1645	{6, 17, 16},
	1646	{7, 21, 20},
	1647	{8, 25, 24},
	1648	{9, 29, 28},
	1649	{12, 31, 30},
	1650	{13, 27, 26}, /* Registered Output */
	1651	{14, 23, 22}, /* Registered Output */
	1652	{15, 19, 18}, /* Registered Output */
	1653	{16, 15, 14}, /* Registered Output */
	1654	{17, 11, 10}, /* Registered Output */
	1655	{18, 7, 6},   /* Registered Output */
	1656	{19, 3, 2}};
	1657
	1658	static pin_fuse_columns pal16rp8pinfusecolumns[] = {
	1659	{2, 1, 0},
	1660	{3, 5, 4},
	1661	{4, 9, 8},
	1662	{5, 13, 12},
	1663	{6, 17, 16},
	1664	{7, 21, 20},
	1665	{8, 25, 24},
	1666	{9, 29, 28},
	1667	{12, 31, 30}, /* Registered Output */
	1668	{13, 27, 26}, /* Registered Output */
	1669	{14, 23, 22}, /* Registered Output */
	1670	{15, 19, 18}, /* Registered Output */
	1671	{16, 15, 14}, /* Registered Output */
	1672	{17, 11, 10}, /* Registered Output */
	1673	{18, 7, 6},   /* Registered Output */
	1674	{19, 3, 2}};  /* Registered Output */
	1675
	1676	static pin_fuse_columns pal6l16pinfusecolumns[] = {
	1677	{4, 1, 0},
	1678	{5, 3, 2},
	1679	{6, 5, 4},
	1680	{7, 7, 6},
	1681	{8, 9, 8},
	1682	{9, 11, 10}};
	1683
	1684	static pin_fuse_columns pal8l14pinfusecolumns[] = {
	1685	{3, 1, 0},
	1686	{4, 3, 2},
	1687	{5, 5, 4},
	1688	{6, 7, 6},
	1689	{7, 9, 8},
	1690	{8, 11, 10},
	1691	{9, 13, 12},
	1692	{10, 15, 14}};
	1693
	1694	static pin_fuse_columns pal12h10pinfusecolumns[] = {
	1695	{1, 3, 2},
	1696	{2, 1, 0},
	1697	{3, 5, 4},
	1698	{4, 7, 6},
	1699	{5, 9, 8},
	1700	{6, 11, 10},
	1701	{7, 13, 12},
	1702	{8, 15, 14},
	1703	{9, 17, 16},
	1704	{10, 19, 18},
	1705	{11, 21, 20},
	1706	{13, 23, 22}};
	1707
	1708	static pin_fuse_columns pal12l10pinfusecolumns[] = {
	1709	{1, 3, 2},
	1710	{2, 1, 0},
	1711	{3, 5, 4},
	1712	{4, 7, 6},
	1713	{5, 9, 8},
	1714	{6, 11, 10},
	1715	{7, 13, 12},
	1716	{8, 15, 14},
	1717	{9, 17, 16},
	1718	{10, 19, 18},
	1719	{11, 21, 20},
	1720	{13, 23, 22}};
	1721
	1722	static pin_fuse_columns pal14h8pinfusecolumns[] = {
	1723	{1, 3, 2},
	1724	{2, 1, 0},
	1725	{3, 5, 4},
	1726	{4, 9, 8},
	1727	{5, 11, 10},
	1728	{6, 13, 12},
	1729	{7, 15, 14},
	1730	{8, 17, 16},
	1731	{9, 19, 18},
	1732	{10, 21, 20},
	1733	{11, 25, 24},
	1734	{13, 27, 26},
	1735	{14, 23, 22},
	1736	{23, 7, 6}};
	1737
	1738	static pin_fuse_columns pal14l8pinfusecolumns[] = {
	1739	{1, 3, 2},
	1740	{2, 1, 0},
	1741	{3, 5, 4},
	1742	{4, 9, 8},
	1743	{5, 11, 10},
	1744	{6, 13, 12},
	1745	{7, 15, 14},
	1746	{8, 17, 16},
	1747	{9, 19, 18},
	1748	{10, 21, 20},
	1749	{11, 25, 24},
	1750	{13, 27, 26},
	1751	{14, 23, 22},
	1752	{23, 7, 6}};
	1753
	1754	static pin_fuse_columns pal16h6pinfusecolumns[] = {
	1755	{1, 3, 2},
	1756	{2, 1, 0},
	1757	{3, 5, 4},
	1758	{4, 9, 8},
	1759	{5, 13, 12},
	1760	{6, 15, 14},
	1761	{7, 17, 16},
	1762	{8, 19, 18},
	1763	{9, 21, 20},
	1764	{10, 25, 24},
	1765	{11, 29, 28},
	1766	{13, 31, 30},
	1767	{14, 27, 26},
	1768	{15, 23, 22},
	1769	{22, 11, 10},
	1770	{23, 7, 6}};
	1771
	1772	static pin_fuse_columns pal16l6pinfusecolumns[] = {
	1773	{1, 3, 2},
	1774	{2, 1, 0},
	1775	{3, 5, 4},
	1776	{4, 9, 8},
	1777	{5, 13, 12},
	1778	{6, 15, 14},
	1779	{7, 17, 16},
	1780	{8, 19, 18},
	1781	{9, 21, 20},
	1782	{10, 25, 24},
	1783	{11, 29, 28},
	1784	{13, 31, 30},
	1785	{14, 27, 26},
	1786	{15, 23, 22},
	1787	{22, 11, 10},
	1788	{23, 7, 6}};
	1789
	1790	static pin_fuse_columns pal18h4pinfusecolumns[] = {
	1791	{1, 3, 2},
	1792	{2, 1, 0},
	1793	{3, 5, 4},
	1794	{4, 9, 8},
	1795	{5, 13, 12},
	1796	{6, 17, 16},
	1797	{7, 19, 18},
	1798	{8, 21, 20},
	1799	{9, 25, 24},
	1800	{10, 29, 28},
	1801	{11, 33, 32},
	1802	{13, 35, 34},
	1803	{14, 31, 30},
	1804	{15, 27, 26},
	1805	{16, 23, 22},
	1806	{21, 15, 14},
	1807	{22, 11, 10},
	1808	{23, 7, 6}};
	1809
	1810	static pin_fuse_columns pal18l4pinfusecolumns[] = {
	1811	{1, 3, 2},
	1812	{2, 1, 0},
	1813	{3, 5, 4},
	1814	{4, 9, 8},
	1815	{5, 13, 12},
	1816	{6, 17, 16},
	1817	{7, 19, 18},
	1818	{8, 21, 20},
	1819	{9, 25, 24},
	1820	{10, 29, 28},
	1821	{11, 33, 32},
	1822	{13, 35, 34},
	1823	{14, 31, 30},
	1824	{15, 27, 26},
	1825	{16, 23, 22},
	1826	{21, 15, 14},
	1827	{22, 11, 10},
	1828	{23, 7, 6}};
	1829
	1830	static pin_fuse_columns pal20c1pinfusecolumns[] = {
	1831	{1, 3, 2},
	1832	{2, 1, 0},
	1833	{3, 5, 4},
	1834	{4, 9, 8},
	1835	{5, 13, 12},
	1836	{6, 17, 16},
	1837	{7, 21, 20},
	1838	{8, 25, 24},
	1839	{9, 29, 28},
	1840	{10, 33, 32},
	1841	{11, 37, 36},
	1842	{13, 39, 38},
	1843	{14, 35, 34},
	1844	{15, 31, 30},
	1845	{16, 27, 26},
	1846	{17, 23, 22},
	1847	{20, 19, 18},
	1848	{21, 15, 14},
	1849	{22, 11, 10},
	1850	{23, 7, 6}};
	1851
	1852	static pin_fuse_columns pal20l2pinfusecolumns[] = {
	1853	{1, 3, 2},
	1854	{2, 1, 0},
	1855	{3, 5, 4},
	1856	{4, 9, 8},
	1857	{5, 13, 12},
	1858	{6, 17, 16},
	1859	{7, 21, 20},
	1860	{8, 25, 24},
	1861	{9, 29, 28},
	1862	{10, 33, 32},
	1863	{11, 37, 36},
	1864	{13, 39, 38},
	1865	{14, 35, 34},
	1866	{15, 31, 30},
	1867	{16, 27, 26},
	1868	{17, 23, 22},
	1869	{20, 19, 18},
	1870	{21, 15, 14},
	1871	{22, 11, 10},
	1872	{23, 7, 6}};
	1873
1050	1874	static pal_data paldata[] = {
1051		{"PAL10L8",
	1875	{"PAL10L8", 320,
1052	1876	pal10l8pinfuserows, ARRAY_LEN(pal10l8pinfuserows),
1053	1877	pal10l8pinfusecolumns, ARRAY_LEN(pal10l8pinfusecolumns),
1054	1878	print_pal10l8_product_terms,
1055	1879	config_pal10l8_pins,
1056	1880	NULL,
1057	1881	NULL},
1058		{"PAL10H8",
	1882	{"PAL10H8", 320,
1059	1883	pal10h8pinfuserows, ARRAY_LEN(pal10h8pinfuserows),
1060	1884	pal10h8pinfusecolumns, ARRAY_LEN(pal10h8pinfusecolumns),
1061	1885	print_pal10h8_product_terms,
1062	1886	config_pal10h8_pins,
1063	1887	NULL,
1064	1888	NULL},
1065		{"PAL12H6",
	1889	{"PAL12H6", 384,
1066	1890	pal12h6pinfuserows, ARRAY_LEN(pal12h6pinfuserows),
1067	1891	pal12h6pinfusecolumns, ARRAY_LEN(pal12h6pinfusecolumns),
1068	1892	print_pal12h6_product_terms,
1069	1893	config_pal12h6_pins,
1070	1894	NULL,
1071	1895	NULL},
1072		{"PAL14H4",
	1896	{"PAL14H4", 448,
1073	1897	pal14h4pinfuserows, ARRAY_LEN(pal14h4pinfuserows),
1074	1898	pal14h4pinfusecolumns, ARRAY_LEN(pal14h4pinfusecolumns),
1075	1899	print_pal14h4_product_terms,
1076	1900	config_pal14h4_pins,
1077	1901	NULL,
1078	1902	NULL},
1079		{"PAL16H2",
	1903	{"PAL16H2", 512,
1080	1904	pal16h2pinfuserows, ARRAY_LEN(pal16h2pinfuserows),
1081	1905	pal16h2pinfusecolumns, ARRAY_LEN(pal16h2pinfusecolumns),
1082	1906	print_pal16h2_product_terms,
1083	1907	config_pal16h2_pins,
1084	1908	NULL,
1085	1909	NULL},
1086		{"PAL16C1",
	1910	{"PAL16C1", 512,
1087	1911	pal16c1pinfuserows, ARRAY_LEN(pal16c1pinfuserows),
1088	1912	pal16c1pinfusecolumns, ARRAY_LEN(pal16c1pinfusecolumns),
1089	1913	print_pal16c1_product_terms,
1090	1914	config_pal16c1_pins,
1091	1915	NULL,
1092	1916	NULL},
1093		{"PAL12L6",
	1917	{"PAL12L6", 384,
1094	1918	pal12l6pinfuserows, ARRAY_LEN(pal12l6pinfuserows),
1095	1919	pal12l6pinfusecolumns, ARRAY_LEN(pal12l6pinfusecolumns),
1096	1920	print_pal12l6_product_terms,
1097	1921	config_pal12l6_pins,
1098	1922	NULL,
1099	1923	NULL},
1100		{"PAL14L4",
	1924	{"PAL14L4", 448,
1101	1925	pal14l4pinfuserows, ARRAY_LEN(pal14l4pinfuserows),
1102	1926	pal14l4pinfusecolumns, ARRAY_LEN(pal14l4pinfusecolumns),
1103	1927	print_pal14l4_product_terms,
1104	1928	config_pal14l4_pins,
1105	1929	NULL,
1106	1930	NULL},
1107		{"PAL16L2",
	1931	{"PAL16L2", 512,
1108	1932	pal16l2pinfuserows, ARRAY_LEN(pal16l2pinfuserows),
1109	1933	pal16l2pinfusecolumns, ARRAY_LEN(pal16l2pinfusecolumns),
1110	1934	print_pal16l2_product_terms,
1111	1935	config_pal16l2_pins,
1112	1936	NULL,
1113	1937	NULL},
1114		/*{"15S8", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
1115		{"PAL16L8",
	1938	/*{"15S8", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
	1939	{"PAL16L8", 2048,
1116	1940	pal16l8pinfuserows, ARRAY_LEN(pal16l8pinfuserows),
1117	1941	pal16l8pinfusecolumns, ARRAY_LEN(pal16l8pinfusecolumns),
1118	1942	print_pal16l8_product_terms,
1119	1943	config_pal16l8_pins,
1120	1944	NULL,
1121	1945	NULL},
1122		{"PAL16R4",
	1946	{"PAL16R4", 2048,
1123	1947	pal16r4pinfuserows, ARRAY_LEN(pal16r4pinfuserows),
1124	1948	pal16r4pinfusecolumns, ARRAY_LEN(pal16r4pinfusecolumns),
1125	1949	print_pal16r4_product_terms,
1126	1950	config_pal16r4_pins,
1127	1951	NULL,
1128	1952	NULL},
1129		{"PAL16R6",
	1953	{"PAL16R6", 2048,
1130	1954	pal16r6pinfuserows, ARRAY_LEN(pal16r6pinfuserows),
1131	1955	pal16r6pinfusecolumns, ARRAY_LEN(pal16r6pinfusecolumns),
1132	1956	print_pal16r6_product_terms,
1133	1957	config_pal16r6_pins,
1134	1958	NULL,
1135	1959	NULL},
1136		{"PAL16R8",
	1960	{"PAL16R8", 2048,
1137	1961	pal16r8pinfuserows, ARRAY_LEN(pal16r8pinfuserows),
1138	1962	pal16r8pinfusecolumns, ARRAY_LEN(pal16r8pinfusecolumns),
1139	1963	print_pal16r8_product_terms,
1140	1964	config_pal16r8_pins,
1141	1965	NULL,
1142	1966	NULL},
1143		/*{"PAL16RA8", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1144		{"PAL16V8R", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
1145		{"PALCE16V8",
	1967	/*{"PAL16RA8", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	1968	{"PAL16V8R", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
	1969	{"PALCE16V8", 2194,
1146	1970	palce16v8pinfuserows, ARRAY_LEN(palce16v8pinfuserows),
1147	1971	palce16v8pinfusecolumns, ARRAY_LEN(palce16v8pinfusecolumns),
1148	1972	print_palce16v8_product_terms,
1149	1973	config_palce16v8_pins,
1150	1974	NULL,
1151	1975	NULL},
1152		{"GAL16V8",
	1976	{"GAL16V8", 2194,
1153	1977	gal16v8pinfuserows, ARRAY_LEN(gal16v8pinfuserows),
1154	1978	gal16v8pinfusecolumns, ARRAY_LEN(gal16v8pinfusecolumns),
1155	1979	print_gal16v8_product_terms,
1156	1980	config_gal16v8_pins,
1157	1981	is_gal16v8_product_term_enabled,
1158	1982	NULL},
1159		{"18CV8",
	1983	{"18CV8", 2696,
1160	1984	peel18cv8pinfuserows, ARRAY_LEN(peel18cv8pinfuserows),
1161	1985	peel18cv8pinfusecolumns, ARRAY_LEN(peel18cv8pinfusecolumns),
1162	1986	print_peel18cv8_product_terms,
1163	1987	config_peel18cv8_pins,
1164	1988	NULL,
1165	1989	get_peel18cv8_pin_fuse_state},
1166		{"GAL18V10",
	1990	{"GAL18V10", 3540,
1167	1991	gal18v10pinfuserows, ARRAY_LEN(gal18v10pinfuserows),
1168	1992	gal18v10pinfusecolumns, ARRAY_LEN(gal18v10pinfusecolumns),
1169	1993	print_gal18v10_product_terms,
1170	1994	config_gal18v10_pins,
1171	1995	NULL,
1172	1996	NULL},
1173		{"PAL20L8",
	1997	{"PAL20L8", 2560,
1174	1998	pal20l8pinfuserows, ARRAY_LEN(pal20l8pinfuserows),
1175	1999	pal20l8pinfusecolumns, ARRAY_LEN(pal20l8pinfusecolumns),
1176	2000	print_pal20l8_product_terms,
1177	2001	config_pal20l8_pins,
1178	2002	NULL,
1179	2003	NULL},
1180		{"PAL20L10",
	2004	{"PAL20L10", 1600,
1181	2005	pal20l10pinfuserows, ARRAY_LEN(pal20l10pinfuserows),
1182	2006	pal20l10pinfusecolumns, ARRAY_LEN(pal20l10pinfusecolumns),
1183	2007	print_pal20l10_product_terms,
1184	2008	config_pal20l10_pins,
1185	2009	NULL,
1186	2010	NULL},
1187		{"PAL20R4",
	2011	{"PAL20R4", 2560,
1188	2012	pal20r4pinfuserows, ARRAY_LEN(pal20r4pinfuserows),
1189	2013	pal20r4pinfusecolumns, ARRAY_LEN(pal20r4pinfusecolumns),
1190	2014	print_pal20r4_product_terms,
1191	2015	config_pal20r4_pins,
1192	2016	NULL,
1193	2017	NULL},
1194		{"PAL20R6",
	2018	{"PAL20R6", 2560,
1195	2019	pal20r6pinfuserows, ARRAY_LEN(pal20r6pinfuserows),
1196	2020	pal20r6pinfusecolumns, ARRAY_LEN(pal20r6pinfusecolumns),
1197	2021	print_pal20r6_product_terms,
1198	2022	config_pal20r6_pins,
1199	2023	NULL,
1200	2024	NULL},
1201		{"PAL20R8",
	2025	{"PAL20R8", 2560,
1202	2026	pal20r8pinfuserows, ARRAY_LEN(pal20r8pinfuserows),
1203	2027	pal20r8pinfusecolumns, ARRAY_LEN(pal20r8pinfusecolumns),
1204	2028	print_pal20r8_product_terms,
1205	2029	config_pal20r8_pins,
1206	2030	NULL,
1207	2031	NULL},
1208		{"PAL20X4",
	2032	{"PAL20X4", 1600,
1209	2033	pal20x4pinfuserows, ARRAY_LEN(pal20x4pinfuserows),
1210	2034	pal20x4pinfusecolumns, ARRAY_LEN(pal20x4pinfusecolumns),
1211	2035	print_pal20x4_product_terms,
1212	2036	config_pal20x4_pins,
1213	2037	NULL,
1214	2038	NULL},
1215		{"PAL20X8",
	2039	{"PAL20X8", 1600,
1216	2040	pal20x8pinfuserows, ARRAY_LEN(pal20x8pinfuserows),
1217	2041	pal20x8pinfusecolumns, ARRAY_LEN(pal20x8pinfusecolumns),
1218	2042	print_pal20x8_product_terms,
1219	2043	config_pal20x8_pins,
1220	2044	NULL,
1221	2045	NULL},
1222		{"PAL20X10",
	2046	{"PAL20X10", 1600,
1223	2047	pal20x10pinfuserows, ARRAY_LEN(pal20x10pinfuserows),
1224	2048	pal20x10pinfusecolumns, ARRAY_LEN(pal20x10pinfusecolumns),
1225	2049	print_pal20x10_product_terms,
1226	2050	config_pal20x10_pins,
1227	2051	NULL,
1228	2052	NULL},
1229		/*{"PAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1230		{"GAL20V8A", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1231		{"GAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1232		{"PLS100", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
1233		{"82S153",
	2053	/*{"PAL22V10", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	2054	{"GAL20V8A", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	2055	{"GAL22V10", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	2056	{"PLS100", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
	2057	{"82S153", 1842,
1234	2058	_82s153_pls153pinfuserows, ARRAY_LEN(_82s153_pls153pinfuserows),
1235	2059	_82s153_pls153pinfusecolumns, ARRAY_LEN(_82s153_pls153pinfusecolumns),
1236	2060	print_82s153_pls153_product_terms,
1237	2061	config_82s153_pls153_pins,
1238	2062	NULL,
1239	2063	NULL},
1240		{"PLS153",
	2064	{"PLS153", 1842,
1241	2065	_82s153_pls153pinfuserows, ARRAY_LEN(_82s153_pls153pinfuserows),
1242	2066	_82s153_pls153pinfusecolumns, ARRAY_LEN(_82s153_pls153pinfusecolumns),
1243	2067	print_82s153_pls153_product_terms,
1244	2068	config_82s153_pls153_pins,
1245	2069	NULL,
1246	2070	NULL},
1247		{"CK2605",
	2071	{"CK2605", 1106,
1248	2072	ck2605pinfuserows, ARRAY_LEN(ck2605pinfuserows),
1249	2073	ck2605pinfusecolumns, ARRAY_LEN(ck2605pinfusecolumns),
1250	2074	print_ck2605_product_terms,
1251	2075	config_ck2605_pins,
1252	2076	NULL,
1253		NULL}};
	2077	NULL},
	2078	#if defined(ricoh_pals)
	2079	{"EPL10P8", 664,
	2080	epl10p8pinfuserows, ARRAY_LEN(epl10p8pinfuserows),
	2081	epl10p8pinfusecolumns, ARRAY_LEN(epl10p8pinfusecolumns),
	2082	print_epl10p8_product_terms,
	2083	config_epl10p8_pins,
	2084	NULL,
	2085	NULL},
	2086	{"EPL12P6", 786,
	2087	epl12p6pinfuserows, ARRAY_LEN(epl12p6pinfuserows),
	2088	epl12p6pinfusecolumns, ARRAY_LEN(epl12p6pinfusecolumns),
	2089	print_epl12p6_product_terms,
	2090	config_epl12p6_pins,
	2091	NULL,
	2092	NULL},
	2093	{"EPL14P4", 908,
	2094	epl14p4pinfuserows, ARRAY_LEN(epl14p4pinfuserows),
	2095	epl14p4pinfusecolumns, ARRAY_LEN(epl14p4pinfusecolumns),
	2096	print_epl14p4_product_terms,
	2097	config_epl14p4_pins,
	2098	NULL,
	2099	NULL},
	2100	{"EPL16P2", 1030,
	2101	epl16p2pinfuserows, ARRAY_LEN(epl16p2pinfuserows),
	2102	epl16p2pinfusecolumns, ARRAY_LEN(epl16p2pinfusecolumns),
	2103	print_epl16p2_product_terms,
	2104	config_epl16p2_pins,
	2105	NULL,
	2106	NULL},
	2107	{"EPL16P8", 2072,
	2108	epl16p8pinfuserows, ARRAY_LEN(epl16p8pinfuserows),
	2109	epl16p8pinfusecolumns, ARRAY_LEN(epl16p8pinfusecolumns),
	2110	print_epl16p8_product_terms,
	2111	config_epl16p8_pins,
	2112	NULL,
	2113	NULL},
	2114	{"EPL16RP8", 2072,
	2115	epl16rp8pinfuserows, ARRAY_LEN(epl16rp8pinfuserows),
	2116	epl16rp8pinfusecolumns, ARRAY_LEN(epl16rp8pinfusecolumns),
	2117	print_epl16rp8_product_terms,
	2118	config_epl16rp8_pins,
	2119	NULL,
	2120	NULL},
	2121	{"EPL16RP6", 2072,
	2122	epl16rp6pinfuserows, ARRAY_LEN(epl16rp6pinfuserows),
	2123	epl16rp6pinfusecolumns, ARRAY_LEN(epl16rp6pinfusecolumns),
	2124	print_epl16rp6_product_terms,
	2125	config_epl16rp6_pins,
	2126	NULL,
	2127	NULL},
	2128	{"EPL16RP4", 2072,
	2129	epl16rp4pinfuserows, ARRAY_LEN(epl16rp4pinfuserows),
	2130	epl16rp4pinfusecolumns, ARRAY_LEN(epl16rp4pinfusecolumns),
	2131	print_epl16rp4_product_terms,
	2132	config_epl16rp4_pins,
	2133	NULL,
	2134	NULL},
	2135	#endif
	2136	{"PAL10P8", 328,
	2137	pal10p8pinfuserows, ARRAY_LEN(pal10p8pinfuserows),
	2138	pal10p8pinfusecolumns, ARRAY_LEN(pal10p8pinfusecolumns),
	2139	print_pal10p8_product_terms,
	2140	config_pal10p8_pins,
	2141	NULL,
	2142	NULL},
	2143	{"PAL12P6", 390,
	2144	pal12p6pinfuserows, ARRAY_LEN(pal12p6pinfuserows),
	2145	pal12p6pinfusecolumns, ARRAY_LEN(pal12p6pinfusecolumns),
	2146	print_pal12p6_product_terms,
	2147	config_pal12p6_pins,
	2148	NULL,
	2149	NULL},
	2150	{"PAL14P4", 452,
	2151	pal14p4pinfuserows, ARRAY_LEN(pal14p4pinfuserows),
	2152	pal14p4pinfusecolumns, ARRAY_LEN(pal14p4pinfusecolumns),
	2153	print_pal14p4_product_terms,
	2154	config_pal14p4_pins,
	2155	NULL,
	2156	NULL},
	2157	{"PAL16P2", 514,
	2158	pal16p2pinfuserows, ARRAY_LEN(pal16p2pinfuserows),
	2159	pal16p2pinfusecolumns, ARRAY_LEN(pal16p2pinfusecolumns),
	2160	print_pal16p2_product_terms,
	2161	config_pal16p2_pins,
	2162	NULL,
	2163	NULL},
	2164	{"PAL16P8", 2056,
	2165	pal16p8pinfuserows, ARRAY_LEN(pal16p8pinfuserows),
	2166	pal16p8pinfusecolumns, ARRAY_LEN(pal16p8pinfusecolumns),
	2167	print_pal16p8_product_terms,
	2168	config_pal16p8_pins,
	2169	NULL,
	2170	NULL},
	2171	{"PAL16RP4", 2056,
	2172	pal16rp4pinfuserows, ARRAY_LEN(pal16rp4pinfuserows),
	2173	pal16rp4pinfusecolumns, ARRAY_LEN(pal16rp4pinfusecolumns),
	2174	print_pal16rp4_product_terms,
	2175	config_pal16rp4_pins,
	2176	NULL,
	2177	NULL},
	2178	{"PAL16RP6", 2056,
	2179	pal16rp6pinfuserows, ARRAY_LEN(pal16rp6pinfuserows),
	2180	pal16rp6pinfusecolumns, ARRAY_LEN(pal16rp6pinfusecolumns),
	2181	print_pal16rp6_product_terms,
	2182	config_pal16rp6_pins,
	2183	NULL,
	2184	NULL},
	2185	{"PAL16RP8", 2056,
	2186	pal16rp8pinfuserows, ARRAY_LEN(pal16rp8pinfuserows),
	2187	pal16rp8pinfusecolumns, ARRAY_LEN(pal16rp8pinfusecolumns),
	2188	print_pal16rp8_product_terms,
	2189	config_pal16rp8_pins,
	2190	NULL,
	2191	NULL},
	2192	{"PAL6L16", 192,
	2193	pal6l16pinfuserows, ARRAY_LEN(pal6l16pinfuserows),
	2194	pal6l16pinfusecolumns, ARRAY_LEN(pal6l16pinfusecolumns),
	2195	print_pal6l16_product_terms,
	2196	config_pal6l16_pins,
	2197	NULL,
	2198	NULL},
	2199	{"PAL8L14", 224,
	2200	pal8l14pinfuserows, ARRAY_LEN(pal8l14pinfuserows),
	2201	pal8l14pinfusecolumns, ARRAY_LEN(pal8l14pinfusecolumns),
	2202	print_pal8l14_product_terms,
	2203	config_pal8l14_pins,
	2204	NULL,
	2205	NULL},
	2206	{"PAL12H10", 480,
	2207	pal12h10pinfuserows, ARRAY_LEN(pal12h10pinfuserows),
	2208	pal12h10pinfusecolumns, ARRAY_LEN(pal12h10pinfusecolumns),
	2209	print_pal12h10_product_terms,
	2210	config_pal12h10_pins,
	2211	NULL,
	2212	NULL},
	2213	{"PAL12L10", 480,
	2214	pal12l10pinfuserows, ARRAY_LEN(pal12l10pinfuserows),
	2215	pal12l10pinfusecolumns, ARRAY_LEN(pal12l10pinfusecolumns),
	2216	print_pal12l10_product_terms,
	2217	config_pal12l10_pins,
	2218	NULL,
	2219	NULL},
	2220	{"PAL14H8", 560,
	2221	pal14h8pinfuserows, ARRAY_LEN(pal14h8pinfuserows),
	2222	pal14h8pinfusecolumns, ARRAY_LEN(pal14h8pinfusecolumns),
	2223	print_pal14h8_product_terms,
	2224	config_pal14h8_pins,
	2225	NULL,
	2226	NULL},
	2227	{"PAL14L8", 560,
	2228	pal14l8pinfuserows, ARRAY_LEN(pal14l8pinfuserows),
	2229	pal14l8pinfusecolumns, ARRAY_LEN(pal14l8pinfusecolumns),
	2230	print_pal14l8_product_terms,
	2231	config_pal14l8_pins,
	2232	NULL,
	2233	NULL},
	2234	{"PAL16H6", 640,
	2235	pal16h6pinfuserows, ARRAY_LEN(pal16h6pinfuserows),
	2236	pal16h6pinfusecolumns, ARRAY_LEN(pal16h6pinfusecolumns),
	2237	print_pal16h6_product_terms,
	2238	config_pal16h6_pins,
	2239	NULL,
	2240	NULL},
	2241	{"PAL16L6", 640,
	2242	pal16l6pinfuserows, ARRAY_LEN(pal16l6pinfuserows),
	2243	pal16l6pinfusecolumns, ARRAY_LEN(pal16l6pinfusecolumns),
	2244	print_pal16l6_product_terms,
	2245	config_pal16l6_pins,
	2246	NULL,
	2247	NULL},
	2248	{"PAL18H4", 720,
	2249	pal18h4pinfuserows, ARRAY_LEN(pal18h4pinfuserows),
	2250	pal18h4pinfusecolumns, ARRAY_LEN(pal18h4pinfusecolumns),
	2251	print_pal18h4_product_terms,
	2252	config_pal18h4_pins,
	2253	NULL,
	2254	NULL},
	2255	{"PAL18L4", 720,
	2256	pal18l4pinfuserows, ARRAY_LEN(pal18l4pinfuserows),
	2257	pal18l4pinfusecolumns, ARRAY_LEN(pal18l4pinfusecolumns),
	2258	print_pal18l4_product_terms,
	2259	config_pal18l4_pins,
	2260	NULL,
	2261	NULL},
	2262	{"PAL20C1", 640,
	2263	pal20c1pinfuserows, ARRAY_LEN(pal20c1pinfuserows),
	2264	pal20c1pinfusecolumns, ARRAY_LEN(pal20c1pinfusecolumns),
	2265	print_pal20c1_product_terms,
	2266	config_pal20c1_pins,
	2267	NULL,
	2268	NULL},
	2269	{"PAL20L2", 640,
	2270	pal20l2pinfuserows, ARRAY_LEN(pal20l2pinfuserows),
	2271	pal20l2pinfusecolumns, ARRAY_LEN(pal20l2pinfusecolumns),
	2272	print_pal20l2_product_terms,
	2273	config_pal20l2_pins,
	2274	NULL,
	2275	NULL}};
1254	2276
1255
1256
1257	2277	/***************************************************************************
1258	2278	CORE IMPLEMENTATION
1259	2279	***************************************************************************/
r26289	r26290
1612	2632	{
1613	2633	if (haveterm)
1614	2634	{
1615		strcat(buffer,  " & ");
	2635	strcat(buffer, " " AND_SYMBOL " ");
1616	2636	}
1617	2637
1618	2638	if (!is_output_pin(pin))
1619	2639	{
1620		sprintf(tmpbuffer, "/i%d", pin);
	2640	sprintf(tmpbuffer, LOW_SYMBOL INPUT_SYMBOL "%d", pin);
1621	2641	strcat(buffer, tmpbuffer);
1622	2642	}
1623	2643	else
r26289	r26290
1628	2648	{
1629	2649	if (flags & OUTPUT_COMBINATORIAL)
1630	2650	{
1631		sprintf(tmpbuffer, "/o%d", pin);
	2651	sprintf(tmpbuffer, LOW_SYMBOL OUTPUT_SYMBOL "%d", pin);
1632	2652	}
1633	2653	else if (flags & OUTPUT_REGISTERED)
1634	2654	{
1635		sprintf(tmpbuffer, "/rfo%d", pin);
	2655	sprintf(tmpbuffer, LOW_SYMBOL REGISTERED_FEEDBACK_OUTPUT_SYMBOL "%d", pin);
1636	2656	}
1637	2657	else
1638	2658	{
r26289	r26290
1643	2663	}
1644	2664	else if (flags & OUTPUT_FEEDBACK_COMBINATORIAL)
1645	2665	{
1646		sprintf(tmpbuffer, "/of%d", pin);
	2666	sprintf(tmpbuffer, LOW_SYMBOL OUTPUT_FEEDBACK_SYMBOL "%d", pin);
1647	2667	}
1648	2668	else if (flags & OUTPUT_FEEDBACK_REGISTERED)
1649	2669	{
1650		sprintf(tmpbuffer, "/rf%d", pin);
	2670	sprintf(tmpbuffer, LOW_SYMBOL REGISTERED_FEEDBACK_SYMBOL "%d", pin);
1651	2671	}
1652	2672	else
1653	2673	{
r26289	r26290
1666	2686	{
1667	2687	if (haveterm)
1668	2688	{
1669		strcat(buffer, " & ");
	2689	strcat(buffer, " " AND_SYMBOL " ");
1670	2690	}
1671	2691
1672	2692	if (!is_output_pin(pin))
1673	2693	{
1674		sprintf(tmpbuffer, "i%d", pin);
	2694	sprintf(tmpbuffer, INPUT_SYMBOL "%d", pin);
1675	2695	strcat(buffer, tmpbuffer);
1676	2696	}
1677	2697	else
r26289	r26290
1682	2702	{
1683	2703	if (flags & OUTPUT_COMBINATORIAL)
1684	2704	{
1685		sprintf(tmpbuffer, "o%d", pin);
	2705	sprintf(tmpbuffer, OUTPUT_SYMBOL "%d", pin);
1686	2706	}
1687	2707	else if (flags & OUTPUT_REGISTERED)
1688	2708	{
1689		sprintf(tmpbuffer, "rfo%d", pin);
	2709	sprintf(tmpbuffer, REGISTERED_FEEDBACK_OUTPUT_SYMBOL "%d", pin);
1690	2710	}
1691	2711	else
1692	2712	{
r26289	r26290
1697	2717	}
1698	2718	else if (flags & OUTPUT_FEEDBACK_COMBINATORIAL)
1699	2719	{
1700		sprintf(tmpbuffer, "of%d", pin);
	2720	sprintf(tmpbuffer, OUTPUT_FEEDBACK_SYMBOL "%d", pin);
1701	2721	}
1702	2722	else if (flags & OUTPUT_FEEDBACK_REGISTERED)
1703	2723	{
1704		sprintf(tmpbuffer, "rf%d", pin);
	2724	sprintf(tmpbuffer, REGISTERED_FEEDBACK_SYMBOL "%d", pin);
1705	2725	}
1706	2726	else
1707	2727	{
r26289	r26290
1843	2863
1844	2864	if (flags & OUTPUT_ACTIVELOW)
1845	2865	{
1846		printf("/");
	2866	printf(LOW_SYMBOL);
1847	2867
1848		++indent;
	2868	indent += strlen(LOW_SYMBOL);
1849	2869	}
1850	2870
1851	2871	if (flags & OUTPUT_COMBINATORIAL)
1852	2872	{
1853		sprintf(buffer, "o%d = ", outputpins[index].pin);
	2873	sprintf(buffer, OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
1854	2874	}
1855	2875	else if (flags & OUTPUT_REGISTERED)
1856	2876	{
1857		sprintf(buffer, "rf%d := ", outputpins[index].pin);
	2877	sprintf(buffer, REGISTERED_FEEDBACK_SYMBOL "%d " REGISTERED_ASSIGNMENT " ", outputpins[index].pin);
1858	2878	}
1859	2879	else
1860	2880	{
r26289	r26290
1886	2906	{
1887	2907	if (haveterms)
1888	2908	{
1889		printf(" +\n");
	2909	printf(" " OR_SYMBOL "\n");
1890	2910
1891	2911	for (indentindex = 0; indentindex < indent; ++indentindex)
1892	2912	{
r26289	r26290
1908	2928
1909	2929	if (flags & OUTPUT_COMBINATORIAL)
1910	2930	{
1911		printf("o%d.oe = ", outputpins[index].pin);
	2931	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
1912	2932
1913	2933	if (fuse_rows->fuserowoutputenable == NO_OUTPUT_ENABLE_FUSE_ROW ||
1914	2934	all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
r26289	r26290
1924	2944	}
1925	2945	else if (flags & OUTPUT_REGISTERED)
1926	2946	{
1927		printf("rf%d.oe = ", outputpins[index].pin);
	2947	printf(REGISTERED_FEEDBACK_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
1928	2948
1929	2949	if (fuse_rows->fuserowoutputenable == NO_OUTPUT_ENABLE_FUSE_ROW)
1930	2950	{
r26289	r26290
1949	2969
1950	2970
1951	2971	/*-------------------------------------------------
	2972	config_palce16v8_pin_as_7_product_terms_and_oe_term - configures
	2973	the fuse rows of a PALCE16V8 pin with seven
	2974	product terms and one output enable product term.
	2975	-------------------------------------------------*/
	2976
	2977	static void config_palce16v8_pin_as_7_product_terms_and_oe_term(UINT16 pin)
	2978	{
	2979	static pin_fuse_rows pinfuserows[] = {
	2980	{12, 1792, 1824, 2016},
	2981	{13, 1536, 1568, 1760},
	2982	{14, 1280, 1312, 1504},
	2983	{15, 1024, 1056, 1248},
	2984	{16, 768, 800, 992},
	2985	{17, 512, 544, 736},
	2986	{18, 256, 288, 480},
	2987	{19, 0, 32, 224}};
	2988	UINT16 index;
	2989
	2990	for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
	2991	{
	2992	if (pinfuserows[index].pin == pin)
	2993	{
	2994	palce16v8pinfuserows[index].fuserowoutputenable = pinfuserows[index].fuserowoutputenable;
	2995	palce16v8pinfuserows[index].fuserowtermstart = pinfuserows[index].fuserowtermstart;
	2996	palce16v8pinfuserows[index].fuserowtermend = pinfuserows[index].fuserowtermend;
	2997
	2998	break;
	2999	}
	3000	}
	3001	}
	3002
	3003
	3004
	3005	/*-------------------------------------------------
	3006	config_palce16v8_pin_as_8_product_terms - configures
	3007	the fuse rows of a PALCE16V8 pin with eight
	3008	product terms and no output enable product term.
	3009	-------------------------------------------------*/
	3010
	3011	static void config_palce16v8_pin_as_8_product_terms(UINT16 pin)
	3012	{
	3013	static pin_fuse_rows pinfuserows[] = {
	3014	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016},
	3015	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760},
	3016	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504},
	3017	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248},
	3018	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},
	3019	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},
	3020	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
	3021	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
	3022	UINT16 index;
	3023
	3024	for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
	3025	{
	3026	if (pinfuserows[index].pin == pin)
	3027	{
	3028	palce16v8pinfuserows[index].fuserowoutputenable = pinfuserows[index].fuserowoutputenable;
	3029	palce16v8pinfuserows[index].fuserowtermstart = pinfuserows[index].fuserowtermstart;
	3030	palce16v8pinfuserows[index].fuserowtermend = pinfuserows[index].fuserowtermend;
	3031
	3032	break;
	3033	}
	3034	}
	3035	}
	3036
	3037
	3038
	3039	/*-------------------------------------------------
	3040	print_pal20xxx_product_terms - prints the product
	3041	terms for a PAL20X4, PAL20X8 and PAL20X10
	3042	-------------------------------------------------*/
	3043
	3044	static void print_pal20xxx_product_terms(const pal_data* pal, const jed_data* jed)
	3045	{
	3046	UINT16 index, columncount, flags, row, haveterms, tmpindex;
	3047	char buffer[200];
	3048	int indent, indentindex, rowhasterms[4];
	3049	const pin_fuse_rows* fuse_rows;
	3050
	3051	columncount = calc_fuse_column_count(pal);
	3052
	3053	print_input_pins();
	3054	print_output_pins();
	3055
	3056	printf("Equations:\n\n");
	3057
	3058	for (index = 0; index < outputpinscount; ++index)
	3059	{
	3060	flags = outputpins[index].flags;
	3061
	3062	indent = 0;
	3063
	3064	if (flags & OUTPUT_COMBINATORIAL)
	3065	{
	3066	sprintf(buffer, LOW_SYMBOL OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
	3067
	3068	printf("%s", buffer);
	3069
	3070	haveterms = 0;
	3071	indent += strlen(buffer);
	3072
	3073	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
	3074
	3075	for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
	3076	row += columncount)
	3077	{
	3078	generate_product_terms(pal, jed, row, buffer);
	3079
	3080	if (strlen(buffer) > 0)
	3081	{
	3082	if (haveterms)
	3083	{
	3084	printf(" ");
	3085	printf(OR_SYMBOL);
	3086	printf("\n");
	3087
	3088	for (indentindex = 0; indentindex < indent; ++indentindex)
	3089	{
	3090	printf(" ");
	3091	}
	3092	}
	3093	else
	3094	{
	3095	haveterms = 1;
	3096	}
	3097
	3098	printf("%s", buffer);
	3099	}
	3100	}
	3101
	3102	printf("\n");
	3103
	3104	/* output enable equation */
	3105
	3106	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
	3107
	3108	if (all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
	3109	{
	3110	printf("vcc\n");
	3111	}
	3112	else
	3113	{
	3114	generate_product_terms(pal, jed, fuse_rows->fuserowoutputenable, buffer);
	3115
	3116	printf("%s\n", buffer);
	3117	}
	3118	}
	3119	else if (flags & OUTPUT_REGISTERED)
	3120	{
	3121	sprintf(buffer, LOW_SYMBOL REGISTERED_FEEDBACK_SYMBOL "%d " REGISTERED_ASSIGNMENT " ", outputpins[index].pin);
	3122
	3123	printf("%s", buffer);
	3124
	3125	haveterms = 0;
	3126	indent += strlen(buffer);
	3127
	3128	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
	3129	tmpindex = 0;
	3130
	3131	memset(rowhasterms, 0, sizeof(rowhasterms));
	3132
	3133	for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
	3134	row += columncount)
	3135	{
	3136	generate_product_terms(pal, jed, row, buffer);
	3137
	3138	if (strlen(buffer) > 0)
	3139	{
	3140	rowhasterms[tmpindex] = 1;
	3141
	3142	if (haveterms)
	3143	{
	3144	if (tmpindex == 1)
	3145	{
	3146	printf(" " OR_SYMBOL "\n");
	3147	}
	3148	else if (tmpindex == 2)
	3149	{
	3150	printf(" " XOR_SYMBOL "\n");
	3151	}
	3152	else if (tmpindex == 3)
	3153	{
	3154	if (rowhasterms[2])
	3155	{
	3156	printf(" " OR_SYMBOL "\n");
	3157	}
	3158	else
	3159	{
	3160	printf(" " XOR_SYMBOL "\n");
	3161	}
	3162	}
	3163
	3164	for (indentindex = 0; indentindex < indent; ++indentindex)
	3165	{
	3166	printf(" ");
	3167	}
	3168	}
	3169	else
	3170	{
	3171	haveterms = 1;
	3172	}
	3173
	3174	printf("%s", buffer);
	3175	}
	3176
	3177	++tmpindex;
	3178	}
	3179
	3180	printf("\n");
	3181
	3182	/* output enable equation */
	3183
	3184	printf(REGISTERED_FEEDBACK_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " OE\n", outputpins[index].pin);
	3185	}
	3186	else
	3187	{
	3188	fprintf(stderr, "Unknown output type for pin %d!\n", outputpins[index].pin);
	3189	}
	3190
	3191	printf("\n");
	3192	}
	3193	}
	3194
	3195
	3196
	3197	/*-------------------------------------------------
1952	3198	print_pal10l8_product_terms - prints the product
1953	3199	terms for a PAL10L8
1954	3200	-------------------------------------------------*/
r26289	r26290
2111	3357
2112	3358	static void print_palce16v8_product_terms(const pal_data* pal, const jed_data* jed)
2113	3359	{
2114		fprintf(stderr, "Printing product terms for PALCE16V8 not supported!\n");
2115
2116		/*print_product_terms(pal, jed);*/
	3360	print_product_terms(pal, jed);
2117	3361	}
2118	3362
2119	3363
r26289	r26290
2269	3513
2270	3514	static void print_pal20x4_product_terms(const pal_data* pal, const jed_data* jed)
2271	3515	{
2272		print_product_terms(pal, jed);
	3516	print_pal20xxx_product_terms(pal, jed);
2273	3517	}
2274	3518
2275	3519
r26289	r26290
2281	3525
2282	3526	static void print_pal20x8_product_terms(const pal_data* pal, const jed_data* jed)
2283	3527	{
2284		print_product_terms(pal, jed);
	3528	print_pal20xxx_product_terms(pal, jed);
2285	3529	}
2286	3530
2287	3531
r26289	r26290
2293	3537
2294	3538	static void print_pal20x10_product_terms(const pal_data* pal, const jed_data* jed)
2295	3539	{
2296		print_product_terms(pal, jed);
	3540	print_pal20xxx_product_terms(pal, jed);
2297	3541	}
2298	3542
2299	3543
r26289	r26290
2325	3569
2326	3570	if (flags & OUTPUT_ACTIVELOW)
2327	3571	{
2328		printf("/");
	3572	printf(LOW_SYMBOL);
2329	3573
2330		++indent;
	3574	indent += strlen(LOW_SYMBOL);
2331	3575	}
2332	3576
2333		sprintf(buffer, "o%d = ", outputpins[index].pin);
	3577	sprintf(buffer, OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
2334	3578
2335	3579	printf("%s", buffer);
2336	3580
r26289	r26290
2359	3603	{
2360	3604	if (haveterms)
2361	3605	{
2362		printf(" +\n");
	3606	printf(" " OR_SYMBOL "\n");
2363	3607
2364	3608	for (indentindex = 0; indentindex < indent; ++indentindex)
2365	3609	{
r26289	r26290
2382	3626
2383	3627	/* output enable equations */
2384	3628
2385		printf("o%d.oe = ", outputpins[index].pin);
	3629	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
2386	3630
2387	3631	if (all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
2388	3632	{
r26289	r26290
2428	3672
2429	3673	if (flags & OUTPUT_ACTIVELOW)
2430	3674	{
2431		printf("/");
	3675	printf(LOW_SYMBOL);
2432	3676
2433		++indent;
	3677	indent += strlen(LOW_SYMBOL);
2434	3678	}
2435	3679
2436		sprintf(buffer, "o%d = ", outputpins[index].pin);
	3680	sprintf(buffer, OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
2437	3681
2438	3682	printf("%s", buffer);
2439	3683
r26289	r26290
2462	3706	{
2463	3707	if (haveterms)
2464	3708	{
2465		printf(" +\n");
	3709	printf(" " OR_SYMBOL "\n");
2466	3710
2467	3711	for (indentindex = 0; indentindex < indent; ++indentindex)
2468	3712	{
r26289	r26290
2485	3729
2486	3730	/* output enable equations */
2487	3731
2488		printf("o%d.oe = ", outputpins[index].pin);
	3732	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
2489	3733
2490	3734	if (all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
2491	3735	{
r26289	r26290
2504	3748
2505	3749
2506	3750
	3751	#if defined(ricoh_pals)
2507	3752	/*-------------------------------------------------
	3753	print_epl10p8_product_terms - prints the product
	3754	terms for a EPL10P8
	3755	-------------------------------------------------*/
	3756
	3757	static void print_epl10p8_product_terms(const pal_data* pal, const jed_data* jed)
	3758	{
	3759	typedef struct _memory_cell memory_cell;
	3760	struct _memory_cell
	3761	{
	3762	UINT16 pin;
	3763	UINT16 or_fuse; /* 0 - intact? */
	3764	UINT16 xor_fuse; /* 0 - intact? */
	3765	};
	3766
	3767	static memory_cell memory_cells[] = {
	3768	{12, 661, 662},
	3769	{13, 658, 659},
	3770	{14, 655, 656},
	3771	{15, 652, 653},
	3772	{16, 649, 650},
	3773	{17, 646, 647},
	3774	{18, 643, 644},
	3775	{19, 640, 641}};
	3776	UINT16 index, columncount, flags, haveterms, fuserow;
	3777	char buffer[200];
	3778	int indent, row, indentindex;
	3779	const pin_fuse_rows* fuse_rows;
	3780
	3781	printf("Warning: This is experimental support!\n");
	3782
	3783	columncount = calc_fuse_column_count(pal);
	3784
	3785	print_input_pins();
	3786	print_output_pins();
	3787
	3788	printf("Equations:\n\n");
	3789
	3790	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	3791	{
	3792	flags = outputpins[index].flags;
	3793
	3794	indent = 0;
	3795
	3796	if (flags & OUTPUT_ACTIVELOW)
	3797	{
	3798	printf(LOW_SYMBOL);
	3799
	3800	indent += strlen(LOW_SYMBOL);
	3801	}
	3802
	3803	sprintf(buffer, OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
	3804
	3805	printf("%s", buffer);
	3806
	3807	haveterms = 0;
	3808	indent += strlen(buffer);
	3809
	3810	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
	3811
	3812	if (!jed_get_fuse(jed, memory_cells[index].or_fuse) ||
	3813	!jed_get_fuse(jed, memory_cells[index].xor_fuse))
	3814	{
	3815	/* MMI PAL pin compatible configuration */
	3816
	3817	fuserow = fuse_rows->fuserowtermstart;
	3818
	3819	for (row = 0; row < 2; ++row)
	3820	{
	3821	generate_product_terms(pal, jed, fuserow, buffer);
	3822
	3823	if (strlen(buffer) > 0)
	3824	{
	3825	if (haveterms)
	3826	{
	3827	printf(" " OR_SYMBOL "\n");
	3828
	3829	for (indentindex = 0; indentindex < indent; ++indentindex)
	3830	{
	3831	printf(" ");
	3832	}
	3833	}
	3834	else
	3835	{
	3836	haveterms = 1;
	3837	}
	3838
	3839	printf("%s", buffer);
	3840	}
	3841
	3842	fuserow += columncount;
	3843	}
	3844
	3845	printf("\n");
	3846
	3847	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " vcc\n", outputpins[index].pin);
	3848
	3849	printf("\n");
	3850	}
	3851	else if (!jed_get_fuse(jed, memory_cells[index].or_fuse) ||
	3852	jed_get_fuse(jed, memory_cells[index].xor_fuse))
	3853	{
	3854	/* or configuration */
	3855
	3856	fuserow = fuse_rows->fuserowtermstart;
	3857
	3858	for (row = 0; row < 4; ++row)
	3859	{
	3860	generate_product_terms(pal, jed, fuserow, buffer);
	3861
	3862	if (strlen(buffer) > 0)
	3863	{
	3864	if (haveterms)
	3865	{
	3866	printf(" " OR_SYMBOL "\n");
	3867
	3868	for (indentindex = 0; indentindex < indent; ++indentindex)
	3869	{
	3870	printf(" ");
	3871	}
	3872	}
	3873	else
	3874	{
	3875	haveterms = 1;
	3876	}
	3877
	3878	printf("%s", buffer);
	3879	}
	3880
	3881	fuse_rows += columncount;
	3882	}
	3883
	3884	printf("\n");
	3885
	3886	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " vcc\n", outputpins[index].pin);
	3887
	3888	printf("\n");
	3889	}
	3890	else if (jed_get_fuse(jed, memory_cells[index].or_fuse) ||
	3891	!jed_get_fuse(jed, memory_cells[index].xor_fuse))
	3892	{
	3893	/* xor configuration */
	3894	}
	3895	else
	3896	{
	3897	fprintf(stderr, "Unknown fuse configuration for pin %d!", memory_cells[index].pin);
	3898	}
	3899	}
	3900
	3901	printf("Warning: This is experimental support!\n");
	3902	}
	3903
	3904
	3905
	3906	/*-------------------------------------------------
	3907	print_epl12p6_product_terms - prints the product
	3908	terms for a EPL12P6
	3909	-------------------------------------------------*/
	3910
	3911	static void print_epl12p6_product_terms(const pal_data* pal, const jed_data* jed)
	3912	{
	3913	fprintf(stderr, "Printing product terms not supported for this device!\n");
	3914	}
	3915
	3916
	3917
	3918	/*-------------------------------------------------
	3919	print_epl14p4_product_terms - prints the product
	3920	terms for a EPL14P4
	3921	-------------------------------------------------*/
	3922
	3923	static void print_epl14p4_product_terms(const pal_data* pal, const jed_data* jed)
	3924	{
	3925	fprintf(stderr, "Printing product terms not supported for this device!\n");
	3926	}
	3927
	3928
	3929
	3930	/*-------------------------------------------------
	3931	print_epl16p2_product_terms - prints the product
	3932	terms for a EPL16P2
	3933	-------------------------------------------------*/
	3934
	3935	static void print_epl16p2_product_terms(const pal_data* pal, const jed_data* jed)
	3936	{
	3937	fprintf(stderr, "Printing product terms not supported for this device!\n");
	3938	}
	3939
	3940
	3941
	3942	/*-------------------------------------------------
	3943	print_epl16p8_product_terms - prints the product
	3944	terms for a EPL16P8
	3945	-------------------------------------------------*/
	3946
	3947	static void print_epl16p8_product_terms(const pal_data* pal, const jed_data* jed)
	3948	{
	3949	fprintf(stderr, "Printing product terms not supported for this device!\n");
	3950	}
	3951
	3952
	3953
	3954	/*-------------------------------------------------
	3955	print_epl16rp8_product_terms - prints the product
	3956	terms for a EPL16RP8
	3957	-------------------------------------------------*/
	3958
	3959	static void print_epl16rp8_product_terms(const pal_data* pal, const jed_data* jed)
	3960	{
	3961	fprintf(stderr, "Printing product terms not supported for this device!\n");
	3962	}
	3963
	3964
	3965
	3966	/*-------------------------------------------------
	3967	print_epl16rp6_product_terms - prints the product
	3968	terms for a EPL16RP6
	3969	-------------------------------------------------*/
	3970
	3971	static void print_epl16rp6_product_terms(const pal_data* pal, const jed_data* jed)
	3972	{
	3973	fprintf(stderr, "Printing product terms not supported for this device!\n");
	3974	}
	3975
	3976
	3977
	3978	/*-------------------------------------------------
	3979	print_epl16rp4_product_terms - prints the product
	3980	terms for a EPL16RP4
	3981	-------------------------------------------------*/
	3982
	3983	static void print_epl16rp4_product_terms(const pal_data* pal, const jed_data* jed)
	3984	{
	3985	fprintf(stderr, "Printing product terms not supported for this device!\n");
	3986	}
	3987	#endif
	3988
	3989
	3990
	3991	/*-------------------------------------------------
	3992	print_pal10p8_product_terms - prints the product
	3993	terms for a PAL10P8
	3994	-------------------------------------------------*/
	3995
	3996	static void print_pal10p8_product_terms(const pal_data* pal, const jed_data* jed)
	3997	{
	3998	print_product_terms(pal, jed);
	3999	}
	4000
	4001
	4002
	4003	/*-------------------------------------------------
	4004	print_epl12p6_product_terms - prints the product
	4005	terms for a PAL12P6
	4006	-------------------------------------------------*/
	4007
	4008	static void print_pal12p6_product_terms(const pal_data* pal, const jed_data* jed)
	4009	{
	4010	print_product_terms(pal, jed);
	4011	}
	4012
	4013
	4014
	4015	/*-------------------------------------------------
	4016	print_epl14p4_product_terms - prints the product
	4017	terms for a PAL14P4
	4018	-------------------------------------------------*/
	4019
	4020	static void print_pal14p4_product_terms(const pal_data* pal, const jed_data* jed)
	4021	{
	4022	print_product_terms(pal, jed);
	4023	}
	4024
	4025
	4026
	4027	/*-------------------------------------------------
	4028	print_epl16p2_product_terms - prints the product
	4029	terms for a PAL16P2
	4030	-------------------------------------------------*/
	4031
	4032	static void print_pal16p2_product_terms(const pal_data* pal, const jed_data* jed)
	4033	{
	4034	print_product_terms(pal, jed);
	4035	}
	4036
	4037
	4038
	4039	/*-------------------------------------------------
	4040	print_pal16p8_product_terms - prints the product
	4041	terms for a PAL16P8
	4042	-------------------------------------------------*/
	4043
	4044	static void print_pal16p8_product_terms(const pal_data* pal, const jed_data* jed)
	4045	{
	4046	print_product_terms(pal, jed);
	4047	}
	4048
	4049
	4050
	4051	/*-------------------------------------------------
	4052	print_pal16rp4_product_terms - prints the product
	4053	terms for a PAL16RP4
	4054	-------------------------------------------------*/
	4055
	4056	static void print_pal16rp4_product_terms(const pal_data* pal, const jed_data* jed)
	4057	{
	4058	print_product_terms(pal, jed);
	4059	}
	4060
	4061
	4062
	4063	/*-------------------------------------------------
	4064	print_pal16rp6_product_terms - prints the product
	4065	terms for a PAL16RP6
	4066	-------------------------------------------------*/
	4067
	4068	static void print_pal16rp6_product_terms(const pal_data* pal, const jed_data* jed)
	4069	{
	4070	print_product_terms(pal, jed);
	4071	}
	4072
	4073
	4074
	4075	/*-------------------------------------------------
	4076	print_pal16rp8_product_terms - prints the product
	4077	terms for a PAL16RP8
	4078	-------------------------------------------------*/
	4079
	4080	static void print_pal16rp8_product_terms(const pal_data* pal, const jed_data* jed)
	4081	{
	4082	print_product_terms(pal, jed);
	4083	}
	4084
	4085
	4086
	4087	/*-------------------------------------------------
	4088	print_pal6l16_product_terms - prints the product
	4089	terms for a PAL6L16
	4090	-------------------------------------------------*/
	4091
	4092	static void print_pal6l16_product_terms(const pal_data* pal, const jed_data* jed)
	4093	{
	4094	print_product_terms(pal, jed);
	4095	}
	4096
	4097
	4098
	4099	/*-------------------------------------------------
	4100	print_pal8l14_product_terms - prints the product
	4101	terms for a PAL8L14
	4102	-------------------------------------------------*/
	4103
	4104	static void print_pal8l14_product_terms(const pal_data* pal, const jed_data* jed)
	4105	{
	4106	print_product_terms(pal, jed);
	4107	}
	4108
	4109
	4110
	4111	/*-------------------------------------------------
	4112	print_pal12h10_product_terms - prints the product
	4113	terms for a PAL12H10
	4114	-------------------------------------------------*/
	4115
	4116	static void print_pal12h10_product_terms(const pal_data* pal, const jed_data* jed)
	4117	{
	4118	print_product_terms(pal, jed);
	4119	}
	4120
	4121
	4122
	4123	/*-------------------------------------------------
	4124	print_pal12l10_product_terms - prints the product
	4125	terms for a PAL12L10
	4126	-------------------------------------------------*/
	4127
	4128	static void print_pal12l10_product_terms(const pal_data* pal, const jed_data* jed)
	4129	{
	4130	print_product_terms(pal, jed);
	4131	}
	4132
	4133
	4134
	4135	/*-------------------------------------------------
	4136	print_pal14h8_product_terms - prints the product
	4137	terms for a PAL14H8
	4138	-------------------------------------------------*/
	4139
	4140	static void print_pal14h8_product_terms(const pal_data* pal, const jed_data* jed)
	4141	{
	4142	print_product_terms(pal, jed);
	4143	}
	4144
	4145
	4146
	4147	/*-------------------------------------------------
	4148	print_pal14l8_product_terms - prints the product
	4149	terms for a PAL14L8
	4150	-------------------------------------------------*/
	4151
	4152	static void print_pal14l8_product_terms(const pal_data* pal, const jed_data* jed)
	4153	{
	4154	print_product_terms(pal, jed);
	4155	}
	4156
	4157
	4158
	4159	/*-------------------------------------------------
	4160	print_pal16h6_product_terms - prints the product
	4161	terms for a PAL16H6
	4162	-------------------------------------------------*/
	4163
	4164	static void print_pal16h6_product_terms(const pal_data* pal, const jed_data* jed)
	4165	{
	4166	print_product_terms(pal, jed);
	4167	}
	4168
	4169
	4170
	4171	/*-------------------------------------------------
	4172	print_pal16l6_product_terms - prints the product
	4173	terms for a PAL16L6
	4174	-------------------------------------------------*/
	4175
	4176	static void print_pal16l6_product_terms(const pal_data* pal, const jed_data* jed)
	4177	{
	4178	print_product_terms(pal, jed);
	4179	}
	4180
	4181
	4182
	4183	/*-------------------------------------------------
	4184	print_pal18h4_product_terms - prints the product
	4185	terms for a PAL18H4
	4186	-------------------------------------------------*/
	4187
	4188	static void print_pal18h4_product_terms(const pal_data* pal, const jed_data* jed)
	4189	{
	4190	print_product_terms(pal, jed);
	4191	}
	4192
	4193
	4194
	4195	/*-------------------------------------------------
	4196	print_pal18l4_product_terms - prints the product
	4197	terms for a PAL18L4
	4198	-------------------------------------------------*/
	4199
	4200	static void print_pal18l4_product_terms(const pal_data* pal, const jed_data* jed)
	4201	{
	4202	print_product_terms(pal, jed);
	4203	}
	4204
	4205
	4206
	4207	/*-------------------------------------------------
	4208	print_pal20lc1_product_terms - prints the product
	4209	terms for a PAL20LC1
	4210	-------------------------------------------------*/
	4211
	4212	static void print_pal20c1_product_terms(const pal_data* pal, const jed_data* jed)
	4213	{
	4214	print_product_terms(pal, jed);
	4215	}
	4216
	4217
	4218
	4219	/*-------------------------------------------------
	4220	print_pal20l2_product_terms - prints the product
	4221	terms for a PAL20L2
	4222	-------------------------------------------------*/
	4223
	4224	static void print_pal20l2_product_terms(const pal_data* pal, const jed_data* jed)
	4225	{
	4226	print_product_terms(pal, jed);
	4227	}
	4228
	4229
	4230
	4231	/*-------------------------------------------------
2508	4232	config_pal10l8_pins - configures the pins for
2509	4233	a PAL10L8
2510	4234	-------------------------------------------------*/
r26289	r26290
2859	4583	struct _output_logic_macrocell
2860	4584	{
2861	4585	UINT16 pin;
2862		UINT16 sl0_fuse; /* registers allowed */
2863		UINT16 sl1_fuse; /* output polarity 0 - low, 1 - high */
	4586	UINT16 sl0_fuse; /* registers allowed (0 - registered, 1 - not registered) */
	4587	UINT16 sl1_fuse; /* output polarity (0 - low, 1 - high) */
	4588	UINT16 fuserowoutputenable;
2864	4589	};
2865	4590
2866	4591	static output_logic_macrocell macrocells[] = {
2867		{12, 2127, 2055},
2868		{13, 2126, 2054},
2869		{14, 2125, 2053},
2870		{15, 2124, 2052},
2871		{16, 2123, 2051},
2872		{17, 2122, 2050},
2873		{18, 2121, 2049},
2874		{19, 2120, 2048}};
2875		UINT16 sg0 = 2192; /* guessing on fuse here */
2876		UINT16 sg1 = 2193; /* guessing on fuse here */
2877		UINT16 index;
	4592	{12, 2127, 2055, 1792},
	4593	{13, 2126, 2054, 1536},
	4594	{14, 2125, 2053, 1280},
	4595	{15, 2124, 2052, 1024},
	4596	{16, 2123, 2051, 768},
	4597	{17, 2122, 2050, 512},
	4598	{18, 2121, 2049, 256},
	4599	{19, 2120, 2048, 0}};
	4600	static pin_fuse_columns pinfusecolumns_i_or_o[] = {
	4601	{1, 3, 2},
	4602	{2, 1, 0},
	4603	{3, 5, 4},
	4604	{4, 9, 8},
	4605	{5, 13, 12},
	4606	{6, 17, 16},
	4607	{7, 21, 20},
	4608	{8, 25, 24},
	4609	{9, 29, 28},
	4610	{11, 31, 30},
	4611	{12, 27, 26},
	4612	{13, 23, 22},
	4613	{14, 19, 18},
	4614	{17, 15, 14},
	4615	{18, 11, 10},
	4616	{19, 7, 6}};
	4617	static pin_fuse_columns pinfusecolumns_io[] = {
	4618	{1, 3, 2},
	4619	{2, 1, 0},
	4620	{3, 5, 4},
	4621	{4, 9, 8},
	4622	{5, 13, 12},
	4623	{6, 17, 16},
	4624	{7, 21, 20},
	4625	{8, 25, 24},
	4626	{9, 29, 28},
	4627	{11, 31, 30},
	4628	{13, 27, 26},
	4629	{14, 23, 22},
	4630	{15, 19, 18},
	4631	{16, 15, 14},
	4632	{17, 11, 10},
	4633	{18, 7, 6}};
	4634	static pin_fuse_columns pinfusecolumns_regs[] = {
	4635	{2, 1, 0},
	4636	{3, 5, 4},
	4637	{4, 9, 8},
	4638	{5, 13, 12},
	4639	{6, 17, 16},
	4640	{7, 21, 20},
	4641	{8, 25, 24},
	4642	{9, 29, 28},
	4643	{12, 31, 30},
	4644	{13, 27, 26},
	4645	{14, 23, 22},
	4646	{15, 19, 18},
	4647	{16, 15, 14},
	4648	{17, 11, 10},
	4649	{18, 7, 6},
	4650	{19, 3, 2}};
	4651	static UINT16 input_pins_i_or_o[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	4652	static UINT16 input_pins_io[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	4653	static UINT16 input_pins_regs[] = {2, 3, 4, 5, 6, 7, 8, 9};
	4654	static UINT16 sg0 = 2192;
	4655	static UINT16 sg1 = 2193;
	4656	UINT16 input_pins[18];
	4657	pin_output_config output_pins[ARRAY_LEN(macrocells)];
	4658	UINT16 index, input_pin_count, output_pin_count;
2878	4659
2879		for (index = 0; index < ARRAY_LEN(macrocells); ++index)
2880		{
2881		if (jed_get_fuse(jed, sg0))
2882		{
2883		/* Device uses no registers */
	4660	input_pin_count = 0;
	4661	output_pin_count = 0;
2884	4662
2885		if (jed_get_fuse(jed, sg1))
2886		{
2887		/* Combinatorial I/O */
2888		}
2889		else
2890		{
2891		/* Combinatorial Output or Input */
2892		}
2893		}
2894		else
2895		{
2896		/* Device uses registers */
	4663	if (!jed_get_fuse(jed, sg0))
	4664	{
	4665	/* Device uses registers */
2897	4666
2898		if (jed_get_fuse(jed, sg1))
2899		{
2900		}
2901		else
2902		{
2903		fprintf(stderr, "Unknown configuration type!\n");
2904		}
2905		}
2906		}
	4667	if (jed_get_fuse(jed, sg1))
	4668	{
	4669	memcpy(palce16v8pinfusecolumns, pinfusecolumns_regs, sizeof(pinfusecolumns_regs));
2907	4670
2908		/* 2056 - 2119 are the 64 bit signature fuses */
	4671	memcpy(input_pins, input_pins_regs, sizeof(input_pins_regs));
2909	4672
2910		fprintf(stderr, "Configuring product terms for PALCE16V8 not supported!\n");
	4673	input_pin_count = ARRAY_LEN(input_pins_regs);
	4674
	4675	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	4676	{
	4677	if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
	4678	{
	4679	/* Registered output */
	4680
	4681	config_palce16v8_pin_as_8_product_terms(macrocells[index].pin);
	4682
	4683	output_pins[output_pin_count].pin = macrocells[index].pin;
	4684	output_pins[output_pin_count].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
	4685
	4686	if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
	4687	{
	4688	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	4689	}
	4690	else
	4691	{
	4692	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	4693	}
	4694
	4695	++output_pin_count;
	4696
	4697	input_pins[input_pin_count] = macrocells[index].pin;
	4698
	4699	++input_pin_count;
	4700	}
	4701	else
	4702	{
	4703	/* Combinatorial I/O */
	4704
	4705	if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
	4706	{
	4707	config_palce16v8_pin_as_7_product_terms_and_oe_term(macrocells[index].pin);
	4708
	4709	output_pins[output_pin_count].pin = macrocells[index].pin;
	4710	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	4711
	4712	if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
	4713	{
	4714	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	4715	}
	4716	else
	4717	{
	4718	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	4719	}
	4720
	4721	++output_pin_count;
	4722	}
	4723
	4724	input_pins[input_pin_count] = macrocells[index].pin;
	4725
	4726	++input_pin_count;
	4727	}
	4728	}
	4729	}
	4730	else
	4731	{
	4732	fprintf(stderr, "Unknown configuration type!\n");
	4733	}
	4734	}
	4735	else
	4736	{
	4737	/* Device uses no registers */
	4738
	4739	if (jed_get_fuse(jed, sg1))
	4740	{
	4741	/* Combinatorial I/O (7 product terms and 1 output enable product term) */
	4742
	4743	memcpy(palce16v8pinfusecolumns, pinfusecolumns_io, sizeof(pinfusecolumns_io));
	4744
	4745	memcpy(input_pins, input_pins_io, sizeof(input_pins_io));
	4746
	4747	input_pin_count = ARRAY_LEN(input_pins_io);
	4748
	4749	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	4750	{
	4751	if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
	4752	{
	4753	config_palce16v8_pin_as_7_product_terms_and_oe_term(macrocells[index].pin);
	4754
	4755	output_pins[output_pin_count].pin = macrocells[index].pin;
	4756	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	4757
	4758	if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
	4759	{
	4760	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	4761	}
	4762	else
	4763	{
	4764	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	4765	}
	4766
	4767	++output_pin_count;
	4768	}
	4769
	4770	/* Pins 12 and 19 cannot be used as an input only an output. */
	4771
	4772	if (macrocells[index].pin != 12 && macrocells[index].pin != 19)
	4773	{
	4774	input_pins[input_pin_count] = macrocells[index].pin;
	4775
	4776	++input_pin_count;
	4777	}
	4778	}
	4779	}
	4780	else
	4781	{
	4782	/* Combinatorial Output or Input */
	4783
	4784	memcpy(palce16v8pinfusecolumns, pinfusecolumns_i_or_o, sizeof(pinfusecolumns_i_or_o));
	4785
	4786	memcpy(input_pins, input_pins_i_or_o, sizeof(input_pins_i_or_o));
	4787
	4788	input_pin_count = ARRAY_LEN(input_pins_i_or_o);
	4789
	4790	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	4791	{
	4792	if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
	4793	{
	4794	/* pin configured as an output only */
	4795
	4796	config_palce16v8_pin_as_8_product_terms(macrocells[index].pin);
	4797
	4798	output_pins[output_pin_count].pin = macrocells[index].pin;
	4799	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	4800
	4801	if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
	4802	{
	4803	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	4804	}
	4805	else
	4806	{
	4807	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	4808	}
	4809
	4810	++output_pin_count;
	4811	}
	4812	else
	4813	{
	4814	/* pin configured as an input only */
	4815
	4816	input_pins[input_pin_count] = macrocells[index].pin;
	4817
	4818	++input_pin_count;
	4819	}
	4820	}
	4821	}
	4822	}
	4823
	4824	set_input_pins(input_pins, input_pin_count);
	4825	set_output_pins(output_pins, output_pin_count);
	4826
	4827	/* 2056 - 2119 are the 64 bit signature fuses */
	4828
	4829	/* 2128 - 2135 product term 8? */
	4830	/* 2136 - 2143 product term 7? */
	4831	/* 2144 - 2151 product term 6? */
	4832	/* 2152 - 2159 product term 5? */
	4833	/* 2160 - 2167 product term 4? */
	4834	/* 2168 - 2175 product term 3? */
	4835	/* 2176 - 2183 product term 2? */
	4836	/* 2184 - 2191 product term 1? */
2911	4837	}
2912	4838
2913	4839
r26289	r26290
3757	5683
3758	5684
3759	5685
	5686	#if defined(ricoh_pals)
3760	5687	/*-------------------------------------------------
	5688	config_epl10p8_pins - configures the pins for
	5689	a EPL10P8
	5690	-------------------------------------------------*/
	5691
	5692	static void config_epl10p8_pins(const pal_data* pal, const jed_data* jed)
	5693	{
	5694	typedef struct _memory_cell memory_cell;
	5695	struct _memory_cell
	5696	{
	5697	UINT16 pin;
	5698	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
	5699	};
	5700
	5701	static memory_cell memory_cells[] = {
	5702	{12, 663},
	5703	{13, 660},
	5704	{14, 657},
	5705	{15, 654},
	5706	{16, 651},
	5707	{17, 648},
	5708	{18, 645},
	5709	{19, 642}};
	5710	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	5711	pin_output_config output_pins[8];
	5712	UINT16 index;
	5713
	5714	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5715	{
	5716	output_pins[index].pin = memory_cells[index].pin;
	5717	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	5718
	5719	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
	5720	{
	5721	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	5722	}
	5723	else
	5724	{
	5725	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	5726	}
	5727	}
	5728
	5729	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	5730	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	5731	}
	5732
	5733
	5734
	5735	/*-------------------------------------------------
	5736	config_epl12p6_pins - configures the pins for
	5737	a EPL12P6
	5738	-------------------------------------------------*/
	5739
	5740	static void config_epl12p6_pins(const pal_data* pal, const jed_data* jed)
	5741	{
	5742	typedef struct _memory_cell memory_cell;
	5743	struct _memory_cell
	5744	{
	5745	UINT16 pin;
	5746	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
	5747	UINT16 or_fuse; /* 0 - intact? */
	5748	UINT16 xor_fuse; /* 0 - intact? */
	5749	};
	5750
	5751	static memory_cell memory_cells[] = {
	5752	{13, 785, 783, 784},
	5753	{14, 782, 780, 781},
	5754	{15, 779, 777, 778},
	5755	{16, 776, 774, 775},
	5756	{17, 773, 771, 772},
	5757	{18, 770, 768, 769}};
	5758	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19};
	5759	pin_output_config output_pins[8];
	5760	UINT16 index;
	5761
	5762	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5763	{
	5764	output_pins[index].pin = memory_cells[index].pin;
	5765	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	5766
	5767	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
	5768	{
	5769	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	5770	}
	5771	else
	5772	{
	5773	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	5774	}
	5775	}
	5776
	5777	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	5778	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	5779	}
	5780
	5781
	5782
	5783	/*-------------------------------------------------
	5784	config_epl14p4_pins - configures the pins for
	5785	a EPL14P4
	5786	-------------------------------------------------*/
	5787
	5788	static void config_epl14p4_pins(const pal_data* pal, const jed_data* jed)
	5789	{
	5790	typedef struct _memory_cell memory_cell;
	5791	struct _memory_cell
	5792	{
	5793	UINT16 pin;
	5794	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
	5795	UINT16 or_fuse; /* 0 - intact? */
	5796	UINT16 xor_fuse; /* 0 - intact? */
	5797	};
	5798
	5799	static memory_cell memory_cells[] = {
	5800	{14, 907, 905, 906},
	5801	{15, 904, 902, 903},
	5802	{16, 901, 899, 900},
	5803	{17, 898, 896, 897}};
	5804	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19};
	5805	pin_output_config output_pins[8];
	5806	UINT16 index;
	5807
	5808	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5809	{
	5810	output_pins[index].pin = memory_cells[index].pin;
	5811	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	5812
	5813	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
	5814	{
	5815	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	5816	}
	5817	else
	5818	{
	5819	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	5820	}
	5821	}
	5822
	5823	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	5824	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	5825	}
	5826
	5827
	5828
	5829	/*-------------------------------------------------
	5830	config_epl16p2_pins - configures the pins for
	5831	a EPL16P2
	5832	-------------------------------------------------*/
	5833
	5834	static void config_epl16p2_pins(const pal_data* pal, const jed_data* jed)
	5835	{
	5836	typedef struct _memory_cell memory_cell;
	5837	struct _memory_cell
	5838	{
	5839	UINT16 pin;
	5840	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
	5841	UINT16 or_fuse; /* 0 - intact? */
	5842	UINT16 xor_fuse; /* 0 - intact? */
	5843	};
	5844
	5845	static memory_cell memory_cells[] = {
	5846	{15, 1029, 1027, 1028},
	5847	{16, 1026, 1024, 1025}};
	5848	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
	5849	pin_output_config output_pins[8];
	5850	UINT16 index;
	5851
	5852	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5853	{
	5854	output_pins[index].pin = memory_cells[index].pin;
	5855	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	5856
	5857	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
	5858	{
	5859	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	5860	}
	5861	else
	5862	{
	5863	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	5864	}
	5865	}
	5866
	5867	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	5868	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	5869	}
	5870
	5871
	5872
	5873	/*-------------------------------------------------
	5874	config_epl16p8_pins - configures the pins for
	5875	a EPL16P8
	5876	-------------------------------------------------*/
	5877
	5878	static void config_epl16p8_pins(const pal_data* pal, const jed_data* jed)
	5879	{
	5880	typedef struct _memory_cell memory_cell;
	5881	struct _memory_cell
	5882	{
	5883	UINT16 pin;
	5884	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
	5885	UINT16 or_fuse; /* 0 - intact? */
	5886	UINT16 xor_fuse; /* 0 - intact? */
	5887	};
	5888
	5889	static memory_cell memory_cells[] = {
	5890	{12, 2071, 2069, 2070},
	5891	{13, 2068, 2066, 2067},
	5892	{14, 2065, 2063, 2064},
	5893	{15, 2062, 2060, 2061},
	5894	{16, 2059, 2057, 2058},
	5895	{17, 2056, 2054, 2055},
	5896	{18, 2053, 2051, 2052},
	5897	{19, 2050, 2048, 2049}};
	5898	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	5899	pin_output_config output_pins[8];
	5900	UINT16 index;
	5901
	5902	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5903	{
	5904	output_pins[index].pin = memory_cells[index].pin;
	5905	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	5906
	5907	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
	5908	{
	5909	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	5910	}
	5911	else
	5912	{
	5913	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	5914	}
	5915	}
	5916
	5917	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	5918	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	5919	}
	5920
	5921
	5922
	5923	/*-------------------------------------------------
	5924	config_epl16rp8_pins - configures the pins for
	5925	a EPL16RP8
	5926	-------------------------------------------------*/
	5927
	5928	static void config_epl16rp8_pins(const pal_data* pal, const jed_data* jed)
	5929	{
	5930	typedef struct _memory_cell memory_cell;
	5931	struct _memory_cell
	5932	{
	5933	UINT16 pin;
	5934	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
	5935	UINT16 or_fuse; /* 0 - intact? */
	5936	UINT16 xor_fuse; /* 0 - intact? */
	5937	};
	5938
	5939	static memory_cell memory_cells[] = {
	5940	{12, 2071, 2069, 2070},
	5941	{13, 2068, 2066, 2067},
	5942	{14, 2065, 2063, 2064},
	5943	{15, 2062, 2060, 2061},
	5944	{16, 2059, 2057, 2058},
	5945	{17, 2056, 2054, 2055},
	5946	{18, 2053, 2051, 2052},
	5947	{19, 2050, 2048, 2049}};
	5948	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	5949	pin_output_config output_pins[8];
	5950	UINT16 index;
	5951
	5952	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5953	{
	5954	output_pins[index].pin = memory_cells[index].pin;
	5955	output_pins[index].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
	5956
	5957	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
	5958	{
	5959	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	5960	}
	5961	else
	5962	{
	5963	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	5964	}
	5965	}
	5966
	5967	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	5968	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	5969	}
	5970
	5971
	5972
	5973	/*-------------------------------------------------
	5974	config_epl16rp6_pins - configures the pins for
	5975	a EPL16RP6
	5976	-------------------------------------------------*/
	5977
	5978	static void config_epl16rp6_pins(const pal_data* pal, const jed_data* jed)
	5979	{
	5980	typedef struct _memory_cell memory_cell;
	5981	struct _memory_cell
	5982	{
	5983	UINT16 pin;
	5984	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
	5985	UINT16 or_fuse; /* 0 - intact? */
	5986	UINT16 xor_fuse; /* 0 - intact? */
	5987	};
	5988
	5989	static memory_cell memory_cells[] = {
	5990	{12, 2071, 2069, 2070},
	5991	{13, 2068, 2066, 2067},
	5992	{14, 2065, 2063, 2064},
	5993	{15, 2062, 2060, 2061},
	5994	{16, 2059, 2057, 2058},
	5995	{17, 2056, 2054, 2055},
	5996	{18, 2053, 2051, 2052},
	5997	{19, 2050, 2048, 2049}};
	5998	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	5999	pin_output_config output_pins[8];
	6000	UINT16 index;
	6001
	6002	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	6003	{
	6004	output_pins[index].pin = memory_cells[index].pin;
	6005
	6006	if (memory_cells[index].pin == 13 || memory_cells[index].pin == 14 ||
	6007	memory_cells[index].pin == 15 || memory_cells[index].pin == 16 ||
	6008	memory_cells[index].pin == 17 || memory_cells[index].pin == 18)
	6009	{
	6010	output_pins[index].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
	6011	}
	6012	else
	6013	{
	6014	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6015	}
	6016
	6017	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
	6018	{
	6019	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	6020	}
	6021	else
	6022	{
	6023	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	6024	}
	6025	}
	6026
	6027	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6028	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6029	}
	6030
	6031
	6032
	6033	/*-------------------------------------------------
	6034	config_epl16rp4_pins - configures the pins for
	6035	a EPL16RP4
	6036	-------------------------------------------------*/
	6037
	6038	static void config_epl16rp4_pins(const pal_data* pal, const jed_data* jed)
	6039	{
	6040	typedef struct _memory_cell memory_cell;
	6041	struct _memory_cell
	6042	{
	6043	UINT16 pin;
	6044	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
	6045	UINT16 or_fuse; /* 0 - intact? */
	6046	UINT16 xor_fuse; /* 0 - intact? */
	6047	};
	6048
	6049	static memory_cell memory_cells[] = {
	6050	{12, 2071, 2069, 2070},
	6051	{13, 2068, 2066, 2067},
	6052	{14, 2065, 2063, 2064},
	6053	{15, 2062, 2060, 2061},
	6054	{16, 2059, 2057, 2058},
	6055	{17, 2056, 2054, 2055},
	6056	{18, 2053, 2051, 2052},
	6057	{19, 2050, 2048, 2049}};
	6058	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	6059	pin_output_config output_pins[8];
	6060	UINT16 index;
	6061
	6062	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	6063	{
	6064	output_pins[index].pin = memory_cells[index].pin;
	6065
	6066	if (memory_cells[index].pin == 14 || memory_cells[index].pin == 15 ||
	6067	memory_cells[index].pin == 16 || memory_cells[index].pin == 17)
	6068	{
	6069	output_pins[index].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
	6070	}
	6071	else
	6072	{
	6073	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6074	}
	6075
	6076	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
	6077	{
	6078	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	6079	}
	6080	else
	6081	{
	6082	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	6083	}
	6084	}
	6085
	6086	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6087	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6088	}
	6089	#endif
	6090
	6091
	6092
	6093	/*-------------------------------------------------
	6094	config_pal10p8_pins - configures the pins for
	6095	a PAL10P8
	6096	-------------------------------------------------*/
	6097
	6098	static void config_pal10p8_pins(const pal_data* pal, const jed_data* jed)
	6099	{
	6100	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	6101	pin_output_config output_pins[8];
	6102	UINT16 index;
	6103
	6104	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6105	{
	6106	output_pins[index].pin = index + 12;
	6107	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	6108
	6109	if (!jed_get_fuse(jed, 327 - index))
	6110	{
	6111	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	6112	}
	6113	else
	6114	{
	6115	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	6116	}
	6117	}
	6118
	6119	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6120	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6121	}
	6122
	6123
	6124
	6125	/*-------------------------------------------------
	6126	config_pal12p6_pins - configures the pins for
	6127	a PAL12P6A
	6128	-------------------------------------------------*/
	6129
	6130	static void config_pal12p6_pins(const pal_data* pal, const jed_data* jed)
	6131	{
	6132	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19};
	6133	pin_output_config output_pins[6];
	6134	UINT16 index;
	6135
	6136	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6137	{
	6138	output_pins[index].pin = index + 13;
	6139	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	6140
	6141	if (!jed_get_fuse(jed, 389 - index))
	6142	{
	6143	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	6144	}
	6145	else
	6146	{
	6147	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	6148	}
	6149	}
	6150
	6151	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6152	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6153	}
	6154
	6155
	6156
	6157	/*-------------------------------------------------
	6158	config_pal14p4_pins - configures the pins for
	6159	a PAL14P4
	6160	-------------------------------------------------*/
	6161
	6162	static void config_pal14p4_pins(const pal_data* pal, const jed_data* jed)
	6163	{
	6164	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19};
	6165	pin_output_config output_pins[4];
	6166	UINT16 index;
	6167
	6168	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6169	{
	6170	output_pins[index].pin = index + 14;
	6171	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	6172
	6173	if (!jed_get_fuse(jed, 451 - index))
	6174	{
	6175	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	6176	}
	6177	else
	6178	{
	6179	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	6180	}
	6181	}
	6182
	6183	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6184	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6185	}
	6186
	6187
	6188
	6189	/*-------------------------------------------------
	6190	config_pal16p2_pins - configures the pins for
	6191	a PAL16P2
	6192	-------------------------------------------------*/
	6193
	6194	static void config_pal16p2_pins(const pal_data* pal, const jed_data* jed)
	6195	{
	6196	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
	6197	pin_output_config output_pins[2];
	6198	UINT16 index;
	6199
	6200	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6201	{
	6202	output_pins[index].pin = index + 15;
	6203	output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
	6204
	6205	if (!jed_get_fuse(jed, 513 - index))
	6206	{
	6207	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	6208	}
	6209	else
	6210	{
	6211	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	6212	}
	6213	}
	6214
	6215	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6216	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6217	}
	6218
	6219
	6220
	6221	/*-------------------------------------------------
	6222	config_pal16p8_pins - configures the pins for
	6223	a PAL16P8
	6224	-------------------------------------------------*/
	6225
	6226	static void config_pal16p8_pins(const pal_data* pal, const jed_data* jed)
	6227	{
	6228	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18};
	6229	pin_output_config output_pins[8];
	6230	UINT16 output_pin_count, index;
	6231
	6232	output_pin_count = 0;
	6233
	6234	for (index = 0; index < pal->pinfuserowscount; ++index)
	6235	{
	6236	if (does_output_enable_fuse_row_allow_output(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	6237	{
	6238	output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
	6239	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6240
	6241	if (!jed_get_fuse(jed, 2055 - index))
	6242	{
	6243	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6244	}
	6245	else
	6246	{
	6247	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6248	}
	6249
	6250	++output_pin_count;
	6251	}
	6252	}
	6253
	6254	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6255	set_output_pins(output_pins, output_pin_count);
	6256	}
	6257
	6258
	6259
	6260	/*-------------------------------------------------
	6261	config_pal16rp4_pins - configures the pins for
	6262	a PAL16RP4
	6263	-------------------------------------------------*/
	6264
	6265	static void config_pal16rp4_pins(const pal_data* pal, const jed_data* jed)
	6266	{
	6267	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
	6268	static UINT16 registered_pins[] = {14, 15, 16, 17};
	6269	pin_output_config output_pins[8];
	6270	UINT16 output_pin_count, index;
	6271
	6272	output_pin_count = 0;
	6273
	6274	if (does_output_enable_fuse_row_allow_output(pal, jed, 1792))
	6275	{
	6276	output_pins[output_pin_count].pin = 12;
	6277	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6278
	6279	if (!jed_get_fuse(jed, 2055))
	6280	{
	6281	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6282	}
	6283	else
	6284	{
	6285	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6286	}
	6287
	6288	++output_pin_count;
	6289	}
	6290
	6291	if (does_output_enable_fuse_row_allow_output(pal, jed, 1536))
	6292	{
	6293	output_pins[output_pin_count].pin = 13;
	6294	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6295
	6296	if (!jed_get_fuse(jed, 2054))
	6297	{
	6298	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6299	}
	6300	else
	6301	{
	6302	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6303	}
	6304
	6305	++output_pin_count;
	6306	}
	6307
	6308	for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
	6309	{
	6310	output_pins[output_pin_count].pin = registered_pins[index];
	6311	output_pins[output_pin_count].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
	6312
	6313	if (!jed_get_fuse(jed, 2053 - index))
	6314	{
	6315	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6316	}
	6317	else
	6318	{
	6319	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6320	}
	6321
	6322	++output_pin_count;
	6323	}
	6324
	6325	if (does_output_enable_fuse_row_allow_output(pal, jed, 256))
	6326	{
	6327	output_pins[output_pin_count].pin = 18;
	6328	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6329
	6330	if (!jed_get_fuse(jed, 2049))
	6331	{
	6332	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6333	}
	6334	else
	6335	{
	6336	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6337	}
	6338
	6339	++output_pin_count;
	6340	}
	6341
	6342	if (does_output_enable_fuse_row_allow_output(pal, jed, 0))
	6343	{
	6344	output_pins[output_pin_count].pin = 19;
	6345	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6346
	6347	if (!jed_get_fuse(jed, 2048))
	6348	{
	6349	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6350	}
	6351	else
	6352	{
	6353	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6354	}
	6355
	6356	++output_pin_count;
	6357	}
	6358
	6359	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6360	set_output_pins(output_pins, output_pin_count);
	6361	}
	6362
	6363
	6364
	6365	/*-------------------------------------------------
	6366	config_pal16rp6_pins - configures the pins for
	6367	a PAL16RP6
	6368	-------------------------------------------------*/
	6369
	6370	static void config_pal16rp6_pins(const pal_data* pal, const jed_data* jed)
	6371	{
	6372	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
	6373	static UINT16 registered_pins[] = {13, 14, 15, 16, 17, 18};
	6374	pin_output_config output_pins[8];
	6375	UINT16 output_pin_count, index;
	6376
	6377	output_pin_count = 0;
	6378
	6379	if (does_output_enable_fuse_row_allow_output(pal, jed, 1792))
	6380	{
	6381	output_pins[output_pin_count].pin = 12;
	6382	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6383
	6384	if (!jed_get_fuse(jed, 2055))
	6385	{
	6386	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6387	}
	6388	else
	6389	{
	6390	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6391	}
	6392
	6393	++output_pin_count;
	6394	}
	6395
	6396	for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
	6397	{
	6398	output_pins[output_pin_count].pin = registered_pins[index];
	6399	output_pins[output_pin_count].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
	6400
	6401	if (!jed_get_fuse(jed, 2054 - index))
	6402	{
	6403	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6404	}
	6405	else
	6406	{
	6407	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6408	}
	6409
	6410	++output_pin_count;
	6411	}
	6412
	6413	if (does_output_enable_fuse_row_allow_output(pal, jed, 0))
	6414	{
	6415	output_pins[output_pin_count].pin = 19;
	6416	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
	6417
	6418	if (!jed_get_fuse(jed, 2048))
	6419	{
	6420	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	6421	}
	6422	else
	6423	{
	6424	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	6425	}
	6426
	6427	++output_pin_count;
	6428	}
	6429
	6430	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6431	set_output_pins(output_pins, output_pin_count);
	6432	}
	6433
	6434
	6435
	6436	/*-------------------------------------------------
	6437	config_pal16rp8_pins - configures the pins for
	6438	a PAL16RP8
	6439	-------------------------------------------------*/
	6440
	6441	static void config_pal16rp8_pins(const pal_data* pal, const jed_data* jed)
	6442	{
	6443	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
	6444	pin_output_config output_pins[] = {
	6445	{12, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
	6446	{13, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
	6447	{14, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
	6448	{15, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
	6449	{16, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
	6450	{17, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
	6451	{18, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
	6452	{19, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED}};
	6453	UINT16 index;
	6454
	6455	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6456	{
	6457	if (!jed_get_fuse(jed, 2055 - index))
	6458	{
	6459	output_pins[index].flags |= OUTPUT_ACTIVELOW;
	6460	}
	6461	else
	6462	{
	6463	output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
	6464	}
	6465	}
	6466
	6467	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6468	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6469	}
	6470
	6471
	6472
	6473	/*-------------------------------------------------
	6474	config_pal6l16_pins - configures the pins for
	6475	a PAL6L16
	6476	-------------------------------------------------*/
	6477
	6478	static void config_pal6l16_pins(const pal_data* pal, const jed_data* jed)
	6479	{
	6480	static UINT16 input_pins[] = {4, 5, 6, 7, 8, 9};
	6481	static pin_output_config output_pins[] = {
	6482	{1, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6483	{2, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6484	{3, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6485	{10, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6486	{11, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6487	{13, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6488	{14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6489	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6490	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6491	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6492	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6493	{19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6494	{20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6495	{21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6496	{22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6497	{23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6498
	6499	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6500	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6501	}
	6502
	6503
	6504
	6505	/*-------------------------------------------------
	6506	config_pal8l14_pins - configures the pins for
	6507	a PAL8L14
	6508	-------------------------------------------------*/
	6509
	6510	static void config_pal8l14_pins(const pal_data* pal, const jed_data* jed)
	6511	{
	6512	static UINT16 input_pins[] = {3, 4, 5, 6, 7, 8, 9, 10};
	6513	static pin_output_config output_pins[] = {
	6514	{1, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6515	{2, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6516	{11, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6517	{13, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6518	{14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6519	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6520	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6521	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6522	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6523	{19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6524	{20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6525	{21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6526	{22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6527	{23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6528
	6529	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6530	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6531	}
	6532
	6533
	6534
	6535	/*-------------------------------------------------
	6536	config_pal12h10_pins - configures the pins for
	6537	a PAL12H10
	6538	-------------------------------------------------*/
	6539
	6540	static void config_pal12h10_pins(const pal_data* pal, const jed_data* jed)
	6541	{
	6542	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13};
	6543	static pin_output_config output_pins[] = {
	6544	{14, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6545	{15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6546	{16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6547	{17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6548	{18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6549	{19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6550	{20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6551	{21, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6552	{22, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6553	{23, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6554
	6555	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6556	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6557	}
	6558
	6559
	6560
	6561	/*-------------------------------------------------
	6562	config_pal12l10_pins - configures the pins for
	6563	a PAL12L10
	6564	-------------------------------------------------*/
	6565
	6566	static void config_pal12l10_pins(const pal_data* pal, const jed_data* jed)
	6567	{
	6568	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13};
	6569	static pin_output_config output_pins[] = {
	6570	{14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6571	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6572	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6573	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6574	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6575	{19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6576	{20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6577	{21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6578	{22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6579	{23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6580
	6581	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6582	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6583	}
	6584
	6585
	6586
	6587	/*-------------------------------------------------
	6588	config_pal14h8_pins - configures the pins for
	6589	a PAL14H8
	6590	-------------------------------------------------*/
	6591
	6592	static void config_pal14h8_pins(const pal_data* pal, const jed_data* jed)
	6593	{
	6594	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 23};
	6595	static pin_output_config output_pins[] = {
	6596	{15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6597	{16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6598	{17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6599	{18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6600	{19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6601	{20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6602	{21, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6603	{22, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6604
	6605	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6606	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6607	}
	6608
	6609
	6610
	6611	/*-------------------------------------------------
	6612	config_pal14l8_pins - configures the pins for
	6613	a PAL14L8
	6614	-------------------------------------------------*/
	6615
	6616	static void config_pal14l8_pins(const pal_data* pal, const jed_data* jed)
	6617	{
	6618	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 23};
	6619	static pin_output_config output_pins[] = {
	6620	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6621	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6622	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6623	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6624	{19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6625	{20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6626	{21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6627	{22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6628
	6629	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6630	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6631	}
	6632
	6633
	6634
	6635	/*-------------------------------------------------
	6636	config_pal16h6_pins - configures the pins for
	6637	a PAL16H6
	6638	-------------------------------------------------*/
	6639
	6640	static void config_pal16h6_pins(const pal_data* pal, const jed_data* jed)
	6641	{
	6642	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 22, 23};
	6643	static pin_output_config output_pins[] = {
	6644	{16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6645	{17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6646	{18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6647	{19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6648	{20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6649	{21, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6650
	6651	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6652	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6653	}
	6654
	6655
	6656
	6657	/*-------------------------------------------------
	6658	config_pal16l6_pins - configures the pins for
	6659	a PAL16L6
	6660	-------------------------------------------------*/
	6661
	6662	static void config_pal16l6_pins(const pal_data* pal, const jed_data* jed)
	6663	{
	6664	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 22, 23};
	6665	static pin_output_config output_pins[] = {
	6666	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6667	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6668	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6669	{19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6670	{20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6671	{21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6672
	6673	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6674	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6675	}
	6676
	6677
	6678
	6679	/*-------------------------------------------------
	6680	config_pal18h4_pins - configures the pins for
	6681	a PAL18H4
	6682	-------------------------------------------------*/
	6683
	6684	static void config_pal18h4_pins(const pal_data* pal, const jed_data* jed)
	6685	{
	6686	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 21, 22, 23};
	6687	static pin_output_config output_pins[] = {
	6688	{17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6689	{18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6690	{19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6691	{20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6692
	6693	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6694	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6695	}
	6696
	6697
	6698
	6699	/*-------------------------------------------------
	6700	config_pal18l4_pins - configures the pins for
	6701	a PAL18L4
	6702	-------------------------------------------------*/
	6703
	6704	static void config_pal18l4_pins(const pal_data* pal, const jed_data* jed)
	6705	{
	6706	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 21, 22, 23};
	6707	static pin_output_config output_pins[] = {
	6708	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6709	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6710	{19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6711	{20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6712
	6713	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6714	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6715	}
	6716
	6717
	6718
	6719	/*-------------------------------------------------
	6720	config_pal20c1_pins - configures the pins for
	6721	a PAL20C1
	6722	-------------------------------------------------*/
	6723
	6724	static void config_pal20c1_pins(const pal_data* pal, const jed_data* jed)
	6725	{
	6726	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 20, 21, 22, 23};
	6727	static pin_output_config output_pins[] = {
	6728	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6729	{19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6730
	6731	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6732	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6733	}
	6734
	6735
	6736
	6737	/*-------------------------------------------------
	6738	config_pal20l2_pins - configures the pins for
	6739	a PAL20L2
	6740	-------------------------------------------------*/
	6741
	6742	static void config_pal20l2_pins(const pal_data* pal, const jed_data* jed)
	6743	{
	6744	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 20, 21, 22, 23};
	6745	static pin_output_config output_pins[] = {
	6746	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
	6747	{19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
	6748
	6749	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	6750	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	6751	}
	6752
	6753
	6754
	6755	/*-------------------------------------------------
3761	6756	is_gal16v8_product_term_enabled - determines if
3762	6757	a fuse row in a GAL16V8 is enabled
3763	6758	-------------------------------------------------*/
r26289	r26290
4047	7042
4048	7043	switch (err)
4049	7044	{
4050		case JEDERR_INVALID_DATA:   fprintf(stderr, "Fatal error: Invalid source file\n"); return 1;
4051		case JEDERR_BAD_XMIT_SUM:   fprintf(stderr, "Fatal error: Bad transmission checksum\n"); return 1;
4052		case JEDERR_BAD_FUSE_SUM:   fprintf(stderr, "Fatal error: Bad fusemap checksum\n"); return 1;
	7045	case JEDERR_INVALID_DATA:   fprintf(stderr, "Fatal error: Invalid source file\n"); free(srcbuf); return 1;
	7046	case JEDERR_BAD_XMIT_SUM:   fprintf(stderr, "Fatal error: Bad transmission checksum\n"); free(srcbuf); return 1;
	7047	case JEDERR_BAD_FUSE_SUM:   fprintf(stderr, "Fatal error: Bad fusemap checksum\n"); free(srcbuf); return 1;
4053	7048	}
4054	7049
4055	7050	/* override the number of fuses */
r26289	r26290
4081	7076	err = jedbin_parse(srcbuf, srcbuflen, &jed);
4082	7077	switch (err)
4083	7078	{
4084		case JEDERR_INVALID_DATA:   fprintf(stderr, "Fatal error: Invalid binary JEDEC file\n"); return 1;
	7079	case JEDERR_INVALID_DATA:   fprintf(stderr, "Fatal error: Invalid binary JEDEC file\n"); free(srcbuf); return 1;
4085	7080	}
4086	7081
4087	7082	/* print out data */
r26289	r26290
4119	7114
4120	7115	static int command_view(int argc, char *argv[])
4121	7116	{
	7117	int result = 0;
4122	7118	const char *srcfile, *palname;
4123	7119	int is_jed;
4124	7120	const pal_data* pal;
r26289	r26290
4149	7145	err = read_source_file(srcfile);
4150	7146	if (err != 0)
4151	7147	{
4152		free(srcbuf);
4153		return 1;
	7148	result = 1;
	7149	goto end;
4154	7150	}
4155	7151
4156	7152	/* if the source is JED, convert to binary */
r26289	r26290
4160	7156	err = jed_parse(srcbuf, srcbuflen, &jed);
4161	7157	switch (err)
4162	7158	{
4163		case JEDERR_INVALID_DATA:   fprintf(stderr, "Fatal error: Invalid .JED file\n"); return 1;
4164		case JEDERR_BAD_XMIT_SUM:   fprintf(stderr, "Fatal error: Bad transmission checksum\n"); return 1;
4165		case JEDERR_BAD_FUSE_SUM:   fprintf(stderr, "Fatal error: Bad fusemap checksum\n"); return 1;
	7159	case JEDERR_INVALID_DATA:   fprintf(stderr, "Fatal error: Invalid .JED file\n"); result = 1; goto end;
	7160	case JEDERR_BAD_XMIT_SUM:   fprintf(stderr, "Fatal error: Bad transmission checksum\n"); result = 1; goto end;
	7161	case JEDERR_BAD_FUSE_SUM:   fprintf(stderr, "Fatal error: Bad fusemap checksum\n"); result = 1; goto end;
4166	7162	}
4167	7163	}
4168	7164	else
r26289	r26290
4171	7167	err = jedbin_parse(srcbuf, srcbuflen, &jed);
4172	7168	switch (err)
4173	7169	{
4174		case JEDERR_INVALID_DATA:   fprintf(stderr, "Fatal error: Invalid binary JEDEC file\n"); return 1;
	7170	case JEDERR_INVALID_DATA:   fprintf(stderr, "Fatal error: Invalid binary JEDEC file\n"); result = 1; goto end;
4175	7171	}
4176	7172	}
4177	7173
	7174	if (jed.numfuses != pal->numfuses)
	7175	{
	7176	fprintf(stderr, "Fuse count does not match this pal type.");
	7177	result = 1;
	7178	goto end;
	7179	}
	7180
4178	7181	/* generate equations from fuse map */
4179	7182
4180	7183	pal->config_pins(pal, &jed);
r26289	r26290
4186	7189	else
4187	7190	{
4188	7191	fprintf(stderr, "Viewing product terms not supported for this pal type.");
4189		free(srcbuf);
4190		return 1;
	7192	result = 1;
4191	7193	}
4192	7194
	7195	end:
4193	7196	free(srcbuf);
4194		return 0;
	7197	return result;
4195	7198	}
4196	7199
4197	7200

trunk/src/regtests/jedutil/baseline/pal20x4/pal20x4.txt

r26289	r26290
33	33	o16.oe = /i3 & i4
34	34
35	35	/rf17 := /i2 +
36		/rf18 +
	36	/rf18 :+:
37	37	i5 & i6 +
38	38	rf18
39	39	rf17.oe = OE
40	40
41	41	/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
42		i3 & rf19 +
	42	i3 & rf19 :+:
43	43	/i2 & /i7 +
44	44	/i3 & /rf19
45	45	rf18.oe = OE
46	46
47	47	/rf19 := i5 & i6 & /i7 & i10 +
48		i3 & i6 & i7 +
	48	i3 & i6 & i7 :+:
49	49	i5 & rf20 +
50	50	/i4 & /rf20 & o23
51	51	rf19.oe = OE
52	52
53	53	/rf20 := /i10 & rf17 +
54		/i11 +
	54	/i11 :+:
55	55	i4 & /rf17 +
56	56	i2 & /o23
57	57	rf20.oe = OE

trunk/src/regtests/jedutil/baseline/pal20x8/pal20x8.txt

r26289	r26290
23	23	o14.oe = i6
24	24
25	25	/rf15 := i2 & i6 & i7 +
26		i6 & rf16 +
	26	i6 & rf16 :+:
27	27	i3 & /rf16 +
28	28	i7
29	29	rf15.oe = OE
30	30
31	31	/rf16 := /i3 & /rf17 +
32		/i4 +
	32	/i4 :+:
33	33	/i3 & i4 +
34	34	/i7 & rf17
35	35	rf16.oe = OE
36	36
37	37	/rf17 := /i2 +
38		/rf18 +
	38	/rf18 :+:
39	39	i5 & i6 +
40	40	rf18
41	41	rf17.oe = OE
42	42
43	43	/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
44		i3 & rf19 +
	44	i3 & rf19 :+:
45	45	/i2 & /i7 +
46	46	/i3 & /rf19
47	47	rf18.oe = OE
48	48
49	49	/rf19 := i5 & i6 & /i7 & i10 +
50		i3 & i6 & i7 +
	50	i3 & i6 & i7 :+:
51	51	i5 & rf20 +
52	52	/i4 & /rf20 & o23
53	53	rf19.oe = OE
54	54
55	55	/rf20 := /i10 & rf17 +
56		/i11 +
	56	/i11 :+:
57	57	i4 & /rf17 +
58	58	i2 & /o23
59	59	rf20.oe = OE
60	60
61	61	/rf21 := /i2 & rf17 +
62		/i10 & i11 +
	62	/i10 & i11 :+:
63	63	/o14 & rf15 +
64	64	i8 & i9 & /rf22
65	65	rf21.oe = OE
66	66
67	67	/rf22 := o14 & /rf15 +
68		i3 & /rf21 +
	68	i3 & /rf21 :+:
69	69	/i8 & rf21 +
70	70	rf16 & /rf20
71	71	rf22.oe = OE

trunk/src/regtests/jedutil/baseline/palce16v8/pal16r4-as-palce16v8.txt

r0	r26290
	1	Inputs:
	2
	3	2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19
	4
	5	Outputs:
	6
	7	12 (Combinatorial, Output feedback output, Active low)
	8	13 (Combinatorial, Output feedback output, Active low)
	9	14 (Registered, Output feedback registered, Active low)
	10	15 (Registered, Output feedback registered, Active low)
	11	16 (Registered, Output feedback registered, Active low)
	12	17 (Registered, Output feedback registered, Active low)
	13	18 (Combinatorial, Output feedback output, Active low)
	14	19 (Combinatorial, Output feedback output, Active low)
	15
	16	Equations:
	17
	18	/o12 = i3 & /i4 +
	19	/o19 +
	20	/i2 +
	21	/i5 +
	22	/i6 +
	23	/i7 +
	24	i2 & /i8 & o19
	25	o12.oe = i4 & /i9
	26
	27	/o13 = /rf14 +
	28	i3 & i7 +
	29	i4 & i5 +
	30	i6 +
	31	/i6 & /i9 & rf14 +
	32	/i2 & /i8 +
	33	i8 & /i9
	34	o13.oe = rf14
	35
	36	/rf14 := i2 & i9 +
	37	/i2 & rf15 +
	38	i4 & /rf15 +
	39	i3 & /i8 +
	40	i3 & /i4 +
	41	/i5 & /i7 +
	42	/i7 & /i9 +
	43	/i4 & i5
	44	rf14.oe = OE
	45
	46	/rf15 := i5 & i9 +
	47	i3 & i4 & /i9 +
	48	/rf16 +
	49	/i2 & /i6 +
	50	/i4 & /i9 +
	51	/i3 & rf16 +
	52	/i8 +
	53	/i5 & i8
	54	rf15.oe = OE
	55
	56	/rf16 := /i8 +
	57	/i7 +
	58	/i6 +
	59	/i5 +
	60	/i4 +
	61	/i3 & /rf17 +
	62	/i2 +
	63	i2 & i3 & i4 & i5 & i6 & i7 & i8 & i9 & rf17
	64	rf16.oe = OE
	65
	66	/rf17 := i9 +
	67	i8 & o18 +
	68	i7 +
	69	i6 +
	70	i5 +
	71	i4 & /o18 +
	72	i3 +
	73	/i2
	74	rf17.oe = OE
	75
	76	/o18 = /i3 & o19 +
	77	/i5 +
	78	/i7 +
	79	/i9 +
	80	/i2 +
	81	/i4 & /o19 +
	82	/i6
	83	o18.oe = i8
	84
	85	/o19 = i2 +
	86	/i5 +
	87	i3 & /o12 +
	88	i9 +
	89	/i2 & /i3 +
	90	/i7 & i9 & o12 +
	91	i5 & i8
	92	o19.oe = i4
	93

Property changes on: trunk/src/regtests/jedutil/baseline/palce16v8/pal16r4-as-palce16v8.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/palce16v8/pal12h6-as-palce16v8.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19
	4
	5	Outputs:
	6
	7	13 (Combinatorial, No output feedback, Active high)
	8	14 (Combinatorial, No output feedback, Active high)
	9	15 (Combinatorial, No output feedback, Active high)
	10	16 (Combinatorial, No output feedback, Active high)
	11	17 (Combinatorial, No output feedback, Active high)
	12	18 (Combinatorial, No output feedback, Active high)
	13
	14	Equations:
	15
	16	o13 = /i2 +
	17	/i4 +
	18	/i3 & /i6 +
	19	/i8 +
	20	/i11 +
	21	/i9 +
	22	/i1 & /i7 +
	23	/i5
	24	o13.oe = vcc
	25
	26	o14 = i4 +
	27	/i8 & i11 +
	28	/i6 +
	29	/i2 +
	30	i5 & /i11 +
	31	i7 +
	32	/i3 & /i9 +
	33	/i1 & /i12
	34	o14.oe = vcc
	35
	36	o15 = i5 & i19 +
	37	/i1 +
	38	i1 & i7 +
	39	/i3 +
	40	i1 & /i3 +
	41	i2 & i9 +
	42	/i8 +
	43	i4
	44	o15.oe = vcc
	45
	46	o16 = i6 +
	47	i3 & i11 +
	48	i6 & i8 +
	49	/i1 +
	50	/i8 +
	51	/i7 & /i8 +
	52	/i2 & /i9 +
	53	/i5 & i7 & i8
	54	o16.oe = vcc
	55
	56	o17 = i7 & i12 +
	57	i2 & i9 +
	58	i3 & i4 +
	59	/i5 +
	60	/i9 +
	61	/i8 +
	62	/i1 & /i11 +
	63	i6 & i9
	64	o17.oe = vcc
	65
	66	o18 = /i1 +
	67	/i3 +
	68	/i5 +
	69	/i7 +
	70	/i9 & /i19 +
	71	/i11 +
	72	i1 & i7 & i11 +
	73	i3 & i5 & i9
	74	o18.oe = vcc
	75

Property changes on: trunk/src/regtests/jedutil/baseline/palce16v8/pal12h6-as-palce16v8.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/palce16v8/pal10h8-as-palce16v8.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 11
	4
	5	Outputs:
	6
	7	12 (Combinatorial, No output feedback, Active high)
	8	13 (Combinatorial, No output feedback, Active high)
	9	14 (Combinatorial, No output feedback, Active high)
	10	15 (Combinatorial, No output feedback, Active high)
	11	16 (Combinatorial, No output feedback, Active high)
	12	17 (Combinatorial, No output feedback, Active high)
	13	18 (Combinatorial, No output feedback, Active high)
	14	19 (Combinatorial, No output feedback, Active high)
	15
	16	Equations:
	17
	18	o12 = i2 +
	19	i1 & i3 +
	20	i4 & /i11 +
	21	i5 +
	22	i6 +
	23	/i1 & i7 +
	24	i8 +
	25	i9 & i11
	26	o12.oe = vcc
	27
	28	o13 = /i2 +
	29	/i4 +
	30	/i3 & /i6 +
	31	/i8 +
	32	/i11 +
	33	/i9 +
	34	/i1 & /i7 +
	35	/i5
	36	o13.oe = vcc
	37
	38	o14 = i4 +
	39	/i8 & i11 +
	40	/i6 +
	41	/i2 +
	42	i5 & /i11 +
	43	i7 +
	44	/i3 & /i9 +
	45	/i1
	46	o14.oe = vcc
	47
	48	o15 = i5 +
	49	/i1 +
	50	i1 & i7 +
	51	/i3 +
	52	i1 & /i3 +
	53	i2 & i9 +
	54	/i8 +
	55	i4
	56	o15.oe = vcc
	57
	58	o16 = i6 +
	59	i3 & i11 +
	60	i6 & i8 +
	61	/i1 +
	62	/i8 +
	63	/i7 & /i8 +
	64	/i2 & /i9 +
	65	/i5 & i7 & i8
	66	o16.oe = vcc
	67
	68	o17 = i7 +
	69	i2 & i9 +
	70	i3 & i4 +
	71	/i5 +
	72	/i9 +
	73	/i8 +
	74	/i1 & /i11 +
	75	i6 & i9
	76	o17.oe = vcc
	77
	78	o18 = /i1 +
	79	/i3 +
	80	/i5 +
	81	/i7 +
	82	/i9 +
	83	/i11 +
	84	i1 & i7 & i11 +
	85	i3 & i5 & i9
	86	o18.oe = vcc
	87
	88	o19 = i3 & i11 +
	89	i1 +
	90	/i1 & /i9 +
	91	/i3 & /i5 & /i7 +
	92	i2 +
	93	i4 +
	94	i6 +
	95	i8
	96	o19.oe = vcc
	97

Property changes on: trunk/src/regtests/jedutil/baseline/palce16v8/pal10h8-as-palce16v8.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/palce16v8/pal14h4-as-palce16v8.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19
	4
	5	Outputs:
	6
	7	14 (Combinatorial, No output feedback, Active high)
	8	15 (Combinatorial, No output feedback, Active high)
	9	16 (Combinatorial, No output feedback, Active high)
	10	17 (Combinatorial, No output feedback, Active high)
	11
	12	Equations:
	13
	14	o14 = /i1 +
	15	/i3 & /i9 +
	16	i7 & i12 +
	17	i5 & /i11 +
	18	/i2 +
	19	/i12 +
	20	/i8 & i11 +
	21	i4
	22	o14.oe = vcc
	23
	24	o15 = i4 +
	25	/i8 +
	26	i2 & i9 +
	27	/i3 & i13 +
	28	/i3 +
	29	i1 & i7 +
	30	/i13 +
	31	i5
	32	o15.oe = vcc
	33
	34	o16 = /i5 & i7 & i8 +
	35	/i2 & /i9 +
	36	/i7 & /i8 +
	37	/i18 +
	38	/i1 +
	39	i6 & i18 +
	40	i3 & i11 +
	41	i6
	42	o16.oe = vcc
	43
	44	o17 = i6 & i9 +
	45	/i1 & /i11 +
	46	/i19 +
	47	/i9 +
	48	/i5 +
	49	i3 & i4 +
	50	i2 & i19 +
	51	i7
	52	o17.oe = vcc
	53

Property changes on: trunk/src/regtests/jedutil/baseline/palce16v8/pal14h4-as-palce16v8.txt

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/baseline/pal16rp4/pal16rp4.txt

r0	r26290
	1	Inputs:
	2
	3	2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19
	4
	5	Outputs:
	6
	7	12 (Combinatorial, Output feedback output, Active high)
	8	13 (Combinatorial, Output feedback output, Active low)
	9	14 (Registered, Output feedback registered, Active low)
	10	15 (Registered, Output feedback registered, Active low)
	11	16 (Registered, Output feedback registered, Active high)
	12	17 (Registered, Output feedback registered, Active low)
	13	18 (Combinatorial, Output feedback output, Active high)
	14	19 (Combinatorial, Output feedback output, Active low)
	15
	16	Equations:
	17
	18	o12 = /i2 & /i3 +
	19	i4 & o13 +
	20	i3 +
	21	/i6 +
	22	i8 +
	23	/i9 +
	24	i7 & /o13
	25	o12.oe = rf14
	26
	27	/o13 = /rf14 +
	28	/i9 +
	29	i8 +
	30	/i7 +
	31	/i6 & /rf14 +
	32	i5 +
	33	i4
	34	o13.oe = i2 & rf14
	35
	36	/rf14 := /rf15 +
	37	/i8 +
	38	i8 +
	39	/i2 & /rf15 +
	40	/i2 +
	41	i2 & /i8 & rf15 +
	42	/i4 +
	43	i3
	44	rf14.oe = OE
	45
	46	/rf15 := i3 & i6 & i7 +
	47	i6 & rf16 +
	48	i3 & /rf16 +
	49	i7 +
	50	/i4 +
	51	i6 & i7 +
	52	i4 & i7 +
	53	/i2 & /i7
	54	rf15.oe = OE
	55
	56	rf16 := /i3 & /rf17 +
	57	/i4 +
	58	/i3 +
	59	/i3 & i4 +
	60	/i7 & rf17 +
	61	/i7 +
	62	i4 +
	63	i2 & i3
	64	rf16.oe = OE
	65
	66	/rf17 := i2 & i5 & i6 & /i7 +
	67	i2 & /o18 +
	68	i5 +
	69	i6 +
	70	/i7 & o18 +
	71	i2 & /i7 +
	72	i5 & i6 +
	73	/i3
	74	rf17.oe = OE
	75
	76	o18 = /i2 & i5 & i6 & /i7 +
	77	i3 & i6 & i7 +
	78	i3 +
	79	/i2 & /i7 +
	80	/i3 +
	81	i5 & i6 & /i7 +
	82	i7
	83	o18.oe = vcc
	84
	85	/o19 = i5 & i6 & /i7 +
	86	i3 & i6 & i7 +
	87	i5 +
	88	i6 +
	89	i7 +
	90	/i4 +
	91	/i7
	92	o19.oe = vcc
	93

Property changes on: trunk/src/regtests/jedutil/baseline/pal16rp4/pal16rp4.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal16rp6/pal16rp6.txt

r0	r26290
	1	Inputs:
	2
	3	2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19
	4
	5	Outputs:
	6
	7	12 (Combinatorial, Output feedback output, Active high)
	8	13 (Registered, Output feedback registered, Active low)
	9	14 (Registered, Output feedback registered, Active low)
	10	15 (Registered, Output feedback registered, Active high)
	11	16 (Registered, Output feedback registered, Active high)
	12	17 (Registered, Output feedback registered, Active low)
	13	18 (Registered, Output feedback registered, Active low)
	14	19 (Combinatorial, Output feedback output, Active high)
	15
	16	Equations:
	17
	18	o12 = /i2 & /i3 +
	19	i4 & rf13 +
	20	i3 +
	21	/i6 +
	22	i8 +
	23	/i9 +
	24	i7 & /rf13
	25	o12.oe = rf14
	26
	27	/rf13 := /rf14 +
	28	/i9 +
	29	i8 +
	30	/i7 +
	31	/i6 & /rf14 +
	32	i5 & rf14 +
	33	i4 +
	34	/i2
	35	rf13.oe = OE
	36
	37	/rf14 := /rf15 +
	38	/i8 +
	39	i8 +
	40	/i2 & /rf15 +
	41	/i2 +
	42	i2 & /i8 & rf15 +
	43	/i4 +
	44	i3
	45	rf14.oe = OE
	46
	47	rf15 := i3 & i6 & i7 +
	48	i6 & rf16 +
	49	i3 & /rf16 +
	50	i7 +
	51	/i4 +
	52	i6 & i7 +
	53	i4 & i7 +
	54	/i2 & /i7
	55	rf15.oe = OE
	56
	57	rf16 := /i3 & /rf17 +
	58	/i4 +
	59	/i3 +
	60	/i3 & i4 +
	61	/i7 & rf17 +
	62	/i7 +
	63	i4 +
	64	i2 & i3
	65	rf16.oe = OE
	66
	67	/rf17 := i2 & i5 & i6 & /i7 +
	68	i2 & /rf18 +
	69	i5 +
	70	i6 +
	71	/i7 & rf18 +
	72	i2 & /i7 +
	73	i5 & i6 +
	74	/i3
	75	rf17.oe = OE
	76
	77	/rf18 := /i2 & i5 & i6 & /i7 +
	78	i3 & i6 & i7 +
	79	i3 +
	80	/i2 & /i7 +
	81	/i3 +
	82	i5 & i6 & /i7 +
	83	i7 +
	84	i4
	85	rf18.oe = OE
	86
	87	o19 = i5 & i6 & /i7 +
	88	i3 & i6 & i7 +
	89	i5 +
	90	i6 +
	91	i7 +
	92	/i4 +
	93	/i7
	94	o19.oe = vcc
	95

Property changes on: trunk/src/regtests/jedutil/baseline/pal16rp6/pal16rp6.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal16rp8/pal16rp8.txt

r0	r26290
	1	Inputs:
	2
	3	2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19
	4
	5	Outputs:
	6
	7	12 (Registered, Output feedback registered, Active low)
	8	13 (Registered, Output feedback registered, Active low)
	9	14 (Registered, Output feedback registered, Active high)
	10	15 (Registered, Output feedback registered, Active low)
	11	16 (Registered, Output feedback registered, Active low)
	12	17 (Registered, Output feedback registered, Active low)
	13	18 (Registered, Output feedback registered, Active high)
	14	19 (Registered, Output feedback registered, Active low)
	15
	16	Equations:
	17
	18	/rf12 := /i2 & /i3 +
	19	i4 & rf13 +
	20	i3 +
	21	/i6 +
	22	i8 +
	23	/i9 +
	24	i7 & /rf13 +
	25	i5
	26	rf12.oe = OE
	27
	28	/rf13 := /rf14 +
	29	/i9 +
	30	i8 +
	31	/i7 +
	32	/i6 & rf14 +
	33	i5 +
	34	i4 +
	35	/i3
	36	rf13.oe = OE
	37
	38	rf14 := /rf15 +
	39	/i8 +
	40	i8 +
	41	/i2 & /rf15 +
	42	/i2 +
	43	i2 & /i8 & rf15 +
	44	/i4 +
	45	i3
	46	rf14.oe = OE
	47
	48	/rf15 := i3 & i6 & i7 +
	49	i6 & rf16 +
	50	i3 & /rf16 +
	51	i7 +
	52	/i4 +
	53	i6 & i7 +
	54	i4 & i7 +
	55	/i2 & /i7
	56	rf15.oe = OE
	57
	58	/rf16 := /i3 & /rf17 +
	59	/i4 +
	60	/i3 +
	61	/i3 & i4 +
	62	/i7 & rf17 +
	63	/i7 +
	64	i4 +
	65	i2 & i3
	66	rf16.oe = OE
	67
	68	/rf17 := i2 & i5 & i6 & /i7 +
	69	i2 & /rf18 +
	70	i5 +
	71	i6 +
	72	/i7 & rf18 +
	73	i2 & /i7 +
	74	i5 & i6 +
	75	/i3
	76	rf17.oe = OE
	77
	78	rf18 := /i2 & i5 & i6 & /i7 +
	79	i3 & i6 & i7 +
	80	i3 & rf19 +
	81	/i2 & /i7 +
	82	/i3 & /rf19 +
	83	i5 & i6 & /i7 +
	84	i7 +
	85	/i4
	86	rf18.oe = OE
	87
	88	/rf19 := i5 & i6 & /i7 +
	89	i3 & i6 & i7 +
	90	i5 & rf12 +
	91	i6 +
	92	i7 +
	93	/i4 & /rf12 +
	94	/i7 +
	95	i2
	96	rf19.oe = OE
	97

Property changes on: trunk/src/regtests/jedutil/baseline/pal16rp8/pal16rp8.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal14h8/pal14h8.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 23
	4
	5	Outputs:
	6
	7	15 (Combinatorial, No output feedback, Active high)
	8	16 (Combinatorial, No output feedback, Active high)
	9	17 (Combinatorial, No output feedback, Active high)
	10	18 (Combinatorial, No output feedback, Active high)
	11	19 (Combinatorial, No output feedback, Active high)
	12	20 (Combinatorial, No output feedback, Active high)
	13	21 (Combinatorial, No output feedback, Active high)
	14	22 (Combinatorial, No output feedback, Active high)
	15
	16	Equations:
	17
	18	o15 = /i1 & /i2 +
	19	/i3 +
	20	/i4 +
	21	/i5 & /i6
	22	o15.oe = vcc
	23
	24	o16 = /i7 +
	25	/i8
	26	o16.oe = vcc
	27
	28	o17 = /i9 & /i10 +
	29	/i13
	30	o17.oe = vcc
	31
	32	o18 = i1 & i2 & i3 +
	33	i4 & i5 & i6 & /i14
	34	o18.oe = vcc
	35
	36	o19 = i7 +
	37	i8
	38	o19.oe = vcc
	39
	40	o20 = i9 & i10 & i14 +
	41	i13
	42	o20.oe = vcc
	43
	44	o21 = /i2 & i5 & i6 & /i7 +
	45	i3 & i6 & i7 & i13 & i23
	46	o21.oe = vcc
	47
	48	o22 = i5 & i6 +
	49	/i7 & i11 +
	50	/i23 +
	51	/i1 & i3 & i6 & i7 & i10
	52	o22.oe = vcc
	53

Property changes on: trunk/src/regtests/jedutil/baseline/pal14h8/pal14h8.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal16h6/pal16h6.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 22, 23
	4
	5	Outputs:
	6
	7	16 (Combinatorial, No output feedback, Active high)
	8	17 (Combinatorial, No output feedback, Active high)
	9	18 (Combinatorial, No output feedback, Active high)
	10	19 (Combinatorial, No output feedback, Active high)
	11	20 (Combinatorial, No output feedback, Active high)
	12	21 (Combinatorial, No output feedback, Active high)
	13
	14	Equations:
	15
	16	o16 = /i1 & /i2 +
	17	/i3 & /i7 +
	18	/i4 & /i8 +
	19	/i5 & /i6
	20	o16.oe = vcc
	21
	22	o17 = /i9 & /i10 +
	23	/i13 & /i15 +
	24	i1 & i2 & i3 +
	25	i4 & i5 & i6 & /i14
	26	o17.oe = vcc
	27
	28	o18 = i7 +
	29	i8 & i15
	30	o18.oe = vcc
	31
	32	o19 = i9 & i10 & i14 +
	33	i13 & /i22
	34	o19.oe = vcc
	35
	36	o20 = /i2 & i5 +
	37	i6 & /i7 +
	38	i3 & i6 +
	39	i7 & i13 & i23
	40	o20.oe = vcc
	41
	42	o21 = i5 & i6 & i22 +
	43	/i7 & i11 +
	44	/i23 +
	45	/i1 & i3 & i6 & i7 & i10
	46	o21.oe = vcc
	47

Property changes on: trunk/src/regtests/jedutil/baseline/pal16h6/pal16h6.txt

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/baseline/pal18h4/pal18h4.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 21, 22, 23
	4
	5	Outputs:
	6
	7	17 (Combinatorial, No output feedback, Active high)
	8	18 (Combinatorial, No output feedback, Active high)
	9	19 (Combinatorial, No output feedback, Active high)
	10	20 (Combinatorial, No output feedback, Active high)
	11
	12	Equations:
	13
	14	o17 = /i1 & /i2 +
	15	/i3 & /i7 +
	16	/i4 & /i8 & i16 +
	17	/i5 & /i6 +
	18	/i9 & /i10 +
	19	/i13 & /i15
	20	o17.oe = vcc
	21
	22	o18 = i1 & i2 & i3 +
	23	i4 & i5 & i6 & /i14 +
	24	i7 & /i16 +
	25	i8 & i15
	26	o18.oe = vcc
	27
	28	o19 = i9 & i10 & i14 +
	29	i13 & /i22 +
	30	/i2 & i5 & /i21 +
	31	i6 & /i7
	32	o19.oe = vcc
	33
	34	o20 = i3 & i6 +
	35	i7 & i13 & i23 +
	36	i5 & i6 & i22 +
	37	/i7 & i11 +
	38	i21 & /i23 +
	39	/i1 & i3 & i6 & i7 & i10
	40	o20.oe = vcc
	41

Property changes on: trunk/src/regtests/jedutil/baseline/pal18h4/pal18h4.txt

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/baseline/pal16l6/pal16l6.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 22, 23
	4
	5	Outputs:
	6
	7	16 (Combinatorial, No output feedback, Active low)
	8	17 (Combinatorial, No output feedback, Active low)
	9	18 (Combinatorial, No output feedback, Active low)
	10	19 (Combinatorial, No output feedback, Active low)
	11	20 (Combinatorial, No output feedback, Active low)
	12	21 (Combinatorial, No output feedback, Active low)
	13
	14	Equations:
	15
	16	/o16 = /i1 & /i2 +
	17	/i3 & /i7 +
	18	/i4 & /i8 +
	19	/i5 & /i6
	20	o16.oe = vcc
	21
	22	/o17 = /i9 & /i10 +
	23	/i13 & /i15 +
	24	i1 & i2 & i3 +
	25	i4 & i5 & i6 & /i14
	26	o17.oe = vcc
	27
	28	/o18 = i7 +
	29	i8 & i15
	30	o18.oe = vcc
	31
	32	/o19 = i9 & i10 & i14 +
	33	i13 & /i22
	34	o19.oe = vcc
	35
	36	/o20 = /i2 & i5 +
	37	i6 & /i7 +
	38	i3 & i6 +
	39	i7 & i13 & i23
	40	o20.oe = vcc
	41
	42	/o21 = i5 & i6 & i22 +
	43	/i7 & i11 +
	44	/i23 +
	45	/i1 & i3 & i6 & i7 & i10
	46	o21.oe = vcc
	47

Property changes on: trunk/src/regtests/jedutil/baseline/pal16l6/pal16l6.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal14p4/pal14p4.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19
	4
	5	Outputs:
	6
	7	14 (Combinatorial, No output feedback, Active low)
	8	15 (Combinatorial, No output feedback, Active high)
	9	16 (Combinatorial, No output feedback, Active high)
	10	17 (Combinatorial, No output feedback, Active low)
	11
	12	Equations:
	13
	14	/o14 = i9 & i11 +
	15	i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	16	i12 & i18 +
	17	/i13 & /i19
	18	o14.oe = vcc
	19
	20	o15 = /i9 & i11 +
	21	i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8 +
	22	i12 & /i18 +
	23	i13 & /i19
	24	o15.oe = vcc
	25
	26	o16 = i9 & /i11 +
	27	i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8 +
	28	/i12 & /i18 +
	29	/i13 & i19
	30	o16.oe = vcc
	31
	32	/o17 = /i9 & /i11 +
	33	i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8 +
	34	/i12 & i13 +
	35	/i18 & i19
	36	o17.oe = vcc
	37

Property changes on: trunk/src/regtests/jedutil/baseline/pal14p4/pal14p4.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal12p6/pal12p6.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19
	4
	5	Outputs:
	6
	7	13 (Combinatorial, No output feedback, Active high)
	8	14 (Combinatorial, No output feedback, Active low)
	9	15 (Combinatorial, No output feedback, Active low)
	10	16 (Combinatorial, No output feedback, Active high)
	11	17 (Combinatorial, No output feedback, Active low)
	12	18 (Combinatorial, No output feedback, Active low)
	13
	14	Equations:
	15
	16	o13 = i9 & /i11 +
	17	i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	18	i12 +
	19	/i19
	20	o13.oe = vcc
	21
	22	/o14 = /i9 & /i11 +
	23	i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8
	24	o14.oe = vcc
	25
	26	/o15 = /i9 & i11 +
	27	i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8
	28	o15.oe = vcc
	29
	30	o16 = i9 & /i11 +
	31	i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8
	32	o16.oe = vcc
	33
	34	/o17 = i9 & i11 +
	35	/i1 & /i2 & i3 & i4 & i5 & i6 & /i7 & /i8
	36	o17.oe = vcc
	37
	38	/o18 = /i9 & /i11 +
	39	i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8 +
	40	/i12 +
	41	i19
	42	o18.oe = vcc
	43

Property changes on: trunk/src/regtests/jedutil/baseline/pal12p6/pal12p6.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal10p8/pal10p8.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 11
	4
	5	Outputs:
	6
	7	12 (Combinatorial, No output feedback, Active high)
	8	13 (Combinatorial, No output feedback, Active high)
	9	14 (Combinatorial, No output feedback, Active low)
	10	15 (Combinatorial, No output feedback, Active low)
	11	16 (Combinatorial, No output feedback, Active high)
	12	17 (Combinatorial, No output feedback, Active low)
	13	18 (Combinatorial, No output feedback, Active low)
	14	19 (Combinatorial, No output feedback, Active low)
	15
	16	Equations:
	17
	18	o12 = i9 & i11 +
	19	/i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8
	20	o12.oe = vcc
	21
	22	o13 = i9 & /i11 +
	23	i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8
	24	o13.oe = vcc
	25
	26	/o14 = /i9 & /i11 +
	27	i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8
	28	o14.oe = vcc
	29
	30	/o15 = /i9 & i11 +
	31	i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8
	32	o15.oe = vcc
	33
	34	o16 = i9 & /i11 +
	35	i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8
	36	o16.oe = vcc
	37
	38	/o17 = i9 & i11 +
	39	/i1 & /i2 & i3 & i4 & i5 & i6 & /i7 & /i8
	40	o17.oe = vcc
	41
	42	/o18 = /i9 & /i11 +
	43	i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8
	44	o18.oe = vcc
	45
	46	/o19 = /i9 & i11 +
	47	i1 & /i2 & i3 & /i4 & i5 & /i6 & i7 & /i8
	48	o19.oe = vcc
	49

Property changes on: trunk/src/regtests/jedutil/baseline/pal10p8/pal10p8.txt

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/baseline/pal14l8/pal14l8.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 23
	4
	5	Outputs:
	6
	7	15 (Combinatorial, No output feedback, Active low)
	8	16 (Combinatorial, No output feedback, Active low)
	9	17 (Combinatorial, No output feedback, Active low)
	10	18 (Combinatorial, No output feedback, Active low)
	11	19 (Combinatorial, No output feedback, Active low)
	12	20 (Combinatorial, No output feedback, Active low)
	13	21 (Combinatorial, No output feedback, Active low)
	14	22 (Combinatorial, No output feedback, Active low)
	15
	16	Equations:
	17
	18	/o15 = /i1 & /i2 +
	19	/i3 +
	20	/i4 +
	21	/i5 & /i6
	22	o15.oe = vcc
	23
	24	/o16 = /i7 +
	25	/i8
	26	o16.oe = vcc
	27
	28	/o17 = /i9 & /i10 +
	29	/i13
	30	o17.oe = vcc
	31
	32	/o18 = i1 & i2 & i3 +
	33	i4 & i5 & i6 & /i14
	34	o18.oe = vcc
	35
	36	/o19 = i7 +
	37	i8
	38	o19.oe = vcc
	39
	40	/o20 = i9 & i10 & i14 +
	41	i13
	42	o20.oe = vcc
	43
	44	/o21 = /i2 & i5 & i6 & /i7 +
	45	i3 & i6 & i7 & i13 & i23
	46	o21.oe = vcc
	47
	48	/o22 = i5 & i6 +
	49	/i7 & i11 +
	50	/i23 +
	51	/i1 & i3 & i6 & i7 & i10
	52	o22.oe = vcc
	53

Property changes on: trunk/src/regtests/jedutil/baseline/pal14l8/pal14l8.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal18l4/pal18l4.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 21, 22, 23
	4
	5	Outputs:
	6
	7	17 (Combinatorial, No output feedback, Active low)
	8	18 (Combinatorial, No output feedback, Active low)
	9	19 (Combinatorial, No output feedback, Active low)
	10	20 (Combinatorial, No output feedback, Active low)
	11
	12	Equations:
	13
	14	/o17 = /i1 & /i2 +
	15	/i3 & /i7 +
	16	/i4 & /i8 & i16 +
	17	/i5 & /i6 +
	18	/i9 & /i10 +
	19	/i13 & /i15
	20	o17.oe = vcc
	21
	22	/o18 = i1 & i2 & i3 +
	23	i4 & i5 & i6 & /i14 +
	24	i7 & /i16 +
	25	i8 & i15
	26	o18.oe = vcc
	27
	28	/o19 = i9 & i10 & i14 +
	29	i13 & /i22 +
	30	/i2 & i5 & /i21 +
	31	i6 & /i7
	32	o19.oe = vcc
	33
	34	/o20 = i3 & i6 +
	35	i7 & i13 & i23 +
	36	i5 & i6 & i22 +
	37	/i7 & i11 +
	38	i21 & /i23 +
	39	/i1 & i3 & i6 & i7 & i10
	40	o20.oe = vcc
	41

Property changes on: trunk/src/regtests/jedutil/baseline/pal18l4/pal18l4.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal6l16/pal6l16.txt

r0	r26290
	1	Inputs:
	2
	3	4, 5, 6, 7, 8, 9
	4
	5	Outputs:
	6
	7	1 (Combinatorial, No output feedback, Active low)
	8	2 (Combinatorial, No output feedback, Active low)
	9	3 (Combinatorial, No output feedback, Active low)
	10	10 (Combinatorial, No output feedback, Active low)
	11	11 (Combinatorial, No output feedback, Active low)
	12	13 (Combinatorial, No output feedback, Active low)
	13	14 (Combinatorial, No output feedback, Active low)
	14	15 (Combinatorial, No output feedback, Active low)
	15	16 (Combinatorial, No output feedback, Active low)
	16	17 (Combinatorial, No output feedback, Active low)
	17	18 (Combinatorial, No output feedback, Active low)
	18	19 (Combinatorial, No output feedback, Active low)
	19	20 (Combinatorial, No output feedback, Active low)
	20	21 (Combinatorial, No output feedback, Active low)
	21	22 (Combinatorial, No output feedback, Active low)
	22	23 (Combinatorial, No output feedback, Active low)
	23
	24	Equations:
	25
	26	/o1 = i4
	27	o1.oe = vcc
	28
	29	/o2 = i5
	30	o2.oe = vcc
	31
	32	/o3 = i6
	33	o3.oe = vcc
	34
	35	/o10 = i7
	36	o10.oe = vcc
	37
	38	/o11 = i8
	39	o11.oe = vcc
	40
	41	/o13 = i9
	42	o13.oe = vcc
	43
	44	/o14 = i4 & i5
	45	o14.oe = vcc
	46
	47	/o15 = /i9
	48	o15.oe = vcc
	49
	50	/o16 = /i8
	51	o16.oe = vcc
	52
	53	/o17 = /i7
	54	o17.oe = vcc
	55
	56	/o18 = /i6
	57	o18.oe = vcc
	58
	59	/o19 = /i5
	60	o19.oe = vcc
	61
	62	/o20 = /i4
	63	o20.oe = vcc
	64
	65	/o21 = /i4 & i5 & /i6 & i7 & /i8 & i9
	66	o21.oe = vcc
	67
	68	/o22 = i4 & /i5 & i6 & /i7 & i8 & /i9
	69	o22.oe = vcc
	70
	71	/o23 = i6 & i9
	72	o23.oe = vcc
	73

Property changes on: trunk/src/regtests/jedutil/baseline/pal6l16/pal6l16.txt

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/baseline/pal8l14/pal8l14.txt

r0	r26290
	1	Inputs:
	2
	3	3, 4, 5, 6, 7, 8, 9, 10
	4
	5	Outputs:
	6
	7	1 (Combinatorial, No output feedback, Active low)
	8	2 (Combinatorial, No output feedback, Active low)
	9	11 (Combinatorial, No output feedback, Active low)
	10	13 (Combinatorial, No output feedback, Active low)
	11	14 (Combinatorial, No output feedback, Active low)
	12	15 (Combinatorial, No output feedback, Active low)
	13	16 (Combinatorial, No output feedback, Active low)
	14	17 (Combinatorial, No output feedback, Active low)
	15	18 (Combinatorial, No output feedback, Active low)
	16	19 (Combinatorial, No output feedback, Active low)
	17	20 (Combinatorial, No output feedback, Active low)
	18	21 (Combinatorial, No output feedback, Active low)
	19	22 (Combinatorial, No output feedback, Active low)
	20	23 (Combinatorial, No output feedback, Active low)
	21
	22	Equations:
	23
	24	/o1 = i3
	25	o1.oe = vcc
	26
	27	/o2 = i4
	28	o2.oe = vcc
	29
	30	/o11 = i5
	31	o11.oe = vcc
	32
	33	/o13 = i6
	34	o13.oe = vcc
	35
	36	/o14 = i7
	37	o14.oe = vcc
	38
	39	/o15 = i8
	40	o15.oe = vcc
	41
	42	/o16 = i9
	43	o16.oe = vcc
	44
	45	/o17 = i10
	46	o17.oe = vcc
	47
	48	/o18 = /i3
	49	o18.oe = vcc
	50
	51	/o19 = /i4 & /i9
	52	o19.oe = vcc
	53
	54	/o20 = /i5
	55	o20.oe = vcc
	56
	57	/o21 = /i6 & /i10
	58	o21.oe = vcc
	59
	60	/o22 = /i7
	61	o22.oe = vcc
	62
	63	/o23 = /i8
	64	o23.oe = vcc
	65

Property changes on: trunk/src/regtests/jedutil/baseline/pal8l14/pal8l14.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal16p2/pal16p2.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19
	4
	5	Outputs:
	6
	7	15 (Combinatorial, No output feedback, Active high)
	8	16 (Combinatorial, No output feedback, Active low)
	9
	10	Equations:
	11
	12	o15 = /i9 & i11 +
	13	i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8 +
	14	i12 & /i18 +
	15	i13 & /i19 +
	16	i14 +
	17	/i18 +
	18	/i1 & /i6 +
	19	/i2 & /i3
	20	o15.oe = vcc
	21
	22	/o16 = i9 & /i11 +
	23	i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8 +
	24	/i12 & /i18 +
	25	/i13 & i19 +
	26	/i14 +
	27	i18 +
	28	/i4 +
	29	i6 & i8
	30	o16.oe = vcc
	31

Property changes on: trunk/src/regtests/jedutil/baseline/pal16p2/pal16p2.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal12h10/pal12h10.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13
	4
	5	Outputs:
	6
	7	14 (Combinatorial, No output feedback, Active high)
	8	15 (Combinatorial, No output feedback, Active high)
	9	16 (Combinatorial, No output feedback, Active high)
	10	17 (Combinatorial, No output feedback, Active high)
	11	18 (Combinatorial, No output feedback, Active high)
	12	19 (Combinatorial, No output feedback, Active high)
	13	20 (Combinatorial, No output feedback, Active high)
	14	21 (Combinatorial, No output feedback, Active high)
	15	22 (Combinatorial, No output feedback, Active high)
	16	23 (Combinatorial, No output feedback, Active high)
	17
	18	Equations:
	19
	20	o14 = /i1 & /i2 & /i3 +
	21	/i4 & /i5 & /i6
	22	o14.oe = vcc
	23
	24	o15 = /i7 +
	25	/i8
	26	o15.oe = vcc
	27
	28	o16 = /i9 & /i10 +
	29	/i13
	30	o16.oe = vcc
	31
	32	o17 = i1 & i2 & i3 +
	33	i4 & i5 & i6
	34	o17.oe = vcc
	35
	36	o18 = i7 +
	37	i8
	38	o18.oe = vcc
	39
	40	o19 = i9 & i10 +
	41	i13
	42	o19.oe = vcc
	43
	44	o20 = /i2 & i5 & i6 & /i7 +
	45	i3 & i6 & i7 & i13
	46	o20.oe = vcc
	47
	48	o21 = i5 & i6 & /i7 & i11 +
	49	/i1 & i3 & i6 & i7 & i10
	50	o21.oe = vcc
	51
	52	o22 = i4 & i13 +
	53	i9 & /i10 & /i11
	54	o22.oe = vcc
	55
	56	o23 = /i4 & i10 & i11 +
	57	i1 & /i13
	58	o23.oe = vcc
	59

Property changes on: trunk/src/regtests/jedutil/baseline/pal12h10/pal12h10.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal16p8/pal16p8.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18
	4
	5	Outputs:
	6
	7	12 (Combinatorial, Output feedback output, Active low)
	8	13 (Combinatorial, Output feedback output, Active high)
	9	14 (Combinatorial, Output feedback output, Active high)
	10	15 (Combinatorial, Output feedback output, Active low)
	11	16 (Combinatorial, Output feedback output, Active low)
	12	17 (Combinatorial, Output feedback output, Active low)
	13	18 (Combinatorial, Output feedback output, Active low)
	14	19 (Combinatorial, Output feedback output, Active high)
	15
	16	Equations:
	17
	18	/o12 = i3 & i7 & /i9 +
	19	i1 & o13 +
	20	i3 +
	21	/i6 +
	22	i8 +
	23	/i9 +
	24	i7 & /o13
	25	o12.oe = vcc
	26
	27	o13 = i11 & /o14 +
	28	/i9 +
	29	i8 +
	30	/i7 +
	31	/i6 & o14 +
	32	i5 +
	33	i4
	34	o13.oe = i2 & o14
	35
	36	o14 = i1 & /o15 +
	37	/i8 +
	38	i1 & /i8 +
	39	i1 & /i2 & /o15 +
	40	/i2 +
	41	i2 & /i8 & o15 +
	42	i3
	43	o14.oe = vcc
	44
	45	/o15 = i3 & i6 & i7 & /i11 +
	46	i6 & o16 +
	47	i3 & /o16 +
	48	i7 +
	49	/i11 +
	50	i6 & i7 +
	51	i7 & /i11
	52	o15.oe = vcc
	53
	54	/o16 = /i3 & /o17 +
	55	/i4 & /i11 +
	56	/i3 & /i4 +
	57	/i3 & i4 +
	58	/i7 & o17 +
	59	/i7 & /i11 +
	60	i4
	61	o16.oe = vcc
	62
	63	/o17 = i2 & i5 & i6 & /i7 +
	64	i2 & /o18 +
	65	i5 +
	66	i6 +
	67	/i7 & o18 +
	68	i2 & /i7 +
	69	i5 & i6
	70	o17.oe = /o16
	71
	72	/o18 = /i2 & i5 & i6 & /i7 +
	73	i3 & i6 & i7 & i11 +
	74	i3 +
	75	/i2 & /i7 +
	76	i3 & i11 +
	77	i5 & i6 & /i7 +
	78	i7 & i11
	79	o18.oe = vcc
	80
	81	o19 = i5 & i6 & /i7 & i11 +
	82	i3 & i6 & i7 +
	83	i5 +
	84	i6 +
	85	i7 +
	86	i11 +
	87	/i7
	88	o19.oe = vcc
	89

Property changes on: trunk/src/regtests/jedutil/baseline/pal16p8/pal16p8.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal12l10/pal12l10.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13
	4
	5	Outputs:
	6
	7	14 (Combinatorial, No output feedback, Active low)
	8	15 (Combinatorial, No output feedback, Active low)
	9	16 (Combinatorial, No output feedback, Active low)
	10	17 (Combinatorial, No output feedback, Active low)
	11	18 (Combinatorial, No output feedback, Active low)
	12	19 (Combinatorial, No output feedback, Active low)
	13	20 (Combinatorial, No output feedback, Active low)
	14	21 (Combinatorial, No output feedback, Active low)
	15	22 (Combinatorial, No output feedback, Active low)
	16	23 (Combinatorial, No output feedback, Active low)
	17
	18	Equations:
	19
	20	/o14 = /i1 & /i2 & /i3 +
	21	/i4 & /i5 & /i6
	22	o14.oe = vcc
	23
	24	/o15 = /i7 +
	25	/i8
	26	o15.oe = vcc
	27
	28	/o16 = /i9 & /i10 +
	29	/i13
	30	o16.oe = vcc
	31
	32	/o17 = i1 & i2 & i3 +
	33	i4 & i5 & i6
	34	o17.oe = vcc
	35
	36	/o18 = i7 +
	37	i8
	38	o18.oe = vcc
	39
	40	/o19 = i9 & i10 +
	41	i13
	42	o19.oe = vcc
	43
	44	/o20 = /i2 & i5 & i6 & /i7 +
	45	i3 & i6 & i7 & i13
	46	o20.oe = vcc
	47
	48	/o21 = i5 & i6 & /i7 & i11 +
	49	/i1 & i3 & i6 & i7 & i10
	50	o21.oe = vcc
	51
	52	/o22 = i4 & i13 +
	53	i9 & /i10 & /i11
	54	o22.oe = vcc
	55
	56	/o23 = /i4 & i10 & i11 +
	57	i1 & /i13
	58	o23.oe = vcc
	59

Property changes on: trunk/src/regtests/jedutil/baseline/pal12l10/pal12l10.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/baseline/pal20x10/pal20x10.txt

r26289	r26290
18	18	Equations:
19	19
20	20	/rf14 := /i2 & rf15 +
21		i11 & /rf15 +
	21	i11 & /rf15 :+:
22	22	i3 & i4 +
23	23	/i5 & i10
24	24	rf14.oe = OE
25	25
26	26	/rf15 := i2 & i6 & i7 +
27		i6 & rf16 +
	27	i6 & rf16 :+:
28	28	i3 & /rf16 +
29	29	i7
30	30	rf15.oe = OE
31	31
32	32	/rf16 := /i3 & /rf17 +
33		/i4 +
	33	/i4 :+:
34	34	/i3 & i4 +
35	35	/i7 & rf17
36	36	rf16.oe = OE
37	37
38	38	/rf17 := /i2 +
39		/rf18 +
	39	/rf18 :+:
40	40	i5 & i6 +
41	41	rf18
42	42	rf17.oe = OE
43	43
44	44	/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
45		i3 & rf19 +
	45	i3 & rf19 :+:
46	46	/i2 & /i7 +
47	47	/i3 & /rf19
48	48	rf18.oe = OE
49	49
50	50	/rf19 := i5 & i6 & /i7 & i10 +
51		i3 & i6 & i7 +
	51	i3 & i6 & i7 :+:
52	52	i5 & rf20 +
53	53	/i4 & /rf20 & rf23
54	54	rf19.oe = OE
55	55
56	56	/rf20 := /i10 & rf17 +
57		/i11 +
	57	/i11 :+:
58	58	i4 & /rf17 +
59	59	i2 & /rf23
60	60	rf20.oe = OE
61	61
62	62	/rf21 := /i2 & rf17 +
63		/i10 & i11 +
	63	/i10 & i11 :+:
64	64	/rf14 & rf15 +
65	65	i8 & i9 & /rf22
66	66	rf21.oe = OE
67	67
68	68	/rf22 := rf14 & /rf15 +
69		i3 & /rf21 +
	69	i3 & /rf21 :+:
70	70	/i8 & rf21 +
71	71	rf16 & /rf20
72	72	rf22.oe = OE
73	73
74	74	/rf23 := /rf14 +
75		i6 & rf14 +
	75	i6 & rf14 :+:
76	76	i7 & rf22 +
77	77	i2 & i4 & i6 & i8 & /rf15
78	78	rf23.oe = OE

trunk/src/regtests/jedutil/baseline/pal20l2/pal20l2.txt

r0	r26290
	1	Inputs:
	2
	3	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 20, 21, 22, 23
	4
	5	Outputs:
	6
	7	18 (Combinatorial, No output feedback, Active low)
	8	19 (Combinatorial, No output feedback, Active low)
	9
	10	Equations:
	11
	12	/o18 = /i1 & i2 +
	13	/i3 & i4 +
	14	/i5 & i6 & /i7 +
	15	i8 & /i9 & i10 +
	16	/i11 & i13 +
	17	/i14 & i15 & /i16 +
	18	i17 & /i21 & i22 +
	19	/i23
	20	o18.oe = vcc
	21
	22	/o19 = i1 & /i2 +
	23	i3 & /i4 +
	24	i5 & /i6 & i7 +
	25	/i8 & i9 & /i10 +
	26	i11 & /i13 +
	27	i14 & /i15 & i16 +
	28	/i17 & i21 & /i22 +
	29	i23
	30	o19.oe = vcc
	31

Property changes on: trunk/src/regtests/jedutil/baseline/pal20l2/pal20l2.txt

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/jeds/pal18h4/pal18h4.jed

r0	r26290
	1	
	2	PAL18H4
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal18h4.eqn". Date: 11-8-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 i16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 i21:21 i22:22 i23:23 VCC:24*
	10	QF0720*QP24*F0*
	11	L0000
	12	111101111111111101111111111111111111
	13	111111011111111111011111111111111101
	14	111111111101011101111111111111111111
	15	111111111111111111101111111111110111
	16	111111101111110111111111111111111111
	17	111001111111111101011111111101111111*
	18	L0216
	19	111111111111111111111111011101011111
	20	111111111110111111111111111111111101
	21	101111111111011011111111111111111111
	22	111111111111111101101111111111111111*
	23	L0360
	24	010101111111111111111111111111111111
	25	111111110111011101111111111111101111
	26	111111111111111111011110111111111111
	27	111111111111111111110111110111111111*
	28	L0504
	29	101011111111111111111111111111111111
	30	111110111111111111101111111111111111
	31	111111111011111111111001111111111111
	32	111111111111101110111111111111111111
	33	111111111111111111111111101110111111
	34	111111111111111111111111111011111110*
	35	C5172*
	36	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal18h4/pal18h4.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal16h6/pal16h6.jed

r0	r26290
	1	
	2	PAL16H6
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16h6.eqn". Date: 11-8-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 o21:21 i22:22 i23:23 VCC:24*
	10	QF0640*QP24*F0*
	11	L0000
	12	11111111110101011111111111111111
	13	11111111111111111011111111110111
	14	11111110111111111111111111111111
	15	11100111111111010111111101111111*
	16	L0128
	17	10111111111101111111111111111111
	18	11111111111111011011111111111111
	19	11110111111111011111111111111111
	20	11111101111111110111111111111101*
	21	L0256
	22	11111111111111111111011101011111
	23	11111111111011111111111111111101*
	24	L0320
	25	11111111111111110111111111111111
	26	11111111111111111101110111111111*
	27	L0384
	28	11111111111111111111101110111111
	29	11111111111111111111111011111110
	30	01010111111111111111111111111111
	31	11111111011101011111111111101111*
	32	L0512
	33	10101111111111111111111111111111
	34	11111011111111111011111111111111
	35	11111111101111111110111111111111
	36	11111111111110101111111111111111*
	37	C4A43*
	38	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal16h6/pal16h6.jed

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/jeds/pal14h8/pal14h8.jed

r0	r26290
	1	
	2	PAL14H8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal14h8.eqn". Date: 11-7-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 o21:21 o22:22 i23:23 VCC:24*
	10	QF0560*QP24*F0*
	11	L0000
	12	1111111111010111111111111111
	13	1111111111111110111111110111
	14	1111111011111111111111111111
	15	1110011111110101111101111111*
	16	L0112
	17	1011111111010110111111111111
	18	1111010111110101111111111101*
	19	L0168
	20	1111111111111111110101011111
	21	1111111111111111111111111101*
	22	L0224
	23	1111111111111101111111111111
	24	1111111111111111011111111111*
	25	L0280
	26	0101011111111111111111111111
	27	1111111101010111111111101111*
	28	L0336
	29	1111111111111111111010111111
	30	1111111111111111111111111110*
	31	L0392
	32	1111111111111110111111111111
	33	1111111111111111101111111111*
	34	L0448
	35	1010111111111111111111111111
	36	1111101111111111111111111111
	37	1111111110111111111111111111
	38	1111111111101011111111111111*
	39	C407D*
	40	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal14h8/pal14h8.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal18l4/pal18l4.jed

r0	r26290
	1	
	2	PAL18L4
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal18l4.eqn". Date: 11-8-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 i16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 i21:21 i22:22 i23:23 VCC:24*
	10	QF0720*QP24*F0*
	11	L0000
	12	111101111111111101111111111111111111
	13	111111011111111111011111111111111101
	14	111111111101011101111111111111111111
	15	111111111111111111101111111111110111
	16	111111101111110111111111111111111111
	17	111001111111111101011111111101111111*
	18	L0216
	19	111111111111111111111111011101011111
	20	111111111110111111111111111111111101
	21	101111111111011011111111111111111111
	22	111111111111111101101111111111111111*
	23	L0360
	24	010101111111111111111111111111111111
	25	111111110111011101111111111111101111
	26	111111111111111111011110111111111111
	27	111111111111111111110111110111111111*
	28	L0504
	29	101011111111111111111111111111111111
	30	111110111111111111101111111111111111
	31	111111111011111111111001111111111111
	32	111111111111101110111111111111111111
	33	111111111111111111111111101110111111
	34	111111111111111111111111111011111110*
	35	C5172*
	36	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal18l4/pal18l4.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal8l14/pal8l14.jed

r0	r26290
	1
	2	PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
	3	(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
	4
	5
	6	TITLE   :PAL8L14 Test 1           AUTHOR :MAMEDev
	7	PATTERN :A                        COMPANY:MAMEDev
	8	REVISION:1.0                      DATE   :11/11/2013
	9
	10	
	11	PAL8L14
	12	PAL8L14TEST1*
	13	QP24*
	14	QF224*
	15	G0*F0*
	16	L0000 0111111111111111*
	17	L0016 1111111111101111*
	18	L0032 1101111111111111*
	19	L0048 1111111110111111*
	20	L0064 1111111011111110*
	21	L0080 1111101111111111*
	22	L0096 1110111111111011*
	23	L0112 1011111111111111*
	24	L0128 1111111111111101*
	25	L0144 1111111111110111*
	26	L0160 1111111111011111*
	27	L0176 1111111101111111*
	28	L0192 1111011111111111*
	29	L0208 1111110111111111*
	30	C19E6*
	31	4A2C

Property changes on: trunk/src/regtests/jedutil/jeds/pal8l14/pal8l14.jed

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/jeds/pal10p8/pal10p8.jed

r0	r26290
	1	
	2	PAL10P8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal10p8.EQN". Date: 11-3-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 VCC:20*
	10	QF0328*QP20*F0*
	11	L0000
	12	11111111111111111001
	13	10010110011001101111*
	14	L0040
	15	11111111111111111010
	16	01010110100101011111*
	17	L0080
	18	11111111111111110101
	19	10100101010110101111*
	20	L0120
	21	11111111111111110110
	22	01010101011001101111*
	23	L0160
	24	11111111111111111001
	25	01010110010110011111*
	26	L0200
	27	11111111111111111010
	28	01011001100101011111*
	29	L0240
	30	11111111111111110110
	31	10010101011001011111*
	32	L0280
	33	11111111111111110101
	34	01100101010110011111*
	35	L0320
	36	00010011*
	37	C2168*
	38	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal10p8/pal10p8.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal14p4/pal14p4.jed

r0	r26290
	1	
	2	PAL14P4
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal14p4.eqn". Date: 11-3-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 i13:13 o14:14 o15:15 o16:16 o17:17 i18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0452*QP20*F0*
	11	L0000
	12	1111111111111111111111111010
	13	0101011110111001011101111111
	14	1111111111111111110111101111
	15	1111110111101111111111111111*
	16	L0112
	17	1111111111111111111111110110
	18	0101011101110110011110111111
	19	1111111111101111111111101111
	20	1111110111111111111011111111*
	21	L0224
	22	1111111111111111111111111001
	23	0101011110110101101101111111
	24	1111111111101111111111011111
	25	1111111011111111110111111111*
	26	L0336
	27	1111111111111111111111110101
	28	1001011101110110011101111111
	29	1111111111011111111111011111
	30	1111111011111111111011111111*
	31	L0448
	32	0110*
	33	C321A*
	34	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal14p4/pal14p4.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal14l8/pal14l8.jed

r0	r26290
	1	
	2	PAL14L8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal14l8.eqn". Date: 11-7-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 o21:21 o22:22 i23:23 VCC:24*
	10	QF0560*QP24*F0*
	11	L0000
	12	1111111111010111111111111111
	13	1111111111111110111111110111
	14	1111111011111111111111111111
	15	1110011111110101111101111111*
	16	L0112
	17	1011111111010110111111111111
	18	1111010111110101111111111101*
	19	L0168
	20	1111111111111111110101011111
	21	1111111111111111111111111101*
	22	L0224
	23	1111111111111101111111111111
	24	1111111111111111011111111111*
	25	L0280
	26	0101011111111111111111111111
	27	1111111101010111111111101111*
	28	L0336
	29	1111111111111111111010111111
	30	1111111111111111111111111110*
	31	L0392
	32	1111111111111110111111111111
	33	1111111111111111101111111111*
	34	L0448
	35	1010111111111111111111111111
	36	1111101111111111111111111111
	37	1111111110111111111111111111
	38	1111111111101011111111111111*
	39	C407D*
	40	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal14l8/pal14l8.jed

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/jeds/pal12p6/pal12p6.jed

r0	r26290
	1	
	2	PAL12P6
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal12p6.eqn". Date: 11-3-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0390*QP20*F0*
	11	L0000
	12	111111111111111111111010
	13	010101111010010101111111
	14	111111111111111111101111
	15	111111011111111111111111*
	16	L0096
	17	111111111111111111110101
	18	101001110101011010111111*
	19	L0144
	20	111111111111111111110110
	21	010101110101100110111111*
	22	L0192
	23	111111111111111111111001
	24	010101111001011001111111*
	25	L0240
	26	111111111111111111111010
	27	010110110110010101111111*
	28	L0288
	29	111111111111111111110110
	30	100101110101100101111111
	31	111111111111111111011111
	32	111111101111111111111111*
	33	L0384
	34	001001*
	35	C28D4*
	36	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal12p6/pal12p6.jed

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/jeds/pal6l16/pal6l16.jed

r0	r26290
	1
	2	PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
	3	(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
	4
	5
	6	TITLE   :PAL6L16 Test 1           AUTHOR :MAMEDev
	7	PATTERN :A                        COMPANY:MAMEDev
	8	REVISION:1.0                      DATE   :11/11/2013
	9
	10	
	11	PAL6L16
	12	PAL6L16TEST1*
	13	QP24*
	14	QF192*
	15	G0*F0*
	16	L0000 011111111111*
	17	L0012 111101111101*
	18	L0024 110111111111*
	19	L0036 111101111111*
	20	L0048 011001100110*
	21	L0060 100110011001*
	22	L0072 101111111111*
	23	L0084 111011111111*
	24	L0096 111110111111*
	25	L0108 111111101111*
	26	L0120 111111111011*
	27	L0132 111111011111*
	28	L0144 111111111110*
	29	L0156 010111111111*
	30	L0168 111111110111*
	31	L0180 111111111101*
	32	C14F0*
	33	46DF

Property changes on: trunk/src/regtests/jedutil/jeds/pal6l16/pal6l16.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal16l6/pal16l6.jed

r0	r26290
	1	
	2	PAL16L6
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16l6.eqn". Date: 11-8-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 o21:21 i22:22 i23:23 VCC:24*
	10	QF0640*QP24*F0*
	11	L0000
	12	11111111110101011111111111111111
	13	11111111111111111011111111110111
	14	11111110111111111111111111111111
	15	11100111111111010111111101111111*
	16	L0128
	17	10111111111101111111111111111111
	18	11111111111111011011111111111111
	19	11110111111111011111111111111111
	20	11111101111111110111111111111101*
	21	L0256
	22	11111111111111111111011101011111
	23	11111111111011111111111111111101*
	24	L0320
	25	11111111111111110111111111111111
	26	11111111111111111101110111111111*
	27	L0384
	28	11111111111111111111101110111111
	29	11111111111111111111111011111110
	30	01010111111111111111111111111111
	31	11111111011101011111111111101111*
	32	L0512
	33	10101111111111111111111111111111
	34	11111011111111111011111111111111
	35	11111111101111111110111111111111
	36	11111111111110101111111111111111*
	37	C4A43*
	38	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal16l6/pal16l6.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal16p8/pal16p8.jed

r0	r26290
	1	
	2	PAL16P8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16p8.eqn". Date: 11-5-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 VCC:20*
	10	QF2056*QP20*F0*
	11	L0000
	12	11111111111111111111111111111111
	13	11111111111101110111101111111101
	14	11110111111111110111011111111111
	15	11111111111101111111111111111111
	16	11111111111111110111111111111111
	17	11111111111111111111011111111111
	18	11111111111111111111111111111101
	19	11111111111111111111101111111111*
	20	L0256
	21	11111111111111111111111111111111
	22	10111111111101110111101111111111
	23	11110111111111110111011111111101
	24	11110111111111111111111111111111
	25	10111111111111111111101111111111
	26	11110111111111111111111111111101
	27	11111111111101110111101111111111
	28	11111111111111111111011111111101*
	29	L0512
	30	11111111111111101111111111111111
	31	01111111111101110111101111111111
	32	01111110111111111111111111111111
	33	11111111111101111111111111111111
	34	11111111111111110111111111111111
	35	11111101111111111111101111111111
	36	01111111111111111111101111111111
	37	11111111111101110111111111111111*
	38	L0768
	39	11111111111111111111111111111111
	40	11111011111011111111111111111111
	41	11111111101111111111111111111110
	42	11111011101111111111111111111111
	43	11111011011111111111111111111111
	44	11111111110111111111101111111111
	45	11111111111111111111101111111110
	46	11111111011111111111111111111111*
	47	L1024
	48	11111111111111111111111111111111
	49	11110111111111110111011111111110
	50	11111111111111010111111111111111
	51	11110111111111101111111111111111
	52	11111111111111111111011111111111
	53	11111111111111111111111111111110
	54	11111111111111110111011111111111
	55	11111111111111111111011111111110*
	56	L1280
	57	11111111111111111111111111111111
	58	11011111111111111110111111111111
	59	11111111111111111111111110111111
	60	11011111111111111111111110111111
	61	10011111111111111110111111111111
	62	10111111111111111111111111111111
	63	01111111111111111101111110111111
	64	11110111111111111111111111111111*
	65	L1536
	66	01111111111111111111110111111111
	67	11111111111111111111111011111101
	68	11111111111111111111111111111011
	69	11111111111111111111111101111111
	70	11111111111111111111101111111111
	71	11111111111111111011110111111111
	72	11111111111101111111111111111111
	73	11111111011111111111111111111111*
	74	L1792
	75	11111111111111111111111111111111
	76	11110111111111111111011111111011
	77	11011111111111111111111111011111
	78	11110111111111111111111111111111
	79	11111111111111111011111111111111
	80	11111111111111111111111101111111
	81	11111111111111111111111111111011
	82	11111111111111111111011111101111*
	83	L2048
	84	10000110*
	85	CF429*
	86	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal16p8/pal16p8.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal16rp4/pal16rp4.jed

r0	r26290
	1	
	2	PAL16RP4
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16rp4.eqn". Date: 11-5-113
	6	*
	7	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS /OE:11 o12:12 o13:13 rf14:14 rf15:15 rf16:16 rf17:17*
	9	NOTE PINS o18:18 o19:19 VCC:20*
	10	QF2056*QP20*F0*
	11	L0000
	12	11111111111111111111111111111111
	13	11111111111101110111101111111111
	14	11110111111111110111011111111111
	15	11111111111101111111111111111111
	16	11111111111111110111111111111111
	17	11111111111111111111011111111111
	18	11111111101111111111111111111111
	19	11111111111111111111101111111111*
	20	L0256
	21	11111111111111111111111111111111
	22	10111111111101110111101111111111
	23	11110111111111110111011111111111
	24	11110111111111111111111111111111
	25	10111111111111111111101111111111
	26	11111011111111111111111111111111
	27	11111111111101110111101111111111
	28	11111111111111111111011111111111*
	29	L0512
	30	01111111111101110111101111111111
	31	01111110111111111111111111111111
	32	11111111111101111111111111111111
	33	11111111111111110111111111111111
	34	11111101111111111111101111111111
	35	01111111111111111111101111111111
	36	11111111111101110111111111111111
	37	11111011111111111111111111111111*
	38	L0768
	39	11111011111011111111111111111111
	40	11111111101111111111111111111111
	41	11111011111111111111111111111111
	42	11111011011111111111111111111111
	43	11111111110111111111101111111111
	44	11111111111111111111101111111111
	45	11111111011111111111111111111111
	46	01110111111111111111111111111111*
	47	L1024
	48	11110111111111110111011111111111
	49	11111111111111010111111111111111
	50	11110111111111101111111111111111
	51	11111111111111111111011111111111
	52	11111111101111111111111111111111
	53	11111111111111110111011111111111
	54	11111111011111111111011111111111
	55	10111111111111111111101111111111*
	56	L1280
	57	11111111111111111110111111111111
	58	11111111111111111111111110111111
	59	11111111111111111111111101111111
	60	10111111111111111110111111111111
	61	10111111111111111111111111111111
	62	01111111111111111101111110111111
	63	11111111101111111111111111111111
	64	11110111111111111111111111111111*
	65	L1536
	66	01111111111111111111110111111111
	67	11111111111111111111111011111111
	68	11111111111111111111111111111011
	69	11111111111111111111111101111111
	70	11111111111111111111101111111111
	71	11111111111111111011111011111111
	72	11111111111101111111111111111111
	73	11111111011111111111111111111111*
	74	L1792
	75	11111111111111111111110111111111
	76	10111011111111111111111111111111
	77	11111111011111111111111111011111
	78	11110111111111111111111111111111
	79	11111111111111111011111111111111
	80	11111111111111111111111101111111
	81	11111111111111111111111111111011
	82	11111111111111111111011111101111*
	83	L2048
	84	01010001*
	85	CF818*
	86	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal16rp4/pal16rp4.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal16rp6/pal16rp6.jed

r0	r26290
	1	
	2	PAL16RP6
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16rp6.eqn". Date: 11-5-113
	6	*
	7	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS /OE:11 o12:12 rf13:13 rf14:14 rf15:15 rf16:16 rf17:17*
	9	NOTE PINS rf18:18 o19:19 VCC:20*
	10	QF2056*QP20*F0*
	11	L0000
	12	11111111111111111111111111111111
	13	11111111111101110111101111111111
	14	11110111111111110111011111111111
	15	11111111111101111111111111111111
	16	11111111111111110111111111111111
	17	11111111111111111111011111111111
	18	11111111101111111111111111111111
	19	11111111111111111111101111111111*
	20	L0256
	21	10111111111101110111101111111111
	22	11110111111111110111011111111111
	23	11110111111111111111111111111111
	24	10111111111111111111101111111111
	25	11111011111111111111111111111111
	26	11111111111101110111101111111111
	27	11111111111111111111011111111111
	28	11111111011111111111111111111111*
	29	L0512
	30	01111111111101110111101111111111
	31	01111110111111111111111111111111
	32	11111111111101111111111111111111
	33	11111111111111110111111111111111
	34	11111101111111111111101111111111
	35	01111111111111111111101111111111
	36	11111111111101110111111111111111
	37	11111011111111111111111111111111*
	38	L0768
	39	11111011111011111111111111111111
	40	11111111101111111111111111111111
	41	11111011111111111111111111111111
	42	11111011011111111111111111111111
	43	11111111110111111111101111111111
	44	11111111111111111111101111111111
	45	11111111011111111111111111111111
	46	01110111111111111111111111111111*
	47	L1024
	48	11110111111111110111011111111111
	49	11111111111111010111111111111111
	50	11110111111111101111111111111111
	51	11111111111111111111011111111111
	52	11111111101111111111111111111111
	53	11111111111111110111011111111111
	54	11111111011111111111011111111111
	55	10111111111111111111101111111111*
	56	L1280
	57	11111111111111111110111111111111
	58	11111111111111111111111110111111
	59	11111111111111111111111101111111
	60	10111111111111111110111111111111
	61	10111111111111111111111111111111
	62	01111111111111111101111110111111
	63	11111111101111111111111111111111
	64	11110111111111111111111111111111*
	65	L1536
	66	11111111111111111111111011111111
	67	11111111111111111111111111111011
	68	11111111111111111111111101111111
	69	11111111111111111111101111111111
	70	11111111111111111011111011111111
	71	11111111111101111111110111111111
	72	11111111011111111111111111111111
	73	10111111111111111111111111111111*
	74	L1792
	75	11111111111111111111110111111111
	76	10111011111111111111111111111111
	77	11111111011111111111111111011111
	78	11110111111111111111111111111111
	79	11111111111111111011111111111111
	80	11111111111111111111111101111111
	81	11111111111111111111111111111011
	82	11111111111111111111011111101111*
	83	L2048
	84	10011001*
	85	CF825*
	86	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal16rp6/pal16rp6.jed

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/jeds/pal20l2/pal20l2.jed

r0	r26290
	1	
	2	PAL20L2
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal20l2.eqn". Date: 11-10-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 i16:16 i17:17 o18:18*
	9	NOTE PINS o19:19 i20:20 i21:21 i22:22 i23:23 VCC:24*
	10	QF0640*QP24*F0*
	11	L0000
	12	1001111111111111111111111111111111111111
	13	1111011110111111111111111111111111111111
	14	1111111111110111101101111111111111111111
	15	1111111111111111111111111011011110111111
	16	1111111111111111111111111111111111110110
	17	1111111111111111111111111101111011011111
	18	1111111111101101111111101111111111111111
	19	1111110111111111111111111111111111111111*
	20	L0320
	21	0110111111111111111111111111111111111111
	22	1111101101111111111111111111111111111111
	23	1111111111111011011110111111111111111111
	24	1111111111111111111111110111101101111111
	25	1111111111111111111111111111111111111001
	26	1111111111111111111111111110110111101111
	27	1111111111011110111111011111111111111111
	28	1111111011111111111111111111111111111111*
	29	C4AC1*
	30	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal20l2/pal20l2.jed

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/jeds/pal12h10/pal12h10.jed

r0	r26290
	1	
	2	PAL12H10
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal12h10.eqn". Date: 11-7-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 o21:21 o22:22 o23:23 VCC:24*
	10	QF0480*QP24*F0*
	11	L0000
	12	111111101111111111010111
	13	110111111111111111111110*
	14	L0048
	15	111111011111111111111101
	16	111111111111111101101011*
	17	L0096
	18	111111110101101111110111
	19	111001111101011111011111*
	20	L0144
	21	101111110101101111111111
	22	111101111101011111111101*
	23	L0192
	24	111111111111111101011111
	25	111111111111111111111101*
	26	L0240
	27	111111111111011111111111
	28	111111111111110111111111*
	29	L0288
	30	010101111111111111111111
	31	111111010101111111111111*
	32	L0336
	33	111111111111111110101111
	34	111111111111111111111110*
	35	L0384
	36	111111111111101111111111
	37	111111111111111011111111*
	38	L0432
	39	101010111111111111111111
	40	111111101010111111111111*
	41	C3646*
	42	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal12h10/pal12h10.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/pal12l10/pal12l10.jed

r0	r26290
	1	
	2	PAL12L10
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal12l10.eqn". Date: 11-7-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 o21:21 o22:22 o23:23 VCC:24*
	10	QF0480*QP24*F0*
	11	L0000
	12	111111101111111111010111
	13	110111111111111111111110*
	14	L0048
	15	111111011111111111111101
	16	111111111111111101101011*
	17	L0096
	18	111111110101101111110111
	19	111001111101011111011111*
	20	L0144
	21	101111110101101111111111
	22	111101111101011111111101*
	23	L0192
	24	111111111111111101011111
	25	111111111111111111111101*
	26	L0240
	27	111111111111011111111111
	28	111111111111110111111111*
	29	L0288
	30	010101111111111111111111
	31	111111010101111111111111*
	32	L0336
	33	111111111111111110101111
	34	111111111111111111111110*
	35	L0384
	36	111111111111101111111111
	37	111111111111111011111111*
	38	L0432
	39	101010111111111111111111
	40	111111101010111111111111*
	41	C3646*
	42	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal12l10/pal12l10.jed

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/jeds/pal20c1/pal20c1.jed

r0	r26290
	1	
	2	PAL20C1
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal20c1.eqn". Date: 11-8-113
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 i16:16 i17:17 o18:18*
	9	NOTE PINS o19:19 i20:20 i21:21 i22:22 i23:23 VCC:24*
	10	QF0640*QP24*F0*
	11	L0000
	12	1010111111111111111111111111111111111111
	13	1111101111111111111110101111111111111111
	14	1111111110111111111111111001111111111111
	15	1111111111111011101111011111111111111111
	16	1111111111111111111111111111101110111111
	17	1111111111111111111111111111111011111110
	18	0101011111111111111101111110111111111111
	19	1111111101110111011111110111110111101111
	20	1111111111111111111011111111011101011111
	21	1111111111101111111111111111111111111101
	22	1011111111110110111111111111111111111111
	23	1111011111111111011110111111111111111111
	24	1111110111111111110101111111111111111101
	25	1111111111010111011111111111111111111111
	26	1111111111111111111110111111111111110111
	27	1110011011111101011101111111111101111111*
	28	C49E7*
	29	0000

Property changes on: trunk/src/regtests/jedutil/jeds/pal20c1/pal20c1.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/palce16v8/pal16r6-as-palce16v8.jed

r0	r26290
	1
	2	PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
	3	(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
	4
	5
	6	TITLE   :PAL16R6 Test 1           AUTHOR :MAMEDev
	7	PATTERN :A                        COMPANY:MAMEDev
	8	REVISION:1.0                      DATE   :08/25/13
	9
	10	
	11	PAL16V8
	12	PAL16R6TEST1*
	13	QP20*
	14	QF2194*
	15	G0*F0*
	16	L0000 11111110111111111111111111111101*
	17	L0032 11111111011111111111111111111110*
	18	L0064 11111111111101111011111111111111*
	19	L0096 11111111111110110111111111111111*
	20	L0128 11111110111111111111111101110111*
	21	L0160 01111101111111111111111111111011*
	22	L0192 11110111111111111111111111110111*
	23	L0224 11111111101111111111101110111111*
	24	L0256 11111101111111111111111111111111*
	25	L0288 11111111111111111111111101110111*
	26	L0320 11111111111110111111111101111111*
	27	L0352 11110110011111111111111111111111*
	28	L0384 01111011111111111111111111111111*
	29	L0416 11101111111110111111101111111111*
	30	L0448 10110111111111111111101111111111*
	31	L0480 10011111111111111111111111111111*
	32	L0512 01111111111111111111111111110111*
	33	L0544 10110111111111111111111110111111*
	34	L0576 11111111101111111111111110111111*
	35	L0608 11111111111110100111111110111111*
	36	L0640 11111110111111011111111111111111*
	37	L0672 11110111111111111111111110111111*
	38	L0704 11111111101111011111111110111111*
	39	L0736 11111101111111111111111111111111*
	40	L0768 11111111110111111111111101111111*
	41	L0800 11110111111111111111111111110111*
	42	L0832 11111111101111111110111111111011*
	43	L0864 11111111111111111111011101111111*
	44	L0896 01110111111011111111111111110111*
	45	L0928 01111111111101111111111111111111*
	46	L0960 11110111101110111101111111111111*
	47	L0992 11111111111111111011101111110111*
	48	L1024 11111011111111111111111111111111*
	49	L1056 11111111011111111111111111111111*
	50	L1088 11111111111101011111110111111111*
	51	L1120 11111111111111111111101111110111*
	52	L1152 11110111111111111111111011111111*
	53	L1184 11111111101110111111111111111111*
	54	L1216 11111111111111110111111111111011*
	55	L1248 11111111111111101111111110111111*
	56	L1280 01111111111111111111111111111111*
	57	L1312 11111111111111111111111011111111*
	58	L1344 11110111111111111111111111111111*
	59	L1376 11111111111111111111011110101111*
	60	L1408 11111111111111111111110111111011*
	61	L1440 11111111111111110111111111010111*
	62	L1472 01111111011111111111111111111011*
	63	L1504 11111111111110111111111110111111*
	64	L1536 11111111111111111011111111011111*
	65	L1568 11011111111111111111111111111101*
	66	L1600 11111111111111111111111111101011*
	67	L1632 10111111111110111111111111111111*
	68	L1664 01111111111111111111111111111110*
	69	L1696 11111111111111111111101111111011*
	70	L1728 10111111111111111111111110111111*
	71	L1760 11111011111111111111111101110111*
	72	L1792 11111111111110111111111111111111*
	73	L1824 11111101110111011101110111011111*
	74	L1856 01111111111111111111111111111111*
	75	L1888 11110111111111111111111111111111*
	76	L1920 11111111011111111111111111111111*
	77	L1952 11101111111111111111111111111111*
	78	L1984 11011111111111110111111111111111*
	79	L2016 11111111111111111111011110110111*
	80	L2048 00000000000000000000000000000000*
	81	L2080 00000000000000000000000000000000*
	82	L2112 00000000100000011111111111111111*
	83	L2144 11111111111111111111111111111111*
	84	L2176 111111111111111101*
	85	CF9B8*
	86	144A

Property changes on: trunk/src/regtests/jedutil/jeds/palce16v8/pal16r6-as-palce16v8.jed

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/jeds/palce16v8/pal10l8-as-palce16v8.jed

r0	r26290
	1
	2	PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
	3	(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
	4
	5
	6	TITLE   :PAL10L8 Test             AUTHOR :MAMEDev
	7	PATTERN :A                        COMPANY:MAMEDev
	8	REVISION:1.0                      DATE   :08/25/13
	9
	10	
	11	PAL16V8
	12	PAL10L8TEST*
	13	QP20*
	14	QF2194*
	15	G0*F0*
	16	L0000 11111011111110111111101111111111*
	17	L0032 01111111111111111111111111111111*
	18	L0064 11111111111111111111111101111111*
	19	L0096 11110111111111111111111111111101*
	20	L0128 11011111111111111111111111111111*
	21	L0160 11111111011111111111111111111111*
	22	L0192 11111111111111110111111111111111*
	23	L0224 11101111111111111111111111111011*
	24	L0256 11111111111111111111111111111011*
	25	L0288 11110111111101111111111111110111*
	26	L0320 11111111111111111111101111111111*
	27	L0352 11111111111111111111111111111110*
	28	L0384 11101111111111111111111111111111*
	29	L0416 11111011111111111111111111111111*
	30	L0448 11111111111110111111111111111111*
	31	L0480 11011111111111111111011111111101*
	32	L0512 11110111011111111111111111111111*
	33	L0544 11111111111110111111111111111111*
	34	L0576 11111111111111111111111111111011*
	35	L0608 11101111111111111111111111111110*
	36	L0640 11111111111111111111011111111111*
	37	L0672 01111111111111111111111111110111*
	38	L0704 11111111111111110111111111110111*
	39	L0736 11111111111111111111111110111111*
	40	L0768 11111111111111110111111111111111*
	41	L0800 10111111111111111111111111111011*
	42	L0832 11110111111111111111111111111101*
	43	L0864 11111111111111111111111110111111*
	44	L0896 11111111111111110111111101111111*
	45	L0928 11101111111111111111111111111111*
	46	L0960 11111111111110111111011101111111*
	47	L0992 11111111111111111111101110111111*
	48	L1024 11111111011111111111111111111111*
	49	L1056 11011011111111111111111111111111*
	50	L1088 01111111111111111111111111110111*
	51	L1120 11111111111101111111111111111111*
	52	L1152 11011111111111111111011111111111*
	53	L1184 11111011111111111111111111111111*
	54	L1216 11111111111111111111111110111111*
	55	L1248 11101111111111111111111111111111*
	56	L1280 11111011111111111111111111111011*
	57	L1312 11111111111111111011111111111111*
	58	L1344 10111111111111111111111111111111*
	59	L1376 11111111011111111111111111111111*
	60	L1408 11111111111111111111111110111101*
	61	L1440 11111111111111111111011111111111*
	62	L1472 11111111111101111111111111111110*
	63	L1504 11101111111111111111111111111111*
	64	L1536 11111111111111111111111110111111*
	65	L1568 11111111111111111111111111111110*
	66	L1600 11111111111111111111111111111011*
	67	L1632 11111011111111111011111111111111*
	68	L1664 11101111111111111111101111111111*
	69	L1696 10111111111111111111111111111111*
	70	L1728 11111111101111111111111111111111*
	71	L1760 11111111111110111111111111111111*
	72	L1792 11101111111111111111011111111111*
	73	L1824 11111111111111111111111101111111*
	74	L1856 11111111111111111111111111110101*
	75	L1888 01111111111111111111111111111111*
	76	L1920 11010111111111111111111111111111*
	77	L1952 11111111111101111111111111111111*
	78	L1984 11111111011111111111111111111110*
	79	L2016 11111111111111110111111111111111*
	80	L2048 00000000001001100110011001100110*
	81	L2080 01100110011001100110011001100110*
	82	L2112 01100100000000001111111111111111*
	83	L2144 11111111111111111111111111111111*
	84	L2176 111111111111111110*
	85	C01C9*
	86	143F

Property changes on: trunk/src/regtests/jedutil/jeds/palce16v8/pal10l8-as-palce16v8.jed

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/PALASM/pal8l14/pal8l14.pds

r0	r26290
	1	TITLE     PAL8L14 Test 1
	2	PATTERN   A
	3	REVISION  1.0
	4	AUTHOR    MAMEDev
	5	COMPANY   MAMEDev
	6	DATE      11/11/2013
	7
	8	CHIP PAL8L14Test1 PAL8L14
	9
	10	;---------------------------------- PIN Declarations ---------------
	11	PIN  1          O1                   COMBINATORIAL               ;
	12	PIN  2          O2                   COMBINATORIAL               ;
	13	PIN  3          I3                   COMBINATORIAL               ;
	14	PIN  4          I4                   COMBINATORIAL               ;
	15	PIN  5          I5                   COMBINATORIAL               ;
	16	PIN  6          I6                   COMBINATORIAL               ;
	17	PIN  7          I7                   COMBINATORIAL               ;
	18	PIN  8          I8                   COMBINATORIAL               ;
	19	PIN  9          I9                   COMBINATORIAL               ;
	20	PIN  10         I10                  COMBINATORIAL               ;
	21	PIN  11         O11                  COMBINATORIAL               ;
	22	PIN  12         GND                                              ;
	23	PIN  13         O13                  COMBINATORIAL               ;
	24	PIN  14         O14                  COMBINATORIAL               ;
	25	PIN  15         O15                  COMBINATORIAL               ;
	26	PIN  16         O16                  COMBINATORIAL               ;
	27	PIN  17         O17                  COMBINATORIAL               ;
	28	PIN  18         O18                  COMBINATORIAL               ;
	29	PIN  19         O19                  COMBINATORIAL               ;
	30	PIN  20         O20                  COMBINATORIAL               ;
	31	PIN  21         O21                  COMBINATORIAL               ;
	32	PIN  22         O22                  COMBINATORIAL               ;
	33	PIN  23         O23                  COMBINATORIAL               ;
	34	PIN  24         VCC                                              ;
	35
	36	EQUATIONS
	37
	38	/O1 = I3
	39	/O2 = I4
	40	/O11 = I5
	41	/O13 = I6
	42	/O14 = I7
	43	/O15 = I8
	44	/O16 = I9
	45	/O17 = I10
	46	/O18 = /I3
	47	/O19 = /I4 * /I9
	48	/O20 = /I5
	49	/O21 = /I6 * /I10
	50	/O22 = /I7
	51	/O23 = /I8

Property changes on: trunk/src/regtests/jedutil/eqns/PALASM/pal8l14/pal8l14.pds

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/PALASM/pal6l16/pal6l16.pds

r0	r26290
	1	TITLE     PAL6L16 Test 1
	2	PATTERN   A
	3	REVISION  1.0
	4	AUTHOR    MAMEDev
	5	COMPANY   MAMEDev
	6	DATE      11/11/2013
	7
	8	CHIP PAL6L16Test1 PAL6L16
	9
	10	;---------------------------------- PIN Declarations ---------------
	11	PIN  1          O1                   COMBINATORIAL               ;
	12	PIN  2          O2                   COMBINATORIAL               ;
	13	PIN  3          O3                   COMBINATORIAL               ;
	14	PIN  4          I4                   COMBINATORIAL               ;
	15	PIN  5          I5                   COMBINATORIAL               ;
	16	PIN  6          I6                   COMBINATORIAL               ;
	17	PIN  7          I7                   COMBINATORIAL               ;
	18	PIN  8          I8                   COMBINATORIAL               ;
	19	PIN  9          I9                   COMBINATORIAL               ;
	20	PIN  10         O10                  COMBINATORIAL               ;
	21	PIN  11         O11                  COMBINATORIAL               ;
	22	PIN  12         GND                                              ;
	23	PIN  13         O13                  COMBINATORIAL               ;
	24	PIN  14         O14                  COMBINATORIAL               ;
	25	PIN  15         O15                  COMBINATORIAL               ;
	26	PIN  16         O16                  COMBINATORIAL               ;
	27	PIN  17         O17                  COMBINATORIAL               ;
	28	PIN  18         O18                  COMBINATORIAL               ;
	29	PIN  19         O19                  COMBINATORIAL               ;
	30	PIN  20         O20                  COMBINATORIAL               ;
	31	PIN  21         O21                  COMBINATORIAL               ;
	32	PIN  22         O22                  COMBINATORIAL               ;
	33	PIN  23         O23                  COMBINATORIAL               ;
	34	PIN  24         VCC                                              ;
	35
	36	EQUATIONS
	37
	38	/O1 = I4
	39	/O2 = I5
	40	/O3 = I6
	41	/O10 = I7
	42	/O11 = I8
	43	/O13 = I9
	44	/O14 = I4 * I5
	45	/O15 = /I9
	46	/O16 = /I8
	47	/O17 = /I7
	48	/O18 = /I6
	49	/O19 = /I5
	50	/O20 = /I4
	51	/O21 = /I4 * I5 * /I6 * I7 * /I8 * I9
	52	/O22 = I4 * /I5 * I6 * /I7 * I8 * /I9
	53	/O23 = I6 * I9

Property changes on: trunk/src/regtests/jedutil/eqns/PALASM/pal6l16/pal6l16.pds

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16p8/pal16p8.eqn

r0	r26290
	1	chip pal16p8 PAL16P8
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
	4	i11=11 o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
	5
	6	equations
	7
	8	/o12 = i3 & i7 & /i9 +
	9	i1 & o13 +
	10	i3 +
	11	/i6 +
	12	i8 +
	13	/i9 +
	14	i7 & /o13
	15	o12.oe = vcc
	16
	17	o13 = i11 & /o14 +
	18	/i9 +
	19	i8 +
	20	/i7 +
	21	/i6 & o14 +
	22	i5 +
	23	i4
	24	o13.oe = i2 & o14
	25
	26	o14 = i1 & /o15 +
	27	/i8 +
	28	i1 & /i8 +
	29	i1 & /i2 & /o15 +
	30	/i2 +
	31	i2 & /i8 & o15 +
	32	i3
	33	o14.oe = vcc
	34
	35	/o15 = i3 & i6 & i7 & /i11 +
	36	i6 & o16 +
	37	i3 & /o16 +
	38	i7 +
	39	/i11 +
	40	i6 & i7 +
	41	i7 & /i11
	42	o15.oe = vcc
	43
	44	/o16 = /i3 & /o17 +
	45	/i4 & /i11 +
	46	/i3 & /i4 +
	47	/i3 & i4 +
	48	/i7 & o17 +
	49	/i7 & /i11 +
	50	i4
	51	o16.oe = vcc
	52
	53	/o17 = i2 & i5 & i6 & /i7 +
	54	i2 & /o18 +
	55	i5 +
	56	i6 +
	57	/i7 & o18 +
	58	i2 & /i7 +
	59	i5 & i6
	60	o17.oe = /o16
	61
	62	/o18 = /i2 & i5 & i6 & /i7 +
	63	i3 & i6 & i7 & i11 +
	64	i3 +
	65	/i2 & /i7 +
	66	i3 & i11 +
	67	i5 & i6 & /i7 +
	68	i7 & i11
	69	o18.oe = vcc
	70
	71	o19 = i5 & i6 & /i7 & i11 +
	72	i3 & i6 & i7 +
	73	i5 +
	74	i6 +
	75	i7 +
	76	i11 +
	77	/i7
	78	o19.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16p8/pal16p8.eqn

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16rp4/pal16rp4.eqn

r0	r26290
	1	chip pal16rp4 PAL16RP4
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
	4	/OE=11 o12=12 o13=13 rf14=14 rf15=15 rf16=16 rf17=17 o18=18 o19=19 VCC=20
	5
	6	equations
	7
	8	o12 = /i2 & /i3 +
	9	i4 & o13 +
	10	i3 +
	11	/i6 +
	12	i8 +
	13	/i9 +
	14	i7 & /o13
	15	o12.oe = rf14
	16
	17	/o13 = /rf14 +
	18	/i9 +
	19	i8 +
	20	/i7 +
	21	/i6 & /rf14 +
	22	i5 +
	23	i4
	24	o13.oe = i2 & rf14
	25
	26	/rf14 := /rf15 +
	27	/i8 +
	28	i8 +
	29	/i2 & /rf15 +
	30	/i2 +
	31	i2 & /i8 & rf15 +
	32	/i4 +
	33	i3
	34	rf14.oe = OE
	35
	36	/rf15 := i3 & i6 & i7 +
	37	i6 & rf16 +
	38	i3 & /rf16 +
	39	i7 +
	40	/i4 +
	41	i6 & i7 +
	42	i4 & i7 +
	43	/i2 & /i7
	44	rf15.oe = OE
	45
	46	rf16 := /i3 & /rf17 +
	47	/i4 +
	48	/i3 +
	49	/i3 & i4 +
	50	/i7 & rf17 +
	51	/i7 +
	52	i4 +
	53	i2 & i3
	54	rf16.oe = OE
	55
	56	/rf17 := i2 & i5 & i6 & /i7 +
	57	i2 & /o18 +
	58	i5 +
	59	i6 +
	60	/i7 & o18 +
	61	i2 & /i7 +
	62	i5 & i6 +
	63	/i3
	64	rf17.oe = OE
	65
	66	o18 = /i2 & i5 & i6 & /i7 +
	67	i3 & i6 & i7 +
	68	i3 +
	69	/i2 & /i7 +
	70	/i3 +
	71	i5 & i6 & /i7 +
	72	i7
	73	o18.oe = vcc
	74
	75	/o19 = i5 & i6 & /i7 +
	76	i3 & i6 & i7 +
	77	i5 +
	78	i6 +
	79	i7 +
	80	/i4 +
	81	/i7
	82	o19.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16rp4/pal16rp4.eqn

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16rp6/pal16rp6.eqn

r0	r26290
	1	chip pal16rp6 PAL16RP6
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
	4	/OE=11 o12=12 rf13=13 rf14=14 rf15=15 rf16=16 rf17=17 rf18=18 o19=19 VCC=20
	5
	6	equations
	7
	8	o12 = /i2 & /i3 +
	9	i4 & rf13 +
	10	i3 +
	11	/i6 +
	12	i8 +
	13	/i9 +
	14	i7 & /rf13
	15	o12.oe = rf14
	16
	17	/rf13 := /rf14 +
	18	/i9 +
	19	i8 +
	20	/i7 +
	21	/i6 & /rf14 +
	22	i5 & rf14 +
	23	i4 +
	24	/i2
	25	rf13.oe = OE
	26
	27	/rf14 := /rf15 +
	28	/i8 +
	29	i8 +
	30	/i2 & /rf15 +
	31	/i2 +
	32	i2 & /i8 & rf15 +
	33	/i4 +
	34	i3
	35	rf14.oe = OE
	36
	37	rf15 := i3 & i6 & i7 +
	38	i6 & rf16 +
	39	i3 & /rf16 +
	40	i7 +
	41	/i4 +
	42	i6 & i7 +
	43	i4 & i7 +
	44	/i2 & /i7
	45	rf15.oe = OE
	46
	47	rf16 := /i3 & /rf17 +
	48	/i4 +
	49	/i3 +
	50	/i3 & i4 +
	51	/i7 & rf17 +
	52	/i7 +
	53	i4 +
	54	i2 & i3
	55	rf16.oe = OE
	56
	57	/rf17 := i2 & i5 & i6 & /i7 +
	58	i2 & /rf18 +
	59	i5 +
	60	i6 +
	61	/i7 & rf18 +
	62	i2 & /i7 +
	63	i5 & i6 +
	64	/i3
	65	rf17.oe = OE
	66
	67	/rf18 := /i2 & i5 & i6 & /i7 +
	68	i3 & i6 & i7 +
	69	i3 +
	70	/i2 & /i7 +
	71	/i3 +
	72	i5 & i6 & /i7 +
	73	i7 +
	74	i4
	75	rf18.oe = OE
	76
	77	o19 = i5 & i6 & /i7 +
	78	i3 & i6 & i7 +
	79	i5 +
	80	i6 +
	81	i7 +
	82	/i4 +
	83	/i7
	84	o19.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16rp6/pal16rp6.eqn

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal20l2/pal20l2.eqn

r0	r26290
	1	chip pal20l2 PAL20L2
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 i14=14 i15=15 i16=16 i17=17 o18=18 o19=19 i20=20 i21=21 i22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	/o18 = /i1 & i2 +
	9	/i3 & i4 +
	10	/i5 & i6 & /i7 +
	11	i8 & /i9 & i10 +
	12	/i11 & i13 +
	13	/i14 & i15 & /i16 +
	14	i17 & /i21 & i22 +
	15	/i23
	16	o18.oe = vcc
	17
	18	/o19 = i1 & /i2 +
	19	i3 & /i4 +
	20	i5 & /i6 & i7 +
	21	/i8 & i9 & /i10 +
	22	i11 & /i13 +
	23	i14 & /i15 & i16 +
	24	/i17 & i21 & /i22 +
	25	i23
	26	o19.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal20l2/pal20l2.eqn

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16rp8/pal16rp8.eqn

r0	r26290
	1	chip pal16rp8 PAL16RP8
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
	4	/OE=11 rf12=12 rf13=13 rf14=14 rf15=15 rf16=16 rf17=17 rf18=18 rf19=19 VCC=20
	5
	6	equations
	7
	8	/rf12 := /i2 & /i3 +
	9	i4 & rf13 +
	10	i3 +
	11	/i6 +
	12	i8 +
	13	/i9 +
	14	i7 & /rf13 +
	15	i5
	16	rf12.oe = OE
	17
	18	/rf13 := /rf14 +
	19	/i9 +
	20	i8 +
	21	/i7 +
	22	/i6 & rf14 +
	23	i5 +
	24	i4 +
	25	/i3
	26	rf13.oe = OE
	27
	28	rf14 := /rf15 +
	29	/i8 +
	30	i8 +
	31	/i2 & /rf15 +
	32	/i2 +
	33	i2 & /i8 & rf15 +
	34	/i4 +
	35	i3
	36	rf14.oe = OE
	37
	38	/rf15 := i3 & i6 & i7 +
	39	i6 & rf16 +
	40	i3 & /rf16 +
	41	i7 +
	42	/i4 +
	43	i6 & i7 +
	44	i4 & i7 +
	45	/i2 & /i7
	46	rf15.oe = OE
	47
	48	/rf16 := /i3 & /rf17 +
	49	/i4 +
	50	/i3 +
	51	/i3 & i4 +
	52	/i7 & rf17 +
	53	/i7 +
	54	i4 +
	55	i2 & i3
	56	rf16.oe = OE
	57
	58	/rf17 := i2 & i5 & i6 & /i7 +
	59	i2 & /rf18 +
	60	i5 +
	61	i6 +
	62	/i7 & rf18 +
	63	i2 & /i7 +
	64	i5 & i6 +
	65	/i3
	66	rf17.oe = OE
	67
	68	rf18 := /i2 & i5 & i6 & /i7 +
	69	i3 & i6 & i7 +
	70	i3 & rf19 +
	71	/i2 & /i7 +
	72	/i3 & /rf19 +
	73	i5 & i6 & /i7 +
	74	i7 +
	75	/i4
	76	rf18.oe = OE
	77
	78	/rf19 := i5 & i6 & /i7 +
	79	i3 & i6 & i7 +
	80	i5 & rf12 +
	81	i6 +
	82	i7 +
	83	/i4 & /rf12 +
	84	/i7 +
	85	i2
	86	rf19.oe = OE

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16rp8/pal16rp8.eqn

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal12h10/pal12h10.eqn

r0	r26290
	1	chip pal12h10 PAL12H10
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 o23=23 VCC=24
	5
	6	equations
	7
	8	o14 = /i1 & /i2 & /i3 +
	9	/i4 & /i5 & /i6
	10	o14.oe = vcc
	11
	12	o15 = /i7 +
	13	/i8
	14	o15.oe = vcc
	15
	16	o16 = /i9 & /i10 +
	17	/i13
	18	o16.oe = vcc
	19
	20	o17 = i1 & i2 & i3 +
	21	i4 & i5 & i6
	22	o17.oe = vcc
	23
	24	o18 = i7 +
	25	i8
	26	o18.oe = vcc
	27
	28	o19 = i9 & i10 +
	29	i13
	30	o19.oe = vcc
	31
	32	o20 = /i2 & i5 & i6 & /i7 +
	33	i3 & i6 & i7 & i13
	34	o20.oe = vcc
	35
	36	o21 = i5 & i6 & /i7 & i11 +
	37	/i1 & i3 & i6 & i7 & i10
	38	o21.oe = vcc
	39
	40	o22 = i4 & i13 +
	41	i9 & /i10 & /i11
	42	o22.oe = vcc
	43
	44	o23 = /i4 & i10 & i11 +
	45	i1 & /i13
	46	o23.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal12h10/pal12h10.eqn

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal20x4/pal20x4.eqn

r26289	r26290
21	21	o16.oe = /i3 & i4
22	22
23	23	/rf17 := /i2 +
24		/rf18 +
	24	/rf18 :+:
25	25	i5 & i6 +
26	26	rf18
27	27	rf17.oe = OE
28	28
29	29	/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
30		i3 & rf19 +
	30	i3 & rf19 :+:
31	31	/i2 & /i7 +
32	32	/i3 & /rf19
33	33	rf18.oe = OE
34	34
35	35	/rf19 := i5 & i6 & /i7 & i10 +
36		i3 & i6 & i7 +
	36	i3 & i6 & i7 :+:
37	37	i5 & rf20 +
38	38	/i4 & /rf20 & o23
39	39	rf19.oe = OE
40	40
41	41	/rf20 := /i10 & rf17 +
42		/i11 +
	42	/i11 :+:
43	43	i4 & /rf17 +
44	44	i2 & /o23
45	45	rf20.oe = OE

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal12l10/pal12l10.eqn

r0	r26290
	1	chip pal12l10 PAL12L10
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 o23=23 VCC=24
	5
	6	equations
	7
	8	/o14 = /i1 & /i2 & /i3 +
	9	/i4 & /i5 & /i6
	10	o14.oe = vcc
	11
	12	/o15 = /i7 +
	13	/i8
	14	o15.oe = vcc
	15
	16	/o16 = /i9 & /i10 +
	17	/i13
	18	o16.oe = vcc
	19
	20	/o17 = i1 & i2 & i3 +
	21	i4 & i5 & i6
	22	o17.oe = vcc
	23
	24	/o18 = i7 +
	25	i8
	26	o18.oe = vcc
	27
	28	/o19 = i9 & i10 +
	29	i13
	30	o19.oe = vcc
	31
	32	/o20 = /i2 & i5 & i6 & /i7 +
	33	i3 & i6 & i7 & i13
	34	o20.oe = vcc
	35
	36	/o21 = i5 & i6 & /i7 & i11 +
	37	/i1 & i3 & i6 & i7 & i10
	38	o21.oe = vcc
	39
	40	/o22 = i4 & i13 +
	41	i9 & /i10 & /i11
	42	o22.oe = vcc
	43
	44	/o23 = /i4 & i10 & i11 +
	45	i1 & /i13
	46	o23.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal12l10/pal12l10.eqn

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal20x8/pal20x8.eqn

r26289	r26290
11	11	o14.oe = i6
12	12
13	13	/rf15 := i2 & i6 & i7 +
14		i6 & rf16 +
	14	i6 & rf16 :+:
15	15	i3 & /rf16 +
16	16	i7
17	17	rf15.oe = OE
18	18
19	19	/rf16 := /i3 & /rf17 +
20		/i4 +
	20	/i4 :+:
21	21	/i3 & i4 +
22	22	/i7 & rf17
23	23	rf16.oe = OE
24	24
25	25	/rf17 := /i2 +
26		/rf18 +
	26	/rf18 :+:
27	27	i5 & i6 +
28	28	rf18
29	29	rf17.oe = OE
30	30
31	31	/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
32		i3 & rf19 +
	32	i3 & rf19 :+:
33	33	/i2 & /i7 +
34	34	/i3 & /rf19
35	35	rf18.oe = OE
36	36
37	37	/rf19 := i5 & i6 & /i7 & i10 +
38		i3 & i6 & i7 +
	38	i3 & i6 & i7 :+:
39	39	i5 & rf20 +
40	40	/i4 & /rf20 & o23
41	41	rf19.oe = OE
42	42
43	43	/rf20 := /i10 & rf17 +
44		/i11 +
	44	/i11 :+:
45	45	i4 & /rf17 +
46	46	i2 & /o23
47	47	rf20.oe = OE
48	48
49	49	/rf21 := /i2 & rf17 +
50		i11 & /i10 +
	50	i11 & /i10 :+:
51	51	/o14 & rf15 +
52	52	i8 & i9 & /rf22
53	53	rf21.oe = OE
54	54
55	55	/rf22 := o14 & /rf15 +
56		i3 & /rf21 +
	56	i3 & /rf21 :+:
57	57	/i8 & rf21 +
58	58	rf16 & /rf20
59	59	rf22.oe = OE

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal20c1/pal20c1.eqn

r0	r26290
	1	chip pal20c1 PAL20C1
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 i14=14 i15=15 i16=16 i17=17 o18=18 o19=19 i20=20 i21=21 i22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	/o18 = /i1 & /i2 +
	9	/i3 & /i7 & /i17 +
	10	/i4 & /i8 & i16 +
	11	/i5 & /i6 & i17 +
	12	/i9 & /i10 +
	13	/i13 & /i15 +
	14	i1 & i2 & i3 & i7 & /i16 +
	15	i4 & i5 & i6 & i8 & /i14 & i15
	16	o18.oe = vcc
	17
	18	o19 = i9 & i10 & i14 & /i20 +
	19	i13 & /i22 +
	20	/i2 & i5 & /i21 +
	21	i3 & i6 & /i7 +
	22	i7 & i13 & i20 & i23 +
	23	i5 & i6 & i22 +
	24	/i7 & i11 +
	25	/i1 & i3 & i6 & i7 & i10 & i21 & /i23
	26	o19.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal20c1/pal20c1.eqn

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal20x10/pal20x10.eqn

r26289	r26290
6	6	equations
7	7
8	8	/rf14 := /i2 & rf15 +
9		/rf15 & i11 +
	9	/rf15 & i11 :+:
10	10	i3 & i4 +
11	11	/i5 & i10
12	12	rf14.oe = OE
13	13
14	14	/rf15 := i2 & i6 & i7 +
15		i6 & rf16 +
	15	i6 & rf16 :+:
16	16	i3 & /rf16 +
17	17	i7
18	18	rf15.oe = OE
19	19
20	20	/rf16 := /i3 & /rf17 +
21		/i4 +
	21	/i4 :+:
22	22	/i3 & i4 +
23	23	/i7 & rf17
24	24	rf16.oe = OE
25	25
26	26	/rf17 := /i2 +
27		/rf18 +
	27	/rf18 :+:
28	28	i5 & i6 +
29	29	rf18
30	30	rf17.oe = OE
31	31
32	32	/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
33		i3 & rf19 +
	33	i3 & rf19 :+:
34	34	/i2 & /i7 +
35	35	/i3 & /rf19
36	36	rf18.oe = OE
37	37
38	38	/rf19 := i5 & i6 & /i7 & i10 +
39		i3 & i6 & i7 +
	39	i3 & i6 & i7 :+:
40	40	i5 & rf20 +
41	41	/i4 & /rf20 & rf23
42	42	rf19.oe = OE
43	43
44	44	/rf20 := /i10 & rf17 +
45		/i11 +
	45	/i11 :+:
46	46	i4 & /rf17 +
47	47	i2 & /rf23
48	48	rf20.oe = OE
49	49
50	50	/rf21 := /i2 & rf17 +
51		i11 & /i10 +
	51	i11 & /i10 :+:
52	52	/rf14 & rf15 +
53	53	i8 & i9 & /rf22
54	54	rf21.oe = OE
55	55
56	56	/rf22 := rf14 & /rf15 +
57		i3 & /rf21 +
	57	i3 & /rf21 :+:
58	58	/i8 & rf21 +
59	59	rf16 & /rf20
60	60	rf22.oe = OE
61	61
62	62	/rf23 := /rf14 +
63		i6 & rf14 +
	63	i6 & rf14 :+:
64	64	i7 & rf22 +
65	65	i2 & i4 & i6 & i8 & /rf15
66	66	rf23.oe = OE

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16h6/pal16h6.eqn

r0	r26290
	1	chip pal16h6 PAL16H6
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 i14=14 i15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 i22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	o16 = /i1 & /i2 +
	9	/i3 & /i7 +
	10	/i4 & /i8 +
	11	/i5 & /i6
	12	o16.oe = vcc
	13
	14	o17 = /i9 & /i10 +
	15	/i13 & /i15 +
	16	i1 & i2 & i3 +
	17	i4 & i5 & i6 & /i14
	18	o17.oe = vcc
	19
	20	o18 = i7 +
	21	i8 & i15
	22	o18.oe = vcc
	23
	24	o19 = i9 & i10 & i14 +
	25	i13 & /i22
	26	o19.oe = vcc
	27
	28	o20 = /i2 & i5 +
	29	i6 & /i7 +
	30	i3 & i6 +
	31	i7 & i13 & i23
	32	o20.oe = vcc
	33
	34	o21 = i5 & i6 & i22 +
	35	/i7 & i11 +
	36	/i23 +
	37	/i1 & i3 & i6 & i7 & i10
	38	o21.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16h6/pal16h6.eqn

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal18h4/pal18h4.eqn

r0	r26290
	1	chip pal18h4 PAL18H4
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 i14=14 i15=15 i16=16 o17=17 o18=18 o19=19 o20=20 i21=21 i22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	o17 = /i1 & /i2 +
	9	/i3 & /i7 +
	10	/i4 & /i8 & i16 +
	11	/i5 & /i6 +
	12	/i9 & /i10 +
	13	/i13 & /i15
	14	o17.oe = vcc
	15
	16	o18 = i1 & i2 & i3 +
	17	i4 & i5 & i6 & /i14 +
	18	i7 & /i16 +
	19	i8 & i15
	20	o18.oe = vcc
	21
	22	o19 = i9 & i10 & i14 +
	23	i13 & /i22 +
	24	/i2 & i5 & /i21 +
	25	i6 & /i7
	26	o19.oe = vcc
	27
	28	o20 = i3 & i6 +
	29	i7 & i13 & i23 +
	30	i5 & i6 & i22 +
	31	/i7 & i11 +
	32	i21 & /i23 +
	33	/i1 & i3 & i6 & i7 & i10
	34	o20.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal18h4/pal18h4.eqn

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal14h8/pal14h8.eqn

r0	r26290
	1	chip pal14h8 PAL14H8
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 i14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	o15 = /i1 & /i2 +
	9	/i3 +
	10	/i4 +
	11	/i5 & /i6
	12	o15.oe = vcc
	13
	14	o16 = /i7 +
	15	/i8
	16	o16.oe = vcc
	17
	18	o17 = /i9 & /i10 +
	19	/i13
	20	o17.oe = vcc
	21
	22	o18 = i1 & i2 & i3 +
	23	i4 & i5 & i6 & /i14
	24	o18.oe = vcc
	25
	26	o19 = i7 +
	27	i8
	28	o19.oe = vcc
	29
	30	o20 = i9 & i10 & i14 +
	31	i13
	32	o20.oe = vcc
	33
	34	o21 = /i2 & i5 & i6 & /i7 +
	35	i3 & i6 & i7 & i13 & i23
	36	o21.oe = vcc
	37
	38	o22 = i5 & i6 +
	39	/i7 & i11 +
	40	/i23 +
	41	/i1 & i3 & i6 & i7 & i10
	42	o22.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal14h8/pal14h8.eqn

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal18l4/pal18l4.eqn

r0	r26290
	1	chip pal18l4 PAL18L4
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 i14=14 i15=15 i16=16 o17=17 o18=18 o19=19 o20=20 i21=21 i22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	/o17 = /i1 & /i2 +
	9	/i3 & /i7 +
	10	/i4 & /i8 & i16 +
	11	/i5 & /i6 +
	12	/i9 & /i10 +
	13	/i13 & /i15
	14	o17.oe = vcc
	15
	16	/o18 = i1 & i2 & i3 +
	17	i4 & i5 & i6 & /i14 +
	18	i7 & /i16 +
	19	i8 & i15
	20	o18.oe = vcc
	21
	22	/o19 = i9 & i10 & i14 +
	23	i13 & /i22 +
	24	/i2 & i5 & /i21 +
	25	i6 & /i7
	26	o19.oe = vcc
	27
	28	/o20 = i3 & i6 +
	29	i7 & i13 & i23 +
	30	i5 & i6 & i22 +
	31	/i7 & i11 +
	32	i21 & /i23 +
	33	/i1 & i3 & i6 & i7 & i10
	34	o20.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal18l4/pal18l4.eqn

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16l6/pal16l6.eqn

r0	r26290
	1	chip pal16l6 PAL16L6
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 i14=14 i15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 i22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	/o16 = /i1 & /i2 +
	9	/i3 & /i7 +
	10	/i4 & /i8 +
	11	/i5 & /i6
	12	o16.oe = vcc
	13
	14	/o17 = /i9 & /i10 +
	15	/i13 & /i15 +
	16	i1 & i2 & i3 +
	17	i4 & i5 & i6 & /i14
	18	o17.oe = vcc
	19
	20	/o18 = i7 +
	21	i8 & i15
	22	o18.oe = vcc
	23
	24	/o19 = i9 & i10 & i14 +
	25	i13 & /i22
	26	o19.oe = vcc
	27
	28	/o20 = /i2 & i5 +
	29	i6 & /i7 +
	30	i3 & i6 +
	31	i7 & i13 & i23
	32	o20.oe = vcc
	33
	34	/o21 = i5 & i6 & i22 +
	35	/i7 & i11 +
	36	/i23 +
	37	/i1 & i3 & i6 & i7 & i10
	38	o21.oe = vcc

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal16l6/pal16l6.eqn

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal10p8/pal10p8.eqn

r0	r26290
	1	CHIP pal10p8 PAL10P8
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
	5
	6	EQUATIONS
	7
	8	o12 = i9 & i11 +
	9	/i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8
	10
	11	o13 = i9 & /i11 +
	12	i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8
	13
	14	/o14 = /i9 & /i11 +
	15	i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8
	16
	17	/o15 = /i9 & i11 +
	18	i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8
	19
	20	o16 = i9 & /i11 +
	21	i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8
	22
	23	/o17 = i9 & i11 +
	24	/i1 & /i2 & i3 & i4 & i5 & i6 & /i7 & /i8
	25
	26	/o18 = /i9 & /i11 +
	27	i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8
	28
	29	/o19 = /i9 & i11 +
	30	i1 & /i2 & i3 & /i4 & i5 & /i6 & i7 & /i8

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal10p8/pal10p8.eqn

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal12p6/pal12p6.eqn

r0	r26290
	1	CHIP pal12p6 PAL12P6
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 i19=19 VCC=20
	5
	6	EQUATIONS
	7
	8	o13 = i9 & /i11 +
	9	i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	10	i12 +
	11	/i19
	12
	13	/o14 = /i9 & /i11 +
	14	i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8
	15
	16	/o15 = /i9 & i11 +
	17	i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8
	18
	19	o16 = i9 & /i11 +
	20	i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8
	21
	22	/o17 = i9 & i11 +
	23	/i1 & /i2 & i3 & i4 & i5 & i6 & /i7 & /i8
	24
	25	/o18 = /i9 & /i11 +
	26	i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8 +
	27	/i12 +
	28	i19

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal12p6/pal12p6.eqn

Added: svn:eol-style    + native Added: svn:mime-type    + text/plain

trunk/src/regtests/jedutil/eqns/Opal_Jr/pal14p4/pal14p4.eqn

r0	r26290
	1	CHIP pal14p4 PAL14P4
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 i13=13 o14=14 o15=15 o16=16 o17=17 i18=18 i19=19 VCC=20
	5
	6	EQUATIONS
	7
	8	/o14 = i9 & i11 +
	9	i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	10	i12 & i18 +
	11	/i13 & /i19
	12
	13	o15 = /i9 & i11 +
	14	i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8 +
	15	i12 & /i18 +
	16	i13 & /i19
	17
	18	o16 = i9 & /i11 +
	19	i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8 +
	20	/i12 & /i18 +
	21	/i13 & i19
	22
	23	/o17 = /i9 & /i11 +
	24	i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8 +
	25	/i12 & i13 +
	26	/i18 & i19

Property changes on: trunk/src/regtests/jedutil/eqns/Opal_Jr/pal14p4/pal14p4.eqn

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

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