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r26249 Monday 18th November, 2013 at 01:35:38 UTC by Jürgen Buchmüller
It WORKS :) You have to specify both -hard1 and -hard2 for now. TODO:mouse.
[/branches/alto2/src/emu/cpu/alto2]a2curt.c a2dht.c a2disp.c a2emu.c alto2.c alto2.h
[/branches/alto2/src/emu/machine]diablo_hd.c
[/branches/alto2/src/mess/drivers]alto2.c

branches/alto2/src/emu/machine/diablo_hd.c
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308308      return;
309309   }
310310
311   /* allocate a buffer for this page */
312   m_cache[m_page] = auto_alloc_array(machine(), UINT8, sizeof(diablo_sector_t));
313   /* and read the page from the hard_disk image */
314   if (hard_disk_read(m_disk, m_page, m_cache[m_page])) {
315      LOG_DRIVE((2,"[DHD%u]   C/H/S:%d/%d/%d => page:%d loaded\n", m_unit, m_cylinder, m_head, m_sector, m_page));
311   if (m_disk) {
312      /* allocate a buffer for this page */
313      m_cache[m_page] = auto_alloc_array(machine(), UINT8, sizeof(diablo_sector_t));
314      /* and read the page from the hard_disk image */
315      if (hard_disk_read(m_disk, m_page, m_cache[m_page])) {
316         LOG_DRIVE((2,"[DHD%u]   C/H/S:%d/%d/%d => page:%d loaded\n", m_unit, m_cylinder, m_head, m_sector, m_page));
317      } else {
318         LOG_DRIVE((0,"[DHD%u]   C/H/S:%d/%d/%d => page:%d read failed\n", m_unit, m_cylinder, m_head, m_sector, m_page));
319         auto_free(machine(), m_cache[m_page]);
320         m_cache[m_page] = 0;
321      }
316322   } else {
317      LOG_DRIVE((0,"[DHD%u]   C/H/S:%d/%d/%d => page:%d read failed\n", m_unit, m_cylinder, m_head, m_sector, m_page));
318      auto_free(machine(), m_cache[m_page]);
319      m_cache[m_page] = 0;
323      LOG_DRIVE((2,"[DHD%u]   no disk\n", m_unit));
320324   }
321325}
322326
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677681
678682   if (m_rdfirst >= 0) {
679683      LOG_DRIVE((0, "[DHD%u]   RD CHS:%03d/%d/%02d bit#%-5d ... bit#%-5d\n",
680         m_unit, m_cylinder, m_head, m_sector, m_rdfirst, m_rdlast));
684               m_unit, m_cylinder, m_head, m_sector, m_rdfirst, m_rdlast));
681685   }
682686   m_rdfirst = -1;
683687   m_rdlast = -1;
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773777   auto_free(machine(), m_bits[m_page]);
774778   m_bits[m_page] = 0;
775779
776   if (!hard_disk_write(m_disk, m_page, m_cache[m_page])) {
777      LOG_DRIVE((0,"[DHD%u]   write failed for page #%d\n", m_unit, m_page));
780   if (m_disk) {
781      if (!hard_disk_write(m_disk, m_page, m_cache[m_page])) {
782         LOG_DRIVE((0,"[DHD%u]   write failed for page #%d\n", m_unit, m_page));
783      }
784   } else {
785      LOG_DRIVE((2,"[DHD%u]   no disk\n", m_unit));
778786   }
779787}
780788
branches/alto2/src/emu/cpu/alto2/a2emu.c
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312312void alto2_cpu_device::f1_emu_load_esrb_1()
313313{
314314   LOG((LOG_EMU,2,"   ESRB←; BUS[12-14] (%#o)\n", m_bus));
315   m_s_reg_bank[m_task] = A2_GET32(m_bus,16,12,14);
315   m_s_reg_bank[m_task] = A2_GET16(m_bus,16,12,14);
316316}
317317
318318/**
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558558 */
559559void alto2_cpu_device::f2_load_ir_1()
560560{
561   UINT16 r = (A2_BIT32(m_bus,16,0) << 3) | A2_GET32(m_bus,16,5,7);
561   UINT16 r = (A2_BIT16(m_bus,16,0) << 3) | A2_GET16(m_bus,16,5,7);
562562
563563   /* special logging of some opcodes */
564564   switch (m_bus) {
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630630      r = IR_SH(m_emu.ir) ^ 3;         /* complement of SH */
631631      LOG((LOG_EMU,2,"   IDISP←; branch on SH^3 (%#o|%#o)\n", m_next2, r));
632632   } else {
633      int addr = CTL2K_U3(f2_emu_idisp) + A2_GET32(m_emu.ir,16,1,7);
633      int addr = CTL2K_U3(f2_emu_idisp) + A2_GET16(m_emu.ir,16,1,7);
634634      /* 0???????xxxxxxxx */
635635      r = m_ctl2k_u3[addr];
636636      LOG((LOG_EMU,2,"   IDISP←; IR (%#o) branch on PROM ctl2k_u3[%03o] (%#o|%#o)\n", m_emu.ir, addr, m_next2, r));
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664664      r = IR_SH(m_emu.ir) ^ 3;         /* complement of SH */
665665      LOG((LOG_EMU,2,"   ←ACSOURCE; branch on SH^3 (%#o|%#o)\n", m_next2, r));
666666   } else {
667      int addr = CTL2K_U3(f2_emu_acsource) + A2_GET32(m_emu.ir,16,1,7);
667      int addr = CTL2K_U3(f2_emu_acsource) + A2_GET16(m_emu.ir,16,1,7);
668668      /* 0???????xxxxxxxx */
669669      r = m_ctl2k_u3[addr];
670670      LOG((LOG_EMU,2,"   ←ACSOURCE; branch on PROM ctl2k_u3[%03o] (%#o|%#o)\n", addr, m_next2, r));
branches/alto2/src/emu/cpu/alto2/alto2.c
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125125   m_wrtram_flag(false),
126126   m_s_reg_bank(),
127127   m_bank_reg(),
128   m_ether_enable(true),
128   m_ether_enable(false),
129129   m_ewfct(false),
130130   m_dsp_time(0),
131131   m_dsp_state(0),
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20902090 */
20912091void alto2_cpu_device::f2_bus_1()
20922092{
2093   UINT16 r = A2_GET32(m_bus,16,6,15);
2093   UINT16 r = A2_GET16(m_bus,16,6,15);
20942094   LOG((LOG_CPU,2, "   BUS; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
20952095   m_next2 |= r;
20962096}
branches/alto2/src/emu/cpu/alto2/a2disp.c
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8383 *
8484 * Decoded states of this PROM:
8585 *
86 *      STATE  PROM   binary   HBLANK  HSYNC NEXT SCANEND HLCGATE
86 *  STATE  PROM   binary   HBLANK  HSYNC NEXT SCANEND HLCGATE
8787 *   ----------------------------------------------------------
8888 *     000  0007  00000111     1      1    001    0       0
8989 *     001  0013  00001011     1      1    002    0       0
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214214   *pix++ = (word & 0000001) ? BLACK : WHITE;
215215}
216216
217#define   HLC1   ((m_dsp.hlc >>  0) & 1)      //!< horizontal line counter bit 0
218#define   HLC2   ((m_dsp.hlc >>  1) & 1)      //!< horizontal line counter bit 1
219#define   HLC4   ((m_dsp.hlc >>  2) & 1)      //!< horizontal line counter bit 2
220#define   HLC8   ((m_dsp.hlc >>  3) & 1)      //!< horizontal line counter bit 3
221#define   HLC16   ((m_dsp.hlc >>  4) & 1)      //!< horizontal line counter bit 4
222#define   HLC32   ((m_dsp.hlc >>  5) & 1)      //!< horizontal line counter bit 5
223#define   HLC64   ((m_dsp.hlc >>  6) & 1)      //!< horizontal line counter bit 6
224#define   HLC128   ((m_dsp.hlc >>  7) & 1)      //!< horizontal line counter bit 7
225#define   HLC256   ((m_dsp.hlc >>  8) & 1)      //!< horizontal line counter bit 8
226#define   HLC512   ((m_dsp.hlc >>  9) & 1)      //!< horizontal line counter bit 9
227#define   HLC1024 ((m_dsp.hlc >> 10) & 1)      //!< horizontal line counter bit 10
228
229#define GET_SETMODE_SPEEDY(mode) A2_GET16(mode,16,0,0)  //!< get the pixel clock speed from a SETMODE<- bus value
230#define GET_SETMODE_INVERSE(mode) A2_GET16(mode,16,1,1) //!< get the inverse video flag from a SETMODE<- bus value
231
232//!< helper to extract A3-A0 from a PROM a63 value
233#define A63_NEXT(n) ((n >> 2) & 017)
234
235//!< test the HBLANK (horizontal blanking) signal in PROM a63 being high
236#define A63_HBLANK_HI(a) ((a & A63_HBLANK) ? true : false)
237//!< test the HBLANK (horizontal blanking) signal in PROM a63 being low
238#define A63_HBLANK_LO(a) ((a & A63_HBLANK) ? false : true)
239//!< test the HSYNC (horizontal synchonisation) signal in PROM a63 being high
240#define A63_HSYNC_HI(a) ((a & A63_HSYNC) ? true : false)
241//!< test the HSYNC (horizontal synchonisation) signal in PROM a63 being low
242#define A63_HSYNC_LO(a) ((a & A63_HSYNC) ? false : true)
243//!< test the SCANEND (scanline end) signal in PROM a63 being high
244#define A63_SCANEND_HI(a) ((a & A63_SCANEND) ? true : false)
245//!< test the SCANEND (scanline end) signal in PROM a63 being low
246#define A63_SCANEND_LO(a) ((a & A63_SCANEND) ? false : true)
247//!< test the HLCGATE (horz. line counter gate) signal in PROM a63 being high
248#define A63_HLCGATE_HI(a) ((a & A63_HLCGATE) ? true : false)
249//!< test the HLCGATE (horz. line counter gate) signal in PROM a63 being low
250#define A63_HLCGATE_LO(a) ((a & A63_HLCGATE) ? false : true)
251
217252/**
218253 * @brief unload the next word from the display FIFO and shift it to the screen
219254 */
220255int alto2_cpu_device::unload_word(int x)
221256{
222   int y = ((m_dsp.hlc - m_dsp.vblank) & ~(1024|1)) + HLC1024();
257   int y = ((m_dsp.hlc - m_dsp.vblank) & ~(1024|1)) + HLC1024;
223258   UINT16* scanline = m_dsp.scanline[y];
224259
225260   UINT32 word = m_dsp.inverse;
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289324 * @param arg the current displ_a63 PROM address
290325 * @result returns the next state of the display state machine
291326 */
292int alto2_cpu_device::display_state_machine(int arg)
327UINT8 alto2_cpu_device::display_state_machine(UINT8 arg)
293328{
294   int next, a63, a66;
295
296329   LOG((LOG_DISPL,5,"DSP%03o:", arg));
297330   if (020 == arg) {
298331      LOG((LOG_DISPL,2," HLC=%d", m_dsp.hlc));
299332   }
300333
301   a63 = m_disp_a63[arg];
302
334   UINT8 a63 = m_disp_a63[arg];
303335   if (A63_HLCGATE_HI(a63)) {
304336      /* reset or count horizontal line counters */
305337      if (m_dsp.hlc == ALTO2_DISPLAY_HLC_END)
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313345         m_task_wakeup |= 1 << task_ether;
314346      }
315347   }
316   if (HLC256() || HLC512()) {
348   UINT8 a66 = 017;
349   if (HLC256 || HLC512) {
317350      // PROM a66 is disabled, if any of HLC256 or HLC512 are high
318      a66 = 017;
319351   } else {
320352      // PROM a66 address lines are connected the HLC1 to HLC128 signals
321353      a66 = m_disp_a66[m_dsp.hlc & 0377];
322354   }
323355
324356   // next address from PROM a63, use A4 from HLC1
325   next = (16 * (HLC1() ^ 1)) | A63_NEXT(a63);
357   UINT8 next = ((HLC1 ^ 1) << 4) | A63_NEXT(a63);
326358
327   if (A66_VBLANK_HI(a66, HLC1024())) {
359   if (A66_VBLANK_HI(a66, HLC1024)) {
328360      /* VBLANK: remember hlc */
329361      m_dsp.vblank = m_dsp.hlc | 1;
330362
331363      LOG((LOG_DISPL,1, " VBLANK"));
332364
333365      /* VSYNC is always within VBLANK */
334      if (A66_VSYNC_HI(a66, HLC1024())) {
335         if (A66_VSYNC_LO(m_dsp.a66, HLC1024())) {
366      if (A66_VSYNC_HI(a66, HLC1024)) {
367         if (A66_VSYNC_LO(m_dsp.a66, HLC1024)) {
336368            LOG((LOG_DISPL,1, " VSYNC/ (wake DVT)"));
337369            /*
338370             * The display vertical task DVT is awakened once per field,
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345377         }
346378      }
347379   } else {
348      if (A66_VBLANK_HI(m_dsp.a66, HLC1024())) {
380      if (A66_VBLANK_HI(m_dsp.a66, HLC1024)) {
349381         /**
350382          * VBLANKPULSE:
351383          * The display horizontal task DHT is awakened once at the
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431463      m_task_wakeup |= 1 << task_curt;
432464   }
433465
434
435466   LOG((LOG_DISPL,1, " NEXT:%03o\n", next));
436467
437468   m_dsp.a63 = a63;
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447478 */
448479void alto2_cpu_device::f2_evenfield_1()
449480{
450   UINT16 r = HLC1024() ^ 1;
481   UINT16 r = HLC1024 ^ 1;
451482   LOG((LOG_DISPL,2,"   evenfield branch on HLC1024 (%#o | %#o)\n", m_next2, r));
452483   m_next2 |= r;
453484}
branches/alto2/src/emu/cpu/alto2/alto2.h
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2020#define   ALTO2_TAG "alto2"
2121
2222#ifndef   ALTO2_DEBUG
23#define   ALTO2_DEBUG             1   //!< define to 1 to enable logerror() output
23#define   ALTO2_DEBUG             0   //!< define to 1 to enable logerror() output
2424#endif
2525
2626#define   USE_PRIO_F9318         0   //!< define to 1 to use the F9318 priority encoder code
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3535#define   ALTO2_BUSSRC   8         //!< 8 bus sources
3636#define   ALTO2_F1MAX      16         //!< 16 F1 functions
3737#define   ALTO2_F2MAX      16         //!< 16 F2 functions
38#define   ALTO2_UCYCLE   271         //!< time in nano seconds for a CPU micro cycle: 29.4912MHz/8 -> 3.6864MHz ~= 271ns/clock
38#define   ALTO2_UCYCLE   170         //!< time in nano seconds for a CPU micro cycle: 29.4912MHz/8 -> 3.6864MHz ~= 271ns/clock
3939
4040#define   ALTO2_ETHER_FIFO_SIZE   16
4141
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819819   bool m_ether_enable;                     //!< set to true, if the ethernet should be simulated
820820   bool m_ewfct;                           //!< set by Ether task when it want's a wakeup at switch to task_mrt
821821   int m_dsp_time;                           //!< display_state_machine() time accu
822   int m_dsp_state;                        //!< display_state_machine() previous state
822   UINT8 m_dsp_state;                        //!< display_state_machine() previous state
823823   int m_unload_time;                        //!< unload word time accu
824824   int m_unload_word;                        //!< unload word number
825825   int   m_bitclk_time;                        //!< bitclk call time accu
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16031603      UINT16 **scanline;               //!< array of pointers to the scanlines
16041604   }   m_dsp;
16051605
1606   //! horizontal line counter bit 0
1607   inline int HLC1() { return A2_BIT16(m_dsp.hlc,11,10); }
1608   //! horizontal line counter bit 1
1609   inline int HLC2() { return A2_BIT16(m_dsp.hlc,11,9); }
1610   //! horizontal line counter bit 2
1611   inline int HLC4() { return A2_BIT16(m_dsp.hlc,11,8); }
1612   //! horizontal line counter bit 3
1613   inline int HLC8() { return A2_BIT16(m_dsp.hlc,11,7); }
1614   //! horizontal line counter bit 4
1615   inline int HLC16() { return A2_BIT16(m_dsp.hlc,11,6); }
1616   //! horizontal line counter bit 5
1617   inline int HLC32() { return A2_BIT16(m_dsp.hlc,11,5); }
1618   //! horizontal line counter bit 6
1619   inline int HLC64() { return A2_BIT16(m_dsp.hlc,11,4); }
1620   //! horizontal line counter bit 7
1621   inline int HLC128() { return A2_BIT16(m_dsp.hlc,11,3); }
1622   //! horizontal line counter bit 8
1623   inline int HLC256() { return A2_BIT16(m_dsp.hlc,11,2); }
1624   //! horizontal line counter bit 9
1625   inline int HLC512() { return A2_BIT16(m_dsp.hlc,11,1); }
1626   //! horizontal line counter bit 10
1627   inline int HLC1024() { return A2_BIT16(m_dsp.hlc,11,0); }
1628
1629   //! get the pixel clock speed from a SETMODE<- bus value
1630   static inline UINT16 GET_SETMODE_SPEEDY(UINT16 mode) { return A2_GET16(mode,16,0,0); }
1631   //! get the inverse video flag from a SETMODE<- bus value
1632   static inline UINT16 GET_SETMODE_INVERSE(UINT16 mode) { return A2_GET16(mode,16,1,1); }
1633
16341606   /**
16351607    * @brief PROM a38 contains the STOPWAKE' and MBEMBPTY' signals for the FIFO
16361608    * <PRE>
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16621634   };
16631635
16641636   //! PROM a38 bit O1 is STOPWAKE' (stop DWT if bit is zero)
1665   inline int FIFO_STOPWAKE_0() { return m_disp_a38[m_dsp.fifo_rd * 16 + m_dsp.fifo_wr] & A38_STOPWAKE; }
1637   inline UINT8 FIFO_STOPWAKE_0() { return m_disp_a38[m_dsp.fifo_rd * 16 + m_dsp.fifo_wr] & A38_STOPWAKE; }
16661638
16671639   //! PROM a38 bit O3 is MBEMPTY' (FIFO is empty if bit is zero)
1668   inline int FIFO_MBEMPTY_0() { return m_disp_a38[m_dsp.fifo_rd * 16 + m_dsp.fifo_wr] & A38_MBEMPTY; }
1640   inline UINT8 FIFO_MBEMPTY_0() { return m_disp_a38[m_dsp.fifo_rd * 16 + m_dsp.fifo_wr] & A38_MBEMPTY; }
16691641
16701642   /**
16711643    * @brief emulation of PROM a63 in the display schematics page 8
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17061678      A63_SCANEND   = (1 << 6),            //!< PROM a63 B6 SCANEND signal, which resets the FIFO counters
17071679      A63_HLCGATE   = (1 << 7)            //!< PROM a63 B7 HLCGATE signal, which enables counting the HLC
17081680   };
1709   //!< helper to extract A3-A0 from a PROM a63 value
1710   static inline UINT8 A63_NEXT(UINT8 n) { return (n >> 2) & 017; }
17111681
1712   //!< test the HBLANK (horizontal blanking) signal in PROM a63 being high
1713   static inline bool A63_HBLANK_HI(UINT8 a) { return (a & A63_HBLANK) ? true : false; }
1714   //!< test the HBLANK (horizontal blanking) signal in PROM a63 being low
1715   static inline bool A63_HBLANK_LO(UINT8 a) { return (a & A63_HBLANK) ? false : true; }
1716   //!< test the HSYNC (horizontal synchonisation) signal in PROM a63 being high
1717   static inline bool A63_HSYNC_HI(UINT8 a) { return (a & A63_HSYNC) ? true : false; }
1718   //!< test the HSYNC (horizontal synchonisation) signal in PROM a63 being low
1719   static inline bool A63_HSYNC_LO(UINT8 a) { return (a & A63_HSYNC) ? false : true; }
1720   //!< test the SCANEND (scanline end) signal in PROM a63 being high
1721   static inline bool A63_SCANEND_HI(UINT8 a) { return (a & A63_SCANEND) ? true : false; }
1722   //!< test the SCANEND (scanline end) signal in PROM a63 being low
1723   static inline bool A63_SCANEND_LO(UINT8 a) { return (a & A63_SCANEND) ? false : true; }
1724   //!< test the HLCGATE (horz. line counter gate) signal in PROM a63 being high
1725   static inline bool A63_HLCGATE_HI(UINT8 a) { return (a & A63_HLCGATE) ? true : false; }
1726   //!< test the HLCGATE (horz. line counter gate) signal in PROM a63 being low
1727   static inline bool A63_HLCGATE_LO(UINT8 a) { return (a & A63_HLCGATE) ? false : true; }
1728
17291682   /**
17301683    * @brief vertical blank and synch PROM
17311684    *
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17481701   };
17491702
17501703   //! test the VSYNC (vertical synchronisation) signal in PROM a66 being high
1751   static inline bool A66_VSYNC_HI(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VSYNC_ODD : A66_VSYNC_EVEN) ? true : false; }
1704   static inline bool A66_VSYNC_HI(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VSYNC_ODD : A66_VSYNC_EVEN) ? false : true; }
17521705   //! test the VSYNC (vertical synchronisation) signal in PROM a66 being low
1753   static inline bool A66_VSYNC_LO(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VSYNC_ODD : A66_VSYNC_EVEN) ? false : true; }
1706   static inline bool A66_VSYNC_LO(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VSYNC_ODD : A66_VSYNC_EVEN) ? true : false; }
17541707   //! test the VBLANK (vertical blanking) signal in PROM a66 being high
1755   static inline bool A66_VBLANK_HI(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VBLANK_ODD : A66_VBLANK_EVEN) ? true : false; }
1708   static inline bool A66_VBLANK_HI(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VBLANK_ODD : A66_VBLANK_EVEN) ? false : true; }
17561709   //! test the VBLANK (vertical blanking) signal in PROM a66 being low
1757   static inline bool A66_VBLANK_LO(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VBLANK_ODD : A66_VBLANK_EVEN) ? false : true; }
1710   static inline bool A66_VBLANK_LO(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VBLANK_ODD : A66_VBLANK_EVEN) ? true : false; }
17581711
17591712   //! screen bitmap
17601713   bitmap_ind16* m_displ_bitmap;
r26248r26249
17731726    * @param arg the current m_disp_a63 PROM address
17741727    * @return next state of the display state machine
17751728    */
1776   int display_state_machine(int arg);
1729   UINT8 display_state_machine(UINT8 arg);
17771730
17781731   //! branch on the evenfield flip-flop
17791732   void f2_evenfield_1(void);
branches/alto2/src/emu/cpu/alto2/a2curt.c
r26248r26249
2424 */
2525void alto2_cpu_device::f2_load_xpreg_1()
2626{
27   m_dsp.xpreg = A2_GET32(m_bus,16,6,15);
27   m_dsp.xpreg = A2_GET16(m_bus,16,6,15);
2828   LOG((LOG_CURT,2,"   XPREG← BUS[6-15] (%#o)\n", m_dsp.xpreg));
2929}
3030
branches/alto2/src/emu/cpu/alto2/a2dht.c
r26248r26249
3030 */
3131void alto2_cpu_device::f2_dht_setmode_1()
3232{
33   UINT16 r = A2_GET32(m_bus,16,0,0);
33   UINT16 r = A2_GET16(m_bus,16,0,0);
3434   m_dsp.setmode = m_bus;
3535   LOG((LOG_DHT,2,"   SETMODE← BUS (%#o), branch on BUS[0] (%#o | %#o)\n", m_bus, m_next2, r));
3636   m_next2 |= r;
branches/alto2/src/mess/drivers/alto2.c
r26248r26249
1313UINT32 alto2_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
1414{
1515   alto2_cpu_device* cpu = downcast<alto2_cpu_device *>(m_maincpu.target());
16   copybitmap(bitmap, cpu->display(), 0, 0, 0, 0, cliprect);
16   bitmap_ind16& src = cpu->display();
17   if (src.valid())
18      copybitmap(bitmap, src, 0, 0, 0, 0, cliprect);
1719   return 0;
1820}
1921

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