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r26236 Sunday 17th November, 2013 at 20:01:42 UTC by Phil Bennett

Rewrote Konami 056800 (MIRAC): [Phil Bennett] - Implemented as an 8-bit device - Fixed address mapping - Removed bogus timer interrupt - Fixed interrupt handling 054539.c: Fixed input clock rate and implemented programmable timer based on hardware measurements [Phil Bennett, Stefan Lindberg] lethal.c, mystwarr,c, tmnt.c: Hooked up 054539 timer interrupt. Fixes music tempo in some games [Phil Bennett] qdrmfgp.c: Hooked up 054539 timer interrupt for qdrmfgp, fixed IRQ acknowledge handling [Phil Bennett] plygonet.c: Hooked up 054539 timer interrupt, removed non-existent second 054539 and fixed EEPROM regression [Phil Bennett] hornet.c, gticlub.c: Implemented sound interrupt timer [Phil Bennett] konamigx.c improvements: [Phil Bennett] - Hooked up 056800 device - Hooked up 054539 timer interrupt - Removed sound hacks - All DSP RAM tests now pass, winspike sound now works konamigq.c improvements: [Phil Bennett] - Hooked up 056800 device - Hooked up 054539 timer interrupt - Added TMS57002 DASP ultrsprt.c improvements: [Phil Bennett] - Hooked up 054539 timer interrupt - Implemented VRAM double buffering - Improved trackball inputs - Fixed sound zr107.c improvements: [Phil Bennett] - Hooked up 054539 timer interrupt - Fixed sound in all games rungun.c improvements: [Phil Bennett] - Hooked up 054539 timer interrupt. Fixes music tempo - Implemented sound CPU NMI control - Fixed 054539 #2 regression New games added or promoted from NOT_WORKING status: ==================================================== Wave shark/Jet Wave [Phil Bennett]

[src/emu/sound]	k054539.c k054539.h k056800.c k056800.h
[src/mame/drivers]	gijoe.c gticlub.c hornet.c konamigq.c konamigx.c lethal.c moo.c mystwarr.c nwk-tr.c plygonet.c qdrmfgp.c rungun.c tmnt.c ultrsprt.c zr107.c
[src/mame/includes]	konamigx.h mystwarr.h plygonet.h qdrmfgp.h rungun.h

trunk/src/emu/sound/k054539.c

r26235	r26236
1	1	/*********************************************************
2	2
3		Konami 054539 PCM Sound Chip
	3	Konami 054539 (TOP) PCM Sound Chip
4	4
5	5	A lot of information comes from Amuse.
6	6	Big thanks to them.
7	7
8
9
10		CHANNEL_DEBUG enables the following keys:
11
12		PAD.   : toggle debug mode
13		PAD0   : toggle chip    (0 / 1)
14		PAD4,6 : select channel (0 - 7)
15		PAD8,2 : adjust gain    (00=0.0 10=1.0, 20=2.0, etc.)
16		PAD5   : reset gain factor to 1.0
17
18	8	*********************************************************/
19	9
20	10	#include "emu.h"
r26235	r26236
22	12
23	13	const device_type K054539 = &device_creator<k054539_device>;
24	14
25		#define CHANNEL_DEBUG 0
26	15	#define VERBOSE 0
27	16	#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
28	17
29	18	k054539_device::k054539_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
30	19	: device_t(mconfig, K054539, "K054539", tag, owner, clock, "k054539", __FILE__),
31		device_sound_interface(mconfig, *this)
	20	device_sound_interface(mconfig, *this),
	21	m_timer_handler(*this)
32	22	{
33	23	}
34	24
r26235	r26236
61	51	00: type (b2-3), reverse (b5)
62	52	01: loop (b0)
63	53
64		214: keyon (b0-7 = channel 0-7)
65		215: keyoff          ""
66		22c: channel active? ""
67		22d: data read/write port
68		22e: rom/ram select (00..7f == rom banks, 80 = ram)
69		22f: enable pcm (b0), disable register ram updating (b7)
	54	214: Key on (b0-7 = channel 0-7)
	55	215: Key off          ""
	56	225: ?
	57	227: Timer frequency
	58	228: ?
	59	229: ?
	60	22a: ?
	61	22b: ?
	62	22c: Channel active? (b0-7 = channel 0-7)
	63	22d: Data read/write port
	64	22e: ROM/RAM select (00..7f == ROM banks, 80 = Reverb RAM)
	65	22f: Global control:
	66	.......x - Enable PCM
	67	......x. - Timer related?
	68	...x.... - Enable ROM/RAM readback from 0x22d
	69	..x..... - Timer output enable?
	70	x....... - Disable register RAM updates
70	71
71		The chip has a 0x4000 bytes reverb buffer (the ram from 0x22e).
72		The reverb delay is actually an offset in this buffer.
	72	The chip has an optional 0x8000 byte reverb buffer.
	73	The reverb delay is actually an offset in this buffer.
73	74	*/
74	75
75	76	void k054539_device::init_flags(int _flags)
r26235	r26236
302	303
303	304	void k054539_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
304	305	{
305		if(regs[0x22f] & 0x20)
306		irq(this);
	306	if (regs[0x22f] & 0x20)
	307	m_timer_handler(m_timer_state ^= 1);
307	308	}
308	309
309	310	void k054539_device::init_chip()
r26235	r26236
327	328	break;
328	329	}
329	330
330		if(irq) {
331		// One or more of the registers must be the timer period
332		// And anyway, this particular frequency is probably wrong
333		// 480 hz is TRUSTED by gokuparo disco stage - the looping sample doesn't line up otherwise
334		emu_timer *tm = timer_alloc();
335		tm->adjust(attotime::from_hz(480), 0, attotime::from_hz(480));
336		}
	331	stream = stream_alloc(0, 2, clock() / 384);
337	332
338		// If the clock is anything else than 48000, things are going to go wrong.
339		stream = stream_alloc(0, 2, clock());
340
341	333	save_item(NAME(regs));
342	334	save_pointer(NAME(ram), 0x4000);
343	335	save_item(NAME(cur_ptr));
r26235	r26236
422	414	keyoff(ch);
423	415	break;
424	416
	417	case 0x227:
	418	{
	419	attotime period = attotime::from_hz((float)(38 + data) * (clock()/384.0f/14400.0f)) / 2.0f;
	420
	421	m_timer->adjust(period, 0, period);
	422
	423	m_timer_state = 0;
	424	m_timer_handler(m_timer_state);
	425	}
	426	break;
	427
425	428	case 0x22d:
426	429	if(regs[0x22e] == 0x80)
427	430	cur_zone[cur_ptr] = data;
r26235	r26236
437	440	cur_limit = data == 0x80 ? 0x4000 : 0x20000;
438	441	cur_ptr = 0;
439	442	break;
	443
	444	case 0x22f:
	445	if (!(data & 0x20)) // Disable timer output?
	446	{
	447	m_timer_state = 0;
	448	m_timer_handler(m_timer_state);
	449	}
	450	break;
440	451
441	452	default:
442	453	#if 0
r26235	r26236
489	500
490	501	void k054539_device::device_start()
491	502	{
	503	m_timer = timer_alloc(0);
	504
	505	m_timer_handler.resolve_safe();
	506
492	507	for (int i = 0; i < 8; i++)
493	508	gain[i] = 1.0;
	509
494	510	flags = RESET_FLAGS;
495	511
496	512	/*
r26235	r26236
520	536
521	537	void k054539_device::device_reset()
522	538	{
523		}
	539	m_timer->enable(false);
	540	}
		No newline at end of file

trunk/src/emu/sound/k054539.h

r26235	r26236
12	12	#define MCFG_K054539_ADD(_tag, _clock, _interface) \
13	13	MCFG_DEVICE_ADD(_tag, K054539, _clock) \
14	14	k054539_device::static_set_interface(*device, _interface);
	15
	16	#define MCFG_K054539_TIMER_HANDLER(_devcb) \
	17	devcb = &k054539_device::set_timer_handler(*device, DEVCB2_##_devcb);
	18
15	19	struct k054539_interface
16	20	{
17	21	const char *rgnoverride;
18	22	void (*apan)(device_t *, double, double);   /* Callback for analog output mixing levels (0..1 for each channel) */
19		void (*irq)(device_t *);
20	23	};
21	24
22	25
r26235	r26236
46	49	k054539_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
47	50
48	51	// static configuration helpers
49		static void static_set_interface(device_t &device, const k054539_interface &interface);
	52	static void static_set_interface(device_t &device, const k054539_interface &interface);
	53	template<class _Object> static devcb2_base &set_timer_handler(device_t &device, _Object object) { return downcast<k054539_device &>(device).m_timer_handler.set_callback(object); }
	54
50	55
51	56	DECLARE_WRITE8_MEMBER(write);
52	57	DECLARE_READ8_MEMBER(read);
r26235	r26236
104	109
105	110	channel channels[8];
106	111	sound_stream *stream;
	112
	113	emu_timer         *m_timer;
	114	UINT32            m_timer_state;
	115	devcb2_write_line   m_timer_handler;
107	116
108	117	bool regupdate();
109	118	void keyon(int channel);

trunk/src/emu/sound/k056800.c

r26235	r26236
1	1	/***********************************************************************
2	2
3	3	Konami K056800 (MIRAC)
4		Sound interface
	4	Sound interface and audio control
5	5
6
7	6	***********************************************************************/
8	7
9	8	#include "emu.h"
10	9	#include "sound/k056800.h"
11	10
12	11
	12
13	13	const device_type K056800 = &device_creator<k056800_device>;
14	14
15		k056800_device::k056800_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
16		: device_t(mconfig, K056800, "Konami 056800 MIRAC", tag, owner, clock, "k056800", __FILE__)
17		{
18		}
19	15
	16
20	17	//-------------------------------------------------
21		//  device_config_complete - perform any
22		//  operations now that the configuration is
23		//  complete
	18	//  k056800_device - constructor
24	19	//-------------------------------------------------
25	20
26		void k056800_device::device_config_complete()
	21	k056800_device::k056800_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	22	: device_t(mconfig, K056800, "Konami 056800 MIRAC", tag, owner, clock, "k056800", __FILE__),
	23	m_int_handler(*this)
27	24	{
28		// inherit a copy of the static data
29		const k056800_interface *intf = reinterpret_cast<const k056800_interface *>(static_config());
30		if (intf != NULL)
31		*static_cast<k056800_interface *>(this) = *intf;
32
33		// or initialize to defaults if none provided
34		else
35		{
36		m_irq_cb = NULL;
37		}
38	25	}
39	26
	27
40	28	//-------------------------------------------------
41	29	//  device_start - device-specific startup
42	30	//-------------------------------------------------
43	31
44	32	void k056800_device::device_start()
45	33	{
46		attotime timer_period = attotime::from_hz(clock()) * 14700 * 3;
	34	m_int_handler.resolve_safe();
47	35
48		m_irq_cb_func = m_irq_cb;
	36	save_item(NAME(m_int_pending));
	37	save_item(NAME(m_host_to_snd_regs));
	38	save_item(NAME(m_snd_to_host_regs));
	39	}
49	40
50		m_sound_cpu_timer = timer_alloc(TIMER_TICK_SOUND_CPU);
51		m_sound_cpu_timer->adjust(timer_period, 0, timer_period);
52	41
53		save_item(NAME(m_host_reg));
54		save_item(NAME(m_sound_reg));
55		save_item(NAME(m_sound_cpu_irq1_enable));
56		}
57
58	42	//-------------------------------------------------
59	43	//  device_reset - device-specific reset
60	44	//-------------------------------------------------
61	45
62	46	void k056800_device::device_reset()
63	47	{
64		memset(m_host_reg, 0, sizeof(m_host_reg));
65		memset(m_sound_reg, 0, sizeof(m_sound_reg));
66
67		m_sound_cpu_irq1_enable = 0;
	48	m_int_pending = false;
	49	memset(m_host_to_snd_regs, 0, sizeof(m_host_to_snd_regs));
	50	memset(m_snd_to_host_regs, 0, sizeof(m_snd_to_host_regs));
68	51	}
69	52
70	53
r26235	r26236
72	55	DEVICE HANDLERS
73	56	*****************************************************************************/
74	57
75
76		UINT8 k056800_device::host_reg_r( int reg )
	58	READ8_MEMBER( k056800_device::host_r )
77	59	{
78		UINT8 value = m_host_reg[reg];
79		if (reg == 2)
80		value &= ~3; // suppress VOLWR busy flags
	60	UINT32 r = offset & 7;
	61	UINT8 data = 0;
	62
	63	switch (r)
	64	{
	65	case 0:
	66	case 1:
	67	data = m_snd_to_host_regs[r];
	68	break;
81	69
82		return value;
83		}
	70	case 2:
	71	// .... ...x - Front volume busy
	72	// .... ..x. - Rear volume busy
	73	break;
	74	}
84	75
85		void k056800_device::host_reg_w( int reg, UINT8 data )
86		{
87		m_sound_reg[reg] = data;
88
89		if (reg == 7)
90		m_irq_cb(machine(), 1);
	76	return data;
91	77	}
92	78
93		UINT8 k056800_device::sound_reg_r( int reg )
94		{
95		return m_sound_reg[reg];
96		}
97	79
98		void k056800_device::sound_reg_w( int reg, UINT8 data )
	80	WRITE8_MEMBER( k056800_device::host_w )
99	81	{
100		if (reg == 4)
101		m_sound_cpu_irq1_enable = data & 0x01;
	82	UINT32 r = offset & 7;
102	83
103		m_host_reg[reg] = data;
104		}
105
106		void k056800_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
107		{
108		switch (id)
	84	switch (r)
109	85	{
110		case TIMER_TICK_SOUND_CPU:
111		if (m_sound_cpu_irq1_enable)
112		m_irq_cb_func(machine(), 0);
	86	case 0:
	87	case 1:
	88	case 2:
	89	case 3:
	90	m_host_to_snd_regs[r] = data;
113	91	break;
114	92
115		default:
116		assert_always(FALSE, "Unknown id in k056800_device::device_timer");
117		}
118		}
	93	case 4:
	94	// xxxx xxxx - Front volume (CAh increments, 35h decrements)
	95	break;
119	96
120		READ32_MEMBER( k056800_device::host_r )
121		{
122		UINT32 r = 0;
	97	case 5:
	98	// xxxx xxxx - Rear volume (as above)
	99	break;
123	100
124		if (ACCESSING_BITS_24_31)
125		r |= host_reg_r((offset * 4) + 0) << 24;
	101	case 6:
	102	// .... ...x - Mute front
	103	// .... ..x. - Mute rear
	104	break;
	105
	106	case 7:
	107	// Sound interrupt
	108	m_int_pending = true;
126	109
127		if (ACCESSING_BITS_16_23)
128		r |= host_reg_r((offset * 4) + 1) << 16;
	110	if (m_int_enabled)
	111	m_int_handler(ASSERT_LINE);
129	112
130		if (ACCESSING_BITS_8_15)
131		r |= host_reg_r((offset * 4) + 2) << 8;
	113	break;
	114	}
	115	}
132	116
133		if (ACCESSING_BITS_0_7)
134		r |= host_reg_r((offset * 4) + 3) << 0;
135	117
	118	READ8_MEMBER( k056800_device::sound_r )
	119	{
	120	UINT32 r = offset & 7;
	121	UINT8 data = 0;
	122
	123	switch (r)
	124	{
	125	case 0:
	126	case 1:
	127	case 2:
	128	case 3:
	129	data = m_host_to_snd_regs[r];
	130	break;
	131	}
136	132
137		return r;
	133	return data;
138	134	}
139	135
140		WRITE32_MEMBER( k056800_device::host_w )
	136
	137	WRITE8_MEMBER( k056800_device::sound_w )
141	138	{
142		if (ACCESSING_BITS_24_31)
143		host_reg_w((offset * 4) + 0, (data >> 24) & 0xff);
	139	UINT32 r = offset & 7;
144	140
145		if (ACCESSING_BITS_16_23)
146		host_reg_w((offset * 4) + 1, (data >> 16) & 0xff);
	141	switch (r)
	142	{
	143	case 0:
	144	case 1:
	145	m_snd_to_host_regs[r] = data;
	146	break;
	147
	148	case 2:
	149	case 3:
	150	// TODO: Unknown
	151	break;
147	152
148		if (ACCESSING_BITS_8_15)
149		host_reg_w((offset * 4) + 2, (data >> 8) & 0xff);
	153	case 4:
	154	// Sound CPU interrupt control
	155	m_int_enabled = (data & 1) != 0;
150	156
151		if (ACCESSING_BITS_0_7)
152		host_reg_w((offset * 4) + 3, (data >> 0) & 0xff);
153
154		}
155
156		READ16_MEMBER( k056800_device::sound_r )
157		{
158		return sound_reg_r(offset);
159		}
160
161		WRITE16_MEMBER( k056800_device::sound_w )
162		{
163		sound_reg_w(offset, data);
164		}
	157	if (m_int_enabled)
	158	{
	159	// Enable interrupt
	160	if (m_int_pending)
	161	m_int_handler(ASSERT_LINE);
	162	}
	163	else
	164	{
	165	// Disable/acknowledge interrupt
	166	m_int_pending = false;
	167	m_int_handler(CLEAR_LINE);
	168	}
	169	break;
	170
	171	case 5:
	172	// TODO: Unknown
	173	break;
	174	}
	175	}
		No newline at end of file

trunk/src/emu/sound/k056800.h

r26235	r26236
9	9
10	10
11	11	/***************************************************************************
12		TYPE DEFINITIONS
	12	DEVICE CONFIGURATION MACROS
13	13	***************************************************************************/
14	14
15		typedef void (*k056800_irq_cb)(running_machine &, int);
	15	#define MCFG_K056800_ADD(_tag, _clock) \
	16	MCFG_DEVICE_ADD(_tag, K056800, _clock) \
16	17
	18	#define MCFG_K056800_INT_HANDLER(_devcb) \
	19	devcb = &k056800_device::set_int_handler(*device, DEVCB2_##_devcb);
17	20
18		struct k056800_interface
19		{
20		k056800_irq_cb       m_irq_cb;
21		};
22	21
23		class k056800_device : public device_t,
24		public k056800_interface
	22
	23	/***************************************************************************
	24	TYPE DEFINITIONS
	25	***************************************************************************/
	26
	27	class k056800_device : public device_t
25	28	{
26	29	public:
	30	// construction/destruction
27	31	k056800_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
28		~k056800_device() {}
29	32
30		enum
31		{
32		TIMER_TICK_SOUND_CPU
33		};
	33	// static configuration helpers
	34	template<class _Object> static devcb2_base &set_int_handler(device_t &device, _Object object) { return downcast<k056800_device &>(device).m_int_handler.set_callback(object); }
34	35
35		DECLARE_READ32_MEMBER( host_r );
36		DECLARE_WRITE32_MEMBER( host_w );
37		DECLARE_READ16_MEMBER( sound_r );
38		DECLARE_WRITE16_MEMBER( sound_w );
	36	DECLARE_READ8_MEMBER( host_r );
	37	DECLARE_WRITE8_MEMBER( host_w );
	38	DECLARE_READ8_MEMBER( sound_r );
	39	DECLARE_WRITE8_MEMBER( sound_w );
39	40
40	41	protected:
41	42	// device-level overrides
42		virtual void device_config_complete();
43	43	virtual void device_start();
44	44	virtual void device_reset();
45	45
46		virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
47
48	46	private:
49	47	// internal state
50		UINT8                m_host_reg[8];
51		UINT8                m_sound_reg[8];
52		emu_timer            *m_sound_cpu_timer;
53		UINT8                m_sound_cpu_irq1_enable;
54		k056800_irq_cb       m_irq_cb_func;
	48	bool            m_int_pending;
	49	bool            m_int_enabled;
	50	UINT8            m_host_to_snd_regs[4];
	51	UINT8            m_snd_to_host_regs[2];
55	52
56		UINT8 host_reg_r( int reg );
57		void host_reg_w( int reg, UINT8 data );
58		UINT8 sound_reg_r( int reg );
59		void sound_reg_w( int reg, UINT8 data );
60
	53	devcb2_write_line   m_int_handler;
61	54	};
62	55
63	56	extern const device_type K056800;
64	57
65	58
66	59
67		/***************************************************************************
68		DEVICE CONFIGURATION MACROS
69		***************************************************************************/
70
71		#define MCFG_K056800_ADD(_tag, _interface, _clock) \
72		MCFG_DEVICE_ADD(_tag, K056800, _clock) \
73		MCFG_DEVICE_CONFIG(_interface)
74
75
76	60	#endif /* __K056800_H__ */

trunk/src/mame/drivers/mystwarr.c

r26235	r26236
523	523
524	524	/**********************************************************************************/
525	525
526
527	526	void mystwarr_state::reset_sound_region()
528	527	{
529		membank("bank2")->set_base(memregion("soundcpu")->base() + 0x10000 + m_cur_sound_region*0x4000);
	528	membank("bank2")->set_base(memregion("soundcpu")->base() + 0x10000 + (m_sound_ctrl & 0xf)*0x4000);
530	529	}
531	530
532		WRITE8_MEMBER(mystwarr_state::sound_bankswitch_w)
	531	WRITE8_MEMBER(mystwarr_state::sound_ctrl_w)
533	532	{
534		m_cur_sound_region = (data & 0xf);
	533	if (!(data & 0x10))
	534	m_soundcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
	535
	536	m_sound_ctrl = data;
535	537	reset_sound_region();
536	538	}
537	539
538	540	/* sound memory maps
539	541
540		there are 2 sound boards: the martial champion single-'539 version
	542	there are 2 sound systems: the martial champion single-'539 version
541	543	and the dual-'539 version used by run and gun, violent storm, monster maulers,
542	544	gaiapolous, metamorphic force, and mystic warriors.  Their memory maps are
543	545	quite similar to xexex/gijoe/asterix's sound.
r26235	r26236
555	557	AM_RANGE(0xf000, 0xf000) AM_WRITE(soundlatch3_byte_w)
556	558	AM_RANGE(0xf002, 0xf002) AM_READ(soundlatch_byte_r)
557	559	AM_RANGE(0xf003, 0xf003) AM_READ(soundlatch2_byte_r)
558		AM_RANGE(0xf800, 0xf800) AM_WRITE(sound_bankswitch_w)
	560	AM_RANGE(0xf800, 0xf800) AM_WRITE(sound_ctrl_w)
559	561	AM_RANGE(0xfff0, 0xfff3) AM_WRITENOP    // unknown write
560	562	ADDRESS_MAP_END
561	563
562	564
	565	WRITE_LINE_MEMBER(mystwarr_state::k054539_nmi_gen)
	566	{
	567	if (m_sound_ctrl & 0x10)
	568	{
	569	// Trigger an /NMI on the rising edge
	570	if (!m_sound_nmi_clk && state)
	571	{
	572	m_soundcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
	573	}
	574	}
	575
	576	m_sound_nmi_clk = state;
	577	}
	578
563	579	static const k054539_interface k054539_config =
564	580	{
565	581	"shared"
r26235	r26236
809	825	MACHINE_START_MEMBER(mystwarr_state,mystwarr)
810	826	{
811	827	/* set default bankswitch */
812		m_cur_sound_region = 2;
	828	m_sound_ctrl = 2;
813	829	reset_sound_region();
814	830
815	831	m_mw_irq_control = 0;
816	832
817	833	save_item(NAME(m_mw_irq_control));
818		save_item(NAME(m_cur_sound_region));
	834	save_item(NAME(m_sound_ctrl));
	835	save_item(NAME(m_sound_nmi_clk));
	836
819	837	machine().save().register_postload(save_prepost_delegate(FUNC(mystwarr_state::reset_sound_region), this));
820	838	}
821	839
r26235	r26236
945	963
946	964	MCFG_CPU_ADD("soundcpu", Z80, 8000000)
947	965	MCFG_CPU_PROGRAM_MAP(mystwarr_sound_map)
948		MCFG_CPU_PERIODIC_INT_DRIVER(mystwarr_state, nmi_line_pulse,  480)
949	966
950	967	MCFG_QUANTUM_TIME(attotime::from_hz(1920))
951	968
r26235	r26236
976	993	/* sound hardware */
977	994	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
978	995
979		MCFG_K054539_ADD("k054539_1", 48000, k054539_config)
	996	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
	997	MCFG_K054539_TIMER_HANDLER(WRITELINE(mystwarr_state, k054539_nmi_gen))
980	998	MCFG_SOUND_ROUTE(0, "rspeaker", 1.0)    /* stereo channels are inverted */
981	999	MCFG_SOUND_ROUTE(1, "lspeaker", 1.0)
982	1000
983		MCFG_K054539_ADD("k054539_2", 48000, k054539_config)
	1001	MCFG_K054539_ADD("k054539_2", XTAL_18_432MHz, k054539_config)
984	1002	MCFG_SOUND_ROUTE(0, "rspeaker", 1.0)    /* stereo channels are inverted */
985	1003	MCFG_SOUND_ROUTE(1, "lspeaker", 1.0)
986	1004	MACHINE_CONFIG_END

trunk/src/mame/drivers/konamigx.c

r26235	r26236
99	99	#include "cpu/z80/z80.h"
100	100	#include "cpu/tms57002/tms57002.h"
101	101	#include "machine/eepromser.h"
	102	#include "sound/k056800.h"
102	103	#include "sound/k054539.h"
103	104	#include "includes/konamigx.h"
104	105	#include "machine/adc083x.h"
r26235	r26236
114	115	static int gx_rdport1_3, gx_syncen;
115	116
116	117	static emu_timer *dmadelay_timer;
	118	static emu_timer *boothack_timer;
117	119
118	120	/**********************************************************************************/
119	121	/*
r26235	r26236
483	485	//      logerror("write %x to IRQ register (PC=%x)\n", konamigx_wrport1_1, space.device().safe_pc());
484	486
485	487	// gx_syncen is to ensure each IRQ is trigger at least once after being enabled
486		if (konamigx_wrport1_1 & 0x80) gx_syncen |= konamigx_wrport1_1 & 0x1f;
	488	if (konamigx_wrport1_1 & 0x80)
	489	gx_syncen |= konamigx_wrport1_1 & 0x1f;
487	490	}
488	491	}
489	492
r26235	r26236
506	509	{
507	510	if (data & 0x400000)
508	511	{
509		// enable 68k
510		// clear the halt condition and reset the 68000
	512	// Enable sound CPU and DSP
511	513	m_soundcpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
512		m_soundcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
	514	m_soundcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
	515
	516	if (m_sound_ctrl & 0x10)
	517	m_dasp->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
513	518	}
514	519	else
515	520	{
516		// disable 68k
	521	m_sound_ctrl = 0;
	522
	523	// Reset sound CPU and DSP
517	524	m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
	525	m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
	526	m_dasp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
	527	m_k056832->reset();
518	528	}
519	529
520	530	m_k055673->k053246_set_objcha_line((data&0x100000) ? ASSERT_LINE : CLEAR_LINE);
r26235	r26236
527	537	/**********************************************************************************/
528	538	/* IRQ controllers */
529	539
530		#define ADD_SKIPPER32(PC, BASE, START, END, DATA, MASK){ \
531		waitskip.pc   = PC;        \
532		waitskip.offs = START/4;   \
533		waitskip.data = DATA;      \
534		waitskip.mask = MASK;      \
535		resume_trigger= 1000;      \
536		space.install_legacy_read_handler \
537		((BASE+START)&~3, (BASE+END)|3, FUNC(waitskip_r));}
538
539	540	static int suspension_active, resume_trigger;
540		#ifdef UNUSED_FUNCTION
541		static struct { UINT32 offs, pc, mask, data; } waitskip;
542	541
543		READ32_MEMBER(konamigx_state::waitskip_r)
544		{
545		UINT32 data = m_workram[waitskip.offs+offset];
546
547		if (space.device().safe_pc() == waitskip.pc && (data & mem_mask) == (waitskip.data & mem_mask))
548		{
549		space.device().execute().spin_until_trigger(resume_trigger);
550		suspension_active = 1;
551		}
552
553		return(data);
554		}
555		#endif
556
557
558	542	READ32_MEMBER(konamigx_state::ccu_r)
559	543	{
560	544	// the routine at 204abe in opengolf polls to see if we're in vblank (it wants values between 0x111 and 0x1df)
r26235	r26236
590	574	}
591	575	}
592	576
	577	TIMER_CALLBACK_MEMBER(konamigx_state::boothack_callback)
	578	{
	579	// Restore main CPU normal operating frequency
	580	m_maincpu->set_clock_scale(1.0f);
	581	}
593	582
594	583	/*
595	584	GX object DMA timings:
r26235	r26236
602	591	TIMER_CALLBACK_MEMBER(konamigx_state::dmaend_callback)
603	592	{
604	593	// foul-proof (CPU0 could be deactivated while we wait)
605		if (resume_trigger && suspension_active) { suspension_active = 0; machine().scheduler().trigger(resume_trigger); }
	594	if (resume_trigger && suspension_active)
	595	{
	596	suspension_active = 0;
	597	machine().scheduler().trigger(resume_trigger);
	598	}
606	599
607	600	// DMA busy flag must be cleared before triggering IRQ 3
608	601	gx_rdport1_3 &= ~2;
r26235	r26236
638	631	INTERRUPT_GEN_MEMBER(konamigx_state::konamigx_vbinterrupt)
639	632	{
640	633	// lift idle suspension
641		if (resume_trigger && suspension_active) { suspension_active = 0; machine().scheduler().trigger(resume_trigger); }
	634	if (resume_trigger && suspension_active)
	635	{
	636	suspension_active = 0;
	637	machine().scheduler().trigger(resume_trigger);
	638	}
642	639
643	640	// IRQ 1 is the main 60hz vblank interrupt
644	641	if (gx_syncen & 0x20)
r26235	r26236
662	659	if (scanline == 240)
663	660	{
664	661	// lift idle suspension
665		if (resume_trigger && suspension_active) { suspension_active = 0; machine().scheduler().trigger(resume_trigger); }
	662	if (resume_trigger && suspension_active)
	663	{
	664	suspension_active = 0;
	665	machine().scheduler().trigger(resume_trigger);
	666	}
666	667
667	668	// IRQ 1 is the main 60hz vblank interrupt
668	669	// the gx_syncen & 0x20 test doesn't work on type 3 or 4 ROM boards, likely because the ROM board
r26235	r26236
703	704
704	705
705	706	/**********************************************************************************/
706		/* sound communication handlers */
707
708		static UINT8 sndto000[16], sndto020[16];    /* read/write split mapping */
709		static int snd020_hack;
710
711		READ32_MEMBER(konamigx_state::sound020_r)
712		{
713		UINT32 reg, MSW, LSW, rv = 0;
714
715		reg = offset << 1;
716
717		if (ACCESSING_BITS_24_31)
718		{
719		MSW = sndto020[reg];
720		if (reg == 2) MSW &= ~3; // suppress VOLWR busy flags
721		rv |= MSW<<24;
722		}
723
724		if (ACCESSING_BITS_8_15)
725		{
726		LSW = sndto020[reg+1];
727		rv |= LSW<<8;
728		}
729
730		//  mame_printf_debug("Read 68k @ %x (PC=%x)\n", reg, space.device().safe_pc());
731
732		// we clearly have some problem because some games require these hacks
733		// perhaps 68000/68020 timing is skewed?
734		switch (snd020_hack)
735		{
736		case 1: // Lethal Enforcer init
737		if (reg == 0) rv |= 0xff00;
738		break;
739		case 2: // Winning Spike
740		if (space.device().safe_pc() == 0x2026fe) rv = 0xc0c0c0c0;
741		break;
742		case 3: // Run'n Gun 2
743		if (space.device().safe_pc() == 0x24f0b6) rv = 0xffffffff;
744		if (space.device().safe_pc() == 0x24f122) rv = 0xc0c0c0c0;
745		break;
746		case 4: // Rushing Heroes
747		if (space.device().safe_pc() == 0x20eda6) rv = 0xc0c0c0c0;
748		break;
749		case 5: // Vs. Net Soccer ver. UAB
750		if (space.device().safe_pc() == 0x24c5d2) rv = 0xffffffff;
751		if (space.device().safe_pc() == 0x24c63e) rv = 0xc0c0c0c0;
752		break;
753		case 6: // Slam Dunk 2
754		if (space.device().safe_pc() == 0x24f1b0) rv = 0xffffffff;
755		if (space.device().safe_pc() == 0x24f21c) rv = 0xc0c0c0c0;
756		break;
757		case 7: // Vs. Net Soccer ver. AAA
758		if (space.device().safe_pc() == 0x24c6b6) rv = 0xffffffff;
759		if (space.device().safe_pc() == 0x24c722) rv = 0xc0c0c0c0;
760		break;
761		case 8: // Vs. Net Soccer ver. EAD
762		if (space.device().safe_pc() == 0x24c416) rv = 0xffffffff;
763		if (space.device().safe_pc() == 0x24c482) rv = 0xc0c0c0c0;
764		break;
765		case 9: // Vs. Net Soccer ver. EAB
766		if (space.device().safe_pc() == 0x24c400) rv = 0xffffffff;
767		if (space.device().safe_pc() == 0x24c46c) rv = 0xc0c0c0c0;
768		break;
769		case 10: // Vs. Net Soccer ver. JAB
770		if (space.device().safe_pc() == 0x24c584) rv = 0xffffffff;
771		if (space.device().safe_pc() == 0x24c5f0) rv = 0xc0c0c0c0;
772		break;
773		case 11: // Racin' Force
774		if (reg == 0)
775		{
776		if (space.device().safe_pc() == 0x0202190)
777		rv |= 0x4000;
778		}
779		break;
780
781		case 12: // Open Golf / Golfing Greats 2
782		if (reg == 0)
783		{
784		if ((space.device().safe_pc() == 0x0245e80) || (space.device().safe_pc() == 0x02459d6) || (space.device().safe_pc() == 0x0245e40) )
785		rv |= 0x4000;
786		}
787		break;
788		case 13: // Soccer Superstars
789		//if(space.device().safe_pc() != 0x236dce && space.device().safe_pc() != 0x236d8a && space.device().safe_pc() != 0x236d8a)
790		//  printf("Read 68k @ %x (PC=%x)\n", reg, space.device().safe_pc());
791		if (space.device().safe_pc() == 0x0236e04)  rv = 0xffffffff;
792		if (space.device().safe_pc() == 0x0236e12)  rv = 0xffffffff;
793		break;
794		case 14: // Soccer Superstars ver. JAC
795		//if(space.device().safe_pc() != 0x2367b4)
796		//  printf("Read 68k @ %x (PC=%x)\n", reg, space.device().safe_pc());
797		if (space.device().safe_pc() == 0x02367ea)  rv = 0xffffffff;
798		if (space.device().safe_pc() == 0x02367f8)  rv = 0xffffffff;
799		break;
800		case 15: // Soccer Superstars ver. JAA
801		//if(space.device().safe_pc() != 0x23670a)
802		//  printf("Read 68k @ %x (PC=%x)\n", reg, space.device().safe_pc());
803		if (space.device().safe_pc() == 0x0236740)  rv = 0xffffffff;
804		if (space.device().safe_pc() == 0x023674e)  rv = 0xffffffff;
805		break;
806		case 16: // Dragoon Might ver. JAA
807		{
808		UINT32 cur_pc;
809
810		cur_pc = space.device().safe_pc();
811
812		switch(cur_pc)
813		{
814		case 0x203534: break; //ffc0, OK
815		case 0x20358a: rv = 0; break; // != ffc0
816		case 0x2035e4: rv = 0xffffffff; break; // != 0
817		case 0x2036e4: rv = 0x0000ff00; break; // 00ff
818		case 0x203766: rv = 0x5500aa00; break; // 00ff
819		case 0x2037e8: rv = 0xaa005500; break; // 00ff
820		case 0x20386a: rv = 0xff000000; break;
821		case 0x203960: rv = 0; break;
822		case 0x2039f2: rv = 0x0100ff00; break;
823		//default:
824		//  if(cur_pc != 0x20358a && cur_pc != 0x2038aa && cur_pc != 0x2038d4)
825		//      printf("Read 68k @ %x (PC=%x)\n", reg, cur_pc);
826		}
827		}
828		break;
829		}
830
831		return(rv);
832		}
833
834		INLINE void write_snd_020(running_machine &machine, int reg, int val)
835		{
836		konamigx_state *state = machine.driver_data<konamigx_state>();
837		sndto000[reg] = val;
838
839		if (reg == 7)
840		{
841		state->m_soundcpu->set_input_line(1, HOLD_LINE);
842		}
843		}
844
845		WRITE32_MEMBER(konamigx_state::sound020_w)
846		{
847		int reg=0, val=0;
848
849		if (ACCESSING_BITS_24_31)
850		{
851		reg = offset<<1;
852		val = data>>24;
853		write_snd_020(machine(), reg, val);
854		}
855
856		if (ACCESSING_BITS_8_15)
857		{
858		reg = (offset<<1)+1;
859		val = (data>>8)&0xff;
860		write_snd_020(machine(), reg, val);
861		}
862		}
863
864
865		/**********************************************************************************/
866	707	/* input handlers */
867	708
868	709	/* National Semiconductor ADC0834 4-channel serial ADC emulation */
r26235	r26236
1151	992	AM_RANGE(0x000000, 0x01ffff) AM_ROM // BIOS ROM
1152	993	AM_RANGE(0x200000, 0x3fffff) AM_ROM // main program ROM
1153	994	AM_RANGE(0x400000, 0x7fffff) AM_ROM // data ROM
1154		AM_RANGE(0xc00000, 0xc1ffff) AM_RAM AM_SHARE("workram") // work RAM
	995	AM_RANGE(0xc00000, 0xc1ffff) AM_RAM AM_SHARE("workram")
1155	996	AM_RANGE(0xd00000, 0xd01fff) AM_DEVREAD("k056832", k056832_device, k_5bpp_rom_long_r)
1156	997	AM_RANGE(0xd20000, 0xd20fff) AM_DEVREADWRITE("k055673", k055673_device, k053247_long_r, k053247_long_w)
1157	998	AM_RANGE(0xd21000, 0xd23fff) AM_RAM
r26235	r26236
1162	1003	AM_RANGE(0xd4c000, 0xd4c01f) AM_READWRITE(ccu_r, ccu_w)
1163	1004	AM_RANGE(0xd4e000, 0xd4e01f) AM_WRITENOP
1164	1005	AM_RANGE(0xd50000, 0xd500ff) AM_DEVWRITE("k055555", k055555_device, K055555_long_w)
1165		AM_RANGE(0xd52000, 0xd5200f) AM_WRITE(sound020_w)
1166		AM_RANGE(0xd52010, 0xd5201f) AM_READ(sound020_r)
	1006	AM_RANGE(0xd52000, 0xd5201f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xff00ff00)
1167	1007	AM_RANGE(0xd56000, 0xd56003) AM_WRITE(eeprom_w)
1168	1008	AM_RANGE(0xd58000, 0xd58003) AM_WRITE(control_w)
1169	1009	AM_RANGE(0xd5a000, 0xd5a003) AM_READ_PORT("SYSTEM_DSW")
r26235	r26236
1237	1077	/**********************************************************************************/
1238	1078	/* Sound handling */
1239	1079
1240		READ16_MEMBER(konamigx_state::sndcomm68k_r)
1241		{
1242		return sndto000[offset];
1243		}
1244
1245		WRITE16_MEMBER(konamigx_state::sndcomm68k_w)
1246		{
1247		//  logerror("68K: write %x to %x\n", data, offset);
1248		sndto020[offset] = data;
1249		}
1250
1251	1080	INTERRUPT_GEN_MEMBER(konamigx_state::tms_sync)
1252	1081	{
1253		m_dasp->sync_w(1);
	1082	// DASP is synced to the LRCLK of one of the K054539s
	1083	if (m_sound_ctrl & 0x20)
	1084	m_dasp->sync_w(1);
1254	1085	}
1255	1086
1256	1087	READ16_MEMBER(konamigx_state::tms57002_data_word_r)
r26235	r26236
1275	1106	{
1276	1107	if (ACCESSING_BITS_0_7)
1277	1108	{
	1109	if (!(data & 1))
	1110	m_soundcpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
	1111
1278	1112	m_dasp->pload_w(data & 4);
1279	1113	m_dasp->cload_w(data & 8);
1280		m_dasp->set_input_line(INPUT_LINE_RESET, !(data & 16) ? ASSERT_LINE : CLEAR_LINE);
	1114	m_dasp->set_input_line(INPUT_LINE_RESET, data & 0x10 ? CLEAR_LINE : ASSERT_LINE);
	1115
	1116	m_sound_ctrl = data;
1281	1117	}
1282	1118	}
1283	1119
r26235	r26236
1288	1124	AM_RANGE(0x200000, 0x2004ff) AM_DEVREADWRITE8("k054539_1", k054539_device, read, write, 0xff00)
1289	1125	AM_RANGE(0x200000, 0x2004ff) AM_DEVREADWRITE8("k054539_2", k054539_device, read, write, 0x00ff)
1290	1126	AM_RANGE(0x300000, 0x300001) AM_READWRITE(tms57002_data_word_r, tms57002_data_word_w)
1291		AM_RANGE(0x400000, 0x40000f) AM_WRITE(sndcomm68k_w)
1292		AM_RANGE(0x400010, 0x40001f) AM_READ(sndcomm68k_r)
	1127	AM_RANGE(0x400000, 0x40001f) AM_DEVREADWRITE8("k056800", k056800_device, sound_r, sound_w, 0x00ff)
1293	1128	AM_RANGE(0x500000, 0x500001) AM_READWRITE(tms57002_status_word_r, tms57002_control_word_w)
1294		AM_RANGE(0x580000, 0x580001) AM_WRITENOP
	1129	AM_RANGE(0x580000, 0x580001) AM_WRITENOP // 'NRES' - D2: K056602 /RESET
1295	1130	ADDRESS_MAP_END
1296	1131
1297	1132	static ADDRESS_MAP_START( gxtmsmap, AS_DATA, 8, konamigx_state )
1298		AM_RANGE(0x000000, 0x03ffff) AM_RAM
	1133	AM_RANGE(0x00000, 0x3ffff) AM_RAM
1299	1134	ADDRESS_MAP_END
1300	1135
1301	1136	static const k054539_interface k054539_config =
r26235	r26236
1304	1139	};
1305	1140
1306	1141
	1142	WRITE_LINE_MEMBER(konamigx_state::k054539_irq_gen)
	1143	{
	1144	if (m_sound_ctrl & 1)
	1145	{
	1146	// Trigger an interrupt on the rising edge
	1147	if (!m_sound_intck && state)
	1148	m_soundcpu->set_input_line(M68K_IRQ_2, ASSERT_LINE);
	1149	}
	1150
	1151	m_sound_intck = state;
	1152	}
	1153
1307	1154	/**********************************************************************************/
1308	1155	/* port maps */
1309	1156
r26235	r26236
1763	1610	/* basic machine hardware */
1764	1611	MCFG_CPU_ADD("maincpu", M68EC020, 24000000)
1765	1612	MCFG_CPU_PROGRAM_MAP(gx_type2_map)
1766		MCFG_CPU_VBLANK_INT_DRIVER("screen", konamigx_state, konamigx_vbinterrupt)
	1613	MCFG_CPU_VBLANK_INT_DRIVER("screen", konamigx_state, konamigx_vbinterrupt)
1767	1614
1768	1615	MCFG_CPU_ADD("soundcpu", M68000, 8000000)
1769	1616	MCFG_CPU_PROGRAM_MAP(gxsndmap)
1770		MCFG_CPU_PERIODIC_INT_DRIVER(konamigx_state, irq2_line_hold,  480)
1771	1617
1772		MCFG_CPU_ADD("dasp", TMS57002, 12500000)
	1618	MCFG_CPU_ADD("dasp", TMS57002, 24000000/2)
1773	1619	MCFG_CPU_DATA_MAP(gxtmsmap)
1774		MCFG_CPU_PERIODIC_INT_DRIVER(konamigx_state, tms_sync, 48000)
	1620	MCFG_CPU_PERIODIC_INT_DRIVER(konamigx_state, tms_sync, 48000)
1775	1621
1776		MCFG_QUANTUM_TIME(attotime::from_hz(1920))
	1622	MCFG_QUANTUM_TIME(attotime::from_hz(6000))
1777	1623
1778	1624	MCFG_MACHINE_START_OVERRIDE(konamigx_state,konamigx)
1779	1625	MCFG_MACHINE_RESET_OVERRIDE(konamigx_state,konamigx)
r26235	r26236
1806	1652	/* sound hardware */
1807	1653	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1808	1654
1809		MCFG_K054539_ADD("k054539_1", 48000, k054539_config)
	1655	MCFG_K056800_ADD("k056800", XTAL_18_432MHz)
	1656	MCFG_K056800_INT_HANDLER(INPUTLINE("soundcpu", M68K_IRQ_1))
	1657
	1658	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
	1659	MCFG_K054539_TIMER_HANDLER(WRITELINE(konamigx_state, k054539_irq_gen))
	1660
1810	1661	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
1811	1662	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
1812	1663
1813		MCFG_K054539_ADD("k054539_2", 48000, k054539_config)
	1664	MCFG_K054539_ADD("k054539_2", XTAL_18_432MHz, k054539_config)
1814	1665	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
1815	1666	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
1816	1667	MACHINE_CONFIG_END
1817	1668
1818	1669	static MACHINE_CONFIG_DERIVED( dragoonj, konamigx )
1819		MCFG_CPU_MODIFY("maincpu")
1820		MCFG_CPU_CLOCK(26400000) // needs higher clock to stop sprite flickerings
1821	1670	MCFG_SCREEN_MODIFY("screen")
1822	1671	MCFG_SCREEN_VISIBLE_AREA(40, 40+384-1, 16, 16+224-1)
1823	1672	MCFG_VIDEO_START_OVERRIDE(konamigx_state,dragoonj)
r26235	r26236
1865	1714
1866	1715	static MACHINE_CONFIG_DERIVED( gxtype3, konamigx )
1867	1716
1868		MCFG_DEVICE_REMOVE("maincpu")
1869
1870		MCFG_CPU_ADD("maincpu", M68EC020, 24000000)
	1717	MCFG_DEVICE_MODIFY("maincpu")
1871	1718	MCFG_CPU_PROGRAM_MAP(gx_type3_map)
1872	1719	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", konamigx_state, konamigx_hbinterrupt, "screen", 0, 1)
1873	1720
r26235	r26236
1892	1739
1893	1740	static MACHINE_CONFIG_DERIVED( gxtype4, konamigx )
1894	1741
1895		MCFG_DEVICE_REMOVE("maincpu")
1896
1897		MCFG_CPU_ADD("maincpu", M68EC020, 24000000)
	1742	MCFG_DEVICE_MODIFY("maincpu")
1898	1743	MCFG_CPU_PROGRAM_MAP(gx_type4_map)
1899	1744	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", konamigx_state, konamigx_hbinterrupt, "screen", 0, 1)
1900	1745
r26235	r26236
2178	2023	ROM_LOAD( "424a17.9g", 0x000000, 2*1024*1024, CRC(e9dd9692) SHA1(c289019c8d1dd71b3cec26479c39b649de804707) )
2179	2024	ROM_LOAD( "424a18.7g", 0x200000, 2*1024*1024, CRC(0f0d9f3a) SHA1(57f6b113b80f06964b7e672ad517c1654c5569c5) )
2180	2025
2181		// reports RAMs as bad on first boot due to TMS emulation problems, but automatically resets
2182	2026	ROM_REGION( 0x80, "eeprom", 0 ) // default eeprom to prevent game booting with error
2183	2027	ROM_LOAD( "tbyahhoo.nv", 0x0000, 0x080, CRC(1e6fa2f8) SHA1(fceb6617a4e02babfc1678bae9f6a131c1d759f5) )
2184	2028	ROM_END
r26235	r26236
2602	2446	ROM_LOAD( "315a17.9g", 0x000000, 2*1024*1024, CRC(ea763d61) SHA1(2a7dcb2a2a23c9fea62fb82ffc18949bf15b9f6f) )
2603	2447	ROM_LOAD( "315a18.7g", 0x200000, 2*1024*1024, CRC(6e416cee) SHA1(145a766ad2fa2b692692053dd36e0caf51d67a56) )
2604	2448
2605		// the TMS emulation is causing problems which means you have to reset this one anyway
2606	2449	ROM_REGION( 0x80, "eeprom", 0 ) // default eeprom to prevent game booting upside down with error
2607	2450	ROM_LOAD( "puzldama.nv", 0x0000, 0x080, CRC(bda98b84) SHA1(f4b03130bdc2a5bc6f0fc9ca21603109d82703b4) )
2608	2451	ROM_END
r26235	r26236
2643	2486	ROM_REGION( 0x200000, "shared", 0 )
2644	2487	ROM_LOAD( "417a17.9g", 0x000000, 2*1024*1024, CRC(88d47dfd) SHA1(b5d6dd7ee9ac0c427dc3e714a97945c954260913) )
2645	2488
2646		// game is currently broken due to TMS emulation anyway..
2647	2489	ROM_REGION( 0x80, "eeprom", 0 ) // default eeprom to prevent game booting with error
2648	2490	ROM_LOAD( "dragoonj.nv", 0x0000, 0x080, CRC(cbe16082) SHA1(da48893f3584ae2e034c73d4338b220107a884da) )
2649	2491	ROM_END
r26235	r26236
2684	2526	ROM_REGION( 0x200000, "shared", 0 )
2685	2527	ROM_LOAD( "417a17.9g", 0x000000, 2*1024*1024, CRC(88d47dfd) SHA1(b5d6dd7ee9ac0c427dc3e714a97945c954260913) )
2686	2528
2687		// game is currently broken due to TMS emulation anyway..
2688	2529	ROM_REGION( 0x80, "eeprom", 0 ) // default eeprom to prevent game booting with error
2689	2530	ROM_LOAD( "dragoona.nv", 0x0000, 0x080, CRC(7980ad2b) SHA1(dccaab02d23edbd81ae13441fbac0dbd7112c258) )
2690	2531	ROM_END
r26235	r26236
3626	3467	MACHINE_START_MEMBER(konamigx_state,konamigx)
3627	3468	{
3628	3469	save_item(NAME(konamigx_wrport1_1));
3629		save_item(NAME(sndto020));
3630		save_item(NAME(sndto000));
3631	3470	}
3632	3471
3633	3472	MACHINE_RESET_MEMBER(konamigx_state,konamigx)
3634	3473	{
3635		int i;
3636
3637	3474	konamigx_wrport1_0 = konamigx_wrport1_1 = 0;
3638	3475	konamigx_wrport2 = 0;
3639	3476
r26235	r26236
3646	3483	gx_syncen    = 0;
3647	3484	suspension_active = 0;
3648	3485
3649		memset(sndto000, 0, 16);
3650		memset(sndto020, 0, 16);
3651
3652		// sound CPU initially disabled?
	3486	// Hold sound CPUs in reset
3653	3487	m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
	3488	m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
3654	3489	m_dasp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
3655	3490
	3491
	3492	// [HACK] This shouldn't be necessary
3656	3493	if (!strcmp(machine().system().name, "tkmmpzdm"))
3657	3494	{
3658	3495	// boost voice(chip 1 channel 3-7)
3659		for (i=3; i<=7; i++) m_k054539_2->set_gain(i, 2.0);
	3496	for (int i=3; i<=7; i++) m_k054539_2->set_gain(i, 2.0);
3660	3497	}
3661	3498	else if ((!strcmp(machine().system().name, "dragoonj")) || (!strcmp(machine().system().name, "dragoona")))
3662	3499	{
3663	3500	// soften percussions(chip 1 channel 0-3), boost voice(chip 1 channel 4-7)
3664		for (i=0; i<=3; i++)
	3501	for (int i=0; i<=3; i++)
3665	3502	{
3666	3503	m_k054539_2->set_gain(i, 0.8);
3667	3504	m_k054539_2->set_gain(i+4, 2.0);
3668	3505	}
3669	3506	}
	3507
	3508	const char *setname = machine().system().name;
	3509
	3510	if (!strcmp(setname, "opengolf") ||
	3511	!strcmp(setname, "opengolf2")||
	3512	!strcmp(setname, "ggreats2") ||
	3513	!strcmp(setname, "tbyahhoo") ||
	3514	!strcmp(setname, "dragoona") ||
	3515	!strcmp(setname, "dragoonj"))
	3516	{
	3517	// [HACK] The 68020 instruction cache is disabled during POST.
	3518	// We don't emulate this nor the slow program ROM access times (120ns)
	3519	// so some games that rely on wait loops timeout far too quickly
	3520	// waiting for the sound system tests to complete.
	3521
	3522	// To hack around this, we underclock the 68020 for 10 seconds during POST
	3523	m_maincpu->set_clock_scale(0.66f);
	3524	boothack_timer->adjust(attotime::from_seconds(10));
	3525	}
3670	3526	}
3671	3527
3672	3528	struct GXGameInfoT
3673	3529	{
3674	3530	const char *romname;
3675	3531	UINT32 cfgport;
3676		UINT32 sndhack;
3677	3532	UINT32 special;
3678	3533	UINT32 readback;
3679	3534	};
r26235	r26236
3685	3540
3686	3541	static const GXGameInfoT gameDefs[] =
3687	3542	{
3688		{ "racinfrc", 11, 11, 0, BPP4 },
3689		{ "racinfrcu",11, 11, 0, BPP4 },
3690		{ "opengolf", 11, 12, 0, BPP4 },
3691		{ "opengolf2",11, 12, 0, BPP4 },
3692		{ "ggreats2", 11, 12, 0, BPP4 },
3693		{ "le2",      13, 1, 1, BPP4 },
3694		{ "le2u",     13, 1, 1, BPP4 },
3695		{ "le2j",     13, 1, 1, BPP4 },
3696		{ "gokuparo",  7, 0, 0, BPP5 },
3697		{ "fantjour",  7, 0, 9, BPP5 },
3698		{ "fantjoura", 7, 0, 9, BPP5 },
3699		{ "puzldama",  7, 0, 0, BPP5 },
3700		{ "tbyahhoo",  7, 0, 8, BPP5 },
3701		{ "tkmmpzdm",  7, 0, 2, BPP6 },
3702		{ "dragoonj",  7, 16, 3, BPP4 },
3703		{ "dragoona",  7, 16, 3, BPP4 },
3704		{ "sexyparo",  7, 0, 4, BPP5 },
3705		{ "sexyparoa", 7, 0, 4, BPP5 },
3706		{ "daiskiss",  7, 0, 5, BPP5 },
3707		{ "tokkae",    7, 0, 0, BPP5 },
3708		{ "salmndr2",  7, 0, 6, BPP66 },
3709		{ "salmndr2a", 7, 0, 6, BPP66 },
3710		{ "winspike",  8, 2, 7, BPP4 },
3711		{ "winspikej", 8, 2, 7, BPP4 },
3712		{ "soccerss",  7, 13, 0, BPP4 },
3713		{ "soccerssa", 7, 13, 0, BPP4 },
3714		{ "soccerssj", 7, 14, 0, BPP4 },
3715		{ "soccerssja",7, 15, 0, BPP4 },
3716		{ "vsnetscr",  7, 8, 0, BPP4 },
3717		{ "vsnetscru", 7, 5, 0, BPP4 },
3718		{ "vsnetscrj", 7, 10, 0, BPP4 },
3719		{ "vsnetscra", 7, 7, 0, BPP4 },
3720		{ "vsnetscreb",7, 9, 0, BPP4 },
3721		{ "rungun2",   7, 3, 0, BPP4 },
3722		{ "slamdnk2",  7, 6, 0, BPP4 },
3723		{ "rushhero",  7, 4, 0, BPP4 },
3724		{ "",         -1, -1, -1, -1 },
	3543	{ "racinfrc", 11, 0, BPP4 },
	3544	{ "racinfrcu",11, 0, BPP4 },
	3545	{ "opengolf", 11, 0, BPP4 },
	3546	{ "opengolf2",11, 0, BPP4 },
	3547	{ "ggreats2", 11, 0, BPP4 },
	3548	{ "le2",      13, 1, BPP4 },
	3549	{ "le2u",     13, 1, BPP4 },
	3550	{ "le2j",     13, 1, BPP4 },
	3551	{ "gokuparo",  7, 0, BPP5 },
	3552	{ "fantjour",  7, 9, BPP5 },
	3553	{ "fantjoura", 7, 9, BPP5 },
	3554	{ "puzldama",  7, 0, BPP5 },
	3555	{ "tbyahhoo",  7, 8, BPP5 },
	3556	{ "tkmmpzdm",  7, 2, BPP6 },
	3557	{ "dragoonj",  7, 3, BPP4 },
	3558	{ "dragoona",  7, 3, BPP4 },
	3559	{ "sexyparo",  7, 4, BPP5 },
	3560	{ "sexyparoa", 7, 4, BPP5 },
	3561	{ "daiskiss",  7, 5, BPP5 },
	3562	{ "tokkae",    7, 0, BPP5 },
	3563	{ "salmndr2",  7, 6, BPP66 },
	3564	{ "salmndr2a", 7, 6, BPP66 },
	3565	{ "winspike",  8, 7, BPP4 },
	3566	{ "winspikej", 8, 7, BPP4 },
	3567	{ "soccerss",  7, 0, BPP4 },
	3568	{ "soccerssa", 7, 0, BPP4 },
	3569	{ "soccerssj", 7, 0, BPP4 },
	3570	{ "soccerssja",7, 0, BPP4 },
	3571	{ "vsnetscr",  7, 0, BPP4 },
	3572	{ "vsnetscru", 7, 0, BPP4 },
	3573	{ "vsnetscrj", 7, 0, BPP4 },
	3574	{ "vsnetscra", 7, 0, BPP4 },
	3575	{ "vsnetscreb",7, 0, BPP4 },
	3576	{ "rungun2",   7, 0, BPP4 },
	3577	{ "slamdnk2",  7, 0, BPP4 },
	3578	{ "rushhero",  7, 0, BPP4 },
	3579	{ "",         -1, -1, -1 },
3725	3580	};
3726	3581
3727	3582	READ32_MEMBER( konamigx_state::k_6bpp_rom_long_r )
r26235	r26236
3739	3594	last_prot_clk = 0;
3740	3595
3741	3596	esc_cb = 0;
3742		snd020_hack = 0;
3743	3597	resume_trigger = 0;
3744	3598
3745	3599	dmadelay_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(konamigx_state::dmaend_callback),this));
	3600	boothack_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(konamigx_state::boothack_callback),this));
	3601
3746	3602	i = match = 0;
3747	3603	while ((gameDefs[i].cfgport != -1) && (!match))
3748	3604	{
3749	3605	if (!strcmp(machine().system().name, gameDefs[i].romname))
3750		{
	3606	{
3751	3607	match = 1;
3752	3608	konamigx_cfgport = gameDefs[i].cfgport;
3753		snd020_hack = gameDefs[i].sndhack;
3754	3609	readback = gameDefs[i].readback;
3755	3610
3756	3611	switch (gameDefs[i].special)
3757		{
	3612	{
3758	3613	case 1: // LE2 guns
3759	3614	m_maincpu->space(AS_PROGRAM).install_read_handler(0xd44000, 0xd44003, read32_delegate(FUNC(konamigx_state::le2_gun_H_r),this));
3760	3615	m_maincpu->space(AS_PROGRAM).install_read_handler(0xd44004, 0xd44007, read32_delegate(FUNC(konamigx_state::le2_gun_V_r),this));
3761	3616	break;
3762
3763	3617	case 2: // tkmmpzdm hack
3764		{
3765		UINT32 *rom = (UINT32*)memregion("maincpu")->base();
	3618	{
	3619	UINT32 *rom = (UINT32*)memregion("maincpu")->base();
3766	3620
3767		// The display is initialized after POST but the copyright screen disabled
3768		// planes B,C,D and didn't bother restoring them. I've spent a good
3769		// amount of time chasing this bug but the cause remains inconclusive.
3770		// My guess is the CCU somehow masked or delayed vblank interrupts
3771		// during the copyright message.
3772		rom[0x810f1] &= ~1;      // fix checksum
3773		rom[0x872ea] |= 0xe0000; // enable plane B,C,D
	3621	// The display is initialized after POST but the copyright screen disabled
	3622	// planes B,C,D and didn't bother restoring them. I've spent a good
	3623	// amount of time chasing this bug but the cause remains inconclusive.
	3624	// My guess is the CCU somehow masked or delayed vblank interrupts
	3625	// during the copyright message.
	3626	rom[0x810f1] &= ~1;      // fix checksum
	3627	rom[0x872ea] |= 0xe0000; // enable plane B,C,D
3774	3628
3775		esc_cb = tkmmpzdm_esc;
3776		}
	3629	esc_cb = tkmmpzdm_esc;
3777	3630	break;
	3631	}
3778	3632
3779	3633	case 3: // dragoon might
3780		esc_cb = dragoonj_esc;
	3634	esc_cb = dragoonj_esc;
3781	3635	break;
3782	3636
3783	3637	case 4: // sexyparo
3784		esc_cb = sexyparo_esc;
	3638	esc_cb = sexyparo_esc;
3785	3639	break;
3786	3640
3787	3641	case 5: // daiskiss
3788		esc_cb = daiskiss_esc;
	3642	esc_cb = daiskiss_esc;
3789	3643	break;
3790	3644
3791	3645	case 6: // salamander 2
3792		esc_cb = sal2_esc;
	3646	esc_cb = sal2_esc;
3793	3647	break;
3794	3648
3795	3649	case 7: // install type 4 Xilinx protection for non-type 3/4 games
3796		m_maincpu->space(AS_PROGRAM).install_write_handler(0xcc0000, 0xcc0007, write32_delegate(FUNC(konamigx_state::type4_prot_w),this));
	3650	m_maincpu->space(AS_PROGRAM).install_write_handler(0xcc0000, 0xcc0007, write32_delegate(FUNC(konamigx_state::type4_prot_w),this));
3797	3651	break;
3798	3652
3799	3653	case 8: // tbyahhoo
r26235	r26236
3801	3655	break;
3802	3656
3803	3657	case 9: // fantjour
3804		fantjour_dma_install(machine());
	3658	fantjour_dma_install(machine());
3805	3659	break;
	3660	}
	3661	}
3806	3662
3807		}
3808		}
3809
3810	3663	i++;
3811	3664	}
3812	3665

trunk/src/mame/drivers/moo.c

r26235	r26236
527	527	MCFG_SOUND_ROUTE(0, "lspeaker", 0.50)
528	528	MCFG_SOUND_ROUTE(1, "rspeaker", 0.50)
529	529
530		MCFG_K054539_ADD("k054539", 48000, k054539_config)
	530	MCFG_K054539_ADD("k054539", XTAL_18_432MHz, k054539_config)
531	531	MCFG_SOUND_ROUTE(0, "lspeaker", 0.75)
532	532	MCFG_SOUND_ROUTE(1, "rspeaker", 0.75)
533	533	MACHINE_CONFIG_END

trunk/src/mame/drivers/tmnt.c

r26235	r26236
2500	2500	MACHINE_CONFIG_END
2501	2501
2502	2502
2503		static void sound_nmi( device_t *device )
2504		{
2505		tmnt_state *state = device->machine().driver_data<tmnt_state>();
2506		state->m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
2507		}
2508
2509	2503	static const k054539_interface k054539_config =
2510	2504	{
2511	2505	NULL,
2512	2506	NULL,
2513		sound_nmi
2514	2507	};
2515	2508
2516	2509	MACHINE_START_MEMBER(tmnt_state,prmrsocr)
r26235	r26236
2559	2552	/* sound hardware */
2560	2553	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2561	2554
2562		MCFG_K054539_ADD("k054539", 48000, k054539_config)
	2555	MCFG_K054539_ADD("k054539", XTAL_18_432MHz, k054539_config)
	2556	MCFG_K054539_TIMER_HANDLER(INPUTLINE("audiocpu", INPUT_LINE_NMI))
2563	2557	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
2564	2558	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
2565	2559	MACHINE_CONFIG_END
r26235	r26236
2623	2617	MCFG_CPU_PROGRAM_MAP(ssriders_main_map)
2624	2618	MCFG_CPU_VBLANK_INT_DRIVER("screen", tmnt_state,  punkshot_interrupt)
2625	2619
2626		MCFG_CPU_ADD("audiocpu", Z80, 4000000)  /* ????? makes the ROM test sync */
	2620	MCFG_CPU_ADD("audiocpu", Z80, 8000000)
2627	2621	MCFG_CPU_PROGRAM_MAP(ssriders_audio_map)
2628	2622	/* NMIs are generated by the 053260 */
2629	2623

trunk/src/mame/drivers/konamigq.c

r26235	r26236
48	48	#include "emu.h"
49	49	#include "cpu/m68000/m68000.h"
50	50	#include "cpu/psx/psx.h"
	51	#include "cpu/tms57002/tms57002.h"
51	52	#include "video/psx.h"
52	53	#include "machine/am53cf96.h"
53	54	#include "machine/eepromser.h"
54	55	#include "machine/mb89371.h"
55	56	#include "machine/scsibus.h"
56	57	#include "machine/scsihd.h"
	58	#include "sound/k056800.h"
57	59	#include "sound/k054539.h"
58	60
59	61	class konamigq_state : public driver_device
r26235	r26236
61	63	public:
62	64	konamigq_state(const machine_config &mconfig, device_type type, const char *tag)
63	65	: driver_device(mconfig, type, tag),
	66	m_maincpu(*this, "maincpu"),
	67	m_soundcpu(*this, "soundcpu"),
	68	m_dasp(*this, "dasp"),
64	69	m_am53cf96(*this, "scsi:am53cf96"),
65		m_maincpu(*this, "maincpu"),
66		m_soundcpu(*this, "soundcpu")
	70	m_k056800(*this, "k056800")
67	71	{
68	72	}
69	73
	74	required_device<cpu_device> m_maincpu;
	75	required_device<cpu_device> m_soundcpu;
	76	required_device<tms57002_device> m_dasp;
70	77	required_device<am53cf96_device> m_am53cf96;
	78	required_device<k056800_device> m_k056800;
71	79
72		UINT8 m_sndto000[ 16 ];
73		UINT8 m_sndtor3k[ 16 ];
74	80	UINT8 *m_p_n_pcmram;
75	81	UINT8 m_sector_buffer[ 512 ];
76		DECLARE_WRITE16_MEMBER(soundr3k_w);
77		DECLARE_READ16_MEMBER(soundr3k_r);
	82	UINT8 m_sound_ctrl;
	83	UINT8 m_sound_intck;
	84
78	85	DECLARE_WRITE16_MEMBER(eeprom_w);
79	86	DECLARE_WRITE8_MEMBER(pcmram_w);
80	87	DECLARE_READ8_MEMBER(pcmram_r);
81		DECLARE_READ16_MEMBER(sndcomm68k_r);
82		DECLARE_WRITE16_MEMBER(sndcomm68k_w);
83	88	DECLARE_READ16_MEMBER(tms57002_data_word_r);
84	89	DECLARE_WRITE16_MEMBER(tms57002_data_word_w);
85	90	DECLARE_READ16_MEMBER(tms57002_status_word_r);
r26235	r26236
87	92	DECLARE_DRIVER_INIT(konamigq);
88	93	DECLARE_MACHINE_START(konamigq);
89	94	DECLARE_MACHINE_RESET(konamigq);
	95	INTERRUPT_GEN_MEMBER(tms_sync);
	96	DECLARE_WRITE_LINE_MEMBER(k054539_irq_gen);
	97
90	98	void scsi_dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
91	99	void scsi_dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
92		required_device<cpu_device> m_maincpu;
93		required_device<cpu_device> m_soundcpu;
94	100	};
95	101
96		/* Sound */
97
98		WRITE16_MEMBER(konamigq_state::soundr3k_w)
99		{
100		m_sndto000[ offset ] = data;
101		if( offset == 7 )
102		{
103		m_soundcpu->set_input_line(1, HOLD_LINE );
104		}
105		}
106
107		READ16_MEMBER(konamigq_state::soundr3k_r)
108		{
109		/* hack to help the main program start up */
110		if( offset == 2 || offset == 3 )
111		{
112		return 0;
113		}
114
115		return m_sndtor3k[ offset ];
116		}
117
118	102	/* EEPROM */
119	103
120	104	static const UINT16 konamigq_def_eeprom[64] =
r26235	r26236
152	136
153	137	static ADDRESS_MAP_START( konamigq_map, AS_PROGRAM, 32, konamigq_state )
154	138	AM_RANGE(0x1f000000, 0x1f00001f) AM_DEVREADWRITE8("scsi:am53cf96", am53cf96_device, read, write, 0x00ff00ff)
155		AM_RANGE(0x1f100000, 0x1f10000f) AM_WRITE16(soundr3k_w, 0xffffffff)
156		AM_RANGE(0x1f100010, 0x1f10001f) AM_READ16(soundr3k_r, 0xffffffff)
	139	AM_RANGE(0x1f100000, 0x1f10001f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0x00ff00ff)
157	140	AM_RANGE(0x1f180000, 0x1f180003) AM_WRITE16(eeprom_w, 0x0000ffff)
158	141	AM_RANGE(0x1f198000, 0x1f198003) AM_WRITENOP            /* cabinet lamps? */
159	142	AM_RANGE(0x1f1a0000, 0x1f1a0003) AM_WRITENOP            /* indicates gun trigger */
r26235	r26236
173	156
174	157	/* SOUND CPU */
175	158
176		READ16_MEMBER(konamigq_state::sndcomm68k_r)
	159	INTERRUPT_GEN_MEMBER(konamigq_state::tms_sync)
177	160	{
178		return m_sndto000[ offset ];
	161	// DASP is synced to the LRCLK of the 058141
	162	if (m_sound_ctrl & 0x20)
	163	m_dasp->sync_w(1);
179	164	}
180	165
181		WRITE16_MEMBER(konamigq_state::sndcomm68k_w)
182		{
183		m_sndtor3k[ offset ] = data;
184		}
185
186	166	READ16_MEMBER(konamigq_state::tms57002_data_word_r)
187	167	{
188		return 0;
	168	return m_dasp->data_r(space, 0);
189	169	}
190	170
191	171	WRITE16_MEMBER(konamigq_state::tms57002_data_word_w)
192	172	{
	173	if (ACCESSING_BITS_0_7)
	174	m_dasp->data_w(space, 0, data);
193	175	}
194	176
195	177	READ16_MEMBER(konamigq_state::tms57002_status_word_r)
196	178	{
197		return 0;
	179	return (m_dasp->dready_r() ? 4 : 0) |
	180	(m_dasp->pc0_r() ? 2 : 0) |
	181	(m_dasp->empty_r() ? 1 : 0);
198	182	}
199	183
200	184	WRITE16_MEMBER(konamigq_state::tms57002_control_word_w)
201	185	{
	186	if (ACCESSING_BITS_0_7)
	187	{
	188	if (!(data & 1))
	189	m_soundcpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
	190
	191	m_dasp->pload_w(data & 4);
	192	m_dasp->cload_w(data & 8);
	193	m_dasp->set_input_line(INPUT_LINE_RESET, data & 0x10 ? CLEAR_LINE : ASSERT_LINE);
	194
	195	m_sound_ctrl = data;
	196	}
202	197	}
203	198
204		/* 68000 memory handling */
	199	/* 68000 memory handling - near identical to Konami GX */
205	200	static ADDRESS_MAP_START( konamigq_sound_map, AS_PROGRAM, 16, konamigq_state )
206	201	AM_RANGE(0x000000, 0x07ffff) AM_ROM
207	202	AM_RANGE(0x100000, 0x10ffff) AM_RAM
208	203	AM_RANGE(0x200000, 0x2004ff) AM_DEVREADWRITE8("k054539_1", k054539_device, read, write, 0xff00)
209	204	AM_RANGE(0x200000, 0x2004ff) AM_DEVREADWRITE8("k054539_2", k054539_device, read, write, 0x00ff)
210	205	AM_RANGE(0x300000, 0x300001) AM_READWRITE(tms57002_data_word_r,tms57002_data_word_w)
211		AM_RANGE(0x400000, 0x40000f) AM_WRITE(sndcomm68k_w)
212		AM_RANGE(0x400010, 0x40001f) AM_READ(sndcomm68k_r)
	206	AM_RANGE(0x400000, 0x40001f) AM_DEVREADWRITE8("k056800", k056800_device, sound_r, sound_w, 0x00ff)
213	207	AM_RANGE(0x500000, 0x500001) AM_READWRITE(tms57002_status_word_r,tms57002_control_word_w)
214		AM_RANGE(0x580000, 0x580001) AM_WRITENOP /* ?? */
	208	AM_RANGE(0x580000, 0x580001) AM_WRITENOP // 'NRES' - D2: K056602 /RESET
215	209	ADDRESS_MAP_END
216	210
217	211
	212	/* TMS57002 memory handling */
	213	static ADDRESS_MAP_START( konamigq_dasp_map, AS_DATA, 8, konamigq_state )
	214	AM_RANGE(0x00000, 0x3ffff) AM_RAM
	215	ADDRESS_MAP_END
	216
	217
	218	/* 058141 */
	219	WRITE_LINE_MEMBER(konamigq_state::k054539_irq_gen)
	220	{
	221	if (m_sound_ctrl & 1)
	222	{
	223	// Trigger an interrupt on the rising edge
	224	if (!m_sound_intck && state)
	225	m_soundcpu->set_input_line(M68K_IRQ_2, ASSERT_LINE);
	226	}
	227
	228	m_sound_intck = state;
	229	}
	230
218	231	static const k054539_interface k054539_config =
219	232	{
220	233	"shared"
r26235	r26236
268	281	MACHINE_START_MEMBER(konamigq_state,konamigq)
269	282	{
270	283	save_pointer(NAME(m_p_n_pcmram), 0x380000);
271		save_item(NAME(m_sndto000));
272		save_item(NAME(m_sndtor3k));
273	284	save_item(NAME(m_sector_buffer));
	285	save_item(NAME(m_sound_ctrl));
	286	save_item(NAME(m_sound_intck));
274	287	}
275	288
276	289	MACHINE_RESET_MEMBER(konamigq_state,konamigq)
r26235	r26236
279	292
280	293	static MACHINE_CONFIG_START( konamigq, konamigq_state )
281	294	/* basic machine hardware */
282		MCFG_CPU_ADD( "maincpu", CXD8530BQ, XTAL_67_7376MHz )
283		MCFG_CPU_PROGRAM_MAP( konamigq_map )
	295	MCFG_CPU_ADD("maincpu", CXD8530BQ, XTAL_67_7376MHz)
	296	MCFG_CPU_PROGRAM_MAP(konamigq_map)
284	297
285	298	MCFG_RAM_MODIFY("maincpu:ram")
286	299	MCFG_RAM_DEFAULT_SIZE("4M")
r26235	r26236
288	301	MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( konamigq_state::scsi_dma_read ), (konamigq_state *) owner ) )
289	302	MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( konamigq_state::scsi_dma_write ), (konamigq_state *) owner ) )
290	303
291		MCFG_CPU_ADD( "soundcpu", M68000, 8000000 )
292		MCFG_CPU_PROGRAM_MAP( konamigq_sound_map)
293		MCFG_CPU_PERIODIC_INT_DRIVER(konamigq_state, irq2_line_hold,  480)
	304	MCFG_CPU_ADD("soundcpu", M68000, 8000000)
	305	MCFG_CPU_PROGRAM_MAP(konamigq_sound_map)
294	306
295		MCFG_MACHINE_START_OVERRIDE(konamigq_state, konamigq )
296		MCFG_MACHINE_RESET_OVERRIDE(konamigq_state, konamigq )
	307	MCFG_CPU_ADD("dasp", TMS57002, 24000000/2)
	308	MCFG_CPU_DATA_MAP(konamigq_dasp_map)
	309	MCFG_CPU_PERIODIC_INT_DRIVER(konamigq_state, tms_sync, 48000)
297	310
	311	MCFG_MACHINE_START_OVERRIDE(konamigq_state, konamigq)
	312	MCFG_MACHINE_RESET_OVERRIDE(konamigq_state, konamigq)
	313
298	314	MCFG_DEVICE_ADD("mb89371", MB89371, 0)
299	315	MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
300	316	MCFG_EEPROM_SERIAL_DATA(konamigq_def_eeprom, 128)
r26235	r26236
305	321	MCFG_AM53CF96_IRQ_HANDLER(DEVWRITELINE("^maincpu:irq", psxirq_device, intin10))
306	322
307	323	/* video hardware */
308		MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8538Q, 0x200000, XTAL_53_693175MHz )
	324	MCFG_PSXGPU_ADD("maincpu", "gpu", CXD8538Q, 0x200000, XTAL_53_693175MHz)
309	325
310	326	/* sound hardware */
311	327	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
312	328
313		MCFG_K054539_ADD("k054539_1", 48000, k054539_config)
	329	MCFG_K056800_ADD("k056800", XTAL_18_432MHz)
	330	MCFG_K056800_INT_HANDLER(INPUTLINE("soundcpu", M68K_IRQ_1))
	331
	332	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
	333	MCFG_K054539_TIMER_HANDLER(WRITELINE(konamigq_state, k054539_irq_gen))
314	334	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
315	335	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
316	336
317		MCFG_K054539_ADD("k054539_2", 48000, k054539_config)
	337	MCFG_K054539_ADD("k054539_2", XTAL_18_432MHz, k054539_config)
318	338	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
319	339	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
320	340	MACHINE_CONFIG_END

trunk/src/mame/drivers/gijoe.c

r26235	r26236
137	137	return soundlatch2_byte_r(space, 0);
138	138	}
139	139
140		static void sound_nmi( device_t *device )
141		{
142		gijoe_state *state = device->machine().driver_data<gijoe_state>();
143		state->m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
144		}
145
146	140	static ADDRESS_MAP_START( gijoe_map, AS_PROGRAM, 16, gijoe_state )
147	141	AM_RANGE(0x000000, 0x0fffff) AM_ROM
148	142	AM_RANGE(0x100000, 0x100fff) AM_RAM AM_SHARE("spriteram")                               // Sprites
r26235	r26236
175	169	ADDRESS_MAP_END
176	170
177	171	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, gijoe_state )
178		AM_RANGE(0x0000, 0xebff) AM_ROM
179	172	AM_RANGE(0xf000, 0xf7ff) AM_RAM
180	173	AM_RANGE(0xf800, 0xfa2f) AM_DEVREADWRITE("k054539", k054539_device, read, write)
181	174	AM_RANGE(0xfc00, 0xfc00) AM_WRITE(soundlatch2_byte_w)
182	175	AM_RANGE(0xfc02, 0xfc02) AM_READ(soundlatch_byte_r)
	176	AM_RANGE(0x0000, 0xffff) AM_ROM
183	177	ADDRESS_MAP_END
184	178
185	179	static INPUT_PORTS_START( gijoe )
r26235	r26236
192	186	PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, ready_read)
193	187	PORT_SERVICE_NO_TOGGLE( 0x0800, IP_ACTIVE_LOW )
194	188
195		PORT_START( "EEPROMOUT" )
	189	PORT_START("EEPROMOUT")
196	190	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, di_write)
197	191	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, cs_write)
198	192	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, clk_write)
r26235	r26236
230	224	{
231	225	NULL,
232	226	NULL,
233		sound_nmi
234	227	};
235	228
236	229	static const k056832_interface gijoe_k056832_intf =
r26235	r26236
287	280
288	281	MCFG_PALETTE_LENGTH(2048)
289	282
290
291	283	MCFG_K056832_ADD("k056832", gijoe_k056832_intf)
292	284	MCFG_K053246_ADD("k053246", gijoe_k053247_intf)
293	285	MCFG_K053251_ADD("k053251")
r26235	r26236
295	287	/* sound hardware */
296	288	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
297	289
298		MCFG_K054539_ADD("k054539", 48000, k054539_config)
	290	MCFG_K054539_ADD("k054539", XTAL_18_432MHz, k054539_config)
	291	MCFG_K054539_TIMER_HANDLER(INPUTLINE("audiocpu", INPUT_LINE_NMI))
299	292	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
300	293	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
301	294	MACHINE_CONFIG_END

trunk/src/mame/drivers/rungun.c

r26235	r26236
198	198	m_sound_status = data;
199	199	}
200	200
201		WRITE8_MEMBER(rungun_state::z80ctrl_w)
	201	WRITE8_MEMBER(rungun_state::sound_ctrl_w)
202	202	{
203		m_z80_control = data;
	203	/*
	204	.... xxxx - Z80 ROM bank
	205	...x .... - NMI enable/acknowledge
	206	xx.. .... - BLT2/1 (?)
	207	*/
204	208
205	209	membank("bank2")->set_entry(data & 0x07);
206	210
207		if (data & 0x10)
	211	if (!(data & 0x10))
208	212	m_soundcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
	213
	214	m_sound_ctrl = data;
209	215	}
210	216
211		INTERRUPT_GEN_MEMBER(rungun_state::audio_interrupt)
	217	WRITE_LINE_MEMBER(rungun_state::k054539_nmi_gen)
212	218	{
213		if (m_z80_control & 0x80)
214		return;
	219	if (m_sound_ctrl & 0x10)
	220	{
	221	// Trigger an /NMI on the rising edge
	222	if (!m_sound_nmi_clk && state)
	223	{
	224	m_soundcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
	225	}
	226	}
215	227
216		device.execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
	228	m_sound_nmi_clk = state;
217	229	}
218	230
219	231	/* sound (this should be split into audio/xexex.c or pregx.c or so someday) */
r26235	r26236
224	236	AM_RANGE(0xc000, 0xdfff) AM_RAM
225	237	AM_RANGE(0xe000, 0xe22f) AM_DEVREADWRITE("k054539_1", k054539_device, read, write)
226	238	AM_RANGE(0xe230, 0xe3ff) AM_RAM
227		AM_RANGE(0xe400, 0xe62f) AM_DEVREADWRITE("k054539_1", k054539_device, read, write)
	239	AM_RANGE(0xe400, 0xe62f) AM_DEVREADWRITE("k054539_2", k054539_device, read, write)
228	240	AM_RANGE(0xe630, 0xe7ff) AM_RAM
229	241	AM_RANGE(0xf000, 0xf000) AM_WRITE(sound_status_w)
230	242	AM_RANGE(0xf002, 0xf002) AM_READ(soundlatch_byte_r)
231	243	AM_RANGE(0xf003, 0xf003) AM_READ(soundlatch2_byte_r)
232		AM_RANGE(0xf800, 0xf800) AM_WRITE(z80ctrl_w)
	244	AM_RANGE(0xf800, 0xf800) AM_WRITE(sound_ctrl_w)
233	245	AM_RANGE(0xfff0, 0xfff3) AM_WRITENOP
234	246	ADDRESS_MAP_END
235	247
r26235	r26236
347	359
348	360	membank("bank2")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
349	361
350		save_item(NAME(m_z80_control));
	362	save_item(NAME(m_sound_ctrl));
351	363	save_item(NAME(m_sound_status));
	364	save_item(NAME(m_sound_nmi_clk));
352	365	save_item(NAME(m_ttl_vram));
353	366	}
354	367
r26235	r26236
359	372	memset(m_sysreg, 0, 0x20);
360	373	memset(m_ttl_vram, 0, 0x1000 * sizeof(UINT16));
361	374
362		m_z80_control = 0;
	375	m_sound_ctrl = 0;
363	376	m_sound_status = 0;
364	377	}
365	378
r26235	r26236
368	381	/* basic machine hardware */
369	382	MCFG_CPU_ADD("maincpu", M68000, 16000000)
370	383	MCFG_CPU_PROGRAM_MAP(rungun_map)
371		MCFG_CPU_VBLANK_INT_DRIVER("screen", rungun_state, rng_interrupt)
	384	MCFG_CPU_VBLANK_INT_DRIVER("screen", rungun_state, rng_interrupt)
372	385
373		MCFG_CPU_ADD("soundcpu", Z80, 10000000) // 8Mhz (10Mhz is much safer in self-test due to heavy sync)
	386	MCFG_CPU_ADD("soundcpu", Z80, 8000000)
374	387	MCFG_CPU_PROGRAM_MAP(rungun_sound_map)
375		MCFG_CPU_PERIODIC_INT_DRIVER(rungun_state, audio_interrupt,  480)
376	388
377	389	MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // higher if sound stutters
378	390
r26235	r26236
392	404
393	405	MCFG_PALETTE_LENGTH(1024)
394	406
395
396	407	MCFG_K053936_ADD("k053936", rng_k053936_intf)
397	408	MCFG_K055673_ADD("k055673", rng_k055673_intf)
398	409	MCFG_K053252_ADD("k053252", 16000000/2, rng_k053252_intf)
r26235	r26236
400	411	/* sound hardware */
401	412	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
402	413
403		MCFG_K054539_ADD("k054539_1", 48000, k054539_config)
	414	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
	415	MCFG_K054539_TIMER_HANDLER(WRITELINE(rungun_state, k054539_nmi_gen))
404	416	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
405	417	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
406	418
407		MCFG_K054539_ADD("k054539_2", 48000, k054539_config)
	419	MCFG_K054539_ADD("k054539_2", XTAL_18_432MHz, k054539_config)
408	420	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
409	421	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
410	422	MACHINE_CONFIG_END

trunk/src/mame/drivers/ultrsprt.c

r26235	r26236
1		/*  Konami Ultra Sports hardware
	1	/*
	2	Konami Ultra Sports hardware
2	3
3		Driver by Ville Linde
4
5		TODO:
6		- sound cpu irqs generation is unknown and very prone to get broken (i.e. if 4G and 2G returns as bad in POST screen).
7		- sound is lagged, reason is probably the same as above.
8
	4	Driver by Ville Linde
9	5	*/
10	6
11	7	#include "emu.h"
r26235	r26236
16	12	#include "machine/konppc.h"
17	13	#include "sound/k056800.h"
18	14
19
20	15	class ultrsprt_state : public driver_device
21	16	{
22	17	public:
23	18	ultrsprt_state(const machine_config &mconfig, device_type type, const char *tag)
24	19	: driver_device(mconfig, type, tag),
25		m_vram(*this, "vram"),
26		m_workram(*this, "workram"),
27	20	m_maincpu(*this, "maincpu"),
28	21	m_audiocpu(*this, "audiocpu"),
29		m_k056800(*this, "k056800") { }
	22	m_k056800(*this, "k056800"),
	23	m_workram(*this, "workram") { }
30	24
31		required_shared_ptr<UINT32> m_vram;
	25	static const UINT32 VRAM_PAGES      = 2;
	26	static const UINT32 VRAM_PAGE_BYTES   = 512 * 1024;
	27
	28	required_device<cpu_device> m_maincpu;
	29	required_device<cpu_device> m_audiocpu;
	30	required_device<k056800_device> m_k056800;
32	31	required_shared_ptr<UINT32> m_workram;
	32
	33	DECLARE_READ32_MEMBER(vram_r);
	34	DECLARE_WRITE32_MEMBER(vram_w);
33	35	DECLARE_WRITE32_MEMBER(palette_w);
34	36	DECLARE_READ32_MEMBER(eeprom_r);
35	37	DECLARE_WRITE32_MEMBER(eeprom_w);
36	38	DECLARE_WRITE32_MEMBER(int_ack_w);
37		DECLARE_READ16_MEMBER(K056800_68k_r);
38		DECLARE_WRITE16_MEMBER(K056800_68k_w);
39		DECLARE_CUSTOM_INPUT_MEMBER(analog_ctrl_r);
40		virtual void machine_start();
	39	DECLARE_CUSTOM_INPUT_MEMBER(flip_status_r);
	40
41	41	UINT32 screen_update_ultrsprt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
42		INTERRUPT_GEN_MEMBER(ultrsprt_vblank);
43		required_device<cpu_device> m_maincpu;
44		required_device<cpu_device> m_audiocpu;
45		required_device<k056800_device> m_k056800;
46		};
47	42
	43	protected:
	44	virtual void machine_start();
	45	virtual void machine_reset();
48	46
	47	private:
	48	UINT8 *m_vram;
	49	UINT32 m_cpu_vram_page;
	50	};
49	51
50	52
	53	/*****************************************************************************/
	54
51	55	UINT32 ultrsprt_state::screen_update_ultrsprt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
52	56	{
53		int i, j;
	57	UINT8 *vram = m_vram + (m_cpu_vram_page ^ 1) * VRAM_PAGE_BYTES;
54	58
55		UINT8 *ram = reinterpret_cast<UINT8 *>(m_vram.target());
56
57		for (j=0; j < 400; j++)
	59	for (int y = cliprect.min_y; y <= cliprect.max_y; ++y)
58	60	{
59		UINT16 *dest = &bitmap.pix16(j);
60		int fb_index = j * 1024;
	61	int fb_index = y * 1024;
	62	UINT16 *dest = &bitmap.pix16(y, cliprect.min_x);
61	63
62		for (i=0; i < 512; i++)
	64	for (int x = cliprect.min_x; x <= cliprect.max_x; ++x)
63	65	{
64		UINT8 p1 = ram[BYTE4_XOR_BE(fb_index + i + 512)];
	66	UINT8 p1 = vram[BYTE4_XOR_BE(fb_index + x + 512)];
	67
65	68	if (p1 == 0)
66		dest[i] = ram[BYTE4_XOR_BE(fb_index + i)];
	69	*dest++ = vram[BYTE4_XOR_BE(fb_index + x)];
67	70	else
68		dest[i] = 0x100 + p1;
	71	*dest++ = 0x100 + p1;
69	72	}
70	73	}
71	74
72	75	return 0;
73	76	}
74	77
	78
75	79	WRITE32_MEMBER(ultrsprt_state::palette_w)
76	80	{
77	81	COMBINE_DATA(&m_generic_paletteram_32[offset]);
r26235	r26236
81	85	palette_set_color(machine(), (offset*2)+1, MAKE_RGB(pal5bit(data >> 10), pal5bit(data >>  5), pal5bit(data >>  0)));
82	86	}
83	87
	88
	89	/*****************************************************************************/
	90
	91	WRITE32_MEMBER(ultrsprt_state::int_ack_w)
	92	{
	93	m_maincpu->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
	94	}
	95
	96
84	97	READ32_MEMBER(ultrsprt_state::eeprom_r)
85	98	{
86	99	UINT32 r = 0;
r26235	r26236
94	107	WRITE32_MEMBER(ultrsprt_state::eeprom_w)
95	108	{
96	109	if (ACCESSING_BITS_24_31)
	110	{
	111	/*
	112	.... ...x - EEPROM DI
	113	.... ..x. - EEPROM CLK
	114	.... .x.. - EEPROM /CS
	115	.... x... - VRAM page (CPU access)
	116	...x .... - Coin counter
	117	..x. .... - Watchdog /Reset
	118	.x.. .... - Trackball /Reset
	119	x... .... - Sound CPU /Reset
	120	*/
97	121	ioport("EEPROMOUT")->write(data, 0xffffffff);
98		}
99	122
100		CUSTOM_INPUT_MEMBER(ultrsprt_state::analog_ctrl_r)
101		{
102		const char *tag = (const char *)param;
103		return ioport(tag)->read() & 0xfff;
104		}
	123	UINT32 vram_page = (data & 0x08000000) >> 27;
105	124
106		WRITE32_MEMBER(ultrsprt_state::int_ack_w)
107		{
108		m_maincpu->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
109		}
	125	if (vram_page != m_cpu_vram_page)
	126	{
	127	membank("vram")->set_entry(vram_page);
	128	m_cpu_vram_page = vram_page;
	129	}
110	130
111		void ultrsprt_state::machine_start()
112		{
113		/* set conservative DRC options */
114		ppcdrc_set_options(m_maincpu, PPCDRC_COMPATIBLE_OPTIONS);
115
116		/* configure fast RAM regions for DRC */
117		ppcdrc_add_fastram(m_maincpu, 0x80000000, 0x8007ffff, FALSE, m_vram);
118		ppcdrc_add_fastram(m_maincpu, 0xff000000, 0xff01ffff, FALSE, m_workram);
	131	coin_counter_w(machine(), 0, data & 0x10000000);
	132	m_audiocpu->set_input_line(INPUT_LINE_RESET, data & 0x80000000 ? CLEAR_LINE : ASSERT_LINE);
	133	}
119	134	}
120	135
	136	/*****************************************************************************/
121	137
122
123	138	static ADDRESS_MAP_START( ultrsprt_map, AS_PROGRAM, 32, ultrsprt_state )
124		AM_RANGE(0x00000000, 0x0007ffff) AM_RAM AM_SHARE("vram")
	139	AM_RANGE(0x00000000, 0x0007ffff) AM_RAMBANK("vram")
125	140	AM_RANGE(0x70000000, 0x70000003) AM_READWRITE(eeprom_r, eeprom_w)
126	141	AM_RANGE(0x70000020, 0x70000023) AM_READ_PORT("P1")
127	142	AM_RANGE(0x70000040, 0x70000043) AM_READ_PORT("P2")
128		AM_RANGE(0x70000080, 0x70000087) AM_DEVWRITE("k056800", k056800_device, host_w)
129		AM_RANGE(0x70000088, 0x7000008f) AM_DEVREAD("k056800", k056800_device, host_r)
	143	AM_RANGE(0x70000080, 0x7000008f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
	144	AM_RANGE(0x700000c0, 0x700000cf) AM_WRITENOP // Written following DMA interrupt - unused int ack?
130	145	AM_RANGE(0x700000e0, 0x700000e3) AM_WRITE(int_ack_w)
131	146	AM_RANGE(0x7f000000, 0x7f01ffff) AM_RAM AM_SHARE("workram")
132	147	AM_RANGE(0x7f700000, 0x7f703fff) AM_RAM_WRITE(palette_w) AM_SHARE("paletteram")
133		AM_RANGE(0x7f800000, 0x7f9fffff) AM_MIRROR(0x00600000) AM_ROM AM_REGION("user1", 0)
	148	AM_RANGE(0x7f800000, 0x7f9fffff) AM_MIRROR(0x00600000) AM_ROM AM_REGION("program", 0)
134	149	ADDRESS_MAP_END
135	150
136	151
137	152	/*****************************************************************************/
138	153
139
140		READ16_MEMBER(ultrsprt_state::K056800_68k_r)
141		{
142		UINT16 r = 0;
143
144		if (ACCESSING_BITS_8_15)
145		r |= m_k056800->sound_r(space, (offset*2)+0, 0xffff) << 8;
146
147		if (ACCESSING_BITS_0_7)
148		r |= m_k056800->sound_r(space, (offset*2)+1, 0xffff) << 0;
149
150		return r;
151		}
152
153		WRITE16_MEMBER(ultrsprt_state::K056800_68k_w)
154		{
155		if (ACCESSING_BITS_8_15)
156		m_k056800->sound_w(space, (offset*2)+0, (data >> 8) & 0xff, 0x00ff);
157
158		if (ACCESSING_BITS_0_7)
159		m_k056800->sound_w(space, (offset*2)+1, (data >> 0) & 0xff, 0x00ff);
160		}
161
162	154	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, ultrsprt_state )
163	155	AM_RANGE(0x00000000, 0x0001ffff) AM_ROM
164	156	AM_RANGE(0x00100000, 0x00101fff) AM_RAM
165		AM_RANGE(0x00200000, 0x00200007) AM_WRITE(K056800_68k_w)
166		AM_RANGE(0x00200008, 0x0020000f) AM_READ(K056800_68k_r)
	157	AM_RANGE(0x00200000, 0x0020000f) AM_DEVREADWRITE8("k056800", k056800_device, sound_r, sound_w, 0xffff)
167	158	AM_RANGE(0x00400000, 0x004002ff) AM_DEVREADWRITE8("k054539", k054539_device, read, write, 0xffff)
168	159	ADDRESS_MAP_END
169	160
	161
170	162	/*****************************************************************************/
171	163
172	164	static INPUT_PORTS_START( ultrsprt )
173	165	PORT_START("P1")
174		PORT_BIT( 0x00000fff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, ultrsprt_state,analog_ctrl_r, "STICKY1")
175		PORT_BIT( 0x0fff0000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, ultrsprt_state,analog_ctrl_r, "STICKX1")
	166	PORT_BIT( 0x00000fff, 0x000, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(70) PORT_KEYDELTA(80) PORT_PLAYER(1)
	167	PORT_BIT( 0x0fff0000, 0x000, IPT_TRACKBALL_X ) PORT_SENSITIVITY(70) PORT_KEYDELTA(80) PORT_REVERSE PORT_PLAYER(1)
176	168	PORT_BIT( 0x40000000, IP_ACTIVE_HIGH, IPT_COIN1 )
177	169	PORT_BIT( 0x20000000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
178	170	PORT_BIT( 0x10000000, IP_ACTIVE_HIGH, IPT_START1 )
179	171
180	172	PORT_START("P2")
181		PORT_BIT( 0x00000fff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, ultrsprt_state,analog_ctrl_r, "STICKY2")
182		PORT_BIT( 0x0fff0000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, ultrsprt_state,analog_ctrl_r, "STICKX2")
	173	PORT_BIT( 0x00000fff, 0x000, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(70) PORT_KEYDELTA(80) PORT_PLAYER(2)
	174	PORT_BIT( 0x0fff0000, 0x000, IPT_TRACKBALL_X ) PORT_SENSITIVITY(70) PORT_KEYDELTA(80) PORT_REVERSE PORT_PLAYER(2)
183	175	PORT_BIT( 0x40000000, IP_ACTIVE_HIGH, IPT_SERVICE1 )
184	176	PORT_BIT( 0x20000000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
185	177	PORT_BIT( 0x10000000, IP_ACTIVE_HIGH, IPT_START2 )
186	178
187	179	PORT_START("SERVICE")
	180	PORT_BIT( 0x01000000, IP_ACTIVE_HIGH, IPT_UNUSED )
188	181	PORT_BIT( 0x02000000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, do_read)
	182	PORT_BIT( 0x04000000, IP_ACTIVE_HIGH, IPT_SPECIAL ) // VRAM page flip status?
189	183	PORT_SERVICE_NO_TOGGLE( 0x08000000, IP_ACTIVE_LOW )
190	184
191		PORT_START( "EEPROMOUT" )
	185	PORT_START("EEPROMOUT")
192	186	PORT_BIT( 0x01000000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, di_write)
193	187	PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, clk_write)
194	188	PORT_BIT( 0x04000000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, cs_write)
	189	INPUT_PORTS_END
195	190
196		PORT_START("STICKX1")
197		PORT_BIT( 0xfff, 0x800, IPT_AD_STICK_X ) PORT_MINMAX(0x000,0xfff) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(1)
198	191
199		PORT_START("STICKY1")
200		PORT_BIT( 0xfff, 0x800, IPT_AD_STICK_Y ) PORT_MINMAX(0x000,0xfff) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(1)
	192	/*****************************************************************************/
201	193
202		PORT_START("STICKX2")
203		PORT_BIT( 0xfff, 0x800, IPT_AD_STICK_X ) PORT_MINMAX(0x000,0xfff) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2)
	194	void ultrsprt_state::machine_start()
	195	{
	196	/* set conservative DRC options */
	197	ppcdrc_set_options(m_maincpu, PPCDRC_COMPATIBLE_OPTIONS);
204	198
205		PORT_START("STICKY2")
206		PORT_BIT( 0xfff, 0x800, IPT_AD_STICK_Y ) PORT_MINMAX(0x000,0xfff) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(2)
207		INPUT_PORTS_END
	199	/* configure fast RAM regions for DRC */
	200	ppcdrc_add_fastram(m_maincpu, 0xff000000, 0xff01ffff, FALSE, m_workram);
208	201
	202	m_vram = auto_alloc_array(machine(), UINT8, VRAM_PAGE_BYTES * VRAM_PAGES);
209	203
210		INTERRUPT_GEN_MEMBER(ultrsprt_state::ultrsprt_vblank)
211		{
212		device.execute().set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
	204	membank("vram")->configure_entries(0, VRAM_PAGES, m_vram, VRAM_PAGE_BYTES);
	205
	206	save_pointer(NAME(m_vram), VRAM_PAGE_BYTES * VRAM_PAGES);
	207	save_item(NAME(m_cpu_vram_page));
213	208	}
214	209
215		static void sound_irq_callback(running_machine &machine, int irq)
	210	void ultrsprt_state::machine_reset()
216	211	{
217		ultrsprt_state *state = machine.driver_data<ultrsprt_state>();
218		if (irq == 0)
219		/*generic_pulse_irq_line(machine.device("audiocpu"), INPUT_LINE_IRQ5, 1)*/;
220		else
221		state->m_audiocpu->set_input_line(INPUT_LINE_IRQ6, HOLD_LINE);
	212	m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
	213
	214	m_cpu_vram_page = 0;
	215	membank("vram")->set_entry(m_cpu_vram_page);
222	216	}
223	217
224		static const k056800_interface ultrsprt_k056800_interface =
225		{
226		sound_irq_callback
227		};
228	218
	219	/*****************************************************************************/
	220
229	221	static k054539_interface k054539_config;
230	222
	223
231	224	static MACHINE_CONFIG_START( ultrsprt, ultrsprt_state )
232	225	/* basic machine hardware */
233		MCFG_CPU_ADD("maincpu", PPC403GA, 25000000)     /* PowerPC 403GA 25MHz */
	226	MCFG_CPU_ADD("maincpu", PPC403GA, 25000000)
234	227	MCFG_CPU_PROGRAM_MAP(ultrsprt_map)
235		MCFG_CPU_VBLANK_INT_DRIVER("screen", ultrsprt_state, ultrsprt_vblank)
	228	MCFG_CPU_VBLANK_INT_DRIVER("screen", ultrsprt_state, irq1_line_assert)
236	229
237		MCFG_CPU_ADD("audiocpu", M68000, 8000000)       /* Not sure about the frequency */
	230	MCFG_CPU_ADD("audiocpu", M68000, 8000000) // Unconfirmed
238	231	MCFG_CPU_PROGRAM_MAP(sound_map)
239		MCFG_CPU_PERIODIC_INT_DRIVER(ultrsprt_state, irq5_line_hold,  1)    // ???
240	232
241		MCFG_QUANTUM_TIME(attotime::from_hz(12000))
242
243	233	MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
244	234
245	235	/* video hardware */
246	236	MCFG_SCREEN_ADD("screen", RASTER)
247		MCFG_SCREEN_REFRESH_RATE(60)
248		MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
249		MCFG_SCREEN_SIZE(512, 400)
	237	MCFG_SCREEN_REFRESH_RATE(60) // TODO: Determine correct timings
	238	MCFG_SCREEN_SIZE(640, 480)
250	239	MCFG_SCREEN_VISIBLE_AREA(0, 511, 0, 399)
251	240	MCFG_SCREEN_UPDATE_DRIVER(ultrsprt_state, screen_update_ultrsprt)
252	241
253	242	MCFG_PALETTE_LENGTH(8192)
254	243
255	244	/* sound hardware */
256		MCFG_K056800_ADD("k056800", ultrsprt_k056800_interface, XTAL_18_432MHz)
	245	MCFG_K056800_ADD("k056800", XTAL_18_432MHz)
	246	MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_6))
257	247
258	248	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
259	249
260		MCFG_K054539_ADD("k054539", 48000, k054539_config)
	250	MCFG_K054539_ADD("k054539", XTAL_18_432MHz, k054539_config)
	251	MCFG_K054539_TIMER_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_5))
261	252	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
262	253	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
263	254	MACHINE_CONFIG_END
r26235	r26236
266	257	/*****************************************************************************/
267	258
268	259	ROM_START( fiveside )
269		ROM_REGION(0x200000, "user1", 0)    /* PowerPC program roms */
	260	ROM_REGION(0x200000, "program", 0) /* PowerPC program ROMs */
270	261	ROM_LOAD32_BYTE("479uaa01.bin", 0x000003, 0x80000, CRC(1bc4893d) SHA1(2c9df38ecb7efa7b686221ee98fa3aad9a63e152))
271	262	ROM_LOAD32_BYTE("479uaa02.bin", 0x000002, 0x80000, CRC(ae74a6d0) SHA1(6113c2eea1628b22737c7b87af0e673d94984e88))
272	263	ROM_LOAD32_BYTE("479uaa03.bin", 0x000001, 0x80000, CRC(5c0b176f) SHA1(9560259bc081d4cfd72eb485c3fdcecf484ba7a8))
273	264	ROM_LOAD32_BYTE("479uaa04.bin", 0x000000, 0x80000, CRC(01a3e4cb) SHA1(819df79909d57fa12481698ffdb32b00586131d8))
274	265
275		ROM_REGION(0x20000, "audiocpu", 0)      /* M68K program */
	266	ROM_REGION(0x20000, "audiocpu", 0) /* M68K program */
276	267	ROM_LOAD("479_a05.bin", 0x000000, 0x20000, CRC(251ae299) SHA1(5ffd74357e3c6ddb3a208c39a3b32b53fea90282))
277	268
278		ROM_REGION(0x100000, "k054539", 0)   /* Sound roms */
	269	ROM_REGION(0x100000, "k054539", 0) /* Sound ROMs */
279	270	ROM_LOAD("479_a06.bin", 0x000000, 0x80000, CRC(8d6ac8a2) SHA1(7c4b8bd47cddc766cbdb6a486acc9221be55b579))
280	271	ROM_LOAD("479_a07.bin", 0x080000, 0x80000, CRC(75835df8) SHA1(105b95c16f2ce6902c2e4c9c2fd9f2f7a848c546))
281	272
r26235	r26236
283	274	ROM_LOAD( "fiveside.nv", 0x0000, 0x0080, CRC(aad11072) SHA1(8f777ee47801faa7ce8420c3052034720225aae7) )
284	275	ROM_END
285	276
286		GAME(1995, fiveside, 0, ultrsprt, ultrsprt, driver_device, 0, ROT90, "Konami", "Five a Side Soccer (ver UAA)", GAME_IMPERFECT_SOUND)
	277	// Undumped: Ultra Hockey
	278	GAME(1995, fiveside, 0, ultrsprt, ultrsprt, driver_device, 0, ROT90, "Konami", "Five a Side Soccer (ver UAA)", 0)

trunk/src/mame/drivers/lethal.c

r26235	r26236
212	212	return 0xf;
213	213	}
214	214
215		static void sound_nmi( device_t *device )
216		{
217		lethal_state *state = device->machine().driver_data<lethal_state>();
218		state->m_soundcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
219		}
220
221	215	WRITE8_MEMBER(lethal_state::le_bankswitch_w)
222	216	{
223	217	membank("bank1")->set_entry(data);
r26235	r26236
460	454	ADDRESS_MAP_END
461	455
462	456	static ADDRESS_MAP_START( le_sound, AS_PROGRAM, 8, lethal_state )
463		AM_RANGE(0x0000, 0xefff) AM_ROM
464	457	AM_RANGE(0xf000, 0xf7ff) AM_RAM
465	458	AM_RANGE(0xf800, 0xfa2f) AM_DEVREADWRITE("k054539", k054539_device, read, write)
466	459	AM_RANGE(0xfc00, 0xfc00) AM_WRITE(soundlatch2_byte_w)
467	460	AM_RANGE(0xfc02, 0xfc02) AM_READ(soundlatch_byte_r)
468	461	AM_RANGE(0xfc03, 0xfc03) AM_READNOP
	462	AM_RANGE(0x0000, 0xffff) AM_ROM
469	463	ADDRESS_MAP_END
470	464
471	465	static INPUT_PORTS_START( lethalen )
r26235	r26236
557	551	{
558	552	NULL,
559	553	NULL,
560		sound_nmi
561	554	};
562	555
563	556	void lethal_state::machine_start()
r26235	r26236
643	636
644	637	MCFG_PALETTE_LENGTH(7168+1)
645	638
646
647	639	MCFG_K056832_ADD("k056832", lethalen_k056832_intf)
648	640	MCFG_K053244_ADD("k053244", lethalen_k05324x_intf)
649	641	MCFG_K054000_ADD("k054000")
r26235	r26236
651	643	/* sound hardware */
652	644	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
653	645
654		MCFG_K054539_ADD("k054539", 48000, k054539_config)
	646	MCFG_K054539_ADD("k054539", XTAL_18_432MHz, k054539_config)
	647	MCFG_K054539_TIMER_HANDLER(INPUTLINE("soundcpu", INPUT_LINE_NMI))
655	648	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
656	649	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
657	650	MACHINE_CONFIG_END

trunk/src/mame/drivers/nwk-tr.c

r26235	r26236
239	239	m_k001604(*this, "k001604"),
240	240	m_adc12138(*this, "adc12138") { }
241	241
	242	// TODO: Needs verification on real hardware
	243	static const int m_sound_timer_usec = 2400;
	244
242	245	UINT8 m_led_reg0;
243	246	UINT8 m_led_reg1;
244	247	required_shared_ptr<UINT32> m_work_ram;
r26235	r26236
263	266	DECLARE_WRITE32_MEMBER(lanc2_w);
264	267	DECLARE_READ32_MEMBER(dsp_dataram_r);
265	268	DECLARE_WRITE32_MEMBER(dsp_dataram_w);
	269	DECLARE_WRITE16_MEMBER(soundtimer_en_w);
	270	DECLARE_WRITE16_MEMBER(soundtimer_count_w);
266	271	DECLARE_WRITE_LINE_MEMBER(voodoo_vblank_0);
	272	TIMER_CALLBACK_MEMBER(sound_irq);
267	273	DECLARE_DRIVER_INIT(nwktr);
268	274	virtual void machine_start();
269	275	virtual void machine_reset();
270	276	UINT32 screen_update_nwktr(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
271		TIMER_CALLBACK_MEMBER(irq_off);
	277
272	278	void lanc2_init();
273	279	};
274	280
r26235	r26236
521	527
522	528	/*****************************************************************************/
523	529
524		TIMER_CALLBACK_MEMBER(nwktr_state::irq_off)
	530	TIMER_CALLBACK_MEMBER(nwktr_state::sound_irq)
525	531	{
526		m_audiocpu->set_input_line(param, CLEAR_LINE);
	532	m_audiocpu->set_input_line(M68K_IRQ_1, ASSERT_LINE);
527	533	}
528	534
	535
	536	WRITE16_MEMBER(nwktr_state::soundtimer_en_w)
	537	{
	538	if (data & 1)
	539	{
	540	// Reset and disable timer
	541	m_sound_irq_timer->adjust(attotime::from_usec(m_sound_timer_usec));
	542	m_sound_irq_timer->enable(false);
	543	}
	544	else
	545	{
	546	// Enable timer
	547	m_sound_irq_timer->enable(true);
	548	}
	549	}
	550
	551	WRITE16_MEMBER(nwktr_state::soundtimer_count_w)
	552	{
	553	// Reset the count
	554	m_sound_irq_timer->adjust(attotime::from_usec(m_sound_timer_usec));
	555	m_audiocpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
	556	}
	557
	558
529	559	void nwktr_state::machine_start()
530	560	{
531	561	/* set conservative DRC options */
r26235	r26236
534	564	/* configure fast RAM regions for DRC */
535	565	ppcdrc_add_fastram(m_maincpu, 0x00000000, 0x003fffff, FALSE, m_work_ram);
536	566
537		m_sound_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(nwktr_state::irq_off),this));
	567	m_sound_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(nwktr_state::sound_irq), this));
538	568	}
539	569
540	570	static ADDRESS_MAP_START( nwktr_map, AS_PROGRAM, 32, nwktr_state )
r26235	r26236
548	578	AM_RANGE(0x7d000000, 0x7d00ffff) AM_READ(sysreg_r)
549	579	AM_RANGE(0x7d010000, 0x7d01ffff) AM_WRITE(sysreg_w)
550	580	AM_RANGE(0x7d020000, 0x7d021fff) AM_DEVREADWRITE8("m48t58", timekeeper_device, read, write, 0xffffffff)  /* M48T58Y RTC/NVRAM */
551		AM_RANGE(0x7d030000, 0x7d030007) AM_DEVREAD("k056800", k056800_device, host_r)
552		AM_RANGE(0x7d030000, 0x7d030007) AM_DEVWRITE("k056800", k056800_device, host_w)
553		AM_RANGE(0x7d030008, 0x7d03000f) AM_DEVWRITE("k056800", k056800_device, host_w)
	581	AM_RANGE(0x7d030000, 0x7d03000f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
554	582	AM_RANGE(0x7d040000, 0x7d04ffff) AM_READWRITE(lanc1_r, lanc1_w)
555	583	AM_RANGE(0x7d050000, 0x7d05ffff) AM_READWRITE(lanc2_r, lanc2_w)
556	584	AM_RANGE(0x7e000000, 0x7e7fffff) AM_ROM AM_REGION("user2", 0)   /* Data ROM */
r26235	r26236
562	590
563	591	static ADDRESS_MAP_START( sound_memmap, AS_PROGRAM, 16, nwktr_state )
564	592	AM_RANGE(0x000000, 0x07ffff) AM_ROM
565		AM_RANGE(0x100000, 0x10ffff) AM_RAM     /* Work RAM */
	593	AM_RANGE(0x100000, 0x10ffff) AM_RAM
566	594	AM_RANGE(0x200000, 0x200fff) AM_DEVREADWRITE("rfsnd", rf5c400_device, rf5c400_r, rf5c400_w)      /* Ricoh RF5C400 */
567		AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("k056800", k056800_device, sound_r, sound_w)
568		AM_RANGE(0x600000, 0x600001) AM_NOP
	595	AM_RANGE(0x300000, 0x30001f) AM_DEVREADWRITE8("k056800", k056800_device, sound_r, sound_w, 0x00ff)
	596	AM_RANGE(0x500000, 0x500001) AM_WRITE(soundtimer_en_w) AM_READNOP
	597	AM_RANGE(0x600000, 0x600001) AM_WRITE(soundtimer_count_w) AM_READNOP
569	598	ADDRESS_MAP_END
570	599
571	600	/*****************************************************************************/
r26235	r26236
682	711	adc12138_input_callback
683	712	};
684	713
685		static void sound_irq_callback(running_machine &machine, int irq)
686		{
687		nwktr_state *state = machine.driver_data<nwktr_state>();
688		int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
689	714
690		state->m_audiocpu->set_input_line(line, ASSERT_LINE);
691		state->m_sound_irq_timer->adjust(attotime::from_usec(5), line);
692		}
693
694		static const k056800_interface nwktr_k056800_interface =
695		{
696		sound_irq_callback
697		};
698
699	715	static const k033906_interface nwktr_k033906_interface =
700	716	{
701	717	"voodoo"
r26235	r26236
734	750	static MACHINE_CONFIG_START( nwktr, nwktr_state )
735	751
736	752	/* basic machine hardware */
737		MCFG_CPU_ADD("maincpu", PPC403GA, 64000000/2)   /* PowerPC 403GA 32MHz */
	753	MCFG_CPU_ADD("maincpu", PPC403GA, XTAL_64MHz/2)   /* PowerPC 403GA 32MHz */
738	754	MCFG_CPU_PROGRAM_MAP(nwktr_map)
739	755
740		MCFG_CPU_ADD("audiocpu", M68000, 64000000/4)    /* 16MHz */
	756	MCFG_CPU_ADD("audiocpu", M68000, XTAL_64MHz/4)    /* 16MHz */
741	757	MCFG_CPU_PROGRAM_MAP(sound_memmap)
742	758
743		MCFG_CPU_ADD("dsp", ADSP21062, 36000000)
	759	MCFG_CPU_ADD("dsp", ADSP21062, XTAL_36MHz)
744	760	MCFG_CPU_CONFIG(sharc_cfg)
745	761	MCFG_CPU_DATA_MAP(sharc_map)
746	762
747	763	MCFG_QUANTUM_TIME(attotime::from_hz(9000))
748	764
	765	MCFG_M48T58_ADD( "m48t58" )
	766	MCFG_ADC12138_ADD( "adc12138", nwktr_adc_interface )
	767	MCFG_K033906_ADD("k033906_1", nwktr_k033906_interface)
749	768
	769	/* video hardware */
750	770	MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_intf)
751	771
752		MCFG_K033906_ADD("k033906_1", nwktr_k033906_interface)
753
754		/* video hardware */
755	772	MCFG_SCREEN_ADD("screen", RASTER)
756	773	MCFG_SCREEN_REFRESH_RATE(60)
757	774	MCFG_SCREEN_SIZE(512, 384)
r26235	r26236
762	779
763	780	MCFG_K001604_ADD("k001604", racingj_k001604_intf)
764	781
765		MCFG_K056800_ADD("k056800", nwktr_k056800_interface, 64000000/4)
766
767	782	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
768	783
769		MCFG_RF5C400_ADD("rfsnd", 16934400)  // as per Guru readme above
	784	MCFG_K056800_ADD("k056800", XTAL_16_9344MHz)
	785	MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_2))
	786
	787	MCFG_RF5C400_ADD("rfsnd", XTAL_16_9344MHz)  // as per Guru readme above
770	788	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
771	789	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
772
773		MCFG_M48T58_ADD( "m48t58" )
774
775		MCFG_ADC12138_ADD( "adc12138", nwktr_adc_interface )
776	790	MACHINE_CONFIG_END
777	791
778	792	static MACHINE_CONFIG_DERIVED( thrilld, nwktr )

trunk/src/mame/drivers/zr107.c

r26235	r26236
182	182	class zr107_state : public driver_device
183	183	{
184	184	public:
185		enum
186		{
187		TIMER_IRQ_OFF
188		};
189
190	185	zr107_state(const machine_config &mconfig, device_type type, const char *tag)
191	186	: driver_device(mconfig, type, tag),
192		m_workram(*this, "workram"),
193	187	m_maincpu(*this, "maincpu"),
194	188	m_audiocpu(*this, "audiocpu"),
195	189	m_dsp(*this, "dsp"),
196	190	m_k001604(*this, "k001604"),
197	191	m_k056800(*this, "k056800"),
198		m_k056832(*this, "k056832") { }
	192	m_k056832(*this, "k056832"),
	193	m_workram(*this, "workram") { }
199	194
	195	required_device<cpu_device> m_maincpu;
	196	required_device<cpu_device> m_audiocpu;
	197	required_device<cpu_device> m_dsp;
	198	optional_device<k001604_device> m_k001604;
	199	required_device<k056800_device> m_k056800;
	200	optional_device<k056832_device> m_k056832;
	201	optional_shared_ptr<UINT32> m_workram;
	202
	203	UINT32 *m_sharc_dataram;
200	204	UINT8 m_led_reg0;
201	205	UINT8 m_led_reg1;
202	206	int m_ccu_vcth;
203	207	int m_ccu_vctl;
204		optional_shared_ptr<UINT32> m_workram;
205		emu_timer *m_sound_irq_timer;
206		UINT32 *m_sharc_dataram;
	208	UINT8 m_sound_ctrl;
	209	UINT8 m_sound_intck;
	210
207	211	DECLARE_WRITE32_MEMBER(paletteram32_w);
208	212	DECLARE_READ8_MEMBER(sysreg_r);
209	213	DECLARE_WRITE8_MEMBER(sysreg_w);
r26235	r26236
212	216	DECLARE_WRITE32_MEMBER(jetwave_palette_w);
213	217	DECLARE_READ32_MEMBER(dsp_dataram_r);
214	218	DECLARE_WRITE32_MEMBER(dsp_dataram_w);
	219	DECLARE_WRITE16_MEMBER(sound_ctrl_w);
	220
215	221	DECLARE_DRIVER_INIT(common);
216	222	DECLARE_DRIVER_INIT(zr107);
217	223	DECLARE_DRIVER_INIT(jetwave);
218		virtual void machine_start();
219		virtual void machine_reset();
220	224	DECLARE_VIDEO_START(zr107);
221	225	DECLARE_VIDEO_START(jetwave);
222	226	UINT32 screen_update_zr107(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
223	227	UINT32 screen_update_jetwave(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
224	228	INTERRUPT_GEN_MEMBER(zr107_vblank);
225		required_device<cpu_device> m_maincpu;
226		required_device<cpu_device> m_audiocpu;
227		required_device<cpu_device> m_dsp;
228		optional_device<k001604_device> m_k001604;
229		required_device<k056800_device> m_k056800;
230		optional_device<k056832_device> m_k056832;
	229	WRITE_LINE_MEMBER(k054539_irq_gen);
231	230
232	231	protected:
233		virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
	232	virtual void machine_start();
	233	virtual void machine_reset();
234	234	};
235	235
236	236
r26235	r26236
431	431	/* set conservative DRC options */
432	432	ppcdrc_set_options(m_maincpu, PPCDRC_COMPATIBLE_OPTIONS);
433	433
434		m_sound_irq_timer = timer_alloc(TIMER_IRQ_OFF);
435
436	434	/* configure fast RAM regions for DRC */
437	435	ppcdrc_add_fastram(m_maincpu, 0x00000000, 0x000fffff, FALSE, m_workram);
438	436	}
r26235	r26236
451	449	AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
452	450	AM_RANGE(0x7e008000, 0x7e009fff) AM_DEVREADWRITE8("k056230", k056230_device, k056230_r, k056230_w, 0xffffffff)               /* LANC registers */
453	451	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_DEVREADWRITE("k056230", k056230_device, lanc_ram_r, lanc_ram_w)      /* LANC Buffer RAM (27E) */
454		AM_RANGE(0x7e00c000, 0x7e00c007) AM_DEVWRITE("k056800", k056800_device, host_w)
455		AM_RANGE(0x7e00c008, 0x7e00c00f) AM_DEVREAD("k056800", k056800_device, host_r)
	452	AM_RANGE(0x7e00c000, 0x7e00c00f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
456	453	AM_RANGE(0x7f800000, 0x7f9fffff) AM_ROM AM_SHARE("share2")
457	454	AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION("user1", 0) AM_SHARE("share2")    /* Program ROM */
458	455	ADDRESS_MAP_END
r26235	r26236
479	476	AM_RANGE(0x7e000000, 0x7e003fff) AM_MIRROR(0x80000000) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
480	477	AM_RANGE(0x7e008000, 0x7e009fff) AM_MIRROR(0x80000000) AM_DEVREADWRITE8("k056230", k056230_device, k056230_r, k056230_w, 0xffffffff)             /* LANC registers */
481	478	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_MIRROR(0x80000000) AM_DEVREADWRITE("k056230", k056230_device, lanc_ram_r, lanc_ram_w)    /* LANC Buffer RAM (27E) */
482		AM_RANGE(0x7e00c000, 0x7e00c007) AM_MIRROR(0x80000000) AM_DEVWRITE("k056800", k056800_device, host_w)
483		AM_RANGE(0x7e00c008, 0x7e00c00f) AM_MIRROR(0x80000000) AM_DEVREAD("k056800", k056800_device, host_r)
	479	AM_RANGE(0x7e00c000, 0x7e00c00f) AM_MIRROR(0x80000000) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
484	480	AM_RANGE(0x7f000000, 0x7f3fffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION("user2", 0)
485	481	AM_RANGE(0x7f800000, 0x7f9fffff) AM_MIRROR(0x80000000) AM_ROM AM_SHARE("share2")
486	482	AM_RANGE(0x7fe00000, 0x7fffffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION("user1", 0) AM_SHARE("share2")  /* Program ROM */
r26235	r26236
490	486
491	487	/**********************************************************************/
492	488
	489	WRITE16_MEMBER(zr107_state::sound_ctrl_w)
	490	{
	491	if (ACCESSING_BITS_0_7)
	492	{
	493	if (!(data & 1))
	494	m_audiocpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
	495
	496	m_sound_ctrl = data;
	497	}
	498	}
	499
493	500	static ADDRESS_MAP_START( sound_memmap, AS_PROGRAM, 16, zr107_state )
494	501	AM_RANGE(0x000000, 0x01ffff) AM_ROM
495	502	AM_RANGE(0x100000, 0x103fff) AM_RAM     /* Work RAM */
496	503	AM_RANGE(0x200000, 0x2004ff) AM_DEVREADWRITE8("k054539_1", k054539_device, read, write, 0xff00)
497	504	AM_RANGE(0x200000, 0x2004ff) AM_DEVREADWRITE8("k054539_2", k054539_device, read, write, 0x00ff)
498		AM_RANGE(0x400000, 0x40000f) AM_DEVWRITE("k056800", k056800_device, sound_w)
499		AM_RANGE(0x400010, 0x40001f) AM_DEVREAD("k056800", k056800_device, sound_r)
500		AM_RANGE(0x580000, 0x580001) AM_WRITENOP
	505	AM_RANGE(0x400000, 0x40001f) AM_DEVREADWRITE8("k056800", k056800_device, sound_r, sound_w, 0x00ff)
	506	AM_RANGE(0x500000, 0x500001) AM_WRITE(sound_ctrl_w)
	507	AM_RANGE(0x580000, 0x580001) AM_WRITENOP // 'NRES' - D2: K056602 /RESET
501	508	ADDRESS_MAP_END
502	509
503	510	static const k054539_interface k054539_config =
r26235	r26236
694	701	}
695	702
696	703
697		void zr107_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
	704
	705	WRITE_LINE_MEMBER(zr107_state::k054539_irq_gen)
698	706	{
699		switch (id)
	707	if (m_sound_ctrl & 1)
700	708	{
701		case TIMER_IRQ_OFF:
702		m_audiocpu->set_input_line(param, CLEAR_LINE);
703		break;
704		default:
705		assert_always(FALSE, "Unknown id in zr107_state::device_timer");
	709	// Trigger an interrupt on the rising edge
	710	if (!m_sound_intck && state)
	711	m_audiocpu->set_input_line(M68K_IRQ_2, ASSERT_LINE);
706	712	}
707		}
708	713
709		static void sound_irq_callback( running_machine &machine, int irq )
710		{
711		zr107_state *state = machine.driver_data<zr107_state>();
712		int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
713
714		state->m_audiocpu->set_input_line(line, ASSERT_LINE);
715		state->timer_set(attotime::from_usec(5), zr107_state::TIMER_IRQ_OFF, line);
	714	m_sound_intck = state;
716	715	}
717	716
718		static const k056800_interface zr107_k056800_interface =
719		{
720		sound_irq_callback
721		};
722	717
723	718	static const k056832_interface zr107_k056832_intf =
724	719	{
r26235	r26236
766	761	MCFG_CPU_CONFIG(sharc_cfg)
767	762	MCFG_CPU_DATA_MAP(sharc_map)
768	763
769		MCFG_QUANTUM_TIME(attotime::from_hz(30000))
	764	MCFG_QUANTUM_TIME(attotime::from_hz(750000))// Very high sync needed to prevent lockups - why?
770	765
771	766	MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
772	767
r26235	r26236
785	780
786	781	MCFG_K056832_ADD("k056832", zr107_k056832_intf)
787	782
788		MCFG_K056800_ADD("k056800", zr107_k056800_interface, XTAL_64MHz/4)
	783	MCFG_K056800_ADD("k056800", XTAL_18_432MHz)
	784	MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_1))
789	785
790	786	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
791	787
792		MCFG_K054539_ADD("k054539_1", 48000, k054539_config)
	788	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
	789	MCFG_K054539_TIMER_HANDLER(WRITELINE(zr107_state, k054539_irq_gen))
793	790	MCFG_SOUND_ROUTE(0, "lspeaker", 0.75)
794	791	MCFG_SOUND_ROUTE(1, "rspeaker", 0.75)
795	792
796		MCFG_K054539_ADD("k054539_2", 48000, k054539_config)
	793	MCFG_K054539_ADD("k054539_2", XTAL_18_432MHz, k054539_config)
797	794	MCFG_SOUND_ROUTE(0, "lspeaker", 0.75)
798	795	MCFG_SOUND_ROUTE(1, "rspeaker", 0.75)
799	796
r26235	r26236
824	821	MCFG_CPU_CONFIG(sharc_cfg)
825	822	MCFG_CPU_DATA_MAP(sharc_map)
826	823
827		MCFG_QUANTUM_TIME(attotime::from_hz(30000))
	824	MCFG_QUANTUM_TIME(attotime::from_hz(2000000)) // Very high sync needed to prevent lockups - why?
828	825
829	826	MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
830	827
r26235	r26236
843	840
844	841	MCFG_K001604_ADD("k001604", jetwave_k001604_intf)
845	842
846		MCFG_K056800_ADD("k056800", zr107_k056800_interface, XTAL_64MHz/4)
	843	MCFG_K056800_ADD("k056800", XTAL_18_432MHz)
	844	MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_1))
847	845
848	846	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
849	847
850		MCFG_K054539_ADD("k054539_1", 48000, k054539_config)
	848	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
	849	MCFG_K054539_TIMER_HANDLER(WRITELINE(zr107_state, k054539_irq_gen))
851	850	MCFG_SOUND_ROUTE(0, "lspeaker", 0.75)
852	851	MCFG_SOUND_ROUTE(1, "rspeaker", 0.75)
853	852
854		MCFG_K054539_ADD("k054539_2", 48000, k054539_config)
	853	MCFG_K054539_ADD("k054539_2", XTAL_18_432MHz, k054539_config)
855	854	MCFG_SOUND_CONFIG(k054539_config)
856	855	MCFG_SOUND_ROUTE(0, "lspeaker", 0.75)
857	856	MCFG_SOUND_ROUTE(1, "rspeaker", 0.75)
r26235	r26236
1069	1068
1070	1069	/*****************************************************************************/
1071	1070
1072		GAME( 1995, midnrun,  0,        zr107,   midnrun,  zr107_state, zr107,   ROT0, "Konami", "Midnight Run (Euro v1.11)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
1073		GAME( 1996, windheat, 0,        zr107,   windheat, zr107_state, zr107,   ROT0, "Konami", "Winding Heat (EAA, Euro v2.11)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
1074		GAME( 1996, windheatu,windheat, zr107,   windheat, zr107_state, zr107,   ROT0, "Konami", "Winding Heat (UBC, USA v2.22)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
1075		GAME( 1996, windheatj,windheat, zr107,   windheat, zr107_state, zr107,   ROT0, "Konami", "Winding Heat (JAA, Japan v2.11)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
1076		GAME( 1996, windheata,windheat, zr107,   windheat, zr107_state, zr107,   ROT0, "Konami", "Winding Heat (AAA, Asia v2.11)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
1077		GAME( 1996, waveshrk, 0,        jetwave, jetwave,  zr107_state, jetwave, ROT0, "Konami", "Wave Shark (UAB, USA v1.04)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
1078		GAME( 1996, jetwave,  waveshrk, jetwave, jetwave,  zr107_state, jetwave, ROT0, "Konami", "Jet Wave (JAB, Japan v1.04)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	1071	GAME( 1995, midnrun,  0,        zr107,   midnrun,  zr107_state, zr107,   ROT0, "Konami", "Midnight Run (Euro v1.11)", GAME_IMPERFECT_GRAPHICS )
	1072	GAME( 1996, windheat, 0,        zr107,   windheat, zr107_state, zr107,   ROT0, "Konami", "Winding Heat (EAA, Euro v2.11)", GAME_IMPERFECT_GRAPHICS )
	1073	GAME( 1996, windheatu,windheat, zr107,   windheat, zr107_state, zr107,   ROT0, "Konami", "Winding Heat (UBC, USA v2.22)", GAME_IMPERFECT_GRAPHICS )
	1074	GAME( 1996, windheatj,windheat, zr107,   windheat, zr107_state, zr107,   ROT0, "Konami", "Winding Heat (JAA, Japan v2.11)", GAME_IMPERFECT_GRAPHICS )
	1075	GAME( 1996, windheata,windheat, zr107,   windheat, zr107_state, zr107,   ROT0, "Konami", "Winding Heat (AAA, Asia v2.11)", GAME_IMPERFECT_GRAPHICS )
	1076	GAME( 1996, waveshrk, 0,        jetwave, jetwave,  zr107_state, jetwave, ROT0, "Konami", "Wave Shark (UAB, USA v1.04)", GAME_IMPERFECT_GRAPHICS )
	1077	GAME( 1996, jetwave,  waveshrk, jetwave, jetwave,  zr107_state, jetwave, ROT0, "Konami", "Jet Wave (JAB, Japan v1.04)", GAME_IMPERFECT_GRAPHICS )

trunk/src/mame/drivers/gticlub.c

r26235	r26236
239	239	class gticlub_state : public driver_device
240	240	{
241	241	public:
242		enum
243		{
244		TIMER_IRQ_OFF
245		};
246
247	242	gticlub_state(const machine_config &mconfig, device_type type, const char *tag)
248	243	: driver_device(mconfig, type, tag),
249	244	m_work_ram(*this, "work_ram"),
250	245	m_maincpu(*this, "maincpu"),
251	246	m_audiocpu(*this, "audiocpu"),
252		m_k056800(*this, "k056800"),
253	247	m_dsp(*this, "dsp"),
254	248	m_dsp2(*this, "dsp2"),
	249	m_k056800(*this, "k056800"),
255	250	m_adc1038(*this, "adc1038"),
256	251	m_eeprom(*this, "eeprom")  { }
257	252
	253	// TODO: Needs verification on real hardware
	254	static const int m_sound_timer_usec = 2400;
	255
258	256	required_shared_ptr<UINT32> m_work_ram;
259	257	required_device<cpu_device> m_maincpu;
260	258	required_device<cpu_device> m_audiocpu;
261		required_device<k056800_device> m_k056800;
262	259	required_device<cpu_device> m_dsp;
263	260	optional_device<cpu_device> m_dsp2;
	261	required_device<k056800_device> m_k056800;
264	262	required_device<adc1038_device> m_adc1038;
265	263	required_device<eeprom_serial_93cxx_device> m_eeprom;
266		UINT32 *m_sharc_dataram_0;
267		UINT32 *m_sharc_dataram_1;
	264
268	265	DECLARE_WRITE32_MEMBER(paletteram32_w);
269	266	DECLARE_READ32_MEMBER(gticlub_k001604_tile_r);
270	267	DECLARE_WRITE32_MEMBER(gticlub_k001604_tile_w);
r26235	r26236
280	277	DECLARE_WRITE32_MEMBER(dsp_dataram1_w);
281	278	DECLARE_WRITE_LINE_MEMBER(voodoo_vblank_0);
282	279	DECLARE_WRITE_LINE_MEMBER(voodoo_vblank_1);
	280	DECLARE_WRITE16_MEMBER(soundtimer_en_w);
	281	DECLARE_WRITE16_MEMBER(soundtimer_count_w);
	282
283	283	void init_hangplt_common();
284	284	DECLARE_DRIVER_INIT(hangplt);
285	285	DECLARE_DRIVER_INIT(hangpltu);
r26235	r26236
289	289	DECLARE_MACHINE_RESET(hangplt);
290	290	DECLARE_VIDEO_START(gticlub);
291	291	INTERRUPT_GEN_MEMBER(gticlub_vblank);
	292	TIMER_CALLBACK_MEMBER(sound_irq);
292	293
293	294	UINT32 screen_update_gticlub(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
294	295	UINT32 screen_update_hangplt(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
295	296
296		protected:
297		virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
298	297	private:
299	298	void gticlub_led_setreg(int offset, UINT8 data);
300	299
301	300	UINT8 gticlub_led_reg[2];
	301	emu_timer *m_sound_irq_timer;
	302	UINT32 *m_sharc_dataram_0;
	303	UINT32 *m_sharc_dataram_1;
302	304	};
303	305
304	306
r26235	r26236
424	426
425	427	/******************************************************************/
426	428
	429	TIMER_CALLBACK_MEMBER(gticlub_state::sound_irq)
	430	{
	431	m_audiocpu->set_input_line(M68K_IRQ_1, ASSERT_LINE);
	432	}
	433
	434
	435	WRITE16_MEMBER(gticlub_state::soundtimer_en_w)
	436	{
	437	if (data & 1)
	438	{
	439	// Reset and disable timer
	440	m_sound_irq_timer->adjust(attotime::from_usec(m_sound_timer_usec));
	441	m_sound_irq_timer->enable(false);
	442	}
	443	else
	444	{
	445	// Enable timer
	446	m_sound_irq_timer->enable(true);
	447	}
	448	}
	449
	450	WRITE16_MEMBER(gticlub_state::soundtimer_count_w)
	451	{
	452	// Reset the count
	453	m_sound_irq_timer->adjust(attotime::from_usec(m_sound_timer_usec));
	454	m_audiocpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
	455	}
	456
	457	/******************************************************************/
	458
427	459	MACHINE_START_MEMBER(gticlub_state,gticlub)
428	460	{
429	461	/* set conservative DRC options */
r26235	r26236
431	463
432	464	/* configure fast RAM regions for DRC */
433	465	ppcdrc_add_fastram(m_maincpu, 0x00000000, 0x000fffff, FALSE, m_work_ram);
	466
	467	m_sound_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gticlub_state::sound_irq), this));
434	468	}
435	469
436	470	static ADDRESS_MAP_START( gticlub_map, AS_PROGRAM, 32, gticlub_state )
r26235	r26236
446	480	AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
447	481	AM_RANGE(0x7e008000, 0x7e009fff) AM_DEVREADWRITE8("k056230", k056230_device, k056230_r, k056230_w, 0xffffffff)
448	482	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_DEVREADWRITE("k056230", k056230_device, lanc_ram_r, lanc_ram_w)
449		AM_RANGE(0x7e00c000, 0x7e00c007) AM_DEVWRITE("k056800", k056800_device, host_w)
450		AM_RANGE(0x7e00c000, 0x7e00c007) AM_DEVREAD("k056800", k056800_device, host_r)       // Hang Pilot
451		AM_RANGE(0x7e00c008, 0x7e00c00f) AM_DEVREAD("k056800", k056800_device, host_r)
	483	AM_RANGE(0x7e00c000, 0x7e00c00f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
452	484	AM_RANGE(0x7f000000, 0x7f3fffff) AM_ROM AM_REGION("user2", 0)   /* Data ROM */
453	485	AM_RANGE(0x7f800000, 0x7f9fffff) AM_ROM AM_SHARE("share2")
454	486	AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION("user1", 0) AM_SHARE("share2")    /* Program ROM */
r26235	r26236
459	491	static ADDRESS_MAP_START( sound_memmap, AS_PROGRAM, 16, gticlub_state )
460	492	AM_RANGE(0x000000, 0x07ffff) AM_ROM
461	493	AM_RANGE(0x200000, 0x20ffff) AM_RAM
462		AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("k056800", k056800_device, sound_r, sound_w)
	494	AM_RANGE(0x300000, 0x30001f) AM_DEVREADWRITE8("k056800", k056800_device, sound_r, sound_w, 0x00ff)
463	495	AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rfsnd", rf5c400_device, rf5c400_r, rf5c400_w)      /* Ricoh RF5C400 */
464		AM_RANGE(0x580000, 0x580001) AM_WRITENOP
465		AM_RANGE(0x600000, 0x600001) AM_WRITENOP
	496	AM_RANGE(0x500000, 0x500001) AM_WRITE(soundtimer_en_w) AM_READNOP
	497	AM_RANGE(0x600000, 0x600001) AM_WRITE(soundtimer_count_w) AM_READNOP
466	498	ADDRESS_MAP_END
467	499
468	500	/*****************************************************************************/
r26235	r26236
722	754	};
723	755
724	756
725		void gticlub_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
726		{
727		switch (id)
728		{
729		case TIMER_IRQ_OFF:
730		m_audiocpu->set_input_line(param, CLEAR_LINE);
731		break;
732		default:
733		assert_always(FALSE, "Unknown id in gticlub_state::device_timer");
734		}
735		}
736
737		static void sound_irq_callback( running_machine &machine, int irq )
738		{
739		gticlub_state *state = machine.driver_data<gticlub_state>();
740		int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
741
742		state->m_audiocpu->set_input_line(line, ASSERT_LINE);
743		state->timer_set(attotime::from_usec(5), gticlub_state::TIMER_IRQ_OFF, line);
744		}
745
746		static const k056800_interface gticlub_k056800_interface =
747		{
748		sound_irq_callback
749		};
750
751
752	757	static int adc1038_input_callback( device_t *device, int input )
753	758	{
754	759	int value = 0;
r26235	r26236
986	991
987	992	MCFG_K001604_ADD("k001604_1", gticlub_k001604_intf)
988	993
989		MCFG_K056800_ADD("k056800", gticlub_k056800_interface, XTAL_64MHz/4)
	994	MCFG_K056800_ADD("k056800", XTAL_33_8688MHz/2)
	995	MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_2))
990	996
991	997	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
992	998
r26235	r26236
1103	1109	MCFG_K001604_ADD("k001604_1", hangplt_k001604_intf_l)
1104	1110	MCFG_K001604_ADD("k001604_2", hangplt_k001604_intf_r)
1105	1111
1106		MCFG_K056800_ADD("k056800", gticlub_k056800_interface, XTAL_64MHz/4)
	1112	MCFG_K056800_ADD("k056800", XTAL_33_8688MHz/2)
	1113	MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_2))
1107	1114
1108	1115	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1109	1116

trunk/src/mame/drivers/qdrmfgp.c

r26235	r26236
10	10	Other(GE557):Konami 056832,058141,058143
11	11
12	12	TODO:
13		- enabling irq acks breaks both games, why?
	13	- qdrmfgp2 requires an interrupt hack following an IDE READ_MULTIPLE
	14	command
14	15
15	16	--
16	17	driver by Eisuke Watanabe
r26235	r26236
29	30	#include "includes/qdrmfgp.h"
30	31
31	32
	33	#define IDE_HACK   1
	34
	35
32	36	/*************************************
33	37	*
34	38	*  68k CPU memory handlers
35	39	*
36	40	*************************************/
37	41
38		CUSTOM_INPUT_MEMBER(qdrmfgp_state::inputs_r)
	42	READ16_MEMBER(qdrmfgp_state::inputs_r)
39	43	{
40		const char *tag1 = (const char *)param;
41		const char *tag2 = tag1 + strlen(tag1) + 1;
42		return ioport((m_control & 0x0080) ? tag1 : tag2)->read();
	44	return m_control & 0x0080 ? m_inputs_port->read() : m_dsw_port->read();
43	45	}
44	46
45	47	CUSTOM_INPUT_MEMBER(qdrmfgp_state::battery_sensor_r)
r26235	r26236
66	68	COMBINE_DATA(&m_control);
67	69	m_pal = m_control & 0x70;
68	70
	71	if (!(m_control & 1))
	72	m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
	73
	74	if (!(m_control & 2))
	75	m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
	76
	77	if (!(m_control & 4))
	78	m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
	79
	80	if (!(m_control & 8))
	81	m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE);
	82
69	83	if (m_control & 0x0100)
70	84	{
71	85	int vol = m_nvram[0x10] & 0xff;
r26235	r26236
95	109	COMBINE_DATA(&m_control);
96	110	m_pal = 0;
97	111
	112	if (!(m_control & 4))
	113	m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
	114
	115	if (!(m_control & 8))
	116	m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE);
	117
	118	if (!(m_control & 0x10))
	119	m_maincpu->set_input_line(M68K_IRQ_5, CLEAR_LINE);
	120
98	121	if (m_control & 0x0100)
99	122	{
100	123	int vol = m_nvram[0x8] & 0xff;
r26235	r26236
190	213	if ((m_workram[0x5fa4/2] - space.device().state().state_int(M68K_D0)) <= 0x10)
191	214	m_gp2_irq_control = 1;
192	215	break;
	216
193	217	case 0xdec2:
194	218	m_gp2_irq_control = 1;
195	219	default:
196	220	break;
197	221	}
198	222	}
199
200	223	return m_ata->read_cs0(space, offset, mem_mask);
201	224	}
202	225
r26235	r26236
211	234	{
212	235	int scanline = param;
213	236
214		if(scanline == 0)
215		if (m_control & 0x0001)
216		m_maincpu->set_input_line(1, HOLD_LINE);
217
218	237	/* trigger V-blank interrupt */
219	238	if(scanline == 240)
220	239	if (m_control & 0x0004)
221		m_maincpu->set_input_line(3, HOLD_LINE);
	240	m_maincpu->set_input_line(M68K_IRQ_3, ASSERT_LINE);
222	241	}
223	242
224	243	WRITE_LINE_MEMBER(qdrmfgp_state::ide_interrupt)
225	244	{
226	245	if (m_control & 0x0008)
227		{
228	246	if (state != CLEAR_LINE)
229		m_maincpu->set_input_line(4, HOLD_LINE);
230		else
231		m_maincpu->set_input_line(4, CLEAR_LINE);
232		}
	247	m_maincpu->set_input_line(M68K_IRQ_4, ASSERT_LINE);
233	248	}
234	249
235	250	/*************/
r26235	r26236
237	252	TIMER_CALLBACK_MEMBER(qdrmfgp_state::gp2_timer_callback)
238	253	{
239	254	if (m_control & 0x0004)
240		m_maincpu->set_input_line(3, HOLD_LINE);
	255	m_maincpu->set_input_line(M68K_IRQ_3, ASSERT_LINE);
241	256	}
242	257
243	258	INTERRUPT_GEN_MEMBER(qdrmfgp_state::qdrmfgp2_interrupt)
244	259	{
245	260	/* trigger V-blank interrupt */
246	261	if (m_control & 0x0008)
247		device.execute().set_input_line(4, HOLD_LINE);
	262	device.execute().set_input_line(M68K_IRQ_4, ASSERT_LINE);
248	263	}
249	264
250	265	WRITE_LINE_MEMBER(qdrmfgp_state::gp2_ide_interrupt)
251	266	{
	267	#if IDE_HACK
252	268	if (m_control & 0x0010)
253	269	{
254	270	if (state != CLEAR_LINE)
255	271	{
256	272	if (m_gp2_irq_control)
	273	{
257	274	m_gp2_irq_control = 0;
	275	}
258	276	else
259		m_maincpu->set_input_line(5, HOLD_LINE);
	277	{
	278	m_maincpu->set_input_line(M68K_IRQ_5, ASSERT_LINE);
	279	}
260	280	}
261	281	else
262	282	{
263	283	m_maincpu->set_input_line(5, CLEAR_LINE);
264	284	}
265	285	}
	286	#else
	287	if (m_control & 0x0010)
	288	if (state != CLEAR_LINE)
	289	m_maincpu->set_input_line(M68K_IRQ_5, ASSERT_LINE);
	290	#endif
266	291	}
267	292
268	293
r26235	r26236
280	305	AM_RANGE(0x300000, 0x30003f) AM_DEVWRITE("k056832", k056832_device, word_w)                                      /* video reg */
281	306	AM_RANGE(0x320000, 0x32001f) AM_DEVREADWRITE8("k053252", k053252_device, read, write, 0x00ff)                    /* ccu */
282	307	AM_RANGE(0x330000, 0x330001) AM_READ_PORT("SENSOR")                                         /* battery power & service sw */
283		AM_RANGE(0x340000, 0x340001) AM_READ_PORT("340000")                                         /* inputport */
	308	AM_RANGE(0x340000, 0x340001) AM_READ(inputs_r)                                              /* inputport */
284	309	AM_RANGE(0x350000, 0x350001) AM_WRITENOP                                                    /* unknown */
285	310	AM_RANGE(0x360000, 0x360001) AM_WRITENOP                                                    /* unknown */
286	311	AM_RANGE(0x370000, 0x370001) AM_WRITE(gp_control_w)                                         /* control reg */
r26235	r26236
303	328	AM_RANGE(0x300000, 0x30003f) AM_DEVWRITE("k056832", k056832_device, word_w)                                      /* video reg */
304	329	AM_RANGE(0x320000, 0x32001f) AM_DEVREADWRITE8("k053252", k053252_device, read, write, 0xff00)                    /* ccu */
305	330	AM_RANGE(0x330000, 0x330001) AM_READ_PORT("SENSOR")                                         /* battery power & service */
306		AM_RANGE(0x340000, 0x340001) AM_READ_PORT("340000")                                         /* inputport */
	331	AM_RANGE(0x340000, 0x340001) AM_READ(inputs_r)                                              /* inputport */
307	332	AM_RANGE(0x350000, 0x350001) AM_WRITENOP                                                    /* unknown */
308	333	AM_RANGE(0x360000, 0x360001) AM_WRITENOP                                                    /* unknown */
309	334	AM_RANGE(0x370000, 0x370001) AM_WRITE(gp2_control_w)                                        /* control reg */
r26235	r26236
312	337	AM_RANGE(0x880000, 0x881fff) AM_READWRITE(gp2_vram_r, gp2_vram_w)                           /* vram */
313	338	AM_RANGE(0x89f000, 0x8a0fff) AM_READWRITE(gp2_vram_mirror_r, gp2_vram_mirror_w)             /* vram (mirror) */
314	339	AM_RANGE(0x900000, 0x901fff) AM_READ(v_rom_r)                                               /* gfxrom through */
	340	#if IDE_HACK
315	341	AM_RANGE(0xa00000, 0xa0000f) AM_READ(gp2_ide_std_r) AM_DEVWRITE("ata", ata_interface_device, write_cs0) /* IDE control regs */
	342	#else
	343	AM_RANGE(0xa00000, 0xa0000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs0, write_cs0) /* IDE control regs */
	344	#endif
316	345	AM_RANGE(0xa40000, 0xa4000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs1, write_cs1) /* IDE status control reg */
317	346	AM_RANGE(0xc00000, 0xcbffff) AM_READWRITE(sndram_r,sndram_w)                                /* sound ram */
318	347	ADDRESS_MAP_END
r26235	r26236
325	354	*************************************/
326	355
327	356	static INPUT_PORTS_START( qdrmfgp )
328		PORT_START("340000")
329		PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, qdrmfgp_state,inputs_r, "INPUTS\0DSW")
330
331	357	PORT_START("INPUTS")
332	358	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
333	359	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
r26235	r26236
408	434	INPUT_PORTS_END
409	435
410	436	static INPUT_PORTS_START( qdrmfgp2 )
411		PORT_START("340000")
412		PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, qdrmfgp_state,inputs_r, "INPUTS\0DSW")
413
414	437	PORT_START("INPUTS")
415	438	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
416	439	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
r26235	r26236
493	516
494	517	/*************************************
495	518	*
496		*  Graphics layouts
	519	*  Sound interfaces
497	520	*
498	521	*************************************/
499	522
	523	int m_sound_intck;
500	524
501		/*************************************
502		*
503		*  Sound interfaces
504		*
505		*************************************/
	525	WRITE_LINE_MEMBER(qdrmfgp_state::k054539_irq1_gen)
	526	{
	527	if (m_control & 1)
	528	{
	529	// Trigger an interrupt on the rising edge
	530	if (!m_sound_intck && state)
	531	m_maincpu->set_input_line(M68K_IRQ_1, ASSERT_LINE);
	532	}
506	533
507		static void sound_irq(device_t *device)
508		{
509		qdrmfgp_state *state = device->machine().driver_data<qdrmfgp_state>();
510		if (state->m_control & 0x0001)
511		state->m_maincpu->set_input_line(1, HOLD_LINE);
	534	m_sound_intck = state;
512	535	}
513	536
514	537	static const k054539_interface k054539_config =
515	538	{
516	539	NULL,
517	540	NULL,
518		sound_irq
519	541	};
520	542
521	543
r26235	r26236
543	565	qdrmfgp2_tile_callback, "none"
544	566	};
545	567
546		WRITE_LINE_MEMBER(qdrmfgp_state::qdrmfgp_irq3_ack_w)
547		{
548		//  m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
549		}
550
551		WRITE_LINE_MEMBER(qdrmfgp_state::qdrmfgp_irq4_ack_w)
552		{
553		//  m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE);
554		}
555
556	568	static const k053252_interface qdrmfgp_k053252_intf =
557	569	{
558	570	DEVCB_NULL,
559	571	DEVCB_NULL,
560		DEVCB_DRIVER_LINE_MEMBER(qdrmfgp_state,qdrmfgp_irq3_ack_w),
561	572	DEVCB_NULL,
	573	DEVCB_NULL,
562	574	40, 16
563	575	};
564	576
r26235	r26236
566	578	{
567	579	DEVCB_NULL,
568	580	DEVCB_NULL,
569		DEVCB_DRIVER_LINE_MEMBER(qdrmfgp_state,qdrmfgp_irq4_ack_w),
570		DEVCB_DRIVER_LINE_MEMBER(qdrmfgp_state,qdrmfgp_irq3_ack_w),
	581	DEVCB_NULL,
	582	DEVCB_NULL,
571	583	40, 16
572	584	};
573	585
r26235	r26236
581	593	MACHINE_START_MEMBER(qdrmfgp_state,qdrmfgp2)
582	594	{
583	595	/* sound irq (CCU? 240Hz) */
584		machine().scheduler().timer_pulse(attotime::from_hz(18432000/76800), timer_expired_delegate(FUNC(qdrmfgp_state::gp2_timer_callback),this));
	596	machine().scheduler().timer_pulse(attotime::from_hz(XTAL_18_432MHz/76800), timer_expired_delegate(FUNC(qdrmfgp_state::gp2_timer_callback),this));
585	597
586	598	MACHINE_START_CALL_MEMBER( qdrmfgp );
587	599	}
r26235	r26236
603	615	static MACHINE_CONFIG_START( qdrmfgp, qdrmfgp_state )
604	616
605	617	/* basic machine hardware */
606		MCFG_CPU_ADD("maincpu", M68000, 32000000/2) /*  16.000 MHz */
	618	MCFG_CPU_ADD("maincpu", M68000, XTAL_32MHz/2) /*  16.000 MHz */
607	619	MCFG_CPU_PROGRAM_MAP(qdrmfgp_map)
608	620	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", qdrmfgp_state, qdrmfgp_interrupt, "screen", 0, 1)
609	621
r26235	r26236
626	638	MCFG_VIDEO_START_OVERRIDE(qdrmfgp_state,qdrmfgp)
627	639
628	640	MCFG_K056832_ADD("k056832", qdrmfgp_k056832_intf)
629		MCFG_K053252_ADD("k053252", 32000000/4, qdrmfgp_k053252_intf)
	641	MCFG_K053252_ADD("k053252", XTAL_32MHz/4, qdrmfgp_k053252_intf)
630	642
631	643	/* sound hardware */
632	644	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
633	645
634		MCFG_K054539_ADD("k054539", 48000, k054539_config)
	646	MCFG_K054539_ADD("k054539", XTAL_18_432MHz, k054539_config)
	647	MCFG_K054539_TIMER_HANDLER(WRITELINE(qdrmfgp_state, k054539_irq1_gen))
635	648	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
636	649	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
637	650	MACHINE_CONFIG_END
r26235	r26236
639	652	static MACHINE_CONFIG_START( qdrmfgp2, qdrmfgp_state )
640	653
641	654	/* basic machine hardware */
642		MCFG_CPU_ADD("maincpu", M68000, 32000000/2) /*  16.000 MHz */
	655	MCFG_CPU_ADD("maincpu", M68000, XTAL_32MHz/2) /*  16.000 MHz */
643	656	MCFG_CPU_PROGRAM_MAP(qdrmfgp2_map)
644	657	MCFG_CPU_VBLANK_INT_DRIVER("screen", qdrmfgp_state,  qdrmfgp2_interrupt)
645	658
r26235	r26236
662	675	MCFG_VIDEO_START_OVERRIDE(qdrmfgp_state,qdrmfgp2)
663	676
664	677	MCFG_K056832_ADD("k056832", qdrmfgp2_k056832_intf)
665		MCFG_K053252_ADD("k053252", 32000000/4, qdrmfgp2_k053252_intf)
	678	MCFG_K053252_ADD("k053252", XTAL_32MHz/4, qdrmfgp2_k053252_intf)
666	679
667	680	/* sound hardware */
668	681	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
669	682
670		MCFG_K054539_ADD("k054539", 48000, k054539_config)
	683	MCFG_K054539_ADD("k054539", XTAL_18_432MHz, k054539_config)
671	684	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
672	685	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
673	686	MACHINE_CONFIG_END

trunk/src/mame/drivers/hornet.c

r26235	r26236
343	343	m_k037122_2(*this, "k037122_2" ),
344	344	m_adc12138(*this, "adc12138") { }
345	345
346		UINT8 m_led_reg0;
347		UINT8 m_led_reg1;
	346	// TODO: Needs verification on real hardware
	347	static const int m_sound_timer_usec = 2800;
	348
348	349	required_shared_ptr<UINT32> m_workram;
349	350	required_shared_ptr<UINT32> m_sharc_dataram0;
350	351	optional_shared_ptr<UINT32> m_sharc_dataram1;
r26235	r26236
358	359	optional_device<k037122_device> m_k037122_1;
359	360	optional_device<k037122_device> m_k037122_2;
360	361	required_device<adc12138_device> m_adc12138;
	362
	363	emu_timer *m_sound_irq_timer;
	364	UINT8 m_led_reg0;
	365	UINT8 m_led_reg1;
361	366	UINT8 *m_jvs_sdata;
362	367	UINT32 m_jvs_sdata_ptr;
363		emu_timer *m_sound_irq_timer;
364	368	UINT16 m_gn680_latch;
365	369	UINT16 m_gn680_ret0;
366	370	UINT16 m_gn680_ret1;
	371
367	372	DECLARE_READ32_MEMBER(hornet_k037122_sram_r);
368	373	DECLARE_WRITE32_MEMBER(hornet_k037122_sram_w);
369	374	DECLARE_READ32_MEMBER(hornet_k037122_char_r);
r26235	r26236
386	391	DECLARE_WRITE32_MEMBER(dsp_dataram1_w);
387	392	DECLARE_WRITE_LINE_MEMBER(voodoo_vblank_0);
388	393	DECLARE_WRITE_LINE_MEMBER(voodoo_vblank_1);
	394	DECLARE_WRITE16_MEMBER(soundtimer_en_w);
	395	DECLARE_WRITE16_MEMBER(soundtimer_count_w);
	396
389	397	DECLARE_DRIVER_INIT(hornet);
390	398	DECLARE_DRIVER_INIT(hornet_2board);
391	399	virtual void machine_start();
r26235	r26236
393	401	DECLARE_MACHINE_RESET(hornet_2board);
394	402	UINT32 screen_update_hornet(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
395	403	UINT32 screen_update_hornet_2board(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
396		TIMER_CALLBACK_MEMBER(irq_off);
	404	TIMER_CALLBACK_MEMBER(sound_irq);
397	405	int jvs_encode_data(UINT8 *in, int length);
398	406	int jvs_decode_data(UINT8 *in, UINT8 *out, int length);
399	407	void jamma_jvs_cmd_exec();
r26235	r26236
646	654	}
647	655	}
648	656
	657	/******************************************************************/
	658
	659	TIMER_CALLBACK_MEMBER(hornet_state::sound_irq)
	660	{
	661	m_audiocpu->set_input_line(M68K_IRQ_1, ASSERT_LINE);
	662	}
	663
	664
	665	WRITE16_MEMBER(hornet_state::soundtimer_en_w)
	666	{
	667	if (data & 1)
	668	{
	669	// Reset and disable timer
	670	m_sound_irq_timer->adjust(attotime::from_usec(m_sound_timer_usec));
	671	m_sound_irq_timer->enable(false);
	672	}
	673	else
	674	{
	675	// Enable timer
	676	m_sound_irq_timer->enable(true);
	677	}
	678	}
	679
	680	WRITE16_MEMBER(hornet_state::soundtimer_count_w)
	681	{
	682	// Reset the count
	683	m_sound_irq_timer->adjust(attotime::from_usec(m_sound_timer_usec));
	684	m_audiocpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
	685	}
	686
649	687	/*****************************************************************************/
650	688
651	689	static ADDRESS_MAP_START( hornet_map, AS_PROGRAM, 32, hornet_state )
r26235	r26236
659	697	AM_RANGE(0x7d000000, 0x7d00ffff) AM_READ8(sysreg_r, 0xffffffff)
660	698	AM_RANGE(0x7d010000, 0x7d01ffff) AM_WRITE8(sysreg_w, 0xffffffff)
661	699	AM_RANGE(0x7d020000, 0x7d021fff) AM_DEVREADWRITE8("m48t58", timekeeper_device, read, write, 0xffffffff)  /* M48T58Y RTC/NVRAM */
662		AM_RANGE(0x7d030000, 0x7d030007) AM_DEVREADWRITE("k056800", k056800_device, host_r, host_w)
	700	AM_RANGE(0x7d030000, 0x7d03000f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
663	701	AM_RANGE(0x7d042000, 0x7d043fff) AM_RAM             /* COMM BOARD 0 */
664	702	AM_RANGE(0x7d044000, 0x7d044007) AM_READ(comm0_unk_r)
665	703	AM_RANGE(0x7d048000, 0x7d048003) AM_WRITE(comm1_w)
r26235	r26236
676	714	AM_RANGE(0x000000, 0x07ffff) AM_ROM
677	715	AM_RANGE(0x100000, 0x10ffff) AM_RAM     /* Work RAM */
678	716	AM_RANGE(0x200000, 0x200fff) AM_DEVREADWRITE("rfsnd", rf5c400_device, rf5c400_r, rf5c400_w)      /* Ricoh RF5C400 */
679		AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("k056800", k056800_device, sound_r, sound_w)
	717	AM_RANGE(0x300000, 0x30001f) AM_DEVREADWRITE8("k056800", k056800_device, sound_r, sound_w, 0x00ff)
680	718	AM_RANGE(0x480000, 0x480001) AM_WRITENOP
681	719	AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP
682		AM_RANGE(0x500000, 0x500001) AM_WRITENOP
683		AM_RANGE(0x600000, 0x600001) AM_NOP
	720	AM_RANGE(0x500000, 0x500001) AM_WRITE(soundtimer_en_w) AM_READNOP
	721	AM_RANGE(0x600000, 0x600001) AM_WRITE(soundtimer_count_w) AM_READNOP
684	722	ADDRESS_MAP_END
685	723
686	724	/*****************************************************************************/
r26235	r26236
879	917	save_pointer(NAME(m_jvs_sdata), 1024);
880	918	save_item(NAME(m_jvs_sdata_ptr));
881	919
882		m_sound_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hornet_state::irq_off),this));
	920	m_sound_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hornet_state::sound_irq), this));
883	921	}
884	922
885	923	void hornet_state::machine_reset()
r26235	r26236
914	952	adc12138_input_callback
915	953	};
916	954
917		TIMER_CALLBACK_MEMBER(hornet_state::irq_off)
918		{
919		m_audiocpu->set_input_line(param, CLEAR_LINE);
920		}
921
922		static void sound_irq_callback( running_machine &machine, int irq )
923		{
924		hornet_state *state = machine.driver_data<hornet_state>();
925		int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
926
927		state->m_audiocpu->set_input_line(line, ASSERT_LINE);
928		state->m_sound_irq_timer->adjust(attotime::from_usec(5), line);
929		}
930
931		static const k056800_interface hornet_k056800_interface =
932		{
933		sound_irq_callback
934		};
935
936	955	static const k033906_interface hornet_k033906_intf_0 =
937	956	{
938	957	"voodoo0"
r26235	r26236
988	1007
989	1008	MCFG_K037122_ADD("k037122_1", "screen", 0)
990	1009
991		MCFG_K056800_ADD("k056800", hornet_k056800_interface, XTAL_64MHz/4)
	1010	MCFG_K056800_ADD("k056800", XTAL_16_9344MHz)
	1011	MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_2))
992	1012
993	1013	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
994	1014

trunk/src/mame/drivers/plygonet.c

r26235	r26236
90	90	D25 = EEPROM CS
91	91	D24 = EEPROM DATA
92	92	*/
93		m_eeprom->di_write(data & 1);
94		m_eeprom->cs_write((data & 2) ? ASSERT_LINE : CLEAR_LINE);
95		m_eeprom->clk_write((data & 4) ? ASSERT_LINE : CLEAR_LINE);
	93	ioport("EEPROMOUT")->write(data, 0xffff);
96	94
97	95	m_sys0 = data;
98	96	break;
r26235	r26236
187	185
188	186	WRITE32_MEMBER(polygonet_state::sound_irq_w)
189	187	{
190		m_audiocpu->set_input_line(0, HOLD_LINE); // where is ack?
	188	// Auto-acknowledged interrupt
	189	m_audiocpu->set_input_line(0, HOLD_LINE);
191	190	}
192	191
193	192	/* DSP communications */
r26235	r26236
543	542	/**********************************************************************************/
544	543
545	544
546		WRITE8_MEMBER(polygonet_state::sound_bankswitch_w)
	545	WRITE8_MEMBER(polygonet_state::sound_ctrl_w)
547	546	{
548		// d0-d2: bank
549		// higher bits: ? (only used in plygonet)
550		if ((m_sound_bank & 7) != (data & 7))
	547	// .... .xxx - Sound bank
	548	// ...x .... - NMI clear (clocked?)
	549
	550	if ((m_sound_ctrl & 7) != (data & 7))
551	551	membank("bank1")->set_entry(data & 7);
552	552
553		m_sound_bank = data;
	553	// This behaves differently to the other games of this era
	554	if (!(m_sound_ctrl & 0x10) && (data & 0x10))
	555	m_audiocpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
	556
	557	m_sound_ctrl = data;
554	558	}
555	559
556	560
r26235	r26236
561	565	AM_RANGE(0xc000, 0xdfff) AM_RAM
562	566	AM_RANGE(0xe000, 0xe22f) AM_DEVREADWRITE("k054539_1", k054539_device, read, write)
563	567	AM_RANGE(0xe230, 0xe3ff) AM_RAM
564		AM_RANGE(0xe400, 0xe62f) AM_DEVREADWRITE("k054539_2", k054539_device, read, write)
	568	AM_RANGE(0xe400, 0xe62f) AM_READNOP AM_WRITENOP // Second 054539 (not present)
565	569	AM_RANGE(0xe630, 0xe7ff) AM_RAM
566	570	AM_RANGE(0xf000, 0xf000) AM_WRITE(soundlatch_byte_w)
567	571	AM_RANGE(0xf002, 0xf002) AM_READ(soundlatch2_byte_r)
568	572	AM_RANGE(0xf003, 0xf003) AM_READ(soundlatch3_byte_r)
569		AM_RANGE(0xf800, 0xf800) AM_WRITE(sound_bankswitch_w)
	573	AM_RANGE(0xf800, 0xf800) AM_WRITE(sound_ctrl_w)
570	574	ADDRESS_MAP_END
571	575
572	576
573		static void sound_nmi( device_t *device )
574		{
575		polygonet_state *state = device->machine().driver_data<polygonet_state>();
576		state->m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); // where is ack?
577		}
578
579
580	577	static const k054539_interface k054539_config =
581	578	{
582	579	"shared",
583	580	NULL,
584		sound_nmi
585	581	};
586	582
587	583	/**********************************************************************************/
r26235	r26236
607	603	void polygonet_state::machine_reset()
608	604	{
609	605	membank("bank1")->set_entry(0);
610		m_sound_bank = 0;
611	606
612	607	m_sys0 = 0;
613	608	m_sys1 = 0;
	609	m_sound_intck = 0;
	610	m_sound_ctrl = 0;
614	611
615	612	/* It's presumed the hardware has hard-wired operating mode 1 (MODA = 1, MODB = 0) */
616	613	m_dsp->set_input_line(DSP56K_IRQ_RESET, ASSERT_LINE);
r26235	r26236
633	630	save_item(NAME(m_dsp56k_bank04_ram));
634	631	save_item(NAME(m_sys0));
635	632	save_item(NAME(m_sys1));
636		save_item(NAME(m_sound_bank));
	633	save_item(NAME(m_sound_ctrl));
	634	save_item(NAME(m_sound_intck));
637	635	}
638	636
	637	WRITE_LINE_MEMBER(polygonet_state::k054539_nmi_gen)
	638	{
	639	// Trigger interrupt on rising clock edge
	640	if (!m_sound_intck && state)
	641	m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
	642
	643	m_sound_intck = state;
	644	}
	645
	646
639	647	static const k053936_interface polygonet_k053936_intf =
640	648	{
641	649	0, 0, 0 /* wrap, xoff, yoff */
r26235	r26236
656	664
657	665	MCFG_QUANTUM_PERFECT_CPU("maincpu") /* TODO: TEMPORARY!  UNTIL A MORE LOCALIZED SYNC CAN BE MADE */
658	666
659		MCFG_EEPROM_SERIAL_93C66_8BIT_ADD("eeprom")
	667	MCFG_EEPROM_SERIAL_ER5911_8BIT_ADD("eeprom")
660	668
661	669	MCFG_GFXDECODE(plygonet)
662	670
r26235	r26236
675	683	/* sound hardware */
676	684	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
677	685
678		MCFG_K054539_ADD("k054539_1", 48000, k054539_config)
	686	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
	687	MCFG_K054539_TIMER_HANDLER(WRITELINE(polygonet_state, k054539_nmi_gen))
679	688	MCFG_SOUND_ROUTE(0, "lspeaker", 0.75)
680	689	MCFG_SOUND_ROUTE(1, "rspeaker", 0.75)
681
682		MCFG_K054539_ADD("k054539_2", 48000, k054539_config)
683		MCFG_SOUND_ROUTE(0, "lspeaker", 0.75)
684		MCFG_SOUND_ROUTE(1, "rspeaker", 0.75)
685	690	MACHINE_CONFIG_END
686	691
687	692
r26235	r26236
711	716	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
712	717
713	718	PORT_START("IN2")
714		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, do_read)
715		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
	719	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, do_read)
	720	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, ready_read)
716	721	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 )
717	722	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) // Start 2, unused
718	723	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
r26235	r26236
729	734	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
730	735	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
731	736	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	737
	738	PORT_START( "EEPROMOUT" )
	739	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, di_write)
	740	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, cs_write)
	741	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, clk_write)
732	742	INPUT_PORTS_END
733	743
734	744	static INPUT_PORTS_START( polynetw )
r26235	r26236
781	791	ROM_REGION( 0x200000, "shared", 0 ) /* sound data */
782	792	ROM_LOAD( "305b08.2e", 0x000000, 0x200000, CRC(874607df) SHA1(763b44a80abfbc355bcb9be8bf44373254976019) )
783	793
784		ROM_REGION16_BE( 0x200, "eeprom", ROMREGION_ERASEFF )
	794	ROM_REGION( 0x80, "eeprom", ROMREGION_ERASEFF )
785	795	ROM_LOAD( "plygonet.nv", 0x0000, 0x0080, CRC(627748ac) SHA1(ea1b06739fee235b049ff8daffff7d43cb093112) )
786	796	ROM_END
787	797
r26235	r26236
805	815	ROM_LOAD( "305a08.2e", 0x000000, 0x200000, CRC(7ddb8a52) SHA1(3199b347fc433ffe0de8521001df77672d40771e) )
806	816	ROM_LOAD( "305a09.3e", 0x200000, 0x200000, CRC(6da1be58) SHA1(d63ac16ac551193ff8a6036724fb59e1d702e06b) )
807	817
808		ROM_REGION16_BE( 0x200, "eeprom", ROMREGION_ERASEFF )
	818	ROM_REGION( 0x80, "eeprom", ROMREGION_ERASEFF )
809	819	ROM_LOAD( "polynetw.nv", 0x0000, 0x0080, CRC(8f39d644) SHA1(8733e1a288ba20c4b04b3aedde52801d05cebdf9) )
810	820	ROM_END
811	821

trunk/src/mame/includes/rungun.h

r26235	r26236
14	14	public:
15	15	rungun_state(const machine_config &mconfig, device_type type, const char *tag)
16	16	: driver_device(mconfig, type, tag),
17		m_sysreg(*this, "sysreg"),
18		m_936_videoram(*this, "936_videoram"),
19	17	m_maincpu(*this, "maincpu"),
20	18	m_soundcpu(*this, "soundcpu"),
21	19	m_k054539_1(*this, "k054539_1"),
22	20	m_k054539_2(*this, "k054539_2"),
23	21	m_k053936(*this, "k053936"),
24	22	m_k055673(*this, "k055673"),
25		m_k053252(*this, "k053252") { }
	23	m_k053252(*this, "k053252"),
	24	m_sysreg(*this, "sysreg"),
	25	m_936_videoram(*this, "936_videoram") { }
26	26
	27	/* devices */
	28	required_device<cpu_device> m_maincpu;
	29	required_device<cpu_device> m_soundcpu;
	30	required_device<k054539_device> m_k054539_1;
	31	required_device<k054539_device> m_k054539_2;
	32	required_device<k053936_device> m_k053936;
	33	required_device<k055673_device> m_k055673;
	34	required_device<k053252_device> m_k053252;
	35
27	36	/* memory pointers */
28	37	required_shared_ptr<UINT16> m_sysreg;
29	38	required_shared_ptr<UINT16> m_936_videoram;
r26235	r26236
36	45	int         m_ttl_gfx_index;
37	46	int         m_sprite_colorbase;
38	47
39		/* misc */
40		int         m_z80_control;
41		int         m_sound_status;
	48	/* sound */
	49	UINT8      m_sound_ctrl;
	50	UINT8      m_sound_status;
	51	UINT8      m_sound_nmi_clk;
42	52
43		/* devices */
44		required_device<cpu_device> m_maincpu;
45		required_device<cpu_device> m_soundcpu;
46		required_device<k054539_device> m_k054539_1;
47		required_device<k054539_device> m_k054539_2;
48		required_device<k053936_device> m_k053936;
49		required_device<k055673_device> m_k055673;
50		required_device<k053252_device> m_k053252;
51	53	DECLARE_READ16_MEMBER(rng_sysregs_r);
52	54	DECLARE_WRITE16_MEMBER(rng_sysregs_w);
53	55	DECLARE_WRITE16_MEMBER(sound_cmd1_w);
r26235	r26236
55	57	DECLARE_WRITE16_MEMBER(sound_irq_w);
56	58	DECLARE_READ16_MEMBER(sound_status_msb_r);
57	59	DECLARE_WRITE8_MEMBER(sound_status_w);
58		DECLARE_WRITE8_MEMBER(z80ctrl_w);
	60	DECLARE_WRITE8_MEMBER(sound_ctrl_w);
59	61	DECLARE_READ16_MEMBER(rng_ttl_ram_r);
60	62	DECLARE_WRITE16_MEMBER(rng_ttl_ram_w);
61	63	DECLARE_WRITE16_MEMBER(rng_936_videoram_w);
62	64	TILE_GET_INFO_MEMBER(ttl_get_tile_info);
63	65	TILE_GET_INFO_MEMBER(get_rng_936_tile_info);
	66	DECLARE_WRITE_LINE_MEMBER(k054539_nmi_gen);
	67
64	68	virtual void machine_start();
65	69	virtual void machine_reset();
66	70	virtual void video_start();

trunk/src/mame/includes/qdrmfgp.h

r26235	r26236
15	15	m_k056832(*this, "k056832"),
16	16	m_k054539(*this, "k054539"),
17	17	m_k053252(*this, "k053252"),
18		m_ata(*this, "ata")
	18	m_ata(*this, "ata"),
	19	m_inputs_port(*this, "INPUTS"),
	20	m_dsw_port(*this, "DSW")
19	21	{
20	22	}
21	23
22	24	required_device<cpu_device> m_maincpu;
23	25	required_shared_ptr<UINT16> m_nvram;
24		UINT8 *m_sndram;
25	26	required_shared_ptr<UINT16> m_workram;
26	27	required_device<k056832_device> m_k056832;
27	28	required_device<k054539_device> m_k054539;
28	29	required_device<k053252_device> m_k053252;
29	30	required_device<ata_interface_device> m_ata;
	31	required_ioport m_inputs_port;
	32	required_ioport m_dsw_port;
	33
	34	UINT8 *m_sndram;
30	35	UINT16 m_control;
31	36	INT32 m_gp2_irq_control;
32	37	INT32 m_pal;
	38
33	39	DECLARE_WRITE16_MEMBER(gp_control_w);
34	40	DECLARE_WRITE16_MEMBER(gp2_control_w);
35	41	DECLARE_READ16_MEMBER(v_rom_r);
r26235	r26236
40	46	DECLARE_READ16_MEMBER(sndram_r);
41	47	DECLARE_WRITE16_MEMBER(sndram_w);
42	48	DECLARE_READ16_MEMBER(gp2_ide_std_r);
43		DECLARE_CUSTOM_INPUT_MEMBER(inputs_r);
	49	DECLARE_READ16_MEMBER(inputs_r);
44	50	DECLARE_CUSTOM_INPUT_MEMBER(battery_sensor_r);
45		DECLARE_WRITE_LINE_MEMBER(qdrmfgp_irq3_ack_w);
46		DECLARE_WRITE_LINE_MEMBER(qdrmfgp_irq4_ack_w);
	51
47	52	virtual void machine_reset();
	53
48	54	DECLARE_MACHINE_START(qdrmfgp);
49	55	DECLARE_VIDEO_START(qdrmfgp);
50	56	DECLARE_MACHINE_START(qdrmfgp2);
r26235	r26236
55	61	TIMER_DEVICE_CALLBACK_MEMBER(qdrmfgp_interrupt);
56	62	DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
57	63	DECLARE_WRITE_LINE_MEMBER(gp2_ide_interrupt);
	64	DECLARE_WRITE_LINE_MEMBER(k054539_irq1_gen);
58	65	};
59	66
60	67	/*----------- defined in video/qdrmfgp.c -----------*/

trunk/src/mame/includes/plygonet.h

r26235	r26236
26	26	required_device<cpu_device> m_maincpu;
27	27	required_device<cpu_device> m_audiocpu;
28	28	required_device<cpu_device> m_dsp;
29		required_device<eeprom_serial_93cxx_device> m_eeprom;
	29	required_device<eeprom_serial_er5911_device> m_eeprom;
30	30	required_device<k053936_device> m_k053936;
31	31
32	32	/* 68k-side shared ram */
r26235	r26236
37	37	ioport_port *m_inputs[4];
38	38	UINT8 m_sys0;
39	39	UINT8 m_sys1;
40		UINT8 m_sound_bank;
41	40
42	41	direct_update_delegate m_dsp56k_update_handler;
43	42
r26235	r26236
47	46	tilemap_t *m_roz_tilemap;
48	47	UINT16 m_ttl_vram[0x800];
49	48	UINT16 m_roz_vram[0x800];
	49
	50	/* sound */
	51	UINT8 m_sound_ctrl;
	52	UINT8 m_sound_intck;
50	53
51	54	/* memory buffers */
52	55	UINT16 m_dsp56k_bank00_ram[2 * 8 * dsp56k_bank00_size]; /* 2 bank sets, 8 potential banks each */
r26235	r26236
77	80	DECLARE_WRITE16_MEMBER(dsp56k_shared_ram_write);
78	81	DECLARE_READ16_MEMBER(dsp56k_ram_bank04_read);
79	82	DECLARE_WRITE16_MEMBER(dsp56k_ram_bank04_write);
80		DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
	83	DECLARE_WRITE8_MEMBER(sound_ctrl_w);
81	84	DECLARE_READ32_MEMBER(polygonet_ttl_ram_r);
82	85	DECLARE_WRITE32_MEMBER(polygonet_ttl_ram_w);
83	86	DECLARE_READ32_MEMBER(polygonet_roz_ram_r);
r26235	r26236
93	96	virtual void video_start();
94	97	UINT32 screen_update_polygonet(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
95	98	INTERRUPT_GEN_MEMBER(polygonet_interrupt);
	99	DECLARE_WRITE_LINE_MEMBER(k054539_nmi_gen);
96	100	};

trunk/src/mame/includes/mystwarr.h

r26235	r26236
23	23	required_device<k055673_device> m_k055673;
24	24	required_shared_ptr<UINT16> m_gx_workram;
25	25	optional_shared_ptr<UINT16> m_spriteram;
	26
26	27	UINT8 m_mw_irq_control;
27	28	int m_cur_sound_region;
28	29	int m_layer_colorbase[6];
r26235	r26236
37	38	tilemap_t *m_ult_936_tilemap;
38	39	UINT16 m_clip;
39	40
	41	UINT8 m_sound_ctrl;
	42	UINT8 m_sound_nmi_clk;
	43
40	44	DECLARE_READ16_MEMBER(eeprom_r);
41	45	DECLARE_WRITE16_MEMBER(mweeprom_w);
42	46	DECLARE_READ16_MEMBER(dddeeprom_r);
r26235	r26236
55	59	DECLARE_WRITE16_MEMBER(k053247_martchmp_word_w);
56	60	DECLARE_READ16_MEMBER(mccontrol_r);
57	61	DECLARE_WRITE16_MEMBER(mccontrol_w);
58		DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
	62	DECLARE_WRITE8_MEMBER(sound_ctrl_w);
59	63
60	64	DECLARE_WRITE16_MEMBER(ddd_053936_enable_w);
61	65	DECLARE_WRITE16_MEMBER(ddd_053936_clip_w);
r26235	r26236
84	88	UINT32 screen_update_dadandrn(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
85	89	UINT32 screen_update_martchmp(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
86	90	INTERRUPT_GEN_MEMBER(ddd_interrupt);
	91	DECLARE_WRITE_LINE_MEMBER(k054539_nmi_gen);
87	92	TIMER_DEVICE_CALLBACK_MEMBER(mystwarr_interrupt);
88	93	TIMER_DEVICE_CALLBACK_MEMBER(metamrph_interrupt);
89	94	TIMER_DEVICE_CALLBACK_MEMBER(mchamp_interrupt);

trunk/src/mame/includes/konamigx.h

r26235	r26236
	1	#include "sound/k056800.h"
1	2	#include "sound/k054539.h"
2	3	#include "cpu/tms57002/tms57002.h"
3	4	#include "video/k054156_k054157_k056832.h"
r26235	r26236
12	13	konamigx_state(const machine_config &mconfig, device_type type, const char *tag)
13	14	: driver_device(mconfig, type, tag),
14	15	m_maincpu(*this,"maincpu"),
	16	m_soundcpu(*this, "soundcpu"),
	17	m_dasp(*this, "dasp"),
15	18	m_workram(*this,"workram"),
16	19	m_psacram(*this,"psacram"),
17	20	m_subpaletteram32(*this,"subpaletteram"),
r26235	r26236
23	26	m_k053936_0_ctrl_16(*this,"k053936_0_ct16",16),
24	27	m_k053936_0_linectrl_16(*this,"k053936_0_li16",16),
25	28	m_konamigx_type3_psac2_bank(*this,"psac2_bank"),
	29	m_k056800(*this, "k056800"),
26	30	m_k054539_1(*this,"k054539_1"),
27		m_k054539_2(*this,"k054539_2"),
28		m_soundcpu(*this, "soundcpu"),
29		m_dasp(*this, "dasp")
	31	m_k054539_2(*this,"k054539_2")
30	32	{ }
31	33
32	34	required_device<cpu_device> m_maincpu;
	35	optional_device<cpu_device> m_soundcpu;
	36	optional_device<tms57002_device> m_dasp;
	37
33	38	optional_shared_ptr<UINT32> m_workram;
34	39	optional_shared_ptr<UINT32> m_psacram;
35	40	optional_shared_ptr<UINT32> m_subpaletteram32;
r26235	r26236
41	46	optional_shared_ptr<UINT16> m_k053936_0_ctrl_16;
42	47	optional_shared_ptr<UINT16> m_k053936_0_linectrl_16;
43	48	optional_shared_ptr<UINT32> m_konamigx_type3_psac2_bank;
	49	optional_device<k056800_device> m_k056800;
44	50	optional_device<k054539_device> m_k054539_1;
45	51	optional_device<k054539_device> m_k054539_2;
	52
46	53	DECLARE_WRITE32_MEMBER(esc_w);
47	54	DECLARE_WRITE32_MEMBER(eeprom_w);
48	55	DECLARE_WRITE32_MEMBER(control_w);
r26235	r26236
60	67	DECLARE_READ32_MEMBER(type3_sync_r);
61	68	DECLARE_WRITE32_MEMBER(type4_prot_w);
62	69	DECLARE_WRITE32_MEMBER(type1_cablamps_w);
63		DECLARE_READ16_MEMBER(sndcomm68k_r);
64		DECLARE_WRITE16_MEMBER(sndcomm68k_w);
65	70	DECLARE_READ16_MEMBER(tms57002_data_word_r);
66	71	DECLARE_WRITE16_MEMBER(tms57002_data_word_w);
67	72	DECLARE_READ16_MEMBER(tms57002_status_word_r);
r26235	r26236
104	109	UINT32 screen_update_konamigx_right(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
105	110	INTERRUPT_GEN_MEMBER(konamigx_vbinterrupt);
106	111	INTERRUPT_GEN_MEMBER(tms_sync);
	112	DECLARE_WRITE_LINE_MEMBER(k054539_irq_gen);
107	113	TIMER_CALLBACK_MEMBER(dmaend_callback);
	114	TIMER_CALLBACK_MEMBER(boothack_callback);
108	115	TIMER_DEVICE_CALLBACK_MEMBER(konamigx_hbinterrupt);
109		optional_device<cpu_device> m_soundcpu;
110		optional_device<tms57002_device> m_dasp;
111	116
112	117	void _gxcommoninitnosprites(running_machine &machine);
113	118	void _gxcommoninit(running_machine &machine);
r26235	r26236
135	140	void konamigx_mixer_init(screen_device &screen, int objdma);
136	141	void konamigx_objdma(void);
137	142
138
	143	UINT8 m_sound_ctrl;
	144	UINT8 m_sound_intck;
139	145	};
140	146
141	147
r26235	r26236
198	204	void konamigx_mixer_init(screen_device &screen, int objdma);
199	205	void konamigx_mixer_primode(int mode);
200	206
201
202
203
204
205	207	extern int konamigx_current_frame;
206	208
207	209

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