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r26198 Saturday 16th November, 2013 at 16:22:21 UTC by Jürgen Buchmüller
Get rid of home grown memory mapped i/o handling

[/branches/alto2/src/emu/cpu/alto2]	a2disk.c a2hw.c a2kbd.c a2mem.c alto2.c alto2.h alto2dsm.c
[/branches/alto2/src/emu/machine]	diablo_hd.c

branches/alto2/src/emu/machine/diablo_hd.c

r26197	r26198
139	139
140	140	void diablo_hd_device::set_sector_callback(void *cookie, void (*callback)(void *, int))
141	141	{
	142	if (m_sector_callback_cookie == cookie && m_sector_callback == callback)
	143	return;
142	144	LOG_DRIVE((0,"[DHD] %s cookie=%p callback=%p\n", __FUNCTION__, cookie, callback));
143	145	m_sector_callback_cookie = cookie;
144	146	m_sector_callback = callback;
r26197	r26198
982	984	}
983	985
984	986	if (m_image) {
985		/* it is ready */
986		m_ready_0 = 0;
987		/* and can take seek/read/write commands */
988		m_s_r_w_0 = 0;
989		/* address acknowledge (?) */
990		m_addx_acknowledge_0 = 0;
991		/* clear log address interlock (?) */
992		m_log_addx_interlock_0 = 1;
	987	m_ready_0 = 0;               // it is ready
	988	m_s_r_w_0 = 0;               // and can take seek/read/write commands
	989	m_addx_acknowledge_0 = 0;      // assert address acknowledge (?)
	990	m_log_addx_interlock_0 = 1;      // deassert log address interlock (?)
993	991	LOG_DRIVE((1,"[DHD]   %s: UNIT select %d ready\n", __FUNCTION__, unit));
994	992	} else {
995		/* it is not ready (?) */
996		m_ready_0 = 1;
997		/* can't take seek/read/write commands (?) */
998		m_s_r_w_0 = 1;
999		/* address acknowledge (?) */
1000		m_addx_acknowledge_0 = 0;
	993	m_ready_0 = 1;               // it is not ready (?)
	994	m_s_r_w_0 = 1;               // can't take seek/read/write commands (?)
	995	m_addx_acknowledge_0 = 0;      // assert address acknowledge (?)
	996	m_log_addx_interlock_0 = 1;      // deassert log address interlock (?)
1001	997	LOG_DRIVE((1,"[DHD]   %s: UNIT select %d not ready (no image)\n", __FUNCTION__, unit));
1002	998	}
1003	999	read_sector();

branches/alto2/src/emu/cpu/alto2/alto2.c

r26197	r26198
32	32
33	33	DEVICE_ADDRESS_MAP_START( iomem_map, 16, alto2_cpu_device )
34	34	AM_RANGE(0,                          ALTO2_IO_PAGE_BASE - 1)            AM_READWRITE( ioram_r, ioram_w )
35		AM_RANGE(ALTO2_IO_PAGE_BASE,         0177777)                           AM_READWRITE( mmio_r,  mmio_w  )
36		AM_RANGE(0200000,                    0200000+ALTO2_IO_PAGE_BASE - 1)    AM_READWRITE( ioram_r, ioram_w )
37		AM_RANGE(0200000+ALTO2_IO_PAGE_BASE, 0377777)                           AM_READWRITE( mmio_r,  mmio_w  )
	35	AM_RANGE(ALTO2_IO_PAGE_BASE,         0177777)                           AM_NOP
	36	AM_RANGE(0177016,                    0177016)                           AM_READWRITE( utilout_r, utilout_w )
	37	AM_RANGE(0177020,                    0177023)                           AM_READWRITE( xbus_r,  xbus_w )
	38	AM_RANGE(0177024,                    0177024)                           AM_READ     ( mear_r )
	39	AM_RANGE(0177025,                    0177025)                           AM_READWRITE( mesr_r,  mesr_w  )
	40	AM_RANGE(0177026,                    0177026)                           AM_READWRITE( mecr_r,  mecr_w  )
	41	AM_RANGE(0177030,                    0177033)                           AM_READ     ( utilin_r )
	42	AM_RANGE(0177034,                    0177037)                           AM_READ     ( kbd_ad_r )
	43	AM_RANGE(0177040,                    0177057)                           AM_READWRITE( bank_reg_r, bank_reg_w )
	44	AM_RANGE(0200000,                    0377777)                           AM_READWRITE( ioram_r, ioram_w )
38	45	ADDRESS_MAP_END
39	46
40	47	//-------------------------------------------------
r26197	r26198
44	51	alto2_cpu_device::alto2_cpu_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock) :
45	52	cpu_device(mconfig, ALTO2, "Xerox Alto-II", tag, owner, clock, "alto2", __FILE__),
46	53	#if   ALTO2_DEBUG
47		m_log_types(LOG_CPU|LOG_DISK|LOG_KSEC|LOG_KWD),
	54	m_log_types(LOG_DISK|LOG_KSEC|LOG_KWD|LOG_KBD),
48	55	m_log_level(6),
49	56	m_log_newline(true),
50	57	#endif
r26197	r26198
120	127	m_disp_a63(0),
121	128	m_disp_a66(0),
122	129	m_mem(),
123		mmio_read_fn(),
124		mmio_write_fn(),
125	130	m_emu(),
126	131	m_ether_a41(0),
127	132	m_ether_a42(0),
r26197	r26198
1220	1225	PUT_EVEN(m_mem.ram[dword_addr], data);
1221	1226	}
1222	1227
1223		//! read memory mapped i/o
1224		READ16_MEMBER ( alto2_cpu_device::mmio_r )
1225		{
1226		if (mmio_read_fn[offset])
1227		return ((*this).*mmio_read_fn[offset])(offset);
1228		return 0177777;
1229		}
1230
1231		//! write memory mapped i/o
1232		WRITE16_MEMBER( alto2_cpu_device::mmio_w )
1233		{
1234		if (mmio_write_fn[offset])
1235		return ((*this).*mmio_write_fn[offset])(offset, data);
1236		}
1237
1238	1228	//-------------------------------------------------
1239	1229	//  device_reset - device-specific reset
1240	1230	//-------------------------------------------------
r26197	r26198
1514	1504	*
1515	1505	* The bank registers are stored in a 16x4-bit RAM 74S189.
1516	1506	*/
1517		UINT16 alto2_cpu_device::bank_reg_r(UINT32 address)
	1507	READ16_MEMBER( alto2_cpu_device::bank_reg_r )
1518	1508	{
1519		int task = address & 017;
	1509	int task = offset & 017;
1520	1510	int bank = m_bank_reg[task] | 0177760;
1521	1511	return bank;
1522	1512	}
r26197	r26198
1526	1516	*
1527	1517	* The bank registers are stored in a 16x4-bit RAM 74S189.
1528	1518	*/
1529		void alto2_cpu_device::bank_reg_w(UINT32 address, UINT16 data)
	1519	WRITE16_MEMBER( alto2_cpu_device::bank_reg_w )
1530	1520	{
1531		int task = address & 017;
	1521	int task = offset & 017;
1532	1522	m_bank_reg[task] = data & 017;
1533	1523	LOG((LOG_CPU,0,"   write bank[%02o]=%#o normal:%o extended:%o (%s)\n",
1534	1524	task, data,
r26197	r26198
3067	3057	set_f2(task, f2_task_17,      &alto2_cpu_device::fn_f2_bad_0,   &alto2_cpu_device::fn_f2_bad_1);   // f2_task_10 to f2_task_17 are task specific
3068	3058	}
3069	3059
	3060	init_memory();
3070	3061	init_disk();
3071	3062	init_disp();
3072		init_memory();
3073		init_hardware();
3074	3063	init_kbd();
	3064	init_hw();
3075	3065
3076	3066	init_emu(task_emu);
3077		init_001(task_1);
3078		init_002(task_2);
3079		init_003(task_3);
3080	3067	init_ksec(task_ksec);
3081		init_005(task_5);
3082		init_006(task_6);
3083	3068	init_ether(task_ether);
3084	3069	init_mrt(task_mrt);
3085	3070	init_dwt(task_dwt);
r26197	r26198
3088	3073	init_dvt(task_dvt);
3089	3074	init_part(task_part);
3090	3075	init_kwd(task_kwd);
3091		init_017(task_17);
3092	3076
3093		install_mmio_fn(0177740, 0177757, &alto2_cpu_device::bank_reg_r, &alto2_cpu_device::bank_reg_w);
3094
3095	3077	m_dsp_time = 0;         // reset the display state machine values
3096	3078	m_dsp_state = 020;
3097	3079
r26197	r26198
3117	3099
3118	3100	return m_next_task;      // return next task (?)
3119	3101	}
3120
3121		void alto2_cpu_device::init_001(int task)
3122		{
3123
3124		}
3125
3126		void alto2_cpu_device::init_002(int task)
3127		{
3128
3129		}
3130
3131		void alto2_cpu_device::init_003(int task)
3132		{
3133
3134		}
3135
3136		void alto2_cpu_device::init_005(int task)
3137		{
3138
3139		}
3140
3141		void alto2_cpu_device::init_006(int task)
3142		{
3143
3144		}
3145
3146		void alto2_cpu_device::init_017(int task)
3147		{
3148
3149		}

branches/alto2/src/emu/cpu/alto2/a2kbd.c

r26197	r26198
15	15	* @param addr memory mapped I/O address to be read
16	16	* @return keyboard matrix value for address modulo 4
17	17	*/
18		UINT16 alto2_cpu_device::kbd_ad_r(UINT32 addr)
	18	READ16_MEMBER( alto2_cpu_device::kbd_ad_r )
19	19	{
20	20	UINT16 data = 0177777;
21		switch (addr & 3) {
	21	switch (offset & 3) {
22	22	case 0:
23	23	data = machine().root_device().ioport("ROW0")->read();
24	24	break;
r26197	r26198
32	32	data = machine().root_device().ioport("ROW3")->read();
33	33	break;
34	34	}
35		m_kbd.matrix[addr & 03] = data;
36		LOG((LOG_KBD,2,"   read KBDAD+%o (%#o)\n", addr & 3, data));
37		if (0 == (addr & 3) && (m_kbd.bootkey != 0177777)) {
	35	m_kbd.matrix[offset & 03] = data;
	36	LOG((LOG_KBD,2,"   read KBDAD+%o (%#o)\n", offset & 3, data));
	37	if (0 == (offset & 3) && (m_kbd.bootkey != 0177777)) {
38	38	LOG((0,2,"   boot keys (%#o & %#o)\n", data, m_kbd.bootkey));
39	39	data &= m_kbd.bootkey;
40	40	m_kbd.bootkey = 0177777;
r26197	r26198
49	49	m_kbd.matrix[1] = 0177777;
50	50	m_kbd.matrix[2] = 0177777;
51	51	m_kbd.matrix[3] = 0177777;
52		// install memory handler
53		install_mmio_fn(0177034, 0177037, &alto2_cpu_device::kbd_ad_r, 0);
54	52	}
55	53

branches/alto2/src/emu/cpu/alto2/alto2dsm.c

r26197	r26198
245	245	switch (aluf) {
246	246	case  0: // T?: BUS
247	247	// this is somehow redundant and just wasting space
248		// dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS) ");
	248	dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(BUS) ");
249	249	break;
250	250	case  1: //   : T
251	251	dst += snprintf(dst, len - (size_t)(dst - buffer), "ALUF(T) ");

branches/alto2/src/emu/cpu/alto2/alto2.h

r26197	r26198
1080	1080	void fn_f2_bad_0();                        //! f2 dummy early function
1081	1081	void fn_f2_bad_1();                        //! f2 dummy late function
1082	1082
1083		UINT16 bank_reg_r(UINT32 address);            //!< read bank register in memory mapped I/O range
1084		void bank_reg_w(UINT32 address, UINT16 data);   //!< write bank register in memory mapped I/O range
	1083	DECLARE_READ16_MEMBER( bank_reg_r );         //!< read bank register in memory mapped I/O range
	1084	DECLARE_WRITE16_MEMBER( bank_reg_w );         //!< write bank register in memory mapped I/O range
1085	1085
1086	1086	void bs_read_r_0();                        //!< bs_read_r early: drive bus by R register
1087	1087	void bs_load_r_0();                        //!< bs_load_r early: load R places 0 on the BUS
r26197	r26198
1289	1289	UINT16 utilin;         //!< the UTILIN port at 0177030 to 0177033 (same value on all addresses)
1290	1290	}   m_hw;
1291	1291
1292		UINT16 utilin_r(UINT32 addr);            //!< read an UTILIN address
1293		UINT16 utilout_r(UINT32 addr);            //!< read the UTILOUT address
1294		void utilout_w(UINT32 addr, UINT16 data);   //!< write the UTILOUT address
1295		UINT16 xbus_r(UINT32 addr);               //!< read an XBUS address
1296		void xbus_w(UINT32 addr, UINT16 data);      //!< write an XBUS address (?)
1297		void init_hardware();                  //!< initialize miscellaneous hardware
	1292	DECLARE_READ16_MEMBER( utilin_r );         //!< read an UTILIN address
	1293	DECLARE_READ16_MEMBER( utilout_r );         //!< read the UTILOUT address
	1294	DECLARE_WRITE16_MEMBER( utilout_w );      //!< write the UTILOUT address
	1295	DECLARE_READ16_MEMBER( xbus_r );         //!< read an XBUS address
	1296	DECLARE_WRITE16_MEMBER( xbus_w );         //!< write an XBUS address (?)
	1297	void init_hw();                        //!< initialize miscellaneous hardware
1298	1298
1299	1299	// ************************************************
1300	1300	// keyboard stuff
r26197	r26198
1303	1303	UINT16 bootkey;                     //!< boot key - key code pressed before power on
1304	1304	UINT16 matrix[4];                  //!< a bit map of the keys pressed (ioports ROW0 ... ROW3)
1305	1305	}   m_kbd;
1306		UINT16 kbd_ad_r(UINT32 addr);            //!< read the keyboard matrix
	1306	DECLARE_READ16_MEMBER( kbd_ad_r );         //!< read the keyboard matrix
1307	1307	void init_kbd(UINT16 bootkey = 0177777);   //!< initialize the keyboard hardware, optinally set the boot key
1308	1308
1309	1309	// ************************************************
r26197	r26198
1847	1847	return (ALTO2_MEM_NONE == m_mem.access ? false : cycle() < m_mem.cycle+2);
1848	1848	}
1849	1849
1850		//! memory mapped I/O read functions - FIXME: use MAME memory handlers for AS_IO
1851		a2io_rd mmio_read_fn[ALTO2_IO_PAGE_SIZE];
1852
1853		//! memory mapped I/O write functions - FIXME: use MAME memory handlers for AS_IO
1854		a2io_wr mmio_write_fn[ALTO2_IO_PAGE_SIZE];
1855
1856		//! catch unmapped memory mapped I/O reads
1857		UINT16 bad_mmio_read_fn(UINT32 address);
1858
1859		//! catch unmapped memory mapped I/O writes
1860		void bad_mmio_write_fn(UINT32 address, UINT16 data);
1861
1862	1850	//! memory error address register read
1863		UINT16 mear_r(UINT32 address);
	1851	DECLARE_READ16_MEMBER( mear_r );
1864	1852
1865	1853	//! memory error status register read
1866		UINT16 mesr_r(UINT32 address);
	1854	DECLARE_READ16_MEMBER( mesr_r );
1867	1855
1868	1856	//! memory error status register write (clear)
1869		void mesr_w(UINT32 address, UINT16 data);
	1857	DECLARE_WRITE16_MEMBER( mesr_w );
1870	1858
1871	1859	//! memory error control register read
1872		UINT16 mecr_r(UINT32 address);
	1860	DECLARE_READ16_MEMBER( mecr_r );
1873	1861
1874	1862	//! memory error control register write
1875		void mecr_w(UINT32 address, UINT16 data);
	1863	DECLARE_WRITE16_MEMBER( mecr_w );
1876	1864
1877	1865	//! read or write a memory double-word and caluclate its Hamming code
1878	1866	UINT32 hamming_code(int write, UINT32 dw_addr, UINT32 dw_data);
r26197	r26198
1886	1874	//! write memory or memory mapped I/O from md to the address in mar
1887	1875	void write_mem(UINT16 data);
1888	1876
1889		//! install read and/or write memory mapped I/O handler(s) for a range first to last
1890		void install_mmio_fn(int first, int last, a2io_rd rfn, a2io_wr wfn);
1891
1892	1877	//! debugger interface to read memory
1893	1878	UINT16 debug_read_mem(UINT32 addr);
1894	1879
r26197	r26198
2089	2074	// disk word task
2090	2075	void f1_kwd_block_0(void);
2091	2076	void init_kwd(int task);                  //!< 016 initialize disk word task
2092
2093		void init_001(int task);                  //!< 001 initialize unused task
2094		void init_002(int task);                  //!< 002 initialize unused task
2095		void init_003(int task);                  //!< 003 initialize unused task
2096		void init_005(int task);                  //!< 005 initialize unused task
2097		void init_006(int task);                  //!< 006 initialize unused task
2098		void init_017(int task);                  //!< 017 initialize unused task
2099	2077	};
2100	2078
2101	2079	extern const device_type ALTO2;

branches/alto2/src/emu/cpu/alto2/a2hw.c

r26197	r26198
15	15	* @param addr memory mapped I/O address to be read
16	16	* @return current value on the UTILIN port
17	17	*/
18		UINT16 alto2_cpu_device::utilin_r(UINT32 addr)
	18	READ16_MEMBER( alto2_cpu_device::utilin_r )
19	19	{
20	20	UINT16  data;
21	21	// FIXME: update the printer status
r26197	r26198
23	23
24	24	data = m_hw.utilin;
25	25
26		LOG((LOG_HW,2,"   read UTILIN %#o (%#o)\n", addr, data));
	26	LOG((LOG_HW,2,"   read UTILIN %#o (%#o)\n", offset, data));
27	27	return data;
28	28	}
29	29
r26197	r26198
33	33	* @param addr memory mapped I/O address to be read
34	34	* @return current value on the XBUS port latch
35	35	*/
36		UINT16 alto2_cpu_device::xbus_r(UINT32 addr)
	36	READ16_MEMBER( alto2_cpu_device::xbus_r )
37	37	{
38		UINT16 data = m_hw.xbus[addr & 3];
	38	UINT16 data = m_hw.xbus[offset & 3];
39	39
40		LOG((LOG_HW,2,"   read XBUS[%d] %#o (%#o)\n", addr&3, addr, data));
	40	LOG((LOG_HW,2,"   read XBUS[%d] %#o (%#o)\n", offset & 3, offset, data));
41	41	return data;
42	42	}
43	43
r26197	r26198
49	49	* @param addr memory mapped I/O address to be read
50	50	* @param data value to write to the XBUS port latch
51	51	*/
52		void alto2_cpu_device::xbus_w(UINT32 addr, UINT16 data)
	52	WRITE16_MEMBER( alto2_cpu_device::xbus_w )
53	53	{
54		LOG((LOG_HW,2,"   write XBUS[%d] %#o (%#o)\n", addr & 3, addr, data));
55		m_hw.xbus[addr&3] = data;
	54	LOG((LOG_HW,2,"   write XBUS[%d] %#o (%#o)\n", offset & 3, offset, data));
	55	m_hw.xbus[offset&3] = data;
56	56	}
57	57
58	58	/**
r26197	r26198
61	61	* @param addr memory mapped I/O address to be read
62	62	* @return current value on the UTILOUT port latch
63	63	*/
64		UINT16 alto2_cpu_device::utilout_r(UINT32 addr)
	64	READ16_MEMBER( alto2_cpu_device::utilout_r )
65	65	{
66	66	UINT16 data = m_hw.utilout ^ 0177777;
67		LOG((0,2,"   read UTILOUT %#o (%#o)\n", addr, data));
	67	LOG((0,2,"   read UTILOUT %#o (%#o)\n", offset, data));
68	68	return data;
69	69	}
70	70
r26197	r26198
76	76	* @param addr memory mapped I/O address to be read
77	77	* @param data value to write to the UTILOUT port latch
78	78	*/
79		void alto2_cpu_device::utilout_w(UINT32 addr, UINT16 data)
	79	WRITE16_MEMBER( alto2_cpu_device::utilout_w )
80	80	{
81		LOG((LOG_HW,2,"   write UTILOUT %#o (%#o)\n", addr, data));
	81	LOG((LOG_HW,2,"   write UTILOUT %#o (%#o)\n", offset, data));
82	82	m_hw.utilout = data ^ 0177777;
83	83
84	84	// FIXME: write printer data
r26197	r26198
88	88	/**
89	89	* @brief clear all keys and install the mmio handler for KBDAD to KBDAD+3
90	90	*/
91		void alto2_cpu_device::init_hardware()
	91	void alto2_cpu_device::init_hw()
92	92	{
93	93	memset(&m_hw, 0, sizeof(m_hw));
94	94
r26197	r26198
100	100	m_hw.xbus[1] = 0177777;
101	101	m_hw.xbus[2] = 0177777;
102	102	m_hw.xbus[3] = 0177777;
103
104		// install memory handlers
105		install_mmio_fn(0177016, 0177016, &alto2_cpu_device::utilout_r, &alto2_cpu_device::utilout_w);
106		install_mmio_fn(0177020, 0177023, &alto2_cpu_device::xbus_r, &alto2_cpu_device::xbus_w);
107		install_mmio_fn(0177030, 0177033, &alto2_cpu_device::utilin_r, 0);
108	103	}
109	104

branches/alto2/src/emu/cpu/alto2/a2mem.c

r26197	r26198
482	482	}
483	483	#endif   /* ALTO2_HAMMING_CHECK */
484	484
485
486	485	/**
487		* @brief catch unmapped memory mapped I/O reads
488		*
489		* @param address address that is read from
490		*/
491		UINT16 alto2_cpu_device::bad_mmio_read_fn(UINT32 address)
492		{
493		LOG((LOG_MEM,1,"   stray I/O read of address %#o\n", address));
494		(void)address;
495		return 0177777;
496		}
497
498		/**
499		* @brief catch unmapped memory mapped I/O writes
500		*
501		* @param address address that is written to
502		* @param data data that is written
503		*/
504		void alto2_cpu_device::bad_mmio_write_fn(UINT32 address, UINT16 data)
505		{
506		LOG((LOG_MEM,1,"   stray I/O write of address %06o, data %#o\n", address, data));
507		(void)address;
508		(void)data;
509		}
510
511		/**
512	486	* @brief memory error address register read
513	487	*
514	488	* This register is a 'shadow MAR'; it holds the address of the
r26197	r26198
517	491	* memory access. Note that MEAR is set whenever an error of
518	492	* _any kind_ (single-bit or double-bit) is detected.
519	493	*/
520		UINT16 alto2_cpu_device::mear_r(UINT32 address)
	494	READ16_MEMBER( alto2_cpu_device::mear_r )
521	495	{
522	496	int data = m_mem.error ? m_mem.mear : m_mem.mar;
523	497	LOG((LOG_MEM,2,"   MEAR read %07o\n", data));
r26197	r26198
540	514	* MESR[14-15]   Bank number in which error occured
541	515	* </PRE>
542	516	*/
543		UINT16 alto2_cpu_device::mesr_r(UINT32 address)
	517	READ16_MEMBER( alto2_cpu_device::mesr_r )
544	518	{
545	519	UINT16 data = m_mem.mesr ^ 0177777;
546		(void)address;
547	520	LOG((LOG_MEM,2,"   MESR read %07o\n", data));
548	521	LOG((LOG_MEM,6,"      Hamming code read    : %#o\n", GET_MESR_HAMMING(data)));
549	522	LOG((LOG_MEM,6,"      Parity error         : %o\n", GET_MESR_PERR(data)));
r26197	r26198
557	530	return data;
558	531	}
559	532
560		void alto2_cpu_device::mesr_w(UINT32 address, UINT16 data)
	533	WRITE16_MEMBER( alto2_cpu_device::mesr_w )
561	534	{
562	535	LOG((LOG_MEM,2,"   MESR write %07o (clear MESR; was %07o)\n", data, m_mem.mesr));
563	536	m_mem.mesr = 0;      // set all bits to 0
r26197	r26198
586	559	* MECR[15]   Spare
587	560	* </PRE>
588	561	*/
589		void alto2_cpu_device::mecr_w(UINT32 address, UINT16 data)
	562	WRITE16_MEMBER( alto2_cpu_device::mecr_w )
590	563	{
591	564	m_mem.mecr = data ^ 0177777;
592		(void)address;
593	565	A2_PUT16(m_mem.mecr,16, 0, 3,0);
594	566	A2_PUT16(m_mem.mecr,16,15,15,0);
595	567	LOG((LOG_MEM,2,"   MECR write %07o\n", data));
r26197	r26198
603	575	/**
604	576	* @brief memory error control register read
605	577	*/
606		UINT16 alto2_cpu_device::mecr_r(UINT32 address)
	578	READ16_MEMBER( alto2_cpu_device::mecr_r )
607	579	{
608	580	UINT16 data = m_mem.mecr ^ 0177777;
609	581	/* set all spare bits */
r26197	r26198
666	638
667	639	base_addr = m_mem.mar & 0177777;
668	640	if (base_addr >= ALTO2_IO_PAGE_BASE) {
669		offs_t offset = base_addr - ALTO2_IO_PAGE_BASE;
670		if (mmio_read_fn[offset])
671		m_mem.md = ((*this).*mmio_read_fn[offset])(base_addr);
	641	m_mem.md = m_iomem->read_word(m_iomem->address_to_byte(base_addr));
672	642	LOG((LOG_MEM,6,"   MD = MMIO[%#o] (%#o)\n", base_addr, m_mem.md));
673	643	m_mem.access = ALTO2_MEM_NONE;
674	644	#if   ALTO2_DEBUG
r26197	r26198
722	692
723	693	base_addr = m_mem.mar & 0177777;
724	694	if (base_addr >= ALTO2_IO_PAGE_BASE) {
725		offs_t offset = base_addr - ALTO2_IO_PAGE_BASE;
	695	m_iomem->write_word(m_iomem->address_to_byte(base_addr), m_mem.md);
726	696	LOG((LOG_MEM,6, "   MMIO[%#o] = MD (%#o)\n", base_addr, m_mem.md));
727		if (mmio_write_fn[offset])
728		((*this).*mmio_write_fn[offset])(base_addr, m_mem.md);
729	697	m_mem.access = ALTO2_MEM_NONE;
730	698	#if   ALTO2_DEBUG
731	699	watch_write(m_mem.mar, m_mem.md);
r26197	r26198
757	725	}
758	726
759	727	/**
760		* @brief install read and/or writte memory mapped I/O handler(s) for a range first to last
761		*
762		* This function fatal()s, if you specify a bad address for first and/or last.
763		*
764		* @param first first memory address to map
765		* @param last last memory address to map
766		* @param rfn pointer to a read function of type 'UINT16 (*read)(UINT32)'
767		* @param wfn pointer to a write function of type 'void (*write)(UINT32,UINT16)'
768		*/
769		void alto2_cpu_device::install_mmio_fn(int first, int last, a2io_rd rfn, a2io_wr wfn)
770		{
771		int address;
772
773		if (first <= ALTO2_IO_PAGE_BASE || last >= (ALTO2_IO_PAGE_BASE + ALTO2_IO_PAGE_SIZE) || first > last) {
774		fatal(3, "internal error - bad memory-mapped I/O address\n");
775		}
776
777		for (address = first; address <= last; address++) {
778		mmio_read_fn[address - ALTO2_IO_PAGE_BASE] = rfn ? rfn : &alto2_cpu_device::bad_mmio_read_fn;
779		mmio_write_fn[address - ALTO2_IO_PAGE_BASE] = wfn ? wfn : &alto2_cpu_device::bad_mmio_write_fn;
780		}
781		}
782
783		/**
784	728	* @brief debugger interface to read memory
785	729	*
786	730	* @param addr address to read
r26197	r26198
791	735	int base_addr = addr & 0177777;
792	736	int data = 0177777;
793	737	if (base_addr >= ALTO2_IO_PAGE_BASE) {
794		offs_t offset = base_addr - ALTO2_IO_PAGE_BASE;
795		if (mmio_read_fn[offset])
796		data = ((*this).*mmio_read_fn[offset])(addr);
	738	data = m_iomem->read_word(m_iomem->address_to_byte(base_addr));
797	739	} else {
798	740	data = (addr & ALTO2_MEM_ODD) ? GET_ODD(m_mem.ram[addr/2]) : GET_EVEN(m_mem.ram[addr/2]);
799	741	}
r26197	r26198
810	752	{
811	753	int base_addr = addr & 0177777;
812	754	if (base_addr >= ALTO2_IO_PAGE_BASE) {
813		offs_t offset = base_addr - ALTO2_IO_PAGE_BASE;
814		if (mmio_write_fn[offset])
815		((*this).*mmio_write_fn[offset])(addr, data);
	755	m_iomem->write_word(m_iomem->address_to_byte(base_addr), data);
816	756	} else if (addr & ALTO2_MEM_ODD) {
817	757	PUT_ODD(m_mem.ram[addr/2], data);
818	758	} else {
r26197	r26198
832	772	{
833	773	memset(&m_mem, 0, sizeof(m_mem));
834	774
835		for (UINT32 addr = 0; addr < ALTO2_IO_PAGE_SIZE; addr++) {
836		mmio_read_fn[addr] = &alto2_cpu_device::bad_mmio_read_fn;
837		mmio_write_fn[addr] = &alto2_cpu_device::bad_mmio_write_fn;
838		}
839
840	775	// allocate 128KB of main memory
841	776	m_mem.ram = global_alloc_array(UINT32, sizeof(UINT16)*ALTO2_RAM_SIZE);
842	777	memset(m_mem.ram, 0, sizeof(UINT32)*sizeof(UINT16)*ALTO2_RAM_SIZE);
r26197	r26198
888	823	*   D3      & MISYSCLK -> LOADERC
889	824	* </PRE>
890	825	*/
891		install_mmio_fn(0177024, 0177024, &alto2_cpu_device::mear_r, 0);
892		install_mmio_fn(0177025, 0177025, &alto2_cpu_device::mesr_r, &alto2_cpu_device::mesr_w);
893		install_mmio_fn(0177026, 0177026, &alto2_cpu_device::mecr_r, &alto2_cpu_device::mecr_w);
894	826
895	827	#if   ALTO2_HAMMING_CHECK
896	828	// Initialize the hamming codes and parity bit

branches/alto2/src/emu/cpu/alto2/a2disk.c

r26197	r26198
1023	1023	* Whoa there! :-)
1024	1024	* </PRE>
1025	1025	*/
1026		#define   INIT   (m_task == task_kwd && m_dsk.wdinit0)
1027
1028	1026	#define   WDALLOW   (!GET_KCOM_WDINHIB(m_dsk.kcom))
1029	1027	#define   WDINIT   ((m_dsk.ff_53b & JKFF_Q) ? 1 : 0)
1030	1028	#define   RDYLAT   ((m_dsk.ff_45a & JKFF_Q) ? 1 : 0)
r26197	r26198
1171	1169	*/
1172	1170	DEBUG_NAME("\t\t53b KWD   ");
1173	1171	s0 = m_dsk.ff_53b;
1174		s1 = m_sysclkb1[i] ? JKFF_CLK : JKFF_0;
	1172	s1 = m_sysclkb1[i];
1175	1173	if (block != task_kwd)
1176	1174	s1 |= JKFF_K;         // (BLOCK & WDTSKACT)'
1177	1175	if (WDALLOW)
r26197	r26198
1192	1190	*/
1193	1191	DEBUG_NAME("\t\t53a KWD   ");
1194	1192	s0 = m_dsk.ff_53a;
1195		s1 = m_sysclkb1[i] ? JKFF_CLK : JKFF_0;
	1193	s1 = m_sysclkb1[i];
1196	1194	if (m_dsk.ff_43b & JKFF_Q)
1197	1195	s1 |= JKFF_J;
1198	1196	if (block != task_kwd)
r26197	r26198
1215	1213	*/
1216	1214	DEBUG_NAME("\t\t43a KWD   ");
1217	1215	s0 = m_dsk.ff_43a;
1218		s1 = m_sysclka1[i] ? JKFF_CLK : JKFF_0;
	1216	s1 = m_sysclka1[i];
1219	1217	if (m_dsk.ff_53a & JKFF_Q)
1220	1218	s1 |= JKFF_J;
1221	1219	if (m_dsk.ff_53a & JKFF_Q)
r26197	r26198
1238	1236	*/
1239	1237	DEBUG_NAME("\t\t45a RDYLAT");
1240	1238	s0 = m_dsk.ff_45a;
1241		s1 = m_sysclka1[i] ? JKFF_CLK : JKFF_0;
	1239	s1 = m_sysclka1[i];
1242	1240	if (dhd->get_ready_0())
1243	1241	s1 |= JKFF_J;
1244	1242	s1 |= JKFF_K;
r26197	r26198
1260	1258	*/
1261	1259	DEBUG_NAME("\t\t45b SEQERR");
1262	1260	s0 = m_dsk.ff_45b;
1263		s1 = m_sysclka1[i] ? JKFF_CLK : JKFF_0;
	1261	s1 = m_sysclka1[i];
1264	1262	s1 |= JKFF_J;
1265	1263	if (SEQERR)
1266	1264	s1 |= JKFF_K;
r26197	r26198
1281	1279	*/
1282	1280	DEBUG_NAME("\t\t22b KSEC  ");
1283	1281	s0 = m_dsk.ff_22b;
1284		s1 = m_sysclkb1[i] ? JKFF_CLK : JKFF_0;
	1282	s1 = m_sysclkb1[i];
1285	1283	if (m_dsk.ff_22a & JKFF_Q)
1286	1284	s1 |= JKFF_J;
1287	1285	if (block != task_ksec)
r26197	r26198
1303	1301	*/
1304	1302	DEBUG_NAME("\t\t22a KSEC  ");
1305	1303	s0 = m_dsk.ff_22a;
1306		s1 = m_sysclkb1[i] ? JKFF_CLK : JKFF_0;
	1304	s1 = m_sysclkb1[i];
1307	1305	if (m_dsk.ff_21b & JKFF_Q)
1308	1306	s1 |= JKFF_J;
1309	1307	s1 |= JKFF_K;
r26197	r26198
1325	1323	*/
1326	1324	DEBUG_NAME("\t\t21b KSEC  ");
1327	1325	s0 = m_dsk.ff_21b;
1328		s1 = m_sysclkb1[i] ? JKFF_CLK : JKFF_0;
	1326	s1 = m_sysclkb1[i];
1329	1327	if (m_dsk.ff_21a & JKFF_Q)
1330	1328	s1 |= JKFF_J;
1331	1329	s1 |= JKFF_K;
r26197	r26198
1654	1652	/* KSTAT[9] latch the drive seek/read/write status */
1655	1653	PUT_KSTAT_SEEK(m_dsk.kstat, dhd->get_seek_read_write_0());
1656	1654
1657		/* KSTAT[10] latch the latched (FF 45a at CLRSTAT) ready status */
	1655	/* KSTAT[10] latch the latched (FF 45a at CLRSTAT) ready status (Q) */
1658	1656	PUT_KSTAT_NOTRDY(m_dsk.kstat, m_dsk.ff_45a & JKFF_Q ? 1 : 0);
1659	1657
1660	1658	/* KSTAT[11] latch the latched (FF 45b at CLRSTAT) seqerr status (Q') */
r26197	r26198
1754	1752	UINT8 s0, s1;
1755	1753	DEBUG_NAME("\t\t44b CKSUM ");
1756	1754	s0 = m_dsk.ff_44b;
1757		s1 = i ? JKFF_CLK : 0;
1758		if (!A2_GET16(m_bus,16,13,13))
	1755	s1 = i ? JKFF_CLK : JKFF_0;
	1756	if (!GET_KSTAT_CKSUM(m_bus))
1759	1757	s1 |= JKFF_J;
1760	1758	s1 |= JKFF_K;
1761	1759	s1 |= JKFF_S;
r26197	r26198
1880	1878	void alto2_cpu_device::f1_clrstat_1()
1881	1879	{
1882	1880	diablo_hd_device* dhd = m_drive[m_dsk.drive];
1883		LOG((LOG_DISK,1,"   CLRSTAT\n"));
1884	1881	UINT8 s0, s1;
1885	1882
1886	1883	/* clears the LAI clocked flip-flop 44a
r26197	r26198
1898	1895	s1 |= JKFF_J;
1899	1896	s1 |= JKFF_K;
1900	1897	s1 |= JKFF_S;
	1898	s1 &= ~JKFF_C;
1901	1899	m_dsk.ff_44a = update_jkff(s0, s1);
1902	1900
1903	1901	/* clears the CKSUM flip-flop 44b
r26197	r26198
1915	1913	s1 |= m_dsk.ff_44b & JKFF_J;
1916	1914	s1 |= JKFF_K;
1917	1915	s1 |= JKFF_S;
	1916	s1 &= ~JKFF_C;
1918	1917	m_dsk.ff_44b = update_jkff(s0, s1);
1919	1918
1920	1919	/* clears the rdylat flip-flop 45a
r26197	r26198
1935	1934	s1 |= JKFF_J;
1936	1935	s1 |= JKFF_K;
1937	1936	s1 |= JKFF_S;
	1937	s1 &= ~JKFF_C;
1938	1938	m_dsk.ff_45a = update_jkff(s0, s1);
1939	1939
1940	1940	/* sets the seqerr flip-flop 45b (Q' is SEQERR)
r26197	r26198
1952	1952	s1 |= JKFF_J;
1953	1953	if (!SEQERR)
1954	1954	s1 |= JKFF_K;
	1955	s1 &= ~JKFF_S;
1955	1956	s1 |= JKFF_C;
1956	1957	m_dsk.ff_45b = update_jkff(s0, s1);
1957	1958
r26197	r26198
1960	1961
1961	1962	/* start monoflop 31a, which resets ready_mf31a */
1962	1963	m_dsk.ready_timer->adjust(attotime::from_nsec(TW_READY), 1);
	1964
	1965	LOG((LOG_DISK,1,"   CLRSTAT (44a_Q:%d 44b_Q:%d 45a_Q:%d 45b_Q:%d 31a_Q:%d)\n",
	1966	m_dsk.ff_44a & JKFF_Q ? 1 : 0, m_dsk.ff_44b & JKFF_Q ? 1 : 0,
	1967	m_dsk.ff_45a & JKFF_Q ? 1 : 0, m_dsk.ff_45b & JKFF_Q ? 1 : 0,
	1968	m_dsk.ready_mf31a));
1963	1969	}
1964	1970
1965	1971	/**
r26197	r26198
2040	2046	*/
2041	2047	void alto2_cpu_device::f2_init_1()
2042	2048	{
2043		UINT16 r = INIT ? 037 : 0;
	2049	// INIT = current task == KWD and WDINIT
	2050	UINT16 r = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
2044	2051	LOG((LOG_DISK,1,"   INIT; %sbranch (%#o | %#o)\n", r ? "" : "no ", m_next2, r));
2045	2052	m_next2 |= r;
2046	2053	m_dsk.wdinit0 = 0;
r26197	r26198
2049	2056	/**
2050	2057	* @brief f2_rwc late: branch on read/write/check state of the current record
2051	2058	* <PRE>
2052		* NEXT ← NEXT OR (current record to be written ? 3 :
2053		*   current record to be checked ? 2 : 0);
	2059	* NEXT ← NEXT OR (current record to be written ? 3 : current record to be checked ? 2 : 0);
2054	2060	*
2055	2061	* NB: note how krecno counts 0,2,3,1 ... etc.
2056	2062	* on 0: it presents the RWC for HEADER
r26197	r26198
2073	2079	{
2074	2080	static UINT16 branch_map[4] = {0,2,3,3};
2075	2081	UINT16 r = branch_map[m_dsk.krwc];;
2076		UINT16 init = INIT ? 037 : 0;
	2082	UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
2077	2083
2078	2084	switch (m_dsk.krecno) {
2079	2085	case RECNO_HEADER:
r26197	r26198
2115	2121	void alto2_cpu_device::f2_recno_1()
2116	2122	{
2117	2123	UINT16 r = m_dsk.krecno;
2118		UINT16 init = INIT ? 037 : 0;
	2124	UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
2119	2125	LOG((LOG_DISK,1,"   RECNO; %sbranch recno:%d (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_dsk.krecno, m_next2, r, init));
2120	2126	m_next2 |= r | init;
2121	2127	m_dsk.wdinit0 = 0;
r26197	r26198
2129	2135	void alto2_cpu_device::f2_xfrdat_1()
2130	2136	{
2131	2137	UINT16 r = GET_KADR_NOXFER(m_dsk.kadr) ? 0 : 1;
2132		UINT16 init = INIT ? 037 : 0;
	2138	UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
2133	2139	LOG((LOG_DISK,1,"   XFRDAT; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
2134	2140	m_next2 |= r | init;
2135	2141	m_dsk.wdinit0 = 0;
r26197	r26198
2144	2150	{
2145	2151	diablo_hd_device* dhd = m_drive[m_dsk.drive];
2146	2152	UINT16 r = dhd ? dhd->get_seek_read_write_0() : 1;
2147		UINT16 init = INIT ? 037 : 0;
	2153	UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
2148	2154
2149	2155	LOG((LOG_DISK,1,"   SWRNRDY; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
2150	2156	m_next2 |= r | init;
r26197	r26198
2159	2165	void alto2_cpu_device::f2_nfer_1()
2160	2166	{
2161	2167	UINT16 r = m_dsk.kfer ? 0 : 1;
2162		UINT16 init = INIT ? 037 : 0;
	2168	UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
2163	2169
2164	2170	LOG((LOG_DISK,1,"   NFER; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
2165	2171	m_next2 |= r | init;
r26197	r26198
2188	2194	void alto2_cpu_device::f2_strobon_1()
2189	2195	{
2190	2196	UINT16 r = m_dsk.strobe;
2191		UINT16 init = INIT ? 037 : 0;
	2197	UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
2192	2198
2193	2199	LOG((LOG_DISK,2,"   STROBON; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
2194	2200	m_next2 |= r | init;
r26197	r26198
2361	2367	#endif
2362	2368
2363	2369	m_dsk.strobon_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(alto2_cpu_device::disk_strobon),this));
2364		m_dsk.strobon_timer->adjust(attotime::from_nsec(TW_STROBON), (1<<1));
	2370	m_dsk.strobon_timer->reset();
2365	2371
2366	2372	m_dsk.seclate_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(alto2_cpu_device::disk_seclate),this));
2367		m_dsk.seclate_timer->adjust(attotime::from_nsec(TW_SECLATE), 1);
	2373	// m_dsk.seclate_timer->adjust(attotime::from_nsec(TW_SECLATE), 1);
	2374	m_dsk.seclate_timer->reset();
2368	2375
2369	2376	m_dsk.ok_to_run_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(alto2_cpu_device::disk_ok_to_run),this));
2370	2377	m_dsk.ok_to_run_timer->adjust(attotime::from_nsec(15 * ALTO2_UCYCLE), 1);

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