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r26196 Saturday 16th November, 2013 at 14:27:26 UTC by Phil Bennett

TMS57002 fixes and improvements: [Phil Bennett] - Moved CA/ID post-increment outside of execution.   Fixes case where dual instructions post-increment, also reduces number of generated instructions. - Fixed data ordering of external memory accesses. - Don't generate redundant instructions for undefined rounding modes; remap them in decode. - Set XOA to 0 on reset. - Use [READ|WRITE]LINE_MEMBER for I/O lines. - Added PC0 line. - Added registers to debugger state.

[src/emu/cpu/tms57002]	tms57002.c tms57002.h tms57kdec.c tmsmake.py
[src/mame/drivers]	konamigx.c

trunk/src/emu/cpu/tms57002/tms57002.h

r26195	r26196
19	19	DECLARE_READ8_MEMBER(data_r);
20	20	DECLARE_WRITE8_MEMBER(data_w);
21	21
22		DECLARE_WRITE8_MEMBER(pload_w);
23		DECLARE_WRITE8_MEMBER(cload_w);
24		DECLARE_READ8_MEMBER(empty_r);
25		DECLARE_READ8_MEMBER(dready_r);
	22	DECLARE_WRITE_LINE_MEMBER(pload_w);
	23	DECLARE_WRITE_LINE_MEMBER(cload_w);
	24	DECLARE_READ_LINE_MEMBER(empty_r);
	25	DECLARE_READ_LINE_MEMBER(dready_r);
	26	DECLARE_READ_LINE_MEMBER(pc0_r);
	27	DECLARE_WRITE_LINE_MEMBER(sync_w);
26	28
27		void sync();
28
29	29	protected:
30	30	virtual void device_start();
31	31	virtual void device_reset();
r26195	r26196
89	89
90	90	enum { IBS = 8192, HBS = 4096 };
91	91
	92	enum { INC_CA = 1, INC_ID = 2 };
	93
92	94	struct icd {
93	95	unsigned short op;
94	96	short next;
r26195	r26196
110	112
111	113	struct cstate {
112	114	int branch;
	115	int inc;
113	116	short hnode;
114	117	short ipc;
115	118	};
r26195	r26196
125	128	UINT32 st0, st1, sti;
126	129	UINT32 aacc, xoa, xba, xwr, xrd, creg;
127	130
128		UINT8 pc, ca, id, ba0, ba1, rptc, rptc_next, sa;
	131	UINT8 pc, hpc, ca, id, ba0, ba1, rptc, rptc_next, sa;
129	132
130	133	UINT32 xm_adr;
131	134
r26195	r26196
145	148	void decode_cat3(UINT32 opcode, unsigned short *op, cstate *cs);
146	149	void decode_cat2_post(UINT32 opcode, unsigned short *op, cstate *cs);
147	150
148		inline int xmode(UINT32 opcode, char type);
	151	inline int xmode(UINT32 opcode, char type, cstate *cs);
149	152	inline int sfao(UINT32 st1);
150	153	inline int dbp(UINT32 st1);
151	154	inline int crm(UINT32 st1);
r26195	r26196
185	188	};
186	189
187	190	enum {
188		TMS57002_PC=1
	191	TMS57002_PC=1,
	192	TMS57002_AACC,
	193	TMS57002_BA0,
	194	TMS57002_BA1,
	195	TMS57002_CREG,
	196	TMS57002_CA,
	197	TMS57002_DREG,
	198	TMS57002_ID,
	199	TMS57002_MACC,
	200	TMS57002_HIDX,
	201	TMS57002_HOST0,
	202	TMS57002_HOST1,
	203	TMS57002_HOST2,
	204	TMS57002_HOST3,
	205	TMS57002_RPTC,
	206	TMS57002_SA,
	207	TMS57002_ST0,
	208	TMS57002_ST1,
	209	TMS57002_TREG,
	210	TMS57002_XBA,
	211	TMS57002_XOA,
	212	TMS57002_XRD,
	213	TMS57002_XWR,
189	214	};
190	215
191	216	extern const device_type TMS57002;

trunk/src/emu/cpu/tms57002/tms57kdec.c

r26195	r26196
12	12	#include "debugger.h"
13	13	#include "tms57002.h"
14	14
15		inline int tms57002_device::xmode(UINT32 opcode, char type)
	15	inline int tms57002_device::xmode(UINT32 opcode, char type, cstate *cs)
16	16	{
17	17	if(((opcode & 0x400) && (type == 'c')) || (!(opcode & 0x400) && (type == 'd'))) {
18	18	if(opcode & 0x100)
19	19	return 0;
20	20	else if(opcode & 0x80)
21		return 2;
22		else
23		return 1;
24		} else if(opcode & 0x200)
25		return 2;
	21	cs->inc |= type == 'c' ? INC_CA : INC_ID;
26	22
	23	return 1;
	24	}
	25	else if(opcode & 0x200)
	26	cs->inc |= type == 'c' ? INC_CA : INC_ID;
	27
27	28	return 1;
28	29	}
29	30
r26195	r26196
39	40
40	41	inline int tms57002_device::crm(UINT32 st1)
41	42	{
42		return (st1 & ST1_CRM) >> ST1_CRM_SHIFT;
	43	int crm = (st1 & ST1_CRM) >> ST1_CRM_SHIFT;
	44	return crm <= 2 ? crm : 0;
43	45	}
44	46
45	47	inline int tms57002_device::sfai(UINT32 st1)
r26195	r26196
54	56
55	57	inline int tms57002_device::rnd(UINT32 st1)
56	58	{
57		return (st1 & ST1_RND) >> ST1_RND_SHIFT;
	59	int rnd = (st1 & ST1_RND) >> ST1_RND_SHIFT;
	60	return rnd <= 4 ? rnd : 0;
58	61	}
59	62
60	63	inline int tms57002_device::movm(UINT32 st1)

trunk/src/emu/cpu/tms57002/tmsmake.py

r26195	r26196
20	20	}
21	21
22	22	def expand_c(v):
23		fmt =  ["%s", "(%s & 0xffff0000)", "(%s << 16)", "%s"][v["crm"]]
24		param = ["cmem[i->param]", "cmem[ca]", "cmem[ca++]"][v["cmode"]]
	23	fmt =  ["%s", "(%s & 0xffff0000)", "(%s << 16)"][v["crm"]]
	24	param = ["cmem[i->param]", "cmem[ca]"][v["cmode"]]
25	25	return fmt %  param
26	26
27	27	def expand_d(v):
28		index = ["(i->param + ", "(id + ", "((id++) + "][v["dmode"]]
	28	index = ["(i->param + ", "(id + "][v["dmode"]]
29	29	mask =  ["ba0) & 0xff] << 8)", "ba1) & 0x1f] << 8)"][v["dbp"]]
30	30	return "(dmem%d[" % v["dbp"] + index + mask
31	31
32	32	def expand_d24(v):
33		index = ["(i->param + ", "(id + ", "((id++) + "][v["dmode"]]
	33	index = ["(i->param + ", "(id + "][v["dmode"]]
34	34	mask =  ["ba0) & 0xff]", "ba1) & 0x1f]"][v["dbp"]]
35	35	return "dmem%d[" % v["dbp"] + index + mask
36	36
r26195	r26196
40	40	c = ["", "s"][v["movm"]]
41	41	return "check_macc_overflow_%d%s()" % (v["sfmo"], c)
42	42
43		EXPAND_WC = ["cmem[i->param] =", "cmem[ca] =", "cmem[ca++] ="]
	43	EXPAND_WC = ["cmem[i->param] =", "cmem[ca] ="]
44	44
45	45
46	46	ROUNDING = [ 0, 1 << (48-32-1), 1 << (48-24-1), 1 << (48-30-1),
47		1 << (48-16-1), 0, 0, 0]
	47	1 << (48-16-1)]
48	48
49	49	A = (1 << 64) - 1
50	50	RMASK= [A,
r26195	r26196
52	52	A - (1 << (48-24)) + 1,
53	53	A - (1 << (48-30)) + 1,
54	54	A - (1 << (48-16)) + 1,
55		A,
56		A,
57		A,
58	55	]
59	56
60	57	def expand_mo(v):
r26195	r26196
64	61
65	62
66	63	def expand_wd1(v):
67		index = ["(i->param + ", "(id + ", "((id++) + "][v["dmode"]]
	64	index = ["(i->param + ", "(id + "][v["dmode"]]
68	65	mask =  ["ba0) & 0xff] =", "ba1) & 0x1f] ="][v["dbp"]]
69	66	return "dmem%d[" % v["dbp"] + index + mask
70	67
r26195	r26196
111	108	}
112	109
113	110	VARIANTS = {
114		"cmode": (3, "xmode(opcode, 'c')" ),
115		"dmode": (3, "xmode(opcode, 'd')" ),
	111	"cmode": (2, "xmode(opcode, 'c', cs)" ),
	112	"dmode": (2, "xmode(opcode, 'd', cs)" ),
116	113	"sfai":  (2, "sfai(st1)"),
117		"crm":   (4, "crm(st1)"),
	114	"crm":   (3, "crm(st1)"),
118	115	"dbp":   (2, "dbp(st1)"),
119	116	"sfao":  (2, "sfao(st1)"),
120	117	"sfmo":  (4, "sfmo(st1)"),
121		"rnd":   (8, "rnd(st1)"),
	118	"rnd":   (5, "rnd(st1)"),
122	119	"movm":  (2, "movm(st1)"),
123	120	"sfma":  (4, "sfma(st1)"),
124	121	# dummy
r26195	r26196
364	361
365	362	def EmitCdec(f, ins_list):
366	363	ins_list.sort(cmp=ins_cmp_dasm)
367		no = 1
	364	no = 4
368	365	last_cat = ""
369	366	for i in ins_list:
370	367	if not i._run: continue
r26195	r26196
383	380	no += i._variants
384	381	print >>f
385	382
386		no = 1
	383	no = 4
387	384	for i in ins_list:
388	385	if not i._run: continue
389	386	cat = i._cat.upper()
r26195	r26196
409	406	def EmitCintrp(f, ins_list):
410	407	ins_list.sort(cmp=ins_cmp_dasm)
411	408	print >>f, "#ifdef CINTRP"
412		no = 1
	409	no = 4
413	410	for i in ins_list:
414	411	no = i.EmitCintrp(f, "", no)
415	412	print >>f, "#endif"

trunk/src/emu/cpu/tms57002/tms57002.c

r26195	r26196
28	28	}
29	29
30	30
31		WRITE8_MEMBER(tms57002_device::pload_w)
	31	WRITE_LINE_MEMBER(tms57002_device::pload_w)
32	32	{
33	33	UINT8 olds = sti;
34		if(data)
	34	if(state)
35	35	sti &= ~IN_PLOAD;
36	36	else
37	37	sti |= IN_PLOAD;
38		if(olds ^ sti)
39		hidx = 0;
	38	if(olds ^ sti) {
	39	if (sti & IN_PLOAD) {
	40	hidx = 0;
	41	hpc = 0;
	42	}
	43	}
40	44	}
41	45
42		WRITE8_MEMBER(tms57002_device::cload_w)
	46	WRITE_LINE_MEMBER(tms57002_device::cload_w)
43	47	{
44	48	UINT8 olds = sti;
45		if(data)
	49	if(state)
46	50	sti &= ~IN_CLOAD;
47	51	else
48	52	sti |= IN_CLOAD;
49		if(olds ^ sti)
50		hidx = 0;
	53	if(olds ^ sti) {
	54	if (sti & IN_CLOAD) {
	55	hidx = 0;
	56	ca = 0;
	57	}
	58	}
51	59	}
52	60
53	61	void tms57002_device::device_reset()
r26195	r26196
65	73	st1 &= ~(ST1_AOV | ST1_SFAI | ST1_SFAO | ST1_MOVM | ST1_MOV |
66	74	ST1_SFMA | ST1_SFMO | ST1_RND | ST1_CRM | ST1_DBP);
67	75
68		xba = 0; // Not sure but makes sense
69
	76	xba = 0;
	77	xoa = 0;
70	78	cache_flush();
71	79	}
72	80
r26195	r26196
93	101	sti = (sti & ~SU_MASK) | SU_PRG;
94	102	break;
95	103	case SU_PRG:
96		program->write_dword((pc++) << 2, val);
	104	program->write_dword(pc++ << 2, val);
97	105	break;
98	106	}
99	107	}
r26195	r26196
141	149	return res;
142	150	}
143	151
144		READ8_MEMBER(tms57002_device::empty_r)
	152	READ_LINE_MEMBER(tms57002_device::empty_r)
145	153	{
146	154	return 1;
147	155	}
148	156
149		READ8_MEMBER(tms57002_device::dready_r)
	157	READ_LINE_MEMBER(tms57002_device::dready_r)
150	158	{
151	159	return sti & S_HOST ? 0 : 1;
152	160	}
153	161
154		void tms57002_device::sync()
	162	READ_LINE_MEMBER(tms57002_device::pc0_r)
155	163	{
	164	return pc == 0 ? 0 : 1;
	165	}
	166
	167	WRITE_LINE_MEMBER(tms57002_device::sync_w)
	168	{
156	169	if(sti & (IN_PLOAD | IN_CLOAD))
157	170	return;
158	171
r26195	r26196
197	210	int done;
198	211	if(st0 & ST0_WORD) {
199	212	if(st0 & ST0_SEL) {
200		int off = (adr & 3) << 3;
	213	int off = 16 - ((adr & 3) << 3);
201	214	xrd = (xrd & ~(0xff << off)) | (v << off);
202		done = off == 16;
	215	done = off == 0;
203	216	} else {
204		int off = (adr & 7) << 2;
	217	int off = 20 - ((adr & 7) << 2);
205	218	xrd = (xrd & ~(0xf << off)) | ((v & 0xf) << off);
206		done = off == 20;
	219	done = off == 0;
207	220	}
208	221	} else {
209	222	if(st0 & ST0_SEL) {
210		int off = (adr & 1) << 3;
	223	int off = 16 - ((adr & 1) << 3);
211	224	xrd = (xrd & ~(0xff << off)) | (v << off);
212	225	done = off == 8;
213	226	if(done)
214		xrd &= 0x00ffff;
	227	xrd &= 0xffff00;
215	228	} else {
216		int off = (adr & 3) << 2;
	229	int off = 20 - ((adr & 3) << 2);
217	230	xrd = (xrd & ~(0xf << off)) | ((v & 0xf) << off);
218		done = off == 12;
	231	done = off == 8;
219	232	if(done)
220		xrd &= 0x00ffff;
	233	xrd &= 0xffff00;
221	234	}
222	235	}
223	236	if(done) {
r26195	r26196
234	247	int done;
235	248	if(st0 & ST0_WORD) {
236	249	if(st0 & ST0_SEL) {
237		int off = (adr & 3) << 3;
	250	int off = 16 - ((adr & 3) << 3);
238	251	v = xwr >> off;
239		done = off == 16;
	252	done = off == 0;
240	253	} else {
241		int off = (adr & 7) << 2;
	254	int off = 20 - ((adr & 7) << 2);
242	255	v = (xwr >> off) & 0xf;
243		done = off == 20;
	256	done = off == 0;
244	257	}
245	258	} else {
246	259	if(st0 & ST0_SEL) {
247		int off = (adr & 1) << 3;
	260	int off = 16 - ((adr & 1) << 3);
248	261	v = xwr >> off;
249	262	done = off == 8;
250	263	} else {
251		int off = (adr & 3) << 2;
	264	int off = 20 - ((adr & 3) << 2);
252	265	v = (xwr >> off) & 0xf;
253		done = off == 12;
	266	done = off == 8;
254	267	}
255	268	}
256	269	data->write_byte(adr, v);
r26195	r26196
669	682	for(;;) {
670	683	short ipc;
671	684	UINT32 opcode = program->read_dword(adr << 2);
	685
	686	cs.inc = 0;
672	687
673	688	if((opcode & 0xfc0000) == 0xfc0000)
674	689	decode_one(opcode, &cs, &tms57002_device::decode_cat3);
r26195	r26196
677	692	decode_one(opcode, &cs, &tms57002_device::decode_cat1);
678	693	decode_one(opcode, &cs, &tms57002_device::decode_cat2_post);
679	694	}
680		add_one(&cs, 0, 0);
	695	add_one(&cs, cs.inc, 0);
681	696
682	697	if(cs.branch)
683	698	break;
r26195	r26196
725	740	case 0:
726	741	goto inst;
727	742
	743	case 1:
	744	++ca;
	745	goto inst;
	746
	747	case 2:
	748	++id;
	749	goto inst;
	750
	751	case 3:
	752	++ca, ++id;
	753	goto inst;
	754
728	755	#define CINTRP
729	756	#include "cpu/tms57002/tms57002.inc"
730	757	#undef CINTRP
r26195	r26196
761	788	program = &space(AS_PROGRAM);
762	789	data    = &space(AS_DATA);
763	790
764		state_add(STATE_GENPC,"GENPC", pc).noshow();
	791	state_add(STATE_GENPC,    "GENPC",  pc).noshow();
	792	state_add(TMS57002_PC,    "PC",     pc);
	793	state_add(TMS57002_ST0,   "ST0",    st0);
	794	state_add(TMS57002_ST1,   "ST1",    st1);
	795	state_add(TMS57002_RPTC,  "RPTC",   rptc);
	796	state_add(TMS57002_AACC,  "AACC",   aacc);
	797	state_add(TMS57002_MACC,  "MACC",   macc).mask(U64(0xfffffffffffff));
	798	state_add(TMS57002_BA0,   "BA0",    ba0);
	799	state_add(TMS57002_BA1,   "BA1",    ba1);
	800	state_add(TMS57002_CREG,  "CREG",   creg);
	801	state_add(TMS57002_CA,    "CA",     ca);
	802	state_add(TMS57002_ID,    "ID",     id);
	803	state_add(TMS57002_XBA,   "XBA",    xba);
	804	state_add(TMS57002_XOA,   "XOA",    xoa);
	805	state_add(TMS57002_XRD,   "XRD",    xrd);
	806	state_add(TMS57002_XWR,   "XWR",    xwr);
	807	state_add(TMS57002_HIDX,  "HIDX",   hidx);
	808	state_add(TMS57002_HOST0, "HOST0",  host[0]);
	809	state_add(TMS57002_HOST1, "HOST1",  host[1]);
	810	state_add(TMS57002_HOST2, "HOST2",  host[2]);
	811	state_add(TMS57002_HOST3, "HOST3",  host[3]);
765	812
766	813	m_icountptr = &icount;
767	814

trunk/src/mame/drivers/konamigx.c

r26195	r26196
1250	1250
1251	1251	INTERRUPT_GEN_MEMBER(konamigx_state::tms_sync)
1252	1252	{
1253		downcast<tms57002_device *>(&device)->sync();
	1253	m_dasp->sync_w(1);
1254	1254	}
1255	1255
1256	1256	READ16_MEMBER(konamigx_state::tms57002_data_word_r)
r26195	r26196
1266	1266
1267	1267	READ16_MEMBER(konamigx_state::tms57002_status_word_r)
1268	1268	{
1269		return (m_dasp->dready_r(space, 0) ? 4 : 0) |
1270		(m_dasp->empty_r(space, 0) ? 1 : 0);
	1269	return (m_dasp->dready_r() ? 4 : 0) |
	1270	(m_dasp->pc0_r() ? 2 : 0) |
	1271	(m_dasp->empty_r() ? 1 : 0);
1271	1272	}
1272	1273
1273	1274	WRITE16_MEMBER(konamigx_state::tms57002_control_word_w)
1274	1275	{
1275	1276	if (ACCESSING_BITS_0_7)
1276	1277	{
1277		m_dasp->pload_w(space, 0, data & 4);
1278		m_dasp->cload_w(space, 0, data & 8);
	1278	m_dasp->pload_w(data & 4);
	1279	m_dasp->cload_w(data & 8);
1279	1280	m_dasp->set_input_line(INPUT_LINE_RESET, !(data & 16) ? ASSERT_LINE : CLEAR_LINE);
1280	1281	}
1281	1282	}

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