MAME SVN History

199869 Revisions

r26064 Saturday 9th November, 2013 at 12:56:17 UTC by Dirk Best
Revert changes to romload.h and implement our own (P)ROM loading. Executing some instructions now possible.

[/branches/alto2/src/emu]	romload.h
[/branches/alto2/src/emu/cpu]	cpu.mak
[/branches/alto2/src/emu/cpu/alto2]	a2roms.c* a2roms.h* alto2.c alto2.h
[/branches/alto2/src/mess/drivers]	alto2.c
[/branches/alto2/src/mess/includes]	alto2.h

branches/alto2/src/emu/cpu/alto2/a2roms.h
r0	r26064
	1	#ifndef _CPU_A2ROMS_H_
	2	#define _CPU_A2ROMS_H_
	3
	4	#include "emu.h"
	5
	6	/**
	7	* @brief structure to define a ROM's or PROM's loading options
	8	*/
	9	typedef struct {
	10	const char *name; //!< default filename of the ROM image
	11	const char *altname; //!< alternate filename of the ROM image
	12	const char *crc32; //!< CRC32 hash of the file
	13	const char *sha1; //!< SHA1 hash of the file
	14	size_t size; //!< size of the file, and elements in destination memory
	15	const UINT8 amap[16]; //!< address bit mapping
	16	UINT32 axor; //!< address XOR mask (applied to source address)
	17	UINT32 dxor; //!< data XOR mask (applied before shifting and mapping)
	18	UINT8 width; //!< width in bits
	19	UINT8 shift; //!< left shift in bits
	20	const UINT8 dmap[16]; //!< data bit mapping
	21	UINT32 dand; //!< ANDing destination with this value, before ORing the data
	22	size_t type; //!< type of the destination, i.e. sizeof(type)
	23	} prom_load_t;
	24
	25	#define ZERO 0
	26	#define KEEP ~0
	27
	28	#define AMAP_DEFAULT {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}
	29	#define AMAP_CONST_PROM {3,2,1,4,5,6,7,0,}
	30	#define AMAP_REVERSE_0_7 {7,6,5,4,3,2,1,0,}
	31
	32	#define DMAP_DEFAULT {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}
	33	#define DMAP_REVERSE_0_3 {3,2,1,0,}
	34
	35	extern UINT8* prom_load(const device_t* device, const prom_load_t* prom, UINT8* src, int pages = 1, int segments = 1);
	36	#endif // _CPU_A2ROMS_H_

Property changes on: branches/alto2/src/emu/cpu/alto2/a2roms.h
Added: svn:mime-type + text/plain Added: svn:eol-style + native

branches/alto2/src/emu/cpu/alto2/alto2.c
r26063	r26064
8	8	*
9	9	*****************************************************************************/
10	10	#include "alto2.h"
	11	#include "a2roms.h"
11	12
12
13	13	//**************************************************************************
14	14	// DEVICE DEFINITIONS
15	15	//**************************************************************************
r26063	r26064
27	27
28	28	alto2_cpu_device::alto2_cpu_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock) :
29	29	cpu_device(mconfig, ALTO2, "Xerox Alto-II", tag, owner, clock, "alto2", __FILE__),
30		/* name, endianness_t endian, datawidth, addrwidth, addrshift = 0, address_map_constructor internal = NULL, address_map_constructor defmap = NULL */
31	30	m_ucode_config("program", ENDIANNESS_BIG, 32, 12, -2),
32	31	m_const_config("constants", ENDIANNESS_BIG, 16, 8, -1),
33		m_ram_config("memory", ENDIANNESS_BIG, 16, 17, -1)
	32	m_ram_config("memory", ENDIANNESS_BIG, 16, 17, -1),
	33	m_ucode(0),
	34	m_const(0),
	35	m_ram(0),
	36	m_icount(0),
	37	m_task_mpc(),
	38	m_task_next2(),
	39	m_ntime(),
	40	m_task(0),
	41	m_next_task(0),
	42	m_next2_task(0),
	43	m_mpc(0),
	44	m_mir(0),
	45	m_rsel(0),
	46	m_next(0),
	47	m_next2(0),
	48	m_r(),
	49	m_s(),
	50	m_bus(0),
	51	m_t(0),
	52	m_alu(0),
	53	m_aluc0(0),
	54	m_l(0),
	55	m_shifter(0),
	56	m_laluc0(0),
	57	m_m(0),
	58	m_cram_addr(0),
	59	m_task_wakeup(0),
	60	m_active_callback(),
	61	m_reset_mode(0xffff),
	62	m_rdram_flag(false),
	63	m_wrtram_flag(false),
	64	m_s_reg_bank(),
	65	m_bank_reg(),
	66	m_ether_enable(true),
	67	m_ewfct(false),
	68	m_dsp_time(0),
	69	m_dsp_state(0),
	70	m_unload_time(0),
	71	m_unload_word(0),
	72	m_ctl2k_u3(0),
	73	m_ctl2k_u38(0),
	74	m_ctl2k_u76(0),
	75	m_cram3k_a37(0),
	76	m_madr_a64(0),
	77	m_madr_a65(0),
	78	m_bs(),
	79	m_f1(),
	80	m_f2(),
	81	m_ram_related(),
	82	m_cycle(0),
	83	m_hw(),
	84	m_mouse(),
	85	m_drive(),
	86	m_unit_selected(0),
	87	m_head_selected(0),
	88	m_sector_callback(),
	89	m_sector_timer(0),
	90	m_dsk(),
	91	m_sysclka0(),
	92	m_sysclka1(),
	93	m_sysclkb0(),
	94	m_sysclkb1(),
	95	m_dsp(),
	96	m_disp_a38(0),
	97	m_disp_a63(0),
	98	m_disp_a66(0),
	99	m_mem(),
	100	mmio_read_fn(),
	101	mmio_write_fn(),
	102	m_emu(),
	103	m_ether_a41(0),
	104	m_ether_a42(0),
	105	m_ether_a49(0),
	106	m_eth()
34	107	{
35	108	}
36	109
r26063	r26064
39	112	//-------------------------------------------------
40	113
41	114	ROM_START( alto2_cpu )
42		ROM_REGION( 01100, "ctrl2k", 0 )
43		ROMX_LOAD( "2kctl.u3", 00000, 00400, CRC(5f8d89e8) SHA1(487cd944ab074290aea73425e81ef4900d92e250), ROM_NIBBLE) //!< 3601-1 256x4 BPROM; Emulator address modifier
44		ROMX_LOAD( "2kctl.u76", 00400, 00400, CRC(1edef867) SHA1(928b8a15ac515a99109f32672441832173883b81), ROM_NIBBLE) //!< 3601-1 256x4 BPROM; 2KCTL replacement for u51 (1KCTL)
45		ROMX_LOAD( "2kctl.u38", 01000, 00040, CRC(fc51b1d1) SHA1(e36c2a12a5da377394264899b5ae504e2ffda46e), 0) //!< 82S23 32x8 BPROM; task priority and initial address
46		ROMX_LOAD( "alu.a10", 01040, 00040, CRC(e0857892) SHA1(dcd389767139f0acc1f87cf074459115abc5b90b), ROM_NIBBLE)
	115	ROM_REGION( 0400, "2kctl_u3", 0 )
	116	ROM_LOAD( "2kctl.u3", 00000, 00400, CRC(5f8d89e8) SHA1(487cd944ab074290aea73425e81ef4900d92e250) ) //!< 3601-1 256x4 BPROM; Emulator address modifier
47	117
48		ROM_REGION( 00400, "cram3k", 0 )
49		ROMX_LOAD( "3kcram.a37", 00000, 00400, CRC(9417360d) SHA1(bfcdbc56ee4ffafd0f2f672c0c869a55d6dd194b), ROM_NIBBLE)
	118	ROM_REGION( 0400, "2kctl_u38", 0 )
	119	ROM_LOAD( "2kctl.u38", 00000, 00040, CRC(fc51b1d1) SHA1(e36c2a12a5da377394264899b5ae504e2ffda46e) ) //!< 82S23 32x8 BPROM; task priority and initial address
50	120
51		ROM_REGION( 02400, "madr", 0 )
52		ROMX_LOAD( "madr.a32", 00000, 00400, CRC(a0e3b4a7) SHA1(24e50afdeb637a6a8588f8d3a3493c9188b8da2c), ROM_NIBBLE) //! P3601 256x4 BPROM; mouse motion signals MX1, MX2, MY1, MY2
53		ROMX_LOAD( "madr.a64", 00400, 00400, CRC(a66b0eda) SHA1(4d9088f592caa3299e90966b17765be74e523144), ROM_NIBBLE) //! P3601 256x4 BPROM; memory addressing
54		ROMX_LOAD( "madr.a65", 01000, 00400, CRC(ba37febd) SHA1(82e9db1cb65f451755295f0d179e6f8fe3349d4d), ROM_NIBBLE) //! P3601 256x4 BPROM; memory addressing
55		ROMX_LOAD( "madr.a90", 01400, 00400, CRC(7a2d8799) SHA1(c3760dba147740729d33b9b88e59088a4cc7437a), ROM_NIBBLE)
56		ROMX_LOAD( "madr.a91", 02000, 00400, CRC(dd556aeb) SHA1(900f333a091e3ccde0843019c25f25fba62e6023), ROM_NIBBLE)
	121	ROM_REGION( 0400, "2kctl_u76", 0 )
	122	ROM_LOAD( "2kctl.u76", 00000, 00400, CRC(1edef867) SHA1(928b8a15ac515a99109f32672441832173883b81) ) //!< 3601-1 256x4 BPROM; 2KCTL replacement for u51 (1KCTL)
57	123
58		ROM_REGION( 01040, "displ", 0 )
59		ROMX_LOAD( "displ.a38", 00000, 00400, CRC(fd30beb7) SHA1(65e4a19ba4ff748d525122128c514abedd55d866), ROM_NIBBLE) //!< P3601 256x4 BPROM; display FIFO control: STOPWAKE, MBEMPTY
60		ROMX_LOAD( "displ.a66", 00400, 00400, CRC(9f91aad9) SHA1(69b1d4c71f4e18103112e8601850c2654e9265cf), ROM_NIBBLE) //!< P3601 256x4 BPROM; display VSYNC and VBLANK
61		ROMX_LOAD( "displ.a63", 01000, 00040, CRC(82a20d60) SHA1(39d90703568be5419ada950e112d99227873fdea), 0) //!< 82S23 32x8 BPROM; display HBLANK, HSYNC, SCANEND, HLCGATE ...
	124	ROM_REGION( 0400, "alu_a10", 0 )
	125	ROM_LOAD( "alu.a10", 00000, 00040, CRC(e0857892) SHA1(dcd389767139f0acc1f87cf074459115abc5b90b) )
62	126
63		ROM_REGION( 01400, "ether", 0 )
64		ROMX_LOAD( "enet.a41", 00000, 00400, CRC(d5de8d86) SHA1(c134a4c898c73863124361a9b0218f7a7f00082a), ROM_NIBBLE)
65		ROMX_LOAD( "enet.a42", 00400, 00400, CRC(9d5c81bd) SHA1(ac7e63332a3dad0bef7cd0349b24e156a96a4bf0), ROM_NIBBLE)
66		ROMX_LOAD( "enet.a49", 01000, 00400, CRC(4d2dcdb2) SHA1(583327a7d70cd02702c941c0e43c1e9408ff7fd0), ROM_NIBBLE)
	127	ROM_REGION( 0400, "3kcram_a37", 0 )
	128	ROM_LOAD( "3kcram.a37", 00000, 00400, CRC(9417360d) SHA1(bfcdbc56ee4ffafd0f2f672c0c869a55d6dd194b) )
	129
	130	ROM_REGION( 0400, "madr_a32", 0 )
	131	ROM_LOAD( "madr.a32", 00000, 00400, CRC(a0e3b4a7) SHA1(24e50afdeb637a6a8588f8d3a3493c9188b8da2c) ) //! P3601 256x4 BPROM; mouse motion signals MX1, MX2, MY1, MY2
	132
	133	ROM_REGION( 0400, "madr_a64", 0 )
	134	ROM_LOAD( "madr.a64", 00000, 00400, CRC(a66b0eda) SHA1(4d9088f592caa3299e90966b17765be74e523144) ) //! P3601 256x4 BPROM; memory addressing
	135
	136	ROM_REGION( 0400, "madr_a65", 0 )
	137	ROM_LOAD( "madr.a65", 00000, 00400, CRC(ba37febd) SHA1(82e9db1cb65f451755295f0d179e6f8fe3349d4d) ) //! P3601 256x4 BPROM; memory addressing
	138
	139	ROM_REGION( 0400, "madr_a90", 0 )
	140	ROM_LOAD( "madr.a90", 00000, 00400, CRC(7a2d8799) SHA1(c3760dba147740729d33b9b88e59088a4cc7437a) )
	141
	142	ROM_REGION( 0400, "madr_a91", 0 )
	143	ROM_LOAD( "madr.a91", 00000, 00400, CRC(dd556aeb) SHA1(900f333a091e3ccde0843019c25f25fba62e6023) )
	144
	145	ROM_REGION( 0400, "displ_a38", 0 )
	146	ROM_LOAD( "displ.a38", 00000, 00400, CRC(fd30beb7) SHA1(65e4a19ba4ff748d525122128c514abedd55d866) ) //!< P3601 256x4 BPROM; display FIFO control: STOPWAKE, MBEMPTY
	147
	148	ROM_REGION( 0040, "displ_a63", 0 )
	149	ROM_LOAD( "displ.a63", 00000, 00040, CRC(82a20d60) SHA1(39d90703568be5419ada950e112d99227873fdea) ) //!< 82S23 32x8 BPROM; display HBLANK, HSYNC, SCANEND, HLCGATE ...
	150
	151	ROM_REGION( 0400, "displ_a66", 0 )
	152	ROM_LOAD( "displ.a66", 00000, 00400, CRC(9f91aad9) SHA1(69b1d4c71f4e18103112e8601850c2654e9265cf) ) //!< P3601 256x4 BPROM; display VSYNC and VBLANK
	153
	154	ROM_REGION( 0400, "ether_a41", 0 )
	155	ROM_LOAD( "enet.a41", 00000, 00400, CRC(d5de8d86) SHA1(c134a4c898c73863124361a9b0218f7a7f00082a) )
	156
	157	ROM_REGION( 0400, "ether_a42", 0 )
	158	ROM_LOAD( "enet.a42", 00000, 00400, CRC(9d5c81bd) SHA1(ac7e63332a3dad0bef7cd0349b24e156a96a4bf0) )
	159
	160	ROM_REGION( 0400, "ether_a49", 0 )
	161	ROM_LOAD( "enet.a49", 00000, 00400, CRC(4d2dcdb2) SHA1(583327a7d70cd02702c941c0e43c1e9408ff7fd0) )
67	162	ROM_END
68	163
69	164	const rom_entry *alto2_cpu_device::device_rom_region() const
r26063	r26064
75	170	// device_start - device-specific startup
76	171	//-------------------------------------------------
77	172
78		#define DEBUG_PROMS 1 // define to 1 to enable debugging of loaded PROMs
79
80		#if DEBUG_PROMS
81		static void dump_prom(const char* name, UINT8* data, size_t size)
82		{
83		printf("UINT8 %s[%05o] = {\n", name, (unsigned)size);
84		for (size_t addr = 0; addr < size; addr++) {
85		if (0 == addr % 16)
86		printf("\t");
87		printf("%04o", data[addr]);
88		if (addr + 1 < size)
89		printf(",");
90		if (15 == addr % 16)
91		printf("\n");
92		}
93		printf("};\n");
94		printf("\n");
95		}
96		#endif
97
98	173	// FIXME
99	174	void alto2_cpu_device::device_start()
100	175	{
r26063	r26064
102	177	m_const = &space(AS_DATA);
103	178	m_ram = &space(AS_IO);
104	179
105		// resolve the pointers to the various PROMs
106		UINT8 *ctrl2k = memregion("ctrl2k")->base();
107		m_ctl2k_u3 = ctrl2k; // region=ctrl2k offset=00000 size=00400
108		m_ctl2k_u76 = ctrl2k + 00400; // region=ctrl2k offset=00400 size=00400
109		m_ctl2k_u38 = ctrl2k + 01000; // region=ctrl2k offset=01000 size=00040
110		m_alu_a10 = ctrl2k + 01040; // region=ctrl2k offset=01040 size=00040
	180	//! P3601 256x4 BPROM; display FIFO control: STOPWAKE, MBEMPTY
	181	static const prom_load_t pl_displ_a38 =
	182	{
	183	"displ.a38",
	184	0,
	185	"fd30beb7",
	186	"65e4a19ba4ff748d525122128c514abedd55d866",
	187	/* size */ 0400,
	188	/* amap */ AMAP_REVERSE_0_7, // reverse address lines A0-A7
	189	/* axor */ 0,
	190	/* dxor */ 0,
	191	/* width */ 4,
	192	/* shift */ 0,
	193	/* dmap */ DMAP_DEFAULT,
	194	/* dand */ ZERO,
	195	/* type */ sizeof(UINT8)
	196	};
	197	m_disp_a38 = prom_load(this, &pl_displ_a38, memregion("displ_a38")->base(), 1, 1);
111	198
112		#if DEBUG_PROMS
113		dump_prom("m_ctl2k_u3", m_ctl2k_u3, 00400);
114		dump_prom("m_ctl2k_u76", m_ctl2k_u76, 00400);
115		dump_prom("m_ctl2k_u38", m_ctl2k_u38, 00040);
116		dump_prom("m_alu_a10", m_alu_a10, 00040);
117		#endif
	199	//! 82S23 32x8 BPROM; display HBLANK, HSYNC, SCANEND, HLCGATE ...
	200	static const prom_load_t pl_displ_a63 =
	201	{
	202	"displ.a63",
	203	0,
	204	"82a20d60",
	205	"39d90703568be5419ada950e112d99227873fdea",
	206	/* size */ 0040,
	207	/* amap */ AMAP_DEFAULT,
	208	/* axor */ 0,
	209	/* dxor */ 0,
	210	/* width */ 8,
	211	/* shift */ 0,
	212	/* dmap */ DMAP_DEFAULT,
	213	/* dand */ ZERO,
	214	/* type */ sizeof(UINT8)
	215	};
	216	m_disp_a63 = prom_load(this, &pl_displ_a63, memregion("displ_a63")->base(), 1, 1);
118	217
119		UINT8 *cram3k = memregion("cram3k")->base();
120		m_cram3k_a37 = cram3k; // region=cram3k offset=00000 size=00400
	218	//! P3601 256x4 BPROM; display VSYNC and VBLANK
	219	static const prom_load_t pl_displ_a66 =
	220	{
	221	"displ.a66",
	222	0,
	223	"9f91aad9",
	224	"69b1d4c71f4e18103112e8601850c2654e9265cf",
	225	/* size */ 0400,
	226	/* amap */ AMAP_DEFAULT,
	227	/* axor */ 0,
	228	/* dxor */ 0,
	229	/* width */ 4,
	230	/* shift */ 0,
	231	/* dmap */ DMAP_DEFAULT,
	232	/* dand */ ZERO,
	233	/* type */ sizeof(UINT8)
	234	};
	235	m_disp_a66 = prom_load(this, &pl_displ_a66, memregion("displ_a66")->base(), 1, 1);
121	236
122		#if DEBUG_PROMS
123		dump_prom("m_cram3k_a37", m_ctl2k_u3, 00400);
124		#endif
	237	//! 3601-1 256x4 BPROM; Emulator address modifier
	238	static const prom_load_t pl_2kctl_u3 =
	239	{
	240	"2kctl.u3",
	241	0,
	242	"5f8d89e8",
	243	"487cd944ab074290aea73425e81ef4900d92e250",
	244	/* size */ 0400,
	245	/* amap */ AMAP_REVERSE_0_7, // reverse address lines A0-A7
	246	/* axor */ 0377, // invert address lines A0-A7
	247	/* dxor */ 017, // invert data lines D0-D3
	248	/* width */ 4,
	249	/* shift */ 0,
	250	/* dmap */ DMAP_DEFAULT,
	251	/* dand */ ZERO,
	252	/* type */ sizeof(UINT8)
	253	};
	254	m_ctl2k_u3 = prom_load(this, &pl_2kctl_u3, memregion("2kctl_u3")->base(), 1, 1);
125	255
126		UINT8 *madr = memregion("madr")->base();
127		m_madr_a32 = madr; // region=madr offset=00000 size=00400
128		m_madr_a64 = madr + 00400; // region=madr offset=00400 size=00400
129		m_madr_a65 = madr + 01000; // region=madr offset=01000 size=00400
130		// m_madr_a90 = madr + 01400; // region=madr offset=01400 size=00400 - unused
131		// m_madr_a91 = madr + 02000; // region=madr offset=02000 size=00400 - unused
	256	//! 82S23 32x8 BPROM; task priority and initial address
	257	static const prom_load_t pl_2kctl_u38 =
	258	{
	259	"2kctl.u38",
	260	0,
	261	"fc51b1d1",
	262	"e36c2a12a5da377394264899b5ae504e2ffda46e",
	263	/* size */ 0040,
	264	/* amap */ AMAP_DEFAULT,
	265	/* axor */ 0,
	266	/* dxor */ 0,
	267	/* width */ 8,
	268	/* shift */ 0,
	269	/* dmap */ DMAP_DEFAULT,
	270	/* dand */ ZERO,
	271	/* type */ sizeof(UINT8)
	272	};
	273	m_ctl2k_u38 = prom_load(this, &pl_2kctl_u38, memregion("2kctl_u38")->base(), 1, 1);
132	274
133		#if DEBUG_PROMS
134		dump_prom("m_madr_a32", m_madr_a32, 00400);
135		dump_prom("m_madr_a64", m_madr_a64, 00400);
136		dump_prom("m_madr_a65", m_madr_a65, 00400);
137		#endif
	275	//! 3601-1 256x4 BPROM; 2KCTL replacement for u51 (1KCTL)
	276	static const prom_load_t pl_2kctl_u76 =
	277	{
	278	"2kctl.u76",
	279	0,
	280	"1edef867",
	281	"928b8a15ac515a99109f32672441832173883b81",
	282	/* size */ 0400,
	283	/* amap */ AMAP_DEFAULT,
	284	/* axor */ 0077, // invert address lines A0-A5
	285	/* dxor */ 0,
	286	/* width */ 4,
	287	/* shift */ 0,
	288	/* dmap */ DMAP_DEFAULT,
	289	/* dand */ ZERO,
	290	/* type */ sizeof(UINT8)
	291	};
	292	m_ctl2k_u76 = prom_load(this, &pl_2kctl_u76, memregion("2kctl_u76")->base(), 1, 1);
138	293
139		UINT8* displ = memregion("displ")->base();
140		m_disp_a38 = displ; // region=displ offset=00000 size=00400
141		m_disp_a66 = displ + 00400; // region=displ offset=00400 size=00400
142		m_disp_a63 = displ + 01000; // region=displ offset=01000 size=00040
	294	//! ALUF to ALU 741818 functions and carry in mapper
	295	static const prom_load_t pl_alu_a10 =
	296	{
	297	"alu.a10",
	298	0,
	299	"e0857892",
	300	"dcd389767139f0acc1f87cf074459115abc5b90b",
	301	/* size */ 0040,
	302	/* amap */ AMAP_DEFAULT,
	303	/* axor */ 0,
	304	/* dxor */ 0,
	305	/* width */ 4,
	306	/* shift */ 0,
	307	/* dmap */ DMAP_DEFAULT,
	308	/* dand */ ZERO,
	309	/* type */ sizeof(UINT8)
	310	};
	311	m_alu_a10 = prom_load(this, &pl_alu_a10, memregion("alu_a10")->base(), 1, 1);
143	312
144		#if DEBUG_PROMS
145		dump_prom("m_disp_a38", m_disp_a38, 00400);
146		dump_prom("m_disp_a66", m_disp_a66, 00400);
147		dump_prom("m_disp_a63", m_disp_a63, 00040);
148		#endif
	313	static const prom_load_t pl_3kcram_a37 =
	314	{
	315	"3kcram.a37",
	316	0,
	317	"9417360d",
	318	"bfcdbc56ee4ffafd0f2f672c0c869a55d6dd194b",
	319	/* size */ 0400,
	320	/* amap */ AMAP_DEFAULT,
	321	/* axor */ 0,
	322	/* dxor */ 017, // invert D0-D3
	323	/* width */ 4,
	324	/* shift */ 0,
	325	/* dmap */ DMAP_DEFAULT,
	326	/* dand */ ZERO,
	327	/* type */ sizeof(UINT8)
	328	};
	329	m_cram3k_a37 = prom_load(this, &pl_3kcram_a37, memregion("3kcram_a37")->base(), 1, 1);
149	330
150		UINT8* ether = memregion("ether")->base();
151		m_ether_a41 = ether; // region=ether offset=00000 size=00400
152		m_ether_a42 = ether + 00400; // region=ether offset=00400 size=00400
153		m_ether_a49 = ether + 01000; // region=ether offset=01000 size=00400
	331	static const prom_load_t pl_madr_a32 =
	332	{
	333	"madr.a32",
	334	0,
	335	"a0e3b4a7",
	336	"24e50afdeb637a6a8588f8d3a3493c9188b8da2c",
	337	/* size */ 0400,
	338	/* amap */ AMAP_DEFAULT,
	339	/* axor */ 0,
	340	/* dxor */ 017, // invert D0-D3
	341	/* width */ 4,
	342	/* shift */ 0,
	343	/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
	344	/* dand */ ZERO,
	345	/* type */ sizeof(UINT8)
	346	};
154	347
155		#if DEBUG_PROMS
156		dump_prom("m_ether_a41", m_ether_a41, 00400);
157		dump_prom("m_ether_a42", m_ether_a42, 00400);
158		dump_prom("m_ether_a49", m_ether_a49, 00400);
	348	m_madr_a32 = prom_load(this, &pl_madr_a32, memregion("madr_a32")->base(), 1, 1);
	349
	350	static const prom_load_t pl_madr_a64 =
	351	{
	352	"madr.a64",
	353	0,
	354	"a66b0eda",
	355	"4d9088f592caa3299e90966b17765be74e523144",
	356	/* size */ 0400,
	357	/* amap */ AMAP_DEFAULT,
	358	/* axor */ 0,
	359	/* dxor */ 017, // invert D0-D3
	360	/* width */ 4,
	361	/* shift */ 0,
	362	/* dmap */ DMAP_DEFAULT,
	363	/* dand */ ZERO,
	364	/* type */ sizeof(UINT8)
	365	};
	366	m_madr_a64 = prom_load(this, &pl_madr_a64, memregion("madr_a64")->base(), 1, 1);
	367
	368	static const prom_load_t pl_madr_a65 =
	369	{
	370	"madr.a65",
	371	0,
	372	"ba37febd",
	373	"82e9db1cb65f451755295f0d179e6f8fe3349d4d",
	374	/* size */ 0400,
	375	/* amap */ AMAP_DEFAULT,
	376	/* axor */ 0,
	377	/* dxor */ 017, // invert D0-D3
	378	/* width */ 4,
	379	/* shift */ 0,
	380	/* dmap */ DMAP_DEFAULT,
	381	/* dand */ ZERO,
	382	/* type */ sizeof(UINT8)
	383	};
	384	m_madr_a65 = prom_load(this, &pl_madr_a65, memregion("madr_a65")->base(), 1, 1);
	385
	386	#if 0 // FIXME: add to alto2_cpu_device
	387	static const prom_load_t pl_madr_a90 =
	388	{
	389	"madr.a90",
	390	0,
	391	"7a2d8799",
	392	"c3760dba147740729d33b9b88e59088a4cc7437a",
	393	/* size */ 0400,
	394	/* amap */ AMAP_DEFAULT,
	395	/* axor */ 0,
	396	/* dxor */ 017, // invert D0-D3
	397	/* width */ 4,
	398	/* shift */ 0,
	399	/* dmap */ DMAP_DEFAULT,
	400	/* dand */ ZERO,
	401	/* type */ sizeof(UINT8)
	402	};
	403	m_madr_a90 = prom_load(this, &pl_madr_a90, memregion("madr_a90")->base(), 1 ,1);
	404
	405	static const prom_load_t pl_madr_a91 =
	406	{
	407	"madr.a91",
	408	0,
	409	"dd556aeb",
	410	"900f333a091e3ccde0843019c25f25fba62e6023",
	411	/* size */ 0400,
	412	/* amap */ AMAP_DEFAULT,
	413	/* axor */ 0,
	414	/* dxor */ 017, // invert D0-D3
	415	/* width */ 4,
	416	/* shift */ 0,
	417	/* dmap */ DMAP_DEFAULT,
	418	/* dand */ ZERO,
	419	/* type */ sizeof(UINT8)
	420	};
	421	m_madr_a91 = prom_load(this, &pl_madr_a91, memregion("madr_a91")->base(), 1, 1);
159	422	#endif
160	423
	424	static const prom_load_t pl_enet_a41 =
	425	{ /* P3601 256x4 BPROM; Ethernet phase encoder 1 "PE1" */
	426	"enet.a41",
	427	0,
	428	"d5de8d86",
	429	"c134a4c898c73863124361a9b0218f7a7f00082a",
	430	/* size */ 0400,
	431	/* amap */ AMAP_DEFAULT,
	432	/* axor */ 0,
	433	/* dxor */ 0,
	434	/* width */ 4,
	435	/* shift */ 0,
	436	/* dmap */ DMAP_DEFAULT,
	437	/* dand */ ZERO,
	438	/* type */ sizeof(UINT8)
	439	};
	440	m_ether_a41 = prom_load(this, &pl_enet_a41, memregion("ether_a41")->base(), 1, 1);
	441
	442	static const prom_load_t pl_enet_a42 =
	443	{ /* P3601 256x4 BPROM; Ethernet phase encoder 2 "PE2" */
	444	"enet.a42",
	445	0,
	446	"9d5c81bd",
	447	"ac7e63332a3dad0bef7cd0349b24e156a96a4bf0",
	448	/* size */ 0400,
	449	/* amap */ AMAP_DEFAULT,
	450	/* axor */ 0,
	451	/* dxor */ 0,
	452	/* width */ 4,
	453	/* shift */ 0,
	454	/* dmap */ DMAP_DEFAULT,
	455	/* dand */ ZERO,
	456	/* type */ sizeof(UINT8)
	457	};
	458	m_ether_a42 = prom_load(this, &pl_enet_a42, memregion("ether_a42")->base(), 1, 1);
	459
	460	static const prom_load_t pl_enet_a49 =
	461	{ /* P3601 256x4 BPROM; Ethernet FIFO control "AFIFO" */
	462	"enet.a49",
	463	0,
	464	"4d2dcdb2",
	465	"583327a7d70cd02702c941c0e43c1e9408ff7fd0",
	466	/* size */ 0400,
	467	/* amap */ AMAP_REVERSE_0_7, // reverse address lines A0-A7
	468	/* axor */ 0,
	469	/* dxor */ 0,
	470	/* width */ 4,
	471	/* shift */ 0,
	472	/* dmap */ DMAP_DEFAULT,
	473	/* dand */ ZERO,
	474	/* type */ sizeof(UINT8)
	475	};
	476	m_ether_a49 = prom_load(this, &pl_enet_a49, memregion("ether_a49")->base(), 1, 1);
	477
161	478	save_item(NAME(m_task_mpc));
162	479	save_item(NAME(m_task_next2));
163	480	save_item(NAME(m_ntime));
r26063	r26064
280	597	save_item(NAME(m_eth.tx_count));
281	598	save_item(NAME(m_eth.duckbreath));
282	599
283		state_add( A2_AC3, "AC(3)", m_r[A2_AC3]).formatstr("%04X");
284		state_add( A2_AC2, "AC(2)", m_r[A2_AC2]).formatstr("%04X");
285		state_add( A2_AC1, "AC(1)", m_r[A2_AC1]).formatstr("%04X");
286		state_add( A2_AC0, "AC(0)", m_r[A2_AC0]).formatstr("%04X");
287		state_add( A2_R04, "R04", m_r[A2_R04]).formatstr("%04X");
288		state_add( A2_R05, "R05", m_r[A2_R05]).formatstr("%04X");
289		state_add( A2_PC, "PC", m_r[A2_PC]).formatstr("%04X");
290		state_add( A2_R07, "R07", m_r[A2_R07]).formatstr("%04X");
291		state_add( A2_R10, "R10", m_r[A2_R10]).formatstr("%04X");
292		state_add( A2_R11, "R11", m_r[A2_R11]).formatstr("%04X");
293		state_add( A2_R12, "R12", m_r[A2_R12]).formatstr("%04X");
294		state_add( A2_R13, "R13", m_r[A2_R13]).formatstr("%04X");
295		state_add( A2_R14, "R14", m_r[A2_R14]).formatstr("%04X");
296		state_add( A2_R15, "R15", m_r[A2_R15]).formatstr("%04X");
297		state_add( A2_R16, "R16", m_r[A2_R16]).formatstr("%04X");
298		state_add( A2_R17, "R17", m_r[A2_R17]).formatstr("%04X");
299		state_add( A2_R20, "R20", m_r[A2_R20]).formatstr("%04X");
300		state_add( A2_R21, "R21", m_r[A2_R21]).formatstr("%04X");
301		state_add( A2_R22, "R22", m_r[A2_R22]).formatstr("%04X");
302		state_add( A2_R23, "R23", m_r[A2_R23]).formatstr("%04X");
303		state_add( A2_R24, "R24", m_r[A2_R24]).formatstr("%04X");
304		state_add( A2_R25, "R25", m_r[A2_R25]).formatstr("%04X");
305		state_add( A2_R26, "R26", m_r[A2_R26]).formatstr("%04X");
306		state_add( A2_R27, "R27", m_r[A2_R27]).formatstr("%04X");
307		state_add( A2_R30, "R30", m_r[A2_R30]).formatstr("%04X");
308		state_add( A2_R31, "R31", m_r[A2_R31]).formatstr("%04X");
309		state_add( A2_R32, "R32", m_r[A2_R32]).formatstr("%04X");
310		state_add( A2_R33, "R33", m_r[A2_R33]).formatstr("%04X");
311		state_add( A2_R34, "R34", m_r[A2_R34]).formatstr("%04X");
312		state_add( A2_R35, "R35", m_r[A2_R35]).formatstr("%04X");
313		state_add( A2_R36, "R36", m_r[A2_R36]).formatstr("%04X");
314		state_add( A2_R37, "R37", m_r[A2_R37]).formatstr("%04X");
	600	state_add( A2_TASK, "TASK", m_task).formatstr("%02X");
	601	state_add( A2_BUS, "BUS", m_bus).formatstr("%04X");
	602	state_add( A2_T, "T", m_t).formatstr("%04X");
	603	state_add( A2_ALU, "ALU", m_alu).formatstr("%04X");
	604	state_add( A2_ALUC0, "ALUC0", m_aluc0).formatstr("%1u");
	605	state_add( A2_L, "L", m_l).formatstr("%04X");
	606	state_add( A2_SHIFTER, "SHIFTER", m_shifter).formatstr("%04X");
	607	state_add( A2_LALUC0, "LALUC0", m_laluc0).formatstr("%1u");
	608	state_add( A2_M, "M", m_m).formatstr("%04X");
315	609
	610	state_add( A2_AC3, "AC(3)", m_r[000]).formatstr("%04X");
	611	state_add( A2_AC2, "AC(2)", m_r[001]).formatstr("%04X");
	612	state_add( A2_AC1, "AC(1)", m_r[002]).formatstr("%04X");
	613	state_add( A2_AC0, "AC(0)", m_r[003]).formatstr("%04X");
	614	state_add( A2_R04, "R04", m_r[004]).formatstr("%04X");
	615	state_add( A2_R05, "R05", m_r[005]).formatstr("%04X");
	616	state_add( A2_PC, "PC", m_r[006]).formatstr("%04X");
	617	state_add( A2_R07, "R07", m_r[007]).formatstr("%04X");
	618	state_add( A2_R10, "R10", m_r[010]).formatstr("%04X");
	619	state_add( A2_R11, "R11", m_r[011]).formatstr("%04X");
	620	state_add( A2_R12, "R12", m_r[012]).formatstr("%04X");
	621	state_add( A2_R13, "R13", m_r[013]).formatstr("%04X");
	622	state_add( A2_R14, "R14", m_r[014]).formatstr("%04X");
	623	state_add( A2_R15, "R15", m_r[015]).formatstr("%04X");
	624	state_add( A2_R16, "R16", m_r[016]).formatstr("%04X");
	625	state_add( A2_R17, "R17", m_r[017]).formatstr("%04X");
	626	state_add( A2_R20, "R20", m_r[020]).formatstr("%04X");
	627	state_add( A2_R21, "R21", m_r[021]).formatstr("%04X");
	628	state_add( A2_R22, "R22", m_r[022]).formatstr("%04X");
	629	state_add( A2_R23, "R23", m_r[023]).formatstr("%04X");
	630	state_add( A2_R24, "R24", m_r[024]).formatstr("%04X");
	631	state_add( A2_R25, "R25", m_r[025]).formatstr("%04X");
	632	state_add( A2_R26, "R26", m_r[026]).formatstr("%04X");
	633	state_add( A2_R27, "R27", m_r[027]).formatstr("%04X");
	634	state_add( A2_R30, "R30", m_r[030]).formatstr("%04X");
	635	state_add( A2_R31, "R31", m_r[031]).formatstr("%04X");
	636	state_add( A2_R32, "R32", m_r[032]).formatstr("%04X");
	637	state_add( A2_R33, "R33", m_r[033]).formatstr("%04X");
	638	state_add( A2_R34, "R34", m_r[034]).formatstr("%04X");
	639	state_add( A2_R35, "R35", m_r[035]).formatstr("%04X");
	640	state_add( A2_R36, "R36", m_r[036]).formatstr("%04X");
	641	state_add( A2_R37, "R37", m_r[037]).formatstr("%04X");
	642
	643	state_add( A2_S00, "S00", m_s[0][000]).formatstr("%04X");
	644	state_add( A2_S01, "S01", m_s[0][001]).formatstr("%04X");
	645	state_add( A2_S02, "S02", m_s[0][002]).formatstr("%04X");
	646	state_add( A2_S03, "S03", m_s[0][003]).formatstr("%04X");
	647	state_add( A2_S04, "S04", m_s[0][004]).formatstr("%04X");
	648	state_add( A2_S05, "S05", m_s[0][005]).formatstr("%04X");
	649	state_add( A2_S06, "S06", m_s[0][006]).formatstr("%04X");
	650	state_add( A2_S07, "S07", m_s[0][007]).formatstr("%04X");
	651	state_add( A2_S10, "S10", m_s[0][010]).formatstr("%04X");
	652	state_add( A2_S11, "S11", m_s[0][011]).formatstr("%04X");
	653	state_add( A2_S12, "S12", m_s[0][012]).formatstr("%04X");
	654	state_add( A2_S13, "S13", m_s[0][013]).formatstr("%04X");
	655	state_add( A2_S14, "S14", m_s[0][014]).formatstr("%04X");
	656	state_add( A2_S15, "S15", m_s[0][015]).formatstr("%04X");
	657	state_add( A2_S16, "S16", m_s[0][016]).formatstr("%04X");
	658	state_add( A2_S17, "S17", m_s[0][017]).formatstr("%04X");
	659	state_add( A2_S20, "S20", m_s[0][020]).formatstr("%04X");
	660	state_add( A2_S21, "S21", m_s[0][021]).formatstr("%04X");
	661	state_add( A2_S22, "S22", m_s[0][022]).formatstr("%04X");
	662	state_add( A2_S23, "S23", m_s[0][023]).formatstr("%04X");
	663	state_add( A2_S24, "S24", m_s[0][024]).formatstr("%04X");
	664	state_add( A2_S25, "S25", m_s[0][025]).formatstr("%04X");
	665	state_add( A2_S26, "S26", m_s[0][026]).formatstr("%04X");
	666	state_add( A2_S27, "S27", m_s[0][027]).formatstr("%04X");
	667	state_add( A2_S30, "S30", m_s[0][030]).formatstr("%04X");
	668	state_add( A2_S31, "S31", m_s[0][031]).formatstr("%04X");
	669	state_add( A2_S32, "S32", m_s[0][032]).formatstr("%04X");
	670	state_add( A2_S33, "S33", m_s[0][033]).formatstr("%04X");
	671	state_add( A2_S34, "S34", m_s[0][034]).formatstr("%04X");
	672	state_add( A2_S35, "S35", m_s[0][035]).formatstr("%04X");
	673	state_add( A2_S36, "S36", m_s[0][036]).formatstr("%04X");
	674	state_add( A2_S37, "S37", m_s[0][037]).formatstr("%04X");
	675
316	676	state_add(STATE_GENPC, "curpc", m_mpc).formatstr("%03X").noshow();
317	677	state_add(STATE_GENFLAGS, "GENFLAGS", m_aluc0).formatstr("%5s").noshow();
318	678
r26063	r26064
1551	1911	/** @brief execute the CPU for at most nsecs nano seconds */
1552	1912	void alto2_cpu_device::execute_run()
1553	1913	{
1554		m_alto_leave = 0;
1555
1556	1914	m_next = m_task_mpc[m_task]; // get current task's next mpc and address modifier
1557	1915	m_next2 = m_task_next2[m_task];
1558	1916
r26063	r26064
1564	1922	UINT8 f1;
1565	1923	UINT8 f2;
1566	1924
1567		// FIXME: cycle counting?
1568		if (m_alto_leave)
1569		break;
1570
1571	1925	/*
1572	1926	* Subtract the microcycle time from the display time accu.
1573	1927	* If it underflows, call the display state machine and add

branches/alto2/src/emu/cpu/alto2/alto2.h
r26063	r26064
73	73	#define ALTO2_IO_PAGE_BASE 0177000 //!< base address of the memory mapped io range
74	74	#define ALTO2_IO_PAGE_SIZE 01000 //!< size of the memory mapped io range
75	75
	76	//! inverted bits in the micro instruction 32 bit word
	77	#define ALTO2_UCODE_INVERTED ((1 << 10) \| (1 << 15) \| (1 << 19))
	78
76	79	/**
77	80	* @brief start value for the horizontal line counter
78	81	*
r26063	r26064
147	150	#define ALTO2_DISPLAY_VBLANK_TIME ((ALTO2_DISPLAY_TOTAL_HEIGHT-ALTO2_DISPLAY_HEIGHT)*HZ_TO_ATTOSECONDS(26250))
148	151	#define ALTO2_DISPLAY_FIFO 16 //!< the display fifo has 16 words
149	152
150		//! 32 R registers
151	153	enum {
152		A2_AC3, A2_AC2, A2_AC1, A2_AC0,
153		A2_R04, A2_R05, A2_PC, A2_R07,
154		A2_R10, A2_R11, A2_R12, A2_R13,
155		A2_R14, A2_R15, A2_R16, A2_R17,
156		A2_R20, A2_R21, A2_R22, A2_R23,
157		A2_R24, A2_R25, A2_R26, A2_R27,
158		A2_R30, A2_R31, A2_R32, A2_R33,
159		A2_R34, A2_R35, A2_R36, A2_R37
	154	A2_TASK, A2_BUS, A2_T, A2_ALU, A2_ALUC0,
	155	A2_L, A2_SHIFTER, A2_LALUC0, A2_M,
	156	A2_R, // 32 R registers
	157	A2_AC3 = A2_R, A2_AC2, A2_AC1, A2_AC0, A2_R04, A2_R05, A2_PC, A2_R07,
	158	A2_R10, A2_R11, A2_R12, A2_R13, A2_R14, A2_R15, A2_R16, A2_R17,
	159	A2_R20, A2_R21, A2_R22, A2_R23, A2_R24, A2_R25, A2_R26, A2_R27,
	160	A2_R30, A2_R31, A2_R32, A2_R33, A2_R34, A2_R35, A2_R36, A2_R37,
	161	A2_S, // 32 S registers
	162	A2_S00 = A2_S, A2_S01, A2_S02, A2_S03, A2_S04, A2_S05, A2_S06, A2_S07,
	163	A2_S10, A2_S11, A2_S12, A2_S13, A2_S14, A2_S15, A2_S16, A2_S17,
	164	A2_S20, A2_S21, A2_S22, A2_S23, A2_S24, A2_S25, A2_S26, A2_S27,
	165	A2_S30, A2_S31, A2_S32, A2_S33, A2_S34, A2_S35, A2_S36, A2_S37
160	166	};
161	167
162	168	/**
r26063	r26064
648	654	NEXT0, NEXT1, NEXT2, NEXT3, NEXT4, NEXT5, NEXT6, NEXT7, NEXT8, NEXT9
649	655	};
650	656
651		//! inverted bits in the micro instruction 32 bit word
652		static const UINT32 ALTO2_UCODE_INVERTED = ((1 << (31 - DF1_0)) \| (1 << (31 - DF2_0)) \| (1 << (31 - LOADL)));
653
654	657	//! get the RSEL value from a micro instruction word
655	658	static inline UINT32 MIR_RSEL(UINT32 mir) { return A2_GET32(mir, 32, DRSEL0, DRSEL4); }
656	659
r26063	r26064
970	973	bool m_ram_related[ALTO2_TASKS]; //!< set when task is RAM related
971	974
972	975	UINT64 m_cycle; //!< number of cycles executed in the current slice
973		int m_alto_leave; //!< flag set by timer.c if alto_execute() shall leave its loop
974	976
975	977	UINT64 cycle() { return m_cycle; } //!< return the current CPU cycle
976	978

branches/alto2/src/emu/cpu/alto2/a2roms.c
r0	r26064
	1	#include "alto2.h"
	2	#include "a2roms.h"
	3
	4	#define DEBUG_PROM_LOAD 0 //!< define to 1 to dump PROMs after loading
	5
	6	/**
	7	* @brief return number of 1 bits in a 32 bit value
	8	*
	9	* 32-bit recursive reduction using SWAR,
	10	* but first step is mapping 2-bit values
	11	* into sum of 2 1-bit values in sneaky way.
	12	*/
	13	static UINT32 ones_u32(UINT32 val)
	14	{
	15	val -= ((val >> 1) & 0x55555555);
	16	val = (((val >> 2) & 0x33333333) + (val & 0x33333333));
	17	val = (((val >> 4) + val) & 0x0f0f0f0f);
	18	val += (val >> 8);
	19	val += (val >> 16);
	20	return (val & 0x0000003f);
	21	}
	22
	23	/**
	24	* @brief return the log2 of an integer value
	25	*/
	26	static UINT32 log2_u32(UINT32 val)
	27	{
	28	val \|= (val >> 1);
	29	val \|= (val >> 2);
	30	val \|= (val >> 4);
	31	val \|= (val >> 8);
	32	val \|= (val >> 16);
	33	return ones_u32(val >> 1);
	34	}
	35
	36	/**
	37	* @brief map a number of data or address lines using a lookup table
	38	*
	39	* @param map pointer to an array of values, or NULL for default
	40	* @param lines number of data or address lines
	41	* @param val value to map
	42	* @result returns the remapped value, or just val, if map was NULL
	43	*/
	44	static UINT32 map_lines(const UINT8 *map, int lines, UINT32 val)
	45	{
	46
	47	if (NULL == map)
	48	return val;
	49
	50	UINT32 res = 0;
	51	for (int i = 0; i < lines; i++)
	52	if (val & (1 << i))
	53	res \|= 1 << map[i];
	54	return res;
	55	}
	56
	57	/**
	58	* @brief write to a ROM base + address of type 'type', ANDing with and, ORing with or
	59	*
	60	* @param base ROM base address in memory
	61	* @param type one of 1 for UINT8, 2 for UINT16, 4 for UINT32
	62	* @param addr address offset into base
	63	* @param dand value to AND to contents before ORing
	64	* @param dor value to OR before writing back
	65	*/
	66	static void write_type_and_xor(void *base, int type, UINT32 addr, UINT32 dand, UINT32 dxor)
	67	{
	68
	69	switch (type) {
	70	case sizeof(UINT8):
	71	{
	72	UINT8 base8 = reinterpret_cast<UINT8 >(base);
	73	base8[addr] = (base8[addr] & dand) ^ dxor;
	74	}
	75	break;
	76	case sizeof(UINT16):
	77	{
	78	UINT16 base16 = reinterpret_cast<UINT16 >(base);
	79	base16[addr] = (base16[addr] & dand) ^ dxor;
	80	}
	81	break;
	82	case sizeof(UINT32):
	83	{
	84	UINT32 base32 = reinterpret_cast<UINT32 >(base);
	85	base32[addr] = (base32[addr] & dand) ^ dxor;
	86	}
	87	break;
	88	default:
	89	fatalerror("write_type_and_xor() invalid type size (%d) in ROM definitions\n", type);
	90	}
	91	}
	92
	93	UINT8* prom_load(const device_t* device, const prom_load_t* prom, UINT8* src, int pages, int segments)
	94	{
	95	void* array = 0;
	96	size_t type = prom->type;
	97	size_t size = prom->size;
	98	#if DEBUG_PROM_LOAD
	99	UINT8 width = prom->width;
	100	#endif
	101
	102	switch (type) {
	103	case sizeof(UINT8):
	104	array = auto_alloc_array(device->machine(), UINT8, pages * size);
	105	break;
	106	case sizeof(UINT16):
	107	array = auto_alloc_array(device->machine(), UINT16, pages * size);
	108	break;
	109	case sizeof(UINT32):
	110	array = auto_alloc_array(device->machine(), UINT32, pages * size);
	111	break;
	112	}
	113
	114	UINT8* dst = reinterpret_cast<UINT8*>(array);
	115	for (int page = 0; page < pages; page++)
	116	{
	117	for (int segment = 0; segment < segments; segment++, prom++)
	118	{
	119	for (UINT32 src_addr = 0; src_addr < prom->size; src_addr++)
	120	{
	121	// map destination address lines
	122	UINT32 dst_addr = map_lines(prom->amap, log2_u32(prom->size) + 1, src_addr);
	123	// fetch data bits
	124	UINT32 data = src[src_addr ^ prom->axor] ^ prom->dxor;
	125	// mask width bits
	126	data = data & ((1 << prom->width) - 1);
	127	// map destination data lines
	128	data = map_lines(prom->dmap, prom->width, data);
	129	// shift to destination position
	130	data = data << prom->shift;
	131	// and destination width dand then xor data
	132	write_type_and_xor(dst, prom->type, dst_addr, prom->dand, data);
	133	}
	134	src += prom->size;
	135	}
	136	dst += prom->type * prom->size;
	137	}
	138
	139	#if DEBUG_PROM_LOAD
	140	switch (type) {
	141	case sizeof(UINT8):
	142	{
	143	UINT8* data = reinterpret_cast<UINT8*>(array);
	144	for (int addr = 0; addr < size; addr++) {
	145	if (0 == (addr % 16))
	146	printf("%04x:", addr);
	147	if (width <= 4)
	148	printf(" %x", data[addr]);
	149	else
	150	printf(" %02x", data[addr]);
	151	if (15 == (addr % 16))
	152	printf("\n");
	153	}
	154	}
	155	break;
	156	case sizeof(UINT16):
	157	{
	158	UINT16* data = reinterpret_cast<UINT16*>(array);
	159	for (int addr = 0; addr < size; addr++) {
	160	if (0 == (addr % 8))
	161	printf("%04x:", addr);
	162	printf(" %04x", data[addr]);
	163	if (7 == (addr % 8))
	164	printf("\n");
	165	}
	166	}
	167	break;
	168	case sizeof(UINT32):
	169	{
	170	UINT32* data = reinterpret_cast<UINT32*>(array);
	171	for (int addr = 0; addr < size; addr++) {
	172	if (0 == (addr % 4))
	173	printf("%04x:", addr);
	174	printf(" %08x", data[addr]);
	175	if (3 == (addr % 4))
	176	printf("\n");
	177	}
	178	}
	179	break;
	180	}
	181	#endif
	182	return reinterpret_cast<UINT8 *>(array);
	183	}

Property changes on: branches/alto2/src/emu/cpu/alto2/a2roms.c
Added: svn:mime-type + text/plain Added: svn:eol-style + native

branches/alto2/src/emu/cpu/cpu.mak
r26063	r26064
2292	2292	$(CPUOBJ)/alto2/a2mouse.o \
2293	2293	$(CPUOBJ)/alto2/a2mrt.o \
2294	2294	$(CPUOBJ)/alto2/a2part.o \
2295		$(CPUOBJ)/alto2/a2ram.o
	2295	$(CPUOBJ)/alto2/a2ram.o \
	2296	$(CPUOBJ)/alto2/a2roms.o
2296	2297
2297	2298	DASMOBJS += $(CPUOBJ)/alto2/alto2dsm.o
2298	2299	endif
r26063	r26064
2348	2349	$(CPUOBJ)/alto2/a2ram.o: $(CPUSRC)/alto2/a2ram.c \
2349	2350	$(CPUSRC)/alto2/alto2.h
2350	2351
	2352	$(CPUOBJ)/alto2/a2roms.o: $(CPUSRC)/alto2/a2roms.c \
	2353	$(CPUSRC)/alto2/a2roms.h \
	2354	$(CPUSRC)/alto2/alto2.h
	2355
2351	2356	$(CPUOBJ)/alto2/alto2dsm.o: $(CPUSRC)/alto2/alto2dsm.c \
2352	2357	$(CPUSRC)/alto2/alto2.h

branches/alto2/src/emu/romload.h
r26063	r26064
102	102	#define ROM_NIBBLE ROM_BITWIDTH(4)
103	103	#define ROM_FULLBYTE ROM_BITWIDTH(8)
104	104
105		#define ROM_BITSHIFTMASK 0x01f00000 /* left-shift count for the bits */
106		#define ROM_BITSHIFT(n) (((n) & 31) << 20)
	105	#define ROM_BITSHIFTMASK 0x00f00000 /* left-shift count for the bits */
	106	#define ROM_BITSHIFT(n) (((n) & 15) << 20)
107	107	#define ROM_NOSHIFT ROM_BITSHIFT(0)
108	108	#define ROM_SHIFT_NIBBLE_LO ROM_BITSHIFT(0)
109	109	#define ROM_SHIFT_NIBBLE_HI ROM_BITSHIFT(4)
110	110
111		#define ROM_BIOSFLAGSMASK 0xfe000000 /* only loaded if value matches global bios value */
112		#define ROM_BIOS(n) (((n) & 127) << 25)
	111	#define ROM_BIOSFLAGSMASK 0xff000000 /* only loaded if value matches global bios value */
	112	#define ROM_BIOS(n) (((n) & 255) << 24)
113	113
114	114	#define ROM_INHERITEDFLAGS (ROM_GROUPMASK \| ROM_SKIPMASK \| ROM_REVERSEMASK \| ROM_BITWIDTHMASK \| ROM_BITSHIFTMASK \| ROM_BIOSFLAGSMASK)
115	115
r26063	r26064
183	183	#define ROM_GETBITWIDTH(r) (((ROM_GETFLAGS(r) & ROM_BITWIDTHMASK) >> 16) + 8 * ((ROM_GETFLAGS(r) & ROM_BITWIDTHMASK) == 0))
184	184	#define ROM_GETBITSHIFT(r) ((ROM_GETFLAGS(r) & ROM_BITSHIFTMASK) >> 20)
185	185	#define ROM_INHERITSFLAGS(r) ((ROM_GETFLAGS(r) & ROM_INHERITFLAGSMASK) == ROM_INHERITFLAGS)
186		#define ROM_GETBIOSFLAGS(r) ((ROM_GETFLAGS(r) & ROM_BIOSFLAGSMASK) >> 25)
	186	#define ROM_GETBIOSFLAGS(r) ((ROM_GETFLAGS(r) & ROM_BIOSFLAGSMASK) >> 24)
187	187
188	188
189	189	/* ----- per-disk macros ----- */

branches/alto2/src/mess/drivers/alto2.c
r26063	r26064
9	9	***************************************************************************/
10	10
11	11	#include "includes/alto2.h"
	12	#include "cpu/alto2/alto2.h"
	13	#include "cpu/alto2/a2roms.h"
12	14
13	15
14	16	// FIXME: Is this required? How to access the address space dwords?
r26063	r26064
61	63
62	64	/* constant PROM with 256 16-bit words */
63	65	static ADDRESS_MAP_START( alto2_const_map, AS_DATA, 16, alto2_state )
64		AM_RANGE(0, ~~0377~~) AM_ROM
	66	AM_RANGE(0, ALTO2_CONST_SIZE-1) AM_ROM
65	67	ADDRESS_MAP_END
66	68
67	69	/* main memory and memory mapped i/o in range ALTO2_IO_PAGE_BASE ... ALTO2_IO_PAGE_BASE + ALTO2_IO_PAGE_SIZE - 1 */
r26063	r26064
83	85
84	86	}
85	87
86		/* Driver Init */
87
88		DRIVER_INIT_MEMBER( alto2_state, alto2 )
89		{
90
91		}
92
93
94	88	/* Input Ports */
95	89
96	90	/** @brief make an Alto key int from 1 << bit */
r26063	r26064
306	300	/* ROMs */
307	301
308	302	ROM_START( alto2 )
309		// micro code PROMs, 8 x 4bit
310		ROM_REGION( 4*ALTO2_UCODE_SIZE, "maincpu", ROMREGION_INVERT )
311		ROMX_LOAD( "62x.3", 00000, 02000, CRC(1b20a63f) SHA1(41dc86438e91c12b0fe42ffcce6b2ac2eb9e714a), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 0)) //!< 00000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
312		ROMX_LOAD( "61x.3", 00000, 02000, CRC(f25bcb2d) SHA1(acb57f3104a8dc4ba750dd1bf22ccc81cce9f084), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 4)) //!< 00000-01777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
313		ROMX_LOAD( "60x.3", 00000, 02000, CRC(a35de0bf) SHA1(7fa4aead44dcf5393bbfd1706c0ada24aa6fd3ac), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 8)) //!< 00000-01777 LOADT',LOADL,NEXT(0)',NEXT(1)'
314		ROMX_LOAD( "53x.3", 00000, 02000, CRC(3c89a740) SHA1(95d812d489b2bde03884b2f126f961caa6c8ec45), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(12)) //!< 00000-01777 F2(0),F2(1)',F2(2)',F2(3)'
315		ROMX_LOAD( "63x.3", 00000, 02000, CRC(f22d5028) SHA1(c65a42baef702d4aff2d9ad8e363daec27de6801), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(16)) //!< 00000-01777 F1(0),F1(1)',F1(2)',F1(3)'
316		ROMX_LOAD( "65x.3", 00000, 02000, CRC(741d1437) SHA1(01f7cf07c2173ac93799b2475180bfbbe7e0149b), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(20)) //!< 00000-01777 ALUF(3)',BS(0)',BS(1)',BS(2)'
317		ROMX_LOAD( "64x.3", 00000, 02000, CRC(51b444c0) SHA1(8756e51f7f3253a55d75886465beb7ee1be6e1c4), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(24)) //!< 00000-01777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
318		ROMX_LOAD( "55x.3", 00000, 02000, CRC(de870d75) SHA1(2b98cc769d8302cb39948711424d987d94e4159b), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(28)) //!< 00000-01777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
	303	// FIXME: how to allocate initally empty regions for AS_PROGRAM, AS_DATA and AS_IO?
	304	ROM_REGION( 4*ALTO2_UCODE_SIZE, "maincpu", 0)
	305	ROM_REGION( 2*ALTO2_CONST_SIZE, "data", 0)
	306	ROM_REGION( ALTO2_RAM_SIZE, "ram", 0 )
319	307
	308	// Alto-II micro code PROMs, 8 x 4bit
	309	ROM_REGION( 16 * 02000, "ucode", 0 )
	310	ROM_LOAD( "55x.3", 0*02000, 0x400, CRC(de870d75) SHA1(2b98cc769d8302cb39948711424d987d94e4159b) ) //!< 00000-01777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
	311	ROM_LOAD( "64x.3", 1*02000, 0x400, CRC(51b444c0) SHA1(8756e51f7f3253a55d75886465beb7ee1be6e1c4) ) //!< 00000-01777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
	312	ROM_LOAD( "65x.3", 2*02000, 0x400, CRC(741d1437) SHA1(01f7cf07c2173ac93799b2475180bfbbe7e0149b) ) //!< 00000-01777 ALUF(3)',BS(0)',BS(1)',BS(2)'
	313	ROM_LOAD( "63x.3", 3*02000, 0x400, CRC(f22d5028) SHA1(c65a42baef702d4aff2d9ad8e363daec27de6801) ) //!< 00000-01777 F1(0),F1(1)',F1(2)',F1(3)'
	314	ROM_LOAD( "53x.3", 4*02000, 0x400, CRC(3c89a740) SHA1(95d812d489b2bde03884b2f126f961caa6c8ec45) ) //!< 00000-01777 F2(0),F2(1)',F2(2)',F2(3)'
	315	ROM_LOAD( "60x.3", 5*02000, 0x400, CRC(a35de0bf) SHA1(7fa4aead44dcf5393bbfd1706c0ada24aa6fd3ac) ) //!< 00000-01777 LOADT',LOADL,NEXT(0)',NEXT(1)'
	316	ROM_LOAD( "61x.3", 6*02000, 0x400, CRC(f25bcb2d) SHA1(acb57f3104a8dc4ba750dd1bf22ccc81cce9f084) ) //!< 00000-01777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
	317	ROM_LOAD( "62x.3", 7*02000, 0x400, CRC(1b20a63f) SHA1(41dc86438e91c12b0fe42ffcce6b2ac2eb9e714a) ) //!< 00000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
	318
320	319	// extended memory Mesa 5.1 micro code PROMs, 8 x 4bit
321		ROMX_LOAD( "xm51.u72", 02000, 02000, CRC(a28e5251) SHA1(44dd8ad4ad56541b5394d30ce3521b4d1d561394), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 0)) //!< 00000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
322		ROMX_LOAD( "xm51.u71", 02000, 02000, CRC(7283bf71) SHA1(819fdcc407ed0acdd8f12b02db6efbcab7bec19a), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 4)) //!< 00000-01777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
323		ROMX_LOAD( "xm51.u70", 02000, 02000, CRC(5c64ee54) SHA1(0eb16d1b5e5967be7c1bf8c8ef6efdf0518a752c), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 8)) //!< 00000-01777 LOADT',LOADL,NEXT(0)',NEXT(1)'
324		ROMX_LOAD( "xm51.u52", 02000, 02000, CRC(0a31eec8) SHA1(4e2ad5daa5e6a6f2143ee4de00c7b625d096fb02), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(12)) //!< 00000-01777 F2(0),F2(1)',F2(2)',F2(3)'
325		ROMX_LOAD( "xm51.u73", 02000, 02000, CRC(6c20fa46) SHA1(a054330c65048011f12209aaed5c6da73d95f029), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(16)) //!< 00000-01777 F1(0),F1(1)',F1(2)',F1(3)'
326		ROMX_LOAD( "xm51.u75", 02000, 02000, CRC(dfe3e3ac) SHA1(246fd29f92150a5d5d7627fbb4f2504c7b6cd5ec), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(20)) //!< 00000-01777 ALUF(3)',BS(0)',BS(1)',BS(2)'
327		ROMX_LOAD( "xm51.u74", 02000, 02000, CRC(be8224f2) SHA1(ea9abcc3832b26a094319796901237e1e3f238b6), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(24)) //!< 00000-01777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
328		ROMX_LOAD( "xm51.u54", 02000, 02000, CRC(11086ae9) SHA1(c394e3fadbfb91801ddc1a70cb25dc6f606c4f76), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(28)) //!< 00000-01777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
	320	ROM_LOAD( "xm51.u54", 8*02000, 02000, CRC(11086ae9) SHA1(c394e3fadbfb91801ddc1a70cb25dc6f606c4f76) ) //!< 00000-01777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
	321	ROM_LOAD( "xm51.u74", 9*02000, 02000, CRC(be8224f2) SHA1(ea9abcc3832b26a094319796901237e1e3f238b6) ) //!< 00000-01777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
	322	ROM_LOAD( "xm51.u75", 10*02000, 02000, CRC(dfe3e3ac) SHA1(246fd29f92150a5d5d7627fbb4f2504c7b6cd5ec) ) //!< 00000-01777 ALUF(3)',BS(0)',BS(1)',BS(2)'
	323	ROM_LOAD( "xm51.u73", 11*02000, 02000, CRC(6c20fa46) SHA1(a054330c65048011f12209aaed5c6da73d95f029) ) //!< 00000-01777 F1(0),F1(1)',F1(2)',F1(3)'
	324	ROM_LOAD( "xm51.u52", 12*02000, 02000, CRC(0a31eec8) SHA1(4e2ad5daa5e6a6f2143ee4de00c7b625d096fb02) ) //!< 00000-01777 F2(0),F2(1)',F2(2)',F2(3)'
	325	ROM_LOAD( "xm51.u70", 13*02000, 02000, CRC(5c64ee54) SHA1(0eb16d1b5e5967be7c1bf8c8ef6efdf0518a752c) ) //!< 00000-01777 LOADT',LOADL,NEXT(0)',NEXT(1)'
	326	ROM_LOAD( "xm51.u71", 14*02000, 02000, CRC(7283bf71) SHA1(819fdcc407ed0acdd8f12b02db6efbcab7bec19a) ) //!< 00000-01777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
	327	ROM_LOAD( "xm51.u72", 15*02000, 02000, CRC(a28e5251) SHA1(44dd8ad4ad56541b5394d30ce3521b4d1d561394) ) //!< 00000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
329	328
330	329	// constant PROMs, 4 x 4bit
331	330	// UINT16 src = BITS(addr, 3,2,1,4,5,6,7,0);
332		ROM_REGION( 0400, "const", ROMREGION_INVERT )
333		ROMX_LOAD( "madr.a3", 00000, 00400, CRC(e0992757) SHA1(5c45ea824970663cb9ee672dc50861539c860249), ROM_NIBBLE \| ROM_GROUPWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 0)) //!< 0000-0377 C(12)',C(13)',C(14)',C(15)'
334		ROMX_LOAD( "madr.a4", 00000, 00400, CRC(b957e490) SHA1(c72660ad3ada4ca0ed8697c6bb6275a4fe703184), ROM_NIBBLE \| ROM_GROUPWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 4)) //!< 0000-0377 C(08)',C(09)',C(10)',C(11)'
335		ROMX_LOAD( "madr.a5", 00000, 00400, CRC(42336101) SHA1(c77819cf40f063af3abf66ea43f17cc1a62e928b), ROM_NIBBLE \| ROM_GROUPWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 8)) //!< 0000-0377 C(04)',C(05)',C(06)',C(07)'
336		ROMX_LOAD( "madr.a6", 00000, 00400, CRC(c2c196b2) SHA1(8b2a599ac839ec2a070dbfef2f1626e645c858ca), ROM_NIBBLE \| ROM_GROUPWORD \| ROM_NOSKIP \| ROM_BITSHIFT(12)) //!< 0000-0377 C(00)',C(01)',C(02)',C(03)'
	331	ROM_REGION( 4 * 0400, "const", 0 )
	332	ROM_LOAD( "madr.a6", 0*00400, 00400, CRC(c2c196b2) SHA1(8b2a599ac839ec2a070dbfef2f1626e645c858ca) ) //!< 0000-0377 C(00)',C(01)',C(02)',C(03)'
	333	ROM_LOAD( "madr.a5", 1*00400, 00400, CRC(42336101) SHA1(c77819cf40f063af3abf66ea43f17cc1a62e928b) ) //!< 0000-0377 C(04)',C(05)',C(06)',C(07)'
	334	ROM_LOAD( "madr.a4", 2*00400, 00400, CRC(b957e490) SHA1(c72660ad3ada4ca0ed8697c6bb6275a4fe703184) ) //!< 0000-0377 C(08)',C(09)',C(10)',C(11)'
	335	ROM_LOAD( "madr.a3", 3*00400, 00400, CRC(e0992757) SHA1(5c45ea824970663cb9ee672dc50861539c860249) ) //!< 0000-0377 C(12)',C(13)',C(14)',C(15)'
337	336
338		ROM_REGION( ALTO2_RAM_SIZE, "ram", 0 )
339
340	337	// extended memory Mesa 4.1 (?) micro code PROMs, 8 x 4bit (unused)
341		ROM_REGION32_BE( 02000, "xm_mesa_4.1", ROMREGION_INVERT )
342		ROMX_LOAD( "xm672.41", 00000, 02000, CRC(110ee075) SHA1(bb72fceba5ce9e5e8c8a0024915006bdd011a3f3), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 0)) //!< 00000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
343		ROMX_LOAD( "xm671.41", 00000, 02000, CRC(f21b1ad7) SHA1(1e18bdb35de7802892ac373c128f900786d40886), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 4)) //!< 00000-01777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
344		ROMX_LOAD( "xm670.41", 00000, 02000, CRC(1cd187f3) SHA1(0fd5eff7c6b5c2383aa20148a795b80286554675), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT( 8)) //!< 00000-01777 LOADT',LOADL,NEXT(0)',NEXT(1)'
345		ROMX_LOAD( "xm652.41", 00000, 02000, CRC(ddfa94bb) SHA1(38625e269400aaf38cd07b5dbf36c0087a0f1b92), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(12)) //!< 00000-01777 F2(0),F2(1)',F2(2)',F2(3)'
346		ROMX_LOAD( "xm673.41", 00000, 02000, CRC(8173d7e3) SHA1(7fbacf6dccb60dfe9cef88a248c3a1660efddcf4), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(16)) //!< 00000-01777 F1(0),F1(1)',F1(2)',F1(3)'
347		ROMX_LOAD( "xm675.41", 00000, 02000, CRC(26eac1e7) SHA1(9220a1386afae8de96bdb2cf084afbadeeb61d42), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(20)) //!< 00000-01777 ALUF(3)',BS(0)',BS(1)',BS(2)'
348		ROMX_LOAD( "xm674.41", 00000, 02000, CRC(7db5c097) SHA1(364bc41951baa3ad274031bd49abec1cf5b7a980), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(24)) //!< 00000-01777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
349		ROMX_LOAD( "xm654.41", 00000, 02000, CRC(beace302) SHA1(0002fea03a0261f57365095c4b87385d833f7063), ROM_NIBBLE \| ROM_GROUPDWORD \| ROM_NOSKIP \| ROM_BITSHIFT(28)) //!< 00000-01777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
	338	ROM_REGION32_BE( 8 * 02000, "xm_mesa_4.1", ROMREGION_INVERT )
	339	ROM_LOAD( "xm654.41", 0*02000, 02000, CRC(beace302) SHA1(0002fea03a0261f57365095c4b87385d833f7063) ) //!< 00000-01777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
	340	ROM_LOAD( "xm674.41", 1*02000, 02000, CRC(7db5c097) SHA1(364bc41951baa3ad274031bd49abec1cf5b7a980) ) //!< 00000-01777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
	341	ROM_LOAD( "xm675.41", 2*02000, 02000, CRC(26eac1e7) SHA1(9220a1386afae8de96bdb2cf084afbadeeb61d42) ) //!< 00000-01777 ALUF(3)',BS(0)',BS(1)',BS(2)'
	342	ROM_LOAD( "xm673.41", 3*02000, 02000, CRC(8173d7e3) SHA1(7fbacf6dccb60dfe9cef88a248c3a1660efddcf4) ) //!< 00000-01777 F1(0),F1(1)',F1(2)',F1(3)'
	343	ROM_LOAD( "xm652.41", 4*02000, 02000, CRC(ddfa94bb) SHA1(38625e269400aaf38cd07b5dbf36c0087a0f1b92) ) //!< 00000-01777 F2(0),F2(1)',F2(2)',F2(3)'
	344	ROM_LOAD( "xm670.41", 5*02000, 02000, CRC(1cd187f3) SHA1(0fd5eff7c6b5c2383aa20148a795b80286554675) ) //!< 00000-01777 LOADT',LOADL,NEXT(0)',NEXT(1)'
	345	ROM_LOAD( "xm671.41", 6*02000, 02000, CRC(f21b1ad7) SHA1(1e18bdb35de7802892ac373c128f900786d40886) ) //!< 00000-01777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
	346	ROM_LOAD( "xm672.41", 7*02000, 02000, CRC(110ee075) SHA1(bb72fceba5ce9e5e8c8a0024915006bdd011a3f3) ) //!< 00000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
350	347	ROM_END
351	348
	349	/**
	350	* @brief list of microcoode PROM loading options
	351	*/
	352	static const prom_load_t ucode_prom_list[] = {
	353	{ // 0000-01777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
	354	"55x.3",
	355	0,
	356	"de870d75",
	357	"2b98cc769d8302cb39948711424d987d94e4159b",
	358	/* size */ ALTO2_UCODE_PAGE_SIZE,
	359	/* amap */ AMAP_DEFAULT,
	360	/* axor */ ALTO2_UCODE_PAGE_MASK,
	361	/* dxor */ 017, // invert D0-D3
	362	/* width */ 4,
	363	/* shift */ 28,
	364	/* dmap */ DMAP_DEFAULT,
	365	/* dand */ ZERO,
	366	/* type */ sizeof(UINT32)
	367	},
	368	{ // 0000-01777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
	369	"64x.3",
	370	0,
	371	"51b444c0",
	372	"8756e51f7f3253a55d75886465beb7ee1be6e1c4",
	373	/* size */ ALTO2_UCODE_PAGE_SIZE,
	374	/* amap */ AMAP_DEFAULT,
	375	/* axor */ ALTO2_UCODE_PAGE_MASK,
	376	/* dxor */ 017, // invert D0-D3
	377	/* width */ 4,
	378	/* shift */ 24,
	379	/* dmap */ DMAP_DEFAULT,
	380	/* dand */ KEEP,
	381	/* type */ sizeof(UINT32)
	382	},
	383	{ // 0000-01777 ALUF(3)',BS(0)',BS(1)',BS(2)'
	384	"65x.3",
	385	0,
	386	"741d1437",
	387	"01f7cf07c2173ac93799b2475180bfbbe7e0149b",
	388	/* size */ ALTO2_UCODE_PAGE_SIZE,
	389	/* amap */ AMAP_DEFAULT,
	390	/* axor */ ALTO2_UCODE_PAGE_MASK,
	391	/* dxor */ 017, // invert D0-D3
	392	/* width */ 4,
	393	/* shift */ 20,
	394	/* dmap */ DMAP_DEFAULT,
	395	/* dand */ KEEP,
	396	/* type */ sizeof(UINT32)
	397	},
	398	{ // 0000-01777 F1(0),F1(1)',F1(2)',F1(3)'
	399	"63x.3",
	400	0,
	401	"f22d5028",
	402	"c65a42baef702d4aff2d9ad8e363daec27de6801",
	403	/* size */ ALTO2_UCODE_PAGE_SIZE,
	404	/* amap */ AMAP_DEFAULT,
	405	/* axor */ ALTO2_UCODE_PAGE_MASK,
	406	/* dxor */ 007, // keep D0, invert D1-D3
	407	/* width */ 4,
	408	/* shift */ 16,
	409	/* dmap */ DMAP_DEFAULT,
	410	/* dand */ KEEP,
	411	/* type */ sizeof(UINT32)
	412	},
	413	{ // 0000-01777 F2(0),F2(1)',F2(2)',F2(3)'
	414	"53x.3",
	415	0,
	416	"3c89a740",
	417	"95d812d489b2bde03884b2f126f961caa6c8ec45",
	418	/* size */ ALTO2_UCODE_PAGE_SIZE,
	419	/* amap */ AMAP_DEFAULT,
	420	/* axor */ ALTO2_UCODE_PAGE_MASK,
	421	/* dxor */ 007, // keep D0, invert D1-D3
	422	/* width */ 4,
	423	/* shift */ 12,
	424	/* dmap */ DMAP_DEFAULT,
	425	/* dand */ KEEP,
	426	/* type */ sizeof(UINT32)
	427	},
	428	{ // 0000-01777 LOADT',LOADL,NEXT(0)',NEXT(1)'
	429	"60x.3",
	430	0,
	431	"a35de0bf",
	432	"7fa4aead44dcf5393bbfd1706c0ada24aa6fd3ac",
	433	/* size */ ALTO2_UCODE_PAGE_SIZE,
	434	/* amap */ AMAP_DEFAULT,
	435	/* axor */ ALTO2_UCODE_PAGE_MASK,
	436	/* dxor */ 013, // invert D0 and D2-D3
	437	/* width */ 4,
	438	/* shift */ 8,
	439	/* dmap */ DMAP_DEFAULT,
	440	/* dand */ KEEP,
	441	/* type */ sizeof(UINT32)
	442	},
	443	{ // 0000-01777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
	444	"61x.3",
	445	0,
	446	"f25bcb2d",
	447	"acb57f3104a8dc4ba750dd1bf22ccc81cce9f084",
	448	/* size */ ALTO2_UCODE_PAGE_SIZE,
	449	/* amap */ AMAP_DEFAULT,
	450	/* axor */ ALTO2_UCODE_PAGE_MASK,
	451	/* dxor */ 017, // invert D0-D3
	452	/* width */ 4,
	453	/* shift */ 4,
	454	/* dmap */ DMAP_DEFAULT,
	455	/* dand */ KEEP,
	456	/* type */ sizeof(UINT32)
	457	},
	458	{ // 0000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
	459	"62x.3",
	460	0,
	461	"1b20a63f",
	462	"41dc86438e91c12b0fe42ffcce6b2ac2eb9e714a",
	463	/* size */ ALTO2_UCODE_PAGE_SIZE,
	464	/* amap */ AMAP_DEFAULT,
	465	/* axor */ ALTO2_UCODE_PAGE_MASK,
	466	/* dxor */ 017, // invert D0-D3
	467	/* width */ 4,
	468	/* shift */ 0,
	469	/* dmap */ DMAP_DEFAULT,
	470	/* dand */ KEEP,
	471	/* type */ sizeof(UINT32)
	472	}
	473
	474	#if (ALTO2_UCODE_ROM_PAGES > 1)
	475	,
	476	{ // 02000-03777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
	477	"xm51.u54",
	478	0,
	479	"11086ae9",
	480	"c394e3fadbfb91801ddc1a70cb25dc6f606c4f76",
	481	/* size */ ALTO2_UCODE_PAGE_SIZE,
	482	/* amap */ AMAP_DEFAULT,
	483	/* axor */ ALTO2_UCODE_PAGE_MASK,
	484	/* dxor */ 017, // invert D0-D3
	485	/* width */ 4,
	486	/* shift */ 28,
	487	/* dmap */ DMAP_DEFAULT,
	488	/* dand */ ZERO,
	489	/* type */ sizeof(UINT32)
	490	},
	491	{ // 02000-03777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
	492	"xm51.u74",
	493	0,
	494	"be8224f2",
	495	"ea9abcc3832b26a094319796901237e1e3f238b6",
	496	/* size */ ALTO2_UCODE_PAGE_SIZE,
	497	/* amap */ AMAP_DEFAULT,
	498	/* axor */ ALTO2_UCODE_PAGE_MASK,
	499	/* dxor */ 017, // invert D0-D3
	500	/* width */ 4,
	501	/* shift */ 24,
	502	/* dmap */ DMAP_DEFAULT,
	503	/* dand */ KEEP,
	504	/* type */ sizeof(UINT32)
	505	},
	506	{ // 02000-03777 ALUF(3)',BS(0)',BS(1)',BS(2)'
	507	"xm51.u75",
	508	0,
	509	"dfe3e3ac",
	510	"246fd29f92150a5d5d7627fbb4f2504c7b6cd5ec",
	511	/* size */ ALTO2_UCODE_PAGE_SIZE,
	512	/* amap */ AMAP_DEFAULT,
	513	/* axor */ ALTO2_UCODE_PAGE_MASK,
	514	/* dxor */ 017, // invert D0-D3
	515	/* width */ 4,
	516	/* shift */ 20,
	517	/* dmap */ DMAP_DEFAULT,
	518	/* dand */ KEEP,
	519	/* type */ sizeof(UINT32)
	520	},
	521	{ // 02000-03777 F1(0),F1(1)',F1(2)',F1(3)'
	522	"xm51.u73",
	523	0,
	524	"6c20fa46",
	525	"a054330c65048011f12209aaed5c6da73d95f029",
	526	/* size */ ALTO2_UCODE_PAGE_SIZE,
	527	/* amap */ AMAP_DEFAULT,
	528	/* axor */ ALTO2_UCODE_PAGE_MASK,
	529	/* dxor */ 007, // keep D0, invert D1-D3
	530	/* width */ 4,
	531	/* shift */ 16,
	532	/* dmap */ DMAP_DEFAULT,
	533	/* dand */ KEEP,
	534	/* type */ sizeof(UINT32)
	535	},
	536	{ // 02000-03777 F2(0),F2(1)',F2(2)',F2(3)'
	537	"xm51.u52",
	538	0,
	539	"0a31eec8",
	540	"4e2ad5daa5e6a6f2143ee4de00c7b625d096fb02",
	541	/* size */ ALTO2_UCODE_PAGE_SIZE,
	542	/* amap */ AMAP_DEFAULT,
	543	/* axor */ ALTO2_UCODE_PAGE_MASK,
	544	/* dxor */ 007, // keep D0, invert D1-D3
	545	/* width */ 4,
	546	/* shift */ 12,
	547	/* dmap */ DMAP_DEFAULT,
	548	/* dand */ KEEP,
	549	/* type */ sizeof(UINT32)
	550	},
	551	{ // 02000-03777 LOADT',LOADL,NEXT(0)',NEXT(1)'
	552	"xm51.u70",
	553	0,
	554	"5c64ee54",
	555	"0eb16d1b5e5967be7c1bf8c8ef6efdf0518a752c",
	556	/* size */ ALTO2_UCODE_PAGE_SIZE,
	557	/* amap */ AMAP_DEFAULT,
	558	/* axor */ ALTO2_UCODE_PAGE_MASK,
	559	/* dxor */ 013, // invert D0 and D2-D3
	560	/* width */ 4,
	561	/* shift */ 8,
	562	/* dmap */ DMAP_DEFAULT,
	563	/* dand */ KEEP,
	564	/* type */ sizeof(UINT32)
	565	},
	566	{ // 02000-03777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
	567	"xm51.u71",
	568	0,
	569	"7283bf71",
	570	"819fdcc407ed0acdd8f12b02db6efbcab7bec19a",
	571	/* size */ ALTO2_UCODE_PAGE_SIZE,
	572	/* amap */ AMAP_DEFAULT,
	573	/* axor */ ALTO2_UCODE_PAGE_MASK,
	574	/* dxor */ 017, // invert D0-D3
	575	/* width */ 4,
	576	/* shift */ 4,
	577	/* dmap */ DMAP_DEFAULT,
	578	/* dand */ KEEP,
	579	/* type */ sizeof(UINT32)
	580	},
	581	{ // 02000-03777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
	582	"xm51.u72",
	583	0,
	584	"a28e5251",
	585	"44dd8ad4ad56541b5394d30ce3521b4d1d561394",
	586	/* size */ ALTO2_UCODE_PAGE_SIZE,
	587	/* amap */ AMAP_DEFAULT,
	588	/* axor */ ALTO2_UCODE_PAGE_MASK,
	589	/* dxor */ 017, // invert D0-D3
	590	/* width */ 4,
	591	/* shift */ 0,
	592	/* dmap */ DMAP_DEFAULT,
	593	/* dand */ KEEP,
	594	/* type */ sizeof(UINT32)
	595	}
	596	#endif // (UCODE_ROM_PAGES > 1)
	597	};
	598
	599	static const prom_load_t const_prom_list[] = {
	600	{ // constant prom D0-D3
	601	"madr.a6",
	602	"c3.3",
	603	"c2c196b2",
	604	"8b2a599ac839ec2a070dbfef2f1626e645c858ca",
	605	/* size */ ALTO2_CONST_SIZE,
	606	/* amap */ AMAP_CONST_PROM, // descramble constant address
	607	/* axor */ 0,
	608	/* dxor */ 017, // invert D0-D3
	609	/* width */ 4,
	610	/* shift */ 0,
	611	/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
	612	/* dand */ ZERO,
	613	/* type */ sizeof(UINT16)
	614	},
	615	{ // constant prom D4-D7
	616	"madr.a5",
	617	"c2.3",
	618	"42336101",
	619	"c77819cf40f063af3abf66ea43f17cc1a62e928b",
	620	/* size */ ALTO2_CONST_SIZE,
	621	/* amap */ AMAP_CONST_PROM, // descramble constant address
	622	/* axor */ 0,
	623	/* dxor */ 017, // invert D0-D3
	624	/* width */ 4,
	625	/* shift */ 4,
	626	/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
	627	/* dand */ KEEP,
	628	/* type */ sizeof(UINT16)
	629	},
	630	{ // constant prom D8-D11
	631	"madr.a4",
	632	"c1.3",
	633	"b957e490",
	634	"c72660ad3ada4ca0ed8697c6bb6275a4fe703184",
	635	/* size */ ALTO2_CONST_SIZE,
	636	/* amap */ AMAP_CONST_PROM, // descramble constant address
	637	/* axor */ 0,
	638	/* dxor */ 017, // invert D0-D3
	639	/* width */ 4,
	640	/* shift */ 8,
	641	/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
	642	/* dand */ KEEP,
	643	/* type */ sizeof(UINT16)
	644	},
	645	{ // constant PROM D12-D15
	646	"madr.a3",
	647	"c0.3",
	648	"e0992757",
	649	"5c45ea824970663cb9ee672dc50861539c860249",
	650	/* size */ ALTO2_CONST_SIZE,
	651	/* amap */ AMAP_CONST_PROM, // descramble constant address
	652	/* axor */ 0,
	653	/* dxor */ 017, // invert D0-D3
	654	/* width */ 4,
	655	/* shift */ 12,
	656	/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
	657	/* dand */ KEEP,
	658	/* type */ sizeof(UINT16)
	659	}
	660	};
	661
	662	/* Driver Init */
	663
	664	DRIVER_INIT_MEMBER( alto2_state, alto2 )
	665	{
	666	UINT32* maincpu = reinterpret_cast<UINT32 *>(memregion("maincpu")->base());
	667	for (UINT32 addr = 0; addr < ALTO2_UCODE_SIZE; addr++)
	668	maincpu[addr] = ALTO2_UCODE_INVERTED;
	669
	670	UINT8* ucode_prom = prom_load(this, ucode_prom_list, memregion("ucode")->base(), 2, 8);
	671	memcpy(memregion("maincpu")->base(), ucode_prom, ALTO2_UCODE_RAM_BASE);
	672
	673	UINT8* const_prom = prom_load(this, const_prom_list, memregion("const")->base(), 1, 4);
	674	memcpy(memregion("data")->base(), const_prom, ALTO2_CONST_SIZE);
	675	}
	676
352	677	/* Game Drivers */
353	678
354	679	// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS

branches/alto2/src/mess/includes/alto2.h
r26063	r26064
18	18	: driver_device(mconfig, type, tag),
19	19	m_maincpu(*this, "maincpu"),
20	20	m_region_ucode(*this, "maincpu"),
21		m_region_const(*this, "~~cons~~t"),
	21	m_region_const(*this, "data"),
22	22	m_region_ram(*this, "ram"),
23	23	m_io_row0(*this, "ROW0"),
24	24	m_io_row1(*this, "ROW1"),

199869 Revisions