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r25472 Tuesday 1st October, 2013 at 11:01:16 UTC by Barry Rodewald
wpc_an: added ROM banking, switches, and IRQs.  Games now start to boot.
[src/mame]mame.mak
[src/mame/drivers]wpc_an.c
[src/mame/layout]wpc_an.lay*

trunk/src/mame/mame.mak
r25471r25472
26612661         $(LAYOUT)/navarone.lh \
26622662         $(LAYOUT)/sos.lh
26632663
2664$(DRIVERS)/wpc_an.o:    $(LAYOUT)/wpc_an.lh
2665
26642666$(DRIVERS)/wecleman.o:  $(LAYOUT)/wecleman.lh
26652667
26662668$(DRIVERS)/wico.o:  $(LAYOUT)/wico.lh
trunk/src/mame/layout/wpc_an.lay
r0r25472
1<!-- wpc_an.lay -->
2
3<!-- 2013-10-01: Initial version. -->
4
5<mamelayout version="2">
6
7   <element name="digit" defstate="0">
8      <led14segsc>
9         <color red="1.0" green="0.0" blue="0.0" />
10      </led14segsc>
11   </element>
12   <element name="ldigit" defstate="0">
13      <led7seg>
14         <color red="1.0" green="0.0" blue="0.0" />
15      </led7seg>
16   </element>
17   <element name="diagled" defstate="0">
18      <disk>
19         <color red="1.0" green="0.0" blue="0.0" />
20      </disk>
21   </element>
22   <element name="background">
23      <rect>
24         <bounds left="0" top="0" right="1" bottom="1" />
25         <color red="0.0" green="0.0" blue="0.0" />
26      </rect>
27   </element>
28   <element name="P3"><text string="Player 1"><color red="1.0" green="1.0" blue="1.0" /></text></element>
29   <element name="P4"><text string="Player 2"><color red="1.0" green="1.0" blue="1.0" /></text></element>
30   <element name="P5"><text string="Player 3"><color red="1.0" green="1.0" blue="1.0" /></text></element>
31   <element name="P6"><text string="Player 4"><color red="1.0" green="1.0" blue="1.0" /></text></element>
32
33   <view name="Default Layout">
34
35      <!-- Background -->
36      <backdrop element="background">
37         <bounds left="0" top="20" right="318" bottom="394" />
38      </backdrop>
39
40      <!-- LEDs -->
41
42      <!-- Player 1 Score -->
43      <bezel name="digit0" element="digit">
44         <bounds left="10" top="45" right="30" bottom="84" />
45      </bezel>
46      <bezel name="digit1" element="digit">
47         <bounds left="34" top="45" right="54" bottom="84" />
48      </bezel>
49      <bezel name="digit2" element="digit">
50         <bounds left="58" top="45" right="78" bottom="84" />
51      </bezel>
52      <bezel name="digit3" element="digit">
53         <bounds left="82" top="45" right="102" bottom="84" />
54      </bezel>
55      <bezel name="digit4" element="digit">
56         <bounds left="106" top="45" right="126" bottom="84" />
57      </bezel>
58      <bezel name="digit5" element="digit">
59         <bounds left="130" top="45" right="150" bottom="84" />
60      </bezel>
61      <bezel name="digit6" element="digit">
62         <bounds left="154" top="45" right="174" bottom="84" />
63      </bezel>
64      <bezel name="digit7" element="digit">
65         <bounds left="178" top="45" right="198" bottom="84" />
66      </bezel>
67
68      <!-- Player 2 Score -->
69      <bezel name="digit8" element="digit">
70         <bounds left="202" top="45" right="222" bottom="84" />
71      </bezel>
72      <bezel name="digit9" element="digit">
73         <bounds left="226" top="45" right="246" bottom="84" />
74      </bezel>
75      <bezel name="digit10" element="digit">
76         <bounds left="250" top="45" right="270" bottom="84" />
77      </bezel>
78      <bezel name="digit11" element="digit">
79         <bounds left="274" top="45" right="294" bottom="84" />
80      </bezel>
81      <bezel name="digit12" element="digit">
82         <bounds left="298" top="45" right="318" bottom="84" />
83      </bezel>
84      <bezel name="digit13" element="digit">
85         <bounds left="322" top="45" right="342" bottom="84" />
86      </bezel>
87      <bezel name="digit14" element="digit">
88         <bounds left="346" top="45" right="366" bottom="84" />
89      </bezel>
90      <bezel name="digit15" element="digit">
91         <bounds left="370" top="45" right="390" bottom="84" />
92      </bezel>
93
94      <!-- Player 3 Score -->
95      <bezel name="digit16" element="digit">
96         <bounds left="10" top="100" right="30" bottom="139" />
97      </bezel>
98      <bezel name="digit17" element="digit">
99         <bounds left="34" top="100" right="54" bottom="139" />
100      </bezel>
101      <bezel name="digit18" element="digit">
102         <bounds left="58" top="100" right="78" bottom="139" />
103      </bezel>
104      <bezel name="digit19" element="digit">
105         <bounds left="82" top="100" right="102" bottom="139" />
106      </bezel>
107      <bezel name="digit20" element="digit">
108         <bounds left="106" top="100" right="126" bottom="139" />
109      </bezel>
110      <bezel name="digit21" element="digit">
111         <bounds left="130" top="100" right="150" bottom="139" />
112      </bezel>
113      <bezel name="digit22" element="digit">
114         <bounds left="154" top="100" right="174" bottom="139" />
115      </bezel>
116      <bezel name="digit23" element="digit">
117         <bounds left="178" top="100" right="198" bottom="139" />
118      </bezel>
119
120      <!-- Player 4 Score -->
121      <bezel name="digit24" element="digit">
122         <bounds left="202" top="100" right="222" bottom="139" />
123      </bezel>
124      <bezel name="digit25" element="digit">
125         <bounds left="226" top="100" right="246" bottom="139" />
126      </bezel>
127      <bezel name="digit26" element="digit">
128         <bounds left="250" top="100" right="270" bottom="139" />
129      </bezel>
130      <bezel name="digit27" element="digit">
131         <bounds left="274" top="100" right="294" bottom="139" />
132      </bezel>
133      <bezel name="digit28" element="digit">
134         <bounds left="298" top="100" right="318" bottom="139" />
135      </bezel>
136      <bezel name="digit29" element="digit">
137         <bounds left="322" top="100" right="342" bottom="139" />
138      </bezel>
139      <bezel name="digit30" element="digit">
140         <bounds left="346" top="100" right="366" bottom="139" />
141      </bezel>
142      <bezel name="digit31" element="digit">
143         <bounds left="370" top="100" right="390" bottom="139" />
144      </bezel>
145
146      <!-- Credits and Balls -->
147      <bezel name="digit60" element="diagled">
148         <bounds left="200" top="200" right="210" bottom="210" />
149      </bezel>
150   </view>
151</mamelayout>
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Property changes on: trunk/src/mame/layout/wpc_an.lay
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trunk/src/mame/drivers/wpc_an.c
r25471r25472
55
66#include "emu.h"
77#include "cpu/m6809/m6809.h"
8#include "wpc_an.lh"
89
10#define LOG_WPC (1)
11
12/*                                  AMFDS9 */
13/* Printer board */
14#define WPC_PRINTBUSY     (0x10) /* xxxxx  R: Printer ready ??? */
15#define WPC_PRINTDATA     (0x11) /* xxxxx  W: send to printer */
16#define WPC_PRINTDATAX    (0x12) /* xxxxx  W: 0: Printer data available */
17/* Sound board */
18#define WPC_SOUNDIF       (0x2c) /* xxx    RW: Sound board interface */
19#define WPC_SOUNDBACK     (0x2d) /* xxx    RW: R: Sound data availble, W: Reset soundboard ? */
20
21#define WPC_SOLENOID1     (0x30) /* xxxxxx W: Solenoid 25-28 */
22#define WPC_SOLENOID2     (0x31) /* xxxxxx W: Solenoid  1- 8 */
23#define WPC_SOLENOID3     (0x32) /* xxxxxx W: Solenoid 17-24 */
24#define WPC_SOLENOID4     (0x33) /* xxxxxx W: Solenoid  9-16 */
25#define WPC_LAMPROW       (0x34) /* xxxxxx W: Lamp row */
26#define WPC_LAMPCOLUMN    (0x35) /* xxxxxx W: Lamp column enable */
27#define WPC_GILAMPS       (0x36) /*        W: GI lights ?? */
28#define WPC_DIPSWITCH     (0x37) /* xxxxxx R: CPU board dip-switches */
29#define WPC_SWCOINDOOR    (0x38) /* xxxxxx W: Coin door switches */
30#define WPC_SWROWREAD     (0x39) /* xxxx   R: Switch row read */
31#define WPC_SWCOLSELECT   (0x3a) /* xxxx   W: Switch column enable */
32#define WPC_ALPHAPOS      (0x3b) /* x      W: Select alphanumeric position */
33#define WPC_ALPHA1LO      (0x3c) /* x      W: Display 1st row hi bits */
34#define WPC_ALPHA1HI      (0x3d) /* x      W: Display 1st row lo bits */
35#define WPC_ALPHA2LO      (0x3e) /* x      W: Display 2nd row hi bits */
36#define WPC_ALPHA2HI      (0x3f) /* x      W:           b 2nd row lo bits */
37#define WPC_LED           (0x42) /* xxxxxx W: CPU LED (bit 7) */
38#define WPC_IRQACK        (0x43) /*        W: IRQ Ack ??? */
39#define WPC_SHIFTADRH     (0x44) /* xxxxxx RW: See above */
40#define WPC_SHIFTADRL     (0x45) /* xxxxxx RW: See above */
41#define WPC_SHIFTBIT      (0x46) /* xxxxxx RW: See above */
42#define WPC_SHIFTBIT2     (0x47) /* xxxxxx RW: See above */
43#define WPC_RTCHOUR       (0x4a) /* xxxxxx RW: Real time clock: hour */
44#define WPC_RTCMIN        (0x4b) /* xxxxxx RW: Real time clock: minute */
45#define WPC_ROMBANK       (0x4c) /* xxxxxx W: Rombank switch */
46#define WPC_PROTMEM       (0x4d) /* xxxxxx W: enabled/disable protected memory */
47#define WPC_PROTMEMCTRL   (0x4e) /* xxxxxx W: Set protected memory area */
48#define WPC_WATCHDOG      (0x4f) /* xxxxxx W: Watchdog */
49
950class wpc_an_state : public driver_device
1051{
1152public:
1253   wpc_an_state(const machine_config &mconfig, device_type type, const char *tag)
1354      : driver_device(mconfig, type, tag),
14         m_maincpu(*this, "maincpu")
55         m_maincpu(*this, "maincpu"),
56         m_cpubank(*this, "cpubank")
1557   { }
1658
1759protected:
1860
1961   // devices
2062   required_device<cpu_device> m_maincpu;
63   required_memory_bank m_cpubank;
2164
2265   // driver_device overrides
2366   virtual void machine_reset();
67   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
68   static const device_timer_id TIMER_VBLANK = 0;
69   static const device_timer_id TIMER_IRQ = 1;
70   static const device_timer_id TIMER_ZEROCROSS = 2;
2471public:
2572   DECLARE_DRIVER_INIT(wpc_an);
73   DECLARE_READ8_MEMBER(wpc_r);
74   DECLARE_WRITE8_MEMBER(wpc_w);
75private:
76   UINT8 m_alpha_pos;  // selected LED position
77   UINT16 m_alpha_data[40];
78   UINT16 m_vblank_count;
79   UINT32 m_irq_count;
80   UINT8 m_switch_col;  // select switch column
81   bool m_zerocross;
82   UINT8 m_bankmask;
83   emu_timer* m_vblank_timer;
84   emu_timer* m_irq_timer;
85   emu_timer* m_zc_timer;
2686};
2787
2888
2989static ADDRESS_MAP_START( wpc_an_map, AS_PROGRAM, 8, wpc_an_state )
30   AM_RANGE(0x0000, 0xffff) AM_NOP
90   AM_RANGE(0x0000, 0x2fff) AM_RAM
91   AM_RANGE(0x3c00, 0x3faf) AM_RAM
92   AM_RANGE(0x3fb0, 0x3fff) AM_READWRITE(wpc_r,wpc_w) // WPC device
93   AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("cpubank")
94   AM_RANGE(0x8000, 0xffff) AM_ROM
3195ADDRESS_MAP_END
3296
3397static INPUT_PORTS_START( wpc_an )
98   PORT_START("INP0")
99   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
100
101   PORT_START("INP1")
102   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )  // left flipper
103   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )  // right flipper
104   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START )
105   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
106   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER )
107   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER )
108   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER )
109   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER )
110
111   PORT_START("INP2")
112   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A)
113   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S)
114   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D)
115   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER )  // always closed
116   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G)
117   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H)
118   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J)
119   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_K)
120
121   PORT_START("INP4")
122   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L)
123   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z)
124   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C)
125   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V)
126   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B)
127   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N)
128   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M)
129   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_COMMA)
130
131   PORT_START("INP8")
132   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_STOP)
133   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_SLASH)
134   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_COLON)
135   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_QUOTE)
136   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X)
137   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_MINUS)
138   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_EQUALS)
139   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_BACKSPACE)
140
141   PORT_START("INP10")
142   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_OPENBRACE)
143   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_CLOSEBRACE)
144   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_BACKSLASH)
145   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_ENTER)
146   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_LEFT)
147   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_RIGHT)
148   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_UP)
149   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_DOWN)
150
151   PORT_START("INP20")
152   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q)
153   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W)
154   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E)
155   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R)
156   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y)
157   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U)
158   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I)
159   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_O)
160
161   PORT_START("INP40")
162   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_LALT)
163   PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNKNOWN )
164
165   PORT_START("INP80")
166   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
167
168   PORT_START("COIN")
169   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
170   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
171   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
172   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
173   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service / Escape") PORT_CODE(KEYCODE_DEL_PAD)
174   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_CODE(KEYCODE_MINUS_PAD)
175   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_VOLUME_UP ) PORT_CODE(KEYCODE_PLUS_PAD)
176   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Begin Test / Enter") PORT_CODE(KEYCODE_ENTER_PAD)
177
178   PORT_START("DIPS")
179   PORT_DIPNAME(0x01,0x01,"Switch 1") PORT_DIPLOCATION("SWA:1")
180   PORT_DIPSETTING(0x00,DEF_STR( Off ))
181   PORT_DIPSETTING(0x01,DEF_STR( On ))
182   PORT_DIPNAME(0x02,0x02,"Switch 2") PORT_DIPLOCATION("SWA:2")
183   PORT_DIPSETTING(0x00,DEF_STR( Off ))
184   PORT_DIPSETTING(0x02,DEF_STR( On ))
185   PORT_DIPNAME(0x04,0x00,"W20") PORT_DIPLOCATION("SWA:3")
186   PORT_DIPSETTING(0x00,DEF_STR( Off ))
187   PORT_DIPSETTING(0x04,DEF_STR( On ))
188   PORT_DIPNAME(0x08,0x00,"W19") PORT_DIPLOCATION("SWA:4")
189   PORT_DIPSETTING(0x00,DEF_STR( Off ))
190   PORT_DIPSETTING(0x08,DEF_STR( On ))
191   PORT_DIPNAME(0xf0,0x00,"Country") PORT_DIPLOCATION("SWA:5,6,7,8")
192   PORT_DIPSETTING(0x00,"USA 1")
193   PORT_DIPSETTING(0x10,"France 1")
194   PORT_DIPSETTING(0x20,"Germany")
195   PORT_DIPSETTING(0x30,"France 2")
196   PORT_DIPSETTING(0x40,"Unknown 1")
197   PORT_DIPSETTING(0x50,"Unknown 2")
198   PORT_DIPSETTING(0x60,"Unknown 3")
199   PORT_DIPSETTING(0x70,"Unknown 4")
200   PORT_DIPSETTING(0x80,"Export 1")
201   PORT_DIPSETTING(0x90,"France 3")
202   PORT_DIPSETTING(0xa0,"Export 2")
203   PORT_DIPSETTING(0xb0,"France 4")
204   PORT_DIPSETTING(0xc0,"UK")
205   PORT_DIPSETTING(0xd0,"Europe")
206   PORT_DIPSETTING(0xe0,"Spain")
207   PORT_DIPSETTING(0xf0,"USA 2")
208
34209INPUT_PORTS_END
35210
211void wpc_an_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
212{
213   int x;
214   switch(id)
215   {
216   case TIMER_VBLANK:
217      m_vblank_count++;
218      // update LED segments
219      for(x=0;x<16;x++)
220      {
221         output_set_digit_value(x,BITSWAP16(m_alpha_data[x], 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0));
222         output_set_digit_value(x+16,BITSWAP16(m_alpha_data[20+x], 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0));
223      }
224      memset(m_alpha_data,0,40*2);
225      break;
226   case TIMER_IRQ:
227      m_maincpu->set_input_line(M6809_IRQ_LINE,ASSERT_LINE);
228      break;
229   case TIMER_ZEROCROSS:
230      m_zerocross = true;
231      break;
232   }
233}
234
235READ8_MEMBER(wpc_an_state::wpc_r)
236{
237   UINT8 ret = 0x00;
238   char kbdrow[8];
239
240   switch(offset)
241   {
242   case WPC_WATCHDOG:
243      if(m_zerocross)
244      {
245         ret |= 0x80;
246         m_irq_count = 0;
247      }
248      m_zerocross = false;
249      break;
250   case WPC_SWROWREAD:
251      sprintf(kbdrow,"INP%X",(m_switch_col));
252      ret = ~ioport(kbdrow)->read();
253      break;
254   case WPC_SWCOINDOOR:
255      ret = ~ioport("COIN")->read();
256      break;
257   case WPC_DIPSWITCH:
258      ret = ioport("DIPS")->read();
259      break;
260   }
261   return ret;
262}
263
264WRITE8_MEMBER(wpc_an_state::wpc_w)
265{
266   switch(offset)
267   {
268   case WPC_ROMBANK:
269      m_cpubank->set_entry(data & m_bankmask);
270      if(LOG_WPC) logerror("WPC: ROM bank set to %02x\n",data & m_bankmask);
271      break;
272   case WPC_ALPHAPOS:
273      m_alpha_pos = data & 0x1f;
274      break;
275   case WPC_ALPHA1LO:
276      m_alpha_data[m_alpha_pos] |= data;
277      break;
278   case WPC_ALPHA1HI:
279      m_alpha_data[m_alpha_pos] |= (data << 8);
280      break;
281   case WPC_ALPHA2LO:
282      m_alpha_data[20+m_alpha_pos] |= data;
283      break;
284   case WPC_ALPHA2HI:
285      m_alpha_data[20+m_alpha_pos] |= (data << 8);
286      break;
287   case WPC_IRQACK:
288      m_maincpu->set_input_line(M6809_IRQ_LINE,CLEAR_LINE);
289      break;
290   case WPC_WATCHDOG:
291      if(data & 0x80)
292      {
293         m_irq_count++;
294         m_maincpu->set_input_line(M6809_IRQ_LINE,CLEAR_LINE);
295      }
296      break;
297   case WPC_SWCOLSELECT:
298      m_switch_col = data;
299      break;
300   }
301}
302
36303void wpc_an_state::machine_reset()
37304{
305   m_cpubank->set_entry(0);
306   m_vblank_count = 0;
307   m_irq_count = 0;
308   m_zerocross = false;
38309}
39310
40311DRIVER_INIT_MEMBER(wpc_an_state,wpc_an)
41312{
313   UINT8 *ROM = memregion("maincpu")->base();
314   m_cpubank->configure_entries(0, 32, &ROM[0x10000], 0x4000);
315   m_cpubank->set_entry(0);
316   m_vblank_timer = timer_alloc(TIMER_VBLANK);
317   m_vblank_timer->adjust(attotime::from_hz(60),0,attotime::from_hz(60));
318   m_irq_timer = timer_alloc(TIMER_IRQ);
319   m_irq_timer->adjust(attotime::from_hz(976),0,attotime::from_hz(976));
320   m_zc_timer = timer_alloc(TIMER_ZEROCROSS);
321   m_zc_timer->adjust(attotime::from_hz(120),0,attotime::from_hz(120));
322   m_bankmask = ((memregion("maincpu")->bytes()-0x10000) >> 14) - 1;
323   logerror("WPC: ROM bank mask = %02x\n",m_bankmask);
42324}
43325
44326static MACHINE_CONFIG_START( wpc_an, wpc_an_state )
45327   /* basic machine hardware */
46328   MCFG_CPU_ADD("maincpu", M6809, 2000000)
47329   MCFG_CPU_PROGRAM_MAP(wpc_an_map)
330
331   MCFG_DEFAULT_LAYOUT(layout_wpc_an)
48332MACHINE_CONFIG_END
49333
50334
r25471r25472
52336/  Dr. Dude
53337/------------------*/
54338ROM_START(dd_p7)
55   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
56   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
57   ROM_REGION(0x020000, "user2", 0)
58   ROM_LOAD("dude_u6.p7", 0x00000, 0x020000, CRC(b6c35b98) SHA1(5e9d70ce40669e2f402561dc1d8aa70a8b8a2958))
339   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
340   ROM_LOAD("dude_u6.p7", 0x10000, 0x18000, CRC(b6c35b98) SHA1(5e9d70ce40669e2f402561dc1d8aa70a8b8a2958))
341   ROM_CONTINUE(0x8000,0x8000)
59342   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
60343   ROM_REGION(0x30000, "sound1", 0)
61344   ROM_LOAD("dude_u4.l1", 0x00000, 0x10000, CRC(3eeef714) SHA1(74dcc83958cb62819e0ac36ca83001694faafec7))
r25471r25472
64347ROM_END
65348
66349ROM_START(dd_p06)
67   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
68   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
69   ROM_REGION(0x020000, "user2", 0)
70   ROM_LOAD("u6-pa6.wpc", 0x00000, 0x020000, CRC(fb72571b) SHA1(a12b32eac3141c881064e6de2f49d6d213248fde))
350   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
351   ROM_LOAD("u6-pa6.wpc", 0x10000, 0x18000, CRC(fb72571b) SHA1(a12b32eac3141c881064e6de2f49d6d213248fde))
352   ROM_CONTINUE(0x8000,0x8000)
71353   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
72354   ROM_REGION(0x30000, "sound1", 0)
73355   ROM_LOAD("dude_u4.l1", 0x00000, 0x10000, CRC(3eeef714) SHA1(74dcc83958cb62819e0ac36ca83001694faafec7))
r25471r25472
79361/ Funhouse
80362/--------------*/
81363ROM_START(fh_l9)
82   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
83   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
84   ROM_REGION(0x040000, "user2", 0)
85   ROM_LOAD("funh_l9.rom", 0x00000, 0x040000, CRC(c8f90ff8) SHA1(8d200ea30a68f5e3ba1ac9232a516c44b765eb45))
364   ROM_REGION(0x50000, "maincpu", ROMREGION_ERASEFF)
365   ROM_LOAD("funh_l9.rom", 0x10000, 0x38000, CRC(c8f90ff8) SHA1(8d200ea30a68f5e3ba1ac9232a516c44b765eb45))
366   ROM_CONTINUE(0x8000,0x8000)
86367   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
87368   ROM_REGION(0x180000, "sound1", 0)
88369   ROM_LOAD("fh_u18.sl3", 0x000000, 0x20000, CRC(7f6c7045) SHA1(8c8d601e8e6598507d75b4955ccc51623124e8ab))
r25471r25472
100381ROM_END
101382
102383ROM_START(fh_l9b)
103   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
104   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
105   ROM_REGION(0x040000, "user2", 0)
106   ROM_LOAD("fh_l9ger.rom", 0x00000, 0x040000, CRC(e9b32a8f) SHA1(deb77f0d025001ddcc3045b4e49176c54896da3f))
384   ROM_REGION(0x50000, "maincpu", ROMREGION_ERASEFF)
385   ROM_LOAD("fh_l9ger.rom", 0x10000, 0x38000, CRC(e9b32a8f) SHA1(deb77f0d025001ddcc3045b4e49176c54896da3f))
386   ROM_CONTINUE(0x8000,0x8000)
107387   ROM_REGION(0x010000, "cpu2", ROMREGION_ERASEFF)
108388   ROM_REGION(0x180000, "sound1", 0)
109389   ROM_LOAD("fh_u18.sl3", 0x000000, 0x20000, CRC(7f6c7045) SHA1(8c8d601e8e6598507d75b4955ccc51623124e8ab))
r25471r25472
121401ROM_END
122402
123403ROM_START(fh_l3)
124   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
125   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
126   ROM_REGION(0x020000, "user2", 0)
127   ROM_LOAD("u6-l3.rom", 0x00000, 0x020000, CRC(7a74d702) SHA1(91540cdc62c855b4139b202aa6ad5440b2dee141))
404   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
405   ROM_LOAD("u6-l3.rom", 0x10000, 0x18000, CRC(7a74d702) SHA1(91540cdc62c855b4139b202aa6ad5440b2dee141))
406   ROM_CONTINUE(0x8000,0x8000)
128407   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
129408   ROM_REGION(0x180000, "sound1", 0)
130409   ROM_LOAD("fh_u18.sl2", 0x000000, 0x20000, CRC(11c8944a) SHA1(425d8da5a036c41e054d201b99856319fd5ef9e2))
r25471r25472
142421ROM_END
143422
144423ROM_START(fh_l4)
145   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
146   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
147   ROM_REGION(0x040000, "user2", 0)
148   ROM_LOAD("u6-l4.rom", 0x00000, 0x020000, CRC(f438aaca) SHA1(42bf75325a0e85a4334a5a710c2eddf99160ffbf))
424   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
425   ROM_LOAD("u6-l4.rom", 0x10000, 0x18000, CRC(f438aaca) SHA1(42bf75325a0e85a4334a5a710c2eddf99160ffbf))
426   ROM_CONTINUE(0x8000,0x8000)
149427   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
150428   ROM_REGION(0x180000, "sound1", 0)
151429   ROM_LOAD("fh_u18.sl2", 0x000000, 0x20000, CRC(11c8944a) SHA1(425d8da5a036c41e054d201b99856319fd5ef9e2))
r25471r25472
164442ROM_END
165443
166444ROM_START(fh_l5)
167   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
168   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
169   ROM_REGION(0x040000, "user2", 0)
170   ROM_LOAD("u6-l5.rom", 0x00000, 0x020000, CRC(e2b25da4) SHA1(87129e18c60a65035ade2f4766c154d5d333696b))
445   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
446   ROM_LOAD("u6-l5.rom", 0x10000, 0x18000, CRC(e2b25da4) SHA1(87129e18c60a65035ade2f4766c154d5d333696b))
447   ROM_CONTINUE(0x8000,0x8000)
171448   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
172449   ROM_REGION(0x180000, "sound1", 0)
173450   ROM_LOAD("fh_u18.sl2", 0x000000, 0x20000, CRC(11c8944a) SHA1(425d8da5a036c41e054d201b99856319fd5ef9e2))
r25471r25472
185462ROM_END
186463
187464ROM_START(fh_905h)
188   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
189   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
190   ROM_REGION(0x080000, "user2", 0)
191   ROM_LOAD("fh_905h.rom", 0x00000, 0x080000, CRC(445b632a) SHA1(6e277027a1d025e2b93f0d7736b414ba3a68a4f8))
465   ROM_REGION(0x90000, "maincpu", ROMREGION_ERASEFF)
466   ROM_LOAD("fh_905h.rom", 0x10000, 0x78000, CRC(445b632a) SHA1(6e277027a1d025e2b93f0d7736b414ba3a68a4f8))
467   ROM_CONTINUE(0x8000,0x8000)
192468   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
193469   ROM_REGION(0x180000, "sound1", 0)
194470   ROM_LOAD("fh_u18.sl3", 0x000000, 0x20000, CRC(7f6c7045) SHA1(8c8d601e8e6598507d75b4955ccc51623124e8ab))
r25471r25472
210486/  Harley Davidson
211487/------------------*/
212488ROM_START(hd_l3)
213   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
214   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
215   ROM_REGION(0x020000, "user2", 0)
216   ROM_LOAD("harly_l3.rom", 0x00000, 0x020000, CRC(65f2e0b4) SHA1(a44216c13b9f9adf4161ff6f9eeceba28ef37963))
489   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
490   ROM_LOAD("harly_l3.rom", 0x10000, 0x18000, CRC(65f2e0b4) SHA1(a44216c13b9f9adf4161ff6f9eeceba28ef37963))
491   ROM_CONTINUE(0x8000,0x8000)
217492   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
218493   ROM_REGION(0x180000, "sound1", 0)
219494   ROM_LOAD("hd_u18.rom", 0x000000, 0x20000, CRC(810d98c0) SHA1(8080cbbe0f346020b2b2b8e97015dbb615dbadb3))
r25471r25472
227502ROM_END
228503
229504ROM_START(hd_l1)
230   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
231   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
232   ROM_REGION(0x020000, "user2", 0)
233   ROM_LOAD("u6-l1.rom", 0x00000, 0x020000, CRC(a0bdcfbf) SHA1(f906ffa2d4d04e87225bf711a07dd3bee1655a40))
505   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
506   ROM_LOAD("u6-l1.rom", 0x10000, 0x18000, CRC(a0bdcfbf) SHA1(f906ffa2d4d04e87225bf711a07dd3bee1655a40))
507   ROM_CONTINUE(0x8000,0x8000)
234508   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
235509   ROM_REGION(0x180000, "sound1", 0)
236510   ROM_LOAD("u18-sp1.rom", 0x000000, 0x20000, CRC(708aa419) SHA1(cfc2692fb3bcbacceb85021e282bfbc8dcdf8fcc))
r25471r25472
247521/  The Machine: Bride of Pinbot
248522/------------------*/
249523ROM_START(bop_l7)
250   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
251   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
252   ROM_REGION(0x40000, "user2", 0)
253   ROM_LOAD("tmbopl_7.rom", 0x00000, 0x40000, CRC(773e1488) SHA1(36e8957b3903b99844a76bf15ba393b17db0db59))
524   ROM_REGION(0x50000, "maincpu", ROMREGION_ERASEFF)
525   ROM_LOAD("tmbopl_7.rom", 0x10000, 0x38000, CRC(773e1488) SHA1(36e8957b3903b99844a76bf15ba393b17db0db59))
526   ROM_CONTINUE(0x8000,0x8000)
254527   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
255528   ROM_REGION(0x180000, "sound1",0)
256529   ROM_LOAD("mach_u18.l1", 0x000000, 0x20000, CRC(f3f53896) SHA1(4be5a8a27c5ac4718713c05ff2ddf51658a1be27))
r25471r25472
268541ROM_END
269542
270543ROM_START(bop_l6)
271   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
272   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
273   ROM_REGION(0x20000, "user2", 0)
274   ROM_LOAD("tmbopl_6.rom", 0x00000, 0x20000, CRC(96b844d6) SHA1(981194c249a8fc2534e24ef672380d751a5dc5fd))
544   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
545   ROM_LOAD("tmbopl_6.rom", 0x10000, 0x18000, CRC(96b844d6) SHA1(981194c249a8fc2534e24ef672380d751a5dc5fd))
546   ROM_CONTINUE(0x8000,0x8000)
275547   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
276548   ROM_REGION(0x180000, "sound1",0)
277549   ROM_LOAD("mach_u18.l1", 0x000000, 0x20000, CRC(f3f53896) SHA1(4be5a8a27c5ac4718713c05ff2ddf51658a1be27))
r25471r25472
289561ROM_END
290562
291563ROM_START(bop_l5)
292   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
293   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
294   ROM_REGION(0x20000, "user2", 0)
295   ROM_LOAD("tmbopl_5.rom", 0x00000, 0x20000, CRC(fd5c426d) SHA1(e006f8e39cf382249db0b969cf966fd8deaa344a))
564   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
565   ROM_LOAD("tmbopl_5.rom", 0x10000, 0x18000, CRC(fd5c426d) SHA1(e006f8e39cf382249db0b969cf966fd8deaa344a))
566   ROM_CONTINUE(0x8000,0x8000)
296567   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
297568   ROM_REGION(0x180000, "sound1",0)
298569   ROM_LOAD("mach_u18.l1", 0x000000, 0x20000, CRC(f3f53896) SHA1(4be5a8a27c5ac4718713c05ff2ddf51658a1be27))
r25471r25472
310581ROM_END
311582
312583ROM_START(bop_l4)
313   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
314   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
315   ROM_REGION(0x20000, "user2", 0)
316   ROM_LOAD("tmbopl_4.rom", 0x00000, 0x20000, CRC(eea14ecd) SHA1(afd670bdc3680f12360561a1a5e5854718c099f7))
584   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
585   ROM_LOAD("tmbopl_4.rom", 0x10000, 0x18000, CRC(eea14ecd) SHA1(afd670bdc3680f12360561a1a5e5854718c099f7))
586   ROM_CONTINUE(0x8000,0x8000)
317587   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
318588   ROM_REGION(0x180000, "sound1",0)
319589   ROM_LOAD("mach_u18.l1", 0x000000, 0x20000, CRC(f3f53896) SHA1(4be5a8a27c5ac4718713c05ff2ddf51658a1be27))
r25471r25472
331601ROM_END
332602
333603ROM_START(bop_l3)
334   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
335   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
336   ROM_REGION(0x20000, "user2", 0)
337   ROM_LOAD("bop_l3.u6", 0x00000, 0x20000, CRC(cd4d219d) SHA1(4e73dca186867ebee07682deab058a45cee53be1))
604   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
605   ROM_LOAD("bop_l3.u6", 0x10000, 0x18000, CRC(cd4d219d) SHA1(4e73dca186867ebee07682deab058a45cee53be1))
606   ROM_CONTINUE(0x8000,0x8000)
338607   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
339608   ROM_REGION(0x180000, "sound1",0)
340609   ROM_LOAD("mach_u18.l1", 0x000000, 0x20000, CRC(f3f53896) SHA1(4be5a8a27c5ac4718713c05ff2ddf51658a1be27))
r25471r25472
352621ROM_END
353622
354623ROM_START(bop_l2)
355   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
356   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
357   ROM_REGION(0x20000, "user2", 0)
358   ROM_LOAD("bop_l2.u6", 0x00000, 0x20000, CRC(17ee1f56) SHA1(bee68ed5680455f23dc33e889acec83cba68b1dc))
624   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
625   ROM_LOAD("bop_l2.u6", 0x10000, 0x18000, CRC(17ee1f56) SHA1(bee68ed5680455f23dc33e889acec83cba68b1dc))
626   ROM_CONTINUE(0x8000,0x8000)
359627   ROM_REGION(0x10000, "cpu2", ROMREGION_ERASEFF)
360628   ROM_REGION(0x180000, "sound1",0)
361629   ROM_LOAD("mach_u18.l1", 0x000000, 0x20000, CRC(f3f53896) SHA1(4be5a8a27c5ac4718713c05ff2ddf51658a1be27))
r25471r25472
376644/  Test Fixture Alphanumeric
377645/============*/
378646ROM_START(tfa_13)
379   ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
380   ROM_REGION(0x2000, "user1", ROMREGION_ERASEFF)
381   ROM_REGION(0x020000, "user2", 0)
382   ROM_LOAD("u6_l3.rom", 0x00000, 0x020000, CRC(bf4a37b5) SHA1(91b8bba6182e818a34252a4b2a0b86a2a44d9c42))
647   ROM_REGION(0x30000, "maincpu", ROMREGION_ERASEFF)
648   ROM_LOAD("u6_l3.rom", 0x10000, 0x18000, CRC(bf4a37b5) SHA1(91b8bba6182e818a34252a4b2a0b86a2a44d9c42))
649   ROM_CONTINUE(0x8000,0x8000)
383650ROM_END
384651
385652GAME(1990,  tfa_13,     0,      wpc_an, wpc_an, wpc_an_state,   wpc_an, ROT0,   "Bally",                "WPC Test Fixture: Alphanumeric (1.3)",             GAME_IS_SKELETON_MECHANICAL)

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