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r25399 Monday 23rd September, 2013 at 03:55:24 UTC by Jonathan Gevaryahu
(MESS) cat.c: Switch swyft to use mc68008, split vram handler from cat vram handler due to bus width differece. Hook up VIAs to swyft. Further work on documenting the rom and ram layout of the swyft, pending hardware tests to figure out the via hookups. [Lord Nightmare, Dwight Elvey, Sandy Bumgarner]

Note that the swyft has regressed to displaying a blank screen due to currently incorrect hookup of the vias and their interrupts/timers, to be resolved with hardware testing.
[src/mess/drivers]cat.c

trunk/src/mess/drivers/cat.c
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162162Board name: 950-0001C
163163"INFORMATION APPLIANCE INC. COPYRIGHT 1985"
164164 _________________|||||||||_____________________________________________________________________________
165|                 video out         [unknown IDC connector]____                                         |
165|                 video out            [Floppy connector]  ____                                         |
166166|                                                         /    \                                        |
167167<4 pin edge)           74LS107                            |PB1 |        uA339     MC3403                |
168168|                                          7407           \____/                                        |
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185185| TMS4256   74F153    74LS393    |__________|                       ||  UM95089  Y2               | U   =
186186|_____________________________________(j9)________________________________________________________|_T___=
187187
188*Devices of interest:
189J1: breakout of joystick, serial/rs232, hex-keypad, parallel port, and forth switch (and maybe cassette?) pins
190J4: keyboard ribbon cable
191R6522P (upper): parallel port via
192R6522P (lower): keyboard via
193UM95089: Tone Dialer chip
194
195
196*Pals:
188197"TIMING B" - AMPAL16R4APC (marked on silkscreen "TIMING PAL")
189198"DECODE E" - AMPAL16L8PC (marked on silkscreen "DECODE PAL")
190199"VIDEO 2B" - AMPAL16R4APC (marked on silkscreen "VIDEO PAL")
191200"DISK 3.5C" - AMPAL16R4PC (marked on silkscreen "DISK PAL")
201
202*Deviations from silkscreen:
1922034N37 (marked on silkscreen "4N35")
19320474F153 (marked on silkscreen "74ALS153")
205
206*Other Devices:
194207TMS4256-15NL - 262144 x 1 DRAM
195208PB1 - piezo speaker
209
196210Crystals:
197211Y1: 15.8976Mhz, main clock?
198212Y2: 3.579545Mhz, used by the DTMF generator chip UM95089?
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252266- Figure out the keyboard (interrupts are involved? or maybe an NMI on a
253267  timer/vblank? It iss possible this uses the same DUART+IP2 'keyboard read
254268  int' stuff as the cat does)
255- Beeper
256- Communications port (Duart? or some other plain UART?)
269- get the keyboard scanning actually working
270- Beeper (on one of the vias?)
271- vblank/hblank stuff
272- Get the 6850 ACIA working for communications
257273- Floppy (probably similar to the Cat)
258- Centronics port (probably similar to the Cat)
259- Joystick port
260- Forth button (keep in mind shift-usefront-space ALWAYS enables forth on a swyft)
274- Centronics port (attached to one of the VIAs)
275- Joystick port (also likely on a via)
276- Keypad? (also likely on a via done as a grid scan?)
277- Forth button (on the port on the back; keep in mind shift-usefront-space ALWAYS enables forth on a swyft)
261278- Multple undumped firmware revisions exist
262279
263280****************************************************************************/
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282299#undef DEBUG_DUART_OUTPUT_LINES
283300#undef DEBUG_DUART_INPUT_LINES
284301#undef DEBUG_DUART_TXD
285// TODO: the duart irq handler doesn't work becuase there is no easy way to strobe the duart to force it to check its inputs yet
302// TODO: the duart irq handler doesn't work because there was no easy way to strobe the duart to force it to check its inputs; now with devcb there is, but it hasn't been hooked up yet
286303#undef DEBUG_DUART_IRQ_HANDLER
287304
288305#undef DEBUG_TEST_W
289306
307#define DEBUG_SWYFT_VIA0 1
308#define DEBUG_SWYFT_VIA1 1
309
310
290311// Includes
291312#include "emu.h"
292313#include "cpu/m68000/m68000.h"
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314335      m_via1(*this, "via6522_1"),
315336      //m_speaker(*this, "speaker"),
316337      m_svram(*this, "svram"), // nvram
317      m_p_videoram(*this, "p_videoram"),
338      m_p_cat_videoram(*this, "p_cat_vram"),
339      m_p_swyft_videoram(*this, "p_swyft_vram"),
318340      m_y0(*this, "Y0"),
319341      m_y1(*this, "Y1"),
320342      m_y2(*this, "Y2"),
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338360   DECLARE_WRITE8_MEMBER(cat_duart_output);
339361   //required_device<speaker_sound_device> m_speaker;
340362   optional_shared_ptr<UINT16> m_svram;
341   required_shared_ptr<UINT16> m_p_videoram;
363   optional_shared_ptr<UINT16> m_p_cat_videoram;
364   optional_shared_ptr<UINT8> m_p_swyft_videoram;
342365   optional_ioport m_y0;
343366   optional_ioport m_y1;
344367   optional_ioport m_y2;
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381404   DECLARE_READ16_MEMBER(cat_2e80_r);
382405   DECLARE_READ16_MEMBER(cat_0080_r);
383406   DECLARE_READ16_MEMBER(cat_0000_r);
407   
408   DECLARE_READ8_MEMBER(swyft_d0000);
409   
410   DECLARE_READ8_MEMBER(swyft_via0_r);
411   DECLARE_WRITE8_MEMBER(swyft_via0_w);
412   DECLARE_READ8_MEMBER(via0_pa_r);
413   DECLARE_WRITE8_MEMBER(via0_pa_w);
414   DECLARE_READ_LINE_MEMBER(via0_ca1_r);
415   DECLARE_WRITE_LINE_MEMBER(via0_ca1_w);
416   DECLARE_READ_LINE_MEMBER(via0_ca2_r);
417   DECLARE_WRITE_LINE_MEMBER(via0_ca2_w);
418   DECLARE_READ8_MEMBER(via0_pb_r);
419   DECLARE_WRITE8_MEMBER(via0_pb_w);
420   DECLARE_READ_LINE_MEMBER(via0_cb1_r);
421   DECLARE_WRITE_LINE_MEMBER(via0_cb1_w);
422   DECLARE_READ_LINE_MEMBER(via0_cb2_r);
423   DECLARE_WRITE_LINE_MEMBER(via0_cb2_w);
424   DECLARE_WRITE_LINE_MEMBER(via0_int_w);
425   
426   DECLARE_READ8_MEMBER(swyft_via1_r);
427   DECLARE_WRITE8_MEMBER(swyft_via1_w);
428   DECLARE_READ8_MEMBER(via1_pa_r);
429   DECLARE_WRITE8_MEMBER(via1_pa_w);
430   DECLARE_READ_LINE_MEMBER(via1_ca1_r);
431   DECLARE_WRITE_LINE_MEMBER(via1_ca1_w);
432   DECLARE_READ_LINE_MEMBER(via1_ca2_r);
433   DECLARE_WRITE_LINE_MEMBER(via1_ca2_w);
434   DECLARE_READ8_MEMBER(via1_pb_r);
435   DECLARE_WRITE8_MEMBER(via1_pb_w);
436   DECLARE_READ_LINE_MEMBER(via1_cb1_r);
437   DECLARE_WRITE_LINE_MEMBER(via1_cb1_w);
438   DECLARE_READ_LINE_MEMBER(via1_cb2_r);
439   DECLARE_WRITE_LINE_MEMBER(via1_cb2_w);
440   DECLARE_WRITE_LINE_MEMBER(via1_int_w);
384441
385442   UINT8 m_duart_inp;
386443   /* gate array 2 has a 16-bit counter inside which counts at 10mhz and
387      rolls over at FFFF->0000; on rollover (or maybe at FFFF terminal count)
444      rolls over at FFFF->0000; on roll-over (or maybe at FFFF terminal count)
388445      it triggers the KTOBF output. It does this every 6.5535ms, which causes
389446      a 74LS74 d-latch at IC100 to switch the state of the DUART IP2 line;
390447      this causes the DUART to fire an interrupt, which makes the 68000 read
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539596    * ||\------- /INDEX: 0 = index sensor active, 1 = index sensor inactive (verified)
540597    * |\-------- ? this bit may indicate which drive is selected, i.e. same as floppy control bit 7; low on drive 1, high on drive 0?
541598    * \--------- ? this bit may indicate 'data separator overflow'; it is usually low but becomes high if you manually select the floppy drive
542    ALL of these bits except bit 7 seem to be reset when the selected drive in floppy control is switched
599    ALL of these bits except bit F seem to be reset when the selected drive in floppy control is switched
543600    */
544601READ16_MEMBER( cat_state::cat_floppy_status_r )
545602{
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581638// 0x80000e-0x80000f read
582639READ16_MEMBER( cat_state::cat_battery_r )
583640{
641   /*
642    * FEDCBA98 (76543210 is open bus)
643    * |||||||\-- ?
644    * ||||||\--- ?
645    * |||||\---- ?
646    * ||||\----- ?
647    * |||\------ ?
648    * ||\------- ?
649    * |\-------- ?
650    * \--------- Battery status (0 = good, 1 = bad)
651    */
584652   /* just return that battery is full, i.e. bit 15 is 0 */
585653   /* to make the cat think the battery is bad, return 0x8080 instead of 0x0080 */
586654   // TODO: hook this to a dipswitch
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684752}
685753
686754
687/* Canon cat memory map, based on a 16MB dump of the entire address space of a running unit using forth "1000000 0 do i c@ semit loop"
755/* Canon cat memory map, based on testing and a 16MB dump of the entire address space of a running unit using forth "1000000 0 do i c@ semit loop"
68875668k address map:
689757a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9  a8  a7  a6  a5  a4  a3  a2  a1  (a0 via UDS/LDS)
690758*i  *i  *   x   x   *   *   *   x   x   x   x   x   x   x   x   x   x   x   x   x   x   x   x       *GATE ARRAY 2 DECODES THESE LINES TO ENABLE THIS AREA* (a23 and a22 are indirectly decoded via the /RAMROMCS and /IOCS lines from gate array 1)
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732800   AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_MIRROR(0x180000) // 256 KB ROM
733801   AM_RANGE(0x040000, 0x043fff) AM_RAM AM_SHARE("svram") AM_MIRROR(0x18C000)// SRAM powered by battery
734802   AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("svrom",0x0000) AM_MIRROR(0x180000) // SV ROM
735   AM_RANGE(0x400000, 0x47ffff) AM_RAM AM_SHARE("p_videoram") AM_MIRROR(0x180000) // 512 KB RAM
803   AM_RANGE(0x400000, 0x47ffff) AM_RAM AM_SHARE("p_cat_vram") AM_MIRROR(0x180000) // 512 KB RAM
736804   AM_RANGE(0x600000, 0x67ffff) AM_READWRITE(cat_2e80_r,cat_video_control_w) AM_MIRROR(0x180000) // Gate Array #1: Video
737805   AM_RANGE(0x800000, 0x800001) AM_READWRITE(cat_floppy_control_r, cat_floppy_control_w) AM_MIRROR(0x18FFE0) // floppy control lines and readback
738806   AM_RANGE(0x800002, 0x800003) AM_READWRITE(cat_0080_r, cat_keyboard_w) AM_MIRROR(0x18FFE0) // keyboard col write
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754822   AM_RANGE(0xC00000, 0xC00001) AM_READ(cat_2e80_r) AM_MIRROR(0x3FFFFE) // Open bus/vme?
755823ADDRESS_MAP_END
756824
757/* Swyft Memory map, based on watching the infoapp roms do their thing:
75868k address map:
759a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9  a8  a7  a6  a5  a4  a3  a2  a1  (a0 via UDS/LDS)
760?   ?   ?   ?   0   0   ?   ?   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   a        R   ROM (a=0 is low, a=1 is high)
761?   ?   ?   ?   0   1   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   a        RW  RAM
762?   ?   ?   ?   1   1  ?0? ?1?  ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   *   *   *   *        R   ? status of something? floppy?
763?   ?   ?   ?   1   1  ?1? ?0?  ?   0   0   1   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?        ?R?W   6850 acia control reg lives here, gets 0x55 steadystate and 0x57 written to it to reset it
764?   ?   ?   ?   1   1  ?1? ?0?  ?   0   1   0   ?   ?   *   *   *   *  ?*?  ?   ?   ?   ?   ?        RW  VIA 0
765?   ?   ?   ?   1   1  ?1? ?0?  ?   1   0   0   ?   ?   *   *   *   *  ?*?  ?   ?   ?   ?   ?        RW  VIA 1
766              ^               ^               ^               ^               ^
767*/
768
769static ADDRESS_MAP_START(swyft_mem, AS_PROGRAM, 16, cat_state)
770   ADDRESS_MAP_UNMAP_HIGH
771   AM_RANGE(0x000000, 0x00ffff) AM_ROM AM_MIRROR(0xF00000) // 64 KB ROM
772   AM_RANGE(0x040000, 0x07ffff) AM_RAM AM_MIRROR(0xF00000) AM_SHARE("p_videoram") // 256 KB RAM
773   //AM_RANGE(0x0d0000, 0x0d000f) AM_READ(unknown_d0004) // status of something? reads from d0000, d0004, d0008, d000a, d000e
774   AM_RANGE(0x0e1000, 0x0e1001) AM_DEVWRITE8("acia6850", acia6850_device, control_write, 0xFF00) // 6850 ACIA lives here
775   // where are the other 3 acia registers? e1002-e1003, and read/write for each?
776   //AM_RANGE(0x0e2000, 0x0e2fff) AM_READWRITE(unknown_e2000) // io area with selector on a9 a8 a7 a6?
777   //AM_RANGE(0x0e4000, 0x0e4fff) AM_READWRITE(unknown_e4000) // there's likely a modem chip mapped around somewhere
778ADDRESS_MAP_END
779
780825/* Input ports */
781826
782827/* 2009-07 FP
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886931INPUT_PORTS_END
887932
888933static INPUT_PORTS_START( swyft )
934// insert dwight and sandy's swyft keyboard map here once we figure out the byte line order
889935INPUT_PORTS_END
890936
891937
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9561002         int horpos = 0;
9571003         for (x = 0; x < 42; x++)
9581004         {
959            code = m_p_videoram[addr++];
1005            code = m_p_cat_videoram[addr++];
9601006            for (b = 15; b >= 0; b--)
9611007            {
9621008               bitmap.pix16(y, horpos++) = ((code >> b) & 0x01) ^ m_video_invert;
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9701016   return 0;
9711017}
9721018
973MACHINE_START_MEMBER(cat_state,swyft)
974{
975   //m_6ms_timer = timer_alloc(TIMER_COUNTER_6MS); // CRUDE HACK
976}
977
978MACHINE_RESET_MEMBER(cat_state,swyft)
979{
980   //m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(cat_state::cat_int_ack),this));
981   //m_6ms_timer->adjust(attotime::zero, 0, attotime::from_hz((XTAL_19_968MHz/2)/65536)); // horrible hack
982}
983
984VIDEO_START_MEMBER(cat_state,swyft)
985{
986}
987
988UINT32 cat_state::screen_update_swyft(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
989{
990   UINT16 code;
991   int y, x, b;
992
993   int addr = 0;
994   for (y = 0; y < 242; y++)
995   {
996      int horpos = 0;
997      for (x = 0; x < 20; x++)
998      {
999         code = m_p_videoram[addr++];
1000         for (b = 15; b >= 0; b--)
1001         {
1002            bitmap.pix16(y, horpos++) = (code >> b) & 0x01;
1003         }
1004      }
1005   }
1006   return 0;
1007}
1008
10091019/* TODO: the duart is the only thing actually connected to the cpu IRQ pin
10101020 * The KTOBF output of the gate array 2 (itself the terminal count output
10111021 * of a 16-bit counter clocked at ~10mhz, hence 6.5536ms period) goes to a
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10971107   MCFG_NVRAM_ADD_0FILL("nvram")
10981108MACHINE_CONFIG_END
10991109
1110
1111/* Swyft Memory map, based on watching the infoapp roms do their thing:
111268k address map:
1113(a23,a22,a21,a20 lines don't exist on the 68008 so are considered unconnected)
1114a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9  a8  a7  a6  a5  a4  a3  a2  a1  (a0 via UDS/LDS)
1115x   x   x   x   0   0   ?   ?   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   a        R   ROM (a=0 is low, a=1 is high)
1116x   x   x   x   0   1   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   a        RW  RAM
1117x   x   x   x   1   1  ?0? ?1?  ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   *   *   *   *        R   ? status of something? floppy?
1118x   x   x   x   1   1  ?1? ?0?  ?   0   0   1   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?   ?        ?R?W   6850 acia control reg lives here, gets 0x55 steadystate and 0x57 written to it to reset it
1119x   x   x   x   1   1  ?1? ?0?  ?   0   1   0   ?   ?   *   *   *   *  ?*?  ?   ?   ?   ?   ?        RW  VIA 0
1120x   x   x   x   1   1  ?1? ?0?  ?   1   0   0   ?   ?   *   *   *   *  ?*?  ?   ?   ?   ?   ?        RW  VIA 1
1121              ^               ^               ^               ^               ^
1122*/
1123
1124/* Swyft rom and ram notes:
1125rom:
1126**Vectors:
11270x0000-0x0003: SP boot vector
11280x0004-0x0007: PC boot vector
1129**unknown:
11300x0009-0x00BF: ? table
11310x00C0-0x01DF: ? table
11320x01E0-0x02DF: ? table (may be part of next table)
11330x02E0-0x03DF: ? table
11340x03E0-0x0B3F: int16-packed jump table (expanded to int32s at ram at 0x46000-0x46EC0 on boot)
11350x0B40-0x108F: ?binary code of forth interpreter?
11360x1090-0xCD3B: tForth bytecode, even the fonts?:
1137   0x1090-0x24CF: ?
1138   **Fonts:
1139   0x24D0-0x254F: ? (likely font 1 width lookup table)
1140   0x2550-0x2BCF: Font 1 data
1141   0x2BD0-0x2C4F: ? (likely font 2 width lookup table)
1142   0x2C50-0x32CF: Font 2 data
1143   **unknown?:
1144   0x32D0-0x360F: String data (and control codes?)
1145   0x3610-0x364F: ? fill (0x03 0xe8)
1146   0x3650-0x369F: ? fill (0x03 0x20)
1147   0x36A0-0x384d: ? forth code?
1148   0x384e-0x385d: Lookup table for phone keypad
1149   0x385e-...: ?
1150   ...-0xC951: ?
1151   0xC952: boot vector
1152   0xC952-...: boot code?
1153   0xCD26-0xCD3B: ?init forth bytecode?
11540xCD3C-0xCEBA: 0xFF fill (unused?)
11550xCEEB-0xFFFE: Forth dictionaries for compiling, with <word> then <3 bytes> afterward? (or before it? most likely afterward)
1156
1157ram: (system dram ranges from 0x40000-0x7FFFF)
11580x40000-0x425CF - the screen display ram
1159(?0x425D0-0x44BA0 - ?unknown (maybe screen ram page 2?))
11600x44DC6 - SP vector
11610x46000-0x46EC0 - jump tables to instructions for ? (each forth word?)
1162
1163
1164on boot:
1165copy/expand packed rom short words 0x3E0-0xB3F to long words at 0x46000-0x46EC0
1166copy 0x24f longwords of zero beyond that up to 0x47800
1167CD26->A5 <?pointer to init stream function?>
116844DC6->A7 <reset SP... why it does this twice, once by the vector and once here, i'm gonna guess has to do with running the code in a debugger or on a development daughterboard like the cat had, where the 68008 wouldn't get explicitly reset>
116944F2A->A6 <?pointer to work ram space?>
1170EA2->A4 <?function>
1171E94->A3 <?function>
1172EAE->A2 <?function>
117341800->D7 <?forth? opcode index base; the '1800' portion gets the opcode type added to it then is multiplied by 4 to produce the jump table offset within the 0x46000-0x46EC0 range>
117446e3c->D4 <?pointer to more work ram space?>
1175CD22->D5 <?pointer to another function?>
1176write 0xFFFF to d0004.l
1177jump to A4(EA2)
1178
1179read first stream byte (which is 0x03) from address pointed to by A5 (which is CD26), inc A5, OR the opcode (0x03) to D7
1180 (Note: if the forth opcodes are in order in the dictionary, then 0x03 is "!char" which is used to read a char from an arbitrary address)
1181copy D7 to A0
1182Add A0 low word to itself
1183Add A0 low word to itself again
1184move the long word from address pointed to by A0 (i.e. the specific opcode's area at the 46xxx part of ram) to A1
1185Jump to A1(11A4)
1186
118711A4: move 41b00 to D0 (select an opcode "page" 1bxx)
1188jump to 118E
1189
1190118E: read next stream byte (in this case, 0x8E) from address pointed to by A5 (which is CD27), inc A5, OR the opcode (0x8e) to D7
1191add to 41b00 in d0, for 41b8E
1192Add A0 low word to itself
1193Add A0 low word to itself again
1194move the long word from address pointed to by A0 (i.e. the specific opcode's area at the 46xxx part of ram) to A1
1195Jump to A1(CD06)
1196 
1197CD06: jump to A3 (E94)
1198
1199E94: subtract D5 from A5 (cd28 - cd22 = 0x0006)
1200write 6 to address @A5(44f28) and decrement A5
1201write D4(46e3c) to address @a6(44f26) and decrement a5
1202lea ($2, A1), A5 - i.e. increment A1 by 2, and write that to A5, so write CD06+2=CD08 to A5
1203A1->D5
1204A0->D4
1205read next stream byte (in this case, 0x03) from address pointed to by A5 (which is CD08), inc A5, OR the opcode (0x03) to D7
1206
1207*/
1208
1209static ADDRESS_MAP_START(swyft_mem, AS_PROGRAM, 8, cat_state)
1210   ADDRESS_MAP_UNMAP_HIGH
1211   AM_RANGE(0x000000, 0x00ffff) AM_ROM AM_MIRROR(0xF00000) // 64 KB ROM
1212   AM_RANGE(0x040000, 0x07ffff) AM_RAM AM_MIRROR(0xF00000) AM_SHARE("p_swyft_vram") // 256 KB RAM
1213   AM_RANGE(0x0d0000, 0x0d000f) AM_READ(swyft_d0000) AM_MIRROR(0xF00000) // status of something? reads from d0000, d0004, d0008, d000a, d000e
1214   AM_RANGE(0x0e1000, 0x0e1000) AM_DEVWRITE("acia6850", acia6850_device, control_write) AM_MIRROR(0xF00000) // 6850 ACIA lives here
1215   AM_RANGE(0x0e2000, 0x0e2fff) AM_READWRITE(swyft_via0_r, swyft_via0_w) AM_MIRROR(0xF00000)// io area with selector on a9 a8 a7 a6?
1216   AM_RANGE(0x0e4000, 0x0e4fff) AM_READWRITE(swyft_via1_r, swyft_via1_w) AM_MIRROR(0xF00000)
1217ADDRESS_MAP_END
1218
1219MACHINE_START_MEMBER(cat_state,swyft)
1220{
1221   //m_6ms_timer = timer_alloc(TIMER_COUNTER_6MS); // CRUDE HACK
1222}
1223
1224MACHINE_RESET_MEMBER(cat_state,swyft)
1225{
1226   //m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(cat_state::cat_int_ack),this));
1227   //m_6ms_timer->adjust(attotime::zero, 0, attotime::from_hz((XTAL_19_968MHz/2)/65536)); // horrible hack
1228}
1229
1230VIDEO_START_MEMBER(cat_state,swyft)
1231{
1232}
1233
1234UINT32 cat_state::screen_update_swyft(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
1235{
1236   UINT16 code;
1237   int y, x, b;
1238
1239   int addr = 0;
1240   for (y = 0; y < 242; y++)
1241   {
1242      int horpos = 0;
1243      for (x = 0; x < 40; x++)
1244      {
1245         code = m_p_swyft_videoram[addr++];
1246         for (b = 7; b >= 0; b--)
1247         {
1248            bitmap.pix16(y, horpos++) = (code >> b) & 0x01;
1249         }
1250      }
1251   }
1252   return 0;
1253}
1254
11001255static const acia6850_interface swyft_acia_config =
11011256{
11021257   3579545, // guess
r25398r25399
11101265
11111266static const via6522_interface swyft_via0_config =
11121267{
1113   DEVCB_NULL,
1114   DEVCB_NULL,
1115   DEVCB_NULL,
1116   DEVCB_NULL,
1117   DEVCB_NULL,
1118   DEVCB_NULL,
1119   DEVCB_NULL,
1120   DEVCB_NULL,
1121   DEVCB_NULL,
1122   DEVCB_NULL,
1123   DEVCB_NULL,
1124   DEVCB_NULL,
1125   DEVCB_NULL,
1268   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_pa_r), // PA in
1269   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_pb_r), // PB in
1270   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_ca1_r), // CA1 in callback
1271   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_cb1_r), // CB1 in callback
1272   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_ca2_r), // CA2 in callback
1273   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_cb2_r), // CB2 in callback
1274   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_pa_w), // PA out
1275   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_pb_w), // PB out
1276   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_ca1_w), // CA1 out callback
1277   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_cb1_w), // CA2 out callback
1278   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_ca2_w), // CB1 out callback
1279   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_cb2_w), // CB2 out callback
1280   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via0_int_w), // interrupt callback
11261281};
11271282
11281283static const via6522_interface swyft_via1_config =
11291284{
1130   DEVCB_NULL,
1131   DEVCB_NULL,
1132   DEVCB_NULL,
1133   DEVCB_NULL,
1134   DEVCB_NULL,
1135   DEVCB_NULL,
1136   DEVCB_NULL,
1137   DEVCB_NULL,
1138   DEVCB_NULL,
1139   DEVCB_NULL,
1140   DEVCB_NULL,
1141   DEVCB_NULL,
1142   DEVCB_NULL,
1285   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_pa_r), // PA in
1286   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_pb_r), // PB in
1287   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_ca1_r), // CA1 in callback
1288   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_cb1_r), // CB1 in callback
1289   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_ca2_r), // CA2 in callback
1290   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_cb2_r), // CB2 in callback
1291   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_pa_w), // PA out
1292   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_pb_w), // PB out
1293   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_ca1_w), // CA1 out callback
1294   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_cb1_w), // CA2 out callback
1295   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_ca2_w), // CB1 out callback
1296   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_cb2_w), // CB2 out callback
1297   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cat_state, via1_int_w), // interrupt callback
11431298};
11441299
1300READ8_MEMBER( cat_state::swyft_d0000 )
1301{
1302   // wtf is this supposed to be?
1303   UINT8 byte = 0xD3; // ?
1304   logerror("mystery device: read from 0x%5X, returning %02X\n", offset+0xD0000, byte);
1305   return byte;
1306}
1307
1308
1309// if bit is 1 enable: (obviously don't set more than one bit or you get bus contention!)
1310//                                           acia
1311//                                       via0
1312//                                    via1
1313// x   x   x   x   1   1  ?1? ?0?  ?   ^   ^   ^   ?   ?   *   *   *   *  ?*?  ?   ?   ?   ?   ?
1314//                                                         ^   ^   ^   ^  <- these four bits address the VIA registers? is this correct?
1315static const char *const swyft_via_regnames[] = { "0: ORB/IRB", "1: ORA/IRA", "2: DDRB", "3: DDRA", "4: T1C-L", "5: T1C-H", "6: T1L-L", "7: T1L-H", "8: T2C-L" "9: T2C-H", "A: SR", "B: ACR", "C: PCR", "D: IFR", "E: IER", "F: ORA/IRA*" };
1316
1317READ8_MEMBER( cat_state::swyft_via0_r )
1318{
1319   if (offset&0x000C3F) fprintf(stderr,"VIA0: read from invalid offset in 68k space: %06X!\n", offset);
1320   UINT8 data = m_via0->read(space, (offset>>5)&0xF);
1321#ifdef DEBUG_SWYFT_VIA0
1322   logerror("VIA0 register %s read by cpu: returning %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
1323#endif
1324   return data;
1325}
1326
1327WRITE8_MEMBER( cat_state::swyft_via0_w )
1328{
1329#ifdef DEBUG_SWYFT_VIA0
1330   logerror("VIA0 register %s written by cpu with data %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
1331#endif
1332   if (offset&0x000C3F) fprintf(stderr,"VIA0: write to invalid offset in 68k space: %06X, data: %02X!\n", offset, data);
1333   m_via1->write(space, (offset>>5)&0xF, data);
1334}
1335
1336READ8_MEMBER( cat_state::swyft_via1_r )
1337{
1338   if (offset&0x000C3F) fprintf(stderr," VIA1: read from invalid offset in 68k space: %06X!\n", offset);
1339   UINT8 data = m_via1->read(space, (offset>>5)&0xF);
1340#ifdef DEBUG_SWYFT_VIA1
1341   logerror(" VIA1 register %s read by cpu: returning %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
1342#endif
1343   return data;
1344}
1345
1346WRITE8_MEMBER( cat_state::swyft_via1_w )
1347{
1348#ifdef DEBUG_SWYFT_VIA1
1349   logerror(" VIA1 register %s written by cpu with data %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
1350#endif
1351   if (offset&0x000C3F) fprintf(stderr," VIA1: write to invalid offset in 68k space: %06X, data: %02X!\n", offset, data);
1352   m_via0->write(space, (offset>>5)&0xF, data);
1353}
1354
1355// first via
1356READ8_MEMBER( cat_state::via0_pa_r )
1357{
1358   logerror("VIA0: Port A read!\n");
1359   return 0xFF;
1360}
1361
1362WRITE8_MEMBER( cat_state::via0_pa_w )
1363{
1364   logerror("VIA0: Port A written with data of 0x%02x!\n", data);
1365}
1366
1367READ_LINE_MEMBER ( cat_state::via0_ca1_r )
1368{
1369   logerror("VIA0: CA1 read!\n");
1370   return 1;
1371}
1372
1373WRITE_LINE_MEMBER ( cat_state::via0_ca1_w )
1374{
1375   logerror("VIA0: CA1 written with %d!\n", state);
1376}
1377
1378READ_LINE_MEMBER ( cat_state::via0_ca2_r )
1379{
1380   logerror("VIA0: CA2 read!\n");
1381   return 1;
1382}
1383
1384WRITE_LINE_MEMBER ( cat_state::via0_ca2_w )
1385{
1386   logerror("VIA0: CA2 written with %d!\n", state);
1387}
1388
1389READ8_MEMBER( cat_state::via0_pb_r )
1390{
1391   logerror("VIA0: Port B read!\n");
1392   return 0xFF;
1393}
1394
1395WRITE8_MEMBER( cat_state::via0_pb_w )
1396{
1397   logerror("VIA0: Port B written with data of 0x%02x!\n", data);
1398}
1399
1400READ_LINE_MEMBER ( cat_state::via0_cb1_r )
1401{
1402   logerror("VIA0: CB1 read!\n");
1403   return 1;
1404}
1405
1406WRITE_LINE_MEMBER ( cat_state::via0_cb1_w )
1407{
1408   logerror("VIA0: CB1 written with %d!\n", state);
1409}
1410
1411READ_LINE_MEMBER ( cat_state::via0_cb2_r )
1412{
1413   logerror("VIA0: CB2 read!\n");
1414   return 1;
1415}
1416
1417WRITE_LINE_MEMBER ( cat_state::via0_cb2_w )
1418{
1419   logerror("VIA0: CB2 written with %d!\n", state);
1420}
1421
1422WRITE_LINE_MEMBER ( cat_state::via0_int_w )
1423{
1424   logerror("VIA0: INT output set to %d!\n", state);
1425}
1426
1427// second via
1428READ8_MEMBER( cat_state::via1_pa_r )
1429{
1430   logerror(" VIA1: Port A read!\n");
1431   return 0xFF;
1432}
1433
1434WRITE8_MEMBER( cat_state::via1_pa_w )
1435{
1436   logerror(" VIA1: Port A written with data of 0x%02x!\n", data);
1437}
1438
1439READ_LINE_MEMBER ( cat_state::via1_ca1_r )
1440{
1441   logerror(" VIA1: CA1 read!\n");
1442   return 1;
1443}
1444
1445WRITE_LINE_MEMBER ( cat_state::via1_ca1_w )
1446{
1447   logerror(" VIA1: CA1 written with %d!\n", state);
1448}
1449
1450READ_LINE_MEMBER ( cat_state::via1_ca2_r )
1451{
1452   logerror(" VIA1: CA2 read!\n");
1453   return 1;
1454}
1455
1456WRITE_LINE_MEMBER ( cat_state::via1_ca2_w )
1457{
1458   logerror(" VIA1: CA2 written with %d!\n", state);
1459}
1460
1461READ8_MEMBER( cat_state::via1_pb_r )
1462{
1463   logerror(" VIA1: Port B read!\n");
1464   return 0xFF;
1465}
1466
1467WRITE8_MEMBER( cat_state::via1_pb_w )
1468{
1469   logerror(" VIA1: Port B written with data of 0x%02x!\n", data);
1470}
1471
1472READ_LINE_MEMBER ( cat_state::via1_cb1_r )
1473{
1474   logerror(" VIA1: CB1 read!\n");
1475   return 1;
1476}
1477
1478WRITE_LINE_MEMBER ( cat_state::via1_cb1_w )
1479{
1480   logerror(" VIA1: CB1 written with %d!\n", state);
1481}
1482
1483READ_LINE_MEMBER ( cat_state::via1_cb2_r )
1484{
1485   logerror(" VIA1: CB2 read!\n");
1486   return 1;
1487}
1488
1489WRITE_LINE_MEMBER ( cat_state::via1_cb2_w )
1490{
1491   logerror(" VIA1: CB2 written with %d!\n", state);
1492}
1493
1494WRITE_LINE_MEMBER ( cat_state::via1_int_w )
1495{
1496   logerror(" VIA1: INT output set to %d!\n", state);
1497}
1498
11451499static MACHINE_CONFIG_START( swyft, cat_state )
11461500
11471501   /* basic machine hardware */
1148   //MCFG_CPU_ADD("maincpu",M68008, XTAL_15_8976MHz/2) //MC68008P8, Y1=15.8796Mhz, clock GUESSED at Y1 / 2
1149   MCFG_CPU_ADD("maincpu",M68000, XTAL_15_8976MHz/2) //MC68008P8, Y1=15.8796Mhz, clock GUESSED at Y1 / 2
1502   MCFG_CPU_ADD("maincpu",M68008, XTAL_15_8976MHz/2) //MC68008P8, Y1=15.8796Mhz, clock GUESSED at Y1 / 2
11501503   MCFG_CPU_PROGRAM_MAP(swyft_mem)
11511504
11521505   MCFG_MACHINE_START_OVERRIDE(cat_state,swyft)
r25398r25399
11661519   MCFG_VIDEO_START_OVERRIDE(cat_state,swyft)
11671520
11681521   MCFG_ACIA6850_ADD("acia6850", swyft_acia_config) // unknown clock
1522   MCFG_VIA6522_ADD("via6522_0", XTAL_15_8976MHz/16, swyft_via0_config) // unknown clock, GUESSED
1523   MCFG_VIA6522_ADD("via6522_1", XTAL_15_8976MHz/16, swyft_via1_config) // unknown clock, GUESSED
11691524MACHINE_CONFIG_END
11701525
11711526/* ROM definition */
11721527ROM_START( swyft )
11731528   ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
1529   /* this version of the swyft code identifies itself at 0x3fCB as version 330 */
11741530   ROM_LOAD( "infoapp.lo", 0x0000, 0x8000, CRC(52c1bd66) SHA1(b3266d72970f9d64d94d405965b694f5dcb23bca) )
11751531   ROM_LOAD( "infoapp.hi", 0x8000, 0x8000, CRC(83505015) SHA1(693c914819dd171114a8c408f399b56b470f6be0) )
1176   /* a version of the swyft roms are labeled '331 low' and '331 high' */
1532   /* another (yet to be dumped) version of the swyft roms are labeled '331 low' and '331 high' */
11771533   ROM_REGION( 0x1000, "pals", ROMREGION_ERASEFF )
11781534   ROM_LOAD( "timing b.pal16r4", 0x0000, 0x38b, NO_DUMP)
11791535   ROM_LOAD( "decode e.pal16l8", 0x0400, 0x38b, NO_DUMP)

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