trunk/hash/pc98.xml
| r24681 | r24682 | |
|---|
| 333 | 333 | |
| 334 | 334 | <!-- in d88 format, perhaps same thing as the one above --> |
| 335 | 335 | <software name="4drivinga" cloneof="4driving"> |
| 336 | | <description>4D Driving</description> |
| 336 | <description>4D Driving (Alt)</description> |
| 337 | 337 | <year>19??</year> |
| 338 | 338 | <publisher><unknown></publisher> |
| 339 | 339 | <part name="flop1" interface="floppy_5_25"> |
| r24681 | r24682 | |
|---|
| 11163 | 11163 | </part> |
| 11164 | 11164 | </software> |
| 11165 | 11165 | |
| 11166 | <software name="quarth"> |
| 11167 | <description>Quarth</description> |
| 11168 | <year>19??</year> |
| 11169 | <publisher>Konami</publisher> |
| 11170 | <part name="flop1" interface="floppy_5_25"> |
| 11171 | <dataarea name="flop" size="0x138fb0"> |
| 11172 | <rom name="quarth.d88" size="0x138fb0" crc="38fbd971" sha1="76b1e8146a45622e20a17efa1ae5d4ebd43595f5" offset="0" /> |
| 11173 | </dataarea> |
| 11174 | </part> |
| 11175 | </software> |
| 11176 | |
| 11166 | 11177 | <software name="queensl"> |
| 11167 | 11178 | <description>Queens Library</description> |
| 11168 | 11179 | <year>19??</year> |
| r24681 | r24682 | |
|---|
| 11771 | 11782 | <publisher>Nihon Falcom</publisher> |
| 11772 | 11783 | <part name="flop1" interface="floppy_5_25"> |
| 11773 | 11784 | <dataarea name="flop" size="1265664"> |
| 11774 | | <rom name="xanadu_a.fdi" size="1265664" crc="4ae868e6" sha1="cb685bf97623c1839e10fe1c9d7ec01f095bb482" offset="0" /> |
| 11785 | <rom name="xanadue_a.fdi" size="1265664" crc="4ae868e6" sha1="cb685bf97623c1839e10fe1c9d7ec01f095bb482" offset="0" /> |
| 11775 | 11786 | </dataarea> |
| 11776 | 11787 | </part> |
| 11777 | 11788 | <part name="flop2" interface="floppy_5_25"> |
trunk/src/mess/drivers/pc9801.c
| r24681 | r24682 | |
|---|
| 496 | 496 | inline UINT8 m_pc9801rs_grcg_r(UINT32 offset,int vbank); |
| 497 | 497 | inline void m_pc9801rs_grcg_w(UINT32 offset,int vbank,UINT8 data); |
| 498 | 498 | DECLARE_CUSTOM_INPUT_MEMBER(system_type_r); |
| 499 | DECLARE_READ8_MEMBER(pc9801ux_gvram_r); |
| 500 | DECLARE_WRITE8_MEMBER(pc9801ux_gvram_w); |
| 501 | DECLARE_READ8_MEMBER(pc9801ux_gvram0_r); |
| 502 | DECLARE_WRITE8_MEMBER(pc9801ux_gvram0_w); |
| 499 | 503 | UINT32 pc9801_286_a20(bool state); |
| 500 | 504 | |
| 501 | 505 | DECLARE_WRITE8_MEMBER(sasi_data_w); |
| r24681 | r24682 | |
|---|
| 2276 | 2280 | ((offset >= 4) ? m_pic2 : m_pic1)->write(space, offset & 3, data); |
| 2277 | 2281 | } |
| 2278 | 2282 | |
| 2283 | READ8_MEMBER(pc9801_state::pc9801ux_gvram_r) |
| 2284 | { |
| 2285 | return m_pc9801rs_grcg_r(offset & 0x7fff,(offset>>15)+1); |
| 2286 | } |
| 2287 | |
| 2288 | WRITE8_MEMBER(pc9801_state::pc9801ux_gvram_w) |
| 2289 | { |
| 2290 | m_pc9801rs_grcg_w(offset & 0x7fff,(offset>>15)+1,data); |
| 2291 | } |
| 2292 | |
| 2293 | READ8_MEMBER(pc9801_state::pc9801ux_gvram0_r) |
| 2294 | { |
| 2295 | return m_pc9801rs_grcg_r(offset & 0x7fff,0); |
| 2296 | } |
| 2297 | |
| 2298 | WRITE8_MEMBER(pc9801_state::pc9801ux_gvram0_w) |
| 2299 | { |
| 2300 | m_pc9801rs_grcg_w(offset & 0x7fff,0,data); |
| 2301 | } |
| 2302 | |
| 2279 | 2303 | static ADDRESS_MAP_START( pc9801ux_map, AS_PROGRAM, 16, pc9801_state ) |
| 2280 | 2304 | AM_RANGE(0x000000, 0x09ffff) AM_RAMBANK("wram") |
| 2281 | 2305 | AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE8(pc9801_tvram_r, pc9801_tvram_w, 0xffff) |
| 2282 | 2306 | AM_RANGE(0x0a4000, 0x0a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffff) |
| 2283 | | AM_RANGE(0x0a8000, 0x0b0fff) AM_READWRITE8(pc9801_gvram_r, pc9801_gvram_w, 0xffff) |
| 2307 | AM_RANGE(0x0a8000, 0x0bffff) AM_READWRITE8(pc9801ux_gvram_r, pc9801ux_gvram_w, 0xffff) |
| 2308 | AM_RANGE(0x0e0000, 0x0e7fff) AM_READWRITE8(pc9801ux_gvram0_r,pc9801ux_gvram0_w, 0xffff) |
| 2284 | 2309 | AM_RANGE(0x0e0000, 0x0fffff) AM_READ8(pc9801rs_ipl_r, 0xffff) |
| 2285 | 2310 | ADDRESS_MAP_END |
| 2286 | 2311 | |