trunk/src/emu/cpu/tms32082/dis_pp.c
| r24602 | r24603 | |
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| 3 | 3 | #include "emu.h" |
| 4 | 4 | |
| 5 | 5 | |
| 6 | static const char *REG_NAMES[128] = |
| 7 | { |
| 8 | // 0 - 15 |
| 9 | "a0", "a1", "a2", "a3", "a4", "???", "a6", "a7", |
| 10 | "a8", "a9", "a10", "a11", "a12", "???", "a14", "a15", |
| 11 | // 16 - 31 |
| 12 | "x0", "x1", "x2", "???", "???", "???", "???", "???", |
| 13 | "x8", "x9", "x10", "???", "???", "???", "???", "???", |
| 14 | // 32 - 47 |
| 15 | "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", |
| 16 | "???", "sr", "mf", "???", "???", "???", "???", "???", |
| 17 | // 48 - 63 |
| 18 | "???", "???", "???", "???", "???", "???", "???", "???", |
| 19 | "pc/call", "ipa/br", "ipe", "iprs", "inten", "intflg", "comm", "lctl", |
| 20 | // 64 - 79 |
| 21 | "???", "???", "???", "???", "???", "???", "???", "???", |
| 22 | "???", "???", "???", "???", "???", "???", "???", "???", |
| 23 | // 80 - 95 |
| 24 | "???", "???", "???", "???", "???", "???", "???", "???", |
| 25 | "???", "???", "???", "???", "???", "???", "???", "???", |
| 26 | // 96 - 111 |
| 27 | "lc0", "lc1", "lc2", "???", "lr0", "lr1", "lr2", "???", |
| 28 | "lrse0", "lrse1", "lrse2", "???", "lrs0", "lrs1", "lrs2", "???", |
| 29 | // 112 - 127 |
| 30 | "ls0", "ls1", "ls2", "???", "le0", "le1", "le2", "???", |
| 31 | "???", "???", "???", "???", "tag0", "tag1", "tag2", "tag3" |
| 32 | }; |
| 33 | |
| 34 | |
| 6 | 35 | static char *output; |
| 7 | | static const UINT8 *opdata; |
| 8 | | static int opbytes; |
| 9 | 36 | |
| 10 | 37 | static void ATTR_PRINTF(1,2) print(const char *fmt, ...) |
| 11 | 38 | { |
| r24602 | r24603 | |
|---|
| 16 | 43 | va_end(vl); |
| 17 | 44 | } |
| 18 | 45 | |
| 46 | static void format_transfer(UINT64 op) |
| 47 | { |
| 48 | int lmode = (op >> 35) & 0xf; |
| 49 | int gmode = (op >> 13) & 0xf; |
| 50 | |
| 51 | print(" | "); |
| 52 | |
| 53 | switch (lmode) |
| 54 | { |
| 55 | case 0x0: |
| 56 | case 0x1: |
| 57 | case 0x2: |
| 58 | case 0x3: |
| 59 | { |
| 60 | switch (gmode) |
| 61 | { |
| 62 | case 0x00: |
| 63 | { |
| 64 | int dstbank = (op >> 18) & 0xf; |
| 65 | int srcbank = (op >> 6) & 0xf; |
| 66 | int src = (op >> 10) & 0x7; |
| 67 | int dst = (op >> 3) & 0x7; |
| 68 | |
| 69 | int dreg = (dstbank << 3) | dst; |
| 70 | int sreg = (srcbank << 3) | src; |
| 71 | |
| 72 | print("cond du||cond move %s = %s", REG_NAMES[dreg], REG_NAMES[sreg]); |
| 73 | break; |
| 74 | } |
| 75 | case 0x01: |
| 76 | { |
| 77 | print("cond du||cond field move"); |
| 78 | break; |
| 79 | } |
| 80 | case 0x02: case 0x03: |
| 81 | { |
| 82 | print("cond non-d du"); |
| 83 | break; |
| 84 | } |
| 85 | default: |
| 86 | { |
| 87 | if (op & 0x4) |
| 88 | { |
| 89 | print("cond du||cond global"); |
| 90 | } |
| 91 | else |
| 92 | { |
| 93 | print("global (long offset)"); |
| 94 | } |
| 95 | break; |
| 96 | } |
| 97 | } |
| 98 | break; |
| 99 | } |
| 100 | |
| 101 | default: |
| 102 | { |
| 103 | int mode = gmode | ((op & (1 << 24)) ? 0x10 : 0); |
| 104 | |
| 105 | switch (mode) |
| 106 | { |
| 107 | case 0x00: |
| 108 | { |
| 109 | print("move||local"); |
| 110 | break; |
| 111 | } |
| 112 | case 0x01: |
| 113 | { |
| 114 | print("field move||local"); |
| 115 | break; |
| 116 | } |
| 117 | case 0x02: case 0x03: |
| 118 | { |
| 119 | print("non-d du||local"); |
| 120 | break; |
| 121 | } |
| 122 | case 0x10: case 0x11: case 0x12: case 0x13: |
| 123 | { |
| 124 | int d = (op >> 32) & 0x7; |
| 125 | int bank = (op >> 18) & 0xf; |
| 126 | int s = (op & (1 << 28)); |
| 127 | int size = (op >> 29) & 0x3; |
| 128 | int le = ((op >> 16) & 2) | ((op >> 31) & 1); |
| 129 | int la = (op >> 25) & 0x7; |
| 130 | |
| 131 | int reg = (bank << 3) | d; |
| 132 | |
| 133 | UINT16 offset = 0; |
| 134 | if (s) |
| 135 | { |
| 136 | offset = op & 0x7fff; |
| 137 | if (offset & 0x4000) |
| 138 | offset |= 0xc000; |
| 139 | } |
| 140 | else |
| 141 | { |
| 142 | offset = op & 0x7fff; |
| 143 | } |
| 144 | |
| 145 | if (le == 0 && le == 1) |
| 146 | { |
| 147 | print("%s = ", REG_NAMES[reg]); |
| 148 | } |
| 149 | |
| 150 | switch (size) |
| 151 | { |
| 152 | case 0: print("b:"); break; |
| 153 | case 1: print("h:"); break; |
| 154 | } |
| 155 | |
| 156 | switch (lmode) |
| 157 | { |
| 158 | case 0x6: print("*(a%d++=0x%04X)", la, offset); break; |
| 159 | case 0x7: print("*(a%d--=0x%04X)", la, offset); break; |
| 160 | case 0xa: print("*(a%d+0x%04X)", la, offset); break; |
| 161 | case 0xb: print("*(a%d-0x%04X)", la, offset); break; |
| 162 | case 0xe: print("*(a%d+=0x%04X)", la, offset); break; |
| 163 | case 0xf: print("*(a%d-=0x%04X)", la, offset); break; |
| 164 | } |
| 165 | |
| 166 | if (le == 2) |
| 167 | print(" = %s", REG_NAMES[reg]); |
| 168 | |
| 169 | break; |
| 170 | } |
| 171 | case 0x14: case 0x15: case 0x16: case 0x17: |
| 172 | case 0x18: case 0x19: case 0x1a: case 0x1b: |
| 173 | case 0x1c: case 0x1d: case 0x1e: case 0x1f: |
| 174 | { |
| 175 | print("double parallel"); |
| 176 | break; |
| 177 | } |
| 178 | } |
| 179 | } |
| 180 | } |
| 181 | } |
| 182 | |
| 183 | static void format_alu_op(int aluop, int a, const char *dst_text, const char *a_text, const char *b_text, const char *c_text) |
| 184 | { |
| 185 | if (a) // arithmetic |
| 186 | { |
| 187 | int bits = (aluop & 1) | ((aluop >> 1) & 2) | ((aluop >> 2) & 4) | ((aluop >> 3) & 8); |
| 188 | switch (bits) |
| 189 | { |
| 190 | case 1: print("%s = %s - %s<1<", dst_text, a_text, b_text); break; |
| 191 | case 2: print("%s = %s + %s<0<", dst_text, a_text, b_text); break; |
| 192 | case 3: print("%s = %s - %s", dst_text, a_text, c_text); break; |
| 193 | case 4: print("%s = %s - %s>1>", dst_text, a_text, b_text); break; |
| 194 | case 5: print("%s = %s - %s", dst_text, a_text, b_text); break; |
| 195 | case 6: print("?"); break; |
| 196 | case 7: print("%s = %s - %s>0>", dst_text, a_text, b_text); break; |
| 197 | case 8: print("%s = %s + %s>0>", dst_text, a_text, b_text); break; |
| 198 | case 9: print("?"); break; |
| 199 | case 10: print("%s = %s + %s", dst_text, a_text, b_text); break; |
| 200 | case 11: print("%s = %s + %s>1>", dst_text, a_text, b_text); break; |
| 201 | case 12: print("%s = %s + %s", dst_text, a_text, c_text); break; |
| 202 | case 13: print("%s = %s - %s<0<", dst_text, a_text, b_text); break; |
| 203 | case 14: print("%s = %s + %s<1<", dst_text, a_text, b_text); break; |
| 204 | case 15: print("%s = field %s + %s", dst_text, a_text, b_text); break; |
| 205 | } |
| 206 | } |
| 207 | else // boolean |
| 208 | { |
| 209 | switch (aluop) |
| 210 | { |
| 211 | case 0xaa: // A & B & C | A & ~B & C | A & B & ~C | A & ~B & ~C = A |
| 212 | print("%s = %s", dst_text, a_text); |
| 213 | break; |
| 214 | |
| 215 | case 0x55: // ~A & B & C | ~A & ~B & C | ~A & B & ~C | ~A & ~B & ~C = ~A |
| 216 | print("%s = ~%s", dst_text, a_text); |
| 217 | break; |
| 218 | |
| 219 | case 0xcc: // A & B & C | ~A & B & C | A & B & ~C | ~A & B & ~C = B |
| 220 | print("%s = %s", dst_text, b_text); |
| 221 | break; |
| 222 | |
| 223 | case 0x33: // A & ~B & C | ~A & ~B & C | A & ~B & ~C | ~A & ~B & ~C = ~B |
| 224 | print("%s = %s", dst_text, b_text); |
| 225 | break; |
| 226 | |
| 227 | case 0xf0: // A & B & C | ~A & B & C | A & ~B & C | ~A & ~B & C = C |
| 228 | print("%s = %s", dst_text, c_text); |
| 229 | break; |
| 230 | |
| 231 | case 0x0f: // A & B & ~C | ~A & B & ~C | A & ~B & ~C | ~A & ~B & ~C = ~C |
| 232 | print("%s = ~%s", dst_text, c_text); |
| 233 | break; |
| 234 | |
| 235 | case 0x80: // A & B & C |
| 236 | print("%s = %s & %s & %s", dst_text, a_text, b_text, c_text); |
| 237 | break; |
| 238 | |
| 239 | case 0x88: // A & B & C | A & B & ~C = A & B |
| 240 | print("%s = %s & %s", dst_text, a_text, b_text); |
| 241 | break; |
| 242 | |
| 243 | case 0xa0: // A & B & C | A & ~B & C = A & C |
| 244 | print("%s = %s & %s", dst_text, a_text, c_text); |
| 245 | break; |
| 246 | |
| 247 | case 0xc0: // A & B & C | ~A & B & C = B & C |
| 248 | print("%s = %s & %s", dst_text, b_text, c_text); |
| 249 | break; |
| 250 | |
| 251 | default: |
| 252 | print("%s = b%02X(%s, %s, %s)", dst_text, aluop, a_text, b_text, c_text); |
| 253 | break; |
| 254 | } |
| 255 | } |
| 256 | } |
| 257 | |
| 19 | 258 | static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom) |
| 20 | 259 | { |
| 21 | 260 | output = buffer; |
| 22 | 261 | UINT32 flags = 0; |
| 23 | | opdata = oprom; |
| 24 | | opbytes = 8; |
| 262 | |
| 263 | UINT64 op = ((UINT64)(oprom[0]) << 56) | ((UINT64)(oprom[1]) << 48) | ((UINT64)(oprom[2]) << 40) | ((UINT64)(oprom[3]) << 32) | |
| 264 | ((UINT64)(oprom[4]) << 24) | ((UINT64)(oprom[5]) << 16) | ((UINT64)(oprom[6]) << 8) | ((UINT64)(oprom[7])); |
| 25 | 265 | |
| 26 | | print("???"); |
| 266 | switch (op >> 60) |
| 267 | { |
| 268 | case 0x6: |
| 269 | case 0x7: // Six-operand |
| 270 | { |
| 271 | print("A: six operand"); |
| 272 | break; |
| 273 | } |
| 27 | 274 | |
| 28 | | return opbytes | flags | DASMFLAG_SUPPORTED; |
| 275 | case 0x8: |
| 276 | case 0x9: |
| 277 | case 0xa: |
| 278 | case 0xb: |
| 279 | case 0xc: |
| 280 | case 0xd: |
| 281 | case 0xe: |
| 282 | case 0xf: |
| 283 | { |
| 284 | if ((op & U64(0xfaa8100000000000)) == U64(0x8800000000000000)) |
| 285 | { |
| 286 | int operation = (op >> 39) & 0x1f; |
| 287 | UINT64 parallel_xfer = (op & U64(0x0000003fffffffff)); |
| 288 | |
| 289 | switch (operation) |
| 290 | { |
| 291 | case 0x00: print("nop"); break; |
| 292 | case 0x02: print("eint"); break; |
| 293 | case 0x03: print("dint"); break; |
| 294 | default: print("<reserved>"); break; |
| 295 | } |
| 296 | |
| 297 | format_transfer(parallel_xfer); |
| 298 | } |
| 299 | else |
| 300 | { |
| 301 | char dst_text[32]; |
| 302 | char a_text[32]; |
| 303 | char b_text[32]; |
| 304 | char c_text[32]; |
| 305 | |
| 306 | switch ((op >> 43) & 3) |
| 307 | { |
| 308 | case 0: |
| 309 | case 1: // Base set ALU (5-bit immediate) |
| 310 | { |
| 311 | UINT64 parallel_xfer = (op & U64(0x0000003fffffffff)); |
| 312 | |
| 313 | int dst = (op >> 48) & 7; |
| 314 | int src1 = (op >> 45) & 7; |
| 315 | int src2imm = (op >> 39) & 0x1f; |
| 316 | int cl = (op >> 60) & 7; |
| 317 | int aluop = (op >> 51) & 0xff; |
| 318 | int a = (op >> 59) & 1; |
| 319 | |
| 320 | int s1reg = src1 | (0x4 << 3); |
| 321 | int dreg = dst | (0x4 << 3); |
| 322 | int dstcreg = dst | (0x4 << 3); |
| 323 | |
| 324 | sprintf(dst_text, "%s", REG_NAMES[dreg]); |
| 325 | switch (cl) |
| 326 | { |
| 327 | case 0: |
| 328 | sprintf(a_text, "0x%02X", src2imm); |
| 329 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 330 | sprintf(c_text, "@mf"); |
| 331 | break; |
| 332 | case 1: |
| 333 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 334 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 335 | sprintf(c_text, "0x%02X", src2imm); |
| 336 | break; |
| 337 | case 2: |
| 338 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 339 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 340 | sprintf(c_text, "%%0x%02X", src2imm); |
| 341 | break; |
| 342 | case 3: |
| 343 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 344 | sprintf(b_text, "%s\\\\0x%02X", REG_NAMES[s1reg], src2imm); |
| 345 | sprintf(c_text, "%%0x%02X", src2imm); |
| 346 | break; |
| 347 | case 4: |
| 348 | sprintf(a_text, "0x%02X", src2imm); |
| 349 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 350 | sprintf(c_text, "%%d0"); |
| 351 | break; |
| 352 | case 5: |
| 353 | sprintf(a_text, "0x%02X", src2imm); |
| 354 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 355 | sprintf(c_text, "@mf"); |
| 356 | break; |
| 357 | case 6: |
| 358 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 359 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 360 | sprintf(c_text, "0x%02X", src2imm); |
| 361 | break; |
| 362 | case 7: |
| 363 | sprintf(a_text, "%s", REG_NAMES[s1reg]); |
| 364 | sprintf(b_text, "1\\\\0x%02X", src2imm); |
| 365 | sprintf(c_text, "0x%02X", src2imm); |
| 366 | break; |
| 367 | } |
| 368 | |
| 369 | format_alu_op(aluop, a, dst_text, a_text, b_text, c_text); |
| 370 | format_transfer(parallel_xfer); |
| 371 | break; |
| 372 | } |
| 373 | |
| 374 | case 2: // Base set ALU (reg src2) |
| 375 | { |
| 376 | UINT64 parallel_xfer = (op & U64(0x0000003fffffffff)); |
| 377 | |
| 378 | int dst = (op >> 48) & 7; |
| 379 | int src1 = (op >> 45) & 7; |
| 380 | int src2 = (op >> 39) & 7; |
| 381 | int cl = (op >> 60) & 7; |
| 382 | int aluop = (op >> 51) & 0xff; |
| 383 | int a = (op >> 59) & 1; |
| 384 | |
| 385 | int s1reg = src1 | (0x4 << 3); |
| 386 | int s2reg = src2 | (0x4 << 3); |
| 387 | int dstcreg = dst | (0x4 << 3); |
| 388 | int dreg = dst | (0x4 << 3); |
| 389 | |
| 390 | sprintf(dst_text, "%s", REG_NAMES[dreg]); |
| 391 | switch (cl) |
| 392 | { |
| 393 | case 0: |
| 394 | sprintf(a_text, "%s", REG_NAMES[s1reg]); |
| 395 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 396 | sprintf(c_text, "@mf"); |
| 397 | break; |
| 398 | case 1: |
| 399 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 400 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 401 | sprintf(c_text, "%s", REG_NAMES[s2reg]); |
| 402 | break; |
| 403 | case 2: |
| 404 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 405 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 406 | sprintf(c_text, "%%%s", REG_NAMES[s1reg]); |
| 407 | break; |
| 408 | case 3: |
| 409 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 410 | sprintf(b_text, "%s\\\\%s", REG_NAMES[s1reg], REG_NAMES[s2reg]); |
| 411 | sprintf(c_text, "%%%s", REG_NAMES[s2reg]); |
| 412 | break; |
| 413 | case 4: |
| 414 | sprintf(a_text, "%s", REG_NAMES[s2reg]); |
| 415 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 416 | sprintf(c_text, "%%d0"); |
| 417 | break; |
| 418 | case 5: |
| 419 | sprintf(a_text, "%s", REG_NAMES[s2reg]); |
| 420 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 421 | sprintf(c_text, "@mf"); |
| 422 | break; |
| 423 | case 6: |
| 424 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 425 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 426 | sprintf(c_text, "%s", REG_NAMES[s2reg]); |
| 427 | break; |
| 428 | case 7: |
| 429 | sprintf(a_text, "%s", REG_NAMES[s1reg]); |
| 430 | sprintf(b_text, "1\\\\%s", REG_NAMES[s2reg]); |
| 431 | sprintf(c_text, "%s", REG_NAMES[s2reg]); |
| 432 | break; |
| 433 | } |
| 434 | |
| 435 | format_alu_op(aluop, a, dst_text, a_text, b_text, c_text); |
| 436 | format_transfer(parallel_xfer); |
| 437 | break; |
| 438 | } |
| 439 | |
| 440 | case 3: // Base set ALU (32-bit immediate) |
| 441 | { |
| 442 | int dst = (op >> 48) & 7; |
| 443 | int src1 = (op >> 45) & 7; |
| 444 | int dstbank = (op >> 39) & 0xf; |
| 445 | int s1bank = (op >> 36) & 7; |
| 446 | // int cond = (op >> 32) & 0xf; |
| 447 | int cl = (op >> 60) & 7; |
| 448 | int aluop = (op >> 51) & 0xff; |
| 449 | int a = (op >> 59) & 1; |
| 450 | UINT32 imm32 = (UINT32)(op); |
| 451 | |
| 452 | int dreg = dst | (dstbank << 3); |
| 453 | int s1reg = src1 | (s1bank << 3); |
| 454 | int dstcreg = dst | (0x4 << 3); |
| 455 | |
| 456 | sprintf(dst_text, "%s", REG_NAMES[dreg]); |
| 457 | switch (cl) |
| 458 | { |
| 459 | case 0: |
| 460 | sprintf(a_text, "0x%08X", imm32); |
| 461 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 462 | sprintf(c_text, "@mf"); |
| 463 | break; |
| 464 | case 1: |
| 465 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 466 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 467 | sprintf(c_text, "0x%08X", imm32); |
| 468 | break; |
| 469 | case 2: |
| 470 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 471 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 472 | sprintf(c_text, "%%0x%08X", imm32); |
| 473 | break; |
| 474 | case 3: |
| 475 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 476 | sprintf(b_text, "%s\\\\0x%08X", REG_NAMES[s1reg], imm32); |
| 477 | sprintf(c_text, "%%0x%08X", imm32); |
| 478 | break; |
| 479 | case 4: |
| 480 | sprintf(a_text, "0x%08X", imm32); |
| 481 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 482 | sprintf(c_text, "%%d0"); |
| 483 | break; |
| 484 | case 5: |
| 485 | sprintf(a_text, "0x%08X", imm32); |
| 486 | sprintf(b_text, "%s\\\\d0", REG_NAMES[s1reg]); |
| 487 | sprintf(c_text, "@mf"); |
| 488 | break; |
| 489 | case 6: |
| 490 | sprintf(a_text, "%s", REG_NAMES[dstcreg]); |
| 491 | sprintf(b_text, "%s", REG_NAMES[s1reg]); |
| 492 | sprintf(c_text, "0x%08X", imm32); |
| 493 | break; |
| 494 | case 7: |
| 495 | sprintf(a_text, "%s", REG_NAMES[s1reg]); |
| 496 | sprintf(b_text, "1\\\\0x%08X", imm32); |
| 497 | sprintf(c_text, "0x%08X", imm32); |
| 498 | break; |
| 499 | } |
| 500 | |
| 501 | format_alu_op(aluop, a, dst_text, a_text, b_text, c_text); |
| 502 | break; |
| 503 | } |
| 504 | } |
| 505 | } |
| 506 | break; |
| 507 | } |
| 508 | |
| 509 | default: |
| 510 | print("??? (%02X)", (UINT32)(op >> 60)); |
| 511 | break; |
| 512 | } |
| 513 | |
| 514 | return 8 | flags | DASMFLAG_SUPPORTED; |
| 29 | 515 | } |
| 30 | 516 | |
| 31 | 517 | |