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r24600 Wednesday 31st July, 2013 at 14:35:21 UTC by Wilbert Pol
minx.c: Modernized cpu core (nw)

[src/emu/cpu/minx]

minx.c minx.h minxfunc.h minxopce.h minxopcf.h minxops.h

trunk/src/emu/cpu/minx/minxfunc.h

r24599	r24600
1		INLINE UINT8 ADD8( minx_state *minx, UINT8 arg1, UINT8 arg2 )
	1	UINT8 minx_cpu_device::ADD8( UINT8 arg1, UINT8 arg2 )
2	2	{
3	3	UINT32 res = arg1 + arg2;
4		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	4	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
5	5	| ( ( res & 0x80 ) ? FLAG_S : 0 )
6	6	| ( ( ( arg2 ^ arg1 ^ 0x80 ) & ( arg2 ^ res ) & 0x80 ) ? FLAG_O : 0 )
7	7	| ( ( res & 0xFF00 ) ? FLAG_C : 0 )
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11	11	}
12	12
13	13
14		INLINE UINT16 ADD16( minx_state *minx, UINT16 arg1, UINT16 arg2 )
	14	UINT16 minx_cpu_device::ADD16( UINT16 arg1, UINT16 arg2 )
15	15	{
16	16	UINT32 res = arg1 + arg2;
17		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	17	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
18	18	| ( ( res & 0x8000 ) ? FLAG_S : 0 )
19	19	| ( ( ( arg2 ^ arg1 ^ 0x8000 ) & ( arg2 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
20	20	| ( ( res & 0xFF0000 ) ? FLAG_C : 0 )
r24599	r24600
24	24	}
25	25
26	26
27		INLINE UINT8 ADDC8( minx_state *minx, UINT8 arg1, UINT8 arg2 )
	27	UINT8 minx_cpu_device::ADDC8( UINT8 arg1, UINT8 arg2 )
28	28	{
29		UINT32 res = arg1 + arg2 + ( ( minx->F & FLAG_C ) ? 1 : 0 );
30		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	29	UINT32 res = arg1 + arg2 + ( ( m_F & FLAG_C ) ? 1 : 0 );
	30	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
31	31	| ( ( res & 0x80 ) ? FLAG_S : 0 )
32	32	| ( ( ( arg2 ^ arg1 ^ 0x80 ) & ( arg2 ^ res ) & 0x80 ) ? FLAG_O : 0 )
33	33	| ( ( res & 0xFF00 ) ? FLAG_C : 0 )
r24599	r24600
37	37	}
38	38
39	39
40		INLINE UINT16 ADDC16( minx_state *minx, UINT16 arg1, UINT16 arg2 )
	40	UINT16 minx_cpu_device::ADDC16( UINT16 arg1, UINT16 arg2 )
41	41	{
42		UINT32 res = arg1 + arg2 + ( ( minx->F & FLAG_C ) ? 1 : 0 );
43		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	42	UINT32 res = arg1 + arg2 + ( ( m_F & FLAG_C ) ? 1 : 0 );
	43	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
44	44	| ( ( res & 0x8000 ) ? FLAG_S : 0 )
45	45	| ( ( ( arg2 ^ arg1 ^ 0x8000 ) & ( arg2 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
46	46	| ( ( res & 0xFF0000 ) ? FLAG_C : 0 )
r24599	r24600
50	50	}
51	51
52	52
53		INLINE UINT8 INC8( minx_state *minx, UINT8 arg )
	53	UINT8 minx_cpu_device::INC8( UINT8 arg )
54	54	{
55		UINT8 old_F = minx->F;
56		UINT8 res = ADD8( minx, arg, 1 );
57		minx->F = ( old_F & ~ ( FLAG_Z ) )
	55	UINT8 old_F = m_F;
	56	UINT8 res = ADD8( arg, 1 );
	57	m_F = ( old_F & ~ ( FLAG_Z ) )
58	58	| ( ( res ) ? 0 : FLAG_Z )
59	59	;
60	60	return res;
61	61	}
62	62
63	63
64		INLINE UINT16 INC16( minx_state *minx, UINT16 arg )
	64	UINT16 minx_cpu_device::INC16( UINT16 arg )
65	65	{
66		UINT8 old_F = minx->F;
67		UINT16 res = ADD16( minx, arg, 1 );
68		minx->F = ( old_F & ~ ( FLAG_Z ) )
	66	UINT8 old_F = m_F;
	67	UINT16 res = ADD16( arg, 1 );
	68	m_F = ( old_F & ~ ( FLAG_Z ) )
69	69	| ( ( res ) ? 0 : FLAG_Z )
70	70	;
71	71	return res;
72	72	}
73	73
74	74
75		INLINE UINT8 SUB8( minx_state *minx, UINT8 arg1, UINT8 arg2 )
	75	UINT8 minx_cpu_device::SUB8( UINT8 arg1, UINT8 arg2 )
76	76	{
77	77	UINT32 res = arg1 - arg2;
78		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	78	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
79	79	| ( ( res & 0x80 ) ? FLAG_S : 0 )
80	80	| ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x80 ) ? FLAG_O : 0 )
81	81	| ( ( res & 0xFF00 ) ? FLAG_C : 0 )
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85	85	}
86	86
87	87
88		INLINE UINT16 SUB16( minx_state *minx, UINT16 arg1, UINT16 arg2 )
	88	UINT16 minx_cpu_device::SUB16( UINT16 arg1, UINT16 arg2 )
89	89	{
90	90	UINT32 res = arg1 - arg2;
91		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	91	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
92	92	| ( ( res & 0x8000 ) ? FLAG_S : 0 )
93	93	| ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
94	94	| ( ( res & 0xFF0000 ) ? FLAG_C : 0 )
r24599	r24600
98	98	}
99	99
100	100
101		INLINE UINT8 SUBC8( minx_state *minx, UINT8 arg1, UINT8 arg2 )
	101	UINT8 minx_cpu_device::SUBC8( UINT8 arg1, UINT8 arg2 )
102	102	{
103		UINT32 res = arg1 - arg2 - ( ( minx->F & FLAG_C ) ? 1 : 0 );
104		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	103	UINT32 res = arg1 - arg2 - ( ( m_F & FLAG_C ) ? 1 : 0 );
	104	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
105	105	| ( ( res & 0x80 ) ? FLAG_S : 0 )
106	106	| ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x80 ) ? FLAG_O : 0 )
107	107	| ( ( res & 0xFF00 ) ? FLAG_C : 0 )
r24599	r24600
111	111	}
112	112
113	113
114		INLINE UINT16 SUBC16( minx_state *minx, UINT16 arg1, UINT16 arg2 )
	114	UINT16 minx_cpu_device::SUBC16( UINT16 arg1, UINT16 arg2 )
115	115	{
116		UINT32 res = arg1 - arg2 - ( ( minx->F & FLAG_C ) ? 1 : 0 );
117		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	116	UINT32 res = arg1 - arg2 - ( ( m_F & FLAG_C ) ? 1 : 0 );
	117	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
118	118	| ( ( res & 0x8000 ) ? FLAG_S : 0 )
119	119	| ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
120	120	| ( ( res & 0xFF0000 ) ? FLAG_C : 0 )
r24599	r24600
124	124	}
125	125
126	126
127		INLINE UINT8 DEC8( minx_state *minx, UINT8 arg )
	127	UINT8 minx_cpu_device::DEC8( UINT8 arg )
128	128	{
129		UINT8 old_F = minx->F;
130		UINT8 res = SUB8( minx, arg, 1 );
131		minx->F = ( old_F & ~ ( FLAG_Z ) )
	129	UINT8 old_F = m_F;
	130	UINT8 res = SUB8( arg, 1 );
	131	m_F = ( old_F & ~ ( FLAG_Z ) )
132	132	| ( ( res ) ? 0 : FLAG_Z )
133	133	;
134	134	return res;
135	135	}
136	136
137	137
138		INLINE UINT16 DEC16( minx_state *minx, UINT16 arg )
	138	UINT16 minx_cpu_device::DEC16( UINT16 arg )
139	139	{
140		UINT8 old_F = minx->F;
141		UINT16 res = SUB16( minx, arg, 1 );
142		minx->F = ( old_F & ~ ( FLAG_Z ) )
	140	UINT8 old_F = m_F;
	141	UINT16 res = SUB16( arg, 1 );
	142	m_F = ( old_F & ~ ( FLAG_Z ) )
143	143	| ( ( res ) ? 0 : FLAG_Z )
144	144	;
145	145	return res;
146	146	}
147	147
148	148
149		INLINE UINT8 AND8( minx_state *minx, UINT8 arg1, UINT8 arg2 )
	149	UINT8 minx_cpu_device::AND8( UINT8 arg1, UINT8 arg2 )
150	150	{
151	151	UINT8 res = arg1 & arg2;
152		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_Z ) )
	152	m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
153	153	| ( ( res & 0x80 ) ? FLAG_S : 0 )
154	154	| ( ( res ) ? 0 : FLAG_Z )
155	155	;
r24599	r24600
157	157	}
158	158
159	159
160		INLINE UINT8 OR8( minx_state *minx, UINT8 arg1, UINT8 arg2 )
	160	UINT8 minx_cpu_device::OR8( UINT8 arg1, UINT8 arg2 )
161	161	{
162	162	UINT8 res = arg1 | arg2;
163		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_Z ) )
	163	m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
164	164	| ( ( res & 0x80 ) ? FLAG_S : 0 )
165	165	| ( ( res ) ? 0 : FLAG_Z )
166	166	;
r24599	r24600
168	168	}
169	169
170	170
171		INLINE UINT8 XOR8( minx_state *minx, UINT8 arg1, UINT8 arg2 )
	171	UINT8 minx_cpu_device::XOR8( UINT8 arg1, UINT8 arg2 )
172	172	{
173	173	UINT8 res = arg1 ^ arg2;
174		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_Z ) )
	174	m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
175	175	| ( ( res & 0x80 ) ? FLAG_S : 0 )
176	176	| ( ( res ) ? 0 : FLAG_Z )
177	177	;
r24599	r24600
179	179	}
180	180
181	181
182		INLINE UINT8 NOT8( minx_state *minx, UINT8 arg )
	182	UINT8 minx_cpu_device::NOT8( UINT8 arg )
183	183	{
184	184	UINT8 res = ~arg;
185		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_Z ) )
	185	m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
186	186	| ( ( res & 0x80 ) ? FLAG_S : 0 )
187	187	| ( ( res ) ? 0 : FLAG_Z )
188	188	;
r24599	r24600
190	190	}
191	191
192	192
193		INLINE UINT8 NEG8( minx_state *minx, UINT8 arg )
	193	UINT8 minx_cpu_device::NEG8( UINT8 arg )
194	194	{
195	195	UINT8 res = -arg;
196		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	196	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
197	197	| ( ( res & 0x80 ) ? FLAG_S : 0 )
198	198	| ( ( res ) ? 0 : FLAG_Z )
199	199	;
r24599	r24600
201	201	}
202	202
203	203
204		INLINE UINT8 SAL8( minx_state *minx, UINT8 arg )
	204	UINT8 minx_cpu_device::SAL8( UINT8 arg )
205	205	{
206	206	UINT16 res = arg << 1;
207		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	207	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
208	208	| ( ( res & 0x80 ) ? FLAG_S : 0 )
209	209	| ( ( arg != 0 && res == 0 ) ? FLAG_O : 0 )
210	210	| ( ( arg & 0x80 ) ? FLAG_C : 0 )
r24599	r24600
214	214	}
215	215
216	216
217		INLINE UINT8 SAR8( minx_state *minx, UINT8 arg )
	217	UINT8 minx_cpu_device::SAR8( UINT8 arg )
218	218	{
219	219	UINT16 res = ( arg >> 1 ) | ( arg & 0x80 );
220		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
	220	m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
221	221	| ( ( res & 0x80 ) ? FLAG_S : 0 )
222	222	| ( ( arg != 0x80 && res == 0x80 ) ? FLAG_O : 0 )
223	223	| ( ( arg & 0x01 ) ? FLAG_C : 0 )
r24599	r24600
227	227	}
228	228
229	229
230		INLINE UINT8 SHL8( minx_state *minx, UINT8 arg )
	230	UINT8 minx_cpu_device::SHL8( UINT8 arg )
231	231	{
232	232	UINT16 res = arg << 1;
233		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
	233	m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
234	234	| ( ( res & 0x80 ) ? FLAG_S : 0 )
235	235	| ( ( arg & 0x80 ) ? FLAG_C : 0 )
236	236	| ( ( res ) ? 0 : FLAG_Z )
r24599	r24600
239	239	}
240	240
241	241
242		INLINE UINT8 SHR8( minx_state *minx, UINT8 arg )
	242	UINT8 minx_cpu_device::SHR8( UINT8 arg )
243	243	{
244	244	UINT16 res = arg >> 1;
245		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
	245	m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
246	246	| ( ( res & 0x80 ) ? FLAG_S : 0 )
247	247	| ( ( arg & 0x01 ) ? FLAG_C : 0 )
248	248	| ( ( res ) ? 0 : FLAG_Z )
r24599	r24600
251	251	}
252	252
253	253
254		INLINE UINT8 ROLC8( minx_state *minx, UINT8 arg )
	254	UINT8 minx_cpu_device::ROLC8( UINT8 arg )
255	255	{
256		UINT16 res = ( arg << 1 ) | ( ( minx->F & FLAG_C ) ? 1 : 0 );
257		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
	256	UINT16 res = ( arg << 1 ) | ( ( m_F & FLAG_C ) ? 1 : 0 );
	257	m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
258	258	| ( ( res & 0x80 ) ? FLAG_S : 0 )
259	259	| ( ( arg & 0x80 ) ? FLAG_C : 0 )
260	260	| ( ( res ) ? 0 : FLAG_Z )
r24599	r24600
263	263	}
264	264
265	265
266		INLINE UINT8 RORC8( minx_state *minx, UINT8 arg )
	266	UINT8 minx_cpu_device::RORC8( UINT8 arg )
267	267	{
268		UINT16 res = ( arg >> 1 ) | ( ( minx->F & FLAG_C ) ? 0x80 : 0 );
269		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
	268	UINT16 res = ( arg >> 1 ) | ( ( m_F & FLAG_C ) ? 0x80 : 0 );
	269	m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
270	270	| ( ( res & 0x80 ) ? FLAG_S : 0 )
271	271	| ( ( arg & 0x01 ) ? FLAG_C : 0 )
272	272	| ( ( res ) ? 0 : FLAG_Z )
r24599	r24600
275	275	}
276	276
277	277
278		INLINE UINT8 ROL8( minx_state *minx, UINT8 arg )
	278	UINT8 minx_cpu_device::ROL8( UINT8 arg )
279	279	{
280	280	UINT16 res = ( arg << 1 ) | ( ( arg & 0x80 ) ? 1 : 0 );
281		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
	281	m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
282	282	| ( ( res & 0x80 ) ? FLAG_S : 0 )
283	283	| ( ( arg & 0x80 ) ? FLAG_C : 0 )
284	284	| ( ( res ) ? 0 : FLAG_Z )
r24599	r24600
287	287	}
288	288
289	289
290		INLINE UINT8 ROR8( minx_state *minx, UINT8 arg )
	290	UINT8 minx_cpu_device::ROR8( UINT8 arg )
291	291	{
292	292	UINT16 res = ( arg >> 1 ) | ( ( arg & 0x01 ) ? 0x80 : 0 );
293		minx->F = ( minx->F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
	293	m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
294	294	| ( ( res & 0x80 ) ? FLAG_S : 0 )
295	295	| ( ( arg & 0x01 ) ? FLAG_C : 0 )
296	296	| ( ( res ) ? 0 : FLAG_Z )
r24599	r24600
299	299	}
300	300
301	301
302		INLINE void PUSH8( minx_state *minx, UINT8 arg )
	302	void minx_cpu_device::PUSH8( UINT8 arg )
303	303	{
304		minx->SP = minx->SP - 1;
305		WR( minx->SP, arg );
	304	m_SP = m_SP - 1;
	305	WR( m_SP, arg );
306	306	}
307	307
308	308
309		INLINE void PUSH16( minx_state *minx, UINT16 arg )
	309	void minx_cpu_device::PUSH16( UINT16 arg )
310	310	{
311		PUSH8( minx, arg >> 8 );
312		PUSH8( minx, arg & 0x00FF );
	311	PUSH8( arg >> 8 );
	312	PUSH8( arg & 0x00FF );
313	313	}
314	314
315	315
316		INLINE UINT8 POP8( minx_state *minx )
	316	UINT8 minx_cpu_device::POP8()
317	317	{
318		UINT8 res = RD( minx->SP );
319		minx->SP = minx->SP + 1;
	318	UINT8 res = RD( m_SP );
	319	m_SP = m_SP + 1;
320	320	return res;
321	321	}
322	322
323	323
324		INLINE UINT16 POP16( minx_state *minx )
	324	UINT16 minx_cpu_device::POP16()
325	325	{
326		return POP8(minx) | ( POP8(minx) << 8 );
	326	return POP8() | ( POP8() << 8 );
327	327	}
328	328
329	329
330		INLINE void JMP( minx_state *minx, UINT16 arg )
	330	void minx_cpu_device::JMP( UINT16 arg )
331	331	{
332		minx->V = minx->U;
333		minx->PC = arg;
	332	m_V = m_U;
	333	m_PC = arg;
334	334	}
335	335
336	336
337		INLINE void CALL( minx_state *minx, UINT16 arg )
	337	void minx_cpu_device::CALL( UINT16 arg )
338	338	{
339		PUSH8( minx, minx->V );
340		PUSH16( minx, minx->PC );
341		JMP( minx, arg );
	339	PUSH8( m_V );
	340	PUSH16( m_PC );
	341	JMP( arg );
342	342	}
343	343
344	344
345		#define AD1_IHL UINT32 addr1 = ( minx->I << 16 ) | minx->HL
346		#define AD1_IN8 UINT32 addr1 = ( minx->I << 16 ) | ( minx->N << 8 ) | rdop(minx)
347		#define AD1_I16 UINT32 addr1 = ( minx->I << 16 ) | rdop16(minx)
348		#define AD1_XIX UINT32 addr1 = ( minx->XI << 16 ) | minx->X
349		#define AD1_YIY UINT32 addr1 = ( minx->YI << 16 ) | minx->Y
350		#define AD1_X8  UINT32 addr1 = ( minx->XI << 16 ) | ( minx->X + rdop(minx) )
351		#define AD1_Y8  UINT32 addr1 = ( minx->YI << 16 ) | ( minx->Y + rdop(minx) )
352		#define AD1_XL  UINT32 addr1 = ( minx->XI << 16 ) | ( minx->X + ( minx->HL & 0x00FF ) )
353		#define AD1_YL  UINT32 addr1 = ( minx->YI << 16 ) | ( minx->Y + ( minx->HL & 0x00FF ) )
354		#define AD2_IHL UINT32 addr2 = ( minx->I << 16 ) | minx->HL
355		#define AD2_IN8 UINT32 addr2 = ( minx->I << 16 ) | ( minx->N << 8 ) | rdop(minx)
356		#define AD2_I16 UINT32 addr2 = ( minx->I << 16 ) | rdop(minx); addr2 |= ( rdop(minx) << 8 )
357		#define AD2_XIX UINT32 addr2 = ( minx->XI << 16 ) | minx->X
358		#define AD2_YIY UINT32 addr2 = ( minx->YI << 16 ) | minx->Y
359		#define AD2_X8  UINT32 addr2 = ( minx->XI << 16 ) | ( minx->X + rdop(minx) )
360		#define AD2_Y8  UINT32 addr2 = ( minx->YI << 16 ) | ( minx->Y + rdop(minx) )
361		#define AD2_XL  UINT32 addr2 = ( minx->XI << 16 ) | ( minx->X + ( minx->HL & 0x00FF ) )
362		#define AD2_YL  UINT32 addr2 = ( minx->YI << 16 ) | ( minx->Y + ( minx->HL & 0x00FF ) )
	345	#define AD1_IHL UINT32 addr1 = ( m_I << 16 ) | m_HL
	346	#define AD1_IN8 UINT32 addr1 = ( m_I << 16 ) | ( m_N << 8 ) | rdop()
	347	#define AD1_I16 UINT32 addr1 = ( m_I << 16 ) | rdop16()
	348	#define AD1_XIX UINT32 addr1 = ( m_XI << 16 ) | m_X
	349	#define AD1_YIY UINT32 addr1 = ( m_YI << 16 ) | m_Y
	350	#define AD1_X8  UINT32 addr1 = ( m_XI << 16 ) | ( m_X + rdop() )
	351	#define AD1_Y8  UINT32 addr1 = ( m_YI << 16 ) | ( m_Y + rdop() )
	352	#define AD1_XL  UINT32 addr1 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
	353	#define AD1_YL  UINT32 addr1 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )
	354	#define AD2_IHL UINT32 addr2 = ( m_I << 16 ) | m_HL
	355	#define AD2_IN8 UINT32 addr2 = ( m_I << 16 ) | ( m_N << 8 ) | rdop()
	356	#define AD2_I16 UINT32 addr2 = ( m_I << 16 ) | rdop(); addr2 |= ( rdop() << 8 )
	357	#define AD2_XIX UINT32 addr2 = ( m_XI << 16 ) | m_X
	358	#define AD2_YIY UINT32 addr2 = ( m_YI << 16 ) | m_Y
	359	#define AD2_X8  UINT32 addr2 = ( m_XI << 16 ) | ( m_X + rdop() )
	360	#define AD2_Y8  UINT32 addr2 = ( m_YI << 16 ) | ( m_Y + rdop() )
	361	#define AD2_XL  UINT32 addr2 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
	362	#define AD2_YL  UINT32 addr2 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )

trunk/src/emu/cpu/minx/minx.h

r24599	r24600
11	11	MINX_XI, MINX_YI,
12	12	};
13	13
14		DECLARE_LEGACY_CPU_DEVICE(MINX, minx);
15	14
16		extern CPU_DISASSEMBLE( minx );
	15	class minx_cpu_device :  public cpu_device
	16	{
	17	public:
	18	// construction/destruction
	19	minx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
17	20
	21	protected:
	22	// device-level overrides
	23	virtual void device_start();
	24	virtual void device_reset();
	25
	26	// device_execute_interface overrides
	27	virtual UINT32 execute_min_cycles() const { return 1; }
	28	virtual UINT32 execute_max_cycles() const { return 4; }
	29	virtual UINT32 execute_input_lines() const { return 1; }
	30	virtual void execute_run();
	31	virtual void execute_set_input(int inputnum, int state);
	32
	33	// device_memory_interface overrides
	34	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
	35
	36	// device_state_interface overrides
	37	void state_string_export(const device_state_entry &entry, astring &string);
	38
	39	// device_disasm_interface overrides
	40	virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
	41	virtual UINT32 disasm_max_opcode_bytes() const { return 5; }
	42	virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
	43
	44	private:
	45	address_space_config m_program_config;
	46
	47	UINT16  m_PC;
	48	UINT16  m_SP;
	49	UINT16  m_BA;
	50	UINT16  m_HL;
	51	UINT16  m_X;
	52	UINT16  m_Y;
	53	UINT8   m_U;
	54	UINT8   m_V;
	55	UINT8   m_F;
	56	UINT8   m_E;
	57	UINT8   m_N;
	58	UINT8   m_I;
	59	UINT8   m_XI;
	60	UINT8   m_YI;
	61	UINT8   m_halted;
	62	UINT8   m_interrupt_pending;
	63	address_space *m_program;
	64	int m_icount;
	65	// For debugger
	66	UINT32 m_curpc;
	67	UINT16 m_flags;
	68
	69	UINT16 rd16( UINT32 offset );
	70	void wr16( UINT32 offset, UINT16 data );
	71	UINT8 rdop();
	72	UINT16 rdop16();
	73	UINT8 ADD8( UINT8 arg1, UINT8 arg2 );
	74	UINT16 ADD16( UINT16 arg1, UINT16 arg2 );
	75	UINT8 ADDC8( UINT8 arg1, UINT8 arg2 );
	76	UINT16 ADDC16( UINT16 arg1, UINT16 arg2 );
	77	UINT8 INC8( UINT8 arg );
	78	UINT16 INC16( UINT16 arg );
	79	UINT8 SUB8( UINT8 arg1, UINT8 arg2 );
	80	UINT16 SUB16( UINT16 arg1, UINT16 arg2 );
	81	UINT8 SUBC8( UINT8 arg1, UINT8 arg2 );
	82	UINT16 SUBC16( UINT16 arg1, UINT16 arg2 );
	83	UINT8 DEC8( UINT8 arg );
	84	UINT16 DEC16( UINT16 arg );
	85	UINT8 AND8( UINT8 arg1, UINT8 arg2 );
	86	UINT8 OR8( UINT8 arg1, UINT8 arg2 );
	87	UINT8 XOR8( UINT8 arg1, UINT8 arg2 );
	88	UINT8 NOT8( UINT8 arg );
	89	UINT8 NEG8( UINT8 arg );
	90	UINT8 SAL8( UINT8 arg );
	91	UINT8 SAR8( UINT8 arg );
	92	UINT8 SHL8( UINT8 arg );
	93	UINT8 SHR8( UINT8 arg );
	94	UINT8 ROLC8( UINT8 arg );
	95	UINT8 RORC8( UINT8 arg );
	96	UINT8 ROL8( UINT8 arg );
	97	UINT8 ROR8( UINT8 arg );
	98	void PUSH8( UINT8 arg );
	99	void PUSH16( UINT16 arg );
	100	UINT8 POP8();
	101	UINT16 POP16();
	102	void JMP( UINT16 arg );
	103	void CALL( UINT16 arg );
	104
	105	void minx_00();
	106	void minx_01();
	107	void minx_02();
	108	void minx_03();
	109	void minx_04();
	110	void minx_05();
	111	void minx_06();
	112	void minx_07();
	113	void minx_08();
	114	void minx_09();
	115	void minx_0A();
	116	void minx_0B();
	117	void minx_0C();
	118	void minx_0D();
	119	void minx_0E();
	120	void minx_0F();
	121	void minx_10();
	122	void minx_11();
	123	void minx_12();
	124	void minx_13();
	125	void minx_14();
	126	void minx_15();
	127	void minx_16();
	128	void minx_17();
	129	void minx_18();
	130	void minx_19();
	131	void minx_1A();
	132	void minx_1B();
	133	void minx_1C();
	134	void minx_1D();
	135	void minx_1E();
	136	void minx_1F();
	137	void minx_20();
	138	void minx_21();
	139	void minx_22();
	140	void minx_23();
	141	void minx_24();
	142	void minx_25();
	143	void minx_26();
	144	void minx_27();
	145	void minx_28();
	146	void minx_29();
	147	void minx_2A();
	148	void minx_2B();
	149	void minx_2C();
	150	void minx_2D();
	151	void minx_2E();
	152	void minx_2F();
	153	void minx_30();
	154	void minx_31();
	155	void minx_32();
	156	void minx_33();
	157	void minx_34();
	158	void minx_35();
	159	void minx_36();
	160	void minx_37();
	161	void minx_38();
	162	void minx_39();
	163	void minx_3A();
	164	void minx_3B();
	165	void minx_3C();
	166	void minx_3D();
	167	void minx_3E();
	168	void minx_3F();
	169	void minx_40();
	170	void minx_41();
	171	void minx_42();
	172	void minx_43();
	173	void minx_44();
	174	void minx_45();
	175	void minx_46();
	176	void minx_47();
	177	void minx_48();
	178	void minx_49();
	179	void minx_4A();
	180	void minx_4B();
	181	void minx_4C();
	182	void minx_4D();
	183	void minx_4E();
	184	void minx_4F();
	185	void minx_50();
	186	void minx_51();
	187	void minx_52();
	188	void minx_53();
	189	void minx_54();
	190	void minx_55();
	191	void minx_56();
	192	void minx_57();
	193	void minx_58();
	194	void minx_59();
	195	void minx_5A();
	196	void minx_5B();
	197	void minx_5C();
	198	void minx_5D();
	199	void minx_5E();
	200	void minx_5F();
	201	void minx_60();
	202	void minx_61();
	203	void minx_62();
	204	void minx_63();
	205	void minx_64();
	206	void minx_65();
	207	void minx_66();
	208	void minx_67();
	209	void minx_68();
	210	void minx_69();
	211	void minx_6A();
	212	void minx_6B();
	213	void minx_6C();
	214	void minx_6D();
	215	void minx_6E();
	216	void minx_6F();
	217	void minx_70();
	218	void minx_71();
	219	void minx_72();
	220	void minx_73();
	221	void minx_74();
	222	void minx_75();
	223	void minx_76();
	224	void minx_77();
	225	void minx_78();
	226	void minx_79();
	227	void minx_7A();
	228	void minx_7B();
	229	void minx_7C();
	230	void minx_7D();
	231	void minx_7E();
	232	void minx_7F();
	233	void minx_80();
	234	void minx_81();
	235	void minx_82();
	236	void minx_83();
	237	void minx_84();
	238	void minx_85();
	239	void minx_86();
	240	void minx_87();
	241	void minx_88();
	242	void minx_89();
	243	void minx_8A();
	244	void minx_8B();
	245	void minx_8C();
	246	void minx_8D();
	247	void minx_8E();
	248	void minx_8F();
	249	void minx_90();
	250	void minx_91();
	251	void minx_92();
	252	void minx_93();
	253	void minx_94();
	254	void minx_95();
	255	void minx_96();
	256	void minx_97();
	257	void minx_98();
	258	void minx_99();
	259	void minx_9A();
	260	void minx_9B();
	261	void minx_9C();
	262	void minx_9D();
	263	void minx_9E();
	264	void minx_9F();
	265	void minx_A0();
	266	void minx_A1();
	267	void minx_A2();
	268	void minx_A3();
	269	void minx_A4();
	270	void minx_A5();
	271	void minx_A6();
	272	void minx_A7();
	273	void minx_A8();
	274	void minx_A9();
	275	void minx_AA();
	276	void minx_AB();
	277	void minx_AC();
	278	void minx_AD();
	279	void minx_AE();
	280	void minx_AF();
	281	void minx_B0();
	282	void minx_B1();
	283	void minx_B2();
	284	void minx_B3();
	285	void minx_B4();
	286	void minx_B5();
	287	void minx_B6();
	288	void minx_B7();
	289	void minx_B8();
	290	void minx_B9();
	291	void minx_BA();
	292	void minx_BB();
	293	void minx_BC();
	294	void minx_BD();
	295	void minx_BE();
	296	void minx_BF();
	297	void minx_C0();
	298	void minx_C1();
	299	void minx_C2();
	300	void minx_C3();
	301	void minx_C4();
	302	void minx_C5();
	303	void minx_C6();
	304	void minx_C7();
	305	void minx_C8();
	306	void minx_C9();
	307	void minx_CA();
	308	void minx_CB();
	309	void minx_CC();
	310	void minx_CD();
	311	void minx_CE();
	312	void minx_CF();
	313	void minx_D0();
	314	void minx_D1();
	315	void minx_D2();
	316	void minx_D3();
	317	void minx_D4();
	318	void minx_D5();
	319	void minx_D6();
	320	void minx_D7();
	321	void minx_D8();
	322	void minx_D9();
	323	void minx_DA();
	324	void minx_DB();
	325	void minx_DC();
	326	void minx_DD();
	327	void minx_DE();
	328	void minx_DF();
	329	void minx_E0();
	330	void minx_E1();
	331	void minx_E2();
	332	void minx_E3();
	333	void minx_E4();
	334	void minx_E5();
	335	void minx_E6();
	336	void minx_E7();
	337	void minx_E8();
	338	void minx_E9();
	339	void minx_EA();
	340	void minx_EB();
	341	void minx_EC();
	342	void minx_ED();
	343	void minx_EE();
	344	void minx_EF();
	345	void minx_F0();
	346	void minx_F1();
	347	void minx_F2();
	348	void minx_F3();
	349	void minx_F4();
	350	void minx_F5();
	351	void minx_F6();
	352	void minx_F7();
	353	void minx_F8();
	354	void minx_F9();
	355	void minx_FA();
	356	void minx_FB();
	357	void minx_FC();
	358	void minx_FD();
	359	void minx_FE();
	360	void minx_FF();
	361
	362	void minx_CE_00();
	363	void minx_CE_01();
	364	void minx_CE_02();
	365	void minx_CE_03();
	366	void minx_CE_04();
	367	void minx_CE_05();
	368	void minx_CE_06();
	369	void minx_CE_07();
	370	void minx_CE_08();
	371	void minx_CE_09();
	372	void minx_CE_0A();
	373	void minx_CE_0B();
	374	void minx_CE_0C();
	375	void minx_CE_0D();
	376	void minx_CE_0E();
	377	void minx_CE_0F();
	378	void minx_CE_10();
	379	void minx_CE_11();
	380	void minx_CE_12();
	381	void minx_CE_13();
	382	void minx_CE_14();
	383	void minx_CE_15();
	384	void minx_CE_16();
	385	void minx_CE_17();
	386	void minx_CE_18();
	387	void minx_CE_19();
	388	void minx_CE_1A();
	389	void minx_CE_1B();
	390	void minx_CE_1C();
	391	void minx_CE_1D();
	392	void minx_CE_1E();
	393	void minx_CE_1F();
	394	void minx_CE_20();
	395	void minx_CE_21();
	396	void minx_CE_22();
	397	void minx_CE_23();
	398	void minx_CE_24();
	399	void minx_CE_25();
	400	void minx_CE_26();
	401	void minx_CE_27();
	402	void minx_CE_28();
	403	void minx_CE_29();
	404	void minx_CE_2A();
	405	void minx_CE_2B();
	406	void minx_CE_2C();
	407	void minx_CE_2D();
	408	void minx_CE_2E();
	409	void minx_CE_2F();
	410	void minx_CE_30();
	411	void minx_CE_31();
	412	void minx_CE_32();
	413	void minx_CE_33();
	414	void minx_CE_34();
	415	void minx_CE_35();
	416	void minx_CE_36();
	417	void minx_CE_37();
	418	void minx_CE_38();
	419	void minx_CE_39();
	420	void minx_CE_3A();
	421	void minx_CE_3B();
	422	void minx_CE_3C();
	423	void minx_CE_3D();
	424	void minx_CE_3E();
	425	void minx_CE_3F();
	426	void minx_CE_40();
	427	void minx_CE_41();
	428	void minx_CE_42();
	429	void minx_CE_43();
	430	void minx_CE_44();
	431	void minx_CE_45();
	432	void minx_CE_46();
	433	void minx_CE_47();
	434	void minx_CE_48();
	435	void minx_CE_49();
	436	void minx_CE_4A();
	437	void minx_CE_4B();
	438	void minx_CE_4C();
	439	void minx_CE_4D();
	440	void minx_CE_4E();
	441	void minx_CE_4F();
	442	void minx_CE_50();
	443	void minx_CE_51();
	444	void minx_CE_52();
	445	void minx_CE_53();
	446	void minx_CE_54();
	447	void minx_CE_55();
	448	void minx_CE_56();
	449	void minx_CE_57();
	450	void minx_CE_58();
	451	void minx_CE_59();
	452	void minx_CE_5A();
	453	void minx_CE_5B();
	454	void minx_CE_5C();
	455	void minx_CE_5D();
	456	void minx_CE_5E();
	457	void minx_CE_5F();
	458	void minx_CE_60();
	459	void minx_CE_61();
	460	void minx_CE_62();
	461	void minx_CE_63();
	462	void minx_CE_64();
	463	void minx_CE_65();
	464	void minx_CE_66();
	465	void minx_CE_67();
	466	void minx_CE_68();
	467	void minx_CE_69();
	468	void minx_CE_6A();
	469	void minx_CE_6B();
	470	void minx_CE_6C();
	471	void minx_CE_6D();
	472	void minx_CE_6E();
	473	void minx_CE_6F();
	474	void minx_CE_70();
	475	void minx_CE_71();
	476	void minx_CE_72();
	477	void minx_CE_73();
	478	void minx_CE_74();
	479	void minx_CE_75();
	480	void minx_CE_76();
	481	void minx_CE_77();
	482	void minx_CE_78();
	483	void minx_CE_79();
	484	void minx_CE_7A();
	485	void minx_CE_7B();
	486	void minx_CE_7C();
	487	void minx_CE_7D();
	488	void minx_CE_7E();
	489	void minx_CE_7F();
	490	void minx_CE_80();
	491	void minx_CE_81();
	492	void minx_CE_82();
	493	void minx_CE_83();
	494	void minx_CE_84();
	495	void minx_CE_85();
	496	void minx_CE_86();
	497	void minx_CE_87();
	498	void minx_CE_88();
	499	void minx_CE_89();
	500	void minx_CE_8A();
	501	void minx_CE_8B();
	502	void minx_CE_8C();
	503	void minx_CE_8D();
	504	void minx_CE_8E();
	505	void minx_CE_8F();
	506	void minx_CE_90();
	507	void minx_CE_91();
	508	void minx_CE_92();
	509	void minx_CE_93();
	510	void minx_CE_94();
	511	void minx_CE_95();
	512	void minx_CE_96();
	513	void minx_CE_97();
	514	void minx_CE_98();
	515	void minx_CE_99();
	516	void minx_CE_9A();
	517	void minx_CE_9B();
	518	void minx_CE_9C();
	519	void minx_CE_9D();
	520	void minx_CE_9E();
	521	void minx_CE_9F();
	522	void minx_CE_A0();
	523	void minx_CE_A1();
	524	void minx_CE_A2();
	525	void minx_CE_A3();
	526	void minx_CE_A4();
	527	void minx_CE_A5();
	528	void minx_CE_A6();
	529	void minx_CE_A7();
	530	void minx_CE_A8();
	531	void minx_CE_A9();
	532	void minx_CE_AA();
	533	void minx_CE_AB();
	534	void minx_CE_AC();
	535	void minx_CE_AD();
	536	void minx_CE_AE();
	537	void minx_CE_AF();
	538	void minx_CE_B0();
	539	void minx_CE_B1();
	540	void minx_CE_B2();
	541	void minx_CE_B3();
	542	void minx_CE_B4();
	543	void minx_CE_B5();
	544	void minx_CE_B6();
	545	void minx_CE_B7();
	546	void minx_CE_B8();
	547	void minx_CE_B9();
	548	void minx_CE_BA();
	549	void minx_CE_BB();
	550	void minx_CE_BC();
	551	void minx_CE_BD();
	552	void minx_CE_BE();
	553	void minx_CE_BF();
	554	void minx_CE_C0();
	555	void minx_CE_C1();
	556	void minx_CE_C2();
	557	void minx_CE_C3();
	558	void minx_CE_C4();
	559	void minx_CE_C5();
	560	void minx_CE_C6();
	561	void minx_CE_C7();
	562	void minx_CE_C8();
	563	void minx_CE_C9();
	564	void minx_CE_CA();
	565	void minx_CE_CB();
	566	void minx_CE_CC();
	567	void minx_CE_CD();
	568	void minx_CE_CE();
	569	void minx_CE_CF();
	570	void minx_CE_D0();
	571	void minx_CE_D1();
	572	void minx_CE_D2();
	573	void minx_CE_D3();
	574	void minx_CE_D4();
	575	void minx_CE_D5();
	576	void minx_CE_D6();
	577	void minx_CE_D7();
	578	void minx_CE_D8();
	579	void minx_CE_D9();
	580	void minx_CE_DA();
	581	void minx_CE_DB();
	582	void minx_CE_DC();
	583	void minx_CE_DD();
	584	void minx_CE_DE();
	585	void minx_CE_DF();
	586	void minx_CE_E0();
	587	void minx_CE_E1();
	588	void minx_CE_E2();
	589	void minx_CE_E3();
	590	void minx_CE_E4();
	591	void minx_CE_E5();
	592	void minx_CE_E6();
	593	void minx_CE_E7();
	594	void minx_CE_E8();
	595	void minx_CE_E9();
	596	void minx_CE_EA();
	597	void minx_CE_EB();
	598	void minx_CE_EC();
	599	void minx_CE_ED();
	600	void minx_CE_EE();
	601	void minx_CE_EF();
	602	void minx_CE_F0();
	603	void minx_CE_F1();
	604	void minx_CE_F2();
	605	void minx_CE_F3();
	606	void minx_CE_F4();
	607	void minx_CE_F5();
	608	void minx_CE_F6();
	609	void minx_CE_F7();
	610	void minx_CE_F8();
	611	void minx_CE_F9();
	612	void minx_CE_FA();
	613	void minx_CE_FB();
	614	void minx_CE_FC();
	615	void minx_CE_FD();
	616	void minx_CE_FE();
	617	void minx_CE_FF();
	618
	619	void minx_CF_00();
	620	void minx_CF_01();
	621	void minx_CF_02();
	622	void minx_CF_03();
	623	void minx_CF_04();
	624	void minx_CF_05();
	625	void minx_CF_06();
	626	void minx_CF_07();
	627	void minx_CF_08();
	628	void minx_CF_09();
	629	void minx_CF_0A();
	630	void minx_CF_0B();
	631	void minx_CF_0C();
	632	void minx_CF_0D();
	633	void minx_CF_0E();
	634	void minx_CF_0F();
	635	void minx_CF_10();
	636	void minx_CF_11();
	637	void minx_CF_12();
	638	void minx_CF_13();
	639	void minx_CF_14();
	640	void minx_CF_15();
	641	void minx_CF_16();
	642	void minx_CF_17();
	643	void minx_CF_18();
	644	void minx_CF_19();
	645	void minx_CF_1A();
	646	void minx_CF_1B();
	647	void minx_CF_1C();
	648	void minx_CF_1D();
	649	void minx_CF_1E();
	650	void minx_CF_1F();
	651	void minx_CF_20();
	652	void minx_CF_21();
	653	void minx_CF_22();
	654	void minx_CF_23();
	655	void minx_CF_24();
	656	void minx_CF_25();
	657	void minx_CF_26();
	658	void minx_CF_27();
	659	void minx_CF_28();
	660	void minx_CF_29();
	661	void minx_CF_2A();
	662	void minx_CF_2B();
	663	void minx_CF_2C();
	664	void minx_CF_2D();
	665	void minx_CF_2E();
	666	void minx_CF_2F();
	667	void minx_CF_30();
	668	void minx_CF_31();
	669	void minx_CF_32();
	670	void minx_CF_33();
	671	void minx_CF_34();
	672	void minx_CF_35();
	673	void minx_CF_36();
	674	void minx_CF_37();
	675	void minx_CF_38();
	676	void minx_CF_39();
	677	void minx_CF_3A();
	678	void minx_CF_3B();
	679	void minx_CF_3C();
	680	void minx_CF_3D();
	681	void minx_CF_3E();
	682	void minx_CF_3F();
	683	void minx_CF_40();
	684	void minx_CF_41();
	685	void minx_CF_42();
	686	void minx_CF_43();
	687	void minx_CF_44();
	688	void minx_CF_45();
	689	void minx_CF_46();
	690	void minx_CF_47();
	691	void minx_CF_48();
	692	void minx_CF_49();
	693	void minx_CF_4A();
	694	void minx_CF_4B();
	695	void minx_CF_4C();
	696	void minx_CF_4D();
	697	void minx_CF_4E();
	698	void minx_CF_4F();
	699	void minx_CF_50();
	700	void minx_CF_51();
	701	void minx_CF_52();
	702	void minx_CF_53();
	703	void minx_CF_54();
	704	void minx_CF_55();
	705	void minx_CF_56();
	706	void minx_CF_57();
	707	void minx_CF_58();
	708	void minx_CF_59();
	709	void minx_CF_5A();
	710	void minx_CF_5B();
	711	void minx_CF_5C();
	712	void minx_CF_5D();
	713	void minx_CF_5E();
	714	void minx_CF_5F();
	715	void minx_CF_60();
	716	void minx_CF_61();
	717	void minx_CF_62();
	718	void minx_CF_63();
	719	void minx_CF_64();
	720	void minx_CF_65();
	721	void minx_CF_66();
	722	void minx_CF_67();
	723	void minx_CF_68();
	724	void minx_CF_69();
	725	void minx_CF_6A();
	726	void minx_CF_6B();
	727	void minx_CF_6C();
	728	void minx_CF_6D();
	729	void minx_CF_6E();
	730	void minx_CF_6F();
	731	void minx_CF_70();
	732	void minx_CF_71();
	733	void minx_CF_72();
	734	void minx_CF_73();
	735	void minx_CF_74();
	736	void minx_CF_75();
	737	void minx_CF_76();
	738	void minx_CF_77();
	739	void minx_CF_78();
	740	void minx_CF_79();
	741	void minx_CF_7A();
	742	void minx_CF_7B();
	743	void minx_CF_7C();
	744	void minx_CF_7D();
	745	void minx_CF_7E();
	746	void minx_CF_7F();
	747	void minx_CF_80();
	748	void minx_CF_81();
	749	void minx_CF_82();
	750	void minx_CF_83();
	751	void minx_CF_84();
	752	void minx_CF_85();
	753	void minx_CF_86();
	754	void minx_CF_87();
	755	void minx_CF_88();
	756	void minx_CF_89();
	757	void minx_CF_8A();
	758	void minx_CF_8B();
	759	void minx_CF_8C();
	760	void minx_CF_8D();
	761	void minx_CF_8E();
	762	void minx_CF_8F();
	763	void minx_CF_90();
	764	void minx_CF_91();
	765	void minx_CF_92();
	766	void minx_CF_93();
	767	void minx_CF_94();
	768	void minx_CF_95();
	769	void minx_CF_96();
	770	void minx_CF_97();
	771	void minx_CF_98();
	772	void minx_CF_99();
	773	void minx_CF_9A();
	774	void minx_CF_9B();
	775	void minx_CF_9C();
	776	void minx_CF_9D();
	777	void minx_CF_9E();
	778	void minx_CF_9F();
	779	void minx_CF_A0();
	780	void minx_CF_A1();
	781	void minx_CF_A2();
	782	void minx_CF_A3();
	783	void minx_CF_A4();
	784	void minx_CF_A5();
	785	void minx_CF_A6();
	786	void minx_CF_A7();
	787	void minx_CF_A8();
	788	void minx_CF_A9();
	789	void minx_CF_AA();
	790	void minx_CF_AB();
	791	void minx_CF_AC();
	792	void minx_CF_AD();
	793	void minx_CF_AE();
	794	void minx_CF_AF();
	795	void minx_CF_B0();
	796	void minx_CF_B1();
	797	void minx_CF_B2();
	798	void minx_CF_B3();
	799	void minx_CF_B4();
	800	void minx_CF_B5();
	801	void minx_CF_B6();
	802	void minx_CF_B7();
	803	void minx_CF_B8();
	804	void minx_CF_B9();
	805	void minx_CF_BA();
	806	void minx_CF_BB();
	807	void minx_CF_BC();
	808	void minx_CF_BD();
	809	void minx_CF_BE();
	810	void minx_CF_BF();
	811	void minx_CF_C0();
	812	void minx_CF_C1();
	813	void minx_CF_C2();
	814	void minx_CF_C3();
	815	void minx_CF_C4();
	816	void minx_CF_C5();
	817	void minx_CF_C6();
	818	void minx_CF_C7();
	819	void minx_CF_C8();
	820	void minx_CF_C9();
	821	void minx_CF_CA();
	822	void minx_CF_CB();
	823	void minx_CF_CC();
	824	void minx_CF_CD();
	825	void minx_CF_CE();
	826	void minx_CF_CF();
	827	void minx_CF_D0();
	828	void minx_CF_D1();
	829	void minx_CF_D2();
	830	void minx_CF_D3();
	831	void minx_CF_D4();
	832	void minx_CF_D5();
	833	void minx_CF_D6();
	834	void minx_CF_D7();
	835	void minx_CF_D8();
	836	void minx_CF_D9();
	837	void minx_CF_DA();
	838	void minx_CF_DB();
	839	void minx_CF_DC();
	840	void minx_CF_DD();
	841	void minx_CF_DE();
	842	void minx_CF_DF();
	843	void minx_CF_E0();
	844	void minx_CF_E1();
	845	void minx_CF_E2();
	846	void minx_CF_E3();
	847	void minx_CF_E4();
	848	void minx_CF_E5();
	849	void minx_CF_E6();
	850	void minx_CF_E7();
	851	void minx_CF_E8();
	852	void minx_CF_E9();
	853	void minx_CF_EA();
	854	void minx_CF_EB();
	855	void minx_CF_EC();
	856	void minx_CF_ED();
	857	void minx_CF_EE();
	858	void minx_CF_EF();
	859	void minx_CF_F0();
	860	void minx_CF_F1();
	861	void minx_CF_F2();
	862	void minx_CF_F3();
	863	void minx_CF_F4();
	864	void minx_CF_F5();
	865	void minx_CF_F6();
	866	void minx_CF_F7();
	867	void minx_CF_F8();
	868	void minx_CF_F9();
	869	void minx_CF_FA();
	870	void minx_CF_FB();
	871	void minx_CF_FC();
	872	void minx_CF_FD();
	873	void minx_CF_FE();
	874	void minx_CF_FF();
	875
	876	typedef void (minx_cpu_device::*op_func)();
	877	static const op_func insnminx[256];
	878	static const int insnminx_cycles[256];
	879
	880	static const op_func insnminx_CE[256];
	881	static const int insnminx_cycles_CE[256];
	882
	883	static const op_func insnminx_CF[256];
	884	static const int insnminx_cycles_CF[256];
	885
	886	};
	887
	888
	889	extern const device_type MINX;
	890
	891
18	892	#endif /* __MINX_H__ */

trunk/src/emu/cpu/minx/minxops.h

r24599	r24600
1	1	#undef OP
2		#define OP(nn) INLINE void minx_##nn(minx_state *minx)
	2	#define OP(nn) void minx_cpu_device::minx_##nn()
3	3
4		OP(00) { minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), ( minx->BA & 0xFF ) ); }
5		OP(01) { minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ); }
6		OP(02) { minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), rdop(minx) ); }
7		OP(03) { AD2_IHL; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
8		OP(04) { AD2_IN8; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
9		OP(05) { AD2_I16; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
10		OP(06) { AD2_XIX; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
11		OP(07) { AD2_YIY; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
12		OP(08) { minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), ( minx->BA & 0xFF ) ); }
13		OP(09) { minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ); }
14		OP(0A) { minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), rdop(minx) ); }
15		OP(0B) { AD2_IHL; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
16		OP(0C) { AD2_IN8; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
17		OP(0D) { AD2_I16; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
18		OP(0E) { AD2_XIX; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
19		OP(0F) { AD2_YIY; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
	4	OP(00) { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	5	OP(01) { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	6	OP(02) { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), rdop() ); }
	7	OP(03) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	8	OP(04) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	9	OP(05) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	10	OP(06) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	11	OP(07) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	12	OP(08) { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	13	OP(09) { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	14	OP(0A) { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), rdop() ); }
	15	OP(0B) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	16	OP(0C) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	17	OP(0D) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	18	OP(0E) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	19	OP(0F) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
20	20
21		OP(10) { minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), ( minx->BA & 0xFF ) ); }
22		OP(11) { minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ); }
23		OP(12) { minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), rdop(minx) ); }
24		OP(13) { AD2_IHL; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
25		OP(14) { AD2_IN8; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
26		OP(15) { AD2_I16; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
27		OP(16) { AD2_XIX; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
28		OP(17) { AD2_YIY; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
29		OP(18) { minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), ( minx->BA & 0xFF ) ); }
30		OP(19) { minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ); }
31		OP(1A) { minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), rdop(minx) ); }
32		OP(1B) { AD2_IHL; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
33		OP(1C) { AD2_IN8; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
34		OP(1D) { AD2_I16; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
35		OP(1E) { AD2_XIX; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
36		OP(1F) { AD2_YIY; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
	21	OP(10) { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	22	OP(11) { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	23	OP(12) { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), rdop() ); }
	24	OP(13) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	25	OP(14) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	26	OP(15) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	27	OP(16) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	28	OP(17) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	29	OP(18) { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	30	OP(19) { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	31	OP(1A) { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), rdop() ); }
	32	OP(1B) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	33	OP(1C) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	34	OP(1D) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	35	OP(1E) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	36	OP(1F) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
37	37
38		OP(20) { minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), ( minx->BA & 0xFF ) ); }
39		OP(21) { minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ); }
40		OP(22) { minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), rdop(minx) ); }
41		OP(23) { AD2_IHL; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
42		OP(24) { AD2_IN8; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
43		OP(25) { AD2_I16; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
44		OP(26) { AD2_XIX; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
45		OP(27) { AD2_YIY; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
46		OP(28) { minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), ( minx->BA & 0xFF ) ); }
47		OP(29) { minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ); }
48		OP(2A) { minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), rdop(minx) ); }
49		OP(2B) { AD2_IHL; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
50		OP(2C) { AD2_IN8; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
51		OP(2D) { AD2_I16; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
52		OP(2E) { AD2_XIX; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
53		OP(2F) { AD2_YIY; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
	38	OP(20) { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	39	OP(21) { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	40	OP(22) { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), rdop() ); }
	41	OP(23) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	42	OP(24) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	43	OP(25) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	44	OP(26) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	45	OP(27) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	46	OP(28) { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	47	OP(29) { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	48	OP(2A) { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), rdop() ); }
	49	OP(2B) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	50	OP(2C) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	51	OP(2D) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	52	OP(2E) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	53	OP(2F) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
54	54
55		OP(30) { SUB8( minx, ( minx->BA & 0x00FF ), ( minx->BA & 0xFF ) ); }
56		OP(31) { SUB8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ); }
57		OP(32) { SUB8( minx, ( minx->BA & 0x00FF ), rdop(minx) ); }
58		OP(33) { AD2_IHL; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
59		OP(34) { AD2_IN8; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
60		OP(35) { AD2_I16; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
61		OP(36) { AD2_XIX; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
62		OP(37) { AD2_YIY; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
63		OP(38) { minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), ( minx->BA & 0xFF ) ); }
64		OP(39) { minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ); }
65		OP(3A) { minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), rdop(minx) ); }
66		OP(3B) { AD2_IHL; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
67		OP(3C) { AD2_IN8; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
68		OP(3D) { AD2_I16; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
69		OP(3E) { AD2_XIX; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
70		OP(3F) { AD2_YIY; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
	55	OP(30) { SUB8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	56	OP(31) { SUB8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	57	OP(32) { SUB8( ( m_BA & 0x00FF ), rdop() ); }
	58	OP(33) { AD2_IHL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	59	OP(34) { AD2_IN8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	60	OP(35) { AD2_I16; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	61	OP(36) { AD2_XIX; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	62	OP(37) { AD2_YIY; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	63	OP(38) { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	64	OP(39) { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	65	OP(3A) { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), rdop() ); }
	66	OP(3B) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	67	OP(3C) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	68	OP(3D) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	69	OP(3E) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	70	OP(3F) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
71	71
72		OP(40) { minx->BA = ( minx->BA & 0xFF00 ) | ( minx->BA & 0x00FF); }
73		OP(41) { minx->BA = ( minx->BA & 0xFF00 ) | ( minx->BA >> 8 ); }
74		OP(42) { minx->BA = ( minx->BA & 0xFF00 ) | ( minx->HL & 0x00FF); }
75		OP(43) { minx->BA = ( minx->BA & 0xFF00 ) | ( minx->HL >> 8 ); }
76		OP(44) { AD2_IN8; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
77		OP(45) { AD2_IHL; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
78		OP(46) { AD2_XIX; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
79		OP(47) { AD2_YIY; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
80		OP(48) { minx->BA = ( minx->BA & 0x00FF ) | ( ( minx->BA & 0x00FF) << 8 ); }
81		OP(49) { minx->BA = ( minx->BA & 0x00FF ) | ( ( minx->BA >> 8 ) << 8 ); }
82		OP(4A) { minx->BA = ( minx->BA & 0x00FF ) | ( ( minx->HL & 0x00FF) << 8 ); }
83		OP(4B) { minx->BA = ( minx->BA & 0x00FF ) | ( ( minx->HL >> 8 ) << 8 ); }
84		OP(4C) { AD2_IN8; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
85		OP(4D) { AD2_IHL; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
86		OP(4E) { AD2_XIX; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
87		OP(4F) { AD2_YIY; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	72	OP(40) { m_BA = ( m_BA & 0xFF00 ) | ( m_BA & 0x00FF); }
	73	OP(41) { m_BA = ( m_BA & 0xFF00 ) | ( m_BA >> 8 ); }
	74	OP(42) { m_BA = ( m_BA & 0xFF00 ) | ( m_HL & 0x00FF); }
	75	OP(43) { m_BA = ( m_BA & 0xFF00 ) | ( m_HL >> 8 ); }
	76	OP(44) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	77	OP(45) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	78	OP(46) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	79	OP(47) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	80	OP(48) { m_BA = ( m_BA & 0x00FF ) | ( ( m_BA & 0x00FF) << 8 ); }
	81	OP(49) { m_BA = ( m_BA & 0x00FF ) | ( ( m_BA >> 8 ) << 8 ); }
	82	OP(4A) { m_BA = ( m_BA & 0x00FF ) | ( ( m_HL & 0x00FF) << 8 ); }
	83	OP(4B) { m_BA = ( m_BA & 0x00FF ) | ( ( m_HL >> 8 ) << 8 ); }
	84	OP(4C) { AD2_IN8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	85	OP(4D) { AD2_IHL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	86	OP(4E) { AD2_XIX; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	87	OP(4F) { AD2_YIY; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
88	88
89		OP(50) { minx->HL = ( minx->HL & 0xFF00 ) | ( minx->BA & 0x00FF); }
90		OP(51) { minx->HL = ( minx->HL & 0xFF00 ) | ( minx->BA >> 8 ); }
91		OP(52) { minx->HL = ( minx->HL & 0xFF00 ) | ( minx->HL & 0x00FF); }
92		OP(53) { minx->HL = ( minx->HL & 0xFF00 ) | ( minx->HL >> 8 ); }
93		OP(54) { AD2_IN8; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
94		OP(55) { AD2_IHL; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
95		OP(56) { AD2_XIX; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
96		OP(57) { AD2_YIY; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
97		OP(58) { minx->HL = ( minx->HL & 0x00FF ) | ( ( minx->BA & 0x00FF) << 8 ); }
98		OP(59) { minx->HL = ( minx->HL & 0x00FF ) | ( ( minx->BA >> 8 ) << 8 ); }
99		OP(5A) { minx->HL = ( minx->HL & 0x00FF ) | ( ( minx->HL & 0x00FF) << 8 ); }
100		OP(5B) { minx->HL = ( minx->HL & 0x00FF ) | ( ( minx->HL >> 8 ) << 8 ); }
101		OP(5C) { AD2_IN8; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
102		OP(5D) { AD2_IHL; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
103		OP(5E) { AD2_XIX; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
104		OP(5F) { AD2_YIY; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	89	OP(50) { m_HL = ( m_HL & 0xFF00 ) | ( m_BA & 0x00FF); }
	90	OP(51) { m_HL = ( m_HL & 0xFF00 ) | ( m_BA >> 8 ); }
	91	OP(52) { m_HL = ( m_HL & 0xFF00 ) | ( m_HL & 0x00FF); }
	92	OP(53) { m_HL = ( m_HL & 0xFF00 ) | ( m_HL >> 8 ); }
	93	OP(54) { AD2_IN8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	94	OP(55) { AD2_IHL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	95	OP(56) { AD2_XIX; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	96	OP(57) { AD2_YIY; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	97	OP(58) { m_HL = ( m_HL & 0x00FF ) | ( ( m_BA & 0x00FF) << 8 ); }
	98	OP(59) { m_HL = ( m_HL & 0x00FF ) | ( ( m_BA >> 8 ) << 8 ); }
	99	OP(5A) { m_HL = ( m_HL & 0x00FF ) | ( ( m_HL & 0x00FF) << 8 ); }
	100	OP(5B) { m_HL = ( m_HL & 0x00FF ) | ( ( m_HL >> 8 ) << 8 ); }
	101	OP(5C) { AD2_IN8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	102	OP(5D) { AD2_IHL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	103	OP(5E) { AD2_XIX; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	104	OP(5F) { AD2_YIY; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
105	105
106		OP(60) { AD1_XIX; WR( addr1, ( minx->BA & 0x00FF ) ); }
107		OP(61) { AD1_XIX; WR( addr1, ( minx->BA >> 8 ) ); }
108		OP(62) { AD1_XIX; WR( addr1, ( minx->HL & 0x00FF ) ); }
109		OP(63) { AD1_XIX; WR( addr1, ( minx->HL >> 8 ) ); }
	106	OP(60) { AD1_XIX; WR( addr1, ( m_BA & 0x00FF ) ); }
	107	OP(61) { AD1_XIX; WR( addr1, ( m_BA >> 8 ) ); }
	108	OP(62) { AD1_XIX; WR( addr1, ( m_HL & 0x00FF ) ); }
	109	OP(63) { AD1_XIX; WR( addr1, ( m_HL >> 8 ) ); }
110	110	OP(64) { AD1_XIX; AD2_IN8; WR( addr1, RD( addr2 ) ); }
111	111	OP(65) { AD1_XIX; AD2_IHL; WR( addr1, RD( addr2 ) ); }
112	112	OP(66) { AD1_XIX; AD2_XIX; WR( addr1, RD( addr2 ) ); }
113	113	OP(67) { AD1_XIX; AD2_YIY; WR( addr1, RD( addr2 ) ); }
114		OP(68) { AD1_IHL; WR( addr1, ( minx->BA & 0x00FF ) ); }
115		OP(69) { AD1_IHL; WR( addr1, ( minx->BA >> 8 ) ); }
116		OP(6A) { AD1_IHL; WR( addr1, ( minx->HL & 0x00FF ) ); }
117		OP(6B) { AD1_IHL; WR( addr1, ( minx->HL >> 8 ) ); }
	114	OP(68) { AD1_IHL; WR( addr1, ( m_BA & 0x00FF ) ); }
	115	OP(69) { AD1_IHL; WR( addr1, ( m_BA >> 8 ) ); }
	116	OP(6A) { AD1_IHL; WR( addr1, ( m_HL & 0x00FF ) ); }
	117	OP(6B) { AD1_IHL; WR( addr1, ( m_HL >> 8 ) ); }
118	118	OP(6C) { AD1_IHL; AD2_IN8; WR( addr1, RD( addr2 ) ); }
119	119	OP(6D) { AD1_IHL; AD2_IHL; WR( addr1, RD( addr2 ) ); }
120	120	OP(6E) { AD1_IHL; AD2_XIX; WR( addr1, RD( addr2 ) ); }
121	121	OP(6F) { AD1_IHL; AD2_YIY; WR( addr1, RD( addr2 ) ); }
122	122
123		OP(70) { AD1_YIY; WR( addr1, ( minx->BA & 0x00FF ) ); }
124		OP(71) { AD1_YIY; WR( addr1, ( minx->BA >> 8 ) ); }
125		OP(72) { AD1_YIY; WR( addr1, ( minx->HL & 0x00FF ) ); }
126		OP(73) { AD1_YIY; WR( addr1, ( minx->HL >> 8 ) ); }
	123	OP(70) { AD1_YIY; WR( addr1, ( m_BA & 0x00FF ) ); }
	124	OP(71) { AD1_YIY; WR( addr1, ( m_BA >> 8 ) ); }
	125	OP(72) { AD1_YIY; WR( addr1, ( m_HL & 0x00FF ) ); }
	126	OP(73) { AD1_YIY; WR( addr1, ( m_HL >> 8 ) ); }
127	127	OP(74) { AD1_YIY; AD2_IN8; WR( addr1, RD( addr2 ) ); }
128	128	OP(75) { AD1_YIY; AD2_IHL; WR( addr1, RD( addr2 ) ); }
129	129	OP(76) { AD1_YIY; AD2_XIX; WR( addr1, RD( addr2 ) ); }
130	130	OP(77) { AD1_YIY; AD2_YIY; WR( addr1, RD( addr2 ) ); }
131		OP(78) { AD1_IN8; WR( addr1, ( minx->BA & 0x00FF ) ); }
132		OP(79) { AD1_IN8; WR( addr1, ( minx->BA >> 8 ) ); }
133		OP(7A) { AD1_IN8; WR( addr1, ( minx->HL & 0x00FF ) ); }
134		OP(7B) { AD1_IN8; WR( addr1, ( minx->HL >> 8 ) ); }
	131	OP(78) { AD1_IN8; WR( addr1, ( m_BA & 0x00FF ) ); }
	132	OP(79) { AD1_IN8; WR( addr1, ( m_BA >> 8 ) ); }
	133	OP(7A) { AD1_IN8; WR( addr1, ( m_HL & 0x00FF ) ); }
	134	OP(7B) { AD1_IN8; WR( addr1, ( m_HL >> 8 ) ); }
135	135	OP(7C) { /* illegal operation? */ }
136	136	OP(7D) { AD1_IN8; AD2_IHL; WR( addr1, RD( addr2 ) ); }
137	137	OP(7E) { AD1_IN8; AD2_XIX; WR( addr1, RD( addr2 ) ); }
138	138	OP(7F) { AD1_IN8; AD2_YIY; WR( addr1, RD( addr2 ) ); }
139	139
140		OP(80) { minx->BA = ( minx->BA & 0xFF00 ) | INC8( minx, minx->BA & 0x00FF ); }
141		OP(81) { minx->BA = ( minx->BA & 0x00FF ) | ( INC8( minx, minx->BA >> 8 ) << 8 ); }
142		OP(82) { minx->HL = ( minx->HL & 0xFF00 ) | INC8( minx, minx->HL & 0x00FF ); }
143		OP(83) { minx->HL = ( minx->HL & 0x00FF ) | ( INC8( minx, minx->HL >> 8 ) << 8 ); }
144		OP(84) { minx->N = INC8( minx, minx->N ); }
145		OP(85) { AD1_IN8; WR( addr1, INC8( minx, RD( addr1 ) ) ); }
146		OP(86) { AD1_IHL; WR( addr1, INC8( minx, RD( addr1 ) ) ); }
147		OP(87) { minx->SP = INC16( minx, minx->SP ); }
148		OP(88) { minx->BA = ( minx->BA & 0xFF00 ) | DEC8( minx, minx->BA & 0x00FF ); }
149		OP(89) { minx->BA = ( minx->BA & 0x00FF ) | ( DEC8( minx, minx->BA >> 8 ) << 8 ); }
150		OP(8A) { minx->HL = ( minx->HL & 0xFF00 ) | DEC8( minx, minx->HL & 0x00FF ); }
151		OP(8B) { minx->HL = ( minx->HL & 0x00FF ) | ( DEC8( minx, minx->HL >> 8 ) << 8 ); }
152		OP(8C) { minx->N = DEC8( minx, minx->N ); }
153		OP(8D) { AD1_IN8; WR( addr1, DEC8( minx, RD( addr1 ) ) ); }
154		OP(8E) { AD1_IHL; WR( addr1, DEC8( minx, RD( addr1 ) ) ); }
155		OP(8F) { minx->SP = DEC8( minx, minx->SP ); }
	140	OP(80) { m_BA = ( m_BA & 0xFF00 ) | INC8( m_BA & 0x00FF ); }
	141	OP(81) { m_BA = ( m_BA & 0x00FF ) | ( INC8( m_BA >> 8 ) << 8 ); }
	142	OP(82) { m_HL = ( m_HL & 0xFF00 ) | INC8( m_HL & 0x00FF ); }
	143	OP(83) { m_HL = ( m_HL & 0x00FF ) | ( INC8( m_HL >> 8 ) << 8 ); }
	144	OP(84) { m_N = INC8( m_N ); }
	145	OP(85) { AD1_IN8; WR( addr1, INC8( RD( addr1 ) ) ); }
	146	OP(86) { AD1_IHL; WR( addr1, INC8( RD( addr1 ) ) ); }
	147	OP(87) { m_SP = INC16( m_SP ); }
	148	OP(88) { m_BA = ( m_BA & 0xFF00 ) | DEC8( m_BA & 0x00FF ); }
	149	OP(89) { m_BA = ( m_BA & 0x00FF ) | ( DEC8( m_BA >> 8 ) << 8 ); }
	150	OP(8A) { m_HL = ( m_HL & 0xFF00 ) | DEC8( m_HL & 0x00FF ); }
	151	OP(8B) { m_HL = ( m_HL & 0x00FF ) | ( DEC8( m_HL >> 8 ) << 8 ); }
	152	OP(8C) { m_N = DEC8( m_N ); }
	153	OP(8D) { AD1_IN8; WR( addr1, DEC8( RD( addr1 ) ) ); }
	154	OP(8E) { AD1_IHL; WR( addr1, DEC8( RD( addr1 ) ) ); }
	155	OP(8F) { m_SP = DEC8( m_SP ); }
156	156
157		OP(90) { minx->BA = INC16( minx, minx->BA ); }
158		OP(91) { minx->HL = INC16( minx, minx->HL ); }
159		OP(92) { minx->X = INC16( minx, minx->X ); }
160		OP(93) { minx->Y = INC16( minx, minx->Y ); }
161		OP(94) { minx->F = ( AND8( minx, ( minx->BA & 0x00FF ), ( minx->BA >> 8 ) ) ) ? minx->F & ~FLAG_Z : minx->F | FLAG_Z;}
162		OP(95) { AD1_IHL; minx->F = ( AND8( minx, RD( addr1 ), rdop(minx) ) ) ? minx->F & ~FLAG_Z : minx->F | FLAG_Z; }
163		OP(96) { minx->F = ( AND8( minx, ( minx->BA & 0x00FF ), rdop(minx) ) ) ? minx->F & ~FLAG_Z : minx->F | FLAG_Z; }
164		OP(97) { minx->F = ( AND8( minx, ( minx->BA >> 8 ), rdop(minx) ) ) ? minx->F & ~FLAG_Z : minx->F | FLAG_Z; }
165		OP(98) { minx->BA = DEC16( minx, minx->BA ); }
166		OP(99) { minx->HL = DEC16( minx, minx->HL ); }
167		OP(9A) { minx->X = DEC16( minx, minx->X ); }
168		OP(9B) { minx->Y = DEC16( minx, minx->Y ); }
169		OP(9C) { minx->F = minx->F & rdop(minx); }
170		OP(9D) { minx->F = minx->F | rdop(minx); }
171		OP(9E) { minx->F = minx->F ^ rdop(minx); }
172		OP(9F) { minx->F = rdop(minx); }
	157	OP(90) { m_BA = INC16( m_BA ); }
	158	OP(91) { m_HL = INC16( m_HL ); }
	159	OP(92) { m_X = INC16( m_X ); }
	160	OP(93) { m_Y = INC16( m_Y ); }
	161	OP(94) { m_F = ( AND8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z;}
	162	OP(95) { AD1_IHL; m_F = ( AND8( RD( addr1 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
	163	OP(96) { m_F = ( AND8( ( m_BA & 0x00FF ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
	164	OP(97) { m_F = ( AND8( ( m_BA >> 8 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
	165	OP(98) { m_BA = DEC16( m_BA ); }
	166	OP(99) { m_HL = DEC16( m_HL ); }
	167	OP(9A) { m_X = DEC16( m_X ); }
	168	OP(9B) { m_Y = DEC16( m_Y ); }
	169	OP(9C) { m_F = m_F & rdop(); }
	170	OP(9D) { m_F = m_F | rdop(); }
	171	OP(9E) { m_F = m_F ^ rdop(); }
	172	OP(9F) { m_F = rdop(); }
173	173
174		OP(A0) { PUSH16( minx, minx->BA ); }
175		OP(A1) { PUSH16( minx, minx->HL ); }
176		OP(A2) { PUSH16( minx, minx->X ); }
177		OP(A3) { PUSH16( minx, minx->Y ); }
178		OP(A4) { PUSH8( minx, minx->N ); }
179		OP(A5) { PUSH8( minx, minx->I ); }
180		OP(A6) { PUSH8( minx, minx->XI ); PUSH8( minx, minx->YI ); }
181		OP(A7) { PUSH8( minx, minx->F ); }
182		OP(A8) { minx->BA = POP16(minx); }
183		OP(A9) { minx->HL = POP16(minx);}
184		OP(AA) { minx->X = POP16(minx); }
185		OP(AB) { minx->Y = POP16(minx); }
186		OP(AC) { minx->N = POP8(minx); }
187		OP(AD) { minx->I = POP8(minx); }
188		OP(AE) { minx->YI = POP8(minx); minx->XI = POP8(minx); }
189		OP(AF) { minx->F = POP8(minx); }
	174	OP(A0) { PUSH16( m_BA ); }
	175	OP(A1) { PUSH16( m_HL ); }
	176	OP(A2) { PUSH16( m_X ); }
	177	OP(A3) { PUSH16( m_Y ); }
	178	OP(A4) { PUSH8( m_N ); }
	179	OP(A5) { PUSH8( m_I ); }
	180	OP(A6) { PUSH8( m_XI ); PUSH8( m_YI ); }
	181	OP(A7) { PUSH8( m_F ); }
	182	OP(A8) { m_BA = POP16(); }
	183	OP(A9) { m_HL = POP16();}
	184	OP(AA) { m_X = POP16(); }
	185	OP(AB) { m_Y = POP16(); }
	186	OP(AC) { m_N = POP8(); }
	187	OP(AD) { m_I = POP8(); }
	188	OP(AE) { m_YI = POP8(); m_XI = POP8(); }
	189	OP(AF) { m_F = POP8(); }
190	190
191		OP(B0) { UINT8 op = rdop(minx); minx->BA = ( minx->BA & 0xFF00 ) | op; }
192		OP(B1) { UINT8 op = rdop(minx); minx->BA = ( minx->BA & 0x00FF ) | ( op << 8 ); }
193		OP(B2) { UINT8 op = rdop(minx); minx->HL = ( minx->HL & 0xFF00 ) | op; }
194		OP(B3) { UINT8 op = rdop(minx); minx->HL = ( minx->HL & 0x00FF ) | ( op << 8 ); }
195		OP(B4) { UINT8 op = rdop(minx); minx->N = op; }
196		OP(B5) { AD1_IHL; UINT8 op = rdop(minx); WR( addr1, op); }
197		OP(B6) { AD1_XIX; UINT8 op = rdop(minx); WR( addr1, op ); }
198		OP(B7) { AD1_YIY; UINT8 op = rdop(minx); WR( addr1, op ); }
199		OP(B8) { AD2_I16; minx->BA = rd16( minx, addr2 ); }
200		OP(B9) { AD2_I16; minx->HL = rd16( minx, addr2 ); }
201		OP(BA) { AD2_I16; minx->X = rd16( minx, addr2 ); }
202		OP(BB) { AD2_I16; minx->Y = rd16( minx, addr2 ); }
203		OP(BC) { AD1_I16; wr16( minx, addr1, minx->BA ); }
204		OP(BD) { AD1_I16; wr16( minx, addr1, minx->HL ); }
205		OP(BE) { AD1_I16; wr16( minx, addr1, minx->X ); }
206		OP(BF) { AD1_I16; wr16( minx, addr1, minx->Y ); }
	191	OP(B0) { UINT8 op = rdop(); m_BA = ( m_BA & 0xFF00 ) | op; }
	192	OP(B1) { UINT8 op = rdop(); m_BA = ( m_BA & 0x00FF ) | ( op << 8 ); }
	193	OP(B2) { UINT8 op = rdop(); m_HL = ( m_HL & 0xFF00 ) | op; }
	194	OP(B3) { UINT8 op = rdop(); m_HL = ( m_HL & 0x00FF ) | ( op << 8 ); }
	195	OP(B4) { UINT8 op = rdop(); m_N = op; }
	196	OP(B5) { AD1_IHL; UINT8 op = rdop(); WR( addr1, op); }
	197	OP(B6) { AD1_XIX; UINT8 op = rdop(); WR( addr1, op ); }
	198	OP(B7) { AD1_YIY; UINT8 op = rdop(); WR( addr1, op ); }
	199	OP(B8) { AD2_I16; m_BA = rd16( addr2 ); }
	200	OP(B9) { AD2_I16; m_HL = rd16( addr2 ); }
	201	OP(BA) { AD2_I16; m_X = rd16( addr2 ); }
	202	OP(BB) { AD2_I16; m_Y = rd16( addr2 ); }
	203	OP(BC) { AD1_I16; wr16( addr1, m_BA ); }
	204	OP(BD) { AD1_I16; wr16( addr1, m_HL ); }
	205	OP(BE) { AD1_I16; wr16( addr1, m_X ); }
	206	OP(BF) { AD1_I16; wr16( addr1, m_Y ); }
207	207
208		OP(C0) { minx->BA = ADD16( minx, minx->BA, rdop16(minx) ); }
209		OP(C1) { minx->HL = ADD16( minx, minx->HL, rdop16(minx) ); }
210		OP(C2) { minx->X = ADD16( minx, minx->X, rdop16(minx) ); }
211		OP(C3) { minx->Y = ADD16( minx, minx->Y, rdop16(minx) ); }
212		OP(C4) { minx->BA = rdop16(minx); }
213		OP(C5) { minx->HL = rdop16(minx); }
214		OP(C6) { minx->X = rdop16(minx); }
215		OP(C7) { minx->Y = rdop16(minx); }
216		OP(C8) { UINT16 t = minx->BA; minx->BA = minx->HL; minx->HL = t; }
217		OP(C9) { UINT16 t = minx->BA; minx->BA = minx->X; minx->X = t; }
218		OP(CA) { UINT16 t = minx->BA; minx->BA = minx->Y; minx->Y = t; }
219		OP(CB) { UINT16 t = minx->BA; minx->BA = minx->SP; minx->SP = t; }
220		OP(CC) { minx->BA = ( minx->BA >> 8 ) | ( ( minx->BA & 0x00FF ) << 8 ); }
221		OP(CD) { UINT8 t; AD2_IHL; t = RD( addr2 ); WR( addr2, ( minx->BA & 0x00FF ) ); minx->BA = ( minx->BA & 0xFF00 ) | t; }
222		OP(CE) { UINT8 op = rdop(minx); insnminx_CE[op](minx); minx->icount -= insnminx_cycles_CE[op]; }
223		OP(CF) { UINT8 op = rdop(minx); insnminx_CF[op](minx); minx->icount -= insnminx_cycles_CF[op]; }
	208	OP(C0) { m_BA = ADD16( m_BA, rdop16() ); }
	209	OP(C1) { m_HL = ADD16( m_HL, rdop16() ); }
	210	OP(C2) { m_X = ADD16( m_X, rdop16() ); }
	211	OP(C3) { m_Y = ADD16( m_Y, rdop16() ); }
	212	OP(C4) { m_BA = rdop16(); }
	213	OP(C5) { m_HL = rdop16(); }
	214	OP(C6) { m_X = rdop16(); }
	215	OP(C7) { m_Y = rdop16(); }
	216	OP(C8) { UINT16 t = m_BA; m_BA = m_HL; m_HL = t; }
	217	OP(C9) { UINT16 t = m_BA; m_BA = m_X; m_X = t; }
	218	OP(CA) { UINT16 t = m_BA; m_BA = m_Y; m_Y = t; }
	219	OP(CB) { UINT16 t = m_BA; m_BA = m_SP; m_SP = t; }
	220	OP(CC) { m_BA = ( m_BA >> 8 ) | ( ( m_BA & 0x00FF ) << 8 ); }
	221	OP(CD) { UINT8 t; AD2_IHL; t = RD( addr2 ); WR( addr2, ( m_BA & 0x00FF ) ); m_BA = ( m_BA & 0xFF00 ) | t; }
	222	OP(CE) { UINT8 op = rdop(); (this->*insnminx_CE[op])(); m_icount -= insnminx_cycles_CE[op]; }
	223	OP(CF) { UINT8 op = rdop(); (this->*insnminx_CF[op])(); m_icount -= insnminx_cycles_CF[op]; }
224	224
225		OP(D0) { minx->BA = SUB16( minx, minx->BA, rdop16(minx) ); }
226		OP(D1) { minx->HL = SUB16( minx, minx->HL, rdop16(minx) ); }
227		OP(D2) { minx->X = SUB16( minx, minx->X, rdop16(minx) ); }
228		OP(D3) { minx->Y = SUB16( minx, minx->Y, rdop16(minx) ); }
229		OP(D4) { SUB16( minx, minx->BA, rdop16(minx) ); }
230		OP(D5) { SUB16( minx, minx->HL, rdop16(minx) ); }
231		OP(D6) { SUB16( minx, minx->X, rdop16(minx) ); }
232		OP(D7) { SUB16( minx, minx->Y, rdop16(minx) ); }
233		OP(D8) { AD1_IN8; WR( addr1, AND8( minx, RD( addr1 ), rdop(minx) ) ); }
234		OP(D9) { AD1_IN8; WR( addr1, OR8( minx, RD( addr1 ), rdop(minx) ) ); }
235		OP(DA) { AD1_IN8; WR( addr1, XOR8( minx, RD( addr1 ), rdop(minx) ) ); }
236		OP(DB) { AD1_IN8; SUB8( minx, RD( addr1 ), rdop(minx) ); }
237		OP(DC) { AD1_IN8; minx->F = ( AND8( minx, RD( addr1 ), rdop(minx) ) ) ? minx->F & ~FLAG_Z : minx->F | FLAG_Z; }
238		OP(DD) { AD1_IN8; WR( addr1, rdop(minx) ); }
239		OP(DE) { minx->BA = ( minx->BA & 0xFF00 ) | ( ( minx->BA & 0x000F ) | ( ( minx->BA & 0x0F00 ) >> 4 ) ); }
240		OP(DF) { minx->BA = ( ( minx->BA & 0x0080 ) ? 0xFF00 : 0x0000 ) | ( minx->BA & 0x000F ); }
	225	OP(D0) { m_BA = SUB16( m_BA, rdop16() ); }
	226	OP(D1) { m_HL = SUB16( m_HL, rdop16() ); }
	227	OP(D2) { m_X = SUB16( m_X, rdop16() ); }
	228	OP(D3) { m_Y = SUB16( m_Y, rdop16() ); }
	229	OP(D4) { SUB16( m_BA, rdop16() ); }
	230	OP(D5) { SUB16( m_HL, rdop16() ); }
	231	OP(D6) { SUB16( m_X, rdop16() ); }
	232	OP(D7) { SUB16( m_Y, rdop16() ); }
	233	OP(D8) { AD1_IN8; WR( addr1, AND8( RD( addr1 ), rdop() ) ); }
	234	OP(D9) { AD1_IN8; WR( addr1, OR8( RD( addr1 ), rdop() ) ); }
	235	OP(DA) { AD1_IN8; WR( addr1, XOR8( RD( addr1 ), rdop() ) ); }
	236	OP(DB) { AD1_IN8; SUB8( RD( addr1 ), rdop() ); }
	237	OP(DC) { AD1_IN8; m_F = ( AND8( RD( addr1 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
	238	OP(DD) { AD1_IN8; WR( addr1, rdop() ); }
	239	OP(DE) { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x000F ) | ( ( m_BA & 0x0F00 ) >> 4 ) ); }
	240	OP(DF) { m_BA = ( ( m_BA & 0x0080 ) ? 0xFF00 : 0x0000 ) | ( m_BA & 0x000F ); }
241	241
242		OP(E0) { INT8 d8 = rdop(minx); if ( minx->F & FLAG_C ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
243		OP(E1) { INT8 d8 = rdop(minx); if ( ! ( minx->F & FLAG_C ) ) { CALL( minx, minx->PC + d8- 1  ); minx->icount -= 12; } }
244		OP(E2) { INT8 d8 = rdop(minx); if ( minx->F & FLAG_Z ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
245		OP(E3) { INT8 d8 = rdop(minx); if ( ! ( minx->F & FLAG_Z ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
246		OP(E4) { INT8 d8 = rdop(minx); if ( minx->F & FLAG_C ) { JMP( minx, minx->PC + d8 - 1 ); } }
247		OP(E5) { INT8 d8 = rdop(minx); if ( ! ( minx->F & FLAG_C ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
248		OP(E6) { INT8 d8 = rdop(minx); if ( minx->F & FLAG_Z ) { JMP( minx, minx->PC + d8 - 1 ); } }
249		OP(E7) { INT8 d8 = rdop(minx); if ( ! ( minx->F & FLAG_Z ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
250		OP(E8) { UINT16 d16 = rdop16(minx); if ( minx->F & FLAG_C ) { CALL( minx, minx->PC + d16 - 1 ); minx->icount -= 12; } }
251		OP(E9) { UINT16 d16 = rdop16(minx); if ( ! ( minx->F & FLAG_C ) ) { CALL( minx, minx->PC + d16 - 1 ); minx->icount -= 12; } }
252		OP(EA) { UINT16 d16 = rdop16(minx); if ( minx->F & FLAG_Z ) { CALL( minx, minx->PC + d16 - 1 ); minx->icount -= 12; } }
253		OP(EB) { UINT16 d16 = rdop16(minx); if ( ! ( minx->F & FLAG_Z ) ) { CALL( minx, minx->PC + d16 - 1 ); minx->icount -= 12; } }
254		OP(EC) { UINT16 d16 = rdop16(minx); if ( minx->F & FLAG_C ) { JMP( minx, minx->PC + d16 - 1 ); } }
255		OP(ED) { UINT16 d16 = rdop16(minx); if ( ! ( minx->F & FLAG_C ) ) { JMP( minx, minx->PC + d16 - 1 ); } }
256		OP(EE) { UINT16 d16 = rdop16(minx); if ( minx->F & FLAG_Z ) { JMP( minx, minx->PC + d16 - 1 ); } }
257		OP(EF) { UINT16 d16 = rdop16(minx); if ( ! ( minx->F & FLAG_Z ) ) { JMP( minx, minx->PC + d16 - 1 ); } }
	242	OP(E0) { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	243	OP(E1) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d8- 1  ); m_icount -= 12; } }
	244	OP(E2) { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	245	OP(E3) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	246	OP(E4) { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { JMP( m_PC + d8 - 1 ); } }
	247	OP(E5) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d8 - 1 ); } }
	248	OP(E6) { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { JMP( m_PC + d8 - 1 ); } }
	249	OP(E7) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d8 - 1 ); } }
	250	OP(E8) { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
	251	OP(E9) { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
	252	OP(EA) { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
	253	OP(EB) { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
	254	OP(EC) { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { JMP( m_PC + d16 - 1 ); } }
	255	OP(ED) { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d16 - 1 ); } }
	256	OP(EE) { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { JMP( m_PC + d16 - 1 ); } }
	257	OP(EF) { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d16 - 1 ); } }
258	258
259		OP(F0) { INT8 d8 = rdop(minx); CALL( minx, minx->PC + d8 - 1 ); }
260		OP(F1) { INT8 d8 = rdop(minx); JMP( minx, minx->PC + d8 - 1 ); }
261		OP(F2) { UINT16 d16 = rdop16(minx); CALL( minx, minx->PC + d16 - 1 ); }
262		OP(F3) { UINT16 d16 = rdop16(minx); JMP( minx, minx->PC + d16 - 1 ); }
263		OP(F4) { JMP( minx, minx->HL ); }
264		OP(F5) { INT8 d8 = rdop(minx); minx->BA = minx->BA - 0x0100; if ( minx->BA & 0xFF00 ) { JMP( minx, minx->PC + d8 - 1 ); } }
265		OP(F6) { minx->BA = ( minx->BA & 0xFF00 ) | ( ( minx->BA & 0x00F0 ) >> 4 ) | ( ( minx->BA & 0x000F ) << 4 ); }
	259	OP(F0) { INT8 d8 = rdop(); CALL( m_PC + d8 - 1 ); }
	260	OP(F1) { INT8 d8 = rdop(); JMP( m_PC + d8 - 1 ); }
	261	OP(F2) { UINT16 d16 = rdop16(); CALL( m_PC + d16 - 1 ); }
	262	OP(F3) { UINT16 d16 = rdop16(); JMP( m_PC + d16 - 1 ); }
	263	OP(F4) { JMP( m_HL ); }
	264	OP(F5) { INT8 d8 = rdop(); m_BA = m_BA - 0x0100; if ( m_BA & 0xFF00 ) { JMP( m_PC + d8 - 1 ); } }
	265	OP(F6) { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x00F0 ) >> 4 ) | ( ( m_BA & 0x000F ) << 4 ); }
266	266	OP(F7) { UINT8 d; AD1_IHL; d = RD( addr1 ); WR( addr1, ( ( d & 0xF0 ) >> 4 ) | ( ( d & 0x0F ) << 4 ) ); }
267		OP(F8) { minx->PC = POP16(minx); minx->V = POP8(minx); minx->U = minx->V; }
268		OP(F9) { minx->F = POP8(minx); minx->PC = POP16(minx); minx->V = POP8(minx); minx->U = minx->V; }
269		OP(FA) { minx->PC = POP16(minx) + 2; minx->V = POP8(minx); minx->U = minx->V; }
270		OP(FB) { AD1_I16; CALL( minx, rd16( minx, addr1 ) ); }
271		OP(FC) { UINT8 i = rdop(minx) & 0xFE; CALL( minx, rd16( minx, i ) ); PUSH8( minx, minx->F ); }
272		OP(FD) { UINT8 i = rdop(minx) & 0xFE; JMP( minx, rd16( minx, i ) ); /* PUSH8( minx, minx->F );?? */ }
	267	OP(F8) { m_PC = POP16(); m_V = POP8(); m_U = m_V; }
	268	OP(F9) { m_F = POP8(); m_PC = POP16(); m_V = POP8(); m_U = m_V; }
	269	OP(FA) { m_PC = POP16() + 2; m_V = POP8(); m_U = m_V; }
	270	OP(FB) { AD1_I16; CALL( rd16( addr1 ) ); }
	271	OP(FC) { UINT8 i = rdop() & 0xFE; CALL( rd16( i ) ); PUSH8( m_F ); }
	272	OP(FD) { UINT8 i = rdop() & 0xFE; JMP( rd16( i ) ); /* PUSH8( m_F );?? */ }
273	273	OP(FE) { /* illegal operation? */ }
274	274	OP(FF) { }
275	275
276		static void (*const insnminx[256])(minx_state *minx) = {
277		minx_00, minx_01, minx_02, minx_03, minx_04, minx_05, minx_06, minx_07,
278		minx_08, minx_09, minx_0A, minx_0B, minx_0C, minx_0D, minx_0E, minx_0F,
279		minx_10, minx_11, minx_12, minx_13, minx_14, minx_15, minx_16, minx_17,
280		minx_18, minx_19, minx_1A, minx_1B, minx_1C, minx_1D, minx_1E, minx_1F,
281		minx_20, minx_21, minx_22, minx_23, minx_24, minx_25, minx_26, minx_27,
282		minx_28, minx_29, minx_2A, minx_2B, minx_2C, minx_2D, minx_2E, minx_2F,
283		minx_30, minx_31, minx_32, minx_33, minx_34, minx_35, minx_36, minx_37,
284		minx_38, minx_39, minx_3A, minx_3B, minx_3C, minx_3D, minx_3E, minx_3F,
285		minx_40, minx_41, minx_42, minx_43, minx_44, minx_45, minx_46, minx_47,
286		minx_48, minx_49, minx_4A, minx_4B, minx_4C, minx_4D, minx_4E, minx_4F,
287		minx_50, minx_51, minx_52, minx_53, minx_54, minx_55, minx_56, minx_57,
288		minx_58, minx_59, minx_5A, minx_5B, minx_5C, minx_5D, minx_5E, minx_5F,
289		minx_60, minx_61, minx_62, minx_63, minx_64, minx_65, minx_66, minx_67,
290		minx_68, minx_69, minx_6A, minx_6B, minx_6C, minx_6D, minx_6E, minx_6F,
291		minx_70, minx_71, minx_72, minx_73, minx_74, minx_75, minx_76, minx_77,
292		minx_78, minx_79, minx_7A, minx_7B, minx_7C, minx_7D, minx_7E, minx_7F,
293		minx_80, minx_81, minx_82, minx_83, minx_84, minx_85, minx_86, minx_87,
294		minx_88, minx_89, minx_8A, minx_8B, minx_8C, minx_8D, minx_8E, minx_8F,
295		minx_90, minx_91, minx_92, minx_93, minx_94, minx_95, minx_96, minx_97,
296		minx_98, minx_99, minx_9A, minx_9B, minx_9C, minx_9D, minx_9E, minx_9F,
297		minx_A0, minx_A1, minx_A2, minx_A3, minx_A4, minx_A5, minx_A6, minx_A7,
298		minx_A8, minx_A9, minx_AA, minx_AB, minx_AC, minx_AD, minx_AE, minx_AF,
299		minx_B0, minx_B1, minx_B2, minx_B3, minx_B4, minx_B5, minx_B6, minx_B7,
300		minx_B8, minx_B9, minx_BA, minx_BB, minx_BC, minx_BD, minx_BE, minx_BF,
301		minx_C0, minx_C1, minx_C2, minx_C3, minx_C4, minx_C5, minx_C6, minx_C7,
302		minx_C8, minx_C9, minx_CA, minx_CB, minx_CC, minx_CD, minx_CE, minx_CF,
303		minx_D0, minx_D1, minx_D2, minx_D3, minx_D4, minx_D5, minx_D6, minx_D7,
304		minx_D8, minx_D9, minx_DA, minx_DB, minx_DC, minx_DD, minx_DE, minx_DF,
305		minx_E0, minx_E1, minx_E2, minx_E3, minx_E4, minx_E5, minx_E6, minx_E7,
306		minx_E8, minx_E9, minx_EA, minx_EB, minx_EC, minx_ED, minx_EE, minx_EF,
307		minx_F0, minx_F1, minx_F2, minx_F3, minx_F4, minx_F5, minx_F6, minx_F7,
308		minx_F8, minx_F9, minx_FA, minx_FB, minx_FC, minx_FD, minx_FE, minx_FF
	276	const minx_cpu_device::op_func minx_cpu_device::insnminx[256] = {
	277	&minx_cpu_device::minx_00, &minx_cpu_device::minx_01, &minx_cpu_device::minx_02, &minx_cpu_device::minx_03, &minx_cpu_device::minx_04, &minx_cpu_device::minx_05, &minx_cpu_device::minx_06, &minx_cpu_device::minx_07,
	278	&minx_cpu_device::minx_08, &minx_cpu_device::minx_09, &minx_cpu_device::minx_0A, &minx_cpu_device::minx_0B, &minx_cpu_device::minx_0C, &minx_cpu_device::minx_0D, &minx_cpu_device::minx_0E, &minx_cpu_device::minx_0F,
	279	&minx_cpu_device::minx_10, &minx_cpu_device::minx_11, &minx_cpu_device::minx_12, &minx_cpu_device::minx_13, &minx_cpu_device::minx_14, &minx_cpu_device::minx_15, &minx_cpu_device::minx_16, &minx_cpu_device::minx_17,
	280	&minx_cpu_device::minx_18, &minx_cpu_device::minx_19, &minx_cpu_device::minx_1A, &minx_cpu_device::minx_1B, &minx_cpu_device::minx_1C, &minx_cpu_device::minx_1D, &minx_cpu_device::minx_1E, &minx_cpu_device::minx_1F,
	281	&minx_cpu_device::minx_20, &minx_cpu_device::minx_21, &minx_cpu_device::minx_22, &minx_cpu_device::minx_23, &minx_cpu_device::minx_24, &minx_cpu_device::minx_25, &minx_cpu_device::minx_26, &minx_cpu_device::minx_27,
	282	&minx_cpu_device::minx_28, &minx_cpu_device::minx_29, &minx_cpu_device::minx_2A, &minx_cpu_device::minx_2B, &minx_cpu_device::minx_2C, &minx_cpu_device::minx_2D, &minx_cpu_device::minx_2E, &minx_cpu_device::minx_2F,
	283	&minx_cpu_device::minx_30, &minx_cpu_device::minx_31, &minx_cpu_device::minx_32, &minx_cpu_device::minx_33, &minx_cpu_device::minx_34, &minx_cpu_device::minx_35, &minx_cpu_device::minx_36, &minx_cpu_device::minx_37,
	284	&minx_cpu_device::minx_38, &minx_cpu_device::minx_39, &minx_cpu_device::minx_3A, &minx_cpu_device::minx_3B, &minx_cpu_device::minx_3C, &minx_cpu_device::minx_3D, &minx_cpu_device::minx_3E, &minx_cpu_device::minx_3F,
	285	&minx_cpu_device::minx_40, &minx_cpu_device::minx_41, &minx_cpu_device::minx_42, &minx_cpu_device::minx_43, &minx_cpu_device::minx_44, &minx_cpu_device::minx_45, &minx_cpu_device::minx_46, &minx_cpu_device::minx_47,
	286	&minx_cpu_device::minx_48, &minx_cpu_device::minx_49, &minx_cpu_device::minx_4A, &minx_cpu_device::minx_4B, &minx_cpu_device::minx_4C, &minx_cpu_device::minx_4D, &minx_cpu_device::minx_4E, &minx_cpu_device::minx_4F,
	287	&minx_cpu_device::minx_50, &minx_cpu_device::minx_51, &minx_cpu_device::minx_52, &minx_cpu_device::minx_53, &minx_cpu_device::minx_54, &minx_cpu_device::minx_55, &minx_cpu_device::minx_56, &minx_cpu_device::minx_57,
	288	&minx_cpu_device::minx_58, &minx_cpu_device::minx_59, &minx_cpu_device::minx_5A, &minx_cpu_device::minx_5B, &minx_cpu_device::minx_5C, &minx_cpu_device::minx_5D, &minx_cpu_device::minx_5E, &minx_cpu_device::minx_5F,
	289	&minx_cpu_device::minx_60, &minx_cpu_device::minx_61, &minx_cpu_device::minx_62, &minx_cpu_device::minx_63, &minx_cpu_device::minx_64, &minx_cpu_device::minx_65, &minx_cpu_device::minx_66, &minx_cpu_device::minx_67,
	290	&minx_cpu_device::minx_68, &minx_cpu_device::minx_69, &minx_cpu_device::minx_6A, &minx_cpu_device::minx_6B, &minx_cpu_device::minx_6C, &minx_cpu_device::minx_6D, &minx_cpu_device::minx_6E, &minx_cpu_device::minx_6F,
	291	&minx_cpu_device::minx_70, &minx_cpu_device::minx_71, &minx_cpu_device::minx_72, &minx_cpu_device::minx_73, &minx_cpu_device::minx_74, &minx_cpu_device::minx_75, &minx_cpu_device::minx_76, &minx_cpu_device::minx_77,
	292	&minx_cpu_device::minx_78, &minx_cpu_device::minx_79, &minx_cpu_device::minx_7A, &minx_cpu_device::minx_7B, &minx_cpu_device::minx_7C, &minx_cpu_device::minx_7D, &minx_cpu_device::minx_7E, &minx_cpu_device::minx_7F,
	293	&minx_cpu_device::minx_80, &minx_cpu_device::minx_81, &minx_cpu_device::minx_82, &minx_cpu_device::minx_83, &minx_cpu_device::minx_84, &minx_cpu_device::minx_85, &minx_cpu_device::minx_86, &minx_cpu_device::minx_87,
	294	&minx_cpu_device::minx_88, &minx_cpu_device::minx_89, &minx_cpu_device::minx_8A, &minx_cpu_device::minx_8B, &minx_cpu_device::minx_8C, &minx_cpu_device::minx_8D, &minx_cpu_device::minx_8E, &minx_cpu_device::minx_8F,
	295	&minx_cpu_device::minx_90, &minx_cpu_device::minx_91, &minx_cpu_device::minx_92, &minx_cpu_device::minx_93, &minx_cpu_device::minx_94, &minx_cpu_device::minx_95, &minx_cpu_device::minx_96, &minx_cpu_device::minx_97,
	296	&minx_cpu_device::minx_98, &minx_cpu_device::minx_99, &minx_cpu_device::minx_9A, &minx_cpu_device::minx_9B, &minx_cpu_device::minx_9C, &minx_cpu_device::minx_9D, &minx_cpu_device::minx_9E, &minx_cpu_device::minx_9F,
	297	&minx_cpu_device::minx_A0, &minx_cpu_device::minx_A1, &minx_cpu_device::minx_A2, &minx_cpu_device::minx_A3, &minx_cpu_device::minx_A4, &minx_cpu_device::minx_A5, &minx_cpu_device::minx_A6, &minx_cpu_device::minx_A7,
	298	&minx_cpu_device::minx_A8, &minx_cpu_device::minx_A9, &minx_cpu_device::minx_AA, &minx_cpu_device::minx_AB, &minx_cpu_device::minx_AC, &minx_cpu_device::minx_AD, &minx_cpu_device::minx_AE, &minx_cpu_device::minx_AF,
	299	&minx_cpu_device::minx_B0, &minx_cpu_device::minx_B1, &minx_cpu_device::minx_B2, &minx_cpu_device::minx_B3, &minx_cpu_device::minx_B4, &minx_cpu_device::minx_B5, &minx_cpu_device::minx_B6, &minx_cpu_device::minx_B7,
	300	&minx_cpu_device::minx_B8, &minx_cpu_device::minx_B9, &minx_cpu_device::minx_BA, &minx_cpu_device::minx_BB, &minx_cpu_device::minx_BC, &minx_cpu_device::minx_BD, &minx_cpu_device::minx_BE, &minx_cpu_device::minx_BF,
	301	&minx_cpu_device::minx_C0, &minx_cpu_device::minx_C1, &minx_cpu_device::minx_C2, &minx_cpu_device::minx_C3, &minx_cpu_device::minx_C4, &minx_cpu_device::minx_C5, &minx_cpu_device::minx_C6, &minx_cpu_device::minx_C7,
	302	&minx_cpu_device::minx_C8, &minx_cpu_device::minx_C9, &minx_cpu_device::minx_CA, &minx_cpu_device::minx_CB, &minx_cpu_device::minx_CC, &minx_cpu_device::minx_CD, &minx_cpu_device::minx_CE, &minx_cpu_device::minx_CF,
	303	&minx_cpu_device::minx_D0, &minx_cpu_device::minx_D1, &minx_cpu_device::minx_D2, &minx_cpu_device::minx_D3, &minx_cpu_device::minx_D4, &minx_cpu_device::minx_D5, &minx_cpu_device::minx_D6, &minx_cpu_device::minx_D7,
	304	&minx_cpu_device::minx_D8, &minx_cpu_device::minx_D9, &minx_cpu_device::minx_DA, &minx_cpu_device::minx_DB, &minx_cpu_device::minx_DC, &minx_cpu_device::minx_DD, &minx_cpu_device::minx_DE, &minx_cpu_device::minx_DF,
	305	&minx_cpu_device::minx_E0, &minx_cpu_device::minx_E1, &minx_cpu_device::minx_E2, &minx_cpu_device::minx_E3, &minx_cpu_device::minx_E4, &minx_cpu_device::minx_E5, &minx_cpu_device::minx_E6, &minx_cpu_device::minx_E7,
	306	&minx_cpu_device::minx_E8, &minx_cpu_device::minx_E9, &minx_cpu_device::minx_EA, &minx_cpu_device::minx_EB, &minx_cpu_device::minx_EC, &minx_cpu_device::minx_ED, &minx_cpu_device::minx_EE, &minx_cpu_device::minx_EF,
	307	&minx_cpu_device::minx_F0, &minx_cpu_device::minx_F1, &minx_cpu_device::minx_F2, &minx_cpu_device::minx_F3, &minx_cpu_device::minx_F4, &minx_cpu_device::minx_F5, &minx_cpu_device::minx_F6, &minx_cpu_device::minx_F7,
	308	&minx_cpu_device::minx_F8, &minx_cpu_device::minx_F9, &minx_cpu_device::minx_FA, &minx_cpu_device::minx_FB, &minx_cpu_device::minx_FC, &minx_cpu_device::minx_FD, &minx_cpu_device::minx_FE, &minx_cpu_device::minx_FF
309	309	};
310	310
311		static const int insnminx_cycles[256] = {
312		8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
313		8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
314		8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
315		8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
	311	const int minx_cpu_device::insnminx_cycles[256] = {
	312	8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
	313	8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
	314	8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
	315	8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
316	316
317		4,  4,  4,  4, 12,  8,  8,  8,  4,  4,  4,  4, 12,  8,  8,  8,
318		4,  4,  4,  4, 12,  8,  8,  8,  4,  4,  4,  4, 12,  8,  8,  8,
319		8,  8,  8,  8, 16, 12, 12, 12,  8,  8,  8,  8, 16, 12, 12, 12,
320		8,  8,  8,  8, 16, 12, 12, 12, 12, 12, 12, 12,  1, 16, 16, 16,
	317	4,  4,  4,  4, 12,  8,  8,  8,  4,  4,  4,  4, 12,  8,  8,  8,
	318	4,  4,  4,  4, 12,  8,  8,  8,  4,  4,  4,  4, 12,  8,  8,  8,
	319	8,  8,  8,  8, 16, 12, 12, 12,  8,  8,  8,  8, 16, 12, 12, 12,
	320	8,  8,  8,  8, 16, 12, 12, 12, 12, 12, 12, 12,  1, 16, 16, 16,
321	321
322		8,  8,  8,  8,  8, 16, 12,  8,  8,  8,  8,  8,  8, 16, 12,  8,
323		8,  8,  8,  8,  8, 12,  8,  8,  8,  8,  8,  8, 12, 12, 12, 12,
	322	8,  8,  8,  8,  8, 16, 12,  8,  8,  8,  8,  8,  8, 16, 12,  8,
	323	8,  8,  8,  8,  8, 12,  8,  8,  8,  8,  8,  8, 12, 12, 12, 12,
324	324	16, 16, 16, 16, 12, 12, 16, 12, 12, 12, 12, 12,  8,  8, 12,  8,
325		8,  8,  8,  8,  8, 12, 12, 12, 20, 20, 20, 20,  1,  1,  1,  1,
	325	8,  8,  8,  8,  8, 12, 12, 12, 20, 20, 20, 20,  1,  1,  1,  1,
326	326
327	327	12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,  8, 12,  0,  0,
328	328	12, 12, 12, 12, 12, 12, 12, 12, 20, 20, 20, 16, 16, 16,  8,  8,
329		8,  8,  8,  8,  8,  8,  8,  8, 12, 12, 12, 12, 12, 12, 12, 12,
	329	8,  8,  8,  8,  8,  8,  8,  8, 12, 12, 12, 12, 12, 12, 12, 12,
330	330	20,  8, 24, 12,  8,  1,  8, 12,  8,  8,  8, 20, 20,  1,  1,  8
331	331	};

trunk/src/emu/cpu/minx/minxopce.h

r24599	r24600
1	1	#undef OP
2		#define OP(nn) INLINE void minx_CE_##nn(minx_state *minx)
	2	#define OP(nn) void minx_cpu_device::minx_CE_##nn()
3	3
4		OP(00) { AD2_X8; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
5		OP(01) { AD2_Y8; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
6		OP(02) { AD2_XL; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
7		OP(03) { AD2_YL; minx->BA = ( minx->BA & 0xFF00 ) | ADD8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
8		OP(04) { AD1_IHL; WR( addr1, ADD8( minx, RD( addr1 ), ( minx->BA & 0x00FF ) ) ); }
9		OP(05) { AD1_IHL; WR( addr1, ADD8( minx, RD( addr1 ), rdop(minx) ) ); }
10		OP(06) { AD1_IHL; AD2_XIX; WR( addr1, ADD8( minx, RD( addr1 ), RD( addr2 ) ) ); }
11		OP(07) { AD1_IHL; AD2_YIY; WR( addr1, ADD8( minx, RD( addr1 ), RD( addr2 ) ) ); }
12		OP(08) { AD2_X8; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
13		OP(09) { AD2_Y8; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
14		OP(0A) { AD2_XL; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
15		OP(0B) { AD2_YL; minx->BA = ( minx->BA & 0xFF00 ) | ADDC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
16		OP(0C) { AD1_IHL; WR( addr1, ADDC8( minx, RD( addr1 ), ( minx->BA & 0x00FF ) ) ); }
17		OP(0D) { AD1_IHL; WR( addr1, ADDC8( minx, RD( addr1 ), rdop(minx) ) ); }
18		OP(0E) { AD1_IHL; AD2_XIX; WR( addr1, ADDC8( minx, RD( addr1 ), RD( addr2 ) ) ); }
19		OP(0F) { AD1_IHL; AD2_YIY; WR( addr1, ADDC8( minx, RD( addr1 ), RD( addr2 ) ) ); }
	4	OP(00) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	5	OP(01) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	6	OP(02) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	7	OP(03) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	8	OP(04) { AD1_IHL; WR( addr1, ADD8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	9	OP(05) { AD1_IHL; WR( addr1, ADD8( RD( addr1 ), rdop() ) ); }
	10	OP(06) { AD1_IHL; AD2_XIX; WR( addr1, ADD8( RD( addr1 ), RD( addr2 ) ) ); }
	11	OP(07) { AD1_IHL; AD2_YIY; WR( addr1, ADD8( RD( addr1 ), RD( addr2 ) ) ); }
	12	OP(08) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	13	OP(09) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	14	OP(0A) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	15	OP(0B) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	16	OP(0C) { AD1_IHL; WR( addr1, ADDC8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	17	OP(0D) { AD1_IHL; WR( addr1, ADDC8( RD( addr1 ), rdop() ) ); }
	18	OP(0E) { AD1_IHL; AD2_XIX; WR( addr1, ADDC8( RD( addr1 ), RD( addr2 ) ) ); }
	19	OP(0F) { AD1_IHL; AD2_YIY; WR( addr1, ADDC8( RD( addr1 ), RD( addr2 ) ) ); }
20	20
21		OP(10) { AD2_X8; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
22		OP(11) { AD2_Y8; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
23		OP(12) { AD2_XL; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
24		OP(13) { AD2_YL; minx->BA = ( minx->BA & 0xFF00 ) | SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
25		OP(14) { AD1_IHL; WR( addr1, SUB8( minx, RD( addr1 ), ( minx->BA & 0x00FF ) ) ); }
26		OP(15) { AD1_IHL; WR( addr1, SUB8( minx, RD( addr1 ), rdop(minx) ) ); }
27		OP(16) { AD1_IHL; AD2_XIX; WR( addr1, SUB8( minx, RD( addr1 ), RD( addr2 ) ) ); }
28		OP(17) { AD1_IHL; AD2_YIY; WR( addr1, SUB8( minx, RD( addr1 ), RD( addr2 ) ) ); }
29		OP(18) { AD2_X8; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
30		OP(19) { AD2_Y8; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
31		OP(1A) { AD2_XL; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
32		OP(1B) { AD2_YL; minx->BA = ( minx->BA & 0xFF00 ) | SUBC8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
33		OP(1C) { AD1_IHL; WR( addr1, SUBC8( minx, RD( addr1 ), ( minx->BA & 0x00FF ) ) ); }
34		OP(1D) { AD1_IHL; WR( addr1, SUBC8( minx, RD( addr1 ), rdop(minx) ) ); }
35		OP(1E) { AD1_IHL; AD2_XIX; WR( addr1, SUBC8( minx, RD( addr1 ), RD( addr2 ) ) ); }
36		OP(1F) { AD1_IHL; AD2_YIY; WR( addr1, SUBC8( minx, RD( addr1 ), RD( addr2 ) ) ); }
	21	OP(10) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	22	OP(11) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	23	OP(12) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	24	OP(13) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	25	OP(14) { AD1_IHL; WR( addr1, SUB8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	26	OP(15) { AD1_IHL; WR( addr1, SUB8( RD( addr1 ), rdop() ) ); }
	27	OP(16) { AD1_IHL; AD2_XIX; WR( addr1, SUB8( RD( addr1 ), RD( addr2 ) ) ); }
	28	OP(17) { AD1_IHL; AD2_YIY; WR( addr1, SUB8( RD( addr1 ), RD( addr2 ) ) ); }
	29	OP(18) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	30	OP(19) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	31	OP(1A) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	32	OP(1B) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	33	OP(1C) { AD1_IHL; WR( addr1, SUBC8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	34	OP(1D) { AD1_IHL; WR( addr1, SUBC8( RD( addr1 ), rdop() ) ); }
	35	OP(1E) { AD1_IHL; AD2_XIX; WR( addr1, SUBC8( RD( addr1 ), RD( addr2 ) ) ); }
	36	OP(1F) { AD1_IHL; AD2_YIY; WR( addr1, SUBC8( RD( addr1 ), RD( addr2 ) ) ); }
37	37
38		OP(20) { AD2_X8; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
39		OP(21) { AD2_Y8; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
40		OP(22) { AD2_XL; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
41		OP(23) { AD2_YL; minx->BA = ( minx->BA & 0xFF00 ) | AND8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
42		OP(24) { AD1_IHL; WR( addr1, AND8( minx, RD( addr1 ), ( minx->BA & 0x00FF ) ) ); }
43		OP(25) { AD1_IHL; WR( addr1, AND8( minx, RD( addr1 ), rdop(minx) ) ); }
44		OP(26) { AD1_IHL; AD2_XIX; WR( addr1, AND8( minx, RD( addr1 ), RD( addr2 ) ) ); }
45		OP(27) { AD1_IHL; AD2_YIY; WR( addr1, AND8( minx, RD( addr1 ), RD( addr2 ) ) ); }
46		OP(28) { AD2_X8; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
47		OP(29) { AD2_Y8; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
48		OP(2A) { AD2_XL; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
49		OP(2B) { AD2_YL; minx->BA = ( minx->BA & 0xFF00 ) | OR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
50		OP(2C) { AD1_IHL; WR( addr1, OR8( minx, RD( addr1 ), ( minx->BA & 0x00FF ) ) ); }
51		OP(2D) { AD1_IHL; WR( addr1, OR8( minx, RD( addr1 ), rdop(minx) ) ); }
52		OP(2E) { AD1_IHL; AD2_XIX; WR( addr1, OR8( minx, RD( addr1 ), RD( addr2 ) ) ); }
53		OP(2F) { AD1_IHL; AD2_YIY; WR( addr1, OR8( minx, RD( addr1 ), RD( addr2 ) ) ); }
	38	OP(20) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	39	OP(21) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	40	OP(22) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	41	OP(23) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	42	OP(24) { AD1_IHL; WR( addr1, AND8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	43	OP(25) { AD1_IHL; WR( addr1, AND8( RD( addr1 ), rdop() ) ); }
	44	OP(26) { AD1_IHL; AD2_XIX; WR( addr1, AND8( RD( addr1 ), RD( addr2 ) ) ); }
	45	OP(27) { AD1_IHL; AD2_YIY; WR( addr1, AND8( RD( addr1 ), RD( addr2 ) ) ); }
	46	OP(28) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	47	OP(29) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	48	OP(2A) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	49	OP(2B) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	50	OP(2C) { AD1_IHL; WR( addr1, OR8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	51	OP(2D) { AD1_IHL; WR( addr1, OR8( RD( addr1 ), rdop() ) ); }
	52	OP(2E) { AD1_IHL; AD2_XIX; WR( addr1, OR8( RD( addr1 ), RD( addr2 ) ) ); }
	53	OP(2F) { AD1_IHL; AD2_YIY; WR( addr1, OR8( RD( addr1 ), RD( addr2 ) ) ); }
54	54
55		OP(30) { AD2_X8; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
56		OP(31) { AD2_Y8; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
57		OP(32) { AD2_XL; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
58		OP(33) { AD2_YL; SUB8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
59		OP(34) { AD1_IHL; SUB8( minx, RD( addr1 ), ( minx->BA & 0x00FF ) ); }
60		OP(35) { AD1_IHL; SUB8( minx, RD( addr1 ), rdop(minx) ); }
61		OP(36) { AD1_IHL; AD2_XIX; SUB8( minx, RD( addr1 ), RD( addr2 ) ); }
62		OP(37) { AD1_IHL; AD2_YIY; SUB8( minx, RD( addr1 ), RD( addr2 ) ); }
63		OP(38) { AD2_X8; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
64		OP(39) { AD2_Y8; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
65		OP(3A) { AD2_XL; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
66		OP(3B) { AD2_YL; minx->BA = ( minx->BA & 0xFF00 ) | XOR8( minx, ( minx->BA & 0x00FF ), RD( addr2 ) ); }
67		OP(3C) { AD1_IHL; WR( addr1, XOR8( minx, RD( addr1 ), ( minx->BA & 0x00FF ) ) ); }
68		OP(3D) { AD1_IHL; WR( addr1, XOR8( minx, RD( addr1 ), rdop(minx) ) ); }
69		OP(3E) { AD1_IHL; AD2_XIX; WR( addr1, XOR8( minx, RD( addr1 ), RD( addr2 ) ) ); }
70		OP(3F) { AD1_IHL; AD2_YIY; WR( addr1, XOR8( minx, RD( addr1 ), RD( addr2 ) ) ); }
	55	OP(30) { AD2_X8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	56	OP(31) { AD2_Y8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	57	OP(32) { AD2_XL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	58	OP(33) { AD2_YL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	59	OP(34) { AD1_IHL; SUB8( RD( addr1 ), ( m_BA & 0x00FF ) ); }
	60	OP(35) { AD1_IHL; SUB8( RD( addr1 ), rdop() ); }
	61	OP(36) { AD1_IHL; AD2_XIX; SUB8( RD( addr1 ), RD( addr2 ) ); }
	62	OP(37) { AD1_IHL; AD2_YIY; SUB8( RD( addr1 ), RD( addr2 ) ); }
	63	OP(38) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	64	OP(39) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	65	OP(3A) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	66	OP(3B) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	67	OP(3C) { AD1_IHL; WR( addr1, XOR8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	68	OP(3D) { AD1_IHL; WR( addr1, XOR8( RD( addr1 ), rdop() ) ); }
	69	OP(3E) { AD1_IHL; AD2_XIX; WR( addr1, XOR8( RD( addr1 ), RD( addr2 ) ) ); }
	70	OP(3F) { AD1_IHL; AD2_YIY; WR( addr1, XOR8( RD( addr1 ), RD( addr2 ) ) ); }
71	71
72		OP(40) { AD2_X8; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
73		OP(41) { AD2_Y8; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
74		OP(42) { AD2_XL; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
75		OP(43) { AD2_YL; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
76		OP(44) { AD1_X8; WR( addr1, ( minx->BA & 0x00FF ) ); }
77		OP(45) { AD1_Y8; WR( addr1, ( minx->BA & 0x00FF ) ); }
78		OP(46) { AD1_XL; WR( addr1, ( minx->BA & 0x00FF ) ); }
79		OP(47) { AD1_YL; WR( addr1, ( minx->BA & 0x00FF ) ); }
80		OP(48) { AD2_X8; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
81		OP(49) { AD2_Y8; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
82		OP(4A) { AD2_XL; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
83		OP(4B) { AD2_YL; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
84		OP(4C) { AD1_X8; WR( addr1, ( minx->BA >> 8 ) ); }
85		OP(4D) { AD1_Y8; WR( addr1, ( minx->BA >> 8 ) ); }
86		OP(4E) { AD1_XL; WR( addr1, ( minx->BA >> 8 ) ); }
87		OP(4F) { AD1_YL; WR( addr1, ( minx->BA >> 8 ) ); }
	72	OP(40) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	73	OP(41) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	74	OP(42) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	75	OP(43) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	76	OP(44) { AD1_X8; WR( addr1, ( m_BA & 0x00FF ) ); }
	77	OP(45) { AD1_Y8; WR( addr1, ( m_BA & 0x00FF ) ); }
	78	OP(46) { AD1_XL; WR( addr1, ( m_BA & 0x00FF ) ); }
	79	OP(47) { AD1_YL; WR( addr1, ( m_BA & 0x00FF ) ); }
	80	OP(48) { AD2_X8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	81	OP(49) { AD2_Y8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	82	OP(4A) { AD2_XL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	83	OP(4B) { AD2_YL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	84	OP(4C) { AD1_X8; WR( addr1, ( m_BA >> 8 ) ); }
	85	OP(4D) { AD1_Y8; WR( addr1, ( m_BA >> 8 ) ); }
	86	OP(4E) { AD1_XL; WR( addr1, ( m_BA >> 8 ) ); }
	87	OP(4F) { AD1_YL; WR( addr1, ( m_BA >> 8 ) ); }
88	88
89		OP(50) { AD2_X8; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
90		OP(51) { AD2_Y8; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
91		OP(52) { AD2_XL; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
92		OP(53) { AD2_YL; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
93		OP(54) { AD1_X8; WR( addr1, ( minx->HL & 0x00FF ) ); }
94		OP(55) { AD1_Y8; WR( addr1, ( minx->HL & 0x00FF ) ); }
95		OP(56) { AD1_XL; WR( addr1, ( minx->HL & 0x00FF ) ); }
96		OP(57) { AD1_YL; WR( addr1, ( minx->HL & 0x00FF ) ); }
97		OP(58) { AD2_X8; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
98		OP(59) { AD2_Y8; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
99		OP(5A) { AD2_XL; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
100		OP(5B) { AD2_YL; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
101		OP(5C) { AD1_X8; WR( addr1, ( minx->HL >> 8 ) ); }
102		OP(5D) { AD1_Y8; WR( addr1, ( minx->HL >> 8 ) ); }
103		OP(5E) { AD1_XL; WR( addr1, ( minx->HL >> 8 ) ); }
104		OP(5F) { AD1_YL; WR( addr1, ( minx->HL >> 8 ) ); }
	89	OP(50) { AD2_X8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	90	OP(51) { AD2_Y8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	91	OP(52) { AD2_XL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	92	OP(53) { AD2_YL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	93	OP(54) { AD1_X8; WR( addr1, ( m_HL & 0x00FF ) ); }
	94	OP(55) { AD1_Y8; WR( addr1, ( m_HL & 0x00FF ) ); }
	95	OP(56) { AD1_XL; WR( addr1, ( m_HL & 0x00FF ) ); }
	96	OP(57) { AD1_YL; WR( addr1, ( m_HL & 0x00FF ) ); }
	97	OP(58) { AD2_X8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	98	OP(59) { AD2_Y8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	99	OP(5A) { AD2_XL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	100	OP(5B) { AD2_YL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	101	OP(5C) { AD1_X8; WR( addr1, ( m_HL >> 8 ) ); }
	102	OP(5D) { AD1_Y8; WR( addr1, ( m_HL >> 8 ) ); }
	103	OP(5E) { AD1_XL; WR( addr1, ( m_HL >> 8 ) ); }
	104	OP(5F) { AD1_YL; WR( addr1, ( m_HL >> 8 ) ); }
105	105
106	106	OP(60) { AD1_IHL; AD2_X8; WR( addr1, RD( addr2 ) ); }
107	107	OP(61) { AD1_IHL; AD2_Y8; WR( addr1, RD( addr2 ) ); }
r24599	r24600
137	137	OP(7E) { /* illegal operation? */ }
138	138	OP(7F) { /* illegal operation? */ }
139	139
140		OP(80) { minx->BA = ( minx->BA & 0xFF00 ) | SAL8( minx, minx->BA & 0x00FF ); }
141		OP(81) { minx->BA = ( minx->BA & 0x00FF ) | ( SAL8( minx, minx->BA >> 8 )<< 8 ); }
142		OP(82) { AD1_IN8; WR( addr1, SAL8( minx, RD( addr1 ) ) ); }
143		OP(83) { AD1_IHL; WR( addr1, SAL8( minx, RD( addr1 ) ) ); }
144		OP(84) { minx->BA = ( minx->BA & 0xFF00 ) | SHL8( minx, minx->BA & 0x00FF ); }
145		OP(85) { minx->BA = ( minx->BA & 0x00FF ) | ( SHL8( minx, minx->BA >> 8 ) << 8 ); }
146		OP(86) { AD1_IN8; WR( addr1, SHL8( minx, RD( addr1 ) ) ); }
147		OP(87) { AD1_IHL; WR( addr1, SHL8( minx, RD( addr1 ) ) ); }
148		OP(88) { minx->BA = ( minx->BA & 0xFF00 ) | SAR8( minx, minx->BA & 0x00FF ); }
149		OP(89) { minx->BA = ( minx->BA & 0x00FF ) | ( SAR8( minx, minx->BA >> 8 ) << 8 ); }
150		OP(8A) { AD1_IN8; WR( addr1, SAR8( minx, RD( addr1 ) ) ); }
151		OP(8B) { AD1_IHL; WR( addr1, SAR8( minx, RD( addr1 ) ) ); }
152		OP(8C) { minx->BA = ( minx->BA & 0xFF00 ) | SHR8( minx, minx->BA & 0x00FF ); }
153		OP(8D) { minx->BA = ( minx->BA & 0x00FF ) | ( SHR8( minx, minx->BA >> 8 ) << 8 ); }
154		OP(8E) { AD1_IN8; WR( addr1, SHR8( minx, RD( addr1 ) ) ); }
155		OP(8F) { AD1_IHL; WR( addr1, SHR8( minx, RD( addr1 ) ) ); }
	140	OP(80) { m_BA = ( m_BA & 0xFF00 ) | SAL8( m_BA & 0x00FF ); }
	141	OP(81) { m_BA = ( m_BA & 0x00FF ) | ( SAL8( m_BA >> 8 )<< 8 ); }
	142	OP(82) { AD1_IN8; WR( addr1, SAL8( RD( addr1 ) ) ); }
	143	OP(83) { AD1_IHL; WR( addr1, SAL8( RD( addr1 ) ) ); }
	144	OP(84) { m_BA = ( m_BA & 0xFF00 ) | SHL8( m_BA & 0x00FF ); }
	145	OP(85) { m_BA = ( m_BA & 0x00FF ) | ( SHL8( m_BA >> 8 ) << 8 ); }
	146	OP(86) { AD1_IN8; WR( addr1, SHL8( RD( addr1 ) ) ); }
	147	OP(87) { AD1_IHL; WR( addr1, SHL8( RD( addr1 ) ) ); }
	148	OP(88) { m_BA = ( m_BA & 0xFF00 ) | SAR8( m_BA & 0x00FF ); }
	149	OP(89) { m_BA = ( m_BA & 0x00FF ) | ( SAR8( m_BA >> 8 ) << 8 ); }
	150	OP(8A) { AD1_IN8; WR( addr1, SAR8( RD( addr1 ) ) ); }
	151	OP(8B) { AD1_IHL; WR( addr1, SAR8( RD( addr1 ) ) ); }
	152	OP(8C) { m_BA = ( m_BA & 0xFF00 ) | SHR8( m_BA & 0x00FF ); }
	153	OP(8D) { m_BA = ( m_BA & 0x00FF ) | ( SHR8( m_BA >> 8 ) << 8 ); }
	154	OP(8E) { AD1_IN8; WR( addr1, SHR8( RD( addr1 ) ) ); }
	155	OP(8F) { AD1_IHL; WR( addr1, SHR8( RD( addr1 ) ) ); }
156	156
157		OP(90) { minx->BA = ( minx->BA & 0xFF00 ) | ROLC8( minx, minx->BA & 0x00FF ); }
158		OP(91) { minx->BA = ( minx->BA & 0x00FF ) | ( ROLC8( minx, minx->BA >> 8 ) << 8 ); }
159		OP(92) { AD1_IN8; WR( addr1, ROLC8( minx, RD( addr1 ) ) ); }
160		OP(93) { AD1_IHL; WR( addr1, ROLC8( minx, RD( addr1 ) ) ); }
161		OP(94) { minx->BA = ( minx->BA & 0xFF00 ) | ROL8( minx, minx->BA & 0x00FF ); }
162		OP(95) { minx->BA = ( minx->BA & 0x00FF ) | ( ROL8( minx, minx->BA >> 8 ) << 8 ); }
163		OP(96) { AD1_IN8; WR( addr1, ROL8( minx, RD( addr1 ) ) ); }
164		OP(97) { AD1_IHL; WR( addr1, ROL8( minx, RD( addr1 ) ) ); }
165		OP(98) { minx->BA = ( minx->BA & 0xFF00 ) | RORC8( minx, minx->BA & 0x00FF ); }
166		OP(99) { minx->BA = ( minx->BA & 0x00FF ) | ( RORC8( minx, minx->BA >> 8 ) << 8 ); }
167		OP(9A) { AD1_IN8; WR( addr1, RORC8( minx, RD( addr1 ) ) ); }
168		OP(9B) { AD1_IHL; WR( addr1, RORC8( minx, RD( addr1 ) ) ); }
169		OP(9C) { minx->BA = ( minx->BA & 0xFF00 ) | ROR8( minx, minx->BA & 0x00FF ); }
170		OP(9D) { minx->BA = ( minx->BA & 0x00FF ) | ( ROR8( minx, minx->BA >> 8 ) << 8 ); }
171		OP(9E) { AD1_IN8; WR( addr1, ROR8( minx, RD( addr1 ) ) ); }
172		OP(9F) { AD1_IHL; WR( addr1, ROR8( minx, RD( addr1 ) ) ); }
	157	OP(90) { m_BA = ( m_BA & 0xFF00 ) | ROLC8( m_BA & 0x00FF ); }
	158	OP(91) { m_BA = ( m_BA & 0x00FF ) | ( ROLC8( m_BA >> 8 ) << 8 ); }
	159	OP(92) { AD1_IN8; WR( addr1, ROLC8( RD( addr1 ) ) ); }
	160	OP(93) { AD1_IHL; WR( addr1, ROLC8( RD( addr1 ) ) ); }
	161	OP(94) { m_BA = ( m_BA & 0xFF00 ) | ROL8( m_BA & 0x00FF ); }
	162	OP(95) { m_BA = ( m_BA & 0x00FF ) | ( ROL8( m_BA >> 8 ) << 8 ); }
	163	OP(96) { AD1_IN8; WR( addr1, ROL8( RD( addr1 ) ) ); }
	164	OP(97) { AD1_IHL; WR( addr1, ROL8( RD( addr1 ) ) ); }
	165	OP(98) { m_BA = ( m_BA & 0xFF00 ) | RORC8( m_BA & 0x00FF ); }
	166	OP(99) { m_BA = ( m_BA & 0x00FF ) | ( RORC8( m_BA >> 8 ) << 8 ); }
	167	OP(9A) { AD1_IN8; WR( addr1, RORC8( RD( addr1 ) ) ); }
	168	OP(9B) { AD1_IHL; WR( addr1, RORC8( RD( addr1 ) ) ); }
	169	OP(9C) { m_BA = ( m_BA & 0xFF00 ) | ROR8( m_BA & 0x00FF ); }
	170	OP(9D) { m_BA = ( m_BA & 0x00FF ) | ( ROR8( m_BA >> 8 ) << 8 ); }
	171	OP(9E) { AD1_IN8; WR( addr1, ROR8( RD( addr1 ) ) ); }
	172	OP(9F) { AD1_IHL; WR( addr1, ROR8( RD( addr1 ) ) ); }
173	173
174		OP(A0) { minx->BA = ( minx->BA & 0xFF00 ) | NOT8( minx, minx->BA & 0x00FF ); }
175		OP(A1) { minx->BA = ( minx->BA & 0x00FF ) | ( NOT8( minx, minx->BA >> 8 ) << 8 ); }
176		OP(A2) { AD1_IN8; WR( addr1, NOT8( minx, RD( addr1 ) ) ); }
177		OP(A3) { AD1_IHL; WR( addr1, NOT8( minx, RD( addr1 ) ) ); }
178		OP(A4) { minx->BA = ( minx->BA & 0xFF00 ) | NEG8( minx, minx->BA & 0x00FF ); }
179		OP(A5) { minx->BA = ( minx->BA & 0x00FF ) | ( NEG8( minx, minx->BA >> 8 ) << 8 ); }
180		OP(A6) { AD1_IN8; WR( addr1, NEG8( minx, RD( addr1 ) ) ); }
181		OP(A7) { AD1_IHL; WR( addr1, NEG8( minx, RD( addr1 ) ) ); }
182		OP(A8) { minx->BA = ( ( minx->BA & 0x0080 ) ? ( 0xFF00 | minx->BA ) : ( minx->BA & 0x00FF ) ); }
	174	OP(A0) { m_BA = ( m_BA & 0xFF00 ) | NOT8( m_BA & 0x00FF ); }
	175	OP(A1) { m_BA = ( m_BA & 0x00FF ) | ( NOT8( m_BA >> 8 ) << 8 ); }
	176	OP(A2) { AD1_IN8; WR( addr1, NOT8( RD( addr1 ) ) ); }
	177	OP(A3) { AD1_IHL; WR( addr1, NOT8( RD( addr1 ) ) ); }
	178	OP(A4) { m_BA = ( m_BA & 0xFF00 ) | NEG8( m_BA & 0x00FF ); }
	179	OP(A5) { m_BA = ( m_BA & 0x00FF ) | ( NEG8( m_BA >> 8 ) << 8 ); }
	180	OP(A6) { AD1_IN8; WR( addr1, NEG8( RD( addr1 ) ) ); }
	181	OP(A7) { AD1_IHL; WR( addr1, NEG8( RD( addr1 ) ) ); }
	182	OP(A8) { m_BA = ( ( m_BA & 0x0080 ) ? ( 0xFF00 | m_BA ) : ( m_BA & 0x00FF ) ); }
183	183	OP(A9) { /* illegal operation? */ }
184	184	OP(AA) { /* illegal operation? */ }
185	185	OP(AB) { /* illegal operation? */ }
186	186	OP(AC) { /* illegal operation? */ }
187	187	OP(AD) { /* illegal operation? */ }
188		OP(AE) { /* HALT */ minx->halted = 1; }
	188	OP(AE) { /* HALT */ m_halted = 1; }
189	189	OP(AF) { }
190	190
191		OP(B0) { minx->BA = ( minx->BA & 0x00FF ) | ( AND8( minx, ( minx->BA >> 8 ), rdop(minx) ) << 8 ); }
192		OP(B1) { minx->HL = ( minx->HL & 0xFF00 ) | AND8( minx, ( minx->HL & 0x00FF ), rdop(minx) ); }
193		OP(B2) { minx->HL = ( minx->HL & 0x00FF ) | ( AND8( minx, ( minx->HL >> 8 ), rdop(minx) ) << 8 ); }
	191	OP(B0) { m_BA = ( m_BA & 0x00FF ) | ( AND8( ( m_BA >> 8 ), rdop() ) << 8 ); }
	192	OP(B1) { m_HL = ( m_HL & 0xFF00 ) | AND8( ( m_HL & 0x00FF ), rdop() ); }
	193	OP(B2) { m_HL = ( m_HL & 0x00FF ) | ( AND8( ( m_HL >> 8 ), rdop() ) << 8 ); }
194	194	OP(B3) { /* illegal operation? */ }
195		OP(B4) { minx->BA = ( minx->BA & 0x00FF ) | ( OR8( minx, ( minx->BA >> 8 ), rdop(minx) ) << 8 ); }
196		OP(B5) { minx->HL = ( minx->HL & 0xFF00 ) | OR8( minx, ( minx->HL & 0x00FF ), rdop(minx) ); }
197		OP(B6) { minx->HL = ( minx->HL & 0x00FF ) | ( OR8( minx, ( minx->HL >> 8 ), rdop(minx) ) << 8 ); }
	195	OP(B4) { m_BA = ( m_BA & 0x00FF ) | ( OR8( ( m_BA >> 8 ), rdop() ) << 8 ); }
	196	OP(B5) { m_HL = ( m_HL & 0xFF00 ) | OR8( ( m_HL & 0x00FF ), rdop() ); }
	197	OP(B6) { m_HL = ( m_HL & 0x00FF ) | ( OR8( ( m_HL >> 8 ), rdop() ) << 8 ); }
198	198	OP(B7) { /* illegal operation? */ }
199		OP(B8) { minx->BA = ( minx->BA & 0x00FF ) | ( XOR8( minx, ( minx->BA >> 8 ), rdop(minx) ) << 8 ); }
200		OP(B9) { minx->HL = ( minx->HL & 0xFF00 ) | XOR8( minx, ( minx->HL & 0x00FF ), rdop(minx) ); }
201		OP(BA) { minx->HL = ( minx->HL & 0x00FF ) | ( XOR8( minx, ( minx->HL >> 8 ), rdop(minx) ) << 8 ); }
	199	OP(B8) { m_BA = ( m_BA & 0x00FF ) | ( XOR8( ( m_BA >> 8 ), rdop() ) << 8 ); }
	200	OP(B9) { m_HL = ( m_HL & 0xFF00 ) | XOR8( ( m_HL & 0x00FF ), rdop() ); }
	201	OP(BA) { m_HL = ( m_HL & 0x00FF ) | ( XOR8( ( m_HL >> 8 ), rdop() ) << 8 ); }
202	202	OP(BB) { /* illegal operation? */ }
203		OP(BC) { SUB8( minx, ( minx->BA >> 8 ), rdop(minx) ); }
204		OP(BD) { SUB8( minx, ( minx->HL & 0x00FF), rdop(minx) ); }
205		OP(BE) { SUB8( minx, ( minx->HL >> 8 ), rdop(minx) ); }
206		OP(BF) { SUB8( minx, minx->N, rdop(minx) ); }
	203	OP(BC) { SUB8( ( m_BA >> 8 ), rdop() ); }
	204	OP(BD) { SUB8( ( m_HL & 0x00FF), rdop() ); }
	205	OP(BE) { SUB8( ( m_HL >> 8 ), rdop() ); }
	206	OP(BF) { SUB8( m_N, rdop() ); }
207	207
208		OP(C0) { minx->BA = ( minx->BA & 0xFF00 ) | minx->N; }
209		OP(C1) { minx->BA = ( minx->BA & 0xFF00 ) | minx->F; }
210		OP(C2) { minx->N = ( minx->BA & 0x00FF ); }
211		OP(C3) { minx->F = ( minx->BA & 0x00FF ); }
212		OP(C4) { minx->U = rdop(minx); }
213		OP(C5) { minx->I = rdop(minx); }
214		OP(C6) { minx->XI = rdop(minx); }
215		OP(C7) { minx->YI = rdop(minx); }
216		OP(C8) { minx->BA = ( minx->BA & 0xFF00 ) | minx->V; }
217		OP(C9) { minx->BA = ( minx->BA & 0xFF00 ) | minx->I; }
218		OP(CA) { minx->BA = ( minx->BA & 0xFF00 ) | minx->XI; }
219		OP(CB) { minx->BA = ( minx->BA & 0xFF00 ) | minx->YI; }
220		OP(CC) { minx->U = ( minx->BA & 0x00FF ); }
221		OP(CD) { minx->I = ( minx->BA & 0x00FF ); }
222		OP(CE) { minx->XI = ( minx->BA & 0x00FF ); }
223		OP(CF) { minx->YI = ( minx->BA & 0x00FF ); }
	208	OP(C0) { m_BA = ( m_BA & 0xFF00 ) | m_N; }
	209	OP(C1) { m_BA = ( m_BA & 0xFF00 ) | m_F; }
	210	OP(C2) { m_N = ( m_BA & 0x00FF ); }
	211	OP(C3) { m_F = ( m_BA & 0x00FF ); }
	212	OP(C4) { m_U = rdop(); }
	213	OP(C5) { m_I = rdop(); }
	214	OP(C6) { m_XI = rdop(); }
	215	OP(C7) { m_YI = rdop(); }
	216	OP(C8) { m_BA = ( m_BA & 0xFF00 ) | m_V; }
	217	OP(C9) { m_BA = ( m_BA & 0xFF00 ) | m_I; }
	218	OP(CA) { m_BA = ( m_BA & 0xFF00 ) | m_XI; }
	219	OP(CB) { m_BA = ( m_BA & 0xFF00 ) | m_YI; }
	220	OP(CC) { m_U = ( m_BA & 0x00FF ); }
	221	OP(CD) { m_I = ( m_BA & 0x00FF ); }
	222	OP(CE) { m_XI = ( m_BA & 0x00FF ); }
	223	OP(CF) { m_YI = ( m_BA & 0x00FF ); }
224	224
225		OP(D0) { AD2_I16; minx->BA = ( minx->BA & 0xFF00 ) | RD( addr2 ); }
226		OP(D1) { AD2_I16; minx->BA = ( minx->BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
227		OP(D2) { AD2_I16; minx->HL = ( minx->HL & 0xFF00 ) | RD( addr2 ); }
228		OP(D3) { AD2_I16; minx->HL = ( minx->HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
229		OP(D4) { AD1_I16; WR( addr1, ( minx->BA & 0x00FF ) ); }
230		OP(D5) { AD1_I16; WR( addr1, ( minx->BA >> 8 ) ); }
231		OP(D6) { AD1_I16; WR( addr1, ( minx->HL & 0x00FF ) ); }
232		OP(D7) { AD1_I16; WR( addr1, ( minx->HL >> 8 ) ); }
233		OP(D8) { minx->HL = ( minx->HL & 0x00FF ) * ( minx->BA & 0x00FF );  }
234		OP(D9) { int d = minx->HL / ( minx->BA & 0x00FF ); minx->HL = ( ( minx->HL - ( ( minx->BA & 0x00FF ) * d ) ) << 8 ) | d; }
	225	OP(D0) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	226	OP(D1) { AD2_I16; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	227	OP(D2) { AD2_I16; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	228	OP(D3) { AD2_I16; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	229	OP(D4) { AD1_I16; WR( addr1, ( m_BA & 0x00FF ) ); }
	230	OP(D5) { AD1_I16; WR( addr1, ( m_BA >> 8 ) ); }
	231	OP(D6) { AD1_I16; WR( addr1, ( m_HL & 0x00FF ) ); }
	232	OP(D7) { AD1_I16; WR( addr1, ( m_HL >> 8 ) ); }
	233	OP(D8) { m_HL = ( m_HL & 0x00FF ) * ( m_BA & 0x00FF );  }
	234	OP(D9) { int d = m_HL / ( m_BA & 0x00FF ); m_HL = ( ( m_HL - ( ( m_BA & 0x00FF ) * d ) ) << 8 ) | d; }
235	235	OP(DA) { /* illegal operation? */ }
236	236	OP(DB) { /* illegal operation? */ }
237	237	OP(DC) { /* illegal operation? */ }
r24599	r24600
239	239	OP(DE) { /* illegal operation? */ }
240	240	OP(DF) { /* illegal operation? */ }
241	241
242		OP(E0) { INT8 d8 = rdop(minx); if ( ( ( minx->F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
243		OP(E1) { INT8 d8 = rdop(minx); if ( ( minx->F & FLAG_Z ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
244		OP(E2) { INT8 d8 = rdop(minx); if ( !( minx->F & FLAG_Z ) && ( ( ( minx->F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
245		OP(E3) { INT8 d8 = rdop(minx); if ( ( ( minx->F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
246		OP(E4) { INT8 d8 = rdop(minx); if ( ( minx->F & FLAG_O ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
247		OP(E5) { INT8 d8 = rdop(minx); if ( ! ( minx->F & FLAG_O ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
248		OP(E6) { INT8 d8 = rdop(minx); if ( ! ( minx->F & FLAG_S ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
249		OP(E7) { INT8 d8 = rdop(minx); if ( ( minx->F & FLAG_S ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
250		OP(E8) { INT8 d8 = rdop(minx); if ( ! ( minx->E & EXEC_X0 ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
251		OP(E9) { INT8 d8 = rdop(minx); if ( ! ( minx->E & EXEC_X1 ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
252		OP(EA) { INT8 d8 = rdop(minx); if ( ! ( minx->E & EXEC_X2 ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
253		OP(EB) { INT8 d8 = rdop(minx); if ( ! ( minx->E & EXEC_DZ ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
254		OP(EC) { INT8 d8 = rdop(minx); if ( ( minx->E & EXEC_X0 ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
255		OP(ED) { INT8 d8 = rdop(minx); if ( ( minx->E & EXEC_X1 ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
256		OP(EE) { INT8 d8 = rdop(minx); if ( ( minx->E & EXEC_X2 ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
257		OP(EF) { INT8 d8 = rdop(minx); if ( ( minx->E & EXEC_DZ ) ) { JMP( minx, minx->PC + d8 - 1 ); } }
	242	OP(E0) { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
	243	OP(E1) { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
	244	OP(E2) { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { JMP( m_PC + d8 - 1 ); } }
	245	OP(E3) { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { JMP( m_PC + d8 - 1 ); } }
	246	OP(E4) { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
	247	OP(E5) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
	248	OP(E6) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
	249	OP(E7) { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
	250	OP(E8) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
	251	OP(E9) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
	252	OP(EA) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
	253	OP(EB) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
	254	OP(EC) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
	255	OP(ED) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
	256	OP(EE) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
	257	OP(EF) { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
258	258
259		OP(F0) { INT8 d8 = rdop(minx); if ( ( ( minx->F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
260		OP(F1) { INT8 d8 = rdop(minx); if ( ( minx->F & FLAG_Z ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
261		OP(F2) { INT8 d8 = rdop(minx); if ( !( minx->F & FLAG_Z ) && ( ( ( minx->F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
262		OP(F3) { INT8 d8 = rdop(minx); if ( ( ( minx->F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( minx->F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { CALL( minx, minx->PC + d8 - 1 ); } }
263		OP(F4) { INT8 d8 = rdop(minx); if ( ( minx->F & FLAG_O ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
264		OP(F5) { INT8 d8 = rdop(minx); if ( ! ( minx->F & FLAG_O ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
265		OP(F6) { INT8 d8 = rdop(minx); if ( ! ( minx->F & FLAG_S ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
266		OP(F7) { INT8 d8 = rdop(minx); if ( ( minx->F & FLAG_S ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
267		OP(F8) { INT8 d8 = rdop(minx); if ( ! ( minx->E & EXEC_X0 ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
268		OP(F9) { INT8 d8 = rdop(minx); if ( ! ( minx->E & EXEC_X1 ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
269		OP(FA) { INT8 d8 = rdop(minx); if ( ! ( minx->E & EXEC_X2 ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
270		OP(FB) { INT8 d8 = rdop(minx); if ( ! ( minx->E & EXEC_DZ ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
271		OP(FC) { INT8 d8 = rdop(minx); if ( ( minx->E & EXEC_X0 ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
272		OP(FD) { INT8 d8 = rdop(minx); if ( ( minx->E & EXEC_X1 ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
273		OP(FE) { INT8 d8 = rdop(minx); if ( ( minx->E & EXEC_X2 ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
274		OP(FF) { INT8 d8 = rdop(minx); if ( ( minx->E & EXEC_DZ ) ) { CALL( minx, minx->PC + d8 - 1 ); minx->icount -= 12; } }
	259	OP(F0) { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	260	OP(F1) { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	261	OP(F2) { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	262	OP(F3) { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { CALL( m_PC + d8 - 1 ); } }
	263	OP(F4) { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	264	OP(F5) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	265	OP(F6) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	266	OP(F7) { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	267	OP(F8) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	268	OP(F9) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	269	OP(FA) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	270	OP(FB) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	271	OP(FC) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	272	OP(FD) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	273	OP(FE) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	274	OP(FF) { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
275	275
276		static void (*const insnminx_CE[256])(minx_state *minx) = {
277		minx_CE_00, minx_CE_01, minx_CE_02, minx_CE_03, minx_CE_04, minx_CE_05, minx_CE_06, minx_CE_07,
278		minx_CE_08, minx_CE_09, minx_CE_0A, minx_CE_0B, minx_CE_0C, minx_CE_0D, minx_CE_0E, minx_CE_0F,
279		minx_CE_10, minx_CE_11, minx_CE_12, minx_CE_13, minx_CE_14, minx_CE_15, minx_CE_16, minx_CE_17,
280		minx_CE_18, minx_CE_19, minx_CE_1A, minx_CE_1B, minx_CE_1C, minx_CE_1D, minx_CE_1E, minx_CE_1F,
281		minx_CE_20, minx_CE_21, minx_CE_22, minx_CE_23, minx_CE_24, minx_CE_25, minx_CE_26, minx_CE_27,
282		minx_CE_28, minx_CE_29, minx_CE_2A, minx_CE_2B, minx_CE_2C, minx_CE_2D, minx_CE_2E, minx_CE_2F,
283		minx_CE_30, minx_CE_31, minx_CE_32, minx_CE_33, minx_CE_34, minx_CE_35, minx_CE_36, minx_CE_37,
284		minx_CE_38, minx_CE_39, minx_CE_3A, minx_CE_3B, minx_CE_3C, minx_CE_3D, minx_CE_3E, minx_CE_3F,
285		minx_CE_40, minx_CE_41, minx_CE_42, minx_CE_43, minx_CE_44, minx_CE_45, minx_CE_46, minx_CE_47,
286		minx_CE_48, minx_CE_49, minx_CE_4A, minx_CE_4B, minx_CE_4C, minx_CE_4D, minx_CE_4E, minx_CE_4F,
287		minx_CE_50, minx_CE_51, minx_CE_52, minx_CE_53, minx_CE_54, minx_CE_55, minx_CE_56, minx_CE_57,
288		minx_CE_58, minx_CE_59, minx_CE_5A, minx_CE_5B, minx_CE_5C, minx_CE_5D, minx_CE_5E, minx_CE_5F,
289		minx_CE_60, minx_CE_61, minx_CE_62, minx_CE_63, minx_CE_64, minx_CE_65, minx_CE_66, minx_CE_67,
290		minx_CE_68, minx_CE_69, minx_CE_6A, minx_CE_6B, minx_CE_6C, minx_CE_6D, minx_CE_6E, minx_CE_6F,
291		minx_CE_70, minx_CE_71, minx_CE_72, minx_CE_73, minx_CE_74, minx_CE_75, minx_CE_76, minx_CE_77,
292		minx_CE_78, minx_CE_79, minx_CE_7A, minx_CE_7B, minx_CE_7C, minx_CE_7D, minx_CE_7E, minx_CE_7F,
293		minx_CE_80, minx_CE_81, minx_CE_82, minx_CE_83, minx_CE_84, minx_CE_85, minx_CE_86, minx_CE_87,
294		minx_CE_88, minx_CE_89, minx_CE_8A, minx_CE_8B, minx_CE_8C, minx_CE_8D, minx_CE_8E, minx_CE_8F,
295		minx_CE_90, minx_CE_91, minx_CE_92, minx_CE_93, minx_CE_94, minx_CE_95, minx_CE_96, minx_CE_97,
296		minx_CE_98, minx_CE_99, minx_CE_9A, minx_CE_9B, minx_CE_9C, minx_CE_9D, minx_CE_9E, minx_CE_9F,
297		minx_CE_A0, minx_CE_A1, minx_CE_A2, minx_CE_A3, minx_CE_A4, minx_CE_A5, minx_CE_A6, minx_CE_A7,
298		minx_CE_A8, minx_CE_A9, minx_CE_AA, minx_CE_AB, minx_CE_AC, minx_CE_AD, minx_CE_AE, minx_CE_AF,
299		minx_CE_B0, minx_CE_B1, minx_CE_B2, minx_CE_B3, minx_CE_B4, minx_CE_B5, minx_CE_B6, minx_CE_B7,
300		minx_CE_B8, minx_CE_B9, minx_CE_BA, minx_CE_BB, minx_CE_BC, minx_CE_BD, minx_CE_BE, minx_CE_BF,
301		minx_CE_C0, minx_CE_C1, minx_CE_C2, minx_CE_C3, minx_CE_C4, minx_CE_C5, minx_CE_C6, minx_CE_C7,
302		minx_CE_C8, minx_CE_C9, minx_CE_CA, minx_CE_CB, minx_CE_CC, minx_CE_CD, minx_CE_CE, minx_CE_CF,
303		minx_CE_D0, minx_CE_D1, minx_CE_D2, minx_CE_D3, minx_CE_D4, minx_CE_D5, minx_CE_D6, minx_CE_D7,
304		minx_CE_D8, minx_CE_D9, minx_CE_DA, minx_CE_DB, minx_CE_DC, minx_CE_DD, minx_CE_DE, minx_CE_DF,
305		minx_CE_E0, minx_CE_E1, minx_CE_E2, minx_CE_E3, minx_CE_E4, minx_CE_E5, minx_CE_E6, minx_CE_E7,
306		minx_CE_E8, minx_CE_E9, minx_CE_EA, minx_CE_EB, minx_CE_EC, minx_CE_ED, minx_CE_EE, minx_CE_EF,
307		minx_CE_F0, minx_CE_F1, minx_CE_F2, minx_CE_F3, minx_CE_F4, minx_CE_F5, minx_CE_F6, minx_CE_F7,
308		minx_CE_F8, minx_CE_F9, minx_CE_FA, minx_CE_FB, minx_CE_FC, minx_CE_FD, minx_CE_FE, minx_CE_FF
	276	const minx_cpu_device::op_func minx_cpu_device::insnminx_CE[256] = {
	277	&minx_cpu_device::minx_CE_00, &minx_cpu_device::minx_CE_01, &minx_cpu_device::minx_CE_02, &minx_cpu_device::minx_CE_03, &minx_cpu_device::minx_CE_04, &minx_cpu_device::minx_CE_05, &minx_cpu_device::minx_CE_06, &minx_cpu_device::minx_CE_07,
	278	&minx_cpu_device::minx_CE_08, &minx_cpu_device::minx_CE_09, &minx_cpu_device::minx_CE_0A, &minx_cpu_device::minx_CE_0B, &minx_cpu_device::minx_CE_0C, &minx_cpu_device::minx_CE_0D, &minx_cpu_device::minx_CE_0E, &minx_cpu_device::minx_CE_0F,
	279	&minx_cpu_device::minx_CE_10, &minx_cpu_device::minx_CE_11, &minx_cpu_device::minx_CE_12, &minx_cpu_device::minx_CE_13, &minx_cpu_device::minx_CE_14, &minx_cpu_device::minx_CE_15, &minx_cpu_device::minx_CE_16, &minx_cpu_device::minx_CE_17,
	280	&minx_cpu_device::minx_CE_18, &minx_cpu_device::minx_CE_19, &minx_cpu_device::minx_CE_1A, &minx_cpu_device::minx_CE_1B, &minx_cpu_device::minx_CE_1C, &minx_cpu_device::minx_CE_1D, &minx_cpu_device::minx_CE_1E, &minx_cpu_device::minx_CE_1F,
	281	&minx_cpu_device::minx_CE_20, &minx_cpu_device::minx_CE_21, &minx_cpu_device::minx_CE_22, &minx_cpu_device::minx_CE_23, &minx_cpu_device::minx_CE_24, &minx_cpu_device::minx_CE_25, &minx_cpu_device::minx_CE_26, &minx_cpu_device::minx_CE_27,
	282	&minx_cpu_device::minx_CE_28, &minx_cpu_device::minx_CE_29, &minx_cpu_device::minx_CE_2A, &minx_cpu_device::minx_CE_2B, &minx_cpu_device::minx_CE_2C, &minx_cpu_device::minx_CE_2D, &minx_cpu_device::minx_CE_2E, &minx_cpu_device::minx_CE_2F,
	283	&minx_cpu_device::minx_CE_30, &minx_cpu_device::minx_CE_31, &minx_cpu_device::minx_CE_32, &minx_cpu_device::minx_CE_33, &minx_cpu_device::minx_CE_34, &minx_cpu_device::minx_CE_35, &minx_cpu_device::minx_CE_36, &minx_cpu_device::minx_CE_37,
	284	&minx_cpu_device::minx_CE_38, &minx_cpu_device::minx_CE_39, &minx_cpu_device::minx_CE_3A, &minx_cpu_device::minx_CE_3B, &minx_cpu_device::minx_CE_3C, &minx_cpu_device::minx_CE_3D, &minx_cpu_device::minx_CE_3E, &minx_cpu_device::minx_CE_3F,
	285	&minx_cpu_device::minx_CE_40, &minx_cpu_device::minx_CE_41, &minx_cpu_device::minx_CE_42, &minx_cpu_device::minx_CE_43, &minx_cpu_device::minx_CE_44, &minx_cpu_device::minx_CE_45, &minx_cpu_device::minx_CE_46, &minx_cpu_device::minx_CE_47,
	286	&minx_cpu_device::minx_CE_48, &minx_cpu_device::minx_CE_49, &minx_cpu_device::minx_CE_4A, &minx_cpu_device::minx_CE_4B, &minx_cpu_device::minx_CE_4C, &minx_cpu_device::minx_CE_4D, &minx_cpu_device::minx_CE_4E, &minx_cpu_device::minx_CE_4F,
	287	&minx_cpu_device::minx_CE_50, &minx_cpu_device::minx_CE_51, &minx_cpu_device::minx_CE_52, &minx_cpu_device::minx_CE_53, &minx_cpu_device::minx_CE_54, &minx_cpu_device::minx_CE_55, &minx_cpu_device::minx_CE_56, &minx_cpu_device::minx_CE_57,
	288	&minx_cpu_device::minx_CE_58, &minx_cpu_device::minx_CE_59, &minx_cpu_device::minx_CE_5A, &minx_cpu_device::minx_CE_5B, &minx_cpu_device::minx_CE_5C, &minx_cpu_device::minx_CE_5D, &minx_cpu_device::minx_CE_5E, &minx_cpu_device::minx_CE_5F,
	289	&minx_cpu_device::minx_CE_60, &minx_cpu_device::minx_CE_61, &minx_cpu_device::minx_CE_62, &minx_cpu_device::minx_CE_63, &minx_cpu_device::minx_CE_64, &minx_cpu_device::minx_CE_65, &minx_cpu_device::minx_CE_66, &minx_cpu_device::minx_CE_67,
	290	&minx_cpu_device::minx_CE_68, &minx_cpu_device::minx_CE_69, &minx_cpu_device::minx_CE_6A, &minx_cpu_device::minx_CE_6B, &minx_cpu_device::minx_CE_6C, &minx_cpu_device::minx_CE_6D, &minx_cpu_device::minx_CE_6E, &minx_cpu_device::minx_CE_6F,
	291	&minx_cpu_device::minx_CE_70, &minx_cpu_device::minx_CE_71, &minx_cpu_device::minx_CE_72, &minx_cpu_device::minx_CE_73, &minx_cpu_device::minx_CE_74, &minx_cpu_device::minx_CE_75, &minx_cpu_device::minx_CE_76, &minx_cpu_device::minx_CE_77,
	292	&minx_cpu_device::minx_CE_78, &minx_cpu_device::minx_CE_79, &minx_cpu_device::minx_CE_7A, &minx_cpu_device::minx_CE_7B, &minx_cpu_device::minx_CE_7C, &minx_cpu_device::minx_CE_7D, &minx_cpu_device::minx_CE_7E, &minx_cpu_device::minx_CE_7F,
	293	&minx_cpu_device::minx_CE_80, &minx_cpu_device::minx_CE_81, &minx_cpu_device::minx_CE_82, &minx_cpu_device::minx_CE_83, &minx_cpu_device::minx_CE_84, &minx_cpu_device::minx_CE_85, &minx_cpu_device::minx_CE_86, &minx_cpu_device::minx_CE_87,
	294	&minx_cpu_device::minx_CE_88, &minx_cpu_device::minx_CE_89, &minx_cpu_device::minx_CE_8A, &minx_cpu_device::minx_CE_8B, &minx_cpu_device::minx_CE_8C, &minx_cpu_device::minx_CE_8D, &minx_cpu_device::minx_CE_8E, &minx_cpu_device::minx_CE_8F,
	295	&minx_cpu_device::minx_CE_90, &minx_cpu_device::minx_CE_91, &minx_cpu_device::minx_CE_92, &minx_cpu_device::minx_CE_93, &minx_cpu_device::minx_CE_94, &minx_cpu_device::minx_CE_95, &minx_cpu_device::minx_CE_96, &minx_cpu_device::minx_CE_97,
	296	&minx_cpu_device::minx_CE_98, &minx_cpu_device::minx_CE_99, &minx_cpu_device::minx_CE_9A, &minx_cpu_device::minx_CE_9B, &minx_cpu_device::minx_CE_9C, &minx_cpu_device::minx_CE_9D, &minx_cpu_device::minx_CE_9E, &minx_cpu_device::minx_CE_9F,
	297	&minx_cpu_device::minx_CE_A0, &minx_cpu_device::minx_CE_A1, &minx_cpu_device::minx_CE_A2, &minx_cpu_device::minx_CE_A3, &minx_cpu_device::minx_CE_A4, &minx_cpu_device::minx_CE_A5, &minx_cpu_device::minx_CE_A6, &minx_cpu_device::minx_CE_A7,
	298	&minx_cpu_device::minx_CE_A8, &minx_cpu_device::minx_CE_A9, &minx_cpu_device::minx_CE_AA, &minx_cpu_device::minx_CE_AB, &minx_cpu_device::minx_CE_AC, &minx_cpu_device::minx_CE_AD, &minx_cpu_device::minx_CE_AE, &minx_cpu_device::minx_CE_AF,
	299	&minx_cpu_device::minx_CE_B0, &minx_cpu_device::minx_CE_B1, &minx_cpu_device::minx_CE_B2, &minx_cpu_device::minx_CE_B3, &minx_cpu_device::minx_CE_B4, &minx_cpu_device::minx_CE_B5, &minx_cpu_device::minx_CE_B6, &minx_cpu_device::minx_CE_B7,
	300	&minx_cpu_device::minx_CE_B8, &minx_cpu_device::minx_CE_B9, &minx_cpu_device::minx_CE_BA, &minx_cpu_device::minx_CE_BB, &minx_cpu_device::minx_CE_BC, &minx_cpu_device::minx_CE_BD, &minx_cpu_device::minx_CE_BE, &minx_cpu_device::minx_CE_BF,
	301	&minx_cpu_device::minx_CE_C0, &minx_cpu_device::minx_CE_C1, &minx_cpu_device::minx_CE_C2, &minx_cpu_device::minx_CE_C3, &minx_cpu_device::minx_CE_C4, &minx_cpu_device::minx_CE_C5, &minx_cpu_device::minx_CE_C6, &minx_cpu_device::minx_CE_C7,
	302	&minx_cpu_device::minx_CE_C8, &minx_cpu_device::minx_CE_C9, &minx_cpu_device::minx_CE_CA, &minx_cpu_device::minx_CE_CB, &minx_cpu_device::minx_CE_CC, &minx_cpu_device::minx_CE_CD, &minx_cpu_device::minx_CE_CE, &minx_cpu_device::minx_CE_CF,
	303	&minx_cpu_device::minx_CE_D0, &minx_cpu_device::minx_CE_D1, &minx_cpu_device::minx_CE_D2, &minx_cpu_device::minx_CE_D3, &minx_cpu_device::minx_CE_D4, &minx_cpu_device::minx_CE_D5, &minx_cpu_device::minx_CE_D6, &minx_cpu_device::minx_CE_D7,
	304	&minx_cpu_device::minx_CE_D8, &minx_cpu_device::minx_CE_D9, &minx_cpu_device::minx_CE_DA, &minx_cpu_device::minx_CE_DB, &minx_cpu_device::minx_CE_DC, &minx_cpu_device::minx_CE_DD, &minx_cpu_device::minx_CE_DE, &minx_cpu_device::minx_CE_DF,
	305	&minx_cpu_device::minx_CE_E0, &minx_cpu_device::minx_CE_E1, &minx_cpu_device::minx_CE_E2, &minx_cpu_device::minx_CE_E3, &minx_cpu_device::minx_CE_E4, &minx_cpu_device::minx_CE_E5, &minx_cpu_device::minx_CE_E6, &minx_cpu_device::minx_CE_E7,
	306	&minx_cpu_device::minx_CE_E8, &minx_cpu_device::minx_CE_E9, &minx_cpu_device::minx_CE_EA, &minx_cpu_device::minx_CE_EB, &minx_cpu_device::minx_CE_EC, &minx_cpu_device::minx_CE_ED, &minx_cpu_device::minx_CE_EE, &minx_cpu_device::minx_CE_EF,
	307	&minx_cpu_device::minx_CE_F0, &minx_cpu_device::minx_CE_F1, &minx_cpu_device::minx_CE_F2, &minx_cpu_device::minx_CE_F3, &minx_cpu_device::minx_CE_F4, &minx_cpu_device::minx_CE_F5, &minx_cpu_device::minx_CE_F6, &minx_cpu_device::minx_CE_F7,
	308	&minx_cpu_device::minx_CE_F8, &minx_cpu_device::minx_CE_F9, &minx_cpu_device::minx_CE_FA, &minx_cpu_device::minx_CE_FB, &minx_cpu_device::minx_CE_FC, &minx_cpu_device::minx_CE_FD, &minx_cpu_device::minx_CE_FE, &minx_cpu_device::minx_CE_FF
309	309	};
310	310
311		static const int insnminx_cycles_CE[256] = {
	311	const int minx_cpu_device::insnminx_cycles_CE[256] = {
312	312	16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,
313	313	16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,
314	314	16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,
r24599	r24600
317	317	16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
318	318	16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
319	319	20, 20, 20, 20,  1,  1,  1,  1, 20, 20, 20, 20,  1,  1,  1,  1,
320		1,  1,  1,  1,  1,  1,  1,  1, 20, 20, 20, 20,  1,  1,  1,  1,
	320	1,  1,  1,  1,  1,  1,  1,  1, 20, 20, 20, 20,  1,  1,  1,  1,
321	321
322	322	12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16,
323	323	12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16,
324	324	12, 12, 20, 16, 12, 12, 20, 16, 12,  1,  1,  1,  1,  1,  8,  8,
325	325	12, 12, 12,  1, 12, 12, 12,  1, 20, 20, 20, 20, 12, 12, 12,  1,
326	326
327		8,  8,  8, 12, 16, 12, 12, 12,  8,  8,  8,  8, 12,  8,  8,  8,
	327	8,  8,  8, 12, 16, 12, 12, 12,  8,  8,  8,  8, 12,  8,  8,  8,
328	328	20, 20, 20, 20, 20, 20, 20, 20, 48, 52,  1,  1,  1,  1,  1,  1,
329	329	12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
330	330	12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12

trunk/src/emu/cpu/minx/minxopcf.h

r24599	r24600
1	1	#undef OP
2		#define OP(nn) INLINE void minx_CF_##nn(minx_state *minx)
	2	#define OP(nn) void minx_cpu_device::minx_CF_##nn()
3	3
4		OP(00) { minx->BA = ADD16( minx, minx->BA, minx->BA ); }
5		OP(01) { minx->BA = ADD16( minx, minx->BA, minx->HL ); }
6		OP(02) { minx->BA = ADD16( minx, minx->BA, minx->X ); }
7		OP(03) { minx->BA = ADD16( minx, minx->BA, minx->Y ); }
8		OP(04) { minx->BA = ADDC16( minx, minx->BA, minx->BA ); }
9		OP(05) { minx->BA = ADDC16( minx, minx->BA, minx->HL ); }
10		OP(06) { minx->BA = ADDC16( minx, minx->BA, minx->X ); }
11		OP(07) { minx->BA = ADDC16( minx, minx->BA, minx->Y ); }
12		OP(08) { minx->BA = SUB16( minx, minx->BA, minx->BA ); }
13		OP(09) { minx->BA = SUB16( minx, minx->BA, minx->HL ); }
14		OP(0A) { minx->BA = SUB16( minx, minx->BA, minx->X ); }
15		OP(0B) { minx->BA = SUB16( minx, minx->BA, minx->Y ); }
16		OP(0C) { minx->BA = SUBC16( minx, minx->BA, minx->BA ); }
17		OP(0D) { minx->BA = SUBC16( minx, minx->BA, minx->HL ); }
18		OP(0E) { minx->BA = SUBC16( minx, minx->BA, minx->X ); }
19		OP(0F) { minx->BA = SUBC16( minx, minx->BA, minx->Y ); }
	4	OP(00) { m_BA = ADD16( m_BA, m_BA ); }
	5	OP(01) { m_BA = ADD16( m_BA, m_HL ); }
	6	OP(02) { m_BA = ADD16( m_BA, m_X ); }
	7	OP(03) { m_BA = ADD16( m_BA, m_Y ); }
	8	OP(04) { m_BA = ADDC16( m_BA, m_BA ); }
	9	OP(05) { m_BA = ADDC16( m_BA, m_HL ); }
	10	OP(06) { m_BA = ADDC16( m_BA, m_X ); }
	11	OP(07) { m_BA = ADDC16( m_BA, m_Y ); }
	12	OP(08) { m_BA = SUB16( m_BA, m_BA ); }
	13	OP(09) { m_BA = SUB16( m_BA, m_HL ); }
	14	OP(0A) { m_BA = SUB16( m_BA, m_X ); }
	15	OP(0B) { m_BA = SUB16( m_BA, m_Y ); }
	16	OP(0C) { m_BA = SUBC16( m_BA, m_BA ); }
	17	OP(0D) { m_BA = SUBC16( m_BA, m_HL ); }
	18	OP(0E) { m_BA = SUBC16( m_BA, m_X ); }
	19	OP(0F) { m_BA = SUBC16( m_BA, m_Y ); }
20	20
21	21	OP(10) { /* illegal instruction? */ }
22	22	OP(11) { /* illegal instruction? */ }
r24599	r24600
26	26	OP(15) { /* illegal instruction? */ }
27	27	OP(16) { /* illegal instruction? */ }
28	28	OP(17) { /* illegal instruction? */ }
29		OP(18) { SUB16( minx, minx->BA, minx->BA ); }
30		OP(19) { SUB16( minx, minx->BA, minx->HL ); }
31		OP(1A) { SUB16( minx, minx->BA, minx->X ); }
32		OP(1B) { SUB16( minx, minx->BA, minx->Y ); }
	29	OP(18) { SUB16( m_BA, m_BA ); }
	30	OP(19) { SUB16( m_BA, m_HL ); }
	31	OP(1A) { SUB16( m_BA, m_X ); }
	32	OP(1B) { SUB16( m_BA, m_Y ); }
33	33	OP(1C) { /* illegal instruction? */ }
34	34	OP(1D) { /* illegal instruction? */ }
35	35	OP(1E) { /* illegal instruction? */ }
36	36	OP(1F) { /* illegal instruction? */ }
37	37
38		OP(20) { minx->HL = ADD16( minx, minx->HL, minx->BA ); }
39		OP(21) { minx->HL = ADD16( minx, minx->HL, minx->HL ); }
40		OP(22) { minx->HL = ADD16( minx, minx->HL, minx->X ); }
41		OP(23) { minx->HL = ADD16( minx, minx->HL, minx->Y ); }
42		OP(24) { minx->HL = ADDC16( minx, minx->HL, minx->BA ); }
43		OP(25) { minx->HL = ADDC16( minx, minx->HL, minx->HL ); }
44		OP(26) { minx->HL = ADDC16( minx, minx->HL, minx->X ); }
45		OP(27) { minx->HL = ADDC16( minx, minx->HL, minx->Y ); }
46		OP(28) { minx->HL = SUB16( minx, minx->HL, minx->BA ); }
47		OP(29) { minx->HL = SUB16( minx, minx->HL, minx->HL ); }
48		OP(2A) { minx->HL = SUB16( minx, minx->HL, minx->X ); }
49		OP(2B) { minx->HL = SUB16( minx, minx->HL, minx->Y ); }
50		OP(2C) { minx->HL = SUBC16( minx, minx->HL, minx->BA ); }
51		OP(2D) { minx->HL = SUBC16( minx, minx->HL, minx->HL ); }
52		OP(2E) { minx->HL = SUBC16( minx, minx->HL, minx->X ); }
53		OP(2F) { minx->HL = SUBC16( minx, minx->HL, minx->Y ); }
	38	OP(20) { m_HL = ADD16( m_HL, m_BA ); }
	39	OP(21) { m_HL = ADD16( m_HL, m_HL ); }
	40	OP(22) { m_HL = ADD16( m_HL, m_X ); }
	41	OP(23) { m_HL = ADD16( m_HL, m_Y ); }
	42	OP(24) { m_HL = ADDC16( m_HL, m_BA ); }
	43	OP(25) { m_HL = ADDC16( m_HL, m_HL ); }
	44	OP(26) { m_HL = ADDC16( m_HL, m_X ); }
	45	OP(27) { m_HL = ADDC16( m_HL, m_Y ); }
	46	OP(28) { m_HL = SUB16( m_HL, m_BA ); }
	47	OP(29) { m_HL = SUB16( m_HL, m_HL ); }
	48	OP(2A) { m_HL = SUB16( m_HL, m_X ); }
	49	OP(2B) { m_HL = SUB16( m_HL, m_Y ); }
	50	OP(2C) { m_HL = SUBC16( m_HL, m_BA ); }
	51	OP(2D) { m_HL = SUBC16( m_HL, m_HL ); }
	52	OP(2E) { m_HL = SUBC16( m_HL, m_X ); }
	53	OP(2F) { m_HL = SUBC16( m_HL, m_Y ); }
54	54
55	55	OP(30) { /* illegal instruction? */ }
56	56	OP(31) { /* illegal instruction? */ }
r24599	r24600
60	60	OP(35) { /* illegal instruction? */ }
61	61	OP(36) { /* illegal instruction? */ }
62	62	OP(37) { /* illegal instruction? */ }
63		OP(38) { SUB16( minx, minx->HL, minx->BA ); }
64		OP(39) { SUB16( minx, minx->HL, minx->HL ); }
65		OP(3A) { SUB16( minx, minx->HL, minx->X ); }
66		OP(3B) { SUB16( minx, minx->HL, minx->Y ); }
	63	OP(38) { SUB16( m_HL, m_BA ); }
	64	OP(39) { SUB16( m_HL, m_HL ); }
	65	OP(3A) { SUB16( m_HL, m_X ); }
	66	OP(3B) { SUB16( m_HL, m_Y ); }
67	67	OP(3C) { /* illegal instruction? */ }
68	68	OP(3D) { /* illegal instruction? */ }
69	69	OP(3E) { /* illegal instruction? */ }
70	70	OP(3F) { /* illegal instruction? */ }
71	71
72		OP(40) { minx->X = ADD16( minx, minx->X, minx->BA ); }
73		OP(41) { minx->X = ADD16( minx, minx->X, minx->HL ); }
74		OP(42) { minx->Y = ADD16( minx, minx->Y, minx->BA ); }
75		OP(43) { minx->Y = ADD16( minx, minx->Y, minx->HL ); }
76		OP(44) { minx->SP = ADD16( minx, minx->SP, minx->BA ); }
77		OP(45) { minx->SP = ADD16( minx, minx->SP, minx->HL ); }
	72	OP(40) { m_X = ADD16( m_X, m_BA ); }
	73	OP(41) { m_X = ADD16( m_X, m_HL ); }
	74	OP(42) { m_Y = ADD16( m_Y, m_BA ); }
	75	OP(43) { m_Y = ADD16( m_Y, m_HL ); }
	76	OP(44) { m_SP = ADD16( m_SP, m_BA ); }
	77	OP(45) { m_SP = ADD16( m_SP, m_HL ); }
78	78	OP(46) { /* illegal instruction? */ }
79	79	OP(47) { /* illegal instruction? */ }
80		OP(48) { minx->X = SUB16( minx, minx->X, minx->BA ); }
81		OP(49) { minx->X = SUB16( minx, minx->X, minx->HL ); }
82		OP(4A) { minx->Y = SUB16( minx, minx->Y, minx->BA ); }
83		OP(4B) { minx->Y = SUB16( minx, minx->Y, minx->HL ); }
84		OP(4C) { minx->SP = SUB16( minx, minx->SP, minx->BA ); }
85		OP(4D) { minx->SP = SUB16( minx, minx->SP, minx->HL ); }
	80	OP(48) { m_X = SUB16( m_X, m_BA ); }
	81	OP(49) { m_X = SUB16( m_X, m_HL ); }
	82	OP(4A) { m_Y = SUB16( m_Y, m_BA ); }
	83	OP(4B) { m_Y = SUB16( m_Y, m_HL ); }
	84	OP(4C) { m_SP = SUB16( m_SP, m_BA ); }
	85	OP(4D) { m_SP = SUB16( m_SP, m_HL ); }
86	86	OP(4E) { /* illegal instruction? */ }
87	87	OP(4F) { /* illegal instruction? */ }
88	88
r24599	r24600
98	98	OP(59) { /* illegal instruction? */ }
99	99	OP(5A) { /* illegal instruction? */ }
100	100	OP(5B) { /* illegal instruction? */ }
101		OP(5C) { SUB16( minx, minx->SP, minx->BA ); }
102		OP(5D) { SUB16( minx, minx->SP, minx->HL ); }
	101	OP(5C) { SUB16( m_SP, m_BA ); }
	102	OP(5D) { SUB16( m_SP, m_HL ); }
103	103	OP(5E) { /* illegal instruction? */ }
104	104	OP(5F) { /* illegal instruction? */ }
105	105
106		OP(60) { ADDC16( minx, minx->BA, rdop16(minx) ); /* ??? */ }
107		OP(61) { ADDC16( minx, minx->HL, rdop16(minx) ); /* ??? */ }
108		OP(62) { ADDC16( minx, minx->X, rdop16(minx) ); /* ??? */ }
109		OP(63) { ADDC16( minx, minx->Y, rdop16(minx) ); /* ??? */ }
	106	OP(60) { ADDC16( m_BA, rdop16() ); /* ??? */ }
	107	OP(61) { ADDC16( m_HL, rdop16() ); /* ??? */ }
	108	OP(62) { ADDC16( m_X, rdop16() ); /* ??? */ }
	109	OP(63) { ADDC16( m_Y, rdop16() ); /* ??? */ }
110	110	OP(64) { /* illegal instruction? */ }
111	111	OP(65) { /* illegal instruction? */ }
112	112	OP(66) { /* illegal instruction? */ }
113	113	OP(67) { /* illegal instruction? */ }
114		OP(68) { minx->SP = ADD16( minx, minx->SP, rdop16(minx) ); }
	114	OP(68) { m_SP = ADD16( m_SP, rdop16() ); }
115	115	OP(69) { /* illegal instruction? */ }
116		OP(6A) { minx->SP = SUB16( minx, minx->SP, rdop16(minx) ); }
	116	OP(6A) { m_SP = SUB16( m_SP, rdop16() ); }
117	117	OP(6B) { /* illegal instruction? */ }
118		OP(6C) { SUB16( minx, minx->SP, rdop16(minx) ); }
	118	OP(6C) { SUB16( m_SP, rdop16() ); }
119	119	OP(6D) { /* illegal instruction? */ }
120		OP(6E) { minx->SP = rdop16(minx); }
	120	OP(6E) { m_SP = rdop16(); }
121	121	OP(6F) { /* illegal instruction? */ }
122	122
123		OP(70) { UINT8 ofs8 = rdop(minx); minx->BA = rd16( minx, minx->SP + ofs8 ); }
124		OP(71) { UINT8 ofs8 = rdop(minx); minx->HL = rd16( minx, minx->SP + ofs8 ); }
125		OP(72) { UINT8 ofs8 = rdop(minx); minx->X = rd16( minx, minx->SP + ofs8 ); }
126		OP(73) { UINT8 ofs8 = rdop(minx); minx->Y = rd16( minx, minx->SP + ofs8 ); }
127		OP(74) { UINT8 ofs8 = rdop(minx); wr16( minx, minx->SP + ofs8, minx->BA ); }
128		OP(75) { UINT8 ofs8 = rdop(minx); wr16( minx, minx->SP + ofs8, minx->HL ); }
129		OP(76) { UINT8 ofs8 = rdop(minx); wr16( minx, minx->SP + ofs8, minx->X ); }
130		OP(77) { UINT8 ofs8 = rdop(minx); wr16( minx, minx->SP + ofs8, minx->Y ); }
131		OP(78) { AD2_I16; minx->SP = rd16( minx, addr2 ); }
	123	OP(70) { UINT8 ofs8 = rdop(); m_BA = rd16( m_SP + ofs8 ); }
	124	OP(71) { UINT8 ofs8 = rdop(); m_HL = rd16( m_SP + ofs8 ); }
	125	OP(72) { UINT8 ofs8 = rdop(); m_X = rd16( m_SP + ofs8 ); }
	126	OP(73) { UINT8 ofs8 = rdop(); m_Y = rd16( m_SP + ofs8 ); }
	127	OP(74) { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_BA ); }
	128	OP(75) { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_HL ); }
	129	OP(76) { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_X ); }
	130	OP(77) { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_Y ); }
	131	OP(78) { AD2_I16; m_SP = rd16( addr2 ); }
132	132	OP(79) { /* illegal instruction? */ }
133	133	OP(7A) { /* illegal instruction? */ }
134	134	OP(7B) { /* illegal instruction? */ }
135		OP(7C) { AD1_I16; wr16( minx, addr1, minx->SP ); }
	135	OP(7C) { AD1_I16; wr16( addr1, m_SP ); }
136	136	OP(7D) { /* illegal instruction? */ }
137	137	OP(7E) { /* illegal instruction? */ }
138	138	OP(7F) { /* illegal instruction? */ }
r24599	r24600
188	188	OP(AE) { /* illegal instruction? */ }
189	189	OP(AF) { /* illegal instruction? */ }
190	190
191		OP(B0) { PUSH8( minx, minx->BA & 0x00FF ); }
192		OP(B1) { PUSH8( minx, minx->BA >> 8 ); }
193		OP(B2) { PUSH8( minx, minx->HL & 0x00FF ); }
194		OP(B3) { PUSH8( minx, minx->HL >> 8 ); }
195		OP(B4) { minx->BA = ( minx->BA & 0xFF00 ) | POP8(minx); }
196		OP(B5) { minx->BA = ( minx->BA & 0x00FF ) | ( POP8(minx) << 8 ); }
197		OP(B6) { minx->HL = ( minx->HL & 0xFF00 ) | POP8(minx); }
198		OP(B7) { minx->HL = ( minx->HL & 0x00FF ) | ( POP8(minx) << 8 ); }
199		OP(B8) { PUSH16( minx, minx->BA ); PUSH16( minx, minx->HL ); PUSH16( minx, minx->X ); PUSH16( minx, minx->Y ); PUSH8( minx, minx->N ); }
200		OP(B9) { PUSH16( minx, minx->BA ); PUSH16( minx, minx->HL ); PUSH16( minx, minx->X ); PUSH16( minx, minx->Y ); PUSH8( minx, minx->N ); PUSH8( minx, minx->I ); PUSH8( minx, minx->XI ); PUSH8( minx, minx->YI ); }
	191	OP(B0) { PUSH8( m_BA & 0x00FF ); }
	192	OP(B1) { PUSH8( m_BA >> 8 ); }
	193	OP(B2) { PUSH8( m_HL & 0x00FF ); }
	194	OP(B3) { PUSH8( m_HL >> 8 ); }
	195	OP(B4) { m_BA = ( m_BA & 0xFF00 ) | POP8(); }
	196	OP(B5) { m_BA = ( m_BA & 0x00FF ) | ( POP8() << 8 ); }
	197	OP(B6) { m_HL = ( m_HL & 0xFF00 ) | POP8(); }
	198	OP(B7) { m_HL = ( m_HL & 0x00FF ) | ( POP8() << 8 ); }
	199	OP(B8) { PUSH16( m_BA ); PUSH16( m_HL ); PUSH16( m_X ); PUSH16( m_Y ); PUSH8( m_N ); }
	200	OP(B9) { PUSH16( m_BA ); PUSH16( m_HL ); PUSH16( m_X ); PUSH16( m_Y ); PUSH8( m_N ); PUSH8( m_I ); PUSH8( m_XI ); PUSH8( m_YI ); }
201	201	OP(BA) { /* illegal instruction? */ }
202	202	OP(BB) { /* illegal instruction? */ }
203		OP(BC) { minx->N = POP8(minx); minx->Y = POP16(minx); minx->X = POP16(minx); minx->HL = POP16(minx); minx->BA = POP16(minx); }
204		OP(BD) { minx->YI = POP8(minx); minx->XI = POP8(minx); minx->I = POP8(minx); minx->N = POP8(minx); minx->Y = POP16(minx); minx->X = POP16(minx); minx->HL = POP16(minx); minx->BA = POP16(minx); }
	203	OP(BC) { m_N = POP8(); m_Y = POP16(); m_X = POP16(); m_HL = POP16(); m_BA = POP16(); }
	204	OP(BD) { m_YI = POP8(); m_XI = POP8(); m_I = POP8(); m_N = POP8(); m_Y = POP16(); m_X = POP16(); m_HL = POP16(); m_BA = POP16(); }
205	205	OP(BE) { /* illegal instruction? */ }
206	206	OP(BF) { /* illegal instruction? */ }
207	207
208		OP(C0) { AD2_IHL; minx->BA = rd16( minx, addr2 ); }
209		OP(C1) { AD2_IHL; minx->HL = rd16( minx, addr2 ); }
210		OP(C2) { AD2_IHL; minx->X = rd16( minx, addr2 ); }
211		OP(C3) { AD2_IHL; minx->Y = rd16( minx, addr2 ); }
212		OP(C4) { AD1_IHL; wr16( minx, addr1, minx->BA ); }
213		OP(C5) { AD1_IHL; wr16( minx, addr1, minx->HL ); }
214		OP(C6) { AD1_IHL; wr16( minx, addr1, minx->X ); }
215		OP(C7) { AD1_IHL; wr16( minx, addr1, minx->Y ); }
	208	OP(C0) { AD2_IHL; m_BA = rd16( addr2 ); }
	209	OP(C1) { AD2_IHL; m_HL = rd16( addr2 ); }
	210	OP(C2) { AD2_IHL; m_X = rd16( addr2 ); }
	211	OP(C3) { AD2_IHL; m_Y = rd16( addr2 ); }
	212	OP(C4) { AD1_IHL; wr16( addr1, m_BA ); }
	213	OP(C5) { AD1_IHL; wr16( addr1, m_HL ); }
	214	OP(C6) { AD1_IHL; wr16( addr1, m_X ); }
	215	OP(C7) { AD1_IHL; wr16( addr1, m_Y ); }
216	216	OP(C8) { /* illegal instruction? */ }
217	217	OP(C9) { /* illegal instruction? */ }
218	218	OP(CA) { /* illegal instruction? */ }
r24599	r24600
222	222	OP(CE) { /* illegal instruction? */ }
223	223	OP(CF) { /* illegal instruction? */ }
224	224
225		OP(D0) { AD2_XIX; minx->BA = rd16( minx, addr2 ); }
226		OP(D1) { AD2_XIX; minx->HL = rd16( minx, addr2 ); }
227		OP(D2) { AD2_XIX; minx->X = rd16( minx, addr2 ); }
228		OP(D3) { AD2_XIX; minx->Y = rd16( minx, addr2 ); }
229		OP(D4) { AD1_XIX; wr16( minx, addr1, minx->BA ); }
230		OP(D5) { AD1_XIX; wr16( minx, addr1, minx->HL ); }
231		OP(D6) { AD1_XIX; wr16( minx, addr1, minx->X ); }
232		OP(D7) { AD1_XIX; wr16( minx, addr1, minx->Y ); }
233		OP(D8) { AD2_YIY; minx->BA = rd16( minx, addr2 ); }
234		OP(D9) { AD2_YIY; minx->HL = rd16( minx, addr2 ); }
235		OP(DA) { AD2_YIY; minx->X = rd16( minx, addr2 ); }
236		OP(DB) { AD2_YIY; minx->Y = rd16( minx, addr2 ); }
237		OP(DC) { AD1_YIY; wr16( minx, addr1, minx->BA ); }
238		OP(DD) { AD1_YIY; wr16( minx, addr1, minx->HL ); }
239		OP(DE) { AD1_YIY; wr16( minx, addr1, minx->X ); }
240		OP(DF) { AD1_YIY; wr16( minx, addr1, minx->Y ); }
	225	OP(D0) { AD2_XIX; m_BA = rd16( addr2 ); }
	226	OP(D1) { AD2_XIX; m_HL = rd16( addr2 ); }
	227	OP(D2) { AD2_XIX; m_X = rd16( addr2 ); }
	228	OP(D3) { AD2_XIX; m_Y = rd16( addr2 ); }
	229	OP(D4) { AD1_XIX; wr16( addr1, m_BA ); }
	230	OP(D5) { AD1_XIX; wr16( addr1, m_HL ); }
	231	OP(D6) { AD1_XIX; wr16( addr1, m_X ); }
	232	OP(D7) { AD1_XIX; wr16( addr1, m_Y ); }
	233	OP(D8) { AD2_YIY; m_BA = rd16( addr2 ); }
	234	OP(D9) { AD2_YIY; m_HL = rd16( addr2 ); }
	235	OP(DA) { AD2_YIY; m_X = rd16( addr2 ); }
	236	OP(DB) { AD2_YIY; m_Y = rd16( addr2 ); }
	237	OP(DC) { AD1_YIY; wr16( addr1, m_BA ); }
	238	OP(DD) { AD1_YIY; wr16( addr1, m_HL ); }
	239	OP(DE) { AD1_YIY; wr16( addr1, m_X ); }
	240	OP(DF) { AD1_YIY; wr16( addr1, m_Y ); }
241	241
242		OP(E0) { minx->BA = minx->BA; }
243		OP(E1) { minx->BA = minx->HL; }
244		OP(E2) { minx->BA = minx->X; }
245		OP(E3) { minx->BA = minx->Y; }
246		OP(E4) { minx->HL = minx->BA; }
247		OP(E5) { minx->HL = minx->HL; }
248		OP(E6) { minx->HL = minx->X; }
249		OP(E7) { minx->HL = minx->Y; }
250		OP(E8) { minx->X = minx->BA; }
251		OP(E9) { minx->X = minx->HL; }
252		OP(EA) { minx->X = minx->X; }
253		OP(EB) { minx->X = minx->Y; }
254		OP(EC) { minx->Y = minx->BA; }
255		OP(ED) { minx->Y = minx->HL; }
256		OP(EE) { minx->Y = minx->X; }
257		OP(EF) { minx->Y = minx->Y; }
	242	OP(E0) { m_BA = m_BA; }
	243	OP(E1) { m_BA = m_HL; }
	244	OP(E2) { m_BA = m_X; }
	245	OP(E3) { m_BA = m_Y; }
	246	OP(E4) { m_HL = m_BA; }
	247	OP(E5) { m_HL = m_HL; }
	248	OP(E6) { m_HL = m_X; }
	249	OP(E7) { m_HL = m_Y; }
	250	OP(E8) { m_X = m_BA; }
	251	OP(E9) { m_X = m_HL; }
	252	OP(EA) { m_X = m_X; }
	253	OP(EB) { m_X = m_Y; }
	254	OP(EC) { m_Y = m_BA; }
	255	OP(ED) { m_Y = m_HL; }
	256	OP(EE) { m_Y = m_X; }
	257	OP(EF) { m_Y = m_Y; }
258	258
259		OP(F0) { minx->SP = minx->BA; }
260		OP(F1) { minx->SP = minx->HL; }
261		OP(F2) { minx->SP = minx->X; }
262		OP(F3) { minx->SP = minx->Y; }
263		OP(F4) { minx->HL = minx->SP; }
264		OP(F5) { minx->HL = minx->PC; }
	259	OP(F0) { m_SP = m_BA; }
	260	OP(F1) { m_SP = m_HL; }
	261	OP(F2) { m_SP = m_X; }
	262	OP(F3) { m_SP = m_Y; }
	263	OP(F4) { m_HL = m_SP; }
	264	OP(F5) { m_HL = m_PC; }
265	265	OP(F6) { /* illegal instruction? */ }
266	266	OP(F7) { /* illegal instruction? */ }
267		OP(F8) { minx->BA = minx->SP; }
268		OP(F9) { minx->BA = minx->PC; }
269		OP(FA) { minx->X = minx->SP; }
	267	OP(F8) { m_BA = m_SP; }
	268	OP(F9) { m_BA = m_PC; }
	269	OP(FA) { m_X = m_SP; }
270	270	OP(FB) { /* illegal instruction? */ }
271	271	OP(FC) { /* illegal instruction? */ }
272	272	OP(FD) { /* illegal instruction? */ }
273		OP(FE) { minx->Y = minx->SP; }
	273	OP(FE) { m_Y = m_SP; }
274	274	OP(FF) { /* illegal instruction? */ }
275	275
276		static void (*const insnminx_CF[256])(minx_state *minx) = {
277		minx_CF_00, minx_CF_01, minx_CF_02, minx_CF_03, minx_CF_04, minx_CF_05, minx_CF_06, minx_CF_07,
278		minx_CF_08, minx_CF_09, minx_CF_0A, minx_CF_0B, minx_CF_0C, minx_CF_0D, minx_CF_0E, minx_CF_0F,
279		minx_CF_10, minx_CF_11, minx_CF_12, minx_CF_13, minx_CF_14, minx_CF_15, minx_CF_16, minx_CF_17,
280		minx_CF_18, minx_CF_19, minx_CF_1A, minx_CF_1B, minx_CF_1C, minx_CF_1D, minx_CF_1E, minx_CF_1F,
281		minx_CF_20, minx_CF_21, minx_CF_22, minx_CF_23, minx_CF_24, minx_CF_25, minx_CF_26, minx_CF_27,
282		minx_CF_28, minx_CF_29, minx_CF_2A, minx_CF_2B, minx_CF_2C, minx_CF_2D, minx_CF_2E, minx_CF_2F,
283		minx_CF_30, minx_CF_31, minx_CF_32, minx_CF_33, minx_CF_34, minx_CF_35, minx_CF_36, minx_CF_37,
284		minx_CF_38, minx_CF_39, minx_CF_3A, minx_CF_3B, minx_CF_3C, minx_CF_3D, minx_CF_3E, minx_CF_3F,
285		minx_CF_40, minx_CF_41, minx_CF_42, minx_CF_43, minx_CF_44, minx_CF_45, minx_CF_46, minx_CF_47,
286		minx_CF_48, minx_CF_49, minx_CF_4A, minx_CF_4B, minx_CF_4C, minx_CF_4D, minx_CF_4E, minx_CF_4F,
287		minx_CF_50, minx_CF_51, minx_CF_52, minx_CF_53, minx_CF_54, minx_CF_55, minx_CF_56, minx_CF_57,
288		minx_CF_58, minx_CF_59, minx_CF_5A, minx_CF_5B, minx_CF_5C, minx_CF_5D, minx_CF_5E, minx_CF_5F,
289		minx_CF_60, minx_CF_61, minx_CF_62, minx_CF_63, minx_CF_64, minx_CF_65, minx_CF_66, minx_CF_67,
290		minx_CF_68, minx_CF_69, minx_CF_6A, minx_CF_6B, minx_CF_6C, minx_CF_6D, minx_CF_6E, minx_CF_6F,
291		minx_CF_70, minx_CF_71, minx_CF_72, minx_CF_73, minx_CF_74, minx_CF_75, minx_CF_76, minx_CF_77,
292		minx_CF_78, minx_CF_79, minx_CF_7A, minx_CF_7B, minx_CF_7C, minx_CF_7D, minx_CF_7E, minx_CF_7F,
293		minx_CF_80, minx_CF_81, minx_CF_82, minx_CF_83, minx_CF_84, minx_CF_85, minx_CF_86, minx_CF_87,
294		minx_CF_88, minx_CF_89, minx_CF_8A, minx_CF_8B, minx_CF_8C, minx_CF_8D, minx_CF_8E, minx_CF_8F,
295		minx_CF_90, minx_CF_91, minx_CF_92, minx_CF_93, minx_CF_94, minx_CF_95, minx_CF_96, minx_CF_97,
296		minx_CF_98, minx_CF_99, minx_CF_9A, minx_CF_9B, minx_CF_9C, minx_CF_9D, minx_CF_9E, minx_CF_9F,
297		minx_CF_A0, minx_CF_A1, minx_CF_A2, minx_CF_A3, minx_CF_A4, minx_CF_A5, minx_CF_A6, minx_CF_A7,
298		minx_CF_A8, minx_CF_A9, minx_CF_AA, minx_CF_AB, minx_CF_AC, minx_CF_AD, minx_CF_AE, minx_CF_AF,
299		minx_CF_B0, minx_CF_B1, minx_CF_B2, minx_CF_B3, minx_CF_B4, minx_CF_B5, minx_CF_B6, minx_CF_B7,
300		minx_CF_B8, minx_CF_B9, minx_CF_BA, minx_CF_BB, minx_CF_BC, minx_CF_BD, minx_CF_BE, minx_CF_BF,
301		minx_CF_C0, minx_CF_C1, minx_CF_C2, minx_CF_C3, minx_CF_C4, minx_CF_C5, minx_CF_C6, minx_CF_C7,
302		minx_CF_C8, minx_CF_C9, minx_CF_CA, minx_CF_CB, minx_CF_CC, minx_CF_CD, minx_CF_CE, minx_CF_CF,
303		minx_CF_D0, minx_CF_D1, minx_CF_D2, minx_CF_D3, minx_CF_D4, minx_CF_D5, minx_CF_D6, minx_CF_D7,
304		minx_CF_D8, minx_CF_D9, minx_CF_DA, minx_CF_DB, minx_CF_DC, minx_CF_DD, minx_CF_DE, minx_CF_DF,
305		minx_CF_E0, minx_CF_E1, minx_CF_E2, minx_CF_E3, minx_CF_E4, minx_CF_E5, minx_CF_E6, minx_CF_E7,
306		minx_CF_E8, minx_CF_E9, minx_CF_EA, minx_CF_EB, minx_CF_EC, minx_CF_ED, minx_CF_EE, minx_CF_EF,
307		minx_CF_F0, minx_CF_F1, minx_CF_F2, minx_CF_F3, minx_CF_F4, minx_CF_F5, minx_CF_F6, minx_CF_F7,
308		minx_CF_F8, minx_CF_F9, minx_CF_FA, minx_CF_FB, minx_CF_FC, minx_CF_FD, minx_CF_FE, minx_CF_FF
	276	const minx_cpu_device::op_func minx_cpu_device::insnminx_CF[256] = {
	277	&minx_cpu_device::minx_CF_00, &minx_cpu_device::minx_CF_01, &minx_cpu_device::minx_CF_02, &minx_cpu_device::minx_CF_03, &minx_cpu_device::minx_CF_04, &minx_cpu_device::minx_CF_05, &minx_cpu_device::minx_CF_06, &minx_cpu_device::minx_CF_07,
	278	&minx_cpu_device::minx_CF_08, &minx_cpu_device::minx_CF_09, &minx_cpu_device::minx_CF_0A, &minx_cpu_device::minx_CF_0B, &minx_cpu_device::minx_CF_0C, &minx_cpu_device::minx_CF_0D, &minx_cpu_device::minx_CF_0E, &minx_cpu_device::minx_CF_0F,
	279	&minx_cpu_device::minx_CF_10, &minx_cpu_device::minx_CF_11, &minx_cpu_device::minx_CF_12, &minx_cpu_device::minx_CF_13, &minx_cpu_device::minx_CF_14, &minx_cpu_device::minx_CF_15, &minx_cpu_device::minx_CF_16, &minx_cpu_device::minx_CF_17,
	280	&minx_cpu_device::minx_CF_18, &minx_cpu_device::minx_CF_19, &minx_cpu_device::minx_CF_1A, &minx_cpu_device::minx_CF_1B, &minx_cpu_device::minx_CF_1C, &minx_cpu_device::minx_CF_1D, &minx_cpu_device::minx_CF_1E, &minx_cpu_device::minx_CF_1F,
	281	&minx_cpu_device::minx_CF_20, &minx_cpu_device::minx_CF_21, &minx_cpu_device::minx_CF_22, &minx_cpu_device::minx_CF_23, &minx_cpu_device::minx_CF_24, &minx_cpu_device::minx_CF_25, &minx_cpu_device::minx_CF_26, &minx_cpu_device::minx_CF_27,
	282	&minx_cpu_device::minx_CF_28, &minx_cpu_device::minx_CF_29, &minx_cpu_device::minx_CF_2A, &minx_cpu_device::minx_CF_2B, &minx_cpu_device::minx_CF_2C, &minx_cpu_device::minx_CF_2D, &minx_cpu_device::minx_CF_2E, &minx_cpu_device::minx_CF_2F,
	283	&minx_cpu_device::minx_CF_30, &minx_cpu_device::minx_CF_31, &minx_cpu_device::minx_CF_32, &minx_cpu_device::minx_CF_33, &minx_cpu_device::minx_CF_34, &minx_cpu_device::minx_CF_35, &minx_cpu_device::minx_CF_36, &minx_cpu_device::minx_CF_37,
	284	&minx_cpu_device::minx_CF_38, &minx_cpu_device::minx_CF_39, &minx_cpu_device::minx_CF_3A, &minx_cpu_device::minx_CF_3B, &minx_cpu_device::minx_CF_3C, &minx_cpu_device::minx_CF_3D, &minx_cpu_device::minx_CF_3E, &minx_cpu_device::minx_CF_3F,
	285	&minx_cpu_device::minx_CF_40, &minx_cpu_device::minx_CF_41, &minx_cpu_device::minx_CF_42, &minx_cpu_device::minx_CF_43, &minx_cpu_device::minx_CF_44, &minx_cpu_device::minx_CF_45, &minx_cpu_device::minx_CF_46, &minx_cpu_device::minx_CF_47,
	286	&minx_cpu_device::minx_CF_48, &minx_cpu_device::minx_CF_49, &minx_cpu_device::minx_CF_4A, &minx_cpu_device::minx_CF_4B, &minx_cpu_device::minx_CF_4C, &minx_cpu_device::minx_CF_4D, &minx_cpu_device::minx_CF_4E, &minx_cpu_device::minx_CF_4F,
	287	&minx_cpu_device::minx_CF_50, &minx_cpu_device::minx_CF_51, &minx_cpu_device::minx_CF_52, &minx_cpu_device::minx_CF_53, &minx_cpu_device::minx_CF_54, &minx_cpu_device::minx_CF_55, &minx_cpu_device::minx_CF_56, &minx_cpu_device::minx_CF_57,
	288	&minx_cpu_device::minx_CF_58, &minx_cpu_device::minx_CF_59, &minx_cpu_device::minx_CF_5A, &minx_cpu_device::minx_CF_5B, &minx_cpu_device::minx_CF_5C, &minx_cpu_device::minx_CF_5D, &minx_cpu_device::minx_CF_5E, &minx_cpu_device::minx_CF_5F,
	289	&minx_cpu_device::minx_CF_60, &minx_cpu_device::minx_CF_61, &minx_cpu_device::minx_CF_62, &minx_cpu_device::minx_CF_63, &minx_cpu_device::minx_CF_64, &minx_cpu_device::minx_CF_65, &minx_cpu_device::minx_CF_66, &minx_cpu_device::minx_CF_67,
	290	&minx_cpu_device::minx_CF_68, &minx_cpu_device::minx_CF_69, &minx_cpu_device::minx_CF_6A, &minx_cpu_device::minx_CF_6B, &minx_cpu_device::minx_CF_6C, &minx_cpu_device::minx_CF_6D, &minx_cpu_device::minx_CF_6E, &minx_cpu_device::minx_CF_6F,
	291	&minx_cpu_device::minx_CF_70, &minx_cpu_device::minx_CF_71, &minx_cpu_device::minx_CF_72, &minx_cpu_device::minx_CF_73, &minx_cpu_device::minx_CF_74, &minx_cpu_device::minx_CF_75, &minx_cpu_device::minx_CF_76, &minx_cpu_device::minx_CF_77,
	292	&minx_cpu_device::minx_CF_78, &minx_cpu_device::minx_CF_79, &minx_cpu_device::minx_CF_7A, &minx_cpu_device::minx_CF_7B, &minx_cpu_device::minx_CF_7C, &minx_cpu_device::minx_CF_7D, &minx_cpu_device::minx_CF_7E, &minx_cpu_device::minx_CF_7F,
	293	&minx_cpu_device::minx_CF_80, &minx_cpu_device::minx_CF_81, &minx_cpu_device::minx_CF_82, &minx_cpu_device::minx_CF_83, &minx_cpu_device::minx_CF_84, &minx_cpu_device::minx_CF_85, &minx_cpu_device::minx_CF_86, &minx_cpu_device::minx_CF_87,
	294	&minx_cpu_device::minx_CF_88, &minx_cpu_device::minx_CF_89, &minx_cpu_device::minx_CF_8A, &minx_cpu_device::minx_CF_8B, &minx_cpu_device::minx_CF_8C, &minx_cpu_device::minx_CF_8D, &minx_cpu_device::minx_CF_8E, &minx_cpu_device::minx_CF_8F,
	295	&minx_cpu_device::minx_CF_90, &minx_cpu_device::minx_CF_91, &minx_cpu_device::minx_CF_92, &minx_cpu_device::minx_CF_93, &minx_cpu_device::minx_CF_94, &minx_cpu_device::minx_CF_95, &minx_cpu_device::minx_CF_96, &minx_cpu_device::minx_CF_97,
	296	&minx_cpu_device::minx_CF_98, &minx_cpu_device::minx_CF_99, &minx_cpu_device::minx_CF_9A, &minx_cpu_device::minx_CF_9B, &minx_cpu_device::minx_CF_9C, &minx_cpu_device::minx_CF_9D, &minx_cpu_device::minx_CF_9E, &minx_cpu_device::minx_CF_9F,
	297	&minx_cpu_device::minx_CF_A0, &minx_cpu_device::minx_CF_A1, &minx_cpu_device::minx_CF_A2, &minx_cpu_device::minx_CF_A3, &minx_cpu_device::minx_CF_A4, &minx_cpu_device::minx_CF_A5, &minx_cpu_device::minx_CF_A6, &minx_cpu_device::minx_CF_A7,
	298	&minx_cpu_device::minx_CF_A8, &minx_cpu_device::minx_CF_A9, &minx_cpu_device::minx_CF_AA, &minx_cpu_device::minx_CF_AB, &minx_cpu_device::minx_CF_AC, &minx_cpu_device::minx_CF_AD, &minx_cpu_device::minx_CF_AE, &minx_cpu_device::minx_CF_AF,
	299	&minx_cpu_device::minx_CF_B0, &minx_cpu_device::minx_CF_B1, &minx_cpu_device::minx_CF_B2, &minx_cpu_device::minx_CF_B3, &minx_cpu_device::minx_CF_B4, &minx_cpu_device::minx_CF_B5, &minx_cpu_device::minx_CF_B6, &minx_cpu_device::minx_CF_B7,
	300	&minx_cpu_device::minx_CF_B8, &minx_cpu_device::minx_CF_B9, &minx_cpu_device::minx_CF_BA, &minx_cpu_device::minx_CF_BB, &minx_cpu_device::minx_CF_BC, &minx_cpu_device::minx_CF_BD, &minx_cpu_device::minx_CF_BE, &minx_cpu_device::minx_CF_BF,
	301	&minx_cpu_device::minx_CF_C0, &minx_cpu_device::minx_CF_C1, &minx_cpu_device::minx_CF_C2, &minx_cpu_device::minx_CF_C3, &minx_cpu_device::minx_CF_C4, &minx_cpu_device::minx_CF_C5, &minx_cpu_device::minx_CF_C6, &minx_cpu_device::minx_CF_C7,
	302	&minx_cpu_device::minx_CF_C8, &minx_cpu_device::minx_CF_C9, &minx_cpu_device::minx_CF_CA, &minx_cpu_device::minx_CF_CB, &minx_cpu_device::minx_CF_CC, &minx_cpu_device::minx_CF_CD, &minx_cpu_device::minx_CF_CE, &minx_cpu_device::minx_CF_CF,
	303	&minx_cpu_device::minx_CF_D0, &minx_cpu_device::minx_CF_D1, &minx_cpu_device::minx_CF_D2, &minx_cpu_device::minx_CF_D3, &minx_cpu_device::minx_CF_D4, &minx_cpu_device::minx_CF_D5, &minx_cpu_device::minx_CF_D6, &minx_cpu_device::minx_CF_D7,
	304	&minx_cpu_device::minx_CF_D8, &minx_cpu_device::minx_CF_D9, &minx_cpu_device::minx_CF_DA, &minx_cpu_device::minx_CF_DB, &minx_cpu_device::minx_CF_DC, &minx_cpu_device::minx_CF_DD, &minx_cpu_device::minx_CF_DE, &minx_cpu_device::minx_CF_DF,
	305	&minx_cpu_device::minx_CF_E0, &minx_cpu_device::minx_CF_E1, &minx_cpu_device::minx_CF_E2, &minx_cpu_device::minx_CF_E3, &minx_cpu_device::minx_CF_E4, &minx_cpu_device::minx_CF_E5, &minx_cpu_device::minx_CF_E6, &minx_cpu_device::minx_CF_E7,
	306	&minx_cpu_device::minx_CF_E8, &minx_cpu_device::minx_CF_E9, &minx_cpu_device::minx_CF_EA, &minx_cpu_device::minx_CF_EB, &minx_cpu_device::minx_CF_EC, &minx_cpu_device::minx_CF_ED, &minx_cpu_device::minx_CF_EE, &minx_cpu_device::minx_CF_EF,
	307	&minx_cpu_device::minx_CF_F0, &minx_cpu_device::minx_CF_F1, &minx_cpu_device::minx_CF_F2, &minx_cpu_device::minx_CF_F3, &minx_cpu_device::minx_CF_F4, &minx_cpu_device::minx_CF_F5, &minx_cpu_device::minx_CF_F6, &minx_cpu_device::minx_CF_F7,
	308	&minx_cpu_device::minx_CF_F8, &minx_cpu_device::minx_CF_F9, &minx_cpu_device::minx_CF_FA, &minx_cpu_device::minx_CF_FB, &minx_cpu_device::minx_CF_FC, &minx_cpu_device::minx_CF_FD, &minx_cpu_device::minx_CF_FE, &minx_cpu_device::minx_CF_FF
309	309	};
310	310
311		static const int insnminx_cycles_CF[256] = {
	311	const int minx_cpu_device::insnminx_cycles_CF[256] = {
312	312	16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
313		1,  1,  1,  1,  1,  1,  1,  1, 16, 16, 16, 16,  1,  1,  1,  1,
	313	1,  1,  1,  1,  1,  1,  1,  1, 16, 16, 16, 16,  1,  1,  1,  1,
314	314	16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
315		1,  1,  1,  1,  1,  1,  1,  1, 16, 16, 16, 16,  1,  1,  1,  1,
	315	1,  1,  1,  1,  1,  1,  1,  1, 16, 16, 16, 16,  1,  1,  1,  1,
316	316
317	317	16, 16, 16, 16, 16, 16,  1,  1, 16, 16, 16, 16, 16, 16,  1,  1,
318		1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1, 16, 16,  1,  1,
	318	1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1, 16, 16,  1,  1,
319	319	16, 16, 16, 16,  1,  1,  1,  1, 16,  1, 16,  1, 16,  1, 16,  1,
320	320	24, 24, 24, 24, 24, 24, 24, 24, 24,  1,  1,  1, 24,  1,  1,  1,
321	321
322		1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,
323		1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,
324		1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,
	322	1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,
	323	1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,
	324	1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,
325	325	12, 12, 12, 12, 12, 12, 12, 12, 48, 60,  1,  1, 32, 40,  1,  1,
326	326
327	327	20, 20, 20, 20, 20, 20, 20, 20,  1,  1,  1,  1,  1,  1,  1,  1,
328	328	20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20,
329		8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,
330		8,  8,  8,  8,  8,  8,  1,  1,  8,  8,  8,  1,  1,  1,  8,  1
	329	8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,  8,
	330	8,  8,  8,  8,  8,  8,  1,  1,  8,  8,  8,  1,  1,  1,  8,  1
331	331	};

trunk/src/emu/cpu/minx/minx.c

r24599	r24600
65	65	#define EXEC_01 0x01
66	66
67	67
68		struct minx_state {
69		//  MINX_CONFIG  config;
70		UINT16  PC;
71		UINT16  SP;
72		UINT16  BA;
73		UINT16  HL;
74		UINT16  X;
75		UINT16  Y;
76		UINT8   U;
77		UINT8   V;
78		UINT8   F;
79		UINT8   E;
80		UINT8   N;
81		UINT8   I;
82		UINT8   XI;
83		UINT8   YI;
84		UINT8   halted;
85		UINT8   interrupt_pending;
86		device_irq_acknowledge_callback irq_callback;
87		legacy_cpu_device *device;
88		address_space *program;
89		int icount;
90		};
	68	#define RD(offset)      m_program->read_byte( offset )
	69	#define WR(offset,data) m_program->write_byte( offset, data )
	70	#define GET_MINX_PC     ( ( m_PC & 0x8000 ) ? ( m_V << 15 ) | (m_PC & 0x7FFF ) : m_PC )
91	71
92		#define RD(offset)      minx->program->read_byte( offset )
93		#define WR(offset,data) minx->program->write_byte( offset, data )
94		#define GET_MINX_PC     ( ( minx->PC & 0x8000 ) ? ( minx->V << 15 ) | (minx->PC & 0x7FFF ) : minx->PC )
95	72
96		INLINE minx_state *get_safe_token(device_t *device)
97		{
98		assert(device != NULL);
99		assert(device->type() == MINX);
	73	const device_type MINX = &device_creator<minx_cpu_device>;
100	74
101		return (minx_state *)downcast<legacy_cpu_device *>(device)->token();
	75
	76	minx_cpu_device::minx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	77	: cpu_device(mconfig, MINX, "Nintendo Minx", tag, owner, clock, "minx", __FILE__)
	78	, m_program_config("program", ENDIANNESS_BIG, 8, 24, 0)
	79	{
102	80	}
103	81
104		INLINE UINT16 rd16( minx_state *minx, UINT32 offset )
	82
	83	UINT16 minx_cpu_device::rd16( UINT32 offset )
105	84	{
106	85	return RD( offset ) | ( RD( offset + 1 ) << 8 );
107	86	}
108	87
109	88
110		INLINE void wr16( minx_state *minx, UINT32 offset, UINT16 data )
	89	void minx_cpu_device::wr16( UINT32 offset, UINT16 data )
111	90	{
112	91	WR( offset, ( data & 0x00FF ) );
113	92	WR( offset + 1, ( data >> 8 ) );
114	93	}
115	94
116	95
117		static CPU_INIT( minx )
	96	void minx_cpu_device::device_start()
118	97	{
119		minx_state *minx = get_safe_token(device);
120		minx->irq_callback = irqcallback;
121		minx->device = device;
122		minx->program = &device->space(AS_PROGRAM);
123		if ( device->static_config() != NULL )
124		{
125		}
126		else
127		{
128		}
	98	m_program = &space(AS_PROGRAM);
	99
	100	state_add( MINX_PC, "PC", m_PC ).formatstr("%04X");
	101	state_add( MINX_SP, "SP", m_SP ).formatstr("%04X");
	102	state_add( MINX_BA, "BA", m_BA ).formatstr("%04X");
	103	state_add( MINX_HL, "HL", m_HL ).formatstr("%04X");
	104	state_add( MINX_X,  "X", m_X ).formatstr("%04X");
	105	state_add( MINX_Y,  "Y", m_Y ).formatstr("%04X");
	106	state_add( MINX_U,  "U", m_U ).formatstr("%02X");
	107	state_add( MINX_V,  "V", m_V ).formatstr("%02X");
	108	state_add( MINX_F,  "F", m_F ).formatstr("%02X");
	109	state_add( MINX_E,  "E", m_E ).formatstr("%02X");
	110	state_add( MINX_N,  "N", m_N ).formatstr("%02X");
	111	state_add( MINX_I,  "I", m_I ).formatstr("%02X");
	112	state_add( MINX_XI, "XI", m_XI ).formatstr("%02X");
	113	state_add( MINX_YI, "YI", m_YI ).formatstr("%02X");
	114
	115	state_add(STATE_GENPC, "curpc", m_curpc).formatstr("%06X").noshow();
	116	state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).formatstr("%14s").noshow();
	117
	118	m_icountptr = &m_icount;
129	119	}
130	120
131	121
132		static CPU_RESET( minx )
	122	void minx_cpu_device::state_string_export(const device_state_entry &entry, astring &string)
133	123	{
134		minx_state *minx = get_safe_token(device);
135		minx->SP = minx->BA = minx->HL = minx->X = minx->Y = 0;
136		minx->U = minx->V = minx->F = minx->E = minx->I = minx->XI = minx->YI = 0;
137		minx->halted = minx->interrupt_pending = 0;
138
139		minx->PC = rd16( minx, 0 );
	124	switch (entry.index())
	125	{
	126	case STATE_GENFLAGS:
	127	string.printf( "%c%c%c%c%c%c%c%c-%c%c%c%c%c",
	128	m_F & FLAG_I ? 'I' : '.',
	129	m_F & FLAG_D ? 'D' : '.',
	130	m_F & FLAG_L ? 'L' : '.',
	131	m_F & FLAG_B ? 'B' : '.',
	132	m_F & FLAG_S ? 'S' : '.',
	133	m_F & FLAG_O ? 'O' : '.',
	134	m_F & FLAG_C ? 'C' : '.',
	135	m_F & FLAG_Z ? 'Z' : '.',
	136	m_E & EXEC_X0 ? '0' : '.',
	137	m_E & EXEC_X1 ? '1' : '.',
	138	m_E & EXEC_X2 ? '2' : '.',
	139	m_E & EXEC_DZ ? 'z' : '.',
	140	m_E & EXEC_EN ? 'E' : '.' );
	141	break;
	142	}
140	143	}
141	144
142	145
143		static CPU_EXIT( minx )
	146	void minx_cpu_device::device_reset()
144	147	{
	148	m_SP = m_BA = m_HL = m_X = m_Y = 0;
	149	m_U = m_V = m_F = m_E = m_I = m_XI = m_YI = 0;
	150	m_halted = m_interrupt_pending = 0;
	151
	152	m_PC = rd16( 0 );
145	153	}
146	154
147	155
148		INLINE UINT8 rdop( minx_state *minx )
	156	UINT8 minx_cpu_device::rdop()
149	157	{
150	158	UINT8 op = RD( GET_MINX_PC );
151		minx->PC++;
	159	m_PC++;
152	160	return op;
153	161	}
154	162
155	163
156		INLINE UINT16 rdop16( minx_state *minx )
	164	UINT16 minx_cpu_device::rdop16()
157	165	{
158		UINT16 op = rdop(minx);
159		op = op | ( rdop(minx) << 8 );
	166	UINT16 op = rdop();
	167	op = op | ( rdop() << 8 );
160	168	return op;
161	169	}
162	170
r24599	r24600
167	175	#include "minxops.h"
168	176
169	177
170		static CPU_EXECUTE( minx )
	178	void minx_cpu_device::execute_run()
171	179	{
172	180	//  UINT32  oldpc;
173	181	UINT8   op;
174		minx_state *minx = get_safe_token(device);
175	182
176	183	do
177	184	{
178		debugger_instruction_hook(device, GET_MINX_PC);
	185	m_curpc = GET_MINX_PC;
	186	debugger_instruction_hook(this, m_curpc);
179	187	//      oldpc = GET_MINX_PC;
180	188
181		if ( minx->interrupt_pending )
	189	if ( m_interrupt_pending )
182	190	{
183		minx->halted = 0;
184		if ( ! ( minx->F & 0xc0 ) && minx->U == minx->V )
	191	m_halted = 0;
	192	if ( ! ( m_F & 0xc0 ) && m_U == m_V )
185	193	{
186	194	//logerror("minx_execute(): taking IRQ\n");
187		PUSH8( minx, minx->V );
188		PUSH16( minx, minx->PC );
189		PUSH8( minx, minx->F );
	195	PUSH8( m_V );
	196	PUSH16( m_PC );
	197	PUSH8( m_F );
190	198
191	199	/* Set Interrupt Branch flag */
192		minx->F |= 0x80;
193		minx->V = 0;
194		minx->PC = rd16( minx, minx->irq_callback( minx->device, 0 ) << 1 );
195		minx->icount -= 28;     /* This cycle count is a guess */
	200	m_F |= 0x80;
	201	m_V = 0;
	202	m_PC = rd16( standard_irq_callback( 0 ) << 1 );
	203	m_icount -= 28;     /* This cycle count is a guess */
196	204	}
197	205	}
198	206
199		if ( minx->halted )
	207	if ( m_halted )
200	208	{
201		minx->icount -= insnminx_cycles_CE[0xAE];
	209	m_icount -= insnminx_cycles_CE[0xAE];
202	210	}
203	211	else
204	212	{
205		op = rdop(minx);
206		insnminx[op](minx);
207		minx->icount -= insnminx_cycles[op];
	213	op = rdop();
	214	(this->*insnminx[op])();
	215	m_icount -= insnminx_cycles[op];
208	216	}
209		} while ( minx->icount > 0 );
	217	} while ( m_icount > 0 );
210	218	}
211	219
212	220
213		static CPU_BURN( minx )
	221	void minx_cpu_device::execute_set_input(int inputnum, int state)
214	222	{
215		minx_state *minx = get_safe_token(device);
216		minx->icount = 0;
217		}
218
219
220		static unsigned minx_get_reg( minx_state *minx, int regnum )
221		{
222		switch( regnum )
223		{
224		case STATE_GENPC:   return GET_MINX_PC;
225		case MINX_PC:   return minx->PC;
226		case STATE_GENSP:
227		case MINX_SP:   return minx->SP;
228		case MINX_BA:   return minx->BA;
229		case MINX_HL:   return minx->HL;
230		case MINX_X:    return minx->X;
231		case MINX_Y:    return minx->Y;
232		case MINX_U:    return minx->U;
233		case MINX_V:    return minx->V;
234		case MINX_F:    return minx->F;
235		case MINX_E:    return minx->E;
236		case MINX_N:    return minx->N;
237		case MINX_I:    return minx->I;
238		case MINX_XI:   return minx->XI;
239		case MINX_YI:   return minx->YI;
240		}
241		return 0;
242		}
243
244
245		static void minx_set_reg( minx_state *minx, int regnum, unsigned val )
246		{
247		switch( regnum )
248		{
249		case STATE_GENPC:   break;
250		case MINX_PC:   minx->PC = val; break;
251		case STATE_GENSP:
252		case MINX_SP:   minx->SP = val; break;
253		case MINX_BA:   minx->BA = val; break;
254		case MINX_HL:   minx->HL = val; break;
255		case MINX_X:    minx->X = val; break;
256		case MINX_Y:    minx->Y = val; break;
257		case MINX_U:    minx->U = val; break;
258		case MINX_V:    minx->V = val; break;
259		case MINX_F:    minx->F = val; break;
260		case MINX_E:    minx->E = val; break;
261		case MINX_N:    minx->N = val; break;
262		case MINX_I:    minx->I = val; break;
263		case MINX_XI:   minx->XI = val; break;
264		case MINX_YI:   minx->YI = val; break;
265		}
266		}
267
268
269		static void minx_set_irq_line( minx_state *minx, int irqline, int state )
270		{
271	223	if ( state == ASSERT_LINE )
272	224	{
273		minx->interrupt_pending = 1;
	225	m_interrupt_pending = 1;
274	226	}
275	227	else
276	228	{
277		minx->interrupt_pending = 0;
	229	m_interrupt_pending = 0;
278	230	}
279	231	}
280	232
281	233
282		static CPU_SET_INFO( minx )
	234	offs_t minx_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
283	235	{
284		minx_state *minx = get_safe_token(device);
285		switch( state )
286		{
287		case CPUINFO_INT_INPUT_STATE + 0:
288		minx_set_irq_line( minx, state - CPUINFO_INT_INPUT_STATE, info->i ); break;
289
290		case CPUINFO_INT_REGISTER + MINX_PC:
291		case CPUINFO_INT_REGISTER + MINX_SP:
292		case CPUINFO_INT_REGISTER + MINX_BA:
293		case CPUINFO_INT_REGISTER + MINX_HL:
294		case CPUINFO_INT_REGISTER + MINX_X:
295		case CPUINFO_INT_REGISTER + MINX_Y:
296		case CPUINFO_INT_REGISTER + MINX_U:
297		case CPUINFO_INT_REGISTER + MINX_V:
298		case CPUINFO_INT_REGISTER + MINX_F:
299		case CPUINFO_INT_REGISTER + MINX_E:
300		case CPUINFO_INT_REGISTER + MINX_N:
301		case CPUINFO_INT_REGISTER + MINX_I:
302		case CPUINFO_INT_REGISTER + MINX_XI:
303		case CPUINFO_INT_REGISTER + MINX_YI:
304		minx_set_reg( minx, state - CPUINFO_INT_REGISTER, info->i ); break;
305		}
	236	extern CPU_DISASSEMBLE( minx );
	237	return CPU_DISASSEMBLE_NAME(minx)(this, buffer, pc, oprom, opram, options);
306	238	}
307	239
308
309		CPU_GET_INFO( minx )
310		{
311		minx_state *minx = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
312		switch( state )
313		{
314		case CPUINFO_INT_CONTEXT_SIZE:                              info->i = sizeof(minx_state); break;
315		case CPUINFO_INT_INPUT_LINES:                               info->i = 1; break;
316		case CPUINFO_INT_DEFAULT_IRQ_VECTOR:                        info->i = 0x00; break;
317		case CPUINFO_INT_ENDIANNESS:                                info->i = ENDIANNESS_BIG; break;
318		case CPUINFO_INT_CLOCK_MULTIPLIER:                          info->i = 1; break;
319		case CPUINFO_INT_CLOCK_DIVIDER:                             info->i = 1; break;
320		case CPUINFO_INT_MIN_INSTRUCTION_BYTES:                     info->i = 1; break;
321		case CPUINFO_INT_MAX_INSTRUCTION_BYTES:                     info->i = 5; break;
322		case CPUINFO_INT_MIN_CYCLES:                                info->i = 1; break;
323		case CPUINFO_INT_MAX_CYCLES:                                info->i = 4; break;
324		case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:        info->i = 8; break;
325		case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM:        info->i = 24; break;
326		case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM:        info->i = 0; break;
327		case CPUINFO_INT_DATABUS_WIDTH + AS_DATA:       info->i = 0; break;
328		case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA:       info->i = 0; break;
329		case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA:       info->i = 0; break;
330		case CPUINFO_INT_DATABUS_WIDTH + AS_IO:         info->i = 0; break;
331		case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO:         info->i = 0; break;
332		case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO:         info->i = 0; break;
333		case CPUINFO_INT_INPUT_STATE + 0:                           info->i = 0; break;
334		case CPUINFO_INT_REGISTER + STATE_GENPC:                            info->i = GET_MINX_PC; break;
335		case CPUINFO_INT_REGISTER + STATE_GENSP:
336		case CPUINFO_INT_REGISTER + MINX_PC:
337		case CPUINFO_INT_REGISTER + MINX_SP:
338		case CPUINFO_INT_REGISTER + MINX_BA:
339		case CPUINFO_INT_REGISTER + MINX_HL:
340		case CPUINFO_INT_REGISTER + MINX_X:
341		case CPUINFO_INT_REGISTER + MINX_Y:
342		case CPUINFO_INT_REGISTER + MINX_U:
343		case CPUINFO_INT_REGISTER + MINX_V:
344		case CPUINFO_INT_REGISTER + MINX_F:
345		case CPUINFO_INT_REGISTER + MINX_E:
346		case CPUINFO_INT_REGISTER + MINX_N:
347		case CPUINFO_INT_REGISTER + MINX_I:
348		case CPUINFO_INT_REGISTER + MINX_XI:
349		case CPUINFO_INT_REGISTER + MINX_YI:                        info->i = minx_get_reg( minx, state - CPUINFO_INT_REGISTER ); break;
350		case CPUINFO_INT_PREVIOUSPC:                                info->i = 0x0000; break;
351		case CPUINFO_FCT_SET_INFO:                                  info->setinfo = CPU_SET_INFO_NAME(minx); break;
352		case CPUINFO_FCT_INIT:                                      info->init = CPU_INIT_NAME(minx); break;
353		case CPUINFO_FCT_RESET:                                     info->reset = CPU_RESET_NAME(minx); break;
354		case CPUINFO_FCT_EXIT:                                      info->exit = CPU_EXIT_NAME(minx); break;
355		case CPUINFO_FCT_EXECUTE:                                   info->execute = CPU_EXECUTE_NAME(minx); break;
356		case CPUINFO_FCT_BURN:                                      info->burn = CPU_BURN_NAME(minx); break;
357		case CPUINFO_FCT_DISASSEMBLE:                               info->disassemble = CPU_DISASSEMBLE_NAME(minx); break;
358		case CPUINFO_PTR_INSTRUCTION_COUNTER:                       info->icount = &minx->icount; break;
359		case CPUINFO_STR_NAME:                                      strcpy( info->s, "Minx" ); break;
360		case CPUINFO_STR_FAMILY:                                strcpy( info->s, "Nintendo Minx" ); break;
361		case CPUINFO_STR_VERSION:                               strcpy( info->s, "0.1" ); break;
362		case CPUINFO_STR_SOURCE_FILE:                                   strcpy( info->s, __FILE__ ); break;
363		case CPUINFO_STR_CREDITS:                               strcpy( info->s, "Copyright The MESS Team." ); break;
364		case CPUINFO_STR_FLAGS:
365		sprintf( info->s, "%c%c%c%c%c%c%c%c-%c%c%c%c%c",
366		minx->F & FLAG_I ? 'I' : '.',
367		minx->F & FLAG_D ? 'D' : '.',
368		minx->F & FLAG_L ? 'L' : '.',
369		minx->F & FLAG_B ? 'B' : '.',
370		minx->F & FLAG_S ? 'S' : '.',
371		minx->F & FLAG_O ? 'O' : '.',
372		minx->F & FLAG_C ? 'C' : '.',
373		minx->F & FLAG_Z ? 'Z' : '.',
374		minx->E & EXEC_X0 ? '0' : '.',
375		minx->E & EXEC_X1 ? '1' : '.',
376		minx->E & EXEC_X2 ? '2' : '.',
377		minx->E & EXEC_DZ ? 'z' : '.',
378		minx->E & EXEC_EN ? 'E' : '.' );
379		break;
380		case CPUINFO_STR_REGISTER + MINX_PC:                        sprintf( info->s, "PC:%04X", minx->PC ); break;
381		case CPUINFO_STR_REGISTER + MINX_SP:                        sprintf( info->s, "SP:%04X", minx->SP ); break;
382		case CPUINFO_STR_REGISTER + MINX_BA:                        sprintf( info->s, "BA:%04X", minx->BA ); break;
383		case CPUINFO_STR_REGISTER + MINX_HL:                        sprintf( info->s, "HL:%04X", minx->HL ); break;
384		case CPUINFO_STR_REGISTER + MINX_X:                         sprintf( info->s, "X:%04X", minx->X ); break;
385		case CPUINFO_STR_REGISTER + MINX_Y:                         sprintf( info->s, "Y:%04X", minx->Y ); break;
386		case CPUINFO_STR_REGISTER + MINX_U:                         sprintf( info->s, "U:%02X", minx->U ); break;
387		case CPUINFO_STR_REGISTER + MINX_V:                         sprintf( info->s, "V:%02X", minx->V ); break;
388		case CPUINFO_STR_REGISTER + MINX_F:                         sprintf( info->s, "F:%02X", minx->F ); break;
389		case CPUINFO_STR_REGISTER + MINX_E:                         sprintf( info->s, "E:%02X", minx->E ); break;
390		case CPUINFO_STR_REGISTER + MINX_N:                         sprintf( info->s, "N:%02X", minx->N ); break;
391		case CPUINFO_STR_REGISTER + MINX_I:                         sprintf( info->s, "I:%02X", minx->I ); break;
392		case CPUINFO_STR_REGISTER + MINX_XI:                        sprintf( info->s, "XI:%02X", minx->XI ); break;
393		case CPUINFO_STR_REGISTER + MINX_YI:                        sprintf( info->s, "YI:%02X", minx->YI ); break;
394		}
395		}
396
397		DEFINE_LEGACY_CPU_DEVICE(MINX, minx);

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