trunk/src/mess/drivers/applix.c
| r24570 | r24571 | |
| 53 | 53 | public: |
| 54 | 54 | applix_state(const machine_config &mconfig, device_type type, const char *tag) |
| 55 | 55 | : driver_device(mconfig, type, tag), |
| 56 | m_base(*this, "base"), |
| 56 | 57 | m_maincpu(*this, "maincpu"), |
| 57 | 58 | m_crtc(*this, "crtc"), |
| 58 | 59 | m_via(*this, "via6522"), |
| 59 | 60 | m_centronics(*this, "centronics"), |
| 60 | | m_fdc(*this, "wd1772"), |
| 61 | | m_floppy0(*this, "wd1772:0"), |
| 62 | | m_floppy1(*this, "wd1772:1"), |
| 61 | m_fdc(*this, "fdc"), |
| 62 | m_floppy0(*this, "fdc:0"), |
| 63 | m_floppy1(*this, "fdc:1"), |
| 63 | 64 | m_dacl(*this, "dacl"), |
| 64 | 65 | m_dacr(*this, "dacr"), |
| 65 | 66 | m_cass(*this, "cassette"), |
| r24570 | r24571 | |
| 87 | 88 | m_io_k3a0(*this, "K3a_0"), |
| 88 | 89 | m_io_k3b0(*this, "K3b_0"), |
| 89 | 90 | m_io_k0b(*this, "K0b"), |
| 90 | | m_base(*this, "base"), |
| 91 | 91 | m_expansion(*this, "expansion"){ } |
| 92 | 92 | |
| 93 | 93 | DECLARE_READ16_MEMBER(applix_inputs_r); |
| 94 | | DECLARE_WRITE16_MEMBER(applix_index_w); |
| 95 | | DECLARE_WRITE16_MEMBER(applix_register_w); |
| 96 | 94 | DECLARE_WRITE16_MEMBER(palette_w); |
| 97 | 95 | DECLARE_WRITE16_MEMBER(analog_latch_w); |
| 98 | 96 | DECLARE_WRITE16_MEMBER(dac_latch_w); |
| r24570 | r24571 | |
| 136 | 134 | virtual void video_start(); |
| 137 | 135 | virtual void palette_init(); |
| 138 | 136 | UINT8 m_palette_latch[4]; |
| 137 | required_shared_ptr<UINT16> m_base; |
| 138 | private: |
| 139 | UINT8 m_pb; |
| 140 | UINT8 m_analog_latch; |
| 141 | UINT8 m_dac_latch; |
| 142 | UINT8 m_port08; |
| 143 | UINT8 m_data_to_fdc; |
| 144 | UINT8 m_data_from_fdc; |
| 145 | bool m_data; |
| 146 | bool m_data_or_cmd; |
| 147 | bool m_buffer_empty; |
| 148 | bool m_fdc_cmd; |
| 149 | UINT8 m_clock_count; |
| 150 | bool m_cp; |
| 151 | UINT8 m_p1; |
| 152 | UINT8 m_p1_data; |
| 153 | UINT8 m_p2; |
| 154 | UINT8 m_p3; |
| 155 | UINT16 m_last_write_addr; |
| 156 | UINT8 m_cass_data[4]; |
| 139 | 157 | required_device<cpu_device> m_maincpu; |
| 140 | 158 | required_device<mc6845_device> m_crtc; |
| 141 | 159 | required_device<via6522_device> m_via; |
| r24570 | r24571 | |
| 170 | 188 | required_ioport m_io_k3a0; |
| 171 | 189 | required_ioport m_io_k3b0; |
| 172 | 190 | required_ioport m_io_k0b; |
| 173 | | required_shared_ptr<UINT16> m_base; |
| 174 | 191 | required_shared_ptr<UINT16> m_expansion; |
| 175 | | private: |
| 176 | | void fdc_intrq_w(bool state); |
| 177 | | void fdc_drq_w(bool state); |
| 178 | | UINT8 m_pb; |
| 179 | | UINT8 m_analog_latch; |
| 180 | | UINT8 m_dac_latch; |
| 181 | | UINT8 m_port08; |
| 182 | | UINT8 m_data_to_fdc; |
| 183 | | UINT8 m_data_from_fdc; |
| 184 | | bool m_data; |
| 185 | | bool m_data_or_cmd; |
| 186 | | bool m_buffer_empty; |
| 187 | | bool m_fdc_cmd; |
| 188 | | UINT8 m_clock_count; |
| 189 | | bool m_cp; |
| 190 | | UINT8 m_p1; |
| 191 | | UINT8 m_p1_data; |
| 192 | | UINT8 m_p2; |
| 193 | | UINT8 m_p3; |
| 194 | | UINT16 m_last_write_addr; |
| 195 | | UINT8 m_cass_data[4]; |
| 196 | 192 | }; |
| 197 | 193 | |
| 198 | 194 | /* |
| r24570 | r24571 | |
| 241 | 237 | m_video_latch = data; |
| 242 | 238 | } |
| 243 | 239 | |
| 244 | | WRITE16_MEMBER( applix_state::applix_index_w ) |
| 245 | | { |
| 246 | | data >>= 8; |
| 247 | | m_crtc->address_w( space, offset, data ); |
| 248 | | } |
| 249 | | |
| 250 | | WRITE16_MEMBER( applix_state::applix_register_w ) |
| 251 | | { |
| 252 | | data >>= 8; |
| 253 | | m_crtc->register_w( space, offset, data ); |
| 254 | | } |
| 255 | | |
| 256 | 240 | /* |
| 257 | 241 | d0 = dac output + external signal = analog input |
| 258 | 242 | d1 = cassette in |
| r24570 | r24571 | |
| 459 | 443 | //AM_RANGE(0x700000, 0x700007) z80-scc (ch b control, ch b data, ch a control, ch a data) on even addresses |
| 460 | 444 | AM_RANGE(0x700080, 0x7000ff) AM_READ(applix_inputs_r) |
| 461 | 445 | AM_RANGE(0x700100, 0x70011f) AM_MIRROR(0x60) AM_DEVREADWRITE8("via6522", via6522_device, read, write, 0xff00) |
| 462 | | AM_RANGE(0x700180, 0x700181) AM_MIRROR(0x7c) AM_WRITE(applix_index_w) |
| 463 | | AM_RANGE(0x700182, 0x700183) AM_MIRROR(0x7c) AM_WRITE(applix_register_w) |
| 446 | AM_RANGE(0x700180, 0x700181) AM_MIRROR(0x7c) AM_DEVREADWRITE8("crtc", mc6845_device, status_r, address_w, 0xff00) |
| 447 | AM_RANGE(0x700182, 0x700183) AM_MIRROR(0x7c) AM_DEVREADWRITE8("crtc", mc6845_device, register_r, register_w, 0xff00) |
| 464 | 448 | AM_RANGE(0xffffc0, 0xffffc1) AM_READWRITE(fdc_data_r,fdc_data_w) |
| 465 | 449 | //AM_RANGE(0xffffc2, 0xffffc3) AM_READWRITE(fdc_int_r,fdc_int_w) // optional |
| 466 | 450 | AM_RANGE(0xffffc8, 0xffffcd) AM_READ(fdc_stat_r) |
| r24570 | r24571 | |
| 484 | 468 | AM_RANGE(0x10, 0x17) AM_READWRITE(port10_r,port10_w) //IRQ |
| 485 | 469 | AM_RANGE(0x18, 0x1f) AM_READWRITE(port18_r,port18_w) //data&command |
| 486 | 470 | AM_RANGE(0x20, 0x27) AM_MIRROR(0x18) AM_READWRITE(port20_r,port20_w) //SCSI NCR5380 |
| 487 | | AM_RANGE(0x40, 0x43) AM_MIRROR(0x1c) AM_DEVREADWRITE("wd1772", wd1772_t, read, write) //FDC |
| 471 | AM_RANGE(0x40, 0x43) AM_MIRROR(0x1c) AM_DEVREADWRITE("fdc", wd1772_t, read, write) //FDC |
| 488 | 472 | AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_READWRITE(port60_r,port60_w) //anotherZ80SCC |
| 489 | 473 | ADDRESS_MAP_END |
| 490 | 474 | |
| r24570 | r24571 | |
| 795 | 779 | |
| 796 | 780 | for (x = 0; x < x_count; x++) |
| 797 | 781 | { |
| 782 | mem = vidbase + ma + x + (ra<<12); |
| 783 | chr = state->m_base[mem]; |
| 784 | |
| 798 | 785 | if (BIT(state->m_pa, 3)) |
| 799 | 786 | // 640 x 200 x 4of16 mode |
| 800 | 787 | { |
| 801 | | mem = vidbase + ma + x + (ra<<12); |
| 802 | | chr = state->m_base[mem]; |
| 803 | 788 | for (i = 0; i < 8; i++) |
| 804 | 789 | { |
| 805 | 790 | *p++ = palette[state->m_palette_latch[chr>>14]]; |
| r24570 | r24571 | |
| 809 | 794 | else |
| 810 | 795 | // 320 x 200 x 16 mode |
| 811 | 796 | { |
| 812 | | mem = vidbase + ma + x + (ra<<12); |
| 813 | | chr = state->m_base[mem]; |
| 814 | 797 | for (i = 0; i < 4; i++) |
| 815 | 798 | { |
| 816 | 799 | *p++ = palette[chr>>12]; |
| r24570 | r24571 | |
| 924 | 907 | MCFG_VIA6522_ADD("via6522", 0, applix_via) |
| 925 | 908 | MCFG_CENTRONICS_PRINTER_ADD("centronics", applix_centronics_config) |
| 926 | 909 | MCFG_CASSETTE_ADD("cassette", applix_cassette_interface) |
| 927 | | MCFG_WD1772x_ADD("wd1772", XTAL_16MHz / 2) //connected to Z80H clock pin |
| 928 | | MCFG_FLOPPY_DRIVE_ADD("wd1772:0", applix_floppies, "35dd", applix_state::floppy_formats) |
| 929 | | MCFG_FLOPPY_DRIVE_ADD("wd1772:1", applix_floppies, "35dd", applix_state::floppy_formats) |
| 910 | MCFG_WD1772x_ADD("fdc", XTAL_16MHz / 2) //connected to Z80H clock pin |
| 911 | MCFG_FLOPPY_DRIVE_ADD("fdc:0", applix_floppies, "35dd", applix_state::floppy_formats) |
| 912 | MCFG_FLOPPY_DRIVE_ADD("fdc:1", applix_floppies, "35dd", applix_state::floppy_formats) |
| 930 | 913 | MCFG_TIMER_DRIVER_ADD_PERIODIC("applix_c", applix_state, cass_timer, attotime::from_hz(100000)) |
| 931 | 914 | MACHINE_CONFIG_END |
| 932 | 915 | |
| r24570 | r24571 | |
| 953 | 936 | |
| 954 | 937 | DRIVER_INIT_MEMBER(applix_state, applix) |
| 955 | 938 | { |
| 956 | | floppy_connector *con = machine().device<floppy_connector>("wd1772:0"); |
| 957 | | floppy_image_device *floppy = con ? con->get_device() : 0; |
| 958 | | if (floppy) |
| 959 | | { |
| 960 | | m_fdc->set_floppy(floppy); |
| 961 | | //m_fdc->setup_intrq_cb(wd1772_t::line_cb(FUNC(applix_state::fdc_intrq_w), this)); |
| 962 | | //m_fdc->setup_drq_cb(wd1772_t::line_cb(FUNC(applix_state::fdc_drq_w), this)); |
| 963 | | |
| 964 | | floppy->ss_w(0); |
| 965 | | } |
| 966 | | |
| 967 | 939 | UINT8 *RAM = memregion("subcpu")->base(); |
| 968 | 940 | membank("bank1")->configure_entries(0, 2, &RAM[0x8000], 0x8000); |
| 969 | 941 | } |