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r24081 Friday 5th July, 2013 at 03:01:42 UTC by Tafoid
Converted the tmp68301 to a device.  [Osso]
[src/emu/machine]tmp68301.c tmp68301.h
[src/mame/drivers]csplayh5.c realbrk.c seta2.c
[src/mame/includes]realbrk.h seta2.h

trunk/src/mame/includes/realbrk.h
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1#include "machine/tmp68301.h"
2
13class realbrk_state : public driver_device
24{
35public:
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1214      m_backup_ram(*this, "backup_ram"),
1315      m_vram_0ras(*this, "vram_0ras"),
1416      m_vram_1ras(*this, "vram_1ras"),
15      m_maincpu(*this, "maincpu") { }
17      m_maincpu(*this, "maincpu"),
18      m_tmp68301(*this, "tmp68301") { }
1619
1720   required_shared_ptr<UINT16> m_spriteram;
1821   required_shared_ptr<UINT16> m_vram_0;
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5154   void draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect);
5255   void dai2kaku_draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect, int layer);
5356   required_device<cpu_device> m_maincpu;
57   required_device<tmp68301_device> m_tmp68301;
5458};
trunk/src/mame/includes/seta2.h
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11#include "sound/okim9810.h"
22#include "machine/eeprom.h"
33#include "sound/x1_010.h"
4#include "machine/tmp68301.h"
45
56class seta2_state : public driver_device
67{
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89   seta2_state(const machine_config &mconfig, device_type type, const char *tag)
910      : driver_device(mconfig, type, tag),
1011         m_maincpu(*this,"maincpu"),
12         m_tmp68301(*this, "tmp68301"),
1113         m_nvram(*this, "nvram") ,
1214      m_spriteram(*this, "spriteram", 0),
1315      m_vregs(*this, "vregs", 0),
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1820      m_eeprom(*this, "eeprom"){ }
1921
2022   required_device<cpu_device> m_maincpu;
23   optional_device<tmp68301_device> m_tmp68301;
2124   optional_shared_ptr<UINT16> m_nvram;
2225
2326   optional_shared_ptr<UINT16> m_spriteram;
trunk/src/mame/drivers/csplayh5.c
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3131public:
3232   csplayh5_state(const machine_config &mconfig, device_type type, const char *tag)
3333      : driver_device(mconfig, type, tag),
34      m_maincpu(*this,"maincpu"),
35      m_v9958(*this,"v9958"),
34      m_maincpu(*this, "maincpu"),
35      m_tmp68301(*this, "tmp68301"),
36      m_v9958(*this, "v9958"),
3637      m_dac1(*this, "dac1"),
3738      m_dac2(*this, "dac2")
3839      { }
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4243   UINT8 m_pio_latch[5];
4344
4445   required_device<cpu_device> m_maincpu;
46   required_device<tmp68301_device> m_tmp68301;
4547   required_device<v9958_device> m_v9958;
4648   DECLARE_READ16_MEMBER(csplayh5_mux_r);
4749   DECLARE_WRITE16_MEMBER(csplayh5_mux_w);
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144146
145147   AM_RANGE(0xc00000, 0xc7ffff) AM_RAM AM_SHARE("nvram") AM_MIRROR(0x380000) // work RAM
146148
147   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)  // TMP68301 Registers
149   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)  // TMP68301 Registers
148150ADDRESS_MAP_END
149151
150152#if USE_H8
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629631   MCFG_CPU_ADD("maincpu",M68000,16000000) /* TMP68301-16 */
630632   MCFG_CPU_PROGRAM_MAP(csplayh5_map)
631633   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", csplayh5_state, csplayh5_irq, "screen", 0, 1)
634   
635   MCFG_TMP68301_ADD("tmp68301")
632636
633637#if USE_H8
634638   MCFG_CPU_ADD("subcpu", H83002, 16000000)    /* unknown clock */
trunk/src/mame/drivers/seta2.c
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109109#include "emu.h"
110110#include "includes/seta2.h"
111111#include "cpu/m68000/m68000.h"
112#include "machine/tmp68301.h"
113112#include "cpu/h83002/h8.h"
114113#include "sound/okim9810.h"
115114#include "machine/eeprom.h"
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173172   AM_RANGE(0xc50000, 0xc5ffff) AM_RAM                             // cleared
174173   AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")  // Video Registers
175174   AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w)       // Samples Banks
176   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)  // TMP68301 Registers
175   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)  // TMP68301 Registers
177176ADDRESS_MAP_END
178177
179178/***************************************************************************
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212211   AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")  // Video Registers
213212   AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w)       // Samples Banks
214213   AM_RANGE(0xfffd0a, 0xfffd0b) AM_READWRITE(gundamex_eeprom_r,gundamex_eeprom_w)  // parallel data register
215   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)  // TMP68301 Registers
214   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)  // TMP68301 Registers
216215ADDRESS_MAP_END
217216
218217
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268267   AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_SHARE("spriteram")   // Sprites
269268   AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")    // Palette
270269   AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")  // Video Registers
271   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)  // TMP68301 Registers
270   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)  // TMP68301 Registers
272271ADDRESS_MAP_END
273272
274273
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291290   AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_SHARE("spriteram")       // Sprites
292291   AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")    // Palette
293292   AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")              // Video Registers
294   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
293   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)      // TMP68301 Registers
295294ADDRESS_MAP_END
296295
297296
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314313   AM_RANGE(0xd00000, 0xd3ffff) AM_RAM AM_SHARE("spriteram")       // Sprites
315314   AM_RANGE(0xd40000, 0xd4ffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")    // Palette
316315   AM_RANGE(0xd60000, 0xd6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")          // Video Registers
317   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
316   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)      // TMP68301 Registers
318317ADDRESS_MAP_END
319318
320319
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359358   AM_RANGE(0x840000, 0x84ffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")    // Palette
360359   AM_RANGE(0x860000, 0x86003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")              // Video Registers
361360   AM_RANGE(0x900000, 0x903fff) AM_DEVREADWRITE("x1snd", x1_010_device, word_r, word_w)   // Sound
362   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
361   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)      // TMP68301 Registers
363362ADDRESS_MAP_END
364363
365364
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385384   AM_RANGE(0xb40000, 0xb4ffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")    // Palette
386385   AM_RANGE(0xb60000, 0xb6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")
387386   AM_RANGE(0xa00000, 0xa03fff) AM_DEVREADWRITE("x1snd", x1_010_device, word_r, word_w)   // Sound
388   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
387   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)      // TMP68301 Registers
389388ADDRESS_MAP_END
390389
391390
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444443   AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")    // Palette
445444   AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")              // Video Registers
446445   AM_RANGE(0xfffd0a, 0xfffd0b) AM_WRITE(reelquak_leds_w )     // parallel data register (leds)
447   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
446   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)      // TMP68301 Registers
448447ADDRESS_MAP_END
449448
450449
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458457   AM_RANGE(0x200000, 0x20ffff) AM_RAM                             // RAM
459458   AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_SHARE("spriteram")       // Sprites
460459   AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs")  // Video Registers
461   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)  // TMP68301 Registers
460   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)  // TMP68301 Registers
462461ADDRESS_MAP_END
463462
464463
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504503   AM_RANGE( 0x900000, 0x903fff ) AM_DEVREADWRITE("x1snd", x1_010_device, word_r, word_w)   // Sound
505504
506505   AM_RANGE( 0xfffd0a, 0xfffd0b ) AM_READ_PORT("DSW2")             // parallel data register (DSW 2)
507   AM_RANGE( 0xfffc00, 0xffffff ) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)    // TMP68301 Registers
506   AM_RANGE( 0xfffc00, 0xffffff ) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)    // TMP68301 Registers
508507ADDRESS_MAP_END
509508
510509
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19781977INTERRUPT_GEN_MEMBER(seta2_state::seta2_interrupt)
19791978{
19801979   /* VBlank is connected to INT0 (external interrupts pin 0) */
1981   tmp68301_external_interrupt_0(machine());
1980   m_tmp68301->external_interrupt_0();
19821981}
19831982
19841983INTERRUPT_GEN_MEMBER(seta2_state::samshoot_interrupt)
19851984{
1986   tmp68301_external_interrupt_2(machine());   // to do: hook up x1-10 interrupts
1985   m_tmp68301->external_interrupt_2();   // to do: hook up x1-10 interrupts
19871986}
19881987
19891988static const x1_010_interface x1_010_sound_intf =
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19961995   MCFG_CPU_PROGRAM_MAP(mj4simai_map)
19971996   MCFG_CPU_VBLANK_INT_DRIVER("screen", seta2_state,  seta2_interrupt)
19981997
1999   MCFG_MACHINE_START( tmp68301 )
2000   MCFG_MACHINE_RESET( tmp68301 )
1998   MCFG_TMP68301_ADD("tmp68301")
1999   
20012000
20022001   // video hardware
20032002   MCFG_SCREEN_ADD("screen", RASTER)
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22412240   MCFG_CPU_PROGRAM_MAP(namcostr_map)
22422241   MCFG_CPU_VBLANK_INT_DRIVER("screen", seta2_state,  seta2_interrupt)
22432242
2244   MCFG_MACHINE_START( tmp68301 )
2245   MCFG_MACHINE_RESET( tmp68301 )
2243   MCFG_TMP68301_ADD("tmp68301")
2244   
22462245
22472246   // video hardware
22482247   MCFG_SCREEN_ADD("screen", RASTER)
trunk/src/mame/drivers/realbrk.c
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4343
4444#include "emu.h"
4545#include "cpu/m68000/m68000.h"
46#include "machine/tmp68301.h"
4746#include "includes/realbrk.h"
4847#include "sound/2413intf.h"
4948#include "sound/ymz280b.h"
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163162   AM_RANGE(0x605000, 0x61ffff) AM_RAM                                         //
164163   AM_RANGE(0x800000, 0x800003) AM_DEVREADWRITE8("ymz", ymz280b_device, read, write, 0xff00)   // YMZ280
165164   AM_RANGE(0xfe0000, 0xfeffff) AM_RAM                                         // RAM
166   AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE_LEGACY(tmp68301_regs_r, tmp68301_regs_w)  // TMP68301 Registers
165   AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w)  // TMP68301 Registers
167166ADDRESS_MAP_END
168167
169168/*realbrk specific memory map*/
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749748INTERRUPT_GEN_MEMBER(realbrk_state::realbrk_interrupt)
750749{
751750   /* VBlank is connected to INT1 (external interrupts pin 1) */
752   tmp68301_external_interrupt_1(machine());
751   m_tmp68301->external_interrupt_1();
753752}
754753
755754static MACHINE_CONFIG_START( realbrk, realbrk_state )
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759758   MCFG_CPU_PROGRAM_MAP(realbrk_mem)
760759   MCFG_CPU_VBLANK_INT_DRIVER("screen", realbrk_state,  realbrk_interrupt)
761760
762   MCFG_MACHINE_START( tmp68301 )
763   MCFG_MACHINE_RESET( tmp68301 )
764
761   MCFG_TMP68301_ADD("tmp68301")
762   
765763   /* video hardware */
766764   MCFG_SCREEN_ADD("screen", RASTER)
767765   MCFG_SCREEN_REFRESH_RATE(60)
trunk/src/emu/machine/tmp68301.c
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1111#include "emu.h"
1212#include "machine/tmp68301.h"
1313
14static UINT16 tmp68301_regs[0x400];
14const device_type TMP68301 = &device_creator<tmp68301_device>;
1515
16static UINT8 tmp68301_IE[3];        // 3 External Interrupt Lines
17static emu_timer *tmp68301_timer[3];        // 3 Timers
16tmp68301_device::tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
17   : device_t(mconfig, TMP68301, "TMP68301", tag, owner, clock, "tmp68301", __FILE__)   
18{
19}
1820
19static int tmp68301_irq_vector[8];
21//-------------------------------------------------
22//  device_config_complete - perform any
23//  operations now that the configuration is
24//  complete
25//-------------------------------------------------
2026
21static void tmp68301_update_timer( running_machine &machine, int i );
27void tmp68301_device::device_config_complete()
28{
29}
2230
23static IRQ_CALLBACK(tmp68301_irq_callback)
31//-------------------------------------------------
32//  device_start - device-specific startup
33//-------------------------------------------------
34
35void tmp68301_device::device_start()
2436{
25   int vector = tmp68301_irq_vector[irqline];
37   int i;
38   for (i = 0; i < 3; i++)
39      m_tmp68301_timer[i] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(tmp68301_device::timer_callback), this));
40}
41
42//-------------------------------------------------
43//  device_reset - device-specific reset
44//-------------------------------------------------
45
46void tmp68301_device::device_reset()
47{
48   int i;
49
50   for (i = 0; i < 3; i++)
51      m_IE[i] = 0;
52
53   machine().firstcpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(tmp68301_device::irq_callback),this));   
54}
55
56
57IRQ_CALLBACK_MEMBER(tmp68301_device::irq_callback)
58{
59   int vector = m_irq_vector[irqline];
2660//  logerror("%s: irq callback returns %04X for level %x\n",machine.describe_context(),vector,int_level);
2761   return vector;
2862}
2963
30static TIMER_CALLBACK( tmp68301_timer_callback )
64TIMER_CALLBACK_MEMBER( tmp68301_device::timer_callback )
3165{
3266   int i = param;
33   UINT16 TCR  =   tmp68301_regs[(0x200 + i * 0x20)/2];
34   UINT16 IMR  =   tmp68301_regs[0x94/2];      // Interrupt Mask Register (IMR)
35   UINT16 ICR  =   tmp68301_regs[0x8e/2+i];    // Interrupt Controller Register (ICR7..9)
36   UINT16 IVNR =   tmp68301_regs[0x9a/2];      // Interrupt Vector Number Register (IVNR)
67   UINT16 TCR  =   m_regs[(0x200 + i * 0x20)/2];
68   UINT16 IMR  =   m_regs[0x94/2];      // Interrupt Mask Register (IMR)
69   UINT16 ICR  =   m_regs[0x8e/2+i];    // Interrupt Controller Register (ICR7..9)
70   UINT16 IVNR =   m_regs[0x9a/2];      // Interrupt Vector Number Register (IVNR)
3771
3872//  logerror("s: callback timer %04X, j = %d\n",machine.describe_context(),i,tcount);
3973
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4478      int level = ICR & 0x0007;
4579
4680      // Interrupt Vector Number Register (IVNR)
47      tmp68301_irq_vector[level]  =   IVNR & 0x00e0;
48      tmp68301_irq_vector[level]  +=  4+i;
81      m_irq_vector[level]  =   IVNR & 0x00e0;
82      m_irq_vector[level]  +=  4+i;
4983
50      machine.firstcpu->set_input_line(level,HOLD_LINE);
84      machine().firstcpu->set_input_line(level,HOLD_LINE);
5185   }
5286
5387   if (TCR & 0x0080)   // N/1
5488   {
5589      // Repeat
56      tmp68301_update_timer(machine, i);
90      update_timer(i);
5791   }
5892   else
5993   {
r24080r24081
6195   }
6296}
6397
64static void tmp68301_update_timer( running_machine &machine, int i )
98void tmp68301_device::update_timer( int i )
6599{
66   UINT16 TCR  =   tmp68301_regs[(0x200 + i * 0x20)/2];
67   UINT16 MAX1 =   tmp68301_regs[(0x204 + i * 0x20)/2];
68   UINT16 MAX2 =   tmp68301_regs[(0x206 + i * 0x20)/2];
100   UINT16 TCR  =   m_regs[(0x200 + i * 0x20)/2];
101   UINT16 MAX1 =   m_regs[(0x204 + i * 0x20)/2];
102   UINT16 MAX2 =   m_regs[(0x206 + i * 0x20)/2];
69103
70104   int max = 0;
71105   attotime duration = attotime::zero;
72106
73   tmp68301_timer[i]->adjust(attotime::never,i);
107   m_tmp68301_timer[i]->adjust(attotime::never,i);
74108
75109   // timers 1&2 only
76110   switch( (TCR & 0x0030)>>4 )                     // MR2..1
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90124      {
91125         int scale = (TCR & 0x3c00)>>10;         // P4..1
92126         if (scale > 8) scale = 8;
93         duration = attotime::from_hz(machine.firstcpu->unscaled_clock()) * ((1 << scale) * max);
127         duration = attotime::from_hz(machine().firstcpu->unscaled_clock()) * ((1 << scale) * max);
94128      }
95129      break;
96130   }
97131
98//  logerror("%s: TMP68301 Timer %d, duration %lf, max %04X\n",machine.describe_context(),i,duration,max);
132//  logerror("%s: TMP68301 Timer %d, duration %lf, max %04X\n",machine().describe_context(),i,duration,max);
99133
100134   if (!(TCR & 0x0002))                // CS
101135   {
102136      if (duration != attotime::zero)
103         tmp68301_timer[i]->adjust(duration,i);
137         m_tmp68301_timer[i]->adjust(duration,i);
104138      else
105         logerror("%s: TMP68301 error, timer %d duration is 0\n",machine.describe_context(),i);
139         logerror("%s: TMP68301 error, timer %d duration is 0\n",machine().describe_context(),i);
106140   }
107141}
108142
109MACHINE_START( tmp68301 )
110{
111   int i;
112   for (i = 0; i < 3; i++)
113      tmp68301_timer[i] = machine.scheduler().timer_alloc(FUNC(tmp68301_timer_callback));
114}
115
116MACHINE_RESET( tmp68301 )
117{
118   int i;
119
120   for (i = 0; i < 3; i++)
121      tmp68301_IE[i] = 0;
122
123   machine.firstcpu->set_irq_acknowledge_callback(tmp68301_irq_callback);
124}
125
126143/* Update the IRQ state based on all possible causes */
127static void update_irq_state(running_machine &machine)
144void tmp68301_device::update_irq_state()
128145{
129146   int i;
130147
131148   /* Take care of external interrupts */
132149
133   UINT16 IMR  =   tmp68301_regs[0x94/2];      // Interrupt Mask Register (IMR)
134   UINT16 IVNR =   tmp68301_regs[0x9a/2];      // Interrupt Vector Number Register (IVNR)
150   UINT16 IMR  =   m_regs[0x94/2];      // Interrupt Mask Register (IMR)
151   UINT16 IVNR =   m_regs[0x9a/2];      // Interrupt Vector Number Register (IVNR)
135152
136153   for (i = 0; i < 3; i++)
137154   {
138      if  (   (tmp68301_IE[i]) &&
155      if  (   (m_IE[i]) &&
139156            !(IMR & (1<<i))
140157         )
141158      {
142         UINT16 ICR  =   tmp68301_regs[0x80/2+i];    // Interrupt Controller Register (ICR0..2)
159         UINT16 ICR  =   m_regs[0x80/2+i];    // Interrupt Controller Register (ICR0..2)
143160
144161         // Interrupt Controller Register (ICR0..2)
145162         int level = ICR & 0x0007;
146163
147164         // Interrupt Vector Number Register (IVNR)
148         tmp68301_irq_vector[level]  =   IVNR & 0x00e0;
149         tmp68301_irq_vector[level]  +=  i;
165         m_irq_vector[level]  =   IVNR & 0x00e0;
166         m_irq_vector[level]  +=  i;
150167
151         tmp68301_IE[i] = 0;     // Interrupts are edge triggerred
168         m_IE[i] = 0;     // Interrupts are edge triggerred
152169
153         machine.firstcpu->set_input_line(level,HOLD_LINE);
170         machine().firstcpu->set_input_line(level,HOLD_LINE);
154171      }
155172   }
156173}
157174
158READ16_HANDLER( tmp68301_regs_r )
175READ16_MEMBER( tmp68301_device::regs_r )
159176{
160   return tmp68301_regs[offset];
177   return m_regs[offset];
161178}
162179
163WRITE16_HANDLER( tmp68301_regs_w )
180WRITE16_MEMBER( tmp68301_device::regs_w )
164181{
165   COMBINE_DATA(&tmp68301_regs[offset]);
182   COMBINE_DATA(&m_regs[offset]);
166183
167184   if (!ACCESSING_BITS_0_7)    return;
168185
r24080r24081
177194      {
178195         int i = ((offset*2) >> 5) & 3;
179196
180         tmp68301_update_timer( space.machine(), i );
197         update_timer( i );
181198      }
182199      break;
183200   }
184201}
185202
186void tmp68301_external_interrupt_0(running_machine &machine)    { tmp68301_IE[0] = 1;   update_irq_state(machine); }
187void tmp68301_external_interrupt_1(running_machine &machine)    { tmp68301_IE[1] = 1;   update_irq_state(machine); }
188void tmp68301_external_interrupt_2(running_machine &machine)    { tmp68301_IE[2] = 1;   update_irq_state(machine); }
203void tmp68301_device::external_interrupt_0()    { m_IE[0] = 1;   update_irq_state(); }
204void tmp68301_device::external_interrupt_1()    { m_IE[1] = 1;   update_irq_state(); }
205void tmp68301_device::external_interrupt_2()    { m_IE[2] = 1;   update_irq_state(); }
trunk/src/emu/machine/tmp68301.h
r24080r24081
11#ifndef TMP68301_H
22#define TMP68301_H
33
4// Machine init
5MACHINE_START( tmp68301 );
6MACHINE_RESET( tmp68301 );
4class tmp68301_device : public device_t
5{
6public:
7   tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
8   ~tmp68301_device() {}
79
8// Hardware Registers
9DECLARE_READ16_HANDLER( tmp68301_regs_r );
10DECLARE_WRITE16_HANDLER( tmp68301_regs_w );
10   // Hardware Registers
11   DECLARE_READ16_MEMBER( regs_r );
12   DECLARE_WRITE16_MEMBER( regs_w );
1113
12// Interrupts
13void tmp68301_external_interrupt_0(running_machine &machine);
14void tmp68301_external_interrupt_1(running_machine &machine);
15void tmp68301_external_interrupt_2(running_machine &machine);
14   // Interrupts
15   void external_interrupt_0();
16   void external_interrupt_1();
17   void external_interrupt_2();
1618
19protected:
20   // device-level overrides
21   virtual void device_config_complete();
22   virtual void device_start();
23   virtual void device_reset();
24   
25private:
26   // internal state
27   UINT16 m_regs[0x400];
28
29   UINT8 m_IE[3];        // 3 External Interrupt Lines
30   emu_timer *m_tmp68301_timer[3];        // 3 Timers
31
32   int m_irq_vector[8];
33   
34   TIMER_CALLBACK_MEMBER( timer_callback );
35   void update_timer( int i );
36   IRQ_CALLBACK_MEMBER(irq_callback);
37   void update_irq_state();
38};
39
40extern const device_type TMP68301;
41
42#define MCFG_TMP68301_ADD(_tag) \
43   MCFG_DEVICE_ADD(_tag, TMP68301, 0)
44
1745#endif

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