trunk/src/mame/includes/tetrisp2.h
| r24076 | r24077 | |
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| 3 | 3 | public: |
| 4 | 4 | tetrisp2_state(const machine_config &mconfig, device_type type, const char *tag) |
| 5 | 5 | : driver_device(mconfig, type, tag), |
| 6 | | m_spriteram(*this, "spriteram"), |
| 7 | | m_spriteram2(*this, "spriteram2") , |
| 6 | m_maincpu(*this, "maincpu"), |
| 7 | m_subcpu(*this, "sub"), |
| 8 | m_spriteram(*this, "spriteram"), |
| 9 | m_spriteram2(*this, "spriteram2"), |
| 8 | 10 | m_vram_fg(*this, "vram_fg"), |
| 9 | 11 | m_vram_bg(*this, "vram_bg"), |
| 10 | 12 | m_vram_rot(*this, "vram_rot"), |
| r24076 | r24077 | |
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| 18 | 20 | m_rocknms_sub_vram_bg(*this, "sub_vram_bg"), |
| 19 | 21 | m_rocknms_sub_scroll_fg(*this, "sub_scroll_fg"), |
| 20 | 22 | m_rocknms_sub_scroll_bg(*this, "sub_scroll_bg"), |
| 21 | | m_rocknms_sub_rotregs(*this, "sub_rotregs"), |
| 22 | | m_maincpu(*this, "maincpu"), |
| 23 | | m_subcpu(*this, "sub") { } |
| 23 | m_rocknms_sub_rotregs(*this, "sub_rotregs") |
| 24 | { } |
| 24 | 25 | |
| 26 | required_device<cpu_device> m_maincpu; |
| 27 | optional_device<cpu_device> m_subcpu; |
| 28 | |
| 25 | 29 | required_shared_ptr<UINT16> m_spriteram; |
| 26 | 30 | optional_shared_ptr<UINT16> m_spriteram2; |
| 27 | 31 | |
| r24076 | r24077 | |
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| 80 | 84 | DECLARE_WRITE16_MEMBER(tetrisp2_nvram_w); |
| 81 | 85 | DECLARE_WRITE16_MEMBER(tetrisp2_palette_w); |
| 82 | 86 | DECLARE_WRITE16_MEMBER(rocknms_sub_palette_w); |
| 83 | | DECLARE_WRITE8_MEMBER(tetrisp2_priority_w); |
| 84 | | DECLARE_WRITE8_MEMBER(rockn_priority_w); |
| 87 | DECLARE_WRITE16_MEMBER(tetrisp2_priority_w); |
| 85 | 88 | DECLARE_WRITE16_MEMBER(rocknms_sub_priority_w); |
| 86 | | DECLARE_READ16_MEMBER(nndmseal_priority_r); |
| 87 | | DECLARE_READ8_MEMBER(tetrisp2_priority_r); |
| 89 | DECLARE_READ16_MEMBER(tetrisp2_priority_r); |
| 88 | 90 | DECLARE_WRITE16_MEMBER(tetrisp2_vram_bg_w); |
| 89 | 91 | DECLARE_WRITE16_MEMBER(tetrisp2_vram_fg_w); |
| 90 | 92 | DECLARE_WRITE16_MEMBER(tetrisp2_vram_rot_w); |
| r24076 | r24077 | |
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| 117 | 119 | TIMER_CALLBACK_MEMBER(rockn_timer_level1_callback); |
| 118 | 120 | TIMER_CALLBACK_MEMBER(rockn_timer_sub_level1_callback); |
| 119 | 121 | void init_rockn_timer(); |
| 120 | | required_device<cpu_device> m_maincpu; |
| 121 | | optional_device<cpu_device> m_subcpu; |
| 122 | 122 | }; |
| 123 | 123 | |
| 124 | 124 | class stepstag_state : public tetrisp2_state |
trunk/src/mame/video/tetrisp2.c
| r24076 | r24077 | |
|---|
| 68 | 68 | |
| 69 | 69 | ***************************************************************************/ |
| 70 | 70 | |
| 71 | | WRITE8_MEMBER(tetrisp2_state::tetrisp2_priority_w) |
| 71 | WRITE16_MEMBER(tetrisp2_state::tetrisp2_priority_w) |
| 72 | 72 | { |
| 73 | | //if (ACCESSING_BITS_8_15) |
| 74 | | { |
| 75 | | data |= ((data & 0xff00) >> 8); |
| 73 | if (ACCESSING_BITS_0_7) |
| 76 | 74 | m_priority[offset] = data; |
| 77 | | } |
| 75 | else |
| 76 | m_priority[offset] = data >> 8; |
| 78 | 77 | } |
| 79 | 78 | |
| 80 | | |
| 81 | | WRITE8_MEMBER(tetrisp2_state::rockn_priority_w) |
| 79 | READ16_MEMBER(tetrisp2_state::tetrisp2_priority_r) |
| 82 | 80 | { |
| 83 | | //if (ACCESSING_BITS_8_15) |
| 84 | | { |
| 85 | | m_priority[offset] = data; |
| 86 | | } |
| 81 | return m_priority[offset] | 0xff00; |
| 87 | 82 | } |
| 88 | 83 | |
| 89 | 84 | WRITE16_MEMBER(tetrisp2_state::rocknms_sub_priority_w) |
| 90 | 85 | { |
| 91 | | if (ACCESSING_BITS_8_15) |
| 92 | | { |
| 86 | if (ACCESSING_BITS_0_7) |
| 93 | 87 | m_rocknms_sub_priority[offset] = data; |
| 94 | | } |
| 88 | else |
| 89 | m_rocknms_sub_priority[offset] = data >> 8; |
| 95 | 90 | } |
| 96 | 91 | |
| 97 | | READ16_MEMBER(tetrisp2_state::nndmseal_priority_r) |
| 98 | | { |
| 99 | | return m_priority[offset] | 0xff00; |
| 100 | | } |
| 101 | 92 | |
| 102 | | READ8_MEMBER(tetrisp2_state::tetrisp2_priority_r) |
| 103 | | { |
| 104 | | return m_priority[offset]; |
| 105 | | } |
| 106 | | |
| 107 | 93 | /*************************************************************************** |
| 108 | 94 | |
| 109 | 95 | |
trunk/src/mame/drivers/tetrisp2.c
| r24076 | r24077 | |
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| 297 | 297 | AM_RANGE(0x100000, 0x103fff) AM_RAM AM_SHARE("spriteram") // Object RAM |
| 298 | 298 | AM_RANGE(0x104000, 0x107fff) AM_RAM // Spare Object RAM |
| 299 | 299 | AM_RANGE(0x108000, 0x10ffff) AM_RAM // Work RAM |
| 300 | | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, tetrisp2_priority_w, 0x00ff) |
| 300 | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(tetrisp2_priority_r, tetrisp2_priority_w) |
| 301 | 301 | AM_RANGE(0x300000, 0x31ffff) AM_RAM_WRITE(tetrisp2_palette_w) AM_SHARE("paletteram") // Palette |
| 302 | 302 | AM_RANGE(0x400000, 0x403fff) AM_RAM_WRITE(tetrisp2_vram_fg_w) AM_SHARE("vram_fg") // Foreground |
| 303 | 303 | AM_RANGE(0x404000, 0x407fff) AM_RAM_WRITE(tetrisp2_vram_bg_w) AM_SHARE("vram_bg") // Background |
| r24076 | r24077 | |
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| 354 | 354 | AM_RANGE(0x100000, 0x103fff) AM_RAM AM_SHARE("spriteram") // Object RAM |
| 355 | 355 | AM_RANGE(0x104000, 0x107fff) AM_RAM // Spare Object RAM |
| 356 | 356 | AM_RANGE(0x108000, 0x10ffff) AM_RAM // Work RAM |
| 357 | | AM_RANGE(0x200000, 0x23ffff) AM_WRITE8(tetrisp2_priority_w, 0x00ff) // Priority |
| 358 | | AM_RANGE(0x200000, 0x23ffff) AM_READ(nndmseal_priority_r) |
| 357 | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(tetrisp2_priority_r, tetrisp2_priority_w) |
| 359 | 358 | AM_RANGE(0x300000, 0x31ffff) AM_RAM_WRITE(tetrisp2_palette_w) AM_SHARE("paletteram") // Palette |
| 360 | 359 | AM_RANGE(0x400000, 0x403fff) AM_RAM_WRITE(tetrisp2_vram_fg_w) AM_SHARE("vram_fg") // Foreground |
| 361 | 360 | AM_RANGE(0x404000, 0x407fff) AM_RAM_WRITE(tetrisp2_vram_bg_w) AM_SHARE("vram_bg") // Background |
| r24076 | r24077 | |
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| 400 | 399 | AM_RANGE(0x100000, 0x103fff) AM_RAM AM_SHARE("spriteram") // Object RAM |
| 401 | 400 | AM_RANGE(0x104000, 0x107fff) AM_RAM // Spare Object RAM |
| 402 | 401 | AM_RANGE(0x108000, 0x10ffff) AM_RAM // Work RAM |
| 403 | | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff) // Priority |
| 402 | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(tetrisp2_priority_r, tetrisp2_priority_w) |
| 404 | 403 | AM_RANGE(0x300000, 0x31ffff) AM_RAM_WRITE(tetrisp2_palette_w) AM_SHARE("paletteram") // Palette |
| 405 | 404 | AM_RANGE(0x400000, 0x403fff) AM_RAM_WRITE(tetrisp2_vram_fg_w) AM_SHARE("vram_fg") // Foreground |
| 406 | 405 | AM_RANGE(0x404000, 0x407fff) AM_RAM_WRITE(tetrisp2_vram_bg_w) AM_SHARE("vram_bg") // Background |
| r24076 | r24077 | |
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| 434 | 433 | AM_RANGE(0x100000, 0x103fff) AM_RAM AM_SHARE("spriteram") // Object RAM |
| 435 | 434 | AM_RANGE(0x104000, 0x107fff) AM_RAM // Spare Object RAM |
| 436 | 435 | AM_RANGE(0x108000, 0x10ffff) AM_RAM // Work RAM |
| 437 | | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff) // Priority |
| 436 | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(tetrisp2_priority_r, tetrisp2_priority_w) |
| 438 | 437 | AM_RANGE(0x300000, 0x31ffff) AM_RAM_WRITE(tetrisp2_palette_w) AM_SHARE("paletteram") // Palette |
| 439 | 438 | AM_RANGE(0x500000, 0x50ffff) AM_RAM // Line |
| 440 | 439 | AM_RANGE(0x600000, 0x60ffff) AM_RAM_WRITE(tetrisp2_vram_rot_w) AM_SHARE("vram_rot") // Rotation |
| r24076 | r24077 | |
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| 468 | 467 | AM_RANGE(0x100000, 0x103fff) AM_RAM AM_SHARE("spriteram") // Object RAM |
| 469 | 468 | AM_RANGE(0x104000, 0x107fff) AM_RAM // Spare Object RAM |
| 470 | 469 | AM_RANGE(0x108000, 0x10ffff) AM_RAM // Work RAM |
| 471 | | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff) // Priority |
| 470 | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(tetrisp2_priority_r, tetrisp2_priority_w) |
| 472 | 471 | AM_RANGE(0x300000, 0x31ffff) AM_RAM_WRITE(tetrisp2_palette_w) AM_SHARE("paletteram") // Palette |
| 473 | 472 | // AM_RANGE(0x500000, 0x50ffff) AM_RAM // Line |
| 474 | 473 | AM_RANGE(0x600000, 0x60ffff) AM_RAM_WRITE(tetrisp2_vram_rot_w) AM_SHARE("vram_rot") // Rotation |
| r24076 | r24077 | |
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| 601 | 600 | AM_RANGE(0x000000, 0x0fffff) AM_ROM |
| 602 | 601 | AM_RANGE(0x100000, 0x103fff) AM_RAM // Object RAM |
| 603 | 602 | AM_RANGE(0x108000, 0x10ffff) AM_RAM // Work RAM |
| 604 | | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff) // Priority |
| 603 | AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(tetrisp2_priority_r, tetrisp2_priority_w) |
| 605 | 604 | AM_RANGE(0x300000, 0x31ffff) AM_RAM // Palette |
| 606 | 605 | AM_RANGE(0x400000, 0x403fff) AM_RAM_WRITE(tetrisp2_vram_fg_w) AM_SHARE("vram_fg") // Foreground |
| 607 | 606 | AM_RANGE(0x404000, 0x407fff) AM_RAM_WRITE(tetrisp2_vram_bg_w) AM_SHARE("vram_bg") // Background |