trunk/src/mess/machine/dccons.c
| r24031 | r24032 | |
|---|
| 11 | 11 | |
| 12 | 12 | cfffee0 - stack location when bad happens |
| 13 | 13 | |
| 14 | TODO: |
| 15 | - gdrom_alt_status is identical to normal status except that "but it does not clear DMA status information when it is accessed" |
| 16 | |
| 14 | 17 | */ |
| 15 | 18 | |
| 16 | 19 | #include "emu.h" |
| r24031 | r24032 | |
|---|
| 267 | 270 | atapi_data[atapi_data_ptr++] = data & 0xff; |
| 268 | 271 | atapi_data[atapi_data_ptr++] = data >> 8; |
| 269 | 272 | |
| 273 | //printf("%02x %02x %d\n",data & 0xff, data >> 8,atapi_data_ptr); |
| 274 | |
| 270 | 275 | if (atapi_cdata_wait) |
| 271 | 276 | { |
| 272 | 277 | // printf("ATAPI: waiting, ptr %d wait %d\n", atapi_data_ptr, atapi_cdata_wait); |
| r24031 | r24032 | |
|---|
| 651 | 656 | return reg; |
| 652 | 657 | } |
| 653 | 658 | |
| 654 | | READ64_MEMBER(dc_cons_state::dc_mess_g1_ctrl_r ) |
| 659 | READ32_MEMBER(dc_cons_state::dc_mess_g1_ctrl_r ) |
| 655 | 660 | { |
| 656 | | int reg; |
| 657 | | UINT64 shift; |
| 658 | | |
| 659 | | reg = decode_reg32_64(offset, mem_mask, &shift); |
| 660 | | mame_printf_verbose("G1CTRL: Unmapped read %08x\n", 0x5f7400+reg*4); |
| 661 | | return (UINT64)g1bus_regs[reg] << shift; |
| 661 | switch(offset) |
| 662 | { |
| 663 | case SB_GDST: |
| 664 | break; |
| 665 | case SB_GDLEND: |
| 666 | //debugger_break(machine()); |
| 667 | return atapi_xferlen; // TODO: check me |
| 668 | default: |
| 669 | printf("G1CTRL: Unmapped read %08x\n", 0x5f7400+offset*4); |
| 670 | debugger_break(machine()); |
| 671 | } |
| 672 | return g1bus_regs[offset]; |
| 662 | 673 | } |
| 663 | 674 | |
| 664 | | WRITE64_MEMBER(dc_cons_state::dc_mess_g1_ctrl_w ) |
| 675 | WRITE32_MEMBER(dc_cons_state::dc_mess_g1_ctrl_w ) |
| 665 | 676 | { |
| 666 | | int reg; |
| 667 | | UINT64 shift; |
| 668 | | UINT32 dat; //, old |
| 669 | | |
| 670 | | reg = decode_reg32_64(offset, mem_mask, &shift); |
| 671 | | dat = (UINT32)(data >> shift); |
| 672 | | // old = g1bus_regs[reg]; |
| 673 | | |
| 674 | | g1bus_regs[reg] = dat; // 5f7400+reg*4=dat |
| 675 | | mame_printf_verbose("G1CTRL: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7400+reg*4, dat, data, offset, mem_mask); |
| 676 | | switch (reg) |
| 677 | g1bus_regs[offset] = data; // 5f7400+reg*4=dat |
| 678 | // mame_printf_verbose("G1CTRL: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7400+reg*4, dat, data, offset, mem_mask); |
| 679 | switch (offset) |
| 677 | 680 | { |
| 678 | 681 | case SB_GDST: |
| 679 | | if (dat & 1 && g1bus_regs[SB_GDEN] == 1) // 0 -> 1 |
| 682 | if (data & 1 && g1bus_regs[SB_GDEN] == 1) // 0 -> 1 |
| 680 | 683 | { |
| 681 | 684 | if (g1bus_regs[SB_GDDIR] == 0) |
| 682 | 685 | { |
trunk/src/mess/drivers/dccons.c
| r24031 | r24032 | |
|---|
| 116 | 116 | AM_RANGE(0x005f6800, 0x005f69ff) AM_READWRITE(dc_sysctrl_r, dc_sysctrl_w ) |
| 117 | 117 | AM_RANGE(0x005f6c00, 0x005f6cff) AM_DEVICE32( "maple_dc", maple_dc_device, amap, U64(0xffffffffffffffff) ) |
| 118 | 118 | AM_RANGE(0x005f7000, 0x005f70ff) AM_READWRITE(dc_mess_gdrom_r, dc_mess_gdrom_w ) |
| 119 | | AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE(dc_mess_g1_ctrl_r, dc_mess_g1_ctrl_w ) |
| 119 | AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE32(dc_mess_g1_ctrl_r, dc_mess_g1_ctrl_w, U64(0xffffffffffffffff) ) |
| 120 | 120 | AM_RANGE(0x005f7800, 0x005f78ff) AM_READWRITE(dc_g2_ctrl_r, dc_g2_ctrl_w ) |
| 121 | 121 | AM_RANGE(0x005f7c00, 0x005f7cff) AM_DEVICE32("powervr2", powervr2_device, pd_dma_map, U64(0xffffffffffffffff)) |
| 122 | 122 | AM_RANGE(0x005f8000, 0x005f9fff) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff)) |