trunk/src/emu/machine/idehd.c
r23723 | r23724 | |
56 | 56 | #define IDE_COMMAND_SEEK 0x70 |
57 | 57 | #define IDE_COMMAND_IDLE_IMMEDIATE 0xe1 |
58 | 58 | #define IDE_COMMAND_IDLE 0xe3 |
59 | | #define IDE_COMMAND_TAITO_GNET_UNLOCK_1 0xfe |
60 | | #define IDE_COMMAND_TAITO_GNET_UNLOCK_2 0xfc |
61 | | #define IDE_COMMAND_TAITO_GNET_UNLOCK_3 0x0f |
62 | 59 | |
63 | 60 | enum |
64 | 61 | { |
r23723 | r23724 | |
98 | 95 | { |
99 | 96 | } |
100 | 97 | |
| 98 | void ide_mass_storage_device::update_irq() |
| 99 | { |
| 100 | if (device_selected() && (m_device_control & 2) == 0) |
| 101 | m_irq_handler(m_irq); |
| 102 | else |
| 103 | m_irq_handler(CLEAR_LINE); |
| 104 | } |
| 105 | |
101 | 106 | void ide_mass_storage_device::set_irq(int state) |
102 | 107 | { |
103 | 108 | if (m_irq != state) |
r23723 | r23724 | |
109 | 114 | else |
110 | 115 | LOG(("IDE interrupt clear\n")); |
111 | 116 | |
112 | | /* signal an interrupt */ |
113 | | m_irq_handler(state); |
| 117 | update_irq(); |
114 | 118 | } |
115 | 119 | } |
116 | 120 | |
r23723 | r23724 | |
148 | 152 | UINT32 ide_mass_storage_device::lba_address() |
149 | 153 | { |
150 | 154 | /* LBA direct? */ |
151 | | if (m_cur_head_reg & 0x40) |
152 | | return m_cur_sector + m_cur_cylinder * 256 + m_cur_head * 16777216; |
| 155 | if (m_device_head & 0x40) |
| 156 | return ((m_device_head & 0xf) << 24) | (m_cylinder_high << 16) | (m_cylinder_low << 8) | m_sector_number; |
153 | 157 | |
154 | 158 | /* standard CHS */ |
155 | 159 | else |
156 | | return (m_cur_cylinder * m_num_heads + m_cur_head) * m_num_sectors + m_cur_sector - 1; |
| 160 | return (((((m_cylinder_high << 8 ) | m_cylinder_low) * m_num_heads) + (m_device_head & 0xf)) * m_num_sectors) + m_sector_number - 1; |
157 | 161 | } |
158 | 162 | |
159 | 163 | |
r23723 | r23724 | |
341 | 345 | m_irq_handler.resolve_safe(); |
342 | 346 | m_dmarq_handler.resolve_safe(); |
343 | 347 | |
344 | | save_item(NAME(m_features)); |
345 | | |
346 | | save_item(NAME(m_cur_cylinder)); |
347 | | save_item(NAME(m_cur_sector)); |
348 | | save_item(NAME(m_cur_head)); |
349 | | save_item(NAME(m_cur_head_reg)); |
350 | | |
351 | | save_item(NAME(m_cur_lba)); |
352 | | |
353 | 348 | save_item(NAME(m_buffer)); |
354 | 349 | save_item(NAME(m_buffer_offset)); |
355 | | |
356 | | save_item(NAME(m_status)); |
357 | | save_item(NAME(m_command)); |
358 | 350 | save_item(NAME(m_error)); |
359 | | |
360 | | save_item(NAME(m_device_control)); |
361 | 351 | save_item(NAME(m_feature)); |
362 | 352 | save_item(NAME(m_sector_count)); |
| 353 | save_item(NAME(m_sector_number)); |
| 354 | save_item(NAME(m_cylinder_low)); |
| 355 | save_item(NAME(m_cylinder_high)); |
| 356 | save_item(NAME(m_device_head)); |
| 357 | save_item(NAME(m_status)); |
| 358 | save_item(NAME(m_command)); |
| 359 | save_item(NAME(m_device_control)); |
363 | 360 | |
| 361 | save_item(NAME(m_has_features)); |
| 362 | save_item(NAME(m_features)); |
| 363 | save_item(NAME(m_cur_lba)); |
364 | 364 | save_item(NAME(m_irq)); |
365 | 365 | save_item(NAME(m_dmarq)); |
366 | 366 | save_item(NAME(m_sectors_until_int)); |
367 | | |
368 | 367 | save_item(NAME(m_master_password_enable)); |
369 | 368 | save_item(NAME(m_user_password_enable)); |
370 | | |
371 | | save_item(NAME(m_gnetreadlock)); |
372 | 369 | save_item(NAME(m_block_count)); |
373 | 370 | |
374 | | save_item(NAME(m_dma_active)); |
375 | | save_item(NAME(m_verify_only)); |
376 | | |
377 | 371 | /* create a timer for timing status */ |
378 | 372 | m_last_status_timer = timer_alloc(TID_NULL); |
379 | 373 | m_reset_timer = timer_alloc(TID_RESET_CALLBACK); |
r23723 | r23724 | |
382 | 376 | void ide_mass_storage_device::device_reset() |
383 | 377 | { |
384 | 378 | m_buffer_offset = 0; |
385 | | m_gnetreadlock = 0; |
386 | 379 | m_master_password_enable = (m_master_password != NULL); |
387 | 380 | m_user_password_enable = (m_user_password != NULL); |
388 | | m_error = IDE_ERROR_DIAGNOSTIC_PASSED; |
389 | 381 | |
390 | 382 | m_status = IDE_STATUS_DSC; |
391 | 383 | |
392 | | if (!m_gnetreadlock) |
| 384 | if (is_ready()) |
| 385 | { |
393 | 386 | m_status |= IDE_STATUS_DRDY; |
| 387 | } |
394 | 388 | |
395 | | m_cur_drive = 0; |
396 | | |
397 | 389 | /* reset the drive state */ |
398 | 390 | set_irq(CLEAR_LINE); |
399 | 391 | set_dmarq(CLEAR_LINE); |
r23723 | r23724 | |
405 | 397 | { |
406 | 398 | case TID_DELAYED_INTERRUPT: |
407 | 399 | m_status &= ~IDE_STATUS_BSY; |
| 400 | |
408 | 401 | set_irq(ASSERT_LINE); |
409 | 402 | break; |
410 | 403 | |
r23723 | r23724 | |
451 | 444 | void ide_mass_storage_device::next_sector() |
452 | 445 | { |
453 | 446 | /* LBA direct? */ |
454 | | if (m_cur_head_reg & 0x40) |
| 447 | if (m_device_head & 0x40) |
455 | 448 | { |
456 | | m_cur_sector++; |
457 | | if (m_cur_sector == 0) |
| 449 | m_sector_number++; |
| 450 | if (m_sector_number == 0) |
458 | 451 | { |
459 | | m_cur_cylinder++; |
460 | | if (m_cur_cylinder == 0) |
461 | | m_cur_head++; |
| 452 | m_cylinder_low++; |
| 453 | if (m_cylinder_low == 0) |
| 454 | { |
| 455 | m_cylinder_high++; |
| 456 | if( m_cylinder_high == 0) |
| 457 | m_device_head = (m_device_head & ~0xf) | ((m_device_head + 1) & 0xf); |
| 458 | } |
462 | 459 | } |
463 | 460 | } |
464 | 461 | |
r23723 | r23724 | |
466 | 463 | else |
467 | 464 | { |
468 | 465 | /* sectors are 1-based */ |
469 | | m_cur_sector++; |
470 | | if (m_cur_sector > m_num_sectors) |
| 466 | m_sector_number++; |
| 467 | if (m_sector_number > m_num_sectors) |
471 | 468 | { |
472 | 469 | /* heads are 0 based */ |
473 | | m_cur_sector = 1; |
474 | | m_cur_head++; |
475 | | if (m_cur_head >= m_num_heads) |
| 470 | m_sector_number = 1; |
| 471 | m_device_head = (m_device_head & ~0xf) | ((m_device_head + 1) & 0xf); |
| 472 | if ((m_device_head & 0xf) >= m_num_heads) |
476 | 473 | { |
477 | | m_cur_head = 0; |
478 | | m_cur_cylinder++; |
| 474 | m_device_head &= ~0xf; |
| 475 | m_cylinder_low++; |
| 476 | if (m_cylinder_low == 0) |
| 477 | m_cylinder_high++; |
479 | 478 | } |
480 | 479 | } |
481 | 480 | } |
r23723 | r23724 | |
537 | 536 | |
538 | 537 | m_status &= ~IDE_STATUS_BSY; |
539 | 538 | |
540 | | /* GNET readlock check */ |
541 | | if (m_gnetreadlock) |
542 | | { |
543 | | return; |
544 | | } |
545 | | |
546 | 539 | /* now do the read */ |
547 | 540 | count = read_sector(lba, m_buffer); |
548 | 541 | |
r23723 | r23724 | |
555 | 548 | next_sector(); |
556 | 549 | |
557 | 550 | /* signal an interrupt */ |
558 | | if (!m_verify_only) |
559 | | m_sectors_until_int--; |
560 | | if (m_sectors_until_int == 0 || m_sector_count == 1) |
| 551 | if (--m_sectors_until_int == 0 || m_sector_count == 1) |
561 | 552 | { |
562 | 553 | m_sectors_until_int = ((m_command == IDE_COMMAND_READ_MULTIPLE) ? m_block_count : 1); |
563 | 554 | set_irq(ASSERT_LINE); |
564 | 555 | } |
565 | 556 | |
566 | 557 | /* if we're just verifying we can read the next sector */ |
567 | | if (m_verify_only) |
| 558 | if (m_command == IDE_COMMAND_VERIFY_SECTORS || |
| 559 | m_command == IDE_COMMAND_VERIFY_SECTORS_NORETRY ) |
568 | 560 | { |
569 | 561 | read_buffer_empty(); |
570 | 562 | } |
r23723 | r23724 | |
572 | 564 | { |
573 | 565 | m_status |= IDE_STATUS_DRQ; |
574 | 566 | |
575 | | if (m_dma_active) |
| 567 | if (m_command == IDE_COMMAND_READ_DMA) |
576 | 568 | set_dmarq(ASSERT_LINE); |
577 | 569 | } |
578 | 570 | } |
r23723 | r23724 | |
675 | 667 | m_status &= ~IDE_STATUS_DRQ; |
676 | 668 | set_dmarq(CLEAR_LINE); |
677 | 669 | |
| 670 | process_buffer(); |
| 671 | } |
| 672 | |
| 673 | void ide_mass_storage_device::process_buffer() |
| 674 | { |
678 | 675 | if (m_command == IDE_COMMAND_SECURITY_UNLOCK) |
679 | 676 | { |
680 | 677 | if (m_user_password_enable && memcmp(m_buffer, m_user_password, 2 + 32) == 0) |
r23723 | r23724 | |
705 | 702 | if (m_master_password_enable || m_user_password_enable) |
706 | 703 | security_error(); |
707 | 704 | } |
708 | | else if (m_command == IDE_COMMAND_TAITO_GNET_UNLOCK_2) |
709 | | { |
710 | | UINT8 key[5] = { 0 }; |
711 | | int i, bad = 0; |
712 | | read_key(key); |
713 | | |
714 | | for (i=0; !bad && i<512; i++) |
715 | | bad = ((i < 2 || i >= 7) && m_buffer[i]) || ((i >= 2 && i < 7) && m_buffer[i] != key[i-2]); |
716 | | |
717 | | if (bad) |
718 | | { |
719 | | m_status |= IDE_STATUS_ERR; |
720 | | m_error = IDE_ERROR_NONE; |
721 | | } |
722 | | else |
723 | | { |
724 | | m_gnetreadlock= 0; |
725 | | } |
726 | | } |
727 | 705 | else |
728 | 706 | { |
729 | 707 | continue_write(); |
r23723 | r23724 | |
763 | 741 | { |
764 | 742 | m_status |= IDE_STATUS_DRQ; |
765 | 743 | |
766 | | if (m_dma_active) |
767 | | { |
| 744 | if (m_command == IDE_COMMAND_WRITE_DMA) |
768 | 745 | set_dmarq(ASSERT_LINE); |
769 | | } |
770 | 746 | } |
771 | 747 | } |
772 | 748 | |
r23723 | r23724 | |
783 | 759 | } |
784 | 760 | |
785 | 761 | |
786 | | |
787 | 762 | /************************************* |
788 | 763 | * |
789 | 764 | * Handle IDE commands |
790 | 765 | * |
791 | 766 | *************************************/ |
792 | 767 | |
793 | | void ide_mass_storage_device::handle_command() |
| 768 | bool ide_mass_storage_device::process_command() |
794 | 769 | { |
795 | | UINT8 key[5]; |
796 | | |
797 | | /* implicitly clear interrupts & dmarq here */ |
798 | | set_irq(CLEAR_LINE); |
799 | | set_dmarq(CLEAR_LINE); |
800 | | |
801 | | m_status &= ~IDE_STATUS_ERR; |
802 | | |
803 | 770 | switch (m_command) |
804 | 771 | { |
805 | | case IDE_COMMAND_READ_SECTORS: |
806 | | case IDE_COMMAND_READ_SECTORS_NORETRY: |
807 | | LOGPRINT(("IDE Read multiple: C=%d H=%d S=%d LBA=%d count=%d\n", |
808 | | m_cur_cylinder, m_cur_head, m_cur_sector, lba_address(), m_sector_count)); |
| 772 | case IDE_COMMAND_READ_SECTORS: |
| 773 | case IDE_COMMAND_READ_SECTORS_NORETRY: |
| 774 | LOGPRINT(("IDE Read multiple: C=%d H=%d S=%d LBA=%d count=%d\n", |
| 775 | (m_cylinder_high << 8) | m_cylinder_low, m_device_head & 0xf, m_sector_number, lba_address(), m_sector_count)); |
809 | 776 | |
810 | | /* reset the buffer */ |
811 | | m_buffer_offset = 0; |
812 | | m_sectors_until_int = 1; |
813 | | m_dma_active = 0; |
814 | | m_verify_only = 0; |
| 777 | m_sectors_until_int = 1; |
815 | 778 | |
816 | | /* start the read going */ |
817 | | read_first_sector(); |
818 | | break; |
| 779 | /* start the read going */ |
| 780 | read_first_sector(); |
| 781 | return true; |
819 | 782 | |
820 | | case IDE_COMMAND_READ_MULTIPLE: |
821 | | LOGPRINT(("IDE Read multiple block: C=%d H=%d S=%d LBA=%d count=%d\n", |
822 | | m_cur_cylinder, m_cur_head, m_cur_sector, lba_address(), m_sector_count)); |
| 783 | case IDE_COMMAND_READ_MULTIPLE: |
| 784 | LOGPRINT(("IDE Read multiple block: C=%d H=%d S=%d LBA=%d count=%d\n", |
| 785 | (m_cylinder_high << 8) | m_cylinder_low, m_device_head & 0xf, m_sector_number, lba_address(), m_sector_count)); |
823 | 786 | |
824 | | /* reset the buffer */ |
825 | | m_buffer_offset = 0; |
826 | | m_sectors_until_int = 1; |
827 | | m_dma_active = 0; |
828 | | m_verify_only = 0; |
| 787 | m_sectors_until_int = 1; |
829 | 788 | |
830 | | /* start the read going */ |
831 | | read_first_sector(); |
832 | | break; |
| 789 | /* start the read going */ |
| 790 | read_first_sector(); |
| 791 | return true; |
833 | 792 | |
834 | | case IDE_COMMAND_VERIFY_SECTORS: |
835 | | case IDE_COMMAND_VERIFY_SECTORS_NORETRY: |
836 | | LOGPRINT(("IDE Read verify multiple with/without retries: C=%d H=%d S=%d LBA=%d count=%d\n", |
837 | | m_cur_cylinder, m_cur_head, m_cur_sector, lba_address(), m_sector_count)); |
| 793 | case IDE_COMMAND_VERIFY_SECTORS: |
| 794 | case IDE_COMMAND_VERIFY_SECTORS_NORETRY: |
| 795 | LOGPRINT(("IDE Read verify multiple with/without retries: C=%d H=%d S=%d LBA=%d count=%d\n", |
| 796 | (m_cylinder_high << 8) | m_cylinder_low, m_device_head & 0xf, m_sector_number, lba_address(), m_sector_count)); |
838 | 797 | |
839 | | /* reset the buffer */ |
840 | | m_buffer_offset = 0; |
841 | | m_sectors_until_int = 1; |
842 | | m_dma_active = 0; |
843 | | m_verify_only = 1; |
| 798 | /* reset the buffer */ |
| 799 | m_sectors_until_int = m_sector_count; |
844 | 800 | |
845 | | /* start the read going */ |
846 | | read_first_sector(); |
847 | | break; |
| 801 | /* start the read going */ |
| 802 | read_first_sector(); |
| 803 | return true; |
848 | 804 | |
849 | | case IDE_COMMAND_READ_DMA: |
850 | | LOGPRINT(("IDE Read multiple DMA: C=%d H=%d S=%d LBA=%d count=%d\n", |
851 | | m_cur_cylinder, m_cur_head, m_cur_sector, lba_address(), m_sector_count)); |
| 805 | case IDE_COMMAND_READ_DMA: |
| 806 | LOGPRINT(("IDE Read multiple DMA: C=%d H=%d S=%d LBA=%d count=%d\n", |
| 807 | (m_cylinder_high << 8) | m_cylinder_low, m_device_head & 0xf, m_sector_number, lba_address(), m_sector_count)); |
852 | 808 | |
853 | | /* reset the buffer */ |
854 | | m_buffer_offset = 0; |
855 | | m_sectors_until_int = m_sector_count; |
856 | | m_dma_active = 1; |
857 | | m_verify_only = 0; |
| 809 | /* reset the buffer */ |
| 810 | m_sectors_until_int = m_sector_count; |
858 | 811 | |
859 | | /* start the read going */ |
860 | | read_first_sector(); |
861 | | break; |
| 812 | /* start the read going */ |
| 813 | read_first_sector(); |
| 814 | return true; |
862 | 815 | |
863 | | case IDE_COMMAND_WRITE_SECTORS: |
864 | | case IDE_COMMAND_WRITE_SECTORS_NORETRY: |
865 | | LOGPRINT(("IDE Write multiple: C=%d H=%d S=%d LBA=%d count=%d\n", |
866 | | m_cur_cylinder, m_cur_head, m_cur_sector, lba_address(), m_sector_count)); |
| 816 | case IDE_COMMAND_WRITE_SECTORS: |
| 817 | case IDE_COMMAND_WRITE_SECTORS_NORETRY: |
| 818 | LOGPRINT(("IDE Write multiple: C=%d H=%d S=%d LBA=%d count=%d\n", |
| 819 | (m_cylinder_high << 8) | m_cylinder_low, m_device_head & 0xf, m_sector_number, lba_address(), m_sector_count)); |
867 | 820 | |
868 | | /* reset the buffer */ |
869 | | m_buffer_offset = 0; |
870 | | m_sectors_until_int = 1; |
871 | | m_dma_active = 0; |
| 821 | /* reset the buffer */ |
| 822 | m_sectors_until_int = 1; |
872 | 823 | |
873 | | /* mark the buffer ready */ |
874 | | m_status |= IDE_STATUS_DRQ; |
875 | | break; |
| 824 | /* mark the buffer ready */ |
| 825 | m_status |= IDE_STATUS_DRQ; |
| 826 | return true; |
876 | 827 | |
877 | | case IDE_COMMAND_WRITE_MULTIPLE: |
878 | | LOGPRINT(("IDE Write multiple block: C=%d H=%d S=%d LBA=%d count=%d\n", |
879 | | m_cur_cylinder, m_cur_head, m_cur_sector, lba_address(), m_sector_count)); |
| 828 | case IDE_COMMAND_WRITE_MULTIPLE: |
| 829 | LOGPRINT(("IDE Write multiple block: C=%d H=%d S=%d LBA=%d count=%d\n", |
| 830 | (m_cylinder_high << 8) | m_cylinder_low, m_device_head & 0xf, m_sector_number, lba_address(), m_sector_count)); |
880 | 831 | |
881 | | /* reset the buffer */ |
882 | | m_buffer_offset = 0; |
883 | | m_sectors_until_int = 1; |
884 | | m_dma_active = 0; |
| 832 | /* reset the buffer */ |
| 833 | m_sectors_until_int = 1; |
885 | 834 | |
886 | | /* mark the buffer ready */ |
887 | | m_status |= IDE_STATUS_DRQ; |
888 | | break; |
| 835 | /* mark the buffer ready */ |
| 836 | m_status |= IDE_STATUS_DRQ; |
| 837 | return true; |
889 | 838 | |
890 | | case IDE_COMMAND_WRITE_DMA: |
891 | | LOGPRINT(("IDE Write multiple DMA: C=%d H=%d S=%d LBA=%d count=%d\n", |
892 | | m_cur_cylinder, m_cur_head, m_cur_sector, lba_address(), m_sector_count)); |
| 839 | case IDE_COMMAND_WRITE_DMA: |
| 840 | LOGPRINT(("IDE Write multiple DMA: C=%d H=%d S=%d LBA=%d count=%d\n", |
| 841 | (m_cylinder_high << 8) | m_cylinder_low, m_device_head & 0xf, m_sector_number, lba_address(), m_sector_count)); |
893 | 842 | |
894 | | /* reset the buffer */ |
895 | | m_buffer_offset = 0; |
896 | | m_sectors_until_int = m_sector_count; |
897 | | m_dma_active = 1; |
| 843 | /* reset the buffer */ |
| 844 | m_sectors_until_int = m_sector_count; |
898 | 845 | |
899 | | /* mark the buffer ready */ |
900 | | m_status |= IDE_STATUS_DRQ; |
| 846 | /* mark the buffer ready */ |
| 847 | m_status |= IDE_STATUS_DRQ; |
901 | 848 | |
902 | | /* start the read going */ |
903 | | set_dmarq(ASSERT_LINE); |
904 | | break; |
| 849 | /* start the read going */ |
| 850 | set_dmarq(ASSERT_LINE); |
| 851 | return true; |
905 | 852 | |
906 | | case IDE_COMMAND_SECURITY_UNLOCK: |
907 | | LOGPRINT(("IDE Security Unlock\n")); |
| 853 | case IDE_COMMAND_SECURITY_UNLOCK: |
| 854 | LOGPRINT(("IDE Security Unlock\n")); |
908 | 855 | |
909 | | /* reset the buffer */ |
910 | | m_buffer_offset = 0; |
911 | | m_sectors_until_int = 0; |
912 | | m_dma_active = 0; |
| 856 | /* mark the buffer ready */ |
| 857 | m_status |= IDE_STATUS_DRQ; |
913 | 858 | |
914 | | /* mark the buffer ready */ |
915 | | m_status |= IDE_STATUS_DRQ; |
| 859 | set_irq(ASSERT_LINE); |
| 860 | return true; |
916 | 861 | |
917 | | set_irq(ASSERT_LINE); |
918 | | break; |
| 862 | case IDE_COMMAND_GET_INFO: |
| 863 | LOGPRINT(("IDE Read features\n")); |
919 | 864 | |
920 | | case IDE_COMMAND_GET_INFO: |
921 | | LOGPRINT(("IDE Read features\n")); |
922 | | |
923 | | /* reset the buffer */ |
924 | | m_buffer_offset = 0; |
| 865 | if (m_has_features) |
| 866 | { |
925 | 867 | m_sector_count = 1; |
926 | 868 | |
927 | 869 | /* build the features page */ |
r23723 | r23724 | |
929 | 871 | |
930 | 872 | /* indicate everything is ready */ |
931 | 873 | m_status |= IDE_STATUS_DRQ; |
932 | | m_status &= ~IDE_STATUS_BSY; |
933 | 874 | |
934 | 875 | /* signal an interrupt */ |
935 | 876 | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 1); |
936 | | break; |
937 | | |
938 | | case IDE_COMMAND_DIAGNOSTIC: |
939 | | m_error = IDE_ERROR_DIAGNOSTIC_PASSED; |
940 | | |
941 | | /* signal an interrupt */ |
942 | | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 0); |
943 | | break; |
944 | | |
945 | | case IDE_COMMAND_RECALIBRATE: |
946 | | /* signal an interrupt */ |
947 | | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 0); |
948 | | break; |
949 | | |
950 | | case IDE_COMMAND_IDLE: |
951 | | /* for timeout disabled value is 0 */ |
952 | | m_sector_count = 0; |
953 | | /* signal an interrupt */ |
| 877 | } |
| 878 | else |
| 879 | { |
| 880 | m_status |= IDE_STATUS_ERR; |
| 881 | m_error = IDE_ERROR_NONE; |
| 882 | m_status &= ~IDE_STATUS_DRDY; |
954 | 883 | set_irq(ASSERT_LINE); |
955 | | break; |
| 884 | } |
| 885 | return true; |
956 | 886 | |
957 | | case IDE_COMMAND_SET_CONFIG: |
958 | | LOGPRINT(("IDE Set configuration (%d heads, %d sectors)\n", m_cur_head + 1, m_sector_count)); |
959 | | set_geometry(m_sector_count,m_cur_head + 1); |
| 887 | case IDE_COMMAND_DIAGNOSTIC: |
| 888 | m_error = IDE_ERROR_DIAGNOSTIC_PASSED; |
960 | 889 | |
961 | | /* signal an interrupt */ |
962 | | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 0); |
963 | | break; |
| 890 | /* signal an interrupt */ |
| 891 | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 0); |
| 892 | return true; |
964 | 893 | |
965 | | case IDE_COMMAND_UNKNOWN_F9: |
966 | | /* only used by Killer Instinct AFAICT */ |
967 | | LOGPRINT(("IDE unknown command (F9)\n")); |
| 894 | case IDE_COMMAND_RECALIBRATE: |
| 895 | /* signal an interrupt */ |
| 896 | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 0); |
| 897 | return true; |
968 | 898 | |
969 | | /* signal an interrupt */ |
970 | | set_irq(ASSERT_LINE); |
971 | | break; |
| 899 | case IDE_COMMAND_IDLE: |
| 900 | /* for timeout disabled value is 0 */ |
| 901 | m_sector_count = 0; |
| 902 | /* signal an interrupt */ |
| 903 | set_irq(ASSERT_LINE); |
| 904 | return true; |
972 | 905 | |
973 | | case IDE_COMMAND_SET_FEATURES: |
974 | | LOGPRINT(("IDE Set features (%02X %02X %02X %02X %02X)\n", m_feature, m_sector_count & 0xff, m_cur_sector, m_cur_cylinder & 0xff, m_cur_cylinder >> 8)); |
| 906 | case IDE_COMMAND_SET_CONFIG: |
| 907 | LOGPRINT(("IDE Set configuration (%d heads, %d sectors)\n", (m_device_head & 0xf) + 1, m_sector_count)); |
| 908 | set_geometry(m_sector_count,(m_device_head & 0xf) + 1); |
975 | 909 | |
976 | | /* signal an interrupt */ |
977 | | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 0); |
978 | | break; |
| 910 | /* signal an interrupt */ |
| 911 | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 0); |
| 912 | return true; |
979 | 913 | |
980 | | case IDE_COMMAND_SET_BLOCK_COUNT: |
981 | | LOGPRINT(("IDE Set block count (%02X)\n", m_sector_count)); |
| 914 | case IDE_COMMAND_UNKNOWN_F9: |
| 915 | /* only used by Killer Instinct AFAICT */ |
| 916 | LOGPRINT(("IDE unknown command (F9)\n")); |
982 | 917 | |
983 | | m_block_count = m_sector_count; |
| 918 | /* signal an interrupt */ |
| 919 | set_irq(ASSERT_LINE); |
| 920 | return true; |
984 | 921 | |
985 | | /* signal an interrupt */ |
986 | | set_irq(ASSERT_LINE); |
987 | | break; |
| 922 | case IDE_COMMAND_SET_FEATURES: |
| 923 | LOGPRINT(("IDE Set features (%02X %02X %02X %02X %02X)\n", m_feature, m_sector_count & 0xff, m_sector_number, m_cylinder_low, m_cylinder_high)); |
988 | 924 | |
989 | | case IDE_COMMAND_TAITO_GNET_UNLOCK_1: |
990 | | LOGPRINT(("IDE GNET Unlock 1\n")); |
| 925 | /* signal an interrupt */ |
| 926 | signal_delayed_interrupt(MINIMUM_COMMAND_TIME, 0); |
| 927 | return true; |
991 | 928 | |
992 | | m_sector_count = 1; |
993 | | m_status |= IDE_STATUS_DRDY; |
| 929 | case IDE_COMMAND_SET_BLOCK_COUNT: |
| 930 | LOGPRINT(("IDE Set block count (%02X)\n", m_sector_count)); |
994 | 931 | |
995 | | set_irq(ASSERT_LINE); |
996 | | break; |
| 932 | m_block_count = m_sector_count; |
997 | 933 | |
998 | | case IDE_COMMAND_TAITO_GNET_UNLOCK_2: |
999 | | LOGPRINT(("IDE GNET Unlock 2\n")); |
| 934 | /* signal an interrupt */ |
| 935 | set_irq(ASSERT_LINE); |
| 936 | return true; |
1000 | 937 | |
1001 | | /* reset the buffer */ |
1002 | | m_buffer_offset = 0; |
1003 | | m_sectors_until_int = 0; |
1004 | | m_dma_active = 0; |
| 938 | case IDE_COMMAND_SEEK: |
| 939 | /* |
| 940 | cur_cylinder, cur_sector and cur_head |
| 941 | are all already set in this case so no need |
| 942 | so that implements actual seek |
| 943 | */ |
1005 | 944 | |
1006 | | /* mark the buffer ready */ |
1007 | | m_status |= IDE_STATUS_DRQ; |
| 945 | /* for timeout disabled value is 0 */ |
| 946 | m_sector_count = 0; |
1008 | 947 | |
1009 | | set_irq(ASSERT_LINE); |
1010 | | break; |
| 948 | /* signal an interrupt */ |
| 949 | set_irq(ASSERT_LINE); |
| 950 | return true; |
1011 | 951 | |
1012 | | case IDE_COMMAND_TAITO_GNET_UNLOCK_3: |
1013 | | LOGPRINT(("IDE GNET Unlock 3\n")); |
1014 | | |
1015 | | /* key check */ |
1016 | | read_key(key); |
1017 | | if ((m_feature == key[0]) && (m_sector_count == key[1]) && (m_cur_sector == key[2]) && (m_cur_cylinder == (((UINT16)key[4]<<8)|key[3]))) |
1018 | | { |
1019 | | m_gnetreadlock= 0; |
1020 | | } |
1021 | | else |
1022 | | { |
1023 | | m_status &= ~IDE_STATUS_DRDY; |
1024 | | } |
1025 | | |
1026 | | set_irq(ASSERT_LINE); |
1027 | | break; |
1028 | | |
1029 | | case IDE_COMMAND_SEEK: |
1030 | | /* |
1031 | | cur_cylinder, cur_sector and cur_head |
1032 | | are all already set in this case so no need |
1033 | | so that implements actual seek |
1034 | | */ |
1035 | | |
1036 | | /* for timeout disabled value is 0 */ |
1037 | | m_sector_count = 0; |
1038 | | /* signal an interrupt */ |
1039 | | set_irq(ASSERT_LINE); |
1040 | | break; |
1041 | | |
1042 | | |
1043 | | default: |
1044 | | LOGPRINT(("IDE unknown command (%02X)\n", m_command)); |
1045 | | m_status |= IDE_STATUS_ERR; |
1046 | | m_error = IDE_ERROR_UNKNOWN_COMMAND; |
1047 | | set_irq(ASSERT_LINE); |
1048 | | //debugger_break(device->machine()); |
1049 | | break; |
| 952 | default: |
| 953 | return false; |
1050 | 954 | } |
1051 | 955 | } |
1052 | 956 | |
r23723 | r23724 | |
1169 | 1073 | |
1170 | 1074 | /* return the current sector */ |
1171 | 1075 | case IDE_CS0_SECTOR_NUMBER_RW: |
1172 | | result = m_cur_sector; |
| 1076 | result = m_sector_number; |
1173 | 1077 | break; |
1174 | 1078 | |
1175 | 1079 | /* return the current cylinder LSB */ |
1176 | 1080 | case IDE_CS0_CYLINDER_LOW_RW: |
1177 | | result = m_cur_cylinder & 0xff; |
| 1081 | result = m_cylinder_low; |
1178 | 1082 | break; |
1179 | 1083 | |
1180 | 1084 | /* return the current cylinder MSB */ |
1181 | 1085 | case IDE_CS0_CYLINDER_HIGH_RW: |
1182 | | result = m_cur_cylinder >> 8; |
| 1086 | result = m_cylinder_high; |
1183 | 1087 | break; |
1184 | 1088 | |
1185 | 1089 | /* return the current head */ |
1186 | 1090 | case IDE_CS0_DEVICE_HEAD_RW: |
1187 | | result = m_cur_head_reg; |
| 1091 | result = m_device_head; |
1188 | 1092 | break; |
1189 | 1093 | |
1190 | 1094 | /* return the current status and clear any pending interrupts */ |
r23723 | r23724 | |
1199 | 1103 | m_last_status_timer->adjust(attotime::never); |
1200 | 1104 | } |
1201 | 1105 | |
1202 | | if (!(m_status & IDE_STATUS_DRDY) && !m_gnetreadlock) |
| 1106 | if (!(m_status & IDE_STATUS_DRDY) && is_ready()) |
1203 | 1107 | { |
1204 | 1108 | m_status |= IDE_STATUS_DRDY; |
1205 | 1109 | } |
r23723 | r23724 | |
1210 | 1114 | { |
1211 | 1115 | result = 0; |
1212 | 1116 | } |
1213 | | |
1214 | 1117 | break; |
1215 | 1118 | |
1216 | 1119 | /* log anything else */ |
r23723 | r23724 | |
1309 | 1212 | |
1310 | 1213 | WRITE16_MEMBER( ide_mass_storage_device::write_cs0 ) |
1311 | 1214 | { |
1312 | | if (!device_present()) |
1313 | | return; |
1314 | | |
1315 | 1215 | /* logit */ |
1316 | 1216 | if (offset != IDE_CS0_DATA_RW) |
1317 | 1217 | LOG(("%s:IDE cs0 write to %X = %08X, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask)); |
r23723 | r23724 | |
1369 | 1269 | |
1370 | 1270 | /* current sector */ |
1371 | 1271 | case IDE_CS0_SECTOR_NUMBER_RW: |
1372 | | m_cur_sector = data; |
| 1272 | m_sector_number = data; |
1373 | 1273 | break; |
1374 | 1274 | |
1375 | 1275 | /* current cylinder LSB */ |
1376 | 1276 | case IDE_CS0_CYLINDER_LOW_RW: |
1377 | | m_cur_cylinder = (m_cur_cylinder & 0xff00) | (data & 0xff); |
| 1277 | m_cylinder_low = data; |
1378 | 1278 | break; |
1379 | 1279 | |
1380 | 1280 | /* current cylinder MSB */ |
1381 | 1281 | case IDE_CS0_CYLINDER_HIGH_RW: |
1382 | | m_cur_cylinder = ((data << 8) & 0xff00) | (m_cur_cylinder & 0xff); |
| 1282 | m_cylinder_high = data; |
1383 | 1283 | break; |
1384 | 1284 | |
1385 | 1285 | /* current head */ |
1386 | 1286 | case IDE_CS0_DEVICE_HEAD_RW: |
1387 | | // LBA mode = data & 0x40 |
1388 | | m_cur_drive = (data & 0x10) >> 4; |
1389 | | m_cur_head = data & 0x0f; |
1390 | | m_cur_head_reg = data; |
| 1287 | m_device_head = data; |
| 1288 | |
| 1289 | update_irq(); |
1391 | 1290 | break; |
1392 | 1291 | |
1393 | 1292 | /* command */ |
r23723 | r23724 | |
1395 | 1294 | m_command = data; |
1396 | 1295 | |
1397 | 1296 | if (device_selected() || m_command == IDE_COMMAND_DIAGNOSTIC) |
1398 | | handle_command(); |
| 1297 | { |
| 1298 | /* implicitly clear interrupts & dmarq here */ |
| 1299 | set_irq(CLEAR_LINE); |
| 1300 | set_dmarq(CLEAR_LINE); |
| 1301 | |
| 1302 | m_buffer_offset = 0; |
| 1303 | m_sectors_until_int = 0; |
| 1304 | |
| 1305 | m_status &= ~IDE_STATUS_ERR; |
| 1306 | |
| 1307 | if (!process_command()) |
| 1308 | { |
| 1309 | LOGPRINT(("IDE unknown command (%02X)\n", m_command)); |
| 1310 | m_status |= IDE_STATUS_ERR; |
| 1311 | m_error = IDE_ERROR_UNKNOWN_COMMAND; |
| 1312 | set_irq(ASSERT_LINE); |
| 1313 | //debugger_break(device->machine()); |
| 1314 | } |
| 1315 | } |
1399 | 1316 | break; |
1400 | 1317 | } |
1401 | 1318 | } |
r23723 | r23724 | |
1403 | 1320 | |
1404 | 1321 | WRITE16_MEMBER( ide_mass_storage_device::write_cs1 ) |
1405 | 1322 | { |
1406 | | if (!device_present()) |
1407 | | return; |
1408 | | |
1409 | 1323 | /* logit */ |
1410 | 1324 | LOG(("%s:IDE cs1 write to %X = %08X, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask)); |
1411 | 1325 | |
r23723 | r23724 | |
1421 | 1335 | case IDE_CS1_DEVICE_CONTROL_W: |
1422 | 1336 | m_device_control = data; |
1423 | 1337 | |
1424 | | if (data & 0x02) |
1425 | | { |
1426 | | // nIEN |
1427 | | logerror( "%s: write_cs1 %04x %04x %04x nIEN not supported\n", machine().describe_context(), offset, data, mem_mask ); |
1428 | | } |
| 1338 | update_irq(); |
1429 | 1339 | |
1430 | 1340 | if (data & 0x04) |
1431 | 1341 | { |
r23723 | r23724 | |
1495 | 1405 | UINT32 metalength; |
1496 | 1406 | if (m_handle->read_metadata (HARD_DISK_IDENT_METADATA_TAG, 0, m_features, IDE_DISK_SECTOR_SIZE, metalength) != CHDERR_NONE) |
1497 | 1407 | ide_build_features(); |
| 1408 | |
| 1409 | m_has_features = 1; |
1498 | 1410 | } |
1499 | 1411 | } |
1500 | 1412 | |