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r23721 Saturday 15th June, 2013 at 14:35:56 UTC by Carl
i286: repurpose unneeded static config as a20 line callback (nw)
pc9801: experiment on 9801ux (nw)
pc: use irq delay from pcjr for pcjx (nw)
[src/emu/cpu/i86]i286.c i286.h i86priv.h
[src/mess/drivers]amstr_pc.c at.c genpc.c ibmpc.c isbc.c pc.c pc9801.c
[src/mess/includes]at.h
[src/mess/machine]pc.c

trunk/src/emu/cpu/i86/i86priv.h
r23720r23721
126126#define WriteByte(ea,val)       write_mem_byte((ea) & AMASK, val);
127127#define WriteWord(ea,val)       write_mem_word((ea) & AMASK, val);
128128
129#define FETCH                   (cpustate->direct->read_raw_byte(cpustate->pc++, cpustate->fetch_xor))
130#define FETCHOP                 (cpustate->direct->read_decrypted_byte(cpustate->pc++, cpustate->fetch_xor))
129#define FETCH                   (cpustate->direct->read_raw_byte((cpustate->pc++) & AMASK, cpustate->fetch_xor))
130#define FETCHOP                 (cpustate->direct->read_decrypted_byte((cpustate->pc++) & AMASK, cpustate->fetch_xor))
131131#define PEEKOP(addr)            (cpustate->direct->read_decrypted_byte(addr, cpustate->fetch_xor))
132132#define FETCHWORD(var)          { var = cpustate->direct->read_raw_byte(cpustate->pc, cpustate->fetch_xor); var += (cpustate->direct->read_raw_byte(cpustate->pc + 1, cpustate->fetch_xor) << 8); cpustate->pc += 2; }
133133#define CHANGE_PC(addr)
trunk/src/emu/cpu/i86/i286.c
r23720r23721
7979   unsigned ea;
8080   UINT16 eo; /* HJB 12/13/98 effective offset of the address (before segment is added) */
8181   UINT8 ea_seg;   /* effective segment of the address */
82
83   i80286_a20_cb a20_callback;
8284};
8385
8486INLINE i80286_state *get_safe_token(device_t *device)
r23720r23721
143145
144146static void i80286_set_a20_line(i80286_state *cpustate, int state)
145147{
146   cpustate->amask = state ? 0x00ffffff : 0x000fffff;
148   if(cpustate->a20_callback)
149      cpustate->amask = cpustate->a20_callback(state);
147150}
148151
149152static CPU_RESET( i80286 )
r23720r23721
310313   cpustate->io = &device->space(AS_IO);
311314   cpustate->direct = &cpustate->program->direct();
312315
313   /* If a reset parameter is given, take it as pointer to an address mask */
314316   if( device->static_config() )
315      cpustate->amask = *(unsigned*)device->static_config();
317      cpustate->a20_callback = ((i80286_interface *)device->static_config())->a20_callback;
316318   else
317      cpustate->amask = 0x00ffff;
319      cpustate->a20_callback = NULL;
318320
321   cpustate->amask = 0xffffff;
322
319323   cpustate->fetch_xor = BYTE_XOR_LE(0);
320324
321325   i80286_urinit();
322326}
323327
328static CPU_TRANSLATE( i80286 )
329{
330   i80286_state *cpustate = get_safe_token(device);
324331
332   *address &= cpustate->amask;
325333
334   return TRUE;
335}
326336
327
328337/**************************************************************************
329338 * Generic set_info
330339 **************************************************************************/
r23720r23721
482491      case CPUINFO_FCT_BURN:                          info->burn = NULL;                      break;
483492      case CPUINFO_FCT_DISASSEMBLE:                   info->disassemble = CPU_DISASSEMBLE_NAME(i80286);       break;
484493      case CPUINFO_PTR_INSTRUCTION_COUNTER:           info->icount = &cpustate->icount;           break;
494      case CPUINFO_FCT_TRANSLATE:                     info->translate = CPU_TRANSLATE_NAME(i80286); break;
485495
486496      /* --- the following bits of info are returned as NULL-terminated strings --- */
487497      case CPUINFO_STR_NAME:                          strcpy(info->s, "80286");               break;
trunk/src/emu/cpu/i86/i286.h
r23720r23721
6969
7070#define TRAP(fault, code)  (UINT32)(((fault&0xffff)<<16)|(code&0xffff))
7171
72typedef UINT32 (*i80286_a20_cb)(bool state);
73
74struct i80286_interface
75{
76   i80286_a20_cb a20_callback;
77};
78
7279/* Public functions */
7380DECLARE_LEGACY_CPU_DEVICE(I80286, i80286);
7481
trunk/src/mess/drivers/at.c
r23720r23721
227227   PORT_DIPSETTING(    0x01, DEF_STR( Yes ) )
228228INPUT_PORTS_END
229229
230static const unsigned i286_address_mask = 0x00ffffff;
231
232230static const at_keyboard_controller_interface keyboard_controller_intf =
233231{
234232   DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET),
r23720r23721
250248   m_pic8259_slave->ir0_w((state) ? 0 : 1);
251249}
252250
251UINT32 at_state::at_286_a20(bool state)
252{
253   return (state ? 0xffffff : 0xefffff);
254}
255
256static const i80286_interface at_286 =
257{
258   at_state::at_286_a20
259};
260
253261static const isa16bus_interface isabus_intf =
254262{
255263   // interrupts
r23720r23721
309317   MCFG_CPU_ADD("maincpu", I80286, XTAL_12MHz/2 /*6000000*/)
310318   MCFG_CPU_PROGRAM_MAP(at16_map)
311319   MCFG_CPU_IO_MAP(at16_io)
312   MCFG_CPU_CONFIG(i286_address_mask)
320   MCFG_CPU_CONFIG(at_286)
313321
314322   MCFG_QUANTUM_TIME(attotime::from_hz(60))
315323
r23720r23721
345353   MCFG_CPU_ADD("maincpu", I80286, 6000000 /*6000000*/)
346354   MCFG_CPU_PROGRAM_MAP(at16_map)
347355   MCFG_CPU_IO_MAP(at16_io)
348   MCFG_CPU_CONFIG(i286_address_mask)
356   MCFG_CPU_CONFIG(at_286)
349357
350358   MCFG_QUANTUM_TIME(attotime::from_hz(60))
351359
r23720r23721
369377   MCFG_CPU_ADD("maincpu", I80286, 12000000)
370378   MCFG_CPU_PROGRAM_MAP(at16_map)
371379   MCFG_CPU_IO_MAP(at16_io)
372   MCFG_CPU_CONFIG(i286_address_mask)
380   MCFG_CPU_CONFIG(at_286)
373381
374382   MCFG_FRAGMENT_ADD( at_motherboard )
375383
r23720r23721
391399   MCFG_CPU_ADD("maincpu", I80286, 12000000)
392400   MCFG_CPU_PROGRAM_MAP(at16_map)
393401   MCFG_CPU_IO_MAP(neat_io)
394   MCFG_CPU_CONFIG(i286_address_mask)
402   MCFG_CPU_CONFIG(at_286)
395403
396404   MCFG_FRAGMENT_ADD( at_motherboard )
397405
r23720r23721
414422   MCFG_CPU_ADD("maincpu", I80286, 12000000)
415423   MCFG_CPU_PROGRAM_MAP(at16_map)
416424   MCFG_CPU_IO_MAP(at16_io)
417   MCFG_CPU_CONFIG(i286_address_mask)
425   MCFG_CPU_CONFIG(at_286)
418426
419427   MCFG_FRAGMENT_ADD( at_motherboard )
420428
r23720r23721
436444   MCFG_CPU_ADD("maincpu", I80286, 12500000)
437445   MCFG_CPU_PROGRAM_MAP(at16_map)
438446   MCFG_CPU_IO_MAP(at16_io)
439   MCFG_CPU_CONFIG(i286_address_mask)
447   MCFG_CPU_CONFIG(at_286)
440448
441449   MCFG_FRAGMENT_ADD( at_motherboard )
442450
r23720r23721
502510   MCFG_CPU_ADD("maincpu", I80286, XTAL_12MHz/2 /*6000000*/)
503511   MCFG_CPU_PROGRAM_MAP(at16_map)
504512   MCFG_CPU_IO_MAP(at16_io)
505   MCFG_CPU_CONFIG(i286_address_mask)
513   MCFG_CPU_CONFIG(at_286)
506514
507515   MCFG_QUANTUM_TIME(attotime::from_hz(60))
508516
trunk/src/mess/drivers/ibmpc.c
r23720r23721
289289static INPUT_PORTS_START( ibm5150 )
290290INPUT_PORTS_END
291291
292static const unsigned i86_address_mask = 0x000fffff;
293
294292static DEVICE_INPUT_DEFAULTS_START(cga)
295293   DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x20)
296294DEVICE_INPUT_DEFAULTS_END
r23720r23721
305303   MCFG_CPU_ADD("maincpu", I8088, XTAL_14_31818MHz/3)
306304   MCFG_CPU_PROGRAM_MAP(pc8_map)
307305   MCFG_CPU_IO_MAP(pc8_io)
308   MCFG_CPU_CONFIG(i86_address_mask)
309306
310307   MCFG_IBM5150_MOTHERBOARD_ADD("mb","maincpu")
311308   MCFG_DEVICE_INPUT_DEFAULTS(cga)
r23720r23721
340337   MCFG_CPU_ADD("maincpu", I8088, XTAL_14_31818MHz/3)
341338   MCFG_CPU_PROGRAM_MAP(pc8_map)
342339   MCFG_CPU_IO_MAP(pc8_io)
343   MCFG_CPU_CONFIG(i86_address_mask)
344340
345341   MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
346342   MCFG_DEVICE_INPUT_DEFAULTS(cga)
trunk/src/mess/drivers/genpc.c
r23720r23721
5959static INPUT_PORTS_START( pcgen )
6060INPUT_PORTS_END
6161
62static const unsigned i86_address_mask = 0x000fffff;
63
6462static DEVICE_INPUT_DEFAULTS_START(cga)
6563   DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x20)
6664DEVICE_INPUT_DEFAULTS_END
r23720r23721
123121   MCFG_CPU_ADD("maincpu",  I8086, 4772720)
124122   MCFG_CPU_PROGRAM_MAP(pc16_map)
125123   MCFG_CPU_IO_MAP(pc16_io)
126   MCFG_CPU_CONFIG(i86_address_mask)
127124
128125   MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
129126   MCFG_DEVICE_INPUT_DEFAULTS(cga)
r23720r23721
149146   MCFG_CPU_ADD("maincpu",  I8086, 4772720)
150147   MCFG_CPU_PROGRAM_MAP(pc16_map)
151148   MCFG_CPU_IO_MAP(pc16_io)
152   MCFG_CPU_CONFIG(i86_address_mask)
153149
154150   MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
155151   MCFG_DEVICE_INPUT_DEFAULTS(vga)
r23720r23721
175171   MCFG_CPU_ADD("maincpu",  I8086, 4772720)
176172   MCFG_CPU_PROGRAM_MAP(pc16_map)
177173   MCFG_CPU_IO_MAP(pc16_io)
178   MCFG_CPU_CONFIG(i86_address_mask)
179174
180175   MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
181176   MCFG_DEVICE_INPUT_DEFAULTS(vga)
trunk/src/mess/drivers/pc.c
r23720r23721
870870INPUT_PORTS_END
871871
872872
873static const unsigned i86_address_mask = 0x000fffff;
874
875873static const pc_lpt_interface pc_lpt_config =
876874{
877875   DEVCB_CPU_INPUT_LINE("maincpu", 0)
r23720r23721
907905   MCFG_CPU_ADD("maincpu", type, clock)                \
908906   MCFG_CPU_PROGRAM_MAP(mem##_map) \
909907   MCFG_CPU_IO_MAP(port##_io)  \
910   MCFG_CPU_CONFIG(i86_address_mask)   \
911908   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", pc_state, vblankfunc, "screen", 0, 1)
912909
913910
r23720r23721
14081405   MCFG_CPU_ADD("maincpu", I8088, XTAL_16MHz/3)
14091406   MCFG_CPU_PROGRAM_MAP(mc1502_map)
14101407   MCFG_CPU_IO_MAP(mc1502_io)
1411   MCFG_CPU_CONFIG(i86_address_mask)
14121408
14131409   MCFG_MACHINE_START_OVERRIDE(pc_state,mc1502)
14141410   MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
r23720r23721
19661962   ROMX_LOAD("basicjx.rom",   0xe8000, 0x08000, NO_DUMP, ROM_BIOS(1)) // boot fails due of this.
19671963   ROM_SYSTEM_BIOS( 1, "unk", "unk" )
19681964   ROMX_LOAD("ipljx.rom", 0xe0000, 0x20000, CRC(36a7b2de) SHA1(777db50c617725e149bca9b18cf51ce78f6dc548), ROM_BIOS(2))
1969   ROM_FILL(0xff195, 1, 0x20) // the bios has a bug that causes an interrupt
1970   ROM_FILL(0xff196, 1, 0x06) // to arrive before a flag is set causing the boot to hang
1971   ROM_FILL(0xff197, 1, 0x84) // technically this should be fixed in the PIC by delaying
1972   ROM_FILL(0xff198, 1, 0x04) // sending an irq after the mask is changed but there is
1973   ROM_FILL(0xff199, 1, 0xe6) // a strong possiblility that will cause problems with later
1974   ROM_FILL(0xff19a, 1, 0x21) // faster x86 machines.
19751965
19761966   ROM_REGION(0x08100,"gfx1", 0) //TODO: needs a different charset
19771967   ROM_LOAD("cga.chr",     0x00000, 0x01000, BAD_DUMP CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd)) // from an unknown clone cga card
trunk/src/mess/drivers/pc9801.c
r23720r23721
354354      : driver_device(mconfig, type, tag),
355355      m_maincpu(*this, "maincpu"),
356356      m_dmac(*this, "i8237"),
357      m_pic1(*this, "pic8259_master"),
358      m_pic2(*this, "pic8259_slave"),
357359      m_fdc_2hd(*this, "upd765_2hd"),
358360      m_fdc_2dd(*this, "upd765_2dd"),
359361      m_rtc(*this, UPD1990A_TAG),
r23720r23721
369371
370372   required_device<cpu_device> m_maincpu;
371373   required_device<am9517a_device> m_dmac;
374   required_device<pic8259_device> m_pic1;
375   required_device<pic8259_device> m_pic2;
372376   required_device<upd765a_device> m_fdc_2hd;
373377   optional_device<upd765a_device> m_fdc_2dd;
374378   required_device<upd1990a_device> m_rtc;
r23720r23721
486490   inline UINT8 m_pc9801rs_grcg_r(UINT32 offset,int vbank);
487491   inline void m_pc9801rs_grcg_w(UINT32 offset,int vbank,UINT8 data);
488492   DECLARE_CUSTOM_INPUT_MEMBER(system_type_r);
493   static UINT32 pc9801_286_a20(bool state);
489494
490495   DECLARE_WRITE8_MEMBER(sasi_data_w);
491496   DECLARE_WRITE_LINE_MEMBER(sasi_io_w);
r23720r23721
535540   DECLARE_WRITE8_MEMBER(pc9821_memory_w);
536541//  DECLARE_READ8_MEMBER(pc9801_ext_opna_r);
537542//  DECLARE_WRITE8_MEMBER(pc9801_ext_opna_w);
543   DECLARE_READ8_MEMBER(pic_r);
544   DECLARE_WRITE8_MEMBER(pic_w);
538545
539546   DECLARE_READ8_MEMBER(pc9801rs_ide_io_0_r);
540547   DECLARE_READ8_MEMBER(pc9801rs_ide_io_1_r);
r23720r23721
608615   INTERRUPT_GEN_MEMBER(pc9801_vrtc_irq);
609616//  DECLARE_INPUT_CHANGED_MEMBER(key_stroke);
610617//  DECLARE_INPUT_CHANGED_MEMBER(shift_stroke);
611   DECLARE_WRITE_LINE_MEMBER(pc9801_master_set_int_line);
612618   DECLARE_READ8_MEMBER(get_slave_ack);
613619   DECLARE_WRITE_LINE_MEMBER(pc9801_dma_hrq_changed);
614620   DECLARE_WRITE_LINE_MEMBER(pc9801_tc_w);
r23720r23721
624630   DECLARE_WRITE8_MEMBER(fdc_2dd_w);
625631   DECLARE_READ8_MEMBER(ppi_sys_porta_r);
626632   DECLARE_READ8_MEMBER(ppi_sys_portb_r);
633   DECLARE_READ8_MEMBER(ppi_sys_portc_r);
627634   DECLARE_READ8_MEMBER(ppi_prn_portb_r);
628635   DECLARE_WRITE8_MEMBER(ppi_sys_portc_w);
629636   DECLARE_READ8_MEMBER(ppi_fdd_porta_r);
r23720r23721
958965      if(offset & 0x14)
959966         printf("Read to undefined port [%02x]\n",offset+0x00);
960967      else
961         return machine().device<pic8259_device>((offset & 8) ? "pic8259_slave" : "pic8259_master")->read(space, (offset & 2) >> 1);
968         return ((offset & 8) ? m_pic2 : m_pic1)->read(space, (offset & 2) >> 1);
962969   }
963970   else // odd
964971   {
r23720r23721
975982      if(offset & 0x14)
976983         printf("Write to undefined port [%02x] <- %02x\n",offset+0x00,data);
977984      else
978         machine().device<pic8259_device>((offset & 8) ? "pic8259_slave" : "pic8259_master")->write(space, (offset & 2) >> 1, data);
985         ((offset & 8) ? m_pic2 : m_pic1)->write(space, (offset & 2) >> 1, data);
979986   }
980987   else // odd
981988   {
r23720r23721
18571864      /* reset POR bit, TODO: is there any other way? */
18581865      por = machine().device<i8255_device>("ppi8255_sys")->read(space, 2) & ~0x20;
18591866      machine().device<i8255_device>("ppi8255_sys")->write(space, 2,por);
1867      m_maincpu->set_input_line(INPUT_LINE_A20, 0);
18601868      m_maincpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
1869      m_gate_a20 = 0;
18611870   }
18621871
18631872   if(offset == 0x02)
r23720r23721
18701879      else if(data == 0x03)
18711880         m_gate_a20 = 0;
18721881   }
1882   m_maincpu->set_input_line(INPUT_LINE_A20, m_gate_a20);
18731883}
18741884
18751885READ8_MEMBER(pc9801_state::pc9801rs_30_r)
r23720r23721
22622272{
22632273   //printf("%08x %d\n",offset,m_gate_a20);
22642274
2265   //if(m_gate_a20 == 0)
2266   //  offset &= 0xfffff;
2275   if(m_gate_a20 == 0)
2276      offset &= 0xfffff;
22672277
22682278   if     (                        offset <= 0x0009ffff)                   { return pc9801rs_wram_r(space,offset);               }
22692279   else if(offset >= 0x000a0000 && offset <= 0x000a3fff)                   { return pc9801_tvram_r(space,offset-0xa0000);        }
r23720r23721
22792289
22802290WRITE8_MEMBER(pc9801_state::pc9801ux_memory_w)
22812291{
2282   //if(m_gate_a20 == 0)
2283   //  offset &= 0xfffff;
2292   if(m_gate_a20 == 0)
2293      offset &= 0xfffff;
22842294
22852295   if     (                        offset <= 0x0009ffff)                   { pc9801rs_wram_w(space,offset,data);                  }
22862296   else if(offset >= 0x000a0000 && offset <= 0x000a3fff)                   { pc9801_tvram_w(space,offset-0xa0000,data);           }
r23720r23721
22912301   //  printf("%08x %08x\n",offset,data);
22922302}
22932303
2304READ8_MEMBER(pc9801_state::pic_r)
2305{
2306   return ((offset >= 4) ? m_pic2 : m_pic1)->read(space, offset & 3);
2307}
2308
2309WRITE8_MEMBER(pc9801_state::pic_w)
2310{
2311   ((offset >= 4) ? m_pic2 : m_pic1)->write(space, offset & 3, data);
2312}
2313
22942314static ADDRESS_MAP_START( pc9801ux_map, AS_PROGRAM, 16, pc9801_state )
2295   /* TODO! */
2296   AM_RANGE(0x000000, 0xffffff) AM_READWRITE8(pc980ux_memory_r,pc9801ux_memory_w,0xffff)
2315   AM_RANGE(0x000000, 0x09ffff) AM_RAMBANK("wram")
2316   AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE8(pc9801_tvram_r, pc9801_tvram_w, 0xffff)
2317   AM_RANGE(0x0a4000, 0x0a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffff)
2318   AM_RANGE(0x0a8000, 0x0b0fff) AM_READWRITE8(pc9801_gvram_r, pc9801_gvram_w, 0xffff)
2319   AM_RANGE(0x0e0000, 0x0fffff) AM_READ8(pc9801rs_ipl_r, 0xffff)
2320
2321//   AM_RANGE(0x000000, 0xffffff) AM_READWRITE8(pc980ux_memory_r,pc9801ux_memory_w,0xffff)
22972322ADDRESS_MAP_END
22982323
22992324static ADDRESS_MAP_START( pc9801ux_io, AS_IO, 16, pc9801_state )
23002325   ADDRESS_MAP_UNMAP_HIGH
2301   AM_RANGE(0x0000, 0x001f) AM_READWRITE8(pc9801_00_r,        pc9801_00_w,        0xffff) // i8259 PIC (bit 3 ON slave / master) / i8237 DMA
2326
2327   AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("i8237", am9517a_device, read, write, 0xff00)
2328   AM_RANGE(0x0000, 0x000f) AM_READWRITE8(pic_r, pic_w, 0x00ff) // i8259 PIC (bit 3 ON slave / master) / i8237 DMA
23022329   AM_RANGE(0x0020, 0x0027) AM_READWRITE8(pc9801_20_r,        pc9801_20_w,        0xffff) // RTC / DMA registers (LS244)
23032330   AM_RANGE(0x0030, 0x0037) AM_READWRITE8(pc9801rs_30_r,      pc9801_30_w,        0xffff) //i8251 RS232c / i8255 system port
23042331   AM_RANGE(0x0040, 0x0047) AM_READWRITE8(pc9801_40_r,        pc9801_40_w,        0xffff) //i8255 printer port / i8251 keyboard
r23720r23721
29142941*/
29152942
29162943
2917WRITE_LINE_MEMBER(pc9801_state::pc9801_master_set_int_line)
2918{
2919   //printf("%02x\n",interrupt);
2920   m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
2921}
2922
29232944READ8_MEMBER(pc9801_state::get_slave_ack)
29242945{
29252946   if (offset==7) { // IRQ = 7
r23720r23721
31003121   m_beeper->set_state(!(data & 0x08));
31013122}
31023123
3124READ8_MEMBER(pc9801_state::ppi_sys_portc_r)
3125{
3126   return 0xa0; // 0x80 cpu triple fault reset flag?
3127}
3128
31033129static I8255A_INTERFACE( ppi_system_intf )
31043130{
31053131   DEVCB_DRIVER_MEMBER(pc9801_state,ppi_sys_porta_r),                  /* Port A read */
31063132   DEVCB_NULL,                 /* Port A write */
31073133   DEVCB_DRIVER_MEMBER(pc9801_state,ppi_sys_portb_r),                  /* Port B read */
31083134   DEVCB_NULL,                 /* Port B write */
3109   DEVCB_NULL,                 /* Port C read */
3135   DEVCB_DRIVER_MEMBER(pc9801_state,ppi_sys_portc_r),                 /* Port C read */
31103136   DEVCB_DRIVER_MEMBER(pc9801_state,ppi_sys_portc_w)                   /* Port C write */
31113137};
31123138
r23720r23721
32363262void pc9801_state::fdc_2hd_irq(bool state)
32373263{
32383264//  printf("IRQ 2HD %d\n",state);
3239   machine().device<pic8259_device>("pic8259_slave")->ir3_w(state);
3265   m_pic2->ir3_w(state);
32403266}
32413267
32423268void pc9801_state::fdc_2hd_drq(bool state)
r23720r23721
32513277
32523278   if(m_fdc_2dd_ctrl & 8)
32533279   {
3254      machine().device<pic8259_device>("pic8259_slave")->ir2_w(state);
3280      m_pic2->ir2_w(state);
32553281   }
32563282}
32573283
r23720r23721
32683294   //printf("%02x %d\n",m_fdc_ctrl,state);
32693295
32703296   if(m_fdc_ctrl & 1)
3271      machine().device<pic8259_device>("pic8259_slave")->ir3_w(state);
3297      m_pic2->ir3_w(state);
32723298   else
3273      machine().device<pic8259_device>("pic8259_slave")->ir2_w(state);
3299      m_pic2->ir2_w(state);
32743300}
32753301
32763302void pc9801_state::pc9801rs_fdc_drq(bool state)
r23720r23721
32963322   DEVCB_NULL
32973323};
32983324
3325UINT32 pc9801_state::pc9801_286_a20(bool state)
3326{
3327   return (state ? 0xffffff : 0x0fffff);
3328}
3329
3330static const i80286_interface pc9801_286 =
3331{
3332   pc9801_state::pc9801_286_a20
3333};
3334
32993335/****************************************
33003336*
33013337* Init emulation status
r23720r23721
33153351
33163352IRQ_CALLBACK_MEMBER(pc9801_state::irq_callback)
33173353{
3318   return machine().device<pic8259_device>( "pic8259_master" )->acknowledge();
3354   return m_pic1->acknowledge();
33193355}
33203356
33213357MACHINE_START_MEMBER(pc9801_state,pc9801_common)
r23720r23721
33653401{
33663402   MACHINE_START_CALL_MEMBER(pc9801_common);
33673403
3368   m_work_ram = auto_alloc_array(machine(), UINT8, 0xa0000);
3369   m_ext_work_ram = auto_alloc_array(machine(), UINT8, 0x700000);
3370   save_pointer(NAME(m_work_ram), 0xa0000);
3371   save_pointer(NAME(m_ext_work_ram), 0x700000);
3404   m_work_ram = m_ram->pointer();
3405   m_ext_work_ram = m_ram->pointer() + 0xa0000;
33723406
33733407   m_ram_size = m_ram->size() - 0xa0000;
33743408
3409   // TODO: rs and 9821 also
3410   if(!strncmp(machine().system().name, "pc9801ux", 8))
3411   {
3412      address_space& space = m_maincpu->space(AS_PROGRAM);
3413      membank("wram")->set_base(m_ram->pointer());
3414      space.install_read_bank(0x100000,  0x100000 + m_ram_size - 1, "ext_wram");
3415      space.install_write_bank(0x100000,  0x100000 + m_ram_size - 1, "ext_wram");
3416      membank("ext_wram")->set_base(m_ram->pointer() + 0xa0000);
3417   }
3418
33753419   upd765a_device *fdc;
33763420   fdc = machine().device<upd765a_device>(":upd765_2hd");
33773421   fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(pc9801_state::pc9801rs_fdc_irq), this));
r23720r23721
34623506   m_keyb_press = 0xff; // temp kludge, for PC-9821 booting
34633507//  m_has_opna = ioport("SOUND_CONFIG")->read() & 1;
34643508   memset(m_work_ram, 0, sizeof(UINT8) * 0xa0000);
3509   m_maincpu->set_input_line(INPUT_LINE_A20, m_gate_a20);
34653510}
34663511
34673512MACHINE_RESET_MEMBER(pc9801_state,pc9821)
r23720r23721
34753520{
34763521   if(m_vrtc_irq_mask)
34773522   {
3478      machine().device<pic8259_device>("pic8259_master")->ir2_w(0);
3479      machine().device<pic8259_device>("pic8259_master")->ir2_w(1);
3523      m_pic1->ir2_w(0);
3524      m_pic1->ir2_w(1);
34803525      m_vrtc_irq_mask = 0; // TODO: this irq auto-masks?
34813526   }
34823527//  else
r23720r23721
34993544      {
35003545//          printf("irq %02x\n",m_mouse.freq_reg);
35013546         m_mouse.freq_index = 0;
3502         machine().device<pic8259_device>("pic8259_slave")->ir5_w(0);
3503         machine().device<pic8259_device>("pic8259_slave")->ir5_w(1);
3547         m_pic2->ir5_w(0);
3548         m_pic2->ir5_w(1);
35043549      }
35053550   }
35063551}
35073552
35083553WRITE_LINE_MEMBER( pc9801_state::keyboard_irq )
35093554{
3510   machine().device<pic8259_device>("pic8259_master")->ir1_w(state);
3555   m_pic1->ir1_w(state);
35113556}
35123557
35133558static PC9801_KBD_INTERFACE( pc9801_keyboard_intf )
r23720r23721
35493594
35503595   MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config )
35513596   MCFG_I8237_ADD("i8237", 5000000, dmac_intf) // unknown clock
3552   MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) )
3597   MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
35533598   MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
35543599   MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf )
35553600   MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf )
r23720r23721
36183663
36193664   MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config )
36203665   MCFG_I8237_ADD("i8237", MAIN_CLOCK_X1*8, pc9801rs_dmac_intf) // unknown clock
3621   MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) )
3666   MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
36223667   MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
36233668   MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf )
36243669   MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf )
r23720r23721
36633708   MCFG_SOUND_ROUTE(ALL_OUTPUTS,"mono",0.15)
36643709MACHINE_CONFIG_END
36653710
3666static const unsigned i286_address_mask = 0x00ffffff;
3711static const UINT32 a20_mask = 0xfffff;
36673712
36683713static MACHINE_CONFIG_DERIVED( pc9801ux, pc9801rs )
36693714   MCFG_CPU_REPLACE("maincpu",I80286,10000000)
3670   MCFG_CPU_CONFIG(i286_address_mask)
3715   MCFG_CPU_CONFIG(a20_mask)
36713716   MCFG_CPU_PROGRAM_MAP(pc9801ux_map)
36723717   MCFG_CPU_IO_MAP(pc9801ux_io)
3718   MCFG_CPU_CONFIG(pc9801_286)
36733719   MCFG_CPU_VBLANK_INT_DRIVER("screen", pc9801_state, pc9801_vrtc_irq)
36743720MACHINE_CONFIG_END
36753721
r23720r23721
36843730
36853731   MCFG_PIT8253_ADD( "pit8253", pc9821_pit8253_config )
36863732   MCFG_I8237_ADD("i8237", 16000000, pc9801rs_dmac_intf) // unknown clock
3687   MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) )
3733   MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
36883734   MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
36893735   MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf )
36903736   MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf )
trunk/src/mess/drivers/isbc.c
r23720r23721
132132   MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
133133MACHINE_CONFIG_END
134134
135static const unsigned i286_address_mask = 0x00ffffff;
136
137135static MACHINE_CONFIG_START( isbc286, isbc_state )
138136   /* basic machine hardware */
139137   MCFG_CPU_ADD("maincpu", I80286, XTAL_9_8304MHz)
140138   MCFG_CPU_PROGRAM_MAP(isbc286_mem)
141139   MCFG_CPU_IO_MAP(isbc286_io)
142   MCFG_CPU_CONFIG(i286_address_mask)
143140
144141   /* video hardware */
145142   MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
r23720r23721
150147   MCFG_CPU_ADD("maincpu", I80286, XTAL_9_8304MHz)
151148   MCFG_CPU_PROGRAM_MAP(isbc2861_mem)
152149   MCFG_CPU_IO_MAP(isbc2861_io)
153   MCFG_CPU_CONFIG(i286_address_mask)
154150
155151   /* video hardware */
156152   MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
trunk/src/mess/drivers/amstr_pc.c
r23720r23721
210210
211211INPUT_PORTS_END
212212
213static const unsigned i86_address_mask = 0x000fffff;
214
215213static const pc_lpt_interface pc_lpt_config =
216214{
217215   DEVCB_CPU_INPUT_LINE("maincpu", 0)
r23720r23721
236234   MCFG_CPU_ADD("maincpu", type, clock)                \
237235   MCFG_CPU_PROGRAM_MAP(mem##_map) \
238236   MCFG_CPU_IO_MAP(port##_io)  \
239   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", amstrad_pc_state, vblankfunc, "screen", 0, 1) \
240   MCFG_CPU_CONFIG(i86_address_mask)
237   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", amstrad_pc_state, vblankfunc, "screen", 0, 1)
241238
242239
243240static const gfx_layout pc200_charlayout =
trunk/src/mess/machine/pc.c
r23720r23721
301301
302302WRITE_LINE_MEMBER(pc_state::pcjr_pic8259_set_int_line)
303303{
304   if ( machine().firstcpu->pc() == 0xF0454 )
304   UINT32 pc = machine().firstcpu->pc();
305   if ( (pc == 0xF0454) || (pc == 0xFF197) )
305306   {
306307      pc_int_delay_timer->adjust( machine().firstcpu->cycles_to_attotime(1), state );
307308   }
trunk/src/mess/includes/at.h
r23720r23721
155155   void pc_set_dma_channel(int channel, int state);
156156   IRQ_CALLBACK_MEMBER(at_irq_callback);
157157   void init_at_common();
158   static UINT32 at_286_a20(bool state);
158159};
159160
160161

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