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r23675 Thursday 13th June, 2013 at 15:43:56 UTC by Dirk Best

PC driver cleanup: - Much improved CS4031 emulation, added DMA, interrupt controller, timer, RTC directly to the device as sub devices and added the generic functions needed for AT compatibility - Moved the ct486 driver to its own file, to avoid all the legacy stuff in at.c - Added support for the IOCHCK signal to the ISA bus, this is used instead of directly issuing an NMI to the main CPU - Moved ISA device slot definitions to its own file to avoid copy & pasting the same list to different drivers - Updated MC146818 RTC for devcb2

[src/emu/machine]	mc146818.c mc146818.h
[src/mess]	mess.mak
[src/mess/drivers]	at.c ct486.c* genpc.c hx20.c ibmpc.c micronic.c pc1512.c qx10.c
[src/mess/includes]	at.h genpc.h pc1512.h
[src/mess/machine]	at.c cs4031.c cs4031.h e01.c isa.c isa.h isa_cards.c* isa_cards.h* southbridge.c southbridge.h

trunk/src/emu/machine/mc146818.c

r23674	r23675
115	115	: device_t(mconfig, MC146818, "NVRAM", tag, owner, clock),
116	116	device_rtc_interface(mconfig, *this),
117	117	device_nvram_interface(mconfig, *this),
	118	m_write_irq(*this),
118	119	m_type(MC146818_STANDARD),
119	120	m_index(0),
120	121	m_eindex(0),
r23674	r23675
154	155
155	156	set_base_datetime();
156	157
157		m_out_irq_func.resolve(m_out_irq_cb, *this);
	158	m_write_irq.resolve_safe();
158	159	}
159	160
160		//-------------------------------------------------
161		//  device_config_complete - perform any
162		//  operations now that the configuration is
163		//  complete
164		//-------------------------------------------------
165	161
166		void mc146818_device::device_config_complete()
167		{
168		// inherit a copy of the static data
169		const mc146818_interface *intf = reinterpret_cast<const mc146818_interface *>(static_config());
170		if (intf != NULL)
171		*static_cast<mc146818_interface *>(this) = *intf;
172
173		// or initialize to defaults if none provided
174		else
175		{
176		memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
177		}
178		}
179
180	162	//-------------------------------------------------
181	163	//  device_timer - handler timer events
182	164	//-------------------------------------------------
r23674	r23675
187	169
188	170	if (id == TIMER_PERIODIC) {
189	171	m_data[0x0c] |= 0xc0;
190		if (!m_out_irq_func.isnull()) m_out_irq_func(CLEAR_LINE);
	172	m_write_irq(CLEAR_LINE);
191	173	return;
192	174	}
193	175
r23674	r23675
292	274	}
293	275
294	276	// IRQ line is active low
295		if (!m_out_irq_func.isnull()) m_out_irq_func((m_data[0x0c] & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	277	m_write_irq((m_data[0x0c] & 0x80) ? CLEAR_LINE : ASSERT_LINE);
296	278
297	279	m_updated = true;  /* clock has been updated */
298	280	m_last_refresh = machine().time();
r23674	r23675
434	416	data = m_data[m_index % MC146818_DATA_SIZE] & 0xf0;
435	417	// read 0x0c will clear all IRQ flags in register 0x0c
436	418	m_data[m_index % MC146818_DATA_SIZE] &= 0x0f;
437		if (!m_out_irq_func.isnull()) m_out_irq_func(ASSERT_LINE);
	419	m_write_irq(ASSERT_LINE);
438	420	break;
439	421	case 0xd:
440	422	/* battery ok */

trunk/src/emu/machine/mc146818.h

r23674	r23675
19	19	//  INTERFACE CONFIGURATION MACROS
20	20	//**************************************************************************
21	21
22		#define MCFG_MC146818_IRQ_ADD(_tag, _type, _intrf) \
	22	#define MCFG_MC146818_IRQ_ADD(_tag, _type, _irq) \
23	23	MCFG_DEVICE_ADD(_tag, MC146818, 0) \
24	24	mc146818_device::static_set_type(*device, mc146818_device::_type); \
25		MCFG_DEVICE_CONFIG(_intrf)
	25	downcast<mc146818_device *>(device)->set_irq_callback(DEVCB2_##_irq);
26	26
27	27	#define MCFG_MC146818_ADD(_tag, _type) \
28	28	MCFG_DEVICE_ADD(_tag, MC146818, 0) \
r23674	r23675
32	32	//  TYPE DEFINITIONS
33	33	//**************************************************************************
34	34
35		// ======================> mc146818_interface
36
37		struct mc146818_interface
38		{
39		devcb_write_line    m_out_irq_cb;
40		};
41
42	35	// ======================> mc146818_device
43	36
44	37	class mc146818_device : public device_t,
45	38	public device_rtc_interface,
46		public device_nvram_interface,
47		public mc146818_interface
	39	public device_nvram_interface
48	40	{
49	41	public:
50	42	// values
r23674	r23675
62	54	// inline configuration helpers
63	55	static void static_set_type(device_t &device, mc146818_type type);
64	56
	57	// callbacks
	58	template<class _irq> void set_irq_callback(_irq irq) { m_write_irq.set_callback(irq); }
	59
65	60	// read/write access
66	61	DECLARE_READ8_MEMBER( read );
67	62	DECLARE_WRITE8_MEMBER( write );
68	63
	64	DECLARE_WRITE8_MEMBER( address_w ) { write(space, 0, data); }
	65	DECLARE_READ8_MEMBER( data_r ) { return read(space, 1); }
	66	DECLARE_WRITE8_MEMBER( data_w ) { write(space, 1, data); }
	67
69	68	protected:
70	69	// device-level overrides
71	70	virtual void device_start();
72		virtual void device_config_complete();
73	71	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
74	72
75	73	// device_rtc_interface overrides
r23674	r23675
84	82	int dec_2_local(int a);
85	83	void set_base_datetime();
86	84
	85	devcb2_write_line m_write_irq;
	86
87	87	// internal state
88	88	static const int MC146818_DATA_SIZE = 0x80;
89	89
r23674	r23675
105	105
106	106	emu_timer *m_clock_timer;
107	107	emu_timer *m_periodic_timer;
108
109		devcb_resolved_write_line m_out_irq_func;
110	108	};
111	109
112	110

trunk/src/mess/mess.mak

r23674	r23675
538	538	$(MESSOBJ)/intelgnt.a \
539	539	$(MESSOBJ)/interton.a \
540	540	$(MESSOBJ)/intv.a \
	541	$(MESSOBJ)/isa.a \
541	542	$(MESSOBJ)/kaypro.a \
542	543	$(MESSOBJ)/koei.a \
543	544	$(MESSOBJ)/kyocera.a \
r23674	r23675
735	736	$(MESS_MACHINE)/i8271.o     \
736	737	$(MESS_MACHINE)/ieee488.o   \
737	738	$(MESS_MACHINE)/imi5000h.o  \
738		$(MESS_MACHINE)/isa.o       \
739	739	$(MESS_MACHINE)/kb3600.o    \
740	740	$(MESS_MACHINE)/keyboard.o  \
741	741	$(MESS_MACHINE)/kr2376.o    \
r23674	r23675
771	771	$(MESS_MACHINE)/vcsctrl.o   \
772	772	$(MESS_MACHINE)/z80bin.o    \
773	773
	774	$(MESSOBJ)/isa.a: \
	775	$(MESS_MACHINE)/isa.o       \
	776	$(MESS_MACHINE)/isa_cards.o \
	777	$(MESS_VIDEO)/isa_mda.o     \
	778	$(MESS_MACHINE)/isa_wdxt_gen.o  \
	779	$(MESS_MACHINE)/isa_adlib.o \
	780	$(MESS_MACHINE)/isa_com.o   \
	781	$(MESS_MACHINE)/isa_fdc.o   \
	782	$(MESS_MACHINE)/isa_finalchs.o  \
	783	$(MESS_MACHINE)/isa_gblaster.o  \
	784	$(MESS_MACHINE)/isa_gus.o   \
	785	$(MESS_MACHINE)/isa_hdc.o   \
	786	$(MESS_MACHINE)/isa_ibm_mfc.o   \
	787	$(MESS_MACHINE)/isa_mpu401.o\
	788	$(MESS_MACHINE)/isa_sblaster.o  \
	789	$(MESS_MACHINE)/isa_stereo_fx.o \
	790	$(MESS_MACHINE)/isa_ssi2001.o   \
	791	$(MESS_MACHINE)/isa_ide.o   \
	792	$(MESS_MACHINE)/isa_ide8.o   \
	793	$(MESS_MACHINE)/isa_ide_cd.o\
	794	$(MESS_MACHINE)/isa_aha1542.o   \
	795	$(MESS_VIDEO)/isa_cga.o     \
	796	$(MESS_VIDEO)/isa_svga_cirrus.o \
	797	$(MESS_VIDEO)/isa_ega.o     \
	798	$(MESS_VIDEO)/isa_vga.o     \
	799	$(MESS_VIDEO)/isa_vga_ati.o \
	800	$(MESS_VIDEO)/isa_svga_tseng.o      \
	801	$(MESS_VIDEO)/isa_svga_s3.o \
	802	$(MESS_VIDEO)/s3virge.o \
774	803
775	804	#-------------------------------------------------
776	805	# manufacturer-specific groupings for drivers
r23674	r23675
835	864	$(MESS_MACHINE)/pc1512kb.o  \
836	865	$(MESS_VIDEO)/pc1512.o      \
837	866	$(MESS_VIDEO)/pc1640.o      \
838		$(MESS_MACHINE)/isa_wdxt_gen.o  \
839	867	$(MESS_VIDEO)/nc.o          \
840	868	$(MESS_DRIVERS)/nc.o        \
841	869	$(MESS_MACHINE)/nc.o        \
r23674	r23675
949	977
950	978	$(MESSOBJ)/at.a:                \
951	979	$(MESS_MACHINE)/at_keybc.o  \
952		$(MESS_MACHINE)/cs4031.o    \
953	980	$(MESS_MACHINE)/cs8221.o    \
954	981	$(MESS_MACHINE)/at.o        \
955	982	$(MESS_DRIVERS)/at.o        \
	983	$(MESS_MACHINE)/cs4031.o    \
	984	$(MESS_DRIVERS)/ct486.o     \
956	985
957	986	$(MESSOBJ)/atari.a:             \
958	987	$(MESS_MACHINE)/ataricrt.o  \
r23674	r23675
1776	1805	$(MESS_MACHINE)/pc_keyboards.o \
1777	1806	$(MESS_MACHINE)/kb_keytro.o \
1778	1807	$(MESS_MACHINE)/kb_msnat.o  \
1779		$(MESS_MACHINE)/isa_adlib.o \
1780	1808	$(MESS_MACHINE)/ser_mouse.o \
1781		$(MESS_MACHINE)/isa_com.o   \
1782		$(MESS_MACHINE)/isa_fdc.o   \
1783		$(MESS_MACHINE)/isa_finalchs.o  \
1784		$(MESS_MACHINE)/isa_gblaster.o  \
1785		$(MESS_MACHINE)/isa_gus.o   \
1786		$(MESS_MACHINE)/isa_hdc.o   \
1787		$(MESS_MACHINE)/isa_ibm_mfc.o   \
1788		$(MESS_MACHINE)/isa_mpu401.o\
1789		$(MESS_MACHINE)/isa_sblaster.o  \
1790		$(MESS_MACHINE)/isa_stereo_fx.o \
1791		$(MESS_MACHINE)/isa_ssi2001.o   \
1792		$(MESS_MACHINE)/isa_ide.o   \
1793		$(MESS_MACHINE)/isa_ide8.o   \
1794		$(MESS_MACHINE)/isa_ide_cd.o\
1795		$(MESS_MACHINE)/isa_aha1542.o   \
1796		$(MESS_VIDEO)/isa_cga.o     \
1797		$(MESS_VIDEO)/isa_mda.o     \
1798	1809	$(MESS_VIDEO)/crtc_ega.o    \
1799		$(MESS_VIDEO)/isa_ega.o     \
1800		$(MESS_VIDEO)/isa_vga.o     \
1801		$(MESS_VIDEO)/isa_vga_ati.o \
1802		$(MESS_VIDEO)/isa_svga_tseng.o      \
1803		$(MESS_VIDEO)/isa_svga_s3.o \
1804		$(MESS_VIDEO)/s3virge.o \
1805		$(MESS_VIDEO)/isa_svga_cirrus.o \
1806	1810	$(MESS_MACHINE)/i82371ab.o  \
1807	1811	$(MESS_MACHINE)/i82371sb.o  \
1808	1812	$(MESS_MACHINE)/i82439tx.o  \

trunk/src/mess/drivers/micronic.c

r23674	r23675
358	358	m_maincpu->set_input_line(0, !state ? HOLD_LINE : CLEAR_LINE);
359	359	}
360	360
361		const struct mc146818_interface micronic_mc146818_config =
362		{
363		DEVCB_DRIVER_LINE_MEMBER(micronic_state, mc146818_irq)
364		};
365	361
366	362	static MACHINE_CONFIG_START( micronic, micronic_state )
367	363	/* basic machine hardware */
r23674	r23675
393	389
394	390	MCFG_NVRAM_HANDLER(micronic)
395	391
396		MCFG_MC146818_IRQ_ADD( MC146818_TAG, MC146818_IGNORE_CENTURY, micronic_mc146818_config )
	392	MCFG_MC146818_IRQ_ADD( MC146818_TAG, MC146818_IGNORE_CENTURY, WRITELINE(micronic_state, mc146818_irq))
397	393	MACHINE_CONFIG_END
398	394
399	395	/* ROM definition */

trunk/src/mess/drivers/genpc.c

r23674	r23675
13	13
14	14	#include "cpu/nec/nec.h"
15	15	#include "cpu/i86/i86.h"
16
17		#include "video/isa_cga.h"
18		#include "video/isa_ega.h"
19		#include "video/isa_mda.h"
20		#include "video/isa_svga_tseng.h"
21		#include "video/isa_svga_s3.h"
22
23		#include "machine/ram.h"
24		#include "machine/isa.h"
25
26		#include "machine/isa_adlib.h"
27		#include "machine/isa_com.h"
28		#include "machine/isa_fdc.h"
29		#include "machine/isa_finalchs.h"
30		#include "machine/isa_gblaster.h"
31		#include "machine/isa_hdc.h"
32		#include "machine/isa_sblaster.h"
33		#include "machine/isa_mpu401.h"
34		#include "machine/3c503.h"
35		#include "machine/ne1000.h"
36		#include "machine/isa_ibm_mfc.h"
37	16	#include "machine/pc_lpt.h"
38
39	17	#include "machine/pc_keyboards.h"
40	18
41	19	class genpc_state : public driver_device
r23674	r23675
91	69	DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x00)
92	70	DEVICE_INPUT_DEFAULTS_END
93	71
94		static SLOT_INTERFACE_START(pc_isa8_cards)
95		SLOT_INTERFACE("mda", ISA8_MDA)
96		SLOT_INTERFACE("cga", ISA8_CGA)
97		SLOT_INTERFACE("ega", ISA8_EGA)
98		SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
99		SLOT_INTERFACE("com", ISA8_COM)
100		SLOT_INTERFACE("fdc", ISA8_FDC_SUPERIO)
101		SLOT_INTERFACE("fdc_xt", ISA8_FDC_XT)
102		SLOT_INTERFACE("fdc_at", ISA8_FDC_AT)
103		SLOT_INTERFACE("fdc_smc", ISA8_FDC_SMC)
104		SLOT_INTERFACE("fdc_ps2", ISA8_FDC_PS2)
105		SLOT_INTERFACE("finalchs", ISA8_FINALCHS)
106		SLOT_INTERFACE("hdc", ISA8_HDC)
107		SLOT_INTERFACE("adlib", ISA8_ADLIB)
108		SLOT_INTERFACE("hercules", ISA8_HERCULES)
109		SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
110		SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
111		SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
112		SLOT_INTERFACE("mpu401", ISA8_MPU401)
113		SLOT_INTERFACE("ne1000", NE1000)
114		SLOT_INTERFACE("3c503", EL2_3C503)
115		SLOT_INTERFACE("lpt", ISA8_LPT)
116		SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
117		SLOT_INTERFACE_END
118	72
119	73	static MACHINE_CONFIG_START( pcmda, genpc_state )
120	74	/* basic machine hardware */

trunk/src/mess/drivers/ct486.c

r0	r23675
	1	/***************************************************************************
	2
	3	PC/AT 486 with Chips & Technologies CS4031 chipset
	4
	5	***************************************************************************/
	6
	7	#include "emu.h"
	8	#include "cpu/i386/i386.h"
	9	#include "machine/ram.h"
	10	#include "machine/cs4031.h"
	11	#include "machine/at_keybc.h"
	12	#include "machine/pc_kbdc.h"
	13	#include "machine/pc_keyboards.h"
	14	#include "machine/isa.h"
	15	#include "machine/isa_cards.h"
	16	#include "sound/speaker.h"
	17
	18
	19	//**************************************************************************
	20	//  TYPE DEFINITIONS
	21	//**************************************************************************
	22
	23	class ct486_state : public driver_device
	24	{
	25	public:
	26	ct486_state(const machine_config &mconfig, device_type type, const char *tag) :
	27	driver_device(mconfig, type, tag),
	28	m_maincpu(*this, "maincpu"),
	29	m_cs4031(*this, "cs4031"),
	30	m_isabus(*this, "isabus"),
	31	m_speaker(*this, "speaker")
	32	{ }
	33
	34	required_device<cpu_device> m_maincpu;
	35	required_device<cs4031_device> m_cs4031;
	36	required_device<isa16_device> m_isabus;
	37	required_device<speaker_sound_device> m_speaker;
	38
	39	virtual void machine_start();
	40
	41	IRQ_CALLBACK_MEMBER( irq_callback ) { return m_cs4031->int_ack_r(); }
	42
	43	DECLARE_READ16_MEMBER( cs4031_ior );
	44	DECLARE_WRITE16_MEMBER( cs4031_iow );
	45	DECLARE_WRITE_LINE_MEMBER( cs4031_hold );
	46	DECLARE_WRITE8_MEMBER( cs4031_tc ) { m_isabus->eop_w(offset, data); }
	47	DECLARE_WRITE_LINE_MEMBER( cs4031_spkr ) { m_speaker->level_w(state); }
	48	};
	49
	50
	51	//**************************************************************************
	52	//  MACHINE EMULATION
	53	//**************************************************************************
	54
	55	void ct486_state::machine_start()
	56	{
	57	m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(ct486_state::irq_callback), this));
	58	}
	59
	60	READ16_MEMBER( ct486_state::cs4031_ior )
	61	{
	62	if (offset < 4)
	63	return m_isabus->dack_r(offset);
	64	else
	65	return m_isabus->dack16_r(offset);
	66	}
	67
	68	WRITE16_MEMBER( ct486_state::cs4031_iow )
	69	{
	70	if (offset < 4)
	71	m_isabus->dack_w(offset, data);
	72	else
	73	m_isabus->dack16_w(offset, data);
	74	}
	75
	76	WRITE_LINE_MEMBER( ct486_state::cs4031_hold )
	77	{
	78	// halt cpu
	79	m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
	80
	81	// and acknowledge hold
	82	m_cs4031->hlda_w(state);
	83	}
	84
	85
	86	//**************************************************************************
	87	//  ADDRESS MAPS
	88	//**************************************************************************
	89
	90	static ADDRESS_MAP_START( ct486_map, AS_PROGRAM, 32, ct486_state )
	91	ADDRESS_MAP_END
	92
	93	static ADDRESS_MAP_START( ct486_io, AS_IO, 32, ct486_state )
	94	ADDRESS_MAP_UNMAP_HIGH
	95	ADDRESS_MAP_END
	96
	97
	98	//**************************************************************************
	99	//  MACHINE DRIVERS
	100	//**************************************************************************
	101
	102	static const at_keyboard_controller_interface keybc_intf =
	103	{
	104	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, kbrst_w),
	105	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, gatea20_w),
	106	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq01_w),
	107	DEVCB_NULL,
	108	DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, clock_write_from_mb),
	109	DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, data_write_from_mb)
	110	};
	111
	112	static const pc_kbdc_interface pc_kbdc_intf =
	113	{
	114	DEVCB_DEVICE_LINE_MEMBER("keybc", at_keyboard_controller_device, keyboard_clock_w),
	115	DEVCB_DEVICE_LINE_MEMBER("keybc", at_keyboard_controller_device, keyboard_data_w)
	116	};
	117
	118	static const isa16bus_interface isabus_intf =
	119	{
	120	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq09_w),
	121	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq03_w),
	122	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq04_w),
	123	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq05_w),
	124	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq06_w),
	125	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq07_w),
	126	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq10_w),
	127	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq11_w),
	128	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq12_w),
	129	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq14_w),
	130	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq15_w),
	131	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq0_w),
	132	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq1_w),
	133	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq2_w),
	134	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq3_w),
	135	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq5_w),
	136	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq6_w),
	137	DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq7_w),
	138	};
	139
	140	static DEVICE_INPUT_DEFAULTS_START( ide_2nd )
	141	DEVICE_INPUT_DEFAULTS("DSW", 0x01, 0x01)
	142	DEVICE_INPUT_DEFAULTS_END
	143
	144	static MACHINE_CONFIG_START( ct486, ct486_state )
	145	MCFG_CPU_ADD("maincpu", I486, XTAL_25MHz)
	146	MCFG_CPU_PROGRAM_MAP(ct486_map)
	147	MCFG_CPU_IO_MAP(ct486_io)
	148
	149	MCFG_CS4031_ADD("cs4031", XTAL_25MHz, "maincpu", "isa", "bios", "keybc")
	150	// cpu connections
	151	MCFG_CS4031_HOLD(WRITELINE(ct486_state, cs4031_hold));
	152	MCFG_CS4031_NMI(INPUTLINE("maincpu", INPUT_LINE_NMI));
	153	MCFG_CS4031_INTR(INPUTLINE("maincpu", INPUT_LINE_IRQ0));
	154	MCFG_CS4031_CPURESET(INPUTLINE("maincpu", INPUT_LINE_RESET));
	155	MCFG_CS4031_A20M(INPUTLINE("maincpu", INPUT_LINE_A20));
	156	// isa dma
	157	MCFG_CS4031_IOR(READ16(ct486_state, cs4031_ior))
	158	MCFG_CS4031_IOW(WRITE16(ct486_state, cs4031_iow))
	159	MCFG_CS4031_TC(WRITE8(ct486_state, cs4031_tc))
	160	// speaker
	161	MCFG_CS4031_SPKR(WRITELINE(ct486_state, cs4031_spkr))
	162
	163	MCFG_RAM_ADD(RAM_TAG)
	164	MCFG_RAM_DEFAULT_SIZE("4M")
	165	MCFG_RAM_EXTRA_OPTIONS("1M,2M,8M,16M,32M,64M")
	166
	167	MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keybc_intf)
	168	MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
	169	MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
	170
	171	MCFG_ISA16_BUS_ADD("isabus", ":maincpu", isabus_intf)
	172	MCFG_ISA_BUS_IOCHCK(DEVWRITELINE("cs4031", cs4031_device, iochck_w))
	173	MCFG_ISA16_SLOT_ADD("isabus", "board1", pc_isa16_cards, "fdcsmc", true)
	174	MCFG_ISA16_SLOT_ADD("isabus", "board2", pc_isa16_cards, "comat", true)
	175	MCFG_ISA16_SLOT_ADD("isabus", "board3", pc_isa16_cards, "ide", true)
	176	MCFG_ISA16_SLOT_ADD("isabus", "board4", pc_isa16_cards, "lpt", true)
	177	MCFG_ISA16_SLOT_ADD("isabus", "isa1", pc_isa16_cards, "svga_et4k", false)
	178	MCFG_ISA16_SLOT_ADD("isabus", "isa2", pc_isa16_cards, NULL, false)
	179	MCFG_ISA16_SLOT_ADD("isabus", "isa3", pc_isa16_cards, NULL, false)
	180	MCFG_ISA16_SLOT_ADD("isabus", "isa4", pc_isa16_cards, NULL, false)
	181	MCFG_ISA16_SLOT_ADD("isabus", "isa5", pc_isa16_cards, "ide_cd", false) //2nd-ary IDE
	182	MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("ide_cd", ide_2nd)
	183
	184	// sound hardware
	185	MCFG_SPEAKER_STANDARD_MONO("mono")
	186	MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
	187	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
	188
	189	// video hardware
	190	MCFG_PALETTE_LENGTH(256) // todo: really needed?
	191	MACHINE_CONFIG_END
	192
	193
	194	//**************************************************************************
	195	//  ROM DEFINITIONS
	196	//**************************************************************************
	197
	198	ROM_START( ct486 )
	199	ROM_REGION(0x40000, "isa", ROMREGION_ERASEFF)
	200	ROM_REGION(0x100000, "bios", 0)
	201	ROM_LOAD("chips_1.ami", 0xf0000, 0x10000, CRC(a14a7511) SHA1(b88d09be66905ed2deddc26a6f8522e7d2d6f9a8))
	202	ROM_END
	203
	204
	205	//**************************************************************************
	206	//  GAME DRIVERS
	207	//**************************************************************************
	208
	209	COMP( 1993, ct486, 0, 0, ct486, 0, driver_device, 0, "<unknown>", "PC/AT 486 with CS4031 chipset", 0 )

Property changes on: trunk/src/mess/drivers/ct486.c

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/mess/drivers/qx10.c

r23674	r23675
445	445	MC146818
446	446	*/
447	447
448		const struct mc146818_interface qx10_mc146818_config =
449		{
450		DEVCB_DEVICE_LINE_MEMBER("pic8259_slave", pic8259_device, ir2_w)
451		};
452
453	448	WRITE8_MEMBER(qx10_state::mc146818_w)
454	449	{
455	450	m_rtc->write(space, !offset, data);
r23674	r23675
888	883	MCFG_I8237_ADD("8237dma_1", MAIN_CLK/4, qx10_dma8237_1_interface)
889	884	MCFG_I8237_ADD("8237dma_2", MAIN_CLK/4, qx10_dma8237_2_interface)
890	885	MCFG_UPD7220_ADD("upd7220", MAIN_CLK/6, hgdc_intf, upd7220_map) // unk clock
891		MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, qx10_mc146818_config )
	886	MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, DEVWRITELINE("pic8259_slave", pic8259_device, ir2_w))
892	887	MCFG_UPD765A_ADD("upd765", true, true)
893	888	MCFG_FLOPPY_DRIVE_ADD("upd765:0", qx10_floppies, "525dd", floppy_image_device::default_floppy_formats)
894	889	MCFG_FLOPPY_DRIVE_ADD("upd765:1", qx10_floppies, "525dd", floppy_image_device::default_floppy_formats)

trunk/src/mess/drivers/at.c

r23674	r23675
34	34	AM_RANGE(0xffff0000, 0xffffffff) AM_ROM AM_REGION("maincpu", 0x0f0000)
35	35	ADDRESS_MAP_END
36	36
37		// memory is mostly handled by the chipset
38		static ADDRESS_MAP_START( ct486_map, AS_PROGRAM, 32, at_state )
39		AM_RANGE(0x00800000, 0x00800bff) AM_RAM AM_SHARE("nvram")
40		ADDRESS_MAP_END
41
42
43	37	static ADDRESS_MAP_START( at586_map, AS_PROGRAM, 32, at586_state )
44	38	AM_RANGE(0x00000000, 0x0009ffff) AM_RAMBANK("bank10")
45	39	AM_RANGE(0x000a0000, 0x000bffff) AM_NOP
r23674	r23675
150	144	AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
151	145	ADDRESS_MAP_END
152	146
153
154		READ32_MEMBER( at_state::ct486_chipset_r )
155		{
156		if (ACCESSING_BITS_0_7)
157		return m_pic8259_master->read(space, 0);
158
159		if (ACCESSING_BITS_8_15)
160		return m_pic8259_master->read(space, 1) << 8;
161
162		if (ACCESSING_BITS_24_31)
163		return m_cs4031->data_r(space, 0, 0) << 24;
164
165		return 0xffffffff;
166		}
167
168		WRITE32_MEMBER( at_state::ct486_chipset_w )
169		{
170		if (ACCESSING_BITS_0_7)
171		m_pic8259_master->write(space, 0, data);
172
173		if (ACCESSING_BITS_8_15)
174		m_pic8259_master->write(space, 1, data >> 8);
175
176		if (ACCESSING_BITS_16_23)
177		m_cs4031->address_w(space, 0, data >> 16, 0);
178
179		if (ACCESSING_BITS_24_31)
180		m_cs4031->data_w(space, 0, data >> 24, 0);
181		}
182
183		static ADDRESS_MAP_START( ct486_io, AS_IO, 32, at_state )
184		ADDRESS_MAP_UNMAP_HIGH
185		AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", am9517a_device, read, write, 0xffffffff)
186		AM_RANGE(0x0020, 0x0023) AM_READWRITE(ct486_chipset_r, ct486_chipset_w)
187		AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8("pit8254", pit8254_device, read, write, 0xffffffff)
188		AM_RANGE(0x0060, 0x0063) AM_READWRITE8(at_keybc_r, at_keybc_w, 0xffff)
189		AM_RANGE(0x0064, 0x0067) AM_DEVREADWRITE8("keybc", at_keyboard_controller_device, status_r, command_w, 0xffff)
190		AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write , 0xffffffff)
191		AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
192		AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_slave", pic8259_device, read, write, 0xffffffff)
193		AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
194		ADDRESS_MAP_END
195
196
197	147	static ADDRESS_MAP_START( at586_io, AS_IO, 32, at586_state )
198	148	ADDRESS_MAP_UNMAP_HIGH
199	149	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
r23674	r23675
300	250	m_pic8259_slave->ir0_w((state) ? 0 : 1);
301	251	}
302	252
303		const struct mc146818_interface at_mc146818_config =
304		{
305		DEVCB_DRIVER_LINE_MEMBER(at_state, at_mc146818_irq)
306		};
307
308	253	static const isa16bus_interface isabus_intf =
309	254	{
310	255	// interrupts
r23674	r23675
332	277	DEVCB_DEVICE_LINE_MEMBER("dma8237_2", am9517a_device, dreq3_w),
333	278	};
334	279
335		static SLOT_INTERFACE_START(pc_isa16_cards)
336		// ISA 8 bit
337		SLOT_INTERFACE("mda", ISA8_MDA)
338		SLOT_INTERFACE("cga", ISA8_CGA)
339		SLOT_INTERFACE("wyse700", ISA8_WYSE700)
340		SLOT_INTERFACE("ega", ISA8_EGA)
341		SLOT_INTERFACE("vga", ISA8_VGA)
342		SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
343		SLOT_INTERFACE("svga_dm",ISA8_SVGA_CIRRUS)
344		SLOT_INTERFACE("com", ISA8_COM)
345		SLOT_INTERFACE("comat", ISA8_COM_AT)
346		SLOT_INTERFACE("fdc", ISA8_FDC_AT)
347		SLOT_INTERFACE("hdc", ISA8_HDC)
348		SLOT_INTERFACE("adlib", ISA8_ADLIB)
349		SLOT_INTERFACE("hercules", ISA8_HERCULES)
350		SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
351		SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
352		SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
353		SLOT_INTERFACE("stereo_fx", ISA8_STEREO_FX)
354		SLOT_INTERFACE("ssi2001", ISA8_SSI2001)
355		SLOT_INTERFACE("ne1000", NE1000)
356		SLOT_INTERFACE("3c503", EL2_3C503)
357		SLOT_INTERFACE("mpu401", ISA8_MPU401)
358		SLOT_INTERFACE("lpt", ISA8_LPT)
359		SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
360		SLOT_INTERFACE("fdcsmc", ISA8_FDC_SMC)
361		// ISA 16 bit
362		SLOT_INTERFACE("ide", ISA16_IDE)
363		SLOT_INTERFACE("ide_cd", ISA16_IDE_CD)
364		SLOT_INTERFACE("ne2000", NE2000)
365		SLOT_INTERFACE("aha1542", AHA1542)
366		SLOT_INTERFACE("gus",ISA16_GUS)
367		SLOT_INTERFACE("sblaster_16", ISA16_SOUND_BLASTER_16)
368		SLOT_INTERFACE("svga_s3",ISA16_SVGA_S3)
369		SLOT_INTERFACE("s3virge",ISA16_S3VIRGE)
370		SLOT_INTERFACE("s3virgedx",ISA16_S3VIRGEDX)
371		SLOT_INTERFACE("gfxultra",ISA16_VGA_GFXULTRA)
372		SLOT_INTERFACE_END
373
374	280	static MACHINE_CONFIG_FRAGMENT( at_motherboard )
375	281	MCFG_MACHINE_START_OVERRIDE(at_state, at )
376	282	MCFG_MACHINE_RESET_OVERRIDE(at_state, at )
r23674	r23675
387	293	MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
388	294	MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
389	295
390		MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, at_mc146818_config )
	296	MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, WRITELINE(at_state, at_mc146818_irq))
391	297
392	298	/* sound hardware */
393	299	MCFG_SPEAKER_STANDARD_MONO("mono")
r23674	r23675
591	497	MACHINE_CONFIG_END
592	498
593	499
594		static MACHINE_CONFIG_DERIVED( ct486, at386 )
595		MCFG_CPU_REPLACE("maincpu", I486, 25000000)
596		MCFG_CPU_PROGRAM_MAP(ct486_map)
597		MCFG_CPU_IO_MAP(ct486_io)
598
599		MCFG_CS4031_ADD("cs4031", "maincpu", "isa", "bios")
600
601		MCFG_DEVICE_REMOVE(RAM_TAG)
602		MCFG_RAM_ADD(RAM_TAG)
603		MCFG_RAM_DEFAULT_SIZE("4M")
604		MCFG_RAM_EXTRA_OPTIONS("1M,2M,8M,16M,32M,64M")
605		MACHINE_CONFIG_END
606
607
608	500	static MACHINE_CONFIG_START( k286i, at_state )
609	501	/* basic machine hardware */
610	502	MCFG_CPU_ADD("maincpu", I80286, XTAL_12MHz/2 /*6000000*/)
r23674	r23675
1192	1084	ROM_END
1193	1085
1194	1086
1195		// Unknown 486 board with Chips & Technologies CS4031 chipset
1196		ROM_START( ct486 )
1197		ROM_REGION(0x40000, "isa", ROMREGION_ERASEFF)
1198		ROM_REGION(0x100000, "bios", 0)
1199		ROM_LOAD("chips_1.ami", 0xf0000, 0x10000, CRC(a14a7511) SHA1(b88d09be66905ed2deddc26a6f8522e7d2d6f9a8))
1200		ROM_END
1201
1202
1203	1087	// FIC 486-PIO-2 (4 ISA, 4 PCI)
1204	1088	// VIA VT82C505 + VT82C496G + VT82C406MV, NS311/312 or NS332 I/O
1205	1089	ROM_START( ficpio2 )
r23674	r23675
1438	1322	COMP ( 1990, at586,    ibm5170, 0,       at586,     atvga, driver_device,      0,   "<generic>",  "PC/AT 586 (PIIX4)", GAME_NOT_WORKING )
1439	1323	COMP ( 1990, at586x3,  ibm5170, 0,       at586x3,   atvga, driver_device,      0,       "<generic>",  "PC/AT 586 (PIIX3)", GAME_NOT_WORKING )
1440	1324	COMP ( 1989, neat,     ibm5170, 0,       neat,      atvga, at_state,      atvga,  "<generic>",  "NEAT (VGA, MF2 Keyboard)", GAME_NOT_WORKING )
1441		COMP ( 1993, ct486,    ibm5170, 0,       ct486,     atvga, at_state,      atvga,  "<unknown>",  "PC/AT 486 with C&T chipset", GAME_NOT_WORKING )
1442	1325	COMP ( 1993, ec1849,   ibm5170, 0,       ec1849,    atcga, at_state,      atcga,  "<unknown>",  "EC-1849", GAME_NOT_WORKING )
1443	1326	COMP ( 1993, megapc,   ibm5170, 0,       megapc,    atvga, at_state,      atvga,  "Amstrad plc", "MegaPC", GAME_NOT_WORKING )
1444	1327	COMP ( 199?, megapcpl, ibm5170, 0,       megapcpl,  atvga, at_state,      atvga,  "Amstrad plc", "MegaPC Plus", GAME_NOT_WORKING )

trunk/src/mess/drivers/ibmpc.c

r23674	r23675
257	257	#include "cpu/i86/i86.h"
258	258	#include "machine/ram.h"
259	259	#include "machine/isa.h"
260		#include "machine/isa_adlib.h"
261		#include "machine/isa_com.h"
262		#include "machine/isa_fdc.h"
263		#include "machine/isa_finalchs.h"
264		#include "machine/isa_gblaster.h"
265		#include "machine/isa_hdc.h"
266		#include "machine/isa_sblaster.h"
267		#include "machine/isa_ide8.h"
268		#include "machine/3c503.h"
269		#include "video/isa_cga.h"
270		#include "video/isa_ega.h"
271		#include "video/isa_mda.h"
272		#include "video/isa_svga_tseng.h"
273		#include "machine/ne1000.h"
274		#include "machine/isa_mpu401.h"
275		#include "machine/isa_ibm_mfc.h"
	260	#include "machine/isa_cards.h"
276	261	#include "machine/pc_lpt.h"
277	262	#include "machine/pc_keyboards.h"
278	263	#include "includes/genpc.h"
r23674	r23675
314	299	//  DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x00)
315	300	//DEVICE_INPUT_DEFAULTS_END
316	301
317		static SLOT_INTERFACE_START(ibm_isa8_cards)
318		SLOT_INTERFACE("cga", ISA8_CGA)
319		SLOT_INTERFACE("ega", ISA8_EGA)
320		SLOT_INTERFACE("mda", ISA8_MDA)
321		SLOT_INTERFACE("hercules", ISA8_HERCULES)
322		SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
323		SLOT_INTERFACE("com", ISA8_COM)
324		SLOT_INTERFACE("fdc", ISA8_FDC_XT)
325		SLOT_INTERFACE("finalchs", ISA8_FINALCHS)
326		SLOT_INTERFACE("hdc", ISA8_HDC)
327		SLOT_INTERFACE("adlib", ISA8_ADLIB)
328		SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
329		SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
330		SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
331		SLOT_INTERFACE("ne1000", NE1000)
332		SLOT_INTERFACE("3c503", EL2_3C503)
333		SLOT_INTERFACE("mpu401", ISA8_MPU401)
334		SLOT_INTERFACE("lpt", ISA8_LPT)
335		SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
336		SLOT_INTERFACE("isa_ide8", ISA8_IDE)
337		SLOT_INTERFACE_END
338	302
339	303	static MACHINE_CONFIG_START( ibm5150, ibmpc_state )
340	304	/* basic machine hardware */
r23674	r23675
346	310	MCFG_IBM5150_MOTHERBOARD_ADD("mb","maincpu")
347	311	MCFG_DEVICE_INPUT_DEFAULTS(cga)
348	312
349		MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", ibm_isa8_cards, "cga", false)
350		MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", ibm_isa8_cards, "com", false)
351		MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", ibm_isa8_cards, "fdc", false)
352		MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", ibm_isa8_cards, "hdc", false)
353		MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", ibm_isa8_cards, NULL, false)
	313	MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga", false)
	314	MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "com", false)
	315	MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "fdc", false)
	316	MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, "hdc", false)
	317	MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
354	318
355	319	/* keyboard */
356	320	MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)
r23674	r23675
381	345	MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
382	346	MCFG_DEVICE_INPUT_DEFAULTS(cga)
383	347
384		MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", ibm_isa8_cards, "cga", false)
385		MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", ibm_isa8_cards, "com", false)
386		MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", ibm_isa8_cards, "fdc", false)
387		MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", ibm_isa8_cards, "hdc", false)
388		MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", ibm_isa8_cards, NULL, false)
389		MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", ibm_isa8_cards, NULL, false)
390		MCFG_ISA8_SLOT_ADD("mb:isa", "isa7", ibm_isa8_cards, NULL, false)
391		MCFG_ISA8_SLOT_ADD("mb:isa", "isa8", ibm_isa8_cards, NULL, false)
	348	MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga", false)
	349	MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "com", false)
	350	MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "fdc", false)
	351	MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, "hdc", false)
	352	MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
	353	MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false)
	354	MCFG_ISA8_SLOT_ADD("mb:isa", "isa7", pc_isa8_cards, NULL, false)
	355	MCFG_ISA8_SLOT_ADD("mb:isa", "isa8", pc_isa8_cards, NULL, false)
392	356
393	357	/* keyboard */
394	358	MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)

trunk/src/mess/drivers/pc1512.c

r23674	r23675
962	962
963	963
964	964	//-------------------------------------------------
965		//  mc146818_interface rtc_intf
966		//-------------------------------------------------
967
968		static const struct mc146818_interface rtc_intf =
969		{
970		DEVCB_DEVICE_LINE_MEMBER(I8259A2_TAG, pic8259_device, ir2_w)
971		};
972
973
974		//-------------------------------------------------
975	965	//  upd765_interface fdc_intf
976	966	//-------------------------------------------------
977	967
r23674	r23675
1049	1039	//  isa8bus_interface isabus_intf
1050	1040	//-------------------------------------------------
1051	1041
1052		static SLOT_INTERFACE_START( pc1512_isa8_cards )
1053		SLOT_INTERFACE("wdxt_gen", WDXT_GEN)
1054		SLOT_INTERFACE("ega", ISA8_EGA)
1055		SLOT_INTERFACE_END
1056
1057	1042	static const isa8bus_interface isabus_intf =
1058	1043	{
1059	1044	// interrupts
r23674	r23675
1258	1243	MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
1259	1244	MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
1260	1245	MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
1261		MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf)
	1246	MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
1262	1247	MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
1263	1248	MCFG_INS8250_ADD(INS8250_TAG, uart_intf, XTAL_1_8432MHz)
1264	1249	MCFG_CENTRONICS_PRINTER_ADD(CENTRONICS_TAG, centronics_intf)
r23674	r23675
1268	1253
1269	1254	// ISA8 bus
1270	1255	MCFG_ISA8_BUS_ADD(ISA_BUS_TAG, ":" I8086_TAG, isabus_intf)
1271		MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa1", pc1512_isa8_cards, NULL, false)
1272		MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa2", pc1512_isa8_cards, NULL, false)
1273		MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa3", pc1512_isa8_cards, NULL, false)
	1256	MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa1", pc_isa8_cards, NULL, false)
	1257	MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa2", pc_isa8_cards, NULL, false)
	1258	MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa3", pc_isa8_cards, NULL, false)
1274	1259
1275	1260	// internal ram
1276	1261	MCFG_RAM_ADD(RAM_TAG)
r23674	r23675
1304	1289	MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
1305	1290	MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
1306	1291	MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
1307		MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf)
	1292	MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
1308	1293	MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
1309	1294	MCFG_INS8250_ADD(INS8250_TAG, uart_intf, XTAL_1_8432MHz)
1310	1295	MCFG_CENTRONICS_PRINTER_ADD(CENTRONICS_TAG, centronics_intf)
r23674	r23675
1314	1299
1315	1300	// ISA8 bus
1316	1301	MCFG_ISA8_BUS_ADD(ISA_BUS_TAG, ":" I8086_TAG, isabus_intf)
1317		MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa1", pc1512_isa8_cards, "wdxt_gen", false)
1318		MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa2", pc1512_isa8_cards, NULL, false)
1319		MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa3", pc1512_isa8_cards, NULL, false)
	1302	MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa1", pc_isa8_cards, "wdxt_gen", false)
	1303	MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa2", pc_isa8_cards, NULL, false)
	1304	MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa3", pc_isa8_cards, NULL, false)
1320	1305
1321	1306	// internal ram
1322	1307	MCFG_RAM_ADD(RAM_TAG)

trunk/src/mess/drivers/hx20.c

r23674	r23675
752	752	update_interrupt();
753	753	}
754	754
755		static const struct mc146818_interface rtc_intf =
756		{
757		DEVCB_DRIVER_LINE_MEMBER(hx20_state, rtc_irq_w)
758		};
759	755
760
761	756	//-------------------------------------------------
762	757	//  rs232_port_interface rs232_intf
763	758	//-------------------------------------------------
r23674	r23675
867	862	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
868	863
869	864	// devices
870		MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf)
	865	MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, WRITELINE(hx20_state, rtc_irq_w))
871	866	MCFG_RS232_PORT_ADD(RS232_TAG, rs232_intf, default_rs232_devices, NULL)
872	867	MCFG_CASSETTE_ADD(CASSETTE_TAG, default_cassette_interface)
873	868	MCFG_EPSON_SIO_ADD("sio", "tf20")

trunk/src/mess/machine/at.c

r23674	r23675
304	304	{
305	305	address_space& space = m_maincpu->space(AS_PROGRAM);
306	306
307		// The CS4031 chipset does this itself
308		if (machine().device("cs4031") == NULL)
309		{
310		/* MESS managed RAM */
311		membank("bank10")->set_base(m_ram->pointer());
	307	/* MESS managed RAM */
	308	membank("bank10")->set_base(m_ram->pointer());
312	309
313		if (m_ram->size() > 0x0a0000)
314		{
315		offs_t ram_limit = 0x100000 + m_ram->size() - 0x0a0000;
316		space.install_read_bank(0x100000,  ram_limit - 1, "bank1");
317		space.install_write_bank(0x100000,  ram_limit - 1, "bank1");
318		membank("bank1")->set_base(m_ram->pointer() + 0xa0000);
319		}
	310	if (m_ram->size() > 0x0a0000)
	311	{
	312	offs_t ram_limit = 0x100000 + m_ram->size() - 0x0a0000;
	313	space.install_read_bank(0x100000,  ram_limit - 1, "bank1");
	314	space.install_write_bank(0x100000,  ram_limit - 1, "bank1");
	315	membank("bank1")->set_base(m_ram->pointer() + 0xa0000);
320	316	}
321	317
322	318	m_at_offset1 = 0xff;

trunk/src/mess/machine/southbridge.c

r23674	r23675
52	52	{ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack4_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack5_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack6_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack7_w) }
53	53	};
54	54
55		const struct mc146818_interface at_mc146818_config =
56		{
57		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, at_mc146818_irq)
58		};
59
60	55	static const at_keyboard_controller_interface keyboard_controller_intf =
61	56	{
62	57	DEVCB_CPU_INPUT_LINE(":maincpu", INPUT_LINE_RESET),
r23674	r23675
121	116	MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
122	117	MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
123	118
124		MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, at_mc146818_config )
	119	MCFG_MC146818_IRQ_ADD("rtc", MC146818_STANDARD, WRITELINE(southbridge_device, at_mc146818_irq))
125	120
126	121	/* sound hardware */
127	122	MCFG_SPEAKER_STANDARD_MONO("mono")

trunk/src/mess/machine/southbridge.h

r23674	r23675
9	9	#include "machine/mc146818.h"
10	10	#include "machine/pic8259.h"
11	11	#include "machine/pit8253.h"
12		#include "video/isa_cga.h"
13		#include "video/isa_ega.h"
14		#include "video/isa_svga_cirrus.h"
15		#include "video/isa_svga_s3.h"
16		#include "video/isa_svga_tseng.h"
17	12
18	13	#include "machine/idectrl.h"
19		#include "machine/isa_aha1542.h"
20	14	#include "machine/at_keybc.h"
21	15
22	16	#include "imagedev/harddriv.h"
r23674	r23675
28	22	#include "machine/ram.h"
29	23	#include "machine/nvram.h"
30	24	#include "machine/isa.h"
	25	#include "machine/isa_cards.h"
31	26
32		#include "machine/isa_adlib.h"
33		#include "machine/isa_com.h"
34		#include "machine/isa_fdc.h"
35		#include "machine/isa_gblaster.h"
36		#include "machine/isa_hdc.h"
37		#include "machine/isa_sblaster.h"
38		#include "machine/isa_gus.h"
39		#include "machine/3c503.h"
40		#include "machine/ne1000.h"
41		#include "machine/ne2000.h"
42		#include "video/isa_mda.h"
43		#include "machine/isa_mpu401.h"
44		#include "machine/isa_ibm_mfc.h"
45
46		#include "machine/isa_ide.h"
47		#include "machine/isa_ide_cd.h"
48
49	27	#include "machine/pc_lpt.h"
50	28	#include "machine/pc_kbdc.h"
51	29
52	30	#include "machine/am9517a.h"
	31
53	32	//**************************************************************************
54	33	//  TYPE DEFINITIONS
55	34	//**************************************************************************

trunk/src/mess/machine/isa_cards.c

r0	r23675
	1	/**********************************************************************
	2
	3	ISA cards
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#include "isa_cards.h"
	11
	12	SLOT_INTERFACE_START( pc_isa8_cards )
	13	SLOT_INTERFACE("mda", ISA8_MDA)
	14	SLOT_INTERFACE("cga", ISA8_CGA)
	15	SLOT_INTERFACE("ega", ISA8_EGA)
	16	SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
	17	SLOT_INTERFACE("com", ISA8_COM)
	18	SLOT_INTERFACE("fdc", ISA8_FDC_SUPERIO)
	19	SLOT_INTERFACE("fdc_xt", ISA8_FDC_XT)
	20	SLOT_INTERFACE("fdc_at", ISA8_FDC_AT)
	21	SLOT_INTERFACE("fdc_smc", ISA8_FDC_SMC)
	22	SLOT_INTERFACE("fdc_ps2", ISA8_FDC_PS2)
	23	SLOT_INTERFACE("finalchs", ISA8_FINALCHS)
	24	SLOT_INTERFACE("hdc", ISA8_HDC)
	25	SLOT_INTERFACE("adlib", ISA8_ADLIB)
	26	SLOT_INTERFACE("hercules", ISA8_HERCULES)
	27	SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
	28	SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
	29	SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
	30	SLOT_INTERFACE("mpu401", ISA8_MPU401)
	31	SLOT_INTERFACE("ne1000", NE1000)
	32	SLOT_INTERFACE("3c503", EL2_3C503)
	33	SLOT_INTERFACE("lpt", ISA8_LPT)
	34	SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
	35	SLOT_INTERFACE_END
	36
	37	SLOT_INTERFACE_START( pc_isa16_cards )
	38	// 8-bit
	39	SLOT_INTERFACE("mda", ISA8_MDA)
	40	SLOT_INTERFACE("cga", ISA8_CGA)
	41	SLOT_INTERFACE("wyse700", ISA8_WYSE700)
	42	SLOT_INTERFACE("ega", ISA8_EGA)
	43	SLOT_INTERFACE("vga", ISA8_VGA)
	44	SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
	45	SLOT_INTERFACE("svga_dm",ISA8_SVGA_CIRRUS)
	46	SLOT_INTERFACE("com", ISA8_COM)
	47	SLOT_INTERFACE("comat", ISA8_COM_AT)
	48	SLOT_INTERFACE("fdc", ISA8_FDC_AT)
	49	SLOT_INTERFACE("hdc", ISA8_HDC)
	50	SLOT_INTERFACE("adlib", ISA8_ADLIB)
	51	SLOT_INTERFACE("hercules", ISA8_HERCULES)
	52	SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
	53	SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
	54	SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
	55	SLOT_INTERFACE("stereo_fx", ISA8_STEREO_FX)
	56	SLOT_INTERFACE("ssi2001", ISA8_SSI2001)
	57	SLOT_INTERFACE("ne1000", NE1000)
	58	SLOT_INTERFACE("3c503", EL2_3C503)
	59	SLOT_INTERFACE("mpu401", ISA8_MPU401)
	60	SLOT_INTERFACE("lpt", ISA8_LPT)
	61	SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
	62	SLOT_INTERFACE("fdcsmc", ISA8_FDC_SMC)
	63	// 16-bit
	64	SLOT_INTERFACE("ide", ISA16_IDE)
	65	SLOT_INTERFACE("ide_cd", ISA16_IDE_CD)
	66	SLOT_INTERFACE("ne2000", NE2000)
	67	SLOT_INTERFACE("aha1542", AHA1542)
	68	SLOT_INTERFACE("gus",ISA16_GUS)
	69	SLOT_INTERFACE("sblaster_16", ISA16_SOUND_BLASTER_16)
	70	SLOT_INTERFACE("svga_s3", ISA16_SVGA_S3)
	71	SLOT_INTERFACE("s3virge", ISA16_S3VIRGE)
	72	SLOT_INTERFACE("s3virgedx", ISA16_S3VIRGEDX)
	73	SLOT_INTERFACE("gfxultra", ISA16_VGA_GFXULTRA)
	74	SLOT_INTERFACE_END

Property changes on: trunk/src/mess/machine/isa_cards.c

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trunk/src/mess/machine/isa_cards.h

r0	r23675
	1	/**********************************************************************
	2
	3	ISA cards
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#pragma once
	11
	12	#ifndef __ISA_CARDS_H__
	13	#define __ISA_CARDS_H__
	14
	15	#include "emu.h"
	16
	17	// video
	18	#include "video/isa_mda.h"
	19	#include "video/isa_cga.h"
	20	#include "video/isa_ega.h"
	21	#include "video/isa_vga.h"
	22	#include "video/isa_vga_ati.h"
	23	#include "video/isa_svga_cirrus.h"
	24	#include "video/isa_svga_s3.h"
	25	#include "video/isa_svga_tseng.h"
	26
	27	// storage
	28	#include "machine/isa_fdc.h"
	29	#include "machine/isa_hdc.h"
	30	#include "machine/isa_wdxt_gen.h"
	31	#include "machine/isa_ide.h"
	32	#include "machine/isa_ide_cd.h"
	33	#include "machine/isa_aha1542.h"
	34
	35	// sound
	36	#include "machine/isa_adlib.h"
	37	#include "machine/isa_gblaster.h"
	38	#include "machine/isa_gus.h"
	39	#include "machine/isa_ibm_mfc.h"
	40	#include "machine/isa_mpu401.h"
	41	#include "machine/isa_sblaster.h"
	42	#include "machine/isa_ssi2001.h"
	43	#include "machine/isa_stereo_fx.h"
	44
	45	// network
	46	#include "machine/3c503.h"
	47	#include "machine/ne1000.h"
	48	#include "machine/ne2000.h"
	49
	50	// communication ports
	51	#include "machine/pc_lpt.h"
	52	#include "machine/isa_com.h"
	53
	54	// other
	55	#include "machine/isa_finalchs.h"
	56
	57	// supported devices
	58	SLOT_INTERFACE_EXTERN( pc_isa8_cards );
	59	SLOT_INTERFACE_EXTERN( pc_isa16_cards );
	60
	61	#endif // __ISA_CARDS_H__

Property changes on: trunk/src/mess/machine/isa_cards.h

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trunk/src/mess/machine/e01.c

r23674	r23675
140	140	update_interrupts();
141	141	}
142	142
143		static mc146818_interface rtc_intf =
144		{
145		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, e01_device, rtc_irq_w)
146		};
147	143
148
149	144	//-------------------------------------------------
150	145	//  mc6854_interface adlc_intf
151	146	//-------------------------------------------------
r23674	r23675
299	294	MCFG_CPU_ADD(R65C102_TAG, M65C02, XTAL_8MHz/4) // Rockwell R65C102P3
300	295	MCFG_CPU_PROGRAM_MAP(e01_mem)
301	296
302		MCFG_MC146818_IRQ_ADD(HD146818_TAG, MC146818_STANDARD, rtc_intf)
	297	MCFG_MC146818_IRQ_ADD(HD146818_TAG, MC146818_STANDARD, WRITELINE(e01_device, rtc_irq_w))
303	298
304	299	// devices
305	300	MCFG_VIA6522_ADD(R6522_TAG, XTAL_8MHz/4, via_intf)

trunk/src/mess/machine/isa.c

r23674	r23675
145	145	//-------------------------------------------------
146	146
147	147	isa8_device::isa8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
148		device_t(mconfig, ISA8, "ISA8", tag, owner, clock)
	148	device_t(mconfig, ISA8, "ISA8", tag, owner, clock),
	149	m_write_iochck(*this)
149	150	{
150	151	for(int i=0;i<8;i++)
151	152	{
r23674	r23675
156	157	}
157	158
158	159	isa8_device::isa8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
159		device_t(mconfig, type, name, tag, owner, clock)
	160	device_t(mconfig, type, name, tag, owner, clock),
	161	m_write_iochck(*this)
160	162	{
161	163	for(int i=0;i<8;i++)
162	164	{
r23674	r23675
179	181	void isa8_device::device_start()
180	182	{
181	183	// resolve callbacks
	184	m_write_iochck.resolve_safe();
	185
182	186	m_out_irq2_func.resolve(m_out_irq2_cb, *this);
183	187	m_out_irq3_func.resolve(m_out_irq3_cb, *this);
184	188	m_out_irq4_func.resolve(m_out_irq4_cb, *this);
r23674	r23675
393	397
394	398	void isa8_device::nmi()
395	399	{
396		if (m_nmi_enabled)
	400	if (m_write_iochck.isnull())
397	401	{
398		m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE );
	402	if (m_nmi_enabled)
	403	{
	404	m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE );
	405	}
399	406	}
	407	else
	408	{
	409	m_write_iochck(0);
	410	m_write_iochck(1);
	411	}
400	412	}
	413
401	414	//**************************************************************************
402	415	//  DEVICE CONFIG ISA8 CARD INTERFACE
403	416	//**************************************************************************

trunk/src/mess/machine/isa.h

r23674	r23675
88	88	MCFG_DEVICE_ADD(_tag, ISA16_SLOT, 0) \
89	89	MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed) \
90	90	isa16_slot_device::static_set_isa16_slot(*device, owner, _isatag);
	91
	92	#define MCFG_ISA_BUS_IOCHCK(_iochck) \
	93	downcast<isa8_device *>(device)->set_iochck_callback(DEVCB2_##_iochck);
	94
91	95	//**************************************************************************
92	96	//  TYPE DEFINITIONS
93	97	//**************************************************************************
r23674	r23675
142	146	isa8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
143	147	// inline configuration
144	148	static void static_set_cputag(device_t &device, const char *tag);
	149	template<class _iochck> void set_iochck_callback(_iochck iochck) { m_write_iochck.set_callback(iochck); }
145	150
146	151	void install_device(device_t *dev, offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_device_func rhandler, const char* rhandler_name, write8_device_func whandler, const char *whandler_name);
147	152	void install_device(offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_delegate rhandler, write8_delegate whandler);
r23674	r23675
204	209	bool                        m_dma_eop[8];
205	210	const char                 *m_cputag;
206	211	bool                        m_nmi_enabled;
	212
	213	private:
	214	devcb2_write_line m_write_iochck;
207	215	};
208	216
209	217

trunk/src/mess/machine/cs4031.c

r23674	r23675
10	10	- ISA-bus controller
11	11	- VESA VL-BUS controller
12	12
13		* F84035
	13	* F84035 (82C206 IPC core)
14	14	- 2x 8257 DMA controller
15	15	- 2x 8259 interrupt controller
16	16	- 8254 timer
17	17	- MC14818 RTC
18	18
	19	TODO:
	20	- The chipset has the ability to intercept the GATEA20 and
	21	RESET commands sent to the 8042 keyboard controller,
	22	this is not emulated yet
	23	- No emulation of memory parity checks
	24	- Move IPC core to its own file so it can be shared with
	25	other chipsets
	26
19	27	***************************************************************************/
20	28
21	29	#include "emu.h"
r23674	r23675
24	32
25	33
26	34	//**************************************************************************
27		//  GLOBAL VARIABLES
	35	//  MACROS/CONSTANTS
28	36	//**************************************************************************
29	37
30	38	#define LOG_REGISTER    1
31	39	#define LOG_MEMORY      1
	40	#define LOG_IO          1
32	41
	42
	43	//**************************************************************************
	44	//  DEVICE DEFINITIONS
	45	//**************************************************************************
	46
33	47	const device_type CS4031 = &device_creator<cs4031_device>;
34	48
35		enum
	49	const char* cs4031_device::m_register_names[] =
36	50	{
37		DMA_WAIT_STATE = 0x01,
38		PERFORMANCE = 0x08,
39		F84035_MISC = 0x09,
40		DMA_CLOCK = 0x0a,
41		SHADOW_READ = 0x19,
42		SHADOW_WRITE = 0x1a,
43		ROMCS = 0x1b
44		};
45
46		static const char *const register_names[] =
47		{
48	51	/* 00 */ "RESERVED",
49	52	/* 01 */ "DMA WAIT STATE CONTROL",
50	53	/* 02 */ "RESERVED",
r23674	r23675
79	82	/* 1f */ "RESERVED"
80	83	};
81	84
	85	//-------------------------------------------------
	86	//  machine_config_additions - device-specific
	87	//  machine configurations
	88	//-------------------------------------------------
82	89
	90	I8237_INTERFACE( dma1_config )
	91	{
	92	DEVCB_DEVICE_LINE_MEMBER("dma2", am9517a_device, dreq0_w),
	93	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_eop_w),
	94	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma_read_byte),
	95	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma_write_byte),
	96	{
	97	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_ior0_r),
	98	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_ior1_r),
	99	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_ior2_r),
	100	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_ior3_r)
	101	},
	102	{
	103	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_iow0_w),
	104	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_iow1_w),
	105	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_iow2_w),
	106	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_iow3_w)
	107	},
	108	{
	109	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_dack0_w),
	110	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_dack1_w),
	111	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_dack2_w),
	112	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_dack3_w)
	113	}
	114	};
	115
	116	I8237_INTERFACE( dma2_config )
	117	{
	118	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_hreq_w),
	119	DEVCB_NULL,
	120	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma_read_word),
	121	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma_write_word),
	122	{
	123	DEVCB_NULL,
	124	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_ior1_r),
	125	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_ior2_r),
	126	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_ior3_r)
	127	},
	128	{
	129	DEVCB_NULL,
	130	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_iow1_w),
	131	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_iow2_w),
	132	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_iow3_w)
	133	},
	134	{
	135	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_dack0_w),
	136	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_dack1_w),
	137	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_dack2_w),
	138	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_dack3_w)
	139	}
	140	};
	141
	142	const struct pit8253_interface cs4031_pit_config =
	143	{
	144	{
	145	{
	146	XTAL_14_31818MHz / 12,
	147	DEVCB_LINE_VCC,
	148	DEVCB_DEVICE_LINE_MEMBER("intc1", pic8259_device, ir0_w)
	149	}, {
	150	XTAL_14_31818MHz / 12,
	151	DEVCB_LINE_VCC,
	152	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, ctc_out1_w)
	153	}, {
	154	XTAL_14_31818MHz / 12,
	155	DEVCB_NULL,
	156	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, ctc_out2_w)
	157	}
	158	}
	159	};
	160
	161	static MACHINE_CONFIG_FRAGMENT( cs4031 )
	162	MCFG_I8237_ADD("dma1", XTAL_14_31818MHz/3 /* todo: set to 0, instead set via config register */, dma1_config)
	163	MCFG_I8237_ADD("dma2", XTAL_14_31818MHz/3 /* todo: set to 0, instead set via config register */, dma2_config)
	164	MCFG_PIC8259_ADD("intc1", WRITELINE(cs4031_device, intc1_int_w), VCC, READ8(cs4031_device, intc1_slave_ack_r))
	165	MCFG_PIC8259_ADD("intc2", DEVWRITELINE("intc1", pic8259_device, ir2_w), GND, NULL)
	166	MCFG_PIT8254_ADD("ctc", cs4031_pit_config)
	167	MCFG_MC146818_IRQ_ADD("rtc", MC146818_STANDARD, WRITELINE(cs4031_device, rtc_irq_w))
	168	MACHINE_CONFIG_END
	169
	170	machine_config_constructor cs4031_device::device_mconfig_additions() const
	171	{
	172	return MACHINE_CONFIG_NAME( cs4031 );
	173	}
	174
	175
83	176	//**************************************************************************
84	177	//  LIVE DEVICE
85	178	//**************************************************************************
r23674	r23675
88	181	//  cs4031_device - constructor
89	182	//-------------------------------------------------
90	183
91		cs4031_device::cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
92		: device_t(mconfig, CS4031, "CS4031", tag, owner, clock),
93		m_address(0),
94		m_address_valid(false)
	184	cs4031_device::cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	185	device_t(mconfig, CS4031, "CS4031", tag, owner, clock),
	186	m_read_ior(*this),
	187	m_write_iow(*this),
	188	m_write_tc(*this),
	189	m_write_hold(*this),
	190	m_write_nmi(*this),
	191	m_write_intr(*this),
	192	m_write_cpureset(*this),
	193	m_write_a20m(*this),
	194	m_write_spkr(*this),
	195	m_dma1(*this, "dma1"),
	196	m_dma2(*this, "dma2"),
	197	m_intc1(*this, "intc1"),
	198	m_intc2(*this, "intc2"),
	199	m_ctc(*this, "ctc"),
	200	m_rtc(*this, "rtc"),
	201	m_dma_eop(0),
	202	m_dma_high_byte(0xff),
	203	m_dma_channel(-1),
	204	m_portb(0x0f),
	205	m_refresh_toggle(0),
	206	m_iochck(1),
	207	m_nmi_mask(1),
	208	m_cpureset(0),
	209	m_kbrst(1),
	210	m_ext_gatea20(0),
	211	m_fast_gatea20(0),
	212	m_address(0),
	213	m_address_valid(false)
95	214	{
96	215	}
97	216
r23674	r23675
113	232	cs4031.m_biostag = tag;
114	233	}
115	234
	235	void cs4031_device::static_set_keybctag(device_t &device, const char *tag)
	236	{
	237	cs4031_device &cs4031 = downcast<cs4031_device &>(device);
	238	cs4031.m_keybctag = tag;
	239	}
	240
116	241	//-------------------------------------------------
117	242	//  device_start - device-specific startup
118	243	//-------------------------------------------------
r23674	r23675
125	250	if (!ram_dev->started())
126	251	throw device_missing_dependencies();
127	252
	253	// resolve callbacks
	254	m_read_ior.resolve_safe(0);
	255	m_write_iow.resolve_safe();
	256	m_write_tc.resolve_safe();
	257	m_write_hold.resolve_safe();
	258	m_write_nmi.resolve_safe();
	259	m_write_intr.resolve_safe();
	260	m_write_cpureset.resolve_safe();
	261	m_write_a20m.resolve_safe();
	262	m_write_spkr.resolve_safe();
	263
	264	// register for state saving
	265	save_item(NAME(m_dma_eop));
	266	save_item(NAME(m_dma_page));
	267	save_item(NAME(m_dma_high_byte));
	268	save_item(NAME(m_dma_channel));
	269	save_item(NAME(m_portb));
	270	save_item(NAME(m_refresh_toggle));
	271	save_item(NAME(m_iochck));
	272	save_item(NAME(m_nmi_mask));
	273	save_item(NAME(m_cpureset));
	274	save_item(NAME(m_kbrst));
	275	save_item(NAME(m_ext_gatea20));
	276	save_item(NAME(m_fast_gatea20));
	277	save_item(NAME(m_address));
	278	save_item(NAME(m_address_valid));
	279	save_item(NAME(m_registers));
	280
128	281	device_t *cpu = machine().device(m_cputag);
129	282	m_space = &cpu->memory().space(AS_PROGRAM);
	283	m_space_io = &cpu->memory().space(AS_IO);
	284
130	285	m_isa = machine().root_device().memregion(m_isatag)->base();
131	286	m_bios = machine().root_device().memregion(m_biostag)->base();
	287	m_keybc = downcast<at_keyboard_controller_device *>(machine().device(m_keybctag));
132	288
133	289	m_ram = ram_dev->pointer();
134	290	UINT32 ram_size = ram_dev->size();
r23674	r23675
137	293	m_space->install_ram(0x000000, 0x09ffff, m_ram);
138	294
139	295	// install extended memory
140		if (ram_size > 0x100000) {
	296	if (ram_size > 0x100000)
141	297	m_space->install_ram(0x100000, ram_size - 1, m_ram + 0x100000);
142		}
143	298
144	299	// install bios rom at cpu inital pc
145	300	m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0xf0000);
	301
	302	// install i/o accesses
	303	m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
	304	m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(pic8259_device::read), &(*m_intc1)), write8_delegate(FUNC(pic8259_device::write), &(*m_intc1)), 0x0000ffff);
	305	m_space_io->install_write_handler(0x0020, 0x0023, write8_delegate(FUNC(cs4031_device::config_address_w), this), 0x00ff0000);
	306	m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(cs4031_device::config_data_r), this), write8_delegate(FUNC(cs4031_device::config_data_w), this), 0xff000000);
	307	m_space_io->install_readwrite_handler(0x0040, 0x0043, read8_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff);
	308	m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::keyb_data_r), this), write8_delegate(FUNC(cs4031_device::keyb_data_w), this), 0x000000ff);
	309	m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::portb_r), this), write8_delegate(FUNC(cs4031_device::portb_w), this), 0x0000ff00);
	310	m_space_io->install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(cs4031_device::keyb_status_r), this), write8_delegate(FUNC(cs4031_device::keyb_command_w), this), 0x000000ff);
	311	m_space_io->install_write_handler(0x0070, 0x0073, write8_delegate(FUNC(cs4031_device::rtc_w), this), 0x000000ff);
	312	m_space_io->install_readwrite_handler(0x0070, 0x0073, read8_delegate(FUNC(mc146818_device::data_r), &(*m_rtc)), write8_delegate(FUNC(mc146818_device::data_w), &(*m_rtc)), 0x0000ff00);
	313	m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(cs4031_device::dma_page_r), this), write8_delegate(FUNC(cs4031_device::dma_page_w), this), 0xffffffff);
	314	m_space_io->install_write_handler(0x0090, 0x0093, write8_delegate(FUNC(cs4031_device::sysctrl_w), this), 0x00ff0000);
	315	m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8_delegate(FUNC(pic8259_device::read), &(*m_intc2)), write8_delegate(FUNC(pic8259_device::write), &(*m_intc2)), 0x0000ffff);
	316	m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(cs4031_device::dma2_r),this), write8_delegate(FUNC(cs4031_device::dma2_w),this), 0xffffffff);
146	317	}
147	318
148	319	//-------------------------------------------------
r23674	r23675
158	329	// update rom/ram regions below 1mb
159	330	update_read_regions();
160	331	update_write_regions();
	332
161	333	}
162	334
	335	//-------------------------------------------------
	336	//  device_reset_after_children
	337	//-------------------------------------------------
163	338
	339	void cs4031_device::device_reset_after_children()
	340	{
	341	// timer 2 default state
	342	m_ctc->gate2_w(1);
	343	}
	344
	345
164	346	//**************************************************************************
165		//  READ/WRITE HANDLERS
	347	//  DMA CONTROLLER
166	348	//**************************************************************************
167	349
	350	offs_t cs4031_device::page_offset()
	351	{
	352	switch (m_dma_channel)
	353	{
	354	case 0: return (offs_t) m_dma_page[0x07] << 16;
	355	case 1: return (offs_t) m_dma_page[0x03] << 16;
	356	case 2: return (offs_t) m_dma_page[0x01] << 16;
	357	case 3: return (offs_t) m_dma_page[0x02] << 16;
	358	case 5: return (offs_t) m_dma_page[0x0b] << 16;
	359	case 6: return (offs_t) m_dma_page[0x09] << 16;
	360	case 7: return (offs_t) m_dma_page[0x0a] << 16;
	361	}
	362
	363	// should never get here
	364	return 0xff0000;
	365	}
	366
	367	READ8_MEMBER( cs4031_device::dma_read_byte )
	368	{
	369	if (m_dma_channel == -1)
	370	return 0xff;
	371
	372	return m_space->read_byte(page_offset() + offset);
	373	}
	374
	375	WRITE8_MEMBER( cs4031_device::dma_write_byte )
	376	{
	377	if (m_dma_channel == -1)
	378	return;
	379
	380	m_space->write_byte(page_offset() + offset, data);
	381	}
	382
	383	READ8_MEMBER( cs4031_device::dma_read_word )
	384	{
	385	if (m_dma_channel == -1)
	386	return 0xff;
	387
	388	UINT16 result = m_space->read_word(page_offset() + (offset << 1));
	389	m_dma_high_byte = result & 0xff00;
	390
	391	return result & 0xff;
	392	}
	393
	394	WRITE8_MEMBER( cs4031_device::dma_write_word )
	395	{
	396	if (m_dma_channel == -1)
	397	return;
	398
	399	m_space->write_word(page_offset() + (offset << 1), m_dma_high_byte | data);
	400	}
	401
	402	WRITE_LINE_MEMBER( cs4031_device::dma2_dack0_w )
	403	{
	404	m_dma1->hack_w(state ? 0 : 1); // inverted?
	405	}
	406
	407	WRITE_LINE_MEMBER( cs4031_device::dma1_eop_w )
	408	{
	409	m_dma_eop = state;
	410	if (m_dma_channel != -1)
	411	m_write_tc(m_dma_channel, state, 0xff);
	412	}
	413
	414	void cs4031_device::set_dma_channel(int channel, bool state)
	415	{
	416	if (!state)
	417	{
	418	m_dma_channel = channel;
	419	if (m_dma_eop)
	420	m_write_tc(channel, 1, 0xff);
	421	}
	422	else
	423	{
	424	if (m_dma_channel == channel)
	425	{
	426	m_dma_channel = -1;
	427	if (m_dma_eop)
	428	m_write_tc(channel, 0, 0xff);
	429	}
	430	}
	431	}
	432
	433
	434	//**************************************************************************
	435	//  INTERRUPTS
	436	//**************************************************************************
	437
	438	/*
	439	Check NMI sources and generate NMI if needed
	440
	441	Not emulated here: Parity check NMI
	442	*/
	443	void cs4031_device::nmi()
	444	{
	445	if (m_nmi_mask & BIT(m_portb, 6))
	446	{
	447	m_write_nmi(1);
	448	m_write_nmi(0);
	449	}
	450	}
	451
	452	READ8_MEMBER( cs4031_device::intc1_slave_ack_r )
	453	{
	454	if (offset == 2) // IRQ 2
	455	return m_intc2->inta_r();
	456
	457	return 0x00;
	458	}
	459
	460	WRITE_LINE_MEMBER( cs4031_device::rtc_irq_w )
	461	{
	462	m_intc2->ir0_w(state ? 0 : 1); // inverted?
	463	}
	464
	465	WRITE_LINE_MEMBER( cs4031_device::iochck_w )
	466	{
	467	if (LOG_IO)
	468	logerror("cs4031_device::iochck_w: %u\n", state);
	469
	470	if (BIT(m_portb, 3) == 0)
	471	{
	472	if (m_iochck && state == 0)
	473	{
	474	// set channel check latch
	475	m_portb |= 1 << 6;
	476	nmi();
	477	}
	478
	479	m_iochck = state;
	480	}
	481	}
	482
	483
	484	//**************************************************************************
	485	//  TIMER
	486	//**************************************************************************
	487
	488	WRITE_LINE_MEMBER( cs4031_device::ctc_out1_w )
	489	{
	490	m_refresh_toggle ^= state;
	491	m_portb = (m_portb & 0xef) | (m_refresh_toggle << 4);
	492	}
	493
	494	WRITE_LINE_MEMBER( cs4031_device::ctc_out2_w )
	495	{
	496	m_write_spkr(!(state & BIT(m_portb, 1)));
	497	m_portb = (m_portb & 0xdf) | (state << 5);
	498	}
	499
	500
	501	//**************************************************************************
	502	//  CHIPSET CONFIGURATION
	503	//**************************************************************************
	504
	505	WRITE8_MEMBER( cs4031_device::config_address_w )
	506	{
	507	m_address = data;
	508	m_address_valid = (m_address < 0x20) ? true : false;
	509	}
	510
	511	READ8_MEMBER( cs4031_device::config_data_r )
	512	{
	513	UINT8 result = 0xff;
	514
	515	if (m_address_valid)
	516	{
	517	if (LOG_REGISTER)
	518	logerror("cs4031_device: read %s = %02x\n", m_register_names[m_address], m_registers[m_address]);
	519
	520	result = m_registers[m_address];
	521	}
	522
	523	// after a read the selected address needs to be reset
	524	m_address_valid = false;
	525
	526	return result;
	527	}
	528
	529	WRITE8_MEMBER( cs4031_device::config_data_w )
	530	{
	531	if (m_address_valid)
	532	{
	533	if (LOG_REGISTER)
	534	logerror("cs4031_device: write %s = %02x\n", m_register_names[m_address], data);
	535
	536	// update register with new data
	537	m_registers[m_address] = data;
	538
	539	// execute command
	540	switch (m_address)
	541	{
	542	case 0x01: break;
	543	case 0x05: break;
	544	case 0x06: break;
	545	case 0x07: break;
	546	case 0x08: break;
	547	case 0x09: break;
	548	case 0x0a: break;
	549	case 0x10: break;
	550	case 0x11: break;
	551	case 0x12: break;
	552	case 0x13: break;
	553	case 0x14: break;
	554	case 0x15: break;
	555	case 0x16: break;
	556	case 0x17: break;
	557	case 0x18: break;
	558
	559	case 0x19:
	560	update_read_regions();
	561	break;
	562
	563	case 0x1a:
	564	update_write_regions();
	565	break;
	566
	567	case 0x1b:
	568	update_read_regions();
	569	update_write_regions();
	570	break;
	571
	572	case 0x1c: break;
	573	}
	574	}
	575
	576	// after a write the selected address needs to be reset
	577	m_address_valid = false;
	578	}
	579
	580
	581	//**************************************************************************
	582	//  MEMORY MAPPER
	583	//**************************************************************************
	584
168	585	void cs4031_device::update_read_region(int index, const char *region, offs_t start, offs_t end)
169	586	{
170	587	if (!BIT(m_registers[SHADOW_READ], index) && BIT(m_registers[ROMCS], index))
r23674	r23675
257	674	update_write_region(6, "write_f0000", 0xf0000, 0xfffff);
258	675	}
259	676
260		WRITE8_MEMBER( cs4031_device::address_w )
	677
	678	//**************************************************************************
	679	//  KEYBOARD / 8042
	680	//**************************************************************************
	681
	682	void cs4031_device::a20m()
261	683	{
262		m_address = data;
263		m_address_valid = (m_address < 0x20) ? true : false;
	684	m_write_a20m(m_fast_gatea20 | m_ext_gatea20);
264	685	}
265	686
266		READ8_MEMBER( cs4031_device::data_r )
	687	READ8_MEMBER( cs4031_device::keyb_status_r )
267	688	{
268		UINT8 result = 0xff;
	689	return m_keybc->status_r(space, 0);
	690	}
269	691
270		if (m_address_valid)
271		{
272		if (LOG_REGISTER)
273		logerror("cs4031_device: read %s = %02x\n", register_names[m_address], m_registers[m_address]);
	692	WRITE8_MEMBER( cs4031_device::keyb_command_w )
	693	{
	694	if (0)
	695	logerror("cs4031_device::keyb_command_w: %02x\n", data);
274	696
275		result = m_registers[m_address];
276		}
	697	m_keybc->command_w(space, 0, data);
	698	}
277	699
278		// after a read the selected address needs to be reset
279		m_address_valid = false;
	700	READ8_MEMBER( cs4031_device::keyb_data_r )
	701	{
	702	if (0)
	703	logerror("cs4031_device::keyb_data_r\n");
280	704
281		return result;
	705	return m_keybc->data_r(space, 0);
282	706	}
283	707
284		WRITE8_MEMBER( cs4031_device::data_w )
	708	WRITE8_MEMBER( cs4031_device::keyb_data_w )
285	709	{
286		if (m_address_valid)
	710	if (0)
	711	logerror("cs4031_device::keyb_data_w: %02x\n", data);
	712
	713	m_keybc->data_w(space, 0, data);
	714	}
	715
	716	WRITE_LINE_MEMBER( cs4031_device::gatea20_w )
	717	{
	718	if (LOG_IO)
	719	logerror("cs4031_device::gatea20_w: %u\n", state);
	720
	721	if (m_ext_gatea20 != state)
287	722	{
288		if (LOG_REGISTER)
289		logerror("cs4031_device: write %s = %02x\n", register_names[m_address], data);
	723	m_ext_gatea20 = state;
	724	a20m();
	725	}
	726	}
290	727
291		// update register with new data
292		m_registers[m_address] = data;
	728	WRITE_LINE_MEMBER( cs4031_device::kbrst_w )
	729	{
	730	if (LOG_IO)
	731	logerror("cs4031_device::kbrst_w: %u\n", state);
293	732
294		// execute command
295		switch (m_address)
296		{
297		case 0x01: break;
298		case 0x05: break;
299		case 0x06: break;
300		case 0x07: break;
301		case 0x08: break;
302		case 0x09: break;
303		case 0x0a: break;
304		case 0x10: break;
305		case 0x11: break;
306		case 0x12: break;
307		case 0x13: break;
308		case 0x14: break;
309		case 0x15: break;
310		case 0x16: break;
311		case 0x17: break;
312		case 0x18: break;
	733	// active low signal
	734	state = (state == ASSERT_LINE ? 0 : 1);
313	735
314		case 0x19:
315		update_read_regions();
316		break;
	736	if (m_kbrst == 1 && state == 0)
	737	{
	738	m_write_cpureset(1);
	739	m_write_cpureset(0);
	740	}
317	741
318		case 0x1a:
319		update_write_regions();
320		break;
	742	m_kbrst = state;
	743	}
321	744
322		case 0x1b:
323		update_read_regions();
324		update_write_regions();
325		break;
	745	/*
	746	Fast CPU reset and Gate A20
326	747
327		case 0x1c: break;
328		}
	748	0 - Fast CPU reset
	749	1 - Fast Gate A20
	750
	751	*/
	752	WRITE8_MEMBER( cs4031_device::sysctrl_w )
	753	{
	754	if (LOG_IO)
	755	logerror("cs4031_device::sysctrl_w: %u\n", data);
	756
	757	m_fast_gatea20 = BIT(data, 1);
	758	a20m();
	759
	760	if (m_cpureset == 0 && BIT(data, 0))
	761	{
	762	// pulse reset line
	763	m_write_cpureset(1);
	764	m_write_cpureset(0);
329	765	}
330	766
331		// after a write the selected address needs to be reset
332		m_address_valid = false;
	767	m_cpureset = BIT(data, 0);
333	768	}
	769
	770
	771	//**************************************************************************
	772	//  MISCELLANEOUS
	773	//**************************************************************************
	774
	775	/*
	776	"Port B" - AT-compatible port with miscellaneous information
	777
	778	0 - Timer 2 gate (rw)
	779	1 - Speaker data (rw)
	780	2 - Enable parity check (rw) [not emulated]
	781	3 - Enable IOCHECK (rw)
	782	4 - Refresh detect (r)
	783	5 - Timer 2 output (r)
	784	6 - Channel check latch (r)
	785	7 - Parity check latch (r) [not emulated]
	786	*/
	787
	788	READ8_MEMBER( cs4031_device::portb_r )
	789	{
	790	if (0)
	791	logerror("cs4031_device::portb_r: %02x\n", m_portb);
	792
	793	return m_portb;
	794	}
	795
	796	WRITE8_MEMBER( cs4031_device::portb_w )
	797	{
	798	if (0)
	799	logerror("cs4031_device::portb_w: %02x\n", data);
	800
	801	m_portb = (m_portb & 0xf0) | (data & 0x0f);
	802
	803	// bit 5 forced to 1 if timer disabled
	804	if (!BIT(m_portb, 0))
	805	m_portb |= 1 << 5;
	806
	807	m_ctc->gate2_w(BIT(m_portb, 0));
	808
	809	m_write_spkr(!BIT(m_portb, 1));
	810
	811	// clear channel check latch?
	812	if (BIT(m_portb, 3))
	813	m_portb &= 0xbf;
	814	}
	815
	816	/*
	817	NMI mask and RTC address
	818
	819	7   - NMI mask
	820	6:0 - RTC address
	821	*/
	822	WRITE8_MEMBER( cs4031_device::rtc_w )
	823	{
	824	if (0)
	825	logerror("cs4031_device::rtc_w: %02x\n", data);
	826
	827	m_nmi_mask = !BIT(data, 7);
	828	m_rtc->address_w(space, 0, data & 0x7f);
	829	}

trunk/src/mess/machine/cs4031.h

r23674	r23675
10	10	- ISA-bus controller
11	11	- VESA VL-BUS controller
12	12
13		* F84035
	13	* F84035 (82C206 IPC core)
14	14	- 2x 8257 DMA controller
15	15	- 2x 8259 interrupt controller
16	16	- 8254 timer
r23674	r23675
24	24	#define __CS4031_H__
25	25
26	26	#include "emu.h"
	27	#include "machine/am9517a.h"
	28	#include "machine/pic8259.h"
	29	#include "machine/pit8253.h"
	30	#include "machine/mc146818.h"
	31	#include "machine/at_keybc.h"
27	32
28	33
29	34	//**************************************************************************
30	35	//  INTERFACE CONFIGURATION MACROS
31	36	//**************************************************************************
32	37
33		#define MCFG_CS4031_ADD(_tag, _cputag, _isatag, _biostag) \
34		MCFG_DEVICE_ADD(_tag, CS4031, 0) \
	38	#define MCFG_CS4031_ADD(_tag, _clock, _cputag, _isatag, _biostag, _keybctag) \
	39	MCFG_DEVICE_ADD(_tag, CS4031, _clock) \
35	40	cs4031_device::static_set_cputag(*device, _cputag); \
36	41	cs4031_device::static_set_isatag(*device, _isatag); \
37		cs4031_device::static_set_biostag(*device, _biostag);
	42	cs4031_device::static_set_biostag(*device, _biostag); \
	43	cs4031_device::static_set_keybctag(*device, _keybctag);
38	44
	45	#define MCFG_CS4031_IOR(_ior) \
	46	downcast<cs4031_device *>(device)->set_ior_callback(DEVCB2_##_ior);
39	47
	48	#define MCFG_CS4031_IOW(_iow) \
	49	downcast<cs4031_device *>(device)->set_iow_callback(DEVCB2_##_iow);
	50
	51	#define MCFG_CS4031_TC(_tc) \
	52	downcast<cs4031_device *>(device)->set_tc_callback(DEVCB2_##_tc);
	53
	54	#define MCFG_CS4031_HOLD(_hold) \
	55	downcast<cs4031_device *>(device)->set_hold_callback(DEVCB2_##_hold);
	56
	57	#define MCFG_CS4031_NMI(_nmi) \
	58	downcast<cs4031_device *>(device)->set_nmi_callback(DEVCB2_##_nmi);
	59
	60	#define MCFG_CS4031_INTR(_intr) \
	61	downcast<cs4031_device *>(device)->set_intr_callback(DEVCB2_##_intr);
	62
	63	#define MCFG_CS4031_CPURESET(_cpureset) \
	64	downcast<cs4031_device *>(device)->set_cpureset_callback(DEVCB2_##_cpureset);
	65
	66	#define MCFG_CS4031_A20M(_a20m) \
	67	downcast<cs4031_device *>(device)->set_a20m_callback(DEVCB2_##_a20m);
	68
	69	#define MCFG_CS4031_SPKR(_spkr) \
	70	downcast<cs4031_device *>(device)->set_spkr_callback(DEVCB2_##_spkr);
	71
	72
40	73	//**************************************************************************
41	74	//  TYPE DEFINITIONS
42	75	//**************************************************************************
r23674	r23675
49	82	// construction/destruction
50	83	cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
51	84
52		DECLARE_WRITE8_MEMBER( address_w );
53		DECLARE_READ8_MEMBER( data_r );
54		DECLARE_WRITE8_MEMBER( data_w );
	85	// optional information overrides
	86	virtual machine_config_constructor device_mconfig_additions() const;
55	87
	88	// callbacks
	89	template<class _ior> void set_ior_callback(_ior ior) { m_read_ior.set_callback(ior); }
	90	template<class _iow> void set_iow_callback(_iow iow) { m_write_iow.set_callback(iow); }
	91	template<class _tc> void set_tc_callback(_tc tc) { m_write_tc.set_callback(tc); }
	92	template<class _hold> void set_hold_callback(_hold hold) { m_write_hold.set_callback(hold); }
	93	template<class _cpureset> void set_cpureset_callback(_cpureset cpureset) { m_write_cpureset.set_callback(cpureset); }
	94	template<class _nmi> void set_nmi_callback(_nmi nmi) { m_write_nmi.set_callback(nmi); }
	95	template<class _intr> void set_intr_callback(_intr intr) { m_write_intr.set_callback(intr); }
	96	template<class _a20m> void set_a20m_callback(_a20m a20m) { m_write_a20m.set_callback(a20m); }
	97	template<class _spkr> void set_spkr_callback(_spkr spkr) { m_write_spkr.set_callback(spkr); }
	98
	99	// not really public
	100	DECLARE_READ8_MEMBER( dma_read_byte );
	101	DECLARE_WRITE8_MEMBER( dma_write_byte );
	102	DECLARE_READ8_MEMBER( dma_read_word );
	103	DECLARE_WRITE8_MEMBER( dma_write_word );
	104	DECLARE_WRITE_LINE_MEMBER( dma1_eop_w );
	105	DECLARE_READ8_MEMBER( dma1_ior0_r ) { return m_read_ior(0); }
	106	DECLARE_READ8_MEMBER( dma1_ior1_r ) { return m_read_ior(1); }
	107	DECLARE_READ8_MEMBER( dma1_ior2_r ) { return m_read_ior(2); }
	108	DECLARE_READ8_MEMBER( dma1_ior3_r ) { return m_read_ior(3); }
	109	DECLARE_READ8_MEMBER( dma2_ior1_r ) { UINT16 result = m_read_ior(5); m_dma_high_byte = result & 0xff00; return result & 0xff; }
	110	DECLARE_READ8_MEMBER( dma2_ior2_r ) { UINT16 result = m_read_ior(6); m_dma_high_byte = result & 0xff00; return result & 0xff; }
	111	DECLARE_READ8_MEMBER( dma2_ior3_r ) { UINT16 result = m_read_ior(7); m_dma_high_byte = result & 0xff00; return result & 0xff; }
	112	DECLARE_WRITE8_MEMBER( dma1_iow0_w ) { m_write_iow(0, data, 0xffff); }
	113	DECLARE_WRITE8_MEMBER( dma1_iow1_w ) { m_write_iow(1, data, 0xffff); }
	114	DECLARE_WRITE8_MEMBER( dma1_iow2_w ) { m_write_iow(2, data, 0xffff); }
	115	DECLARE_WRITE8_MEMBER( dma1_iow3_w ) { m_write_iow(3, data, 0xffff); }
	116	DECLARE_WRITE8_MEMBER( dma2_iow1_w ) { m_write_iow(5, m_dma_high_byte | data, 0xffff); }
	117	DECLARE_WRITE8_MEMBER( dma2_iow2_w ) { m_write_iow(6, m_dma_high_byte | data, 0xffff); }
	118	DECLARE_WRITE8_MEMBER( dma2_iow3_w ) { m_write_iow(7, m_dma_high_byte | data, 0xffff); }
	119	DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); }
	120	DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); }
	121	DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); }
	122	DECLARE_WRITE_LINE_MEMBER( dma1_dack3_w ) { set_dma_channel(3, state); }
	123	DECLARE_WRITE_LINE_MEMBER( dma2_dack0_w );
	124	DECLARE_WRITE_LINE_MEMBER( dma2_dack1_w ) { set_dma_channel(5, state); }
	125	DECLARE_WRITE_LINE_MEMBER( dma2_dack2_w ) { set_dma_channel(6, state); }
	126	DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); }
	127	DECLARE_WRITE_LINE_MEMBER( dma2_hreq_w ) { m_write_hold(state); }
	128	DECLARE_WRITE_LINE_MEMBER( intc1_int_w ) { m_write_intr(state); }
	129	DECLARE_READ8_MEMBER( intc1_slave_ack_r );
	130	DECLARE_WRITE_LINE_MEMBER( ctc_out1_w );
	131	DECLARE_WRITE_LINE_MEMBER( ctc_out2_w );
	132	DECLARE_WRITE_LINE_MEMBER( rtc_irq_w );
	133
	134	// internal io
	135	DECLARE_WRITE8_MEMBER( config_address_w );
	136	DECLARE_READ8_MEMBER( config_data_r );
	137	DECLARE_WRITE8_MEMBER( config_data_w );
	138	DECLARE_READ8_MEMBER( portb_r );
	139	DECLARE_WRITE8_MEMBER( portb_w );
	140	DECLARE_WRITE8_MEMBER( rtc_w );
	141	DECLARE_WRITE8_MEMBER( sysctrl_w );
	142	DECLARE_READ8_MEMBER( dma_page_r ) { return m_dma_page[offset]; }
	143	DECLARE_WRITE8_MEMBER( dma_page_w ) { m_dma_page[offset] = data; }
	144	DECLARE_READ8_MEMBER( dma2_r ) { return m_dma2->read(space, offset / 2); }
	145	DECLARE_WRITE8_MEMBER( dma2_w ) { m_dma2->write(space, offset / 2, data); }
	146	DECLARE_READ8_MEMBER( keyb_data_r );
	147	DECLARE_WRITE8_MEMBER( keyb_data_w );
	148	DECLARE_READ8_MEMBER( keyb_status_r );
	149	DECLARE_WRITE8_MEMBER( keyb_command_w );
	150
	151	// input lines
	152	DECLARE_WRITE_LINE_MEMBER( irq01_w ) { m_intc1->ir1_w(state); }
	153	DECLARE_WRITE_LINE_MEMBER( irq03_w ) { m_intc1->ir3_w(state); }
	154	DECLARE_WRITE_LINE_MEMBER( irq04_w ) { m_intc1->ir4_w(state); }
	155	DECLARE_WRITE_LINE_MEMBER( irq05_w ) { m_intc1->ir5_w(state); }
	156	DECLARE_WRITE_LINE_MEMBER( irq06_w ) { m_intc1->ir6_w(state); }
	157	DECLARE_WRITE_LINE_MEMBER( irq07_w ) { m_intc1->ir7_w(state); }
	158	DECLARE_WRITE_LINE_MEMBER( irq09_w ) { m_intc2->ir1_w(state); }
	159	DECLARE_WRITE_LINE_MEMBER( irq10_w ) { m_intc2->ir2_w(state); }
	160	DECLARE_WRITE_LINE_MEMBER( irq11_w ) { m_intc2->ir3_w(state); }
	161	DECLARE_WRITE_LINE_MEMBER( irq12_w ) { m_intc2->ir4_w(state); }
	162	DECLARE_WRITE_LINE_MEMBER( irq13_w ) { m_intc2->ir5_w(state); } // also FERR#
	163	DECLARE_WRITE_LINE_MEMBER( irq14_w ) { m_intc2->ir6_w(state); }
	164	DECLARE_WRITE_LINE_MEMBER( irq15_w ) { m_intc2->ir7_w(state); }
	165	DECLARE_WRITE_LINE_MEMBER( dreq0_w ) { m_dma1->dreq0_w(state); }
	166	DECLARE_WRITE_LINE_MEMBER( dreq1_w ) { m_dma1->dreq1_w(state); }
	167	DECLARE_WRITE_LINE_MEMBER( dreq2_w ) { m_dma1->dreq2_w(state); }
	168	DECLARE_WRITE_LINE_MEMBER( dreq3_w ) { m_dma1->dreq3_w(state); }
	169	DECLARE_WRITE_LINE_MEMBER( dreq5_w ) { m_dma2->dreq1_w(state); }
	170	DECLARE_WRITE_LINE_MEMBER( dreq6_w ) { m_dma2->dreq2_w(state); }
	171	DECLARE_WRITE_LINE_MEMBER( dreq7_w ) { m_dma2->dreq3_w(state); }
	172	DECLARE_WRITE_LINE_MEMBER( hlda_w ) { m_dma2->hack_w(state); }
	173	DECLARE_WRITE_LINE_MEMBER( iochck_w );
	174	DECLARE_WRITE_LINE_MEMBER( gatea20_w );
	175	DECLARE_WRITE_LINE_MEMBER( kbrst_w );
	176
	177	UINT8 int_ack_r() { return m_intc1->inta_r(); }
	178
56	179	// inline configuration
57	180	static void static_set_cputag(device_t &device, const char *tag);
58	181	static void static_set_isatag(device_t &device, const char *tag);
59	182	static void static_set_biostag(device_t &device, const char *tag);
	183	static void static_set_keybctag(device_t &device, const char *tag);
60	184
61	185	protected:
62	186	// device-level overrides
63	187	virtual void device_start();
64	188	virtual void device_reset();
	189	virtual void device_reset_after_children();
65	190
66	191	private:
	192	devcb2_read16 m_read_ior;
	193	devcb2_write16 m_write_iow;
	194	devcb2_write8 m_write_tc;
	195	devcb2_write_line m_write_hold;
	196	devcb2_write_line m_write_nmi;
	197	devcb2_write_line m_write_intr;
	198	devcb2_write_line m_write_cpureset;
	199	devcb2_write_line m_write_a20m;
	200	devcb2_write_line m_write_spkr;
	201
	202	offs_t page_offset();
	203	void set_dma_channel(int channel, bool state);
	204	void nmi();
	205	void a20m();
	206
67	207	void update_read_region(int index, const char *region, offs_t start, offs_t end);
68	208	void update_write_region(int index, const char *region, offs_t start, offs_t end);
69	209	void update_read_regions();
70	210	void update_write_regions();
71	211
72	212	// internal state
	213	const char *m_cputag;
	214	const char *m_isatag;
	215	const char *m_biostag;
	216	const char *m_keybctag;
	217
73	218	address_space *m_space;
	219	address_space *m_space_io;
74	220	UINT8 *m_isa;
75	221	UINT8 *m_bios;
76	222	UINT8 *m_ram;
77	223
78		// address selection
	224	// ipc core devices
	225	required_device<am9517a_device> m_dma1;
	226	required_device<am9517a_device> m_dma2;
	227	required_device<pic8259_device> m_intc1;
	228	required_device<pic8259_device> m_intc2;
	229	required_device<pit8254_device> m_ctc;
	230	required_device<mc146818_device> m_rtc;
	231
	232	int m_dma_eop;
	233	UINT8 m_dma_page[0x10];
	234	UINT8 m_dma_high_byte;
	235	int m_dma_channel;
	236
	237	UINT8 m_portb;
	238	int m_speaker_data;
	239	int m_refresh_toggle;
	240	int m_iochck;
	241	int m_nmi_mask;
	242
	243	// keyboard
	244	at_keyboard_controller_device *m_keybc;
	245	int m_cpureset;
	246	int m_kbrst;
	247	int m_ext_gatea20;
	248	int m_fast_gatea20;
	249
	250	// chipset configuration
	251	static const char* m_register_names[];
	252
	253	enum
	254	{
	255	DMA_WAIT_STATE = 0x01,
	256	PERFORMANCE = 0x08,
	257	F84035_MISC = 0x09,
	258	DMA_CLOCK = 0x0a,
	259	SHADOW_READ = 0x19,
	260	SHADOW_WRITE = 0x1a,
	261	ROMCS = 0x1b,
	262	SOFT_RESET_AND_GATEA20 = 0x1c
	263	};
	264
79	265	UINT8 m_address;
80	266	bool m_address_valid;
81	267
82		const char *m_cputag;
83		const char *m_isatag;
84		const char *m_biostag;
85
86
87	268	UINT8 m_registers[0x20];
88	269	};
89	270

trunk/src/mess/includes/at.h

r23674	r23675
20	20	#include "machine/i82371ab.h"
21	21	#include "machine/i82371sb.h"
22	22	#include "machine/i82439tx.h"
23		#include "machine/cs4031.h"
24	23	#include "machine/cs8221.h"
25	24	#include "machine/pit8253.h"
26	25	#include "video/pc_cga.h"
27		#include "video/isa_cga.h"
28		#include "video/isa_ega.h"
29		#include "video/isa_vga.h"
30		#include "video/isa_vga_ati.h"
31		#include "video/isa_svga_cirrus.h"
32		#include "video/isa_svga_s3.h"
33		#include "video/isa_svga_tseng.h"
34	26
35	27	#include "machine/idectrl.h"
36		#include "machine/isa_aha1542.h"
37	28	#include "machine/at_keybc.h"
38	29
39	30	#include "imagedev/harddriv.h"
r23674	r23675
46	37	#include "machine/ram.h"
47	38	#include "machine/nvram.h"
48	39	#include "machine/isa.h"
	40	#include "machine/isa_cards.h"
49	41
50		#include "machine/isa_adlib.h"
51		#include "machine/isa_com.h"
52		#include "machine/isa_fdc.h"
53		#include "machine/isa_gblaster.h"
54		#include "machine/isa_hdc.h"
55		#include "machine/isa_sblaster.h"
56		#include "machine/isa_stereo_fx.h"
57		#include "machine/isa_gus.h"
58		#include "machine/isa_ssi2001.h"
59		#include "machine/3c503.h"
60		#include "machine/ne1000.h"
61		#include "machine/ne2000.h"
62		#include "video/isa_mda.h"
63		#include "machine/isa_mpu401.h"
64		#include "machine/isa_ibm_mfc.h"
65
66		#include "machine/isa_ide.h"
67		#include "machine/isa_ide_cd.h"
68
69	42	#include "machine/pc_lpt.h"
70	43	#include "machine/pc_kbdc.h"
71	44
r23674	r23675
91	64	m_dma8237_2(*this, "dma8237_2"),
92	65	m_pit8254(*this, "pit8254"),
93	66	m_cs8221(*this, "cs8221"),
94		m_cs4031(*this, "cs4031"),
95	67	m_ide(*this, "ide"),
96	68	m_keybc(*this, "keybc"),
97	69	m_isabus(*this, "isabus"),
r23674	r23675
108	80	optional_device<am9517a_device> m_dma8237_2;
109	81	optional_device<pit8254_device> m_pit8254;
110	82	optional_device<cs8221_device> m_cs8221;
111		optional_device<cs4031_device> m_cs4031;
112	83	optional_device<ide_controller_device> m_ide;
113	84	optional_device<at_keyboard_controller_device> m_keybc;
114	85	optional_device<isa16_device> m_isabus;
r23674	r23675
155	126	DECLARE_WRITE8_MEMBER(at_keybc_w);
156	127	DECLARE_READ16_MEMBER(neat_chipset_r);
157	128	DECLARE_WRITE16_MEMBER(neat_chipset_w);
158		DECLARE_READ32_MEMBER(ct486_chipset_r);
159		DECLARE_WRITE32_MEMBER(ct486_chipset_w);
160	129	DECLARE_WRITE_LINE_MEMBER(at_mc146818_irq);
161	130	DECLARE_WRITE8_MEMBER(write_rtc);
162	131	int m_poll_delay;

trunk/src/mess/includes/pc1512.h

r23674	r23675
11	11	#include "machine/ctronics.h"
12	12	#include "machine/ins8250.h"
13	13	#include "machine/isa.h"
14		#include "machine/isa_wdxt_gen.h"
	14	#include "machine/isa_cards.h"
15	15	#include "machine/mc146818.h"
16	16	#include "machine/pic8259.h"
17	17	#include "machine/pit8253.h"

trunk/src/mess/includes/genpc.h

r23674	r23675
11	11	#include "machine/i8255.h"
12	12	#include "machine/am9517a.h"
13	13	#include "machine/isa.h"
	14	#include "machine/isa_cards.h"
14	15	#include "machine/pc_kbdc.h"
15	16	#include "machine/pic8259.h"
16	17	#include "machine/pit8253.h"

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