MAME SVN History

199869 Revisions

r23624 Tuesday 11th June, 2013 at 07:16:42 UTC by Miodrag Milanović
Cleanups and version bump

[hash]	ep64_cart.xml
[src]	version.c
[src/emu]	dislot.c emu.mak machine.c memory.h
[src/emu/cpu/rsp]	rsp.h
[src/emu/debug]	dvbpoints.c dvbpoints.h
[src/emu/machine]	7200fifo.c 7200fifo.h adc1038.h adc1213x.h ay31015.c ay31015.h com8116.c generic.c idectrl.c idectrl.h idehd.c im6402.c machine.mak mb14241.h mc68901.c mm58274c.c mm58274c.h pit8253.c pit8253.h rf5c296.c rp5h01.c rp5h01.h serflash.c serflash.h tms6100.c tms6100.h z80dart.c z80dart.h
[src/emu/sound]	msm5205.c sp0256.c sp0256.h speaker.c speaker.h ymf271.c ymz280b.c
[src/emu/video]	cdp1861.c cdp1862.c huc6270.h msm6255.c tms9927.c tms9927.h upd7227.c upd7227.h video.mak
[src/lib/formats]	bml3_dsk.c td0_dsk.c
[src/mame]	mame.lst
[src/mame/audio]	flower.c geebee.c redbaron.h snes_snd.c snes_snd.h warpwarp.c warpwarp.h
[src/mame/drivers]	8080bw.c alpha68k.c ambush.c asteroid.c btime.c ddealer.c decocass.c firebeat.c fruitpc.c galaxold.c galdrvr.c gaplus.c jpmsru.c mappy.c maygayep.c mazerbla.c mil4000.c mpu4.c mpu4hw.c proconn.c qix.c quakeat.c savquest.c seibuspi.c speedbal.c statriv2.c stuntair.c taito_f3.c tempest.c zn.c
[src/mame/includes]	bzone.h dkong.h exidy440.h flower.h galaxold.h gaplus.h mappy.h nmk16.h pgm.h playch10.h powerins.h seibuspi.h snowbros.h speedbal.h taito_b.h taitoair.h toypop.h vertigo.h vsnes.h warpwarp.h
[src/mame/layout]	speedbal.lay
[src/mame/machine]	mathbox.h midikbd.h mpeg573.c mpeg573.h namcoio.c namcoio.h naomig1.c nmk112.c nmk112.h pgmprot5.c taitoio.c taitoio.h
[src/mame/video]	kan_pand.c kan_pand.h powervr2.c powervr2.h seibuspi.c
[src/mess/audio]	dave.c dave.h mac.c mea8000.c mea8000.h upd1771.c upd1771.h
[src/mess/drivers]	a7000.c abc80.c altos5.c applix.c argo.c attache.c bml3.c chessmst.c concept.c cortex.c ep64.c gba.c hx20.c intv.c juicebox.c pasogo.c pc.c pc1512.c pes.c pet.c pv1000.c ql.c qx10.c samcoupe.c scv.c sdk86.c sg1000.c snes.c softbox.c superslave.c tec1.c victor9k.c vip.c vk100.c vt100.c
[src/mess/includes]	abc1600.h bw12.h ep64.h gba.h hx20.h mac.h pc1512.h sg1000.h sms.h superslave.h tandy2k.h v1050.h victor9k.h vixen.h wangpc.h
[src/mess/machine]	abc99.c abc99.h abckb.h apollo.c bbc.c concept.c concept_exp.c concept_exp.h ds1315.c ds1315.h ep64_exdos.c ep64_exdos.h ep64exp.h gba_rom.c gba_rom.h gba_slot.c gba_slot.h intv.c mboard.c mc68328.c mc68328.h md_rom.c md_rom.h msx.c pce.c pce_cd.c pce_cd.h pce_rom.c pce_rom.h pce_slot.c pce_slot.h s3c44b0.c s3c44b0.h sega8_rom.c sega8_rom.h sega8_slot.c sega8_slot.h sms.c sns_sa1.c sns_sdd1.c sns_sgb.c sns_sgb.h sns_spc7110.c sns_spc7110.h softbox.h upd71071.c victor9kb.h vp575.c wangpc_mcc.c zx8302.h
[src/mess/video]	gba.c gf4500.c gf4500.h newport.c newport.h nick.c nick.h stic.c stic.h vic4567.c vic4567.h vtvideo.c vtvideo.h
[src/osd/sdl]	debugqt.c debugqtdasmwindow.c debugqtmainwindow.c
[src/osd/windows]	d3dhlsl.c d3dhlsl.h debugwin.c window.c windows.mak winmain.c
[src/tools]	jedutil.c

trunk/src/tools/jedutil.c
r23623	r23624
498	498	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280}}; /* Registered Output */
499	499
500	500	static pin_fuse_rows _82s153pinfuserows[] = {
501		{9, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
502		{11, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
503		{12, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
504		{13, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
505		{14, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
506		{15, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
507		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
508		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
509		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
510		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0}};
	501	{9, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	502	{11, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	503	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	504	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	505	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	506	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	507	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	508	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	509	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	510	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0}};
511	511
512	512	static pin_fuse_rows pls153pinfuserows[] = {
513		{9, 1472, 0, 0},
514		{11, 1508, 0, 0},
515		{12, 1544, 0, 0},
516		{13, 1580, 0, 0},
517		{14, 1616, 0, 0},
518		{15, 1652, 0, 0},
519		{16, 1688, 0, 0},
520		{17, 1724, 0, 0},
521		{18, 1760, 0, 0},
522		{19, 1796, 0, 0}};
	513	{9, 1472, 0, 0},
	514	{11, 1508, 0, 0},
	515	{12, 1544, 0, 0},
	516	{13, 1580, 0, 0},
	517	{14, 1616, 0, 0},
	518	{15, 1652, 0, 0},
	519	{16, 1688, 0, 0},
	520	{17, 1724, 0, 0},
	521	{18, 1760, 0, 0},
	522	{19, 1796, 0, 0}};
523	523
524	524	static pin_fuse_rows ck2605pinfuserows[] = {
525		{9, 736, 0, 0},
526		{11, 772, 0, 0},
527		{12, 808, 0, 0},
528		{13, 844, 0, 0},
529		{14, 880, 0, 0},
530		{15, 916, 0, 0},
531		{16, 952, 0, 0},
532		{17, 988, 0, 0},
533		{18, 1024, 0, 0},
534		{19, 1060, 0, 0}};
	525	{9, 736, 0, 0},
	526	{11, 772, 0, 0},
	527	{12, 808, 0, 0},
	528	{13, 844, 0, 0},
	529	{14, 880, 0, 0},
	530	{15, 916, 0, 0},
	531	{16, 952, 0, 0},
	532	{17, 988, 0, 0},
	533	{18, 1024, 0, 0},
	534	{19, 1060, 0, 0}};
535	535
536	536	static pin_fuse_columns pal10l8pinfusecolumns[] = {
537	537	{1, 3, 2},
r23623	r23624
912	912	{23, 3, 2}};
913	913
914	914	static pin_fuse_columns _82s153pinfusecolumns[] = {
915		{1, 0, 0},
916		{2, 0, 0},
917		{3, 0, 0},
918		{4, 0, 0},
919		{5, 0, 0},
920		{6, 0, 0},
921		{7, 0, 0},
922		{8, 0, 0},
923		{9, 0, 0},
924		{11, 0, 0},
925		{12, 0, 0},
926		{13, 0, 0},
927		{14, 0, 0},
928		{15, 0, 0},
929		{16, 0, 0},
930		{17, 0, 0},
931		{18, 0, 0},
932		{19, 0, 0}};
	915	{1, 0, 0},
	916	{2, 0, 0},
	917	{3, 0, 0},
	918	{4, 0, 0},
	919	{5, 0, 0},
	920	{6, 0, 0},
	921	{7, 0, 0},
	922	{8, 0, 0},
	923	{9, 0, 0},
	924	{11, 0, 0},
	925	{12, 0, 0},
	926	{13, 0, 0},
	927	{14, 0, 0},
	928	{15, 0, 0},
	929	{16, 0, 0},
	930	{17, 0, 0},
	931	{18, 0, 0},
	932	{19, 0, 0}};
933	933
934	934	static pin_fuse_columns pls153pinfusecolumns[] = {
935		{1, 1, 0},
936		{2, 3, 2},
937		{3, 5, 4},
938		{4, 7, 6},
939		{5, 9, 8},
940		{6, 11, 10},
941		{7, 13, 12},
942		{8, 15, 14},
943		{9, 17, 16},
944		{11, 19, 18},
945		{12, 21, 20},
946		{13, 23, 22},
947		{14, 25, 24},
948		{15, 27, 26},
949		{16, 29, 28},
950		{17, 31, 30},
951		{18, 33, 32},
952		{19, 35, 34}};
	935	{1, 1, 0},
	936	{2, 3, 2},
	937	{3, 5, 4},
	938	{4, 7, 6},
	939	{5, 9, 8},
	940	{6, 11, 10},
	941	{7, 13, 12},
	942	{8, 15, 14},
	943	{9, 17, 16},
	944	{11, 19, 18},
	945	{12, 21, 20},
	946	{13, 23, 22},
	947	{14, 25, 24},
	948	{15, 27, 26},
	949	{16, 29, 28},
	950	{17, 31, 30},
	951	{18, 33, 32},
	952	{19, 35, 34}};
953	953
954	954	static pin_fuse_columns ck2605pinfusecolumns[] = {
955		{1, 1, 0},
956		{2, 3, 2},
957		{3, 5, 4},
958		{4, 7, 6},
959		{5, 9, 8},
960		{6, 11, 10},
961		{7, 13, 12},
962		{8, 15, 14},
963		{9, 17, 16},
964		{11, 19, 18},
965		{12, 21, 20},
966		{13, 23, 22},
967		{14, 25, 24},
968		{15, 27, 26},
969		{16, 29, 28},
970		{17, 31, 30},
971		{18, 33, 32},
972		{19, 35, 34}};
	955	{1, 1, 0},
	956	{2, 3, 2},
	957	{3, 5, 4},
	958	{4, 7, 6},
	959	{5, 9, 8},
	960	{6, 11, 10},
	961	{7, 13, 12},
	962	{8, 15, 14},
	963	{9, 17, 16},
	964	{11, 19, 18},
	965	{12, 21, 20},
	966	{13, 23, 22},
	967	{14, 25, 24},
	968	{15, 27, 26},
	969	{16, 29, 28},
	970	{17, 31, 30},
	971	{18, 33, 32},
	972	{19, 35, 34}};
973	973
974	974	static pal_data paldata[] = {
975	975	{"PAL10L8",
r23623	r23624
1081	1081	config_peel18cv8_pins,
1082	1082	NULL,
1083	1083	get_peel18cv8_pin_fuse_state},
1084		{"GAL18V10",
	1084	{"GAL18V10",
1085	1085	gal18v10pinfuserows, ARRAY_LEN(gal18v10pinfuserows),
1086	1086	gal18v10pinfusecolumns, ARRAY_LEN(gal18v10pinfusecolumns),
1087	1087	print_gal18v10_product_terms,
r23623	r23624
1123	1123	config_pal20r8_pins,
1124	1124	NULL,
1125	1125	NULL},/*
1126		{"PAL20X4", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1127		{"PAL20X8", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1128		{"PAL20X10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1129		{"PAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1130		{"GAL20V8A", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1131		{"GAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
1132		{"PLS100", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
	1126	{"PAL20X4", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	1127	{"PAL20X8", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	1128	{"PAL20X10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	1129	{"PAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	1130	{"GAL20V8A", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	1131	{"GAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
	1132	{"PLS100", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
1133	1133	{"82S153",
1134	1134	_82s153pinfuserows, ARRAY_LEN(_82s153pinfuserows),
1135	1135	_82s153pinfusecolumns, ARRAY_LEN(_82s153pinfusecolumns),
r23623	r23624
1144	1144	config_pls153_pins,
1145	1145	NULL,
1146	1146	NULL},
1147		{"CK2605",
	1147	{"CK2605",
1148	1148	ck2605pinfuserows, ARRAY_LEN(ck2605pinfuserows),
1149	1149	ck2605pinfusecolumns, ARRAY_LEN(ck2605pinfusecolumns),
1150	1150	print_ck2605_product_terms,
r23623	r23624
2155	2155
2156	2156	static void print_82s153_product_terms(const pal_data* pal, const jed_data* jed)
2157	2157	{
2158		fprintf(stderr, "Print of product terms not supported for this device\n");
	2158	fprintf(stderr, "Print of product terms not supported for this device\n");
2159	2159	}
2160	2160
2161	2161
r23623	r23624
2180	2180	printf("Equations:\n\n");
2181	2181
2182	2182	for (index = 0; index < outputpinscount; ++index)
2183		{
	2183	{
2184	2184	flags = outputpins[index].flags;
2185	2185
2186	2186	indent = 0;
r23623	r23624
2196	2196
2197	2197	printf("%s", buffer);
2198	2198
2199		haveterms = 0;
	2199	haveterms = 0;
2200	2200	indent += strlen(buffer);
2201	2201
2202	2202	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
2203		fuserow = 0;
	2203	fuserow = 0;
2204	2204
2205		if (outputpins[index].pin != 9)
2206		{
2207		or_column = 19 - outputpins[index].pin;
2208		}
2209		else
2210		{
2211		or_column = 9;
2212		}
	2205	if (outputpins[index].pin != 9)
	2206	{
	2207	or_column = 19 - outputpins[index].pin;
	2208	}
	2209	else
	2210	{
	2211	or_column = 9;
	2212	}
2213	2213
2214		for (row = 0; row < 32; ++row)
2215		{
2216		if (!jed_get_fuse(jed, fuserow + columncount + or_column))
2217		{
2218		generate_product_terms(pal, jed, fuserow, buffer);
	2214	for (row = 0; row < 32; ++row)
	2215	{
	2216	if (!jed_get_fuse(jed, fuserow + columncount + or_column))
	2217	{
	2218	generate_product_terms(pal, jed, fuserow, buffer);
2219	2219
2220		if (strlen(buffer) > 0)
2221		{
2222		if (haveterms)
2223		{
2224		printf(" +\n");
	2220	if (strlen(buffer) > 0)
	2221	{
	2222	if (haveterms)
	2223	{
	2224	printf(" +\n");
2225	2225
2226		for (indentindex = 0; indentindex < indent; ++indentindex)
2227		{
2228		printf(" ");
2229		}
2230		}
2231		else
2232		{
2233		haveterms = 1;
2234		}
	2226	for (indentindex = 0; indentindex < indent; ++indentindex)
	2227	{
	2228	printf(" ");
	2229	}
	2230	}
	2231	else
	2232	{
	2233	haveterms = 1;
	2234	}
2235	2235
2236		printf("%s", buffer);
2237		}
2238		}
	2236	printf("%s", buffer);
	2237	}
	2238	}
2239	2239
2240		fuserow += (columncount + 10);
2241		}
2242
2243		printf("\n");
	2240	fuserow += (columncount + 10);
	2241	}
2244	2242
	2243	printf("\n");
	2244
2245	2245	/* output enable equations */
2246	2246
2247	2247	printf("o%d.oe = ", outputpins[index].pin);
r23623	r23624
2258	2258	}
2259	2259
2260	2260	printf("\n");
2261		}
	2261	}
2262	2262	}
2263	2263
2264	2264
r23623	r23624
2283	2283	printf("Equations:\n\n");
2284	2284
2285	2285	for (index = 0; index < outputpinscount; ++index)
2286		{
	2286	{
2287	2287	flags = outputpins[index].flags;
2288	2288
2289	2289	indent = 0;
r23623	r23624
2299	2299
2300	2300	printf("%s", buffer);
2301	2301
2302		haveterms = 0;
	2302	haveterms = 0;
2303	2303	indent += strlen(buffer);
2304	2304
2305	2305	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
2306		fuserow = 0;
	2306	fuserow = 0;
2307	2307
2308		if (outputpins[index].pin != 9)
2309		{
2310		or_column = 19 - outputpins[index].pin;
2311		}
2312		else
2313		{
2314		or_column = 9;
2315		}
	2308	if (outputpins[index].pin != 9)
	2309	{
	2310	or_column = 19 - outputpins[index].pin;
	2311	}
	2312	else
	2313	{
	2314	or_column = 9;
	2315	}
2316	2316
2317		for (row = 0; row < 16; ++row)
2318		{
2319		if (!jed_get_fuse(jed, fuserow + columncount + or_column))
2320		{
2321		generate_product_terms(pal, jed, fuserow, buffer);
	2317	for (row = 0; row < 16; ++row)
	2318	{
	2319	if (!jed_get_fuse(jed, fuserow + columncount + or_column))
	2320	{
	2321	generate_product_terms(pal, jed, fuserow, buffer);
2322	2322
2323		if (strlen(buffer) > 0)
2324		{
2325		if (haveterms)
2326		{
2327		printf(" +\n");
	2323	if (strlen(buffer) > 0)
	2324	{
	2325	if (haveterms)
	2326	{
	2327	printf(" +\n");
2328	2328
2329		for (indentindex = 0; indentindex < indent; ++indentindex)
2330		{
2331		printf(" ");
2332		}
2333		}
2334		else
2335		{
2336		haveterms = 1;
2337		}
	2329	for (indentindex = 0; indentindex < indent; ++indentindex)
	2330	{
	2331	printf(" ");
	2332	}
	2333	}
	2334	else
	2335	{
	2336	haveterms = 1;
	2337	}
2338	2338
2339		printf("%s", buffer);
2340		}
2341		}
	2339	printf("%s", buffer);
	2340	}
	2341	}
2342	2342
2343		fuserow += (columncount + 10);
2344		}
2345
2346		printf("\n");
	2343	fuserow += (columncount + 10);
	2344	}
2347	2345
	2346	printf("\n");
	2347
2348	2348	/* output enable equations */
2349	2349
2350	2350	printf("o%d.oe = ", outputpins[index].pin);
r23623	r23624
2361	2361	}
2362	2362
2363	2363	printf("\n");
2364		}
	2364	}
2365	2365	}
2366	2366
2367	2367
r23623	r23624
3426	3426
3427	3427	output_pin_count = 0;
3428	3428
3429		for (index = 0; index < pal->pinfuserowscount; ++index)
3430		{
3431		if (does_output_enable_fuse_row_allow_output(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
3432		{
3433		output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
3434		output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
	3429	for (index = 0; index < pal->pinfuserowscount; ++index)
	3430	{
	3431	if (does_output_enable_fuse_row_allow_output(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	3432	{
	3433	output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
	3434	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
3435	3435
3436	3436	if (jed_get_fuse(jed, 1832 + (9 - index)))
3437	3437	{
r23623	r23624
3442	3442	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
3443	3443	}
3444	3444
3445		++output_pin_count;
3446		}
3447		}
	3445	++output_pin_count;
	3446	}
	3447	}
3448	3448
3449	3449	set_input_pins(input_pins, ARRAY_LEN(input_pins));
3450	3450	set_output_pins(output_pins, output_pin_count);
r23623	r23624
3465	3465
3466	3466	output_pin_count = 0;
3467	3467
3468		for (index = 0; index < pal->pinfuserowscount; ++index)
3469		{
3470		if (does_output_enable_fuse_row_allow_output(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
3471		{
3472		output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
3473		output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
	3468	for (index = 0; index < pal->pinfuserowscount; ++index)
	3469	{
	3470	if (does_output_enable_fuse_row_allow_output(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	3471	{
	3472	output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
	3473	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
3474	3474
3475	3475	if (jed_get_fuse(jed, 1096 + (9 - index)))
3476	3476	{
r23623	r23624
3481	3481	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
3482	3482	}
3483	3483
3484		++output_pin_count;
3485		}
3486		}
	3484	++output_pin_count;
	3485	}
	3486	}
3487	3487
3488	3488	set_input_pins(input_pins, ARRAY_LEN(input_pins));
3489	3489	set_output_pins(output_pins, output_pin_count);

trunk/src/osd/sdl/debugqtdasmwindow.c
r23623	r23624
107	107	DasmWindow::~DasmWindow()
108	108	{
109	109	}
110
111
	110
	111
112	112	void DasmWindow::cpuChanged(int index)
113	113	{
114	114	m_dasmView->view()->set_source(*m_dasmView->view()->source_list().by_index(index));

trunk/src/osd/sdl/debugqtmainwindow.c
r23623	r23624
297	297
298	298	// Send along the command
299	299	debug_console_execute_command(*m_machine,
300		command.toLocal8Bit().data(),
301		true);
	300	command.toLocal8Bit().data(),
	301	true);
302	302
303	303	// Add history & set the index to be the top of the stack
304	304	addToHistory(command);
r23623	r23624
328	328	refreshAll();
329	329	return;
330	330	}
331
	331
332	332	// File dialog
333	333	QString filename = QFileDialog::getOpenFileName(this,
334	334	"Select an image file",
335	335	QDir::currentPath(),
336	336	tr("All files (.)"));
337
	337
338	338	if (img->load(filename.toUtf8().data()) != IMAGE_INIT_PASS)
339	339	{
340	340	debug_console_printf(*m_machine, "Image could not be mounted.\n");
341	341	refreshAll();
342	342	return;
343	343	}
344
	344
345	345	// Activate the unmount menu option
346	346	QAction* unmountAct = sender()->parent()->findChild<QAction*>("unmount");
347	347	unmountAct->setEnabled(true);
348
	348
349	349	// Set the mount name
350	350	QMenu* parentMenuItem = dynamic_cast<QMenu*>(sender()->parent());
351	351	QString baseString = parentMenuItem->title();
r23623	r23624
364	364	const int imageIndex = dynamic_cast<QAction*>(sender())->data().toInt();
365	365	image_interface_iterator iter(m_machine->root_device());
366	366	device_image_interface *img = iter.byindex(imageIndex);
367
	367
368	368	img->unload();
369
	369
370	370	// Deactivate the unmount menu option
371	371	dynamic_cast<QAction*>(sender())->setEnabled(false);
372
	372
373	373	// Set the mount name
374	374	QMenu* parentMenuItem = dynamic_cast<QMenu*>(sender()->parent());
375	375	QString baseString = parentMenuItem->title();
r23623	r23624
411	411	void MainWindow::createImagesMenu()
412	412	{
413	413	QMenu* imagesMenu = menuBar()->addMenu("&Images");
414
	414
415	415	int interfaceIndex = 0;
416	416	image_interface_iterator iter(m_machine->root_device());
417	417	for (device_image_interface *img = iter.first(); img != NULL; img = iter.next())
418	418	{
419	419	astring menuName;
420	420	menuName.format("%s : %s", img->device().name(), img->exists() ? img->filename() : "[empty slot]");
421
	421
422	422	QMenu* interfaceMenu = imagesMenu->addMenu(menuName.cstr());
423	423	interfaceMenu->setObjectName(img->device().name());
424
	424
425	425	QAction* mountAct = new QAction("Mount...", interfaceMenu);
426	426	QAction* unmountAct = new QAction("Unmount", interfaceMenu);
427	427	mountAct->setObjectName("mount");
r23623	r23624
430	430	unmountAct->setData(QVariant(interfaceIndex));
431	431	connect(mountAct, SIGNAL(triggered(bool)), this, SLOT(mountImage(bool)));
432	432	connect(unmountAct, SIGNAL(triggered(bool)), this, SLOT(unmountImage(bool)));
433
	433
434	434	if (!img->exists())
435	435	unmountAct->setEnabled(false);
436
	436
437	437	interfaceMenu->addAction(mountAct);
438	438	interfaceMenu->addAction(unmountAct);
439
	439
440	440	// TODO: Cassette operations
441
	441
442	442	interfaceIndex++;
443	443	}
444	444	}

trunk/src/osd/sdl/debugqt.c
r23623	r23624
65	65	if (parentnode == NULL)
66	66	return;
67	67
68		for (int i = 0; i < xmlConfigurations.size(); i++)
69		delete xmlConfigurations[i];
	68	for (int i = 0; i < xmlConfigurations.size(); i++)
	69	delete xmlConfigurations[i];
70	70	xmlConfigurations.clear();
71	71
72	72	// Configuration load
r23623	r23624
79	79	case WindowQtConfig::WIN_TYPE_MAIN: xmlConfigurations.push_back(new MainWindowQtConfig()); break;
80	80	case WindowQtConfig::WIN_TYPE_MEMORY: xmlConfigurations.push_back(new MemoryWindowQtConfig()); break;
81	81	case WindowQtConfig::WIN_TYPE_DASM: xmlConfigurations.push_back(new DasmWindowQtConfig()); break;
82		case WindowQtConfig::WIN_TYPE_LOG: xmlConfigurations.push_back(new LogWindowQtConfig()); break;
	82	case WindowQtConfig::WIN_TYPE_LOG: xmlConfigurations.push_back(new LogWindowQtConfig()); break;
83	83	case WindowQtConfig::WIN_TYPE_BREAK_POINTS: xmlConfigurations.push_back(new BreakpointsWindowQtConfig()); break;
84	84	default: continue;
85	85	}
r23623	r23624
94	94	if (config_type != CONFIG_TYPE_GAME)
95	95	return;
96	96
97		for (int i = 0; i < xmlConfigurations.size(); i++)
98		{
99		WindowQtConfig* config = xmlConfigurations[i];
	97	for (int i = 0; i < xmlConfigurations.size(); i++)
	98	{
	99	WindowQtConfig* config = xmlConfigurations[i];
100	100
101	101	// Create an xml node
102	102	xml_data_node *debugger_node;
r23623	r23624
112	112
113	113	static void gather_save_configurations()
114	114	{
115		for (int i = 0; i < xmlConfigurations.size(); i++)
116		delete xmlConfigurations[i];
	115	for (int i = 0; i < xmlConfigurations.size(); i++)
	116	delete xmlConfigurations[i];
117	117	xmlConfigurations.clear();
118	118
119	119	// Loop over all the open windows
r23623	r23624
163	163
164	164	static void setup_additional_startup_windows(running_machine& machine, std::vector<WindowQtConfig*>& configList)
165	165	{
166		for (int i = 0; i < configList.size(); i++)
167		{
168		WindowQtConfig* config = configList[i];
169
	166	for (int i = 0; i < configList.size(); i++)
	167	{
	168	WindowQtConfig* config = configList[i];
	169
170	170	WindowQt* foo = NULL;
171	171	switch (config->m_type)
172	172	{

trunk/src/osd/windows/winmain.c
r23623	r23624
396	396	{ WINOPTION_VECTOR_LENGTH_RATIO";vecsize", "500.0", OPTION_FLOAT, "Vector fade length (4.0 - vectors fade the most at and above 4 pixels, etc.)" },
397	397	/* Bloom below this line */
398	398	{ NULL, NULL, OPTION_HEADER, "BLOOM POST-PROCESSING OPTIONS" },
399		{ WINOPTION_VECTOR_BLOOM_SCALE, "0.3", OPTION_FLOAT, "Intensity factor for vector bloom" },
400		{ WINOPTION_RASTER_BLOOM_SCALE, "0.225", OPTION_FLOAT, "Intensity factor for raster bloom" },
401		{ WINOPTION_BLOOM_LEVEL0_WEIGHT, "1.0", OPTION_FLOAT, "Bloom level 0 (full-size target) weight" },
402		{ WINOPTION_BLOOM_LEVEL1_WEIGHT, "0.21", OPTION_FLOAT, "Bloom level 1 (half-size target) weight" },
403		{ WINOPTION_BLOOM_LEVEL2_WEIGHT, "0.19", OPTION_FLOAT, "Bloom level 2 (quarter-size target) weight" },
404		{ WINOPTION_BLOOM_LEVEL3_WEIGHT, "0.17", OPTION_FLOAT, "Bloom level 3 (.) weight" },
405		{ WINOPTION_BLOOM_LEVEL4_WEIGHT, "0.15", OPTION_FLOAT, "Bloom level 4 (.) weight" },
406		{ WINOPTION_BLOOM_LEVEL5_WEIGHT, "0.14", OPTION_FLOAT, "Bloom level 5 (.) weight" },
407		{ WINOPTION_BLOOM_LEVEL6_WEIGHT, "0.13", OPTION_FLOAT, "Bloom level 6 (.) weight" },
408		{ WINOPTION_BLOOM_LEVEL7_WEIGHT, "0.12", OPTION_FLOAT, "Bloom level 7 (.) weight" },
409		{ WINOPTION_BLOOM_LEVEL8_WEIGHT, "0.11", OPTION_FLOAT, "Bloom level 8 (.) weight" },
410		{ WINOPTION_BLOOM_LEVEL9_WEIGHT, "0.10", OPTION_FLOAT, "Bloom level 9 (.) weight" },
411		{ WINOPTION_BLOOM_LEVEL10_WEIGHT, "0.09", OPTION_FLOAT, "Bloom level 10 (1x1 target) weight" },
	399	{ WINOPTION_VECTOR_BLOOM_SCALE, "0.3", OPTION_FLOAT, "Intensity factor for vector bloom" },
	400	{ WINOPTION_RASTER_BLOOM_SCALE, "0.225", OPTION_FLOAT, "Intensity factor for raster bloom" },
	401	{ WINOPTION_BLOOM_LEVEL0_WEIGHT, "1.0", OPTION_FLOAT, "Bloom level 0 (full-size target) weight" },
	402	{ WINOPTION_BLOOM_LEVEL1_WEIGHT, "0.21", OPTION_FLOAT, "Bloom level 1 (half-size target) weight" },
	403	{ WINOPTION_BLOOM_LEVEL2_WEIGHT, "0.19", OPTION_FLOAT, "Bloom level 2 (quarter-size target) weight" },
	404	{ WINOPTION_BLOOM_LEVEL3_WEIGHT, "0.17", OPTION_FLOAT, "Bloom level 3 (.) weight" },
	405	{ WINOPTION_BLOOM_LEVEL4_WEIGHT, "0.15", OPTION_FLOAT, "Bloom level 4 (.) weight" },
	406	{ WINOPTION_BLOOM_LEVEL5_WEIGHT, "0.14", OPTION_FLOAT, "Bloom level 5 (.) weight" },
	407	{ WINOPTION_BLOOM_LEVEL6_WEIGHT, "0.13", OPTION_FLOAT, "Bloom level 6 (.) weight" },
	408	{ WINOPTION_BLOOM_LEVEL7_WEIGHT, "0.12", OPTION_FLOAT, "Bloom level 7 (.) weight" },
	409	{ WINOPTION_BLOOM_LEVEL8_WEIGHT, "0.11", OPTION_FLOAT, "Bloom level 8 (.) weight" },
	410	{ WINOPTION_BLOOM_LEVEL9_WEIGHT, "0.10", OPTION_FLOAT, "Bloom level 9 (.) weight" },
	411	{ WINOPTION_BLOOM_LEVEL10_WEIGHT, "0.09", OPTION_FLOAT, "Bloom level 10 (1x1 target) weight" },
412	412
413	413	// per-window options
414	414	{ NULL, NULL, OPTION_HEADER, "PER-WINDOW VIDEO OPTIONS" },

trunk/src/osd/windows/d3dhlsl.c
r23623	r23624
88	88
89	89	namespace d3d
90	90	{
91
92	91	hlsl_options shaders::s_hlsl_presets[4] =
93	92	{
94	93	{ // 25% Shadow mask, 50% Scanlines, 3% Pincushion, 0 defocus, No Tint, 0.9 Exponent, 5% Floor, 25% Phosphor Return, 120% Saturation

trunk/src/osd/windows/d3dhlsl.h
r23623	r23624
182	182
183	183	struct slider_desc
184	184	{
185		const char * name;
186		int minval;
187		int defval;
188		int maxval;
189		int step;
	185	const char * name;
	186	int minval;
	187	int defval;
	188	int maxval;
	189	int step;
190	190	INT32 (adjustor)(running_machine &, void , astring *, INT32);
191	191	};
192	192
r23623	r23624
282	282	render_target * targethead;
283	283	cache_target * cachehead;
284	284
285		static slider_desc s_sliders[];
	285	static slider_desc s_sliders[];
286	286	static hlsl_options s_hlsl_presets[4];
287	287	};
288	288

trunk/src/osd/windows/debugwin.c
r23623	r23624
469	469	// get other metrics
470	470	hscroll_height = GetSystemMetrics(SM_CYHSCROLL);
471	471	vscroll_width = GetSystemMetrics(SM_CXVSCROLL);
472
	472
473	473	// ensure we get called on the way out
474	474	machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(debugwin_destroy_windows), &machine()));
475	475	}

trunk/src/osd/windows/window.c
r23623	r23624
1947	1947	return false;
1948	1948	}
1949	1949	#endif
1950

trunk/src/osd/windows/windows.mak
r23623	r23624
358	358	$(MOC) $(INCPATH) $(DEFS) $< -o $@
359	359
360	360	OSDOBJS += \
361		$(SDLOBJ)/debugqt.o \
362		$(SDLOBJ)/debugqtview.o \
363		$(SDLOBJ)/debugqtwindow.o \
364		$(SDLOBJ)/debugqtlogwindow.o \
365		$(SDLOBJ)/debugqtdasmwindow.o \
366		$(SDLOBJ)/debugqtmainwindow.o \
367		$(SDLOBJ)/debugqtmemorywindow.o \
368		$(SDLOBJ)/debugqtbreakpointswindow.o \
369		$(SDLOBJ)/debugqtview.moc.o \
370		$(SDLOBJ)/debugqtwindow.moc.o \
371		$(SDLOBJ)/debugqtlogwindow.moc.o \
372		$(SDLOBJ)/debugqtdasmwindow.moc.o \
373		$(SDLOBJ)/debugqtmainwindow.moc.o \
374		$(SDLOBJ)/debugqtmemorywindow.moc.o \
375		$(SDLOBJ)/debugqtbreakpointswindow.moc.o
	361	$(SDLOBJ)/debugqt.o \
	362	$(SDLOBJ)/debugqtview.o \
	363	$(SDLOBJ)/debugqtwindow.o \
	364	$(SDLOBJ)/debugqtlogwindow.o \
	365	$(SDLOBJ)/debugqtdasmwindow.o \
	366	$(SDLOBJ)/debugqtmainwindow.o \
	367	$(SDLOBJ)/debugqtmemorywindow.o \
	368	$(SDLOBJ)/debugqtbreakpointswindow.o \
	369	$(SDLOBJ)/debugqtview.moc.o \
	370	$(SDLOBJ)/debugqtwindow.moc.o \
	371	$(SDLOBJ)/debugqtlogwindow.moc.o \
	372	$(SDLOBJ)/debugqtdasmwindow.moc.o \
	373	$(SDLOBJ)/debugqtmainwindow.moc.o \
	374	$(SDLOBJ)/debugqtmemorywindow.moc.o \
	375	$(SDLOBJ)/debugqtbreakpointswindow.moc.o
376	376	endif
377	377
378	378	#-------------------------------------------------

trunk/src/emu/emu.mak
r23623	r23624
135	135	$(EMUOBJ)/sound/flt_vol.o \
136	136	$(EMUOBJ)/sound/flt_rc.o \
137	137	$(EMUOBJ)/sound/wavwrite.o \
138		$(EMUOBJ)/sound/samples.o \
	138	$(EMUOBJ)/sound/samples.o \
139	139
140	140	EMUDRIVEROBJS = \
141	141	$(EMUDRIVERS)/empty.o \
142	142	$(EMUDRIVERS)/testcpu.o \
143
	143
144	144	EMUMACHINEOBJS = \
145		$(EMUMACHINE)/generic.o \
146		$(EMUMACHINE)/ram.o \
147		$(EMUMACHINE)/nvram.o \
	145	$(EMUMACHINE)/generic.o \
	146	$(EMUMACHINE)/ram.o \
	147	$(EMUMACHINE)/nvram.o \
148	148	$(EMUMACHINE)/laserdsc.o \
149	149	$(EMUMACHINE)/net_lib.o \
150	150	$(EMUMACHINE)/netlist.o \
151
	151
152	152	EMUIMAGEDEVOBJS = \
153	153	$(EMUIMAGEDEV)/bitbngr.o \
154	154	$(EMUIMAGEDEV)/cartslot.o \
r23623	r23624
165	165
166	166
167	167	EMUVIDEOOBJS = \
168		$(EMUVIDEO)/generic.o \
169		$(EMUVIDEO)/resnet.o \
170		$(EMUVIDEO)/rgbutil.o \
171		$(EMUVIDEO)/vector.o \
	168	$(EMUVIDEO)/generic.o \
	169	$(EMUVIDEO)/resnet.o \
	170	$(EMUVIDEO)/rgbutil.o \
	171	$(EMUVIDEO)/vector.o \
172	172
173	173
174	174	LIBEMUOBJS = $(EMUOBJS) $(EMUSOUNDOBJS) $(EMUDRIVEROBJS) $(EMUMACHINEOBJS) $(EMUIMAGEDEVOBJS) $(EMUVIDEOOBJS)

trunk/src/emu/machine/pit8253.c
r23623	r23624
75	75	// device_start - device-specific startup
76	76	//-------------------------------------------------
77	77
78		void pit8253_device::common_start( int device_type )
	78	void pit8253_device::common_start( int device_type )
79	79	{
80	80	m_device_type = device_type;
81
	81
82	82	/* register for state saving */
83	83	for (int timerno = 0; timerno < PIT8253_MAX_TIMER; timerno++)
84	84	{
85	85	pit8253_timer *timer = get_timer(timerno);
86
	86
87	87	/* initialize timer */
88	88	timer->clockin = m_intf_timer[timerno].clockin;
89	89	timer->updatetimer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pit8253_device::update_timer_cb),this));
90	90	timer->updatetimer->adjust(attotime::never, timerno);
91
	91
92	92	/* resolve callbacks */
93	93	timer->in_gate_func.resolve(m_intf_timer[timerno].in_gate_func, *this);
94	94	timer->out_out_func.resolve(m_intf_timer[timerno].out_out_func, *this);
95
	95
96	96	/* set up state save values */
97	97	save_item(NAME(timer->clockin), timerno);
98	98	save_item(NAME(timer->control), timerno);
r23623	r23624
144	144	timer->rmsb = timer->wmsb = 0;
145	145	timer->count = timer->value = timer->latch = 0;
146	146	timer->lowcount = 0;
147
	147
148	148	if (!timer->in_gate_func.isnull())
149	149	timer->gate = timer->in_gate_func();
150	150	else
151	151	timer->gate = 1;
152
	152
153	153	timer->output = 2; /* output is undetermined */
154	154	timer->latched_count = 0;
155	155	timer->latched_status = 0;
156	156	timer->null_count = 1;
157	157	timer->cycles_to_output = CYCLES_NEVER;
158
	158
159	159	timer->last_updated = machine().time();
160
	160
161	161	update(timer);
162	162	}
163	163	}
r23623	r23624
311	311	LOG2(("pit8253: simulate2(): simulating %d cycles for %d in mode %d, bcd = %d, phase = %d, gate = %d, output %d, value = 0x%04x\n",
312	312	(int)elapsed_cycles, timer->index, mode, bcd, timer->phase, pit8253_gate(timer), timer->output, timer->value));
313	313
314		switch (mode)
	314	switch (mode)
315	315	{
316	316	case 0:
317	317	/* Mode 0: (Interrupt on Terminal Count)
r23623	r23624
342	342	if (elapsed_cycles >= 0 && timer->phase == 1)
343	343	{
344	344	/* Counter load cycle */
345		if (elapsed_cycles > 0)
	345	if (elapsed_cycles > 0)
346	346	{
347	347	--elapsed_cycles;
348	348	timer->phase = 2;
r23623	r23624
406	406	if (elapsed_cycles >= 0 && timer->phase == 1)
407	407	{
408	408	/* Counter load cycle, output goes low */
409		if (elapsed_cycles > 0)
	409	if (elapsed_cycles > 0)
410	410	{
411	411	--elapsed_cycles;
412	412	timer->phase = 2;
r23623	r23624
472	472	{
473	473	if (elapsed_cycles >= 0 && timer->phase == 1)
474	474	{
475		if (elapsed_cycles > 0)
	475	if (elapsed_cycles > 0)
476	476	{
477	477	--elapsed_cycles;
478	478	timer->phase = 2;
r23623	r23624
552	552	{
553	553	if (elapsed_cycles >= 0 && timer->phase == 1)
554	554	{
555		if (elapsed_cycles > 0)
	555	if (elapsed_cycles > 0)
556	556	{
557	557	--elapsed_cycles;
558	558	timer->phase = 2;
r23623	r23624
560	560	load_counter_value(timer);
561	561	}
562	562
563		if (elapsed_cycles > 0)
	563	if (elapsed_cycles > 0)
564	564	{
565	565	adjusted_value = adjusted_count(bcd, timer->value);
566	566
r23623	r23624
635	635	{
636	636	if (elapsed_cycles >= 0 && timer->phase == 1)
637	637	{
638		if (elapsed_cycles > 0)
	638	if (elapsed_cycles > 0)
639	639	{
640	640	--elapsed_cycles;
641	641	timer->phase = 2;
r23623	r23624
799	799	timer->rmsb = 1 - timer->rmsb;
800	800	--timer->latched_count;
801	801	}
802		else
	802	else
803	803	{
804	804	value = masked_value(timer);
805	805
806	806	/* Read back current count */
807		switch(CTRL_ACCESS(timer->control))
	807	switch(CTRL_ACCESS(timer->control))
808	808	{
809	809	case 0:
810	810	default:
r23623	r23624
892	892	if (timer->latched_count == 0)
893	893	{
894	894	value = masked_value(timer);
895		switch(CTRL_ACCESS(timer->control))
	895	switch(CTRL_ACCESS(timer->control))
896	896	{
897	897	case 0:
898	898	/* This should never happen */
r23623	r23624
928	928
929	929	LOG2(("pit8253: write(): offset=%d data=0x%02x\n", offset, data));
930	930
931		if (timer == NULL)
	931	if (timer == NULL)
932	932	{
933	933	/* Write to mode control register */
934	934	timer = get_timer((data >> 6) & 3);
r23623	r23624
982	982	if (machine().time() > timer->last_updated && timer->clockin != 0)
983	983	middle_of_a_cycle = 1;
984	984
985		switch(CTRL_ACCESS(timer->control))
	985	switch(CTRL_ACCESS(timer->control))
986	986	{
987	987	case 0:
988	988	/* This should never happen */
r23623	r23624
1124	1124	WRITE_LINE_MEMBER( pit8253_device::clk0_w ) { set_clock_signal(0, state); }
1125	1125	WRITE_LINE_MEMBER( pit8253_device::clk1_w ) { set_clock_signal(1, state); }
1126	1126	WRITE_LINE_MEMBER( pit8253_device::clk2_w ) { set_clock_signal(2, state); }
1127

trunk/src/emu/machine/pit8253.h
r23623	r23624
29	29
30	30
31	31	/* device types */
32		enum
	32	enum
33	33	{
34	34	TYPE_PIT8253 = 0,
35	35	TYPE_PIT8254
r23623	r23624
52	52	int index; /* index number of the timer */
53	53	double clockin; /* input clock frequency in Hz */
54	54	int clock; /* clock signal when clockin is 0 */
55
	55
56	56	devcb_resolved_read_line in_gate_func; /* callback for gate input */
57	57	devcb_resolved_write_line out_out_func; /* callback function for when output changes */
58
	58
59	59	attotime last_updated; /* time when last updated */
60
	60
61	61	emu_timer updatetimer; / MAME timer to process updates */
62
	62
63	63	UINT16 value; /* current counter value ("CE" in Intel docs) */
64	64	UINT16 latch; /* latched counter value ("OL" in Intel docs) */
65	65	UINT16 count; /* new counter value ("CR" in Intel docs) */
r23623	r23624
69	69	INT32 rmsb; /* 1 = Next read is MSB of 16-bit value */
70	70	INT32 wmsb; /* 1 = Next write is MSB of 16-bit value */
71	71	INT32 output; /* 0 = low, 1 = high */
72
	72
73	73	INT32 gate; /* gate input (0 = low, 1 = high) */
74	74	INT32 latched_count; /* number of bytes of count latched */
75	75	INT32 latched_status; /* 1 = status latched (8254 only) */
76	76	INT32 null_count; /* 1 = mode control or count written, 0 = count loaded */
77	77	INT32 phase; /* see phase definition tables in simulate2(), below */
78
	78
79	79	UINT32 cycles_to_output; /* cycles until output callback called */
80	80	};
81	81
r23623	r23624
90	90
91	91	DECLARE_READ8_MEMBER(read);
92	92	DECLARE_WRITE8_MEMBER(write);
93
	93
94	94	WRITE_LINE_MEMBER(clk0_w);
95	95	WRITE_LINE_MEMBER(clk1_w);
96	96	WRITE_LINE_MEMBER(clk2_w);
97
	97
98	98	WRITE_LINE_MEMBER(gate0_w);
99	99	WRITE_LINE_MEMBER(gate1_w);
100	100	WRITE_LINE_MEMBER(gate2_w);
101
102
	101
	102
103	103	/* In the 8253/8254 the CLKx input lines can be attached to a regular clock
104	104	signal. Another option is to use the output from one timer as the input
105	105	clock to another timer.
106
	106
107	107	The functions below should supply both functionalities. If the signal is
108	108	a regular clock signal, use the pit8253_set_clockin function. If the
109	109	CLKx input signal is the output of the different source, set the new_clockin
r23623	r23624
113	113	int get_output(int timer);
114	114	void set_clockin(int timer, double new_clockin);
115	115
116
	116
117	117	protected:
118	118	// device-level overrides
119	119	virtual void device_config_complete();
120	120	virtual void device_start();
121	121	virtual void device_reset();
122	122
123
	123
124	124	// internal state
125	125	void common_start(int device_type);
126	126	pit8253_timer *get_timer(int which);
r23623	r23624
138	138	void set_clock_signal(int timerno, int state);
139	139
140	140	TIMER_CALLBACK_MEMBER(update_timer_cb);
141
	141
142	142	int m_device_type;
143	143
144	144	pit8253_timer m_timers[PIT8253_MAX_TIMER];

trunk/src/emu/machine/mc68901.c
r23623	r23624
1232	1232	if (data & UCR_PARITY_EVEN)
1233	1233	{
1234	1234	if (LOG) logerror("MC68901 '%s' Parity : Even\n", tag());
1235
	1235
1236	1236	parity_code = SERIAL_PARITY_EVEN;
1237	1237	}
1238	1238	else

trunk/src/emu/machine/idehd.c
r23623	r23624
239	239
240	240	void ide_hdd_device::device_start()
241	241	{
242		// save_item(NAME(features));
	242	// save_item(NAME(features));
243	243
244	244	save_item(NAME(cur_cylinder));
245	245	save_item(NAME(cur_sector));

trunk/src/emu/machine/adc1213x.h
r23623	r23624
40	40	DECLARE_WRITE8_MEMBER( conv_w );
41	41	DECLARE_READ8_MEMBER( do_r );
42	42	DECLARE_READ8_MEMBER( eoc_r );
43
	43
44	44	protected:
45	45	// device-level overrides
46	46	virtual void device_config_complete();
47	47	virtual void device_start();
48	48	virtual void device_reset();
49
	49
50	50	void convert(int channel, int bits16, int lsbfirst);
51	51
52	52	adc1213x_input_convert_func m_input_callback_r_func;
53
	53
54	54	private:
55	55	// internal state
56	56	int m_cycle;

trunk/src/emu/machine/machine.mak
r23623	r23624
15	15
16	16
17	17	#-------------------------------------------------
18		#
	18	#
19	19	#-------------------------------------------------
20	20
21	21	ifneq ($(filter NCR53C7XX,$(MACHINES)),)
r23623	r23624
24	24	endif
25	25
26	26	#-------------------------------------------------
27		#
	27	#
28	28	#-------------------------------------------------
29	29
30	30	ifneq ($(filter LSI53C810,$(MACHINES)),)
r23623	r23624
33	33	endif
34	34
35	35	#-------------------------------------------------
36		#
	36	#
37	37	#-------------------------------------------------
38	38
39	39	ifneq ($(filter 6522VIA,$(MACHINES)),)
r23623	r23624
41	41	endif
42	42
43	43	#-------------------------------------------------
44		#
	44	#
45	45	#-------------------------------------------------
46	46
47	47	ifneq ($(filter TPI6525,$(MACHINES)),)
r23623	r23624
49	49	endif
50	50
51	51	#-------------------------------------------------
52		#
	52	#
53	53	#-------------------------------------------------
54	54
55	55	ifneq ($(filter 6526CIA,$(MACHINES)),)
r23623	r23624
57	57	endif
58	58
59	59	#-------------------------------------------------
60		#
	60	#
61	61	#-------------------------------------------------
62	62
63	63	ifneq ($(filter RIOT6532,$(MACHINES)),)
r23623	r23624
65	65	endif
66	66
67	67	#-------------------------------------------------
68		#
	68	#
69	69	#-------------------------------------------------
70	70
71	71	ifneq ($(filter 6821PIA,$(MACHINES)),)
r23623	r23624
73	73	endif
74	74
75	75	#-------------------------------------------------
76		#
	76	#
77	77	#-------------------------------------------------
78	78
79	79	ifneq ($(filter 6840PTM,$(MACHINES)),)
r23623	r23624
81	81	endif
82	82
83	83	#-------------------------------------------------
84		#
	84	#
85	85	#-------------------------------------------------
86	86
87	87	ifneq ($(filter ACIA6850,$(MACHINES)),)
r23623	r23624
89	89	endif
90	90
91	91	#-------------------------------------------------
92		#
	92	#
93	93	#-------------------------------------------------
94	94
95	95	ifneq ($(filter 68681,$(MACHINES)),)
96		MACHINEOBJS += $(MACHINEOBJ)/68681.o
	96	MACHINEOBJS += $(MACHINEOBJ)/68681.o
97	97	MACHINEOBJS += $(MACHINEOBJ)/n68681.o
98	98	endif
99	99
100	100	#-------------------------------------------------
101		#
	101	#
102	102	#-------------------------------------------------
103	103
104	104	ifneq ($(filter 7200FIFO,$(MACHINES)),)
r23623	r23624
106	106	endif
107	107
108	108	#-------------------------------------------------
109		#
	109	#
110	110	#-------------------------------------------------
111	111
112	112	ifneq ($(filter TTL74123,$(MACHINES)),)
113		MACHINEOBJS += $(MACHINEOBJ)/74123.o
	113	MACHINEOBJS += $(MACHINEOBJ)/74123.o
114	114	endif
115	115
116	116	#-------------------------------------------------
117		#
	117	#
118	118	#-------------------------------------------------
119	119
120	120	ifneq ($(filter TTL74145,$(MACHINES)),)
121		MACHINEOBJS += $(MACHINEOBJ)/74145.o
	121	MACHINEOBJS += $(MACHINEOBJ)/74145.o
122	122	endif
123	123
124	124	#-------------------------------------------------
125		#
	125	#
126	126	#-------------------------------------------------
127	127
128	128	ifneq ($(filter TTL74148,$(MACHINES)),)
129		MACHINEOBJS += $(MACHINEOBJ)/74148.o
	129	MACHINEOBJS += $(MACHINEOBJ)/74148.o
130	130	endif
131	131
132	132	#-------------------------------------------------
133		#
	133	#
134	134	#-------------------------------------------------
135	135
136	136	ifneq ($(filter TTL74153,$(MACHINES)),)
137		MACHINEOBJS += $(MACHINEOBJ)/74153.o
	137	MACHINEOBJS += $(MACHINEOBJ)/74153.o
138	138	endif
139	139
140	140	#-------------------------------------------------
141		#
	141	#
142	142	#-------------------------------------------------
143	143
144	144	ifneq ($(filter TTL74181,$(MACHINES)),)
145		MACHINEOBJS += $(MACHINEOBJ)/74181.o
	145	MACHINEOBJS += $(MACHINEOBJ)/74181.o
146	146	endif
147	147
148	148	#-------------------------------------------------
149		#
	149	#
150	150	#-------------------------------------------------
151	151
152	152	ifneq ($(filter TTL7474,$(MACHINES)),)
153		MACHINEOBJS += $(MACHINEOBJ)/7474.o
	153	MACHINEOBJS += $(MACHINEOBJ)/7474.o
154	154	endif
155	155
156	156	#-------------------------------------------------
157		#
	157	#
158	158	#-------------------------------------------------
159	159
160	160	ifneq ($(filter KBDC8042,$(MACHINES)),)
r23623	r23624
162	162	endif
163	163
164	164	#-------------------------------------------------
165		#
	165	#
166	166	#-------------------------------------------------
167	167
168	168	ifneq ($(filter I8257,$(MACHINES)),)
r23623	r23624
170	170	endif
171	171
172	172	#-------------------------------------------------
173		#
	173	#
174	174	#-------------------------------------------------
175	175
176	176	ifneq ($(filter AAKARTDEV,$(MACHINES)),)
r23623	r23624
178	178	endif
179	179
180	180	#-------------------------------------------------
181		#
	181	#
182	182	#-------------------------------------------------
183	183
184	184	ifneq ($(filter ADC0808,$(MACHINES)),)
r23623	r23624
186	186	endif
187	187
188	188	#-------------------------------------------------
189		#
	189	#
190	190	#-------------------------------------------------
191	191
192	192	ifneq ($(filter ADC083X,$(MACHINES)),)
r23623	r23624
194	194	endif
195	195
196	196	#-------------------------------------------------
197		#
	197	#
198	198	#-------------------------------------------------
199	199
200	200	ifneq ($(filter ADC1038,$(MACHINES)),)
r23623	r23624
202	202	endif
203	203
204	204	#-------------------------------------------------
205		#
	205	#
206	206	#-------------------------------------------------
207	207
208	208	ifneq ($(filter ADC1213X,$(MACHINES)),)
r23623	r23624
210	210	endif
211	211
212	212	#-------------------------------------------------
213		#
	213	#
214	214	#-------------------------------------------------
215	215
216	216	ifneq ($(filter AM53CF96,$(MACHINES)),)
r23623	r23624
218	218	endif
219	219
220	220	#-------------------------------------------------
221		#
	221	#
222	222	#-------------------------------------------------
223	223
224	224	ifneq ($(filter AM9517A,$(MACHINES)),)
r23623	r23624
226	226	endif
227	227
228	228	#-------------------------------------------------
229		#
	229	#
230	230	#-------------------------------------------------
231	231
232	232	ifneq ($(filter AMIGAFDC,$(MACHINES)),)
r23623	r23624
234	234	endif
235	235
236	236	#-------------------------------------------------
237		#
	237	#
238	238	#-------------------------------------------------
239	239
240	240	ifneq ($(filter AT28C16,$(MACHINES)),)
r23623	r23624
242	242	endif
243	243
244	244	#-------------------------------------------------
245		#
	245	#
246	246	#-------------------------------------------------
247	247
248	248	ifneq ($(filter AT29040,$(MACHINES)),)
r23623	r23624
250	250	endif
251	251
252	252	#-------------------------------------------------
253		#
	253	#
254	254	#-------------------------------------------------
255	255
256	256	ifneq ($(filter AT45DBXX,$(MACHINES)),)
r23623	r23624
258	258	endif
259	259
260	260	#-------------------------------------------------
261		#
	261	#
262	262	#-------------------------------------------------
263	263
264	264	ifneq ($(filter ATAFLASH,$(MACHINES)),)
r23623	r23624
268	268	endif
269	269
270	270	#-------------------------------------------------
271		#
	271	#
272	272	#-------------------------------------------------
273	273
274	274	ifneq ($(filter AY31015,$(MACHINES)),)
r23623	r23624
276	276	endif
277	277
278	278	#-------------------------------------------------
279		#
	279	#
280	280	#-------------------------------------------------
281	281
282	282	ifneq ($(filter BANKDEV,$(MACHINES)),)
r23623	r23624
284	284	endif
285	285
286	286	#-------------------------------------------------
287		#
	287	#
288	288	#-------------------------------------------------
289	289
290	290	ifneq ($(filter CDP1852,$(MACHINES)),)
r23623	r23624
292	292	endif
293	293
294	294	#-------------------------------------------------
295		#
	295	#
296	296	#-------------------------------------------------
297	297
298	298	ifneq ($(filter CDP1871,$(MACHINES)),)
r23623	r23624
300	300	endif
301	301
302	302	#-------------------------------------------------
303		#
	303	#
304	304	#-------------------------------------------------
305	305
306	306	ifneq ($(filter COM8116,$(MACHINES)),)
r23623	r23624
308	308	endif
309	309
310	310	#-------------------------------------------------
311		#
	311	#
312	312	#-------------------------------------------------
313	313
314	314	ifneq ($(filter CR589,$(MACHINES)),)
315		MACHINEOBJS += $(MACHINEOBJ)/cr589.o
	315	MACHINEOBJS += $(MACHINEOBJ)/cr589.o
316	316	endif
317	317
318	318	#-------------------------------------------------
319		#
	319	#
320	320	#-------------------------------------------------
321	321
322	322	ifneq ($(filter CTRONICS,$(MACHINES)),)
r23623	r23624
324	324	endif
325	325
326	326	#-------------------------------------------------
327		#
	327	#
328	328	#-------------------------------------------------
329	329
330	330	ifneq ($(filter DS1302,$(MACHINES)),)
r23623	r23624
332	332	endif
333	333
334	334	#-------------------------------------------------
335		#
	335	#
336	336	#-------------------------------------------------
337	337
338	338	ifneq ($(filter DS2401,$(MACHINES)),)
r23623	r23624
340	340	endif
341	341
342	342	#-------------------------------------------------
343		#
	343	#
344	344	#-------------------------------------------------
345	345
346	346	ifneq ($(filter DS2404,$(MACHINES)),)
r23623	r23624
348	348	endif
349	349
350	350	#-------------------------------------------------
351		#
	351	#
352	352	#-------------------------------------------------
353	353
354	354	ifneq ($(filter DS75160A,$(MACHINES)),)
r23623	r23624
356	356	endif
357	357
358	358	#-------------------------------------------------
359		#
	359	#
360	360	#-------------------------------------------------
361	361
362	362	ifneq ($(filter DS75161A,$(MACHINES)),)
r23623	r23624
364	364	endif
365	365
366	366	#-------------------------------------------------
367		#
	367	#
368	368	#-------------------------------------------------
369	369
370	370	ifneq ($(filter E0516,$(MACHINES)),)
371		MACHINEOBJS += $(MACHINEOBJ)/e0516.o
	371	MACHINEOBJS += $(MACHINEOBJ)/e0516.o
372	372	endif
373	373
374	374	#-------------------------------------------------
375		#
	375	#
376	376	#-------------------------------------------------
377	377
378	378	ifneq ($(filter EEPROMDEV,$(MACHINES)),)
r23623	r23624
380	380	endif
381	381
382	382	#-------------------------------------------------
383		#
	383	#
384	384	#-------------------------------------------------
385	385
386	386	ifneq ($(filter ER2055,$(MACHINES)),)
r23623	r23624
388	388	endif
389	389
390	390	#-------------------------------------------------
391		#
	391	#
392	392	#-------------------------------------------------
393	393
394	394	ifneq ($(filter ER59256,$(MACHINES)),)
r23623	r23624
396	396	endif
397	397
398	398	#-------------------------------------------------
399		#
	399	#
400	400	#-------------------------------------------------
401	401
402	402	ifneq ($(filter F3853,$(MACHINES)),)
403		MACHINEOBJS += $(MACHINEOBJ)/f3853.o
	403	MACHINEOBJS += $(MACHINEOBJ)/f3853.o
404	404	endif
405	405
406	406	#-------------------------------------------------
407		#
	407	#
408	408	#-------------------------------------------------
409	409
410	410	ifneq ($(filter I2CMEM,$(MACHINES)),)
r23623	r23624
412	412	endif
413	413
414	414	#-------------------------------------------------
415		#
	415	#
416	416	#-------------------------------------------------
417	417
418	418	ifneq ($(filter I8155,$(MACHINES)),)
419		MACHINEOBJS += $(MACHINEOBJ)/i8155.o
	419	MACHINEOBJS += $(MACHINEOBJ)/i8155.o
420	420	endif
421	421
422	422	#-------------------------------------------------
423		#
	423	#
424	424	#-------------------------------------------------
425	425
426	426	ifneq ($(filter I8212,$(MACHINES)),)
427		MACHINEOBJS += $(MACHINEOBJ)/i8212.o
	427	MACHINEOBJS += $(MACHINEOBJ)/i8212.o
428	428	endif
429	429
430	430	#-------------------------------------------------
431		#
	431	#
432	432	#-------------------------------------------------
433	433
434	434	ifneq ($(filter I8214,$(MACHINES)),)
435		MACHINEOBJS += $(MACHINEOBJ)/i8214.o
	435	MACHINEOBJS += $(MACHINEOBJ)/i8214.o
436	436	endif
437	437
438	438	#-------------------------------------------------
439		#
	439	#
440	440	#-------------------------------------------------
441	441
442	442	ifneq ($(filter I8243,$(MACHINES)),)
443		MACHINEOBJS += $(MACHINEOBJ)/i8243.o
	443	MACHINEOBJS += $(MACHINEOBJ)/i8243.o
444	444	endif
445	445
446	446	#-------------------------------------------------
447		#
	447	#
448	448	#-------------------------------------------------
449	449
450	450	ifneq ($(filter I8251,$(MACHINES)),)
451		MACHINEOBJS += $(MACHINEOBJ)/i8251.o
	451	MACHINEOBJS += $(MACHINEOBJ)/i8251.o
452	452	endif
453	453
454	454	#-------------------------------------------------
455		#
	455	#
456	456	#-------------------------------------------------
457	457
458	458	ifneq ($(filter I8279,$(MACHINES)),)
459		MACHINEOBJS += $(MACHINEOBJ)/i8279.o
	459	MACHINEOBJS += $(MACHINEOBJ)/i8279.o
460	460	endif
461	461
462	462	#-------------------------------------------------
463		#
	463	#
464	464	#-------------------------------------------------
465	465
466	466	ifneq ($(filter I8355,$(MACHINES)),)
467		MACHINEOBJS += $(MACHINEOBJ)/i8355.o
	467	MACHINEOBJS += $(MACHINEOBJ)/i8355.o
468	468	endif
469	469
470	470	#-------------------------------------------------
471		#
	471	#
472	472	#-------------------------------------------------
473	473
474	474	ifneq ($(filter IDE,$(MACHINES)),)
475	475	MACHINEOBJS += $(MACHINEOBJ)/idectrl.o
476		MACHINEOBJS += $(MACHINEOBJ)/idehd.o
	476	MACHINEOBJS += $(MACHINEOBJ)/idehd.o
477	477	endif
478	478
479	479	#-------------------------------------------------
480		#
	480	#
481	481	#-------------------------------------------------
482	482
483	483	ifneq ($(filter IM6402,$(MACHINES)),)
r23623	r23624
485	485	endif
486	486
487	487	#-------------------------------------------------
488		#
	488	#
489	489	#-------------------------------------------------
490	490
491	491	ifneq ($(filter INS8154,$(MACHINES)),)
r23623	r23624
493	493	endif
494	494
495	495	#-------------------------------------------------
496		#
	496	#
497	497	#-------------------------------------------------
498	498
499	499	ifneq ($(filter INS8250,$(MACHINES)),)
r23623	r23624
501	501	endif
502	502
503	503	#-------------------------------------------------
504		#
	504	#
505	505	#-------------------------------------------------
506	506
507	507	ifneq ($(filter INTELFLASH,$(MACHINES)),)
r23623	r23624
509	509	endif
510	510
511	511	#-------------------------------------------------
512		#
	512	#
513	513	#-------------------------------------------------
514	514
515	515	ifneq ($(filter JVS,$(MACHINES)),)
r23623	r23624
518	518	endif
519	519
520	520	#-------------------------------------------------
521		#
	521	#
522	522	#-------------------------------------------------
523	523
524	524	ifneq ($(filter K033906,$(MACHINES)),)
r23623	r23624
526	526	endif
527	527
528	528	#-------------------------------------------------
529		#
	529	#
530	530	#-------------------------------------------------
531	531
532	532	ifneq ($(filter K053252,$(MACHINES)),)
r23623	r23624
534	534	endif
535	535
536	536	#-------------------------------------------------
537		#
	537	#
538	538	#-------------------------------------------------
539	539
540	540	ifneq ($(filter K056230,$(MACHINES)),)
r23623	r23624
542	542	endif
543	543
544	544	#-------------------------------------------------
545		#
	545	#
546	546	#-------------------------------------------------
547	547
548	548	ifneq ($(filter LATCH8,$(MACHINES)),)
r23623	r23624
550	550	endif
551	551
552	552	#-------------------------------------------------
553		#
	553	#
554	554	#-------------------------------------------------
555	555
556	556	ifneq ($(filter LC89510,$(MACHINES)),)
r23623	r23624
558	558	endif
559	559
560	560	#-------------------------------------------------
561		#
	561	#
562	562	#-------------------------------------------------
563	563
564	564	ifneq ($(filter LDPR8210,$(MACHINES)),)
r23623	r23624
566	566	endif
567	567
568	568	#-------------------------------------------------
569		#
	569	#
570	570	#-------------------------------------------------
571	571
572	572	ifneq ($(filter LDSTUB,$(MACHINES)),)
r23623	r23624
574	574	endif
575	575
576	576	#-------------------------------------------------
577		#
	577	#
578	578	#-------------------------------------------------
579	579
580	580	ifneq ($(filter LDV1000,$(MACHINES)),)
r23623	r23624
584	584	endif
585	585
586	586	#-------------------------------------------------
587		#
	587	#
588	588	#-------------------------------------------------
589	589
590	590	ifneq ($(filter LDVP931,$(MACHINES)),)
r23623	r23624
592	592	endif
593	593
594	594	#-------------------------------------------------
595		#
	595	#
596	596	#-------------------------------------------------
597	597
598	598	ifneq ($(filter LINFLASH,$(MACHINES)),)
r23623	r23624
600	600	endif
601	601
602	602	#-------------------------------------------------
603		#
	603	#
604	604	#-------------------------------------------------
605	605
606	606	ifneq ($(filter M6M80011AP,$(MACHINES)),)
r23623	r23624
608	608	endif
609	609
610	610	#-------------------------------------------------
611		#
	611	#
612	612	#-------------------------------------------------
613	613
614	614	ifneq ($(filter MATSUCD,$(MACHINES)),)
r23623	r23624
616	616	endif
617	617
618	618	#-------------------------------------------------
619		#
	619	#
620	620	#-------------------------------------------------
621	621
622	622	ifneq ($(filter MB14241,$(MACHINES)),)
r23623	r23624
624	624	endif
625	625
626	626	#-------------------------------------------------
627		#
	627	#
628	628	#-------------------------------------------------
629	629
630	630	ifneq ($(filter MB3773,$(MACHINES)),)
r23623	r23624
632	632	endif
633	633
634	634	#-------------------------------------------------
635		#
	635	#
636	636	#-------------------------------------------------
637	637
638	638	ifneq ($(filter MB87078,$(MACHINES)),)
r23623	r23624
640	640	endif
641	641
642	642	#-------------------------------------------------
643		#
	643	#
644	644	#-------------------------------------------------
645	645
646	646	ifneq ($(filter MB89371,$(MACHINES)),)
r23623	r23624
648	648	endif
649	649
650	650	#-------------------------------------------------
651		#
	651	#
652	652	#-------------------------------------------------
653	653
654	654	ifneq ($(filter MC146818,$(MACHINES)),)
r23623	r23624
656	656	endif
657	657
658	658	#-------------------------------------------------
659		#
	659	#
660	660	#-------------------------------------------------
661	661
662	662	ifneq ($(filter MC2661,$(MACHINES)),)
r23623	r23624
664	664	endif
665	665
666	666	#-------------------------------------------------
667		#
	667	#
668	668	#-------------------------------------------------
669	669
670	670	ifneq ($(filter MC6843,$(MACHINES)),)
r23623	r23624
672	672	endif
673	673
674	674	#-------------------------------------------------
675		#
	675	#
676	676	#-------------------------------------------------
677	677
678	678	ifneq ($(filter MC6846,$(MACHINES)),)
r23623	r23624
680	680	endif
681	681
682	682	#-------------------------------------------------
683		#
	683	#
684	684	#-------------------------------------------------
685	685
686	686	ifneq ($(filter MC6852,$(MACHINES)),)
r23623	r23624
688	688	endif
689	689
690	690	#-------------------------------------------------
691		#
	691	#
692	692	#-------------------------------------------------
693	693
694	694	ifneq ($(filter MC6854,$(MACHINES)),)
r23623	r23624
696	696	endif
697	697
698	698	#-------------------------------------------------
699		#
	699	#
700	700	#-------------------------------------------------
701	701
702	702	ifneq ($(filter MC68901,$(MACHINES)),)
r23623	r23624
704	704	endif
705	705
706	706	#-------------------------------------------------
707		#
	707	#
708	708	#-------------------------------------------------
709	709
710	710	ifneq ($(filter MCCS1850,$(MACHINES)),)
r23623	r23624
712	712	endif
713	713
714	714	#-------------------------------------------------
715		#
	715	#
716	716	#-------------------------------------------------
717	717
718	718	ifneq ($(filter MCF5206E,$(MACHINES)),)
r23623	r23624
720	720	endif
721	721
722	722	#-------------------------------------------------
723		#
	723	#
724	724	#-------------------------------------------------
725	725
726	726	ifneq ($(filter MICROTOUCH,$(MACHINES)),)
r23623	r23624
728	728	endif
729	729
730	730	#-------------------------------------------------
731		#
	731	#
732	732	#-------------------------------------------------
733	733
734	734	ifneq ($(filter MM58274C,$(MACHINES)),)
r23623	r23624
736	736	endif
737	737
738	738	#-------------------------------------------------
739		#
	739	#
740	740	#-------------------------------------------------
741	741
742	742	ifneq ($(filter MM74C922,$(MACHINES)),)
r23623	r23624
744	744	endif
745	745
746	746	#-------------------------------------------------
747		#
	747	#
748	748	#-------------------------------------------------
749	749
750	750	ifneq ($(filter MOS6526,$(MACHINES)),)
r23623	r23624
752	752	endif
753	753
754	754	#-------------------------------------------------
755		#
	755	#
756	756	#-------------------------------------------------
757	757
758	758	ifneq ($(filter MOS6529,$(MACHINES)),)
r23623	r23624
760	760	endif
761	761
762	762	#-------------------------------------------------
763		#
	763	#
764	764	#-------------------------------------------------
765	765
766	766	ifneq ($(filter MIOT6530,$(MACHINES)),)
r23623	r23624
768	768	endif
769	769
770	770	#-------------------------------------------------
771		#
	771	#
772	772	#-------------------------------------------------
773	773
774	774	ifneq ($(filter MOS6551,$(MACHINES)),)
r23623	r23624
776	776	endif
777	777
778	778	#-------------------------------------------------
779		#
	779	#
780	780	#-------------------------------------------------
781	781
782	782	ifneq ($(filter MSM5832,$(MACHINES)),)
r23623	r23624
784	784	endif
785	785
786	786	#-------------------------------------------------
787		#
	787	#
788	788	#-------------------------------------------------
789	789
790	790	ifneq ($(filter MSM58321,$(MACHINES)),)
r23623	r23624
792	792	endif
793	793
794	794	#-------------------------------------------------
795		#
	795	#
796	796	#-------------------------------------------------
797	797
798	798	ifneq ($(filter MSM6242,$(MACHINES)),)
r23623	r23624
800	800	endif
801	801
802	802	#-------------------------------------------------
803		#
	803	#
804	804	#-------------------------------------------------
805	805
806	806	ifneq ($(filter NCR539x,$(MACHINES)),)
r23623	r23624
809	809	endif
810	810
811	811	#-------------------------------------------------
812		#
	812	#
813	813	#-------------------------------------------------
814	814
815	815	ifneq ($(filter NMC9306,$(MACHINES)),)
r23623	r23624
817	817	endif
818	818
819	819	#-------------------------------------------------
820		#
	820	#
821	821	#-------------------------------------------------
822	822
823	823	ifneq ($(filter NSCSI,$(MACHINES)),)
r23623	r23624
827	827	endif
828	828
829	829	#-------------------------------------------------
830		#
	830	#
831	831	#-------------------------------------------------
832	832
833	833	ifneq ($(filter PCF8593,$(MACHINES)),)
r23623	r23624
835	835	endif
836	836
837	837	#-------------------------------------------------
838		#
	838	#
839	839	#-------------------------------------------------
840	840
841	841	ifneq ($(filter PCI,$(MACHINES)),)
842		MACHINEOBJS += $(MACHINEOBJ)/pci.o
	842	MACHINEOBJS += $(MACHINEOBJ)/pci.o
843	843	endif
844	844
845	845	#-------------------------------------------------
846		#
	846	#
847	847	#-------------------------------------------------
848	848
849	849	ifneq ($(filter PCKEYBRD,$(MACHINES)),)
r23623	r23624
851	851	endif
852	852
853	853	#-------------------------------------------------
854		#
	854	#
855	855	#-------------------------------------------------
856	856
857	857	ifneq ($(filter PD4990A_OLD,$(MACHINES)),)
r23623	r23624
859	859	endif
860	860
861	861	#-------------------------------------------------
862		#
	862	#
863	863	#-------------------------------------------------
864	864
865	865	ifneq ($(filter PIC8259,$(MACHINES)),)
r23623	r23624
867	867	endif
868	868
869	869	#-------------------------------------------------
870		#
	870	#
871	871	#-------------------------------------------------
872	872
873	873	ifneq ($(filter PIT8253,$(MACHINES)),)
r23623	r23624
875	875	endif
876	876
877	877	#-------------------------------------------------
878		#
	878	#
879	879	#-------------------------------------------------
880	880
881	881	ifneq ($(filter PLA,$(MACHINES)),)
882		MACHINEOBJS += $(MACHINEOBJ)/pla.o
	882	MACHINEOBJS += $(MACHINEOBJ)/pla.o
883	883	endif
884	884
885	885	#-------------------------------------------------
886		#
	886	#
887	887	#-------------------------------------------------
888	888
889	889	ifneq ($(filter RF5C296,$(MACHINES)),)
r23623	r23624
892	892	endif
893	893
894	894	#-------------------------------------------------
895		#
	895	#
896	896	#-------------------------------------------------
897	897
898	898	ifneq ($(filter ROC10937,$(MACHINES)),)
r23623	r23624
900	900	endif
901	901
902	902	#-------------------------------------------------
903		#
	903	#
904	904	#-------------------------------------------------
905	905
906	906	ifneq ($(filter RP5C01,$(MACHINES)),)
r23623	r23624
908	908	endif
909	909
910	910	#-------------------------------------------------
911		#
	911	#
912	912	#-------------------------------------------------
913	913
914	914	ifneq ($(filter RP5C15,$(MACHINES)),)
r23623	r23624
916	916	endif
917	917
918	918	#-------------------------------------------------
919		#
	919	#
920	920	#-------------------------------------------------
921	921
922	922	ifneq ($(filter RP5H01,$(MACHINES)),)
r23623	r23624
924	924	endif
925	925
926	926	#-------------------------------------------------
927		#
	927	#
928	928	#-------------------------------------------------
929	929
930	930	ifneq ($(filter RTC4543,$(MACHINES)),)
r23623	r23624
932	932	endif
933	933
934	934	#-------------------------------------------------
935		#
	935	#
936	936	#-------------------------------------------------
937	937
938	938	ifneq ($(filter RTC65271,$(MACHINES)),)
r23623	r23624
940	940	endif
941	941
942	942	#-------------------------------------------------
943		#
	943	#
944	944	#-------------------------------------------------
945	945
946	946	ifneq ($(filter RTC9701,$(MACHINES)),)
r23623	r23624
948	948	endif
949	949
950	950	#-------------------------------------------------
951		#
	951	#
952	952	#-------------------------------------------------
953	953
954	954	ifneq ($(filter S3520CF,$(MACHINES)),)
r23623	r23624
956	956	endif
957	957
958	958	#-------------------------------------------------
959		#
	959	#
960	960	#-------------------------------------------------
961	961
962	962	ifneq ($(filter S3C2400,$(MACHINES)),)
r23623	r23624
964	964	endif
965	965
966	966	#-------------------------------------------------
967		#
	967	#
968	968	#-------------------------------------------------
969	969
970	970	ifneq ($(filter S3C2410,$(MACHINES)),)
r23623	r23624
972	972	endif
973	973
974	974	#-------------------------------------------------
975		#
	975	#
976	976	#-------------------------------------------------
977	977
978	978	ifneq ($(filter S3C2440,$(MACHINES)),)
r23623	r23624
980	980	endif
981	981
982	982	#-------------------------------------------------
983		#
	983	#
984	984	#-------------------------------------------------
985	985
986	986	ifneq ($(filter SATURN,$(MACHINES)),)
r23623	r23624
988	988	endif
989	989
990	990	#-------------------------------------------------
991		#
	991	#
992	992	#-------------------------------------------------
993	993
994	994	ifneq ($(filter SCSI,$(MACHINES)),)
r23623	r23624
1001	1001	endif
1002	1002
1003	1003	#-------------------------------------------------
1004		#
	1004	#
1005	1005	#-------------------------------------------------
1006	1006
1007	1007	ifneq ($(filter SCUDSP,$(MACHINES)),)
r23623	r23624
1009	1009	endif
1010	1010
1011	1011	#-------------------------------------------------
1012		#
	1012	#
1013	1013	#-------------------------------------------------
1014	1014
1015	1015	ifneq ($(filter SEIBU_COP,$(MACHINES)),)
r23623	r23624
1017	1017	endif
1018	1018
1019	1019	#-------------------------------------------------
1020		#
	1020	#
1021	1021	#-------------------------------------------------
1022	1022
1023	1023	ifneq ($(filter SERFLASH,$(MACHINES)),)
r23623	r23624
1025	1025	endif
1026	1026
1027	1027	#-------------------------------------------------
1028		#
	1028	#
1029	1029	#-------------------------------------------------
1030	1030
1031	1031	ifneq ($(filter SMC91C9X,$(MACHINES)),)
r23623	r23624
1033	1033	endif
1034	1034
1035	1035	#-------------------------------------------------
1036		#
	1036	#
1037	1037	#-------------------------------------------------
1038	1038
1039	1039	ifneq ($(filter SMPC,$(MACHINES)),)
1040		MACHINEOBJS += $(MACHINEOBJ)/smpc.o
	1040	MACHINEOBJS += $(MACHINEOBJ)/smpc.o
1041	1041	endif
1042	1042
1043	1043	#-------------------------------------------------
1044		#
	1044	#
1045	1045	#-------------------------------------------------
1046	1046
1047	1047	ifneq ($(filter STVCD,$(MACHINES)),)
1048		MACHINEOBJS += $(MACHINEOBJ)/stvcd.o
	1048	MACHINEOBJS += $(MACHINEOBJ)/stvcd.o
1049	1049	endif
1050	1050
1051	1051	#-------------------------------------------------
1052		#
	1052	#
1053	1053	#-------------------------------------------------
1054	1054
1055	1055	ifneq ($(filter TC0091LVC,$(MACHINES)),)
r23623	r23624
1057	1057	endif
1058	1058
1059	1059	#-------------------------------------------------
1060		#
	1060	#
1061	1061	#-------------------------------------------------
1062	1062
1063	1063	ifneq ($(filter TIMEKPR,$(MACHINES)),)
r23623	r23624
1065	1065	endif
1066	1066
1067	1067	#-------------------------------------------------
1068		#
	1068	#
1069	1069	#-------------------------------------------------
1070	1070
1071	1071	ifneq ($(filter TMP68301,$(MACHINES)),)
r23623	r23624
1073	1073	endif
1074	1074
1075	1075	#-------------------------------------------------
1076		#
	1076	#
1077	1077	#-------------------------------------------------
1078	1078
1079	1079	ifneq ($(filter TMS6100,$(MACHINES)),)
r23623	r23624
1081	1081	endif
1082	1082
1083	1083	#-------------------------------------------------
1084		#
	1084	#
1085	1085	#-------------------------------------------------
1086	1086
1087	1087	ifneq ($(filter TMS9901,$(MACHINES)),)
r23623	r23624
1089	1089	endif
1090	1090
1091	1091	#-------------------------------------------------
1092		#
	1092	#
1093	1093	#-------------------------------------------------
1094	1094
1095	1095	ifneq ($(filter TMS9902,$(MACHINES)),)
r23623	r23624
1097	1097	endif
1098	1098
1099	1099	#-------------------------------------------------
1100		#
	1100	#
1101	1101	#-------------------------------------------------
1102	1102
1103	1103	ifneq ($(filter UPD1990A,$(MACHINES)),)
r23623	r23624
1105	1105	endif
1106	1106
1107	1107	#-------------------------------------------------
1108		#
	1108	#
1109	1109	#-------------------------------------------------
1110	1110
1111	1111	ifneq ($(filter UPD4701,$(MACHINES)),)
r23623	r23624
1113	1113	endif
1114	1114
1115	1115	#-------------------------------------------------
1116		#
	1116	#
1117	1117	#-------------------------------------------------
1118	1118
1119	1119	ifneq ($(filter UPD7002,$(MACHINES)),)
r23623	r23624
1121	1121	endif
1122	1122
1123	1123	#-------------------------------------------------
1124		#
	1124	#
1125	1125	#-------------------------------------------------
1126	1126
1127	1127	ifneq ($(filter UPD765,$(MACHINES)),)
r23623	r23624
1129	1129	endif
1130	1130
1131	1131	#-------------------------------------------------
1132		#
	1132	#
1133	1133	#-------------------------------------------------
1134	1134
1135	1135	ifneq ($(filter V3021,$(MACHINES)),)
1136		MACHINEOBJS += $(MACHINEOBJ)/v3021.o
	1136	MACHINEOBJS += $(MACHINEOBJ)/v3021.o
1137	1137	endif
1138	1138
1139	1139	#-------------------------------------------------
1140		#
	1140	#
1141	1141	#-------------------------------------------------
1142	1142
1143	1143	ifneq ($(filter WD_FDC,$(MACHINES)),)
r23623	r23624
1146	1146	endif
1147	1147
1148	1148	#-------------------------------------------------
1149		#
	1149	#
1150	1150	#-------------------------------------------------
1151	1151
1152	1152	ifneq ($(filter WD11C00_17,$(MACHINES)),)
r23623	r23624
1154	1154	endif
1155	1155
1156	1156	#-------------------------------------------------
1157		#
	1157	#
1158	1158	#-------------------------------------------------
1159	1159
1160	1160	ifneq ($(filter WD17XX,$(MACHINES)),)
r23623	r23624
1162	1162	endif
1163	1163
1164	1164	#-------------------------------------------------
1165		#
	1165	#
1166	1166	#-------------------------------------------------
1167	1167
1168	1168	ifneq ($(filter WD2010,$(MACHINES)),)
r23623	r23624
1170	1170	endif
1171	1171
1172	1172	#-------------------------------------------------
1173		#
	1173	#
1174	1174	#-------------------------------------------------
1175	1175
1176	1176	ifneq ($(filter WD33C93,$(MACHINES)),)
r23623	r23624
1179	1179	endif
1180	1180
1181	1181	#-------------------------------------------------
1182		#
	1182	#
1183	1183	#-------------------------------------------------
1184	1184
1185	1185	ifneq ($(filter X2212,$(MACHINES)),)
1186		MACHINEOBJS += $(MACHINEOBJ)/x2212.o
	1186	MACHINEOBJS += $(MACHINEOBJ)/x2212.o
1187	1187	endif
1188	1188
1189	1189	#-------------------------------------------------
1190		#
	1190	#
1191	1191	#-------------------------------------------------
1192	1192
1193	1193	ifneq ($(filter X76F041,$(MACHINES)),)
r23623	r23624
1196	1196	endif
1197	1197
1198	1198	#-------------------------------------------------
1199		#
	1199	#
1200	1200	#-------------------------------------------------
1201	1201
1202	1202	ifneq ($(filter X76F100,$(MACHINES)),)
r23623	r23624
1205	1205	endif
1206	1206
1207	1207	#-------------------------------------------------
1208		#
	1208	#
1209	1209	#-------------------------------------------------
1210	1210
1211	1211	ifneq ($(filter Z80CTC,$(MACHINES)),)
r23623	r23624
1213	1213	endif
1214	1214
1215	1215	#-------------------------------------------------
1216		#
	1216	#
1217	1217	#-------------------------------------------------
1218	1218
1219	1219	ifneq ($(filter Z80DART,$(MACHINES)),)
r23623	r23624
1221	1221	endif
1222	1222
1223	1223	#-------------------------------------------------
1224		#
	1224	#
1225	1225	#-------------------------------------------------
1226	1226
1227	1227	ifneq ($(filter Z80DMA,$(MACHINES)),)
r23623	r23624
1229	1229	endif
1230	1230
1231	1231	#-------------------------------------------------
1232		#
	1232	#
1233	1233	#-------------------------------------------------
1234	1234
1235	1235	ifneq ($(filter Z80PIO,$(MACHINES)),)
r23623	r23624
1237	1237	endif
1238	1238
1239	1239	#-------------------------------------------------
1240		#
	1240	#
1241	1241	#-------------------------------------------------
1242	1242
1243	1243	ifneq ($(filter Z80SIO,$(MACHINES)),)
r23623	r23624
1245	1245	endif
1246	1246
1247	1247	#-------------------------------------------------
1248		#
	1248	#
1249	1249	#-------------------------------------------------
1250	1250
1251	1251	ifneq ($(filter Z80STI,$(MACHINES)),)
r23623	r23624
1253	1253	endif
1254	1254
1255	1255	#-------------------------------------------------
1256		#
	1256	#
1257	1257	#-------------------------------------------------
1258	1258
1259	1259	ifneq ($(filter Z8536,$(MACHINES)),)
1260		MACHINEOBJS += $(MACHINEOBJ)/z8536.o
	1260	MACHINEOBJS += $(MACHINEOBJ)/z8536.o
1261	1261	endif
1262	1262
1263	1263	#-------------------------------------------------
1264		#
	1264	#
1265	1265	#-------------------------------------------------
1266	1266
1267	1267	ifneq ($(filter SECFLASH,$(MACHINES)),)
r23623	r23624
1269	1269	endif
1270	1270
1271	1271	#-------------------------------------------------
1272		#
	1272	#
1273	1273	#-------------------------------------------------
1274	1274
1275	1275	ifneq ($(filter PCCARD,$(MACHINES)),)
r23623	r23624
1277	1277	endif
1278	1278
1279	1279	#-------------------------------------------------
1280		#
	1280	#
1281	1281	#-------------------------------------------------
1282	1282
1283	1283	ifneq ($(filter I8255,$(MACHINES)),)
1284		MACHINEOBJS += $(MACHINEOBJ)/i8255.o
	1284	MACHINEOBJS += $(MACHINEOBJ)/i8255.o
1285	1285	endif
1286	1286
1287	1287	$(MACHINEOBJ)/s3c2400.o: $(MACHINESRC)/s3c24xx.c

trunk/src/emu/machine/tms6100.c
r23623	r23624
85	85	: device_t(mconfig, TMS6100, "TMS6100", tag, owner, clock)
86	86	{
87	87	}
88
	88
89	89	const device_type M58819 = &device_creator<m58819_device>;
90	90
91	91	m58819_device::m58819_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
92	92	: tms6100_device(mconfig, M58819, "M58819", tag, owner, clock)
93	93	{
94	94	}
95
	95
96	96	//-------------------------------------------------
97	97	// device_config_complete - perform any
98	98	// operations now that the configuration is
r23623	r23624
231	231	{
232	232	return m_data;
233	233	}
234
235

trunk/src/emu/machine/tms6100.h
r23623	r23624
10	10	public:
11	11	tms6100_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
12	12	tms6100_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t *owner, UINT32 clock);
13
	13
14	14	DECLARE_WRITE_LINE_MEMBER( tms6100_m0_w );
15	15	DECLARE_WRITE_LINE_MEMBER( tms6100_m1_w );
16	16	DECLARE_WRITE_LINE_MEMBER( tms6100_romclock_w );
r23623	r23624
34	34	UINT8 m_tms_clock;
35	35	UINT8 m_data;
36	36	UINT8 m_state;
37
38		const UINT8 *m_rom;
39	37
	38	const UINT8 *m_rom;
	39
40	40	};
41	41
42	42	extern const device_type TMS6100;

trunk/src/emu/machine/z80dart.c
r23623	r23624
20	20
21	21	TODO:
22	22
23		- devcb2
24		- i8274 DMA scheme
	23	- devcb2
	24	- i8274 DMA scheme
25	25	- break detection
26	26	- wr0 reset tx interrupt pending
27	27	- wait/ready
r23623	r23624
494	494	{
495	495	m_rx_data_fifo[i] = 0;
496	496	m_rx_error_fifo[i] = 0;
497		}
	497	}
498	498	}
499	499
500	500
r23623	r23624
929	929	LOG(("Z80DART \"%s\" Channel %c : Parity %s\n", m_owner->tag(), 'A' + m_index, (data & WR4_PARITY_EVEN) ? "Even" : "Odd"));
930	930	LOG(("Z80DART \"%s\" Channel %c : Stop Bits %f\n", m_owner->tag(), 'A' + m_index, get_stop_bits()));
931	931	LOG(("Z80DART \"%s\" Channel %c : Clock Mode %uX\n", m_owner->tag(), 'A' + m_index, get_clock_mode()));
932
	932
933	933	update_serial();
934	934	break;
935	935
r23623	r23624
1279	1279	{
1280	1280	if (m_wr[1] & WR4_PARITY_EVEN)
1281	1281	parity_code = SERIAL_PARITY_EVEN;
1282		else
	1282	else
1283	1283	parity_code = SERIAL_PARITY_ODD;
1284	1284	}
1285	1285

trunk/src/emu/machine/z80dart.h
r23623	r23624
360	360
361	361	enum
362	362	{
363		WR2_DATA_XFER_INT = 0x00, // not supported
364		WR2_DATA_XFER_DMA_INT = 0x01, // not supported
365		WR2_DATA_XFER_DMA = 0x02, // not supported
366		WR2_DATA_XFER_ILLEGAL = 0x03, // not supported
367		WR2_DATA_XFER_MASK = 0x03, // not supported
368		WR2_PRIORITY = 0x04, // not supported
369		WR2_MODE_8085_1 = 0x00, // not supported
370		WR2_MODE_8085_2 = 0x08, // not supported
371		WR2_MODE_8086_8088 = 0x10, // not supported
372		WR2_MODE_ILLEGAL = 0x18, // not supported
373		WR2_MODE_MASK = 0x18, // not supported
374		WR2_VECTORED_INT = 0x20, // not supported
	363	WR2_DATA_XFER_INT = 0x00, // not supported
	364	WR2_DATA_XFER_DMA_INT = 0x01, // not supported
	365	WR2_DATA_XFER_DMA = 0x02, // not supported
	366	WR2_DATA_XFER_ILLEGAL = 0x03, // not supported
	367	WR2_DATA_XFER_MASK = 0x03, // not supported
	368	WR2_PRIORITY = 0x04, // not supported
	369	WR2_MODE_8085_1 = 0x00, // not supported
	370	WR2_MODE_8085_2 = 0x08, // not supported
	371	WR2_MODE_8086_8088 = 0x10, // not supported
	372	WR2_MODE_ILLEGAL = 0x18, // not supported
	373	WR2_MODE_MASK = 0x18, // not supported
	374	WR2_VECTORED_INT = 0x20, // not supported
375	375	WR2_PIN10_SYNDETB_RTSB = 0x80 // not supported
376	376	};
377	377

trunk/src/emu/machine/adc1038.h
r23623	r23624
47	47	virtual void device_config_complete();
48	48	virtual void device_start();
49	49	virtual void device_reset();
50
	50
51	51	adc1038_input_read_func m_input_callback_r_func;
52	52
53	53	private:

trunk/src/emu/machine/7200fifo.c
r23623	r23624
41	41	m_ef_handler.resolve();
42	42	m_ff_handler.resolve();
43	43	m_hf_handler.resolve();
44
	44
45	45	// state save
46	46	save_item(NAME(m_read_ptr));
47	47	save_item(NAME(m_write_ptr));
r23623	r23624
60	60	memset(m_buffer, 0, m_ram_size * sizeof(UINT16));
61	61	m_read_ptr = 0;
62	62	m_write_ptr = 0;
63
	63
64	64	m_ef = 1;
65	65	m_ff = 0;
66	66	m_hf = 0;
67
	67
68	68	if (!m_ef_handler.isnull()) m_ef_handler(m_ef);
69	69	if (!m_ff_handler.isnull()) m_ff_handler(m_ff);
70	70	if (!m_hf_handler.isnull()) m_hf_handler(m_hf);
r23623	r23624
82	82
83	83	m_buffer[m_write_ptr] = data & 0x1ff;
84	84	m_write_ptr = (m_write_ptr + 1) % m_ram_size;
85
	85
86	86	// update flags
87	87	if (m_ef)
88	88	{
r23623	r23624
110	110	logerror("IDT7200 %s fifo_read underflow!\n", tag());
111	111	return 0x1ff;
112	112	}
113
	113
114	114	UINT16 ret = m_buffer[m_read_ptr];
115	115	m_read_ptr = (m_read_ptr + 1) % m_ram_size;
116	116
r23623	r23624
126	126	m_ef = 1;
127	127	if (!m_ef_handler.isnull()) m_ef_handler(m_ef);
128	128	}
129
	129
130	130	else if (((m_read_ptr + m_ram_size / 2) % m_ram_size) == m_write_ptr)
131	131	{
132	132	m_hf = 0;
133	133	if (!m_hf_handler.isnull()) m_hf_handler(m_hf);
134	134	}
135
	135
136	136	return ret;
137	137	}

trunk/src/emu/machine/mb14241.h
r23623	r23624
12	12	{
13	13	public:
14	14	mb14241_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
15
	15
16	16	DECLARE_WRITE8_MEMBER ( shift_count_w );
17	17	DECLARE_WRITE8_MEMBER ( shift_data_w );
18	18	DECLARE_READ8_MEMBER( shift_result_r );
r23623	r23624
25	25
26	26	private:
27	27	// internal state
28
	28
29	29	UINT16 m_shift_data; /* 15 bits only */
30	30	UINT8 m_shift_count; /* 3 bits */
31	31	};

trunk/src/emu/machine/7200fifo.h
r23623	r23624
93	93	DECLARE_READ_LINE_MEMBER( ef_r ) { return m_ef; }
94	94	DECLARE_READ_LINE_MEMBER( ff_r ) { return m_ff; }
95	95	DECLARE_READ_LINE_MEMBER( hf_r ) { return m_hf; }
96
	96
97	97	// normal configuration
98	98	DECLARE_WRITE16_MEMBER( data_word_w ) { fifo_write(data); }
99	99	DECLARE_READ16_MEMBER( data_word_r ) { return (UINT16)fifo_read(); }
r23623	r23624
113	113
114	114	UINT16* m_buffer;
115	115	int m_ram_size;
116
	116
117	117	int m_read_ptr;
118	118	int m_write_ptr;
119
	119
120	120	int m_ef; // empty flag
121	121	int m_ff; // full flag
122	122	int m_hf; // half-full flag
123
	123
124	124	devcb2_write_line m_ef_handler;
125	125	devcb2_write_line m_ff_handler;
126	126	devcb2_write_line m_hf_handler;

trunk/src/emu/machine/idectrl.c
r23623	r23624
97	97	LOG(("IDE interrupt assert\n"));
98	98	else
99	99	LOG(("IDE interrupt clear\n"));
100
	100
101	101	/* signal an interrupt */
102	102	m_irq_handler(state);
103	103	interrupt_pending = state;
r23623	r23624
885	885	break;
886	886	}
887	887
888		// printf( "read via config %04x %04x %04x\n", offset, result, mem_mask );
	888	// printf( "read via config %04x %04x %04x\n", offset, result, mem_mask );
889	889	return result;
890	890	}
891	891
r23623	r23624
1009	1009	break;
1010	1010	}
1011	1011
1012		// printf( "read cs0 %04x %04x %04x\n", offset, result, mem_mask );
	1012	// printf( "read cs0 %04x %04x %04x\n", offset, result, mem_mask );
1013	1013
1014	1014	/* return the result */
1015	1015	return result;
r23623	r23624
1071	1071	break;
1072	1072	}
1073	1073
1074		// printf( "read cs1 %04x %04x %04x\n", offset, result, mem_mask );
	1074	// printf( "read cs1 %04x %04x %04x\n", offset, result, mem_mask );
1075	1075
1076	1076	/* return the result */
1077	1077	return result;
r23623	r23624
1086	1086
1087	1087	WRITE8_MEMBER( ide_controller_device::write_via_config )
1088	1088	{
1089		// printf( "write via config %04x %04x %04x\n", offset, data, mem_mask );
	1089	// printf( "write via config %04x %04x %04x\n", offset, data, mem_mask );
1090	1090
1091	1091	/* logit */
1092	1092	LOG(("%s:IDE via config write to %X = %08X, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask));
r23623	r23624
1139	1139
1140	1140	WRITE16_MEMBER( ide_controller_device::write_cs0 )
1141	1141	{
1142		// printf( "write cs0 %04x %04x %04x\n", offset, data, mem_mask );
	1142	// printf( "write cs0 %04x %04x %04x\n", offset, data, mem_mask );
1143	1143
1144	1144	switch (offset)
1145	1145	{
r23623	r23624
1229	1229
1230	1230	WRITE16_MEMBER( ide_controller_device::write_cs1 )
1231	1231	{
1232		// printf( "write cs1 %04x %04x %04x\n", offset, data, mem_mask );
	1232	// printf( "write cs1 %04x %04x %04x\n", offset, data, mem_mask );
1233	1233
1234	1234	/* logit */
1235	1235	LOG(("%s:IDE cs1 write to %X = %08X, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask));

trunk/src/emu/machine/idectrl.h
r23623	r23624
100	100	DECLARE_READ16_MEMBER(read_cs1_pc);
101	101	DECLARE_WRITE16_MEMBER(write_cs0_pc);
102	102	DECLARE_WRITE16_MEMBER(write_cs1_pc);
103
	103
104	104	virtual void set_irq(int state);
105	105	virtual void set_dmarq(int state);
106	106	void read_sector_done();

trunk/src/emu/machine/rf5c296.c
r23623	r23624
89	89	case 0x3e1:
90	90	data = reg_r(m_rf5c296_reg);
91	91	break;
92
	92
93	93	default:
94	94	data = m_pccard->read_memory(space, offset, mem_mask);
95	95	break;

trunk/src/emu/machine/generic.c
r23623	r23624
301	301	running_machine &machine = device.machine();
302	302
303	303	// start with either basename or basename_biosnum
304		result.cpy(machine.basename());
	304	result.cpy(machine.basename());
305	305	if (device.machine().root_device().system_bios() != 0 && device.machine().root_device().default_bios() != device.machine().root_device().system_bios())
306	306	result.catprintf("_%d", device.machine().root_device().system_bios() - 1);
307	307

trunk/src/emu/machine/rp5h01.c
r23623	r23624
3	3	RP5H01
4	4
5	5	TODO:
6		- follow the datasheet better (all dumps presumably needs to be redone
7		from scratch?)
	6	- follow the datasheet better (all dumps presumably needs to be redone
	7	from scratch?)
8	8
9	9	***************************************************************************/
10	10
r23623	r23624
187	187	/* return the data */
188	188	return (m_data[byte] >> bit) & 1;
189	189	}
190
191

trunk/src/emu/machine/rp5h01.h
r23623	r23624
27	27	{
28	28	public:
29	29	rp5h01_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
30
	30
31	31	DECLARE_WRITE8_MEMBER( enable_w ); /* /CE */
32	32	DECLARE_WRITE8_MEMBER( reset_w ); /* RESET */
33	33	DECLARE_WRITE8_MEMBER( cs_w ); /* CS */

trunk/src/emu/machine/serflash.c
r23623	r23624
46	46	{
47	47	m_flash_enab = 0;
48	48	flash_hard_reset(machine());
49
	49
50	50	m_last_flash_cmd = 0x00;
51	51	m_flash_addr_seq = 0;
52	52	m_flash_addr = 0;
r23623	r23624
61	61
62	62	void serflash_device::nvram_default()
63	63	{
64
65	64	}
66	65
67	66
r23623	r23624
98	97
99	98	void serflash_device::nvram_write(emu_file &file)
100	99	{
101
102	100	if (m_length % FLASH_PAGE_SIZE) return; // region size must be multiple of flash page size
103	101	int size = m_length /= FLASH_PAGE_SIZE;
104	102
r23623	r23624
167	165
168	166	switch (data)
169	167	{
170		case 0x00: // READ
	168	case 0x00: // READ
171	169	m_flash_addr_seq = 0;
172	170	break;
173	171
r23623	r23624
175	173	m_flash_addr_seq = 0;
176	174	break;
177	175
178		case 0x70: // READ STATUS
	176	case 0x70: // READ STATUS
179	177	flash_change_state( space.machine(), STATE_READ_STATUS );
180	178	break;
181	179
182		case 0x80: // PAGE / CACHE PROGRAM
	180	case 0x80: // PAGE / CACHE PROGRAM
183	181	m_flash_addr_seq = 0;
184	182	// this actually seems to be set with the next 2 writes?
185	183	m_flash_page_addr = 0;
186	184	break;
187	185
188		case 0x90: // READ ID
	186	case 0x90: // READ ID
189	187	flash_change_state( space.machine(), STATE_READ_ID );
190	188	break;
191	189
192		case 0xff: // RESET
	190	case 0xff: // RESET
193	191	flash_change_state( space.machine(), STATE_IDLE );
194	192	break;
195	193
r23623	r23624
203	201	{
204	202	switch (m_flash_cmd_prev)
205	203	{
206		case 0x00: // READ
	204	case 0x00: // READ
207	205	if (data == 0x30)
208	206	{
209
210
211	207	memcpy(m_flash_page_data, m_region + m_flash_row * FLASH_PAGE_SIZE, FLASH_PAGE_SIZE);
212	208	m_flash_page_addr = m_flash_col;
213	209	m_flash_page_index = m_flash_row;
r23623	r23624
306	302	switch( m_flash_read_seq++ )
307	303	{
308	304	case 0:
309		data = 0xEC; // Manufacturer
	305	data = 0xEC; // Manufacturer
310	306	break;
311	307	case 1:
312		data = 0xF1; // Device
	308	data = 0xF1; // Device
313	309	break;
314	310	case 2:
315		data = 0x00; // XX
	311	data = 0x00; // XX
316	312	break;
317	313	case 3:
318		data = 0x15; // Flags
	314	data = 0x15; // Flags
319	315	m_flash_read_seq = 0;
320	316	break;
321	317	}
r23623	r23624
342	338
343	339	default:
344	340	{
345		// logerror("%08x FLASH: unknown read in state %s\n",0x00/m_maincpu->pc()/, m_flash_state_name[m_flash_state]);
	341	// logerror("%08x FLASH: unknown read in state %s\n",0x00/m_maincpu->pc()/, m_flash_state_name[m_flash_state]);
346	342	}
347	343	}
348	344
r23623	r23624
412	408	logerror("set flash block to %08x\n", m_flash_addr);
413	409	}
414	410	}
415

trunk/src/emu/machine/serflash.h
r23623	r23624
6	6	#define __SERFLASH_H__
7	7
8	8
9		#define FLASH_PAGE_SIZE (2048+64)
	9	#define FLASH_PAGE_SIZE (2048+64)
10	10
11	11
12	12
r23623	r23624
18	18	//**************************************************************************
19	19
20	20	#define MCFG_SERFLASH_ADD(_tag) \
21		MCFG_DEVICE_ADD(_tag, SERFLASH, 0) \
22
	21	MCFG_DEVICE_ADD(_tag, SERFLASH, 0)
23	22	//**************************************************************************
24	23	// TYPE DEFINITIONS
25	24	//**************************************************************************
26	25
27	26	class serflash_device;
28	27
29		typedef enum { STATE_IDLE = 0, STATE_READ, STATE_READ_ID, STATE_READ_STATUS, STATE_BLOCK_ERASE, STATE_PAGE_PROGRAM } flash_state_t;
30		//const char *m_flash_state_name[] = { "IDLE", "READ", "READ_ID", "READ_STATUS", "BLOCK ERASE", "PAGE PROGRAM" };
	28	typedef enum { STATE_IDLE = 0, STATE_READ, STATE_READ_ID, STATE_READ_STATUS, STATE_BLOCK_ERASE, STATE_PAGE_PROGRAM } flash_state_t;
	29	//const char *m_flash_state_name[] = { "IDLE", "READ", "READ_ID", "READ_STATUS", "BLOCK ERASE", "PAGE PROGRAM" };
31	30
32	31	// custom initialization for default state
33	32	typedef device_delegate<void (serflash_device &, void *, size_t)> serflash_init_delegate;
r23623	r23624
105	104
106	105
107	106	#endif
108

trunk/src/emu/machine/ay31015.c
r23623	r23624
122	122	const ay31015_config intf = reinterpret_cast<const ay31015_config >(static_config());
123	123	if (intf != NULL)
124	124	static_cast<ay31015_config >(this) = *intf;
125
	125
126	126	// or initialize to defaults if none provided
127	127	else
128	128	{
r23623	r23624
143	143	m_read_si.resolve(read_si_cb, *this);
144	144	m_write_so.resolve(write_so_cb, *this);
145	145	m_status_changed.resolve(status_changed_cb, *this);
146
	146
147	147	m_tx_clock = transmitter_clock;
148	148	m_rx_clock = receiver_clock;
149
	149
150	150	m_rx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ay31015_device::rx_process),this));
151	151	m_tx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ay31015_device::tx_process),this));
152
	152
153	153	update_rx_timer();
154	154	update_tx_timer();
155	155
r23623	r23624
184	184	{
185	185	m_control_reg = 0;
186	186	m_rx_data = 0;
187
	187
188	188	internal_reset();
189	189	}
190	190
r23623	r23624
566	566	{
567	567	/* total pulses = 16 * data-bits */
568	568	UINT8 t1;
569
	569
570	570	if (m_control_reg & CONTROL_NB2)
571	571	t1 = (m_control_reg & CONTROL_NB1) ? 8 : 7;
572	572	else
573	573	t1 = (m_control_reg & CONTROL_NB1) ? 6 : 5;
574
	574
575	575	m_total_pulses = t1 << 4; /* total clock pulses to load a byte */
576	576	m_second_stop_bit = ((m_control_reg & CONTROL_TSB) ? 16 : 0); /* 2nd stop bit */
577	577	if ((t1 == 5) && (m_second_stop_bit == 16))
r23623	r23624
730	730	update_status_pins();
731	731	}
732	732	}
733

trunk/src/emu/machine/ay31015.h
r23623	r23624
74	74	ay31015_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t *owner, UINT32 clock);
75	75	~ay31015_device() {}
76	76
77
	77
78	78	/* Set an input pin */
79	79	void set_input_pin( ay31015_input_pin_t pin, int data );
80
81
	80
	81
82	82	/* Get an output pin */
83	83	int get_output_pin( ay31015_output_pin_t pin );
84
85
	84
	85
86	86	/* Set a new transmitter clock (new_clock is in Hz) */
87	87	void set_transmitter_clock( double new_clock );
88
89
	88
	89
90	90	/* Set a new receiver clock (new_clock is in Hz) */
91	91	void set_receiver_clock( double new_clock );
92
93
	92
	93
94	94	/* Reead the received data */
95	95	/* The received data is available on RD8-RD1 (pins 5-12) */
96	96	UINT8 get_received_data();
97
98
	97
	98
99	99	/* Set the transmitter buffer */
100	100	/* The data to transmit is set on DB1-DB8 (pins 26-33) */
101	101	void set_transmit_data( UINT8 data );
102
	102
103	103	protected:
104	104	// device-level overrides
105	105	virtual void device_config_complete();
r23623	r23624
120	120	TIMER_CALLBACK_MEMBER(tx_process);
121	121
122	122	int m_pins[41];
123
	123
124	124	UINT8 m_control_reg;
125	125	UINT8 m_status_reg;
126	126	UINT16 m_second_stop_bit; // 0, 8, 16
127	127	UINT16 m_total_pulses; // bits * 16
128	128	UINT8 m_internal_sample;
129
	129
130	130	state_t m_rx_state;
131	131	UINT8 m_rx_data; // byte being received
132	132	UINT8 m_rx_buffer; // received byte waiting to be accepted by computer
r23623	r23624
135	135	UINT16 m_rx_pulses; // total pulses left
136	136	double m_rx_clock;
137	137	emu_timer *m_rx_timer;
138
	138
139	139	state_t m_tx_state;
140	140	UINT8 m_tx_data; // byte being sent
141	141	UINT8 m_tx_buffer; // next byte to send
r23623	r23624
143	143	UINT16 m_tx_pulses; // total pulses left
144	144	double m_tx_clock;
145	145	emu_timer *m_tx_timer;
146
	146
147	147	devcb_resolved_read8 m_read_si; /* SI - pin 20 - This will be called whenever the SI pin is sampled. Optional */
148	148	devcb_resolved_write8 m_write_so; /* SO - pin 25 - This will be called whenever data is put on the SO pin. Optional */
149	149	devcb_resolved_write8 m_status_changed; /* This will be called whenever one of the status pins may have changed. Optional */
r23623	r23624
153	153	{
154	154	public:
155	155	ay51013_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
156
	156
157	157	protected:
158	158	virtual void internal_reset();
159	159
160	160	};
161	161
162		extern const device_type AY31015; // For AY-3-1014A, AY-3-1015(D) and HD6402 variants
163		extern const device_type AY51013; // For AY-3-1014, AY-5-1013 and AY-6-1013 variants
	162	extern const device_type AY31015; // For AY-3-1014A, AY-3-1015(D) and HD6402 variants
	163	extern const device_type AY51013; // For AY-3-1014, AY-5-1013 and AY-6-1013 variants
164	164
165	165
166	166

trunk/src/emu/machine/mm58274c.c
r23623	r23624
99	99	save_item(NAME(m_minutes2));
100	100	save_item(NAME(m_seconds1));
101	101	save_item(NAME(m_seconds2));
102		save_item(NAME(m_tenths));
	102	save_item(NAME(m_tenths));
103	103	}
104	104
105	105	//-------------------------------------------------
r23623	r23624
109	109	void mm58274c_device::device_reset()
110	110	{
111	111	system_time systime;
112
	112
113	113	/* get the current date/time from the core */
114	114	machine().current_datetime(systime);
115
	115
116	116	m_clk_set = systime.local_time.year & 3 << 2;
117	117	if (m_mode24)
118	118	m_clk_set \|= clk_set_24;
119
	119
120	120	/* The clock count starts on 1st January 1900 */
121	121	m_wday = 1 + ((systime.local_time.weekday - m_day1) % 7);
122	122	m_years1 = (systime.local_time.year / 10) % 10;
r23623	r23624
175	175	reply = m_status;
176	176	m_status = 0;
177	177	break;
178
	178
179	179	case 0x01: /* Tenths of Seconds */
180	180	reply = m_tenths;
181	181	break;
182
	182
183	183	case 0x02: /* Units Seconds */
184	184	reply = m_seconds2;
185	185	break;
186
	186
187	187	case 0x03: /* Tens Seconds */
188	188	reply = m_seconds1;
189	189	break;
190
	190
191	191	case 0x04: /* Units Minutes */
192	192	reply = m_minutes2;
193	193	break;
194
	194
195	195	case 0x05: /* Tens Minutes */
196	196	reply = m_minutes1;
197	197	break;
198
	198
199	199	case 0x06: /* Units Hours */
200	200	reply = m_hours2;
201	201	break;
202
	202
203	203	case 0x07: /* Tens Hours */
204	204	reply = m_hours1;
205	205	break;
206
	206
207	207	case 0x08: /* Units Days */
208	208	reply = m_days2;
209	209	break;
210
	210
211	211	case 0x09: /* Tens Days */
212	212	reply = m_days1;
213	213	break;
214
	214
215	215	case 0x0a: /* Units Months */
216	216	reply = m_months2;
217	217	break;
218
	218
219	219	case 0x0b: /* Tens Months */
220	220	reply = m_months1;
221	221	break;
222
	222
223	223	case 0x0c: /* Units Years */
224	224	reply = m_years2;
225	225	break;
226
	226
227	227	case 0x0d: /* Tens Years */
228	228	reply = m_years1;
229	229	break;
230
	230
231	231	case 0x0e: /* Day of Week */
232	232	reply = m_wday;
233	233	break;
234
	234
235	235	case 0x0f: /* Clock Setting & Interrupt Registers */
236		if (m_control & ctl_intsel) /* interrupt register */
	236	if (m_control & ctl_intsel) /* interrupt register */
237	237	reply = m_int_ctl;
238		else /* clock setting register */
	238	else /* clock setting register */
239	239	{
240		if (m_clk_set & clk_set_24) /* 24-hour mode */
	240	if (m_clk_set & clk_set_24) /* 24-hour mode */
241	241	reply = m_clk_set & ~clk_set_pm;
242		else /* 12-hour mode */
	242	else /* 12-hour mode */
243	243	reply = m_clk_set;
244	244	}
245	245	break;
246
	246
247	247	default:
248	248	reply = 0;
249	249	break;
r23623	r23624
261	261	switch (offset)
262	262	{
263	263	case 0x00: /* Control Register (test mode and interrupt not emulated) */
264		if ((!(m_control & ctl_intstop)) && (data & ctl_intstop)) /* interrupt stop */
	264	if ((!(m_control & ctl_intstop)) && (data & ctl_intstop)) /* interrupt stop */
265	265	m_interrupt_timer->enable(0);
266		else if ((m_control & ctl_intstop) && (!(data & ctl_intstop))) /* interrupt run */
	266	else if ((m_control & ctl_intstop) && (!(data & ctl_intstop))) /* interrupt run */
267	267	{
268	268	attotime period = interrupt_period_table(m_int_ctl & int_ctl_dly);
269
	269
270	270	m_interrupt_timer->adjust(period, 0, m_int_ctl & int_ctl_rpt ? period : attotime::zero);
271	271	}
272		if (data & ctl_clkstop) /* stopping the clock clears the tenth counter */
	272	if (data & ctl_clkstop) /* stopping the clock clears the tenth counter */
273	273	m_tenths = 0;
274	274	m_control = data;
275	275	break;
276
	276
277	277	case 0x01: /* Tenths of Seconds: cannot be written */
278	278	break;
279
	279
280	280	case 0x02: /* Units Seconds */
281	281	m_seconds2 = data;
282	282	break;
283
	283
284	284	case 0x03: /* Tens Seconds */
285	285	m_seconds1 = data;
286	286	break;
287
	287
288	288	case 0x04: /* Units Minutes */
289	289	m_minutes2 = data;
290	290	break;
291
	291
292	292	case 0x05: /* Tens Minutes */
293	293	m_minutes1 = data;
294	294	break;
295
	295
296	296	case 0x06: /* Units Hours */
297	297	m_hours2 = data;
298	298	break;
299
	299
300	300	case 0x07: /* Tens Hours */
301	301	m_hours1 = data;
302	302	break;
303
	303
304	304	case 0x08: /* Units Days */
305	305	m_days2 = data;
306	306	break;
307
	307
308	308	case 0x09: /* Tens Days */
309	309	m_days1 = data;
310	310	break;
311
	311
312	312	case 0x0a: /* Units Months */
313	313	m_months2 = data;
314	314	break;
315
	315
316	316	case 0x0b: /* Tens Months */
317	317	m_months1 = data;
318	318	break;
319
	319
320	320	case 0x0c: /* Units Years */
321	321	m_years2 = data;
322	322	break;
323
	323
324	324	case 0x0d: /* Tens Years */
325	325	m_years1 = data;
326	326	break;
327
	327
328	328	case 0x0e: /* Day of Week */
329	329	m_wday = data;
330	330	break;
331
	331
332	332	case 0x0f: /* Clock Setting & Interrupt Registers */
333		if (m_control & ctl_intsel) /* interrupt register (not emulated) */
	333	if (m_control & ctl_intsel) /* interrupt register (not emulated) */
334	334	{
335	335	m_int_ctl = data;
336		if (!(m_control & ctl_intstop)) /* interrupt run */
	336	if (!(m_control & ctl_intstop)) /* interrupt run */
337	337	{
338	338	attotime period = interrupt_period_table(m_int_ctl & int_ctl_dly);
339
	339
340	340	m_interrupt_timer->adjust(period, 0, m_int_ctl & int_ctl_rpt ? period : attotime::zero);
341	341	}
342	342	}
343		else /* clock setting register */
	343	else /* clock setting register */
344	344	{
345	345	m_clk_set = data;
346	346	#if 0
347		if (m_clk_set & clk_set_24) /* 24-hour mode */
	347	if (m_clk_set & clk_set_24) /* 24-hour mode */
348	348	m_clk_set &= ~clk_set_pm;
349	349	#endif
350	350	}
r23623	r23624
482	482	}
483	483	}
484	484	}
485

trunk/src/emu/machine/mm58274c.h
r23623	r23624
26	26	public:
27	27	mm58274c_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
28	28	~mm58274c_device() {}
29
	29
30	30	DECLARE_READ8_MEMBER(read);
31	31	DECLARE_WRITE8_MEMBER(write);
32	32
r23623	r23624
42	42	private:
43	43	// internal state
44	44	attotime interrupt_period_table(int val);
45
	45
46	46	int m_status; /* status register (read from address 0 = control register) */
47	47	int m_control; /* control register (write to address 0) */
48
	48
49	49	int m_clk_set; /* clock setting register */
50	50	int m_int_ctl; /* interrupt control register */
51
52
	51
	52
53	53	int m_wday; /* day of the week (1-7 (1=day1 as set in init)) */
54	54	int m_years1; /* years (BCD: 0-99) */
55	55	int m_years2;
r23623	r23624
64	64	int m_seconds1; /* seconds (BCD : 0-59) */
65	65	int m_seconds2;
66	66	int m_tenths; /* tenths of second (BCD : 0-9) */
67
	67
68	68	emu_timer *m_increment_rtc;
69	69	emu_timer *m_interrupt_timer;
70	70	};

trunk/src/emu/machine/com8116.c
r23623	r23624
48	48
49	49	com8116_device::com8116_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
50	50	: device_t(mconfig, COM8116, "COM8116", tag, owner, clock),
51		m_write_fx4(*this),
52		m_write_fr(*this),
53		m_write_ft(*this)
	51	m_write_fx4(*this),
	52	m_write_fr(*this),
	53	m_write_ft(*this)
54	54	{
55	55	}
56	56

trunk/src/emu/machine/im6402.c
r23623	r23624
278	278	}
279	279	else
280	280	{
281		set_tbre(CLEAR_LINE);
	281	set_tbre(CLEAR_LINE);
282	282	}
283	283	}
284	284

trunk/src/emu/debug/dvbpoints.c
r23623	r23624
2	2
3	3	dvpoints.c
4	4
5		Breakpoint debugger view.
	5	Breakpoint debugger view.
6	6
7	7	****************************************************************************
8	8
r23623	r23624
131	131
132	132	void debug_view_breakpoints::pad_astring_to_length(astring& str, int len)
133	133	{
134		int diff = len - str.len();
135		if (diff > 0)
136		{
137		astring buffer;
138		buffer.expand(diff);
139		for (int i = 0; i < diff; i++)
140		buffer.catprintf(" ");
141		str.catprintf("%s", buffer.cstr());
142		}
	134	int diff = len - str.len();
	135	if (diff > 0)
	136	{
	137	astring buffer;
	138	buffer.expand(diff);
	139	for (int i = 0; i < diff; i++)
	140	buffer.catprintf(" ");
	141	str.catprintf("%s", buffer.cstr());
	142	}
143	143	}
144	144
145	145	//-------------------------------------------------
r23623	r23624
162	162	for (device_debug::breakpoint *bp = debugInterface.breakpoint_first(); bp != NULL; bp = bp->next())
163	163	numBPs++;
164	164	bpList = new device_debug::breakpoint*[numBPs];
165
	165
166	166	// Collect
167	167	int i = 1;
168	168	for (device_debug::breakpoint *bp = debugInterface.breakpoint_first(); bp != NULL; bp = bp->next())
r23623	r23624
176	176	for (int row = 0; row < m_visible.y; row++)
177	177	{
178	178	UINT32 effrow = m_topleft.y + row;
179
	179
180	180	// Header
181	181	if (effrow == 0)
182	182	{
r23623	r23624
195	195	if (bpi < numBPs && bpi >= 0)
196	196	{
197	197	device_debug::breakpoint* bp = bpList[bpi];
198
199		astring buffer;
	198
	199	astring buffer;
200	200	buffer.printf("%x", bp->index());
201	201	pad_astring_to_length(buffer, 5);
202	202	buffer.catprintf("%c", bp->enabled() ? 'X' : 'O');
r23623	r23624
213	213	buffer.catprintf("%s", bp->action());
214	214	pad_astring_to_length(buffer, 60);
215	215	}
216
	216
217	217	for (int i = 0; i < m_visible.x; i++)
218	218	{
219	219	dest->byte = (i < buffer.len()) ? buffer[i] : ' ';
r23623	r23624
222	222	}
223	223	continue;
224	224	}
225
	225
226	226	// Fill the remaining vertical space
227	227	for (int i = 0; i < m_visible.x; i++)
228	228	{
r23623	r23624
231	231	dest++;
232	232	}
233	233	}
234
	234
235	235	delete bpList;
236	236	}

trunk/src/emu/debug/dvbpoints.h
r23623	r23624
2	2
3	3	dvpoints.h
4	4
5		Breakpoint debugger view.
	5	Breakpoint debugger view.
6	6
7	7	****************************************************************************
8	8
r23623	r23624
77	77	// internal helpers
78	78	void enumerate_sources();
79	79	bool recompute(offs_t pc, int startline, int lines);
80		void pad_astring_to_length(astring& str, int len);
	80	void pad_astring_to_length(astring& str, int len);
81	81
82	82	// internal state
83	83	};

trunk/src/emu/cpu/rsp/rsp.h
r23623	r23624
16	16	#ifndef __RSP_H__
17	17	#define __RSP_H__
18	18
19		#define USE_SIMD (0)
	19	#define USE_SIMD (0)
20	20
21	21	#if USE_SIMD
22	22	#include <tmmintrin.h>

trunk/src/emu/video/cdp1861.c
r23623	r23624
41	41
42	42	cdp1861_device::cdp1861_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
43	43	: device_t(mconfig, CDP1861, "CDP1861", tag, owner, clock),
44		m_write_irq(*this),
45		m_write_dma_out(*this),
46		m_write_efx(*this)
	44	m_write_irq(*this),
	45	m_write_dma_out(*this),
	46	m_write_efx(*this)
47	47	{
48	48	}
49	49

trunk/src/emu/video/video.mak
r23623	r23624
15	15
16	16
17	17	#-------------------------------------------------
18		#
	18	#
19	19	#-------------------------------------------------
20	20
21	21	ifneq ($(filter SEGA315_5124,$(VIDEOS)),)
22		VIDEOOBJS+= $(VIDEOOBJ)/315_5124.o
	22	VIDEOOBJS+= $(VIDEOOBJ)/315_5124.o
23	23	endif
24	24
25	25	#-------------------------------------------------
26		#
	26	#
27	27	#-------------------------------------------------
28	28
29	29	ifneq ($(filter BUFSPRITE,$(VIDEOS)),)
r23623	r23624
31	31	endif
32	32
33	33	#-------------------------------------------------
34		#
	34	#
35	35	#-------------------------------------------------
36	36
37	37	ifneq ($(filter CDP1861,$(VIDEOS)),)
38		VIDEOOBJS+= $(VIDEOOBJ)/cdp1861.o
	38	VIDEOOBJS+= $(VIDEOOBJ)/cdp1861.o
39	39	endif
40	40
41	41	#-------------------------------------------------
42		#
	42	#
43	43	#-------------------------------------------------
44	44
45	45	ifneq ($(filter CDP1862,$(VIDEOS)),)
46		VIDEOOBJS+= $(VIDEOOBJ)/cdp1862.o
	46	VIDEOOBJS+= $(VIDEOOBJ)/cdp1862.o
47	47	endif
48	48
49	49	#-------------------------------------------------
50		#
	50	#
51	51	#-------------------------------------------------
52	52
53	53	ifneq ($(filter CRT9007,$(VIDEOS)),)
54		VIDEOOBJS+= $(VIDEOOBJ)/crt9007.o
	54	VIDEOOBJS+= $(VIDEOOBJ)/crt9007.o
55	55	endif
56	56
57	57	#-------------------------------------------------
58		#
	58	#
59	59	#-------------------------------------------------
60	60
61	61	ifneq ($(filter CRT9021,$(VIDEOS)),)
62		VIDEOOBJS+= $(VIDEOOBJ)/crt9021.o
	62	VIDEOOBJS+= $(VIDEOOBJ)/crt9021.o
63	63	endif
64	64
65	65	#-------------------------------------------------
66		#
	66	#
67	67	#-------------------------------------------------
68	68
69	69	ifneq ($(filter CRT9212,$(VIDEOS)),)
70		VIDEOOBJS+= $(VIDEOOBJ)/crt9212.o
	70	VIDEOOBJS+= $(VIDEOOBJ)/crt9212.o
71	71	endif
72	72
73	73	#-------------------------------------------------
74		#
	74	#
75	75	#-------------------------------------------------
76	76
77	77	ifneq ($(filter DL1416,$(VIDEOS)),)
r23623	r23624
79	79	endif
80	80
81	81	#-------------------------------------------------
82		#
	82	#
83	83	#-------------------------------------------------
84	84
85	85	ifneq ($(filter DM9368,$(VIDEOS)),)
r23623	r23624
87	87	endif
88	88
89	89	#-------------------------------------------------
90		#
	90	#
91	91	#-------------------------------------------------
92	92
93	93	ifneq ($(filter EF9340_1,$(VIDEOS)),)
94		VIDEOOBJS+= $(VIDEOOBJ)/ef9340_1.o
	94	VIDEOOBJS+= $(VIDEOOBJ)/ef9340_1.o
95	95	endif
96	96
97	97	#-------------------------------------------------
98		#
	98	#
99	99	#-------------------------------------------------
100	100
101	101	ifneq ($(filter H63484,$(VIDEOS)),)
102		VIDEOOBJS+= $(VIDEOOBJ)/h63484.o
	102	VIDEOOBJS+= $(VIDEOOBJ)/h63484.o
103	103	endif
104	104
105	105	#-------------------------------------------------
106		#
	106	#
107	107	#-------------------------------------------------
108	108
109	109	ifneq ($(filter HD44102,$(VIDEOS)),)
110		VIDEOOBJS+= $(VIDEOOBJ)/hd44102.o
	110	VIDEOOBJS+= $(VIDEOOBJ)/hd44102.o
111	111	endif
112	112
113	113	#-------------------------------------------------
114		#
	114	#
115	115	#-------------------------------------------------
116	116
117	117	ifneq ($(filter HD44352,$(VIDEOS)),)
118		VIDEOOBJS+= $(VIDEOOBJ)/hd44352.o
	118	VIDEOOBJS+= $(VIDEOOBJ)/hd44352.o
119	119	endif
120	120
121	121	#-------------------------------------------------
122		#
	122	#
123	123	#-------------------------------------------------
124	124
125	125	ifneq ($(filter HD44780,$(VIDEOS)),)
126		VIDEOOBJS+= $(VIDEOOBJ)/hd44780.o
	126	VIDEOOBJS+= $(VIDEOOBJ)/hd44780.o
127	127	endif
128	128
129	129	#-------------------------------------------------
130		#
	130	#
131	131	#-------------------------------------------------
132	132
133	133	ifneq ($(filter HD61830,$(VIDEOS)),)
134		VIDEOOBJS+= $(VIDEOOBJ)/hd61830.o
	134	VIDEOOBJS+= $(VIDEOOBJ)/hd61830.o
135	135	endif
136	136
137	137	#-------------------------------------------------
138		#
	138	#
139	139	#-------------------------------------------------
140	140
141	141	ifneq ($(filter HD63484,$(VIDEOS)),)
142		VIDEOOBJS+= $(VIDEOOBJ)/hd63484.o
	142	VIDEOOBJS+= $(VIDEOOBJ)/hd63484.o
143	143	endif
144	144
145	145	#-------------------------------------------------
146		#
	146	#
147	147	#-------------------------------------------------
148	148
149	149	ifneq ($(filter HD66421,$(VIDEOS)),)
150		VIDEOOBJS+= $(VIDEOOBJ)/hd66421.o
	150	VIDEOOBJS+= $(VIDEOOBJ)/hd66421.o
151	151	endif
152	152
153	153	#-------------------------------------------------
154		#
	154	#
155	155	#-------------------------------------------------
156	156
157	157	ifneq ($(filter HUC6202,$(VIDEOS)),)
158		VIDEOOBJS+= $(VIDEOOBJ)/huc6202.o
	158	VIDEOOBJS+= $(VIDEOOBJ)/huc6202.o
159	159	endif
160	160
161	161	#-------------------------------------------------
162		#
	162	#
163	163	#-------------------------------------------------
164	164
165	165	ifneq ($(filter HUC6260,$(VIDEOS)),)
166		VIDEOOBJS+= $(VIDEOOBJ)/huc6260.o
	166	VIDEOOBJS+= $(VIDEOOBJ)/huc6260.o
167	167	endif
168	168
169	169	#-------------------------------------------------
170		#
	170	#
171	171	#-------------------------------------------------
172	172
173	173	ifneq ($(filter HUC6261,$(VIDEOS)),)
174		VIDEOOBJS+= $(VIDEOOBJ)/huc6261.o
	174	VIDEOOBJS+= $(VIDEOOBJ)/huc6261.o
175	175	endif
176	176
177	177	#-------------------------------------------------
178		#
	178	#
179	179	#-------------------------------------------------
180	180
181	181	ifneq ($(filter HUC6270,$(VIDEOS)),)
182		VIDEOOBJS+= $(VIDEOOBJ)/huc6270.o
	182	VIDEOOBJS+= $(VIDEOOBJ)/huc6270.o
183	183	endif
184	184
185	185	#-------------------------------------------------
186		#
	186	#
187	187	#-------------------------------------------------
188	188
189	189	ifneq ($(filter HUC6272,$(VIDEOS)),)
190		VIDEOOBJS+= $(VIDEOOBJ)/huc6272.o
	190	VIDEOOBJS+= $(VIDEOOBJ)/huc6272.o
191	191	endif
192	192
193	193	#-------------------------------------------------
194		#
	194	#
195	195	#-------------------------------------------------
196	196
197	197	ifneq ($(filter I8244,$(VIDEOS)),)
198		VIDEOOBJS+= $(VIDEOOBJ)/i8244.o
	198	VIDEOOBJS+= $(VIDEOOBJ)/i8244.o
199	199	endif
200	200
201	201	#-------------------------------------------------
202		#
	202	#
203	203	#-------------------------------------------------
204	204
205	205	ifneq ($(filter I8275,$(VIDEOS)),)
206	206	VIDEOOBJS+= $(VIDEOOBJ)/i8275.o \
207		$(VIDEOOBJ)/i8275x.o
	207	$(VIDEOOBJ)/i8275x.o
208	208	endif
209	209
210	210	#-------------------------------------------------
211		#
	211	#
212	212	#-------------------------------------------------
213	213
214		ifneq ($(filter K053250,$(VIDEOS)),)
	214	ifneq ($(filter K053250,$(VIDEOS)),)
215	215	VIDEOOBJS+= $(VIDEOOBJ)/k053250.o
216	216	endif
217	217
218	218	#-------------------------------------------------
219		#
	219	#
220	220	#-------------------------------------------------
221	221
222	222	ifneq ($(filter M50458,$(VIDEOS)),)
223		VIDEOOBJS+= $(VIDEOOBJ)/m50458.o
	223	VIDEOOBJS+= $(VIDEOOBJ)/m50458.o
224	224	endif
225	225
226	226	#-------------------------------------------------
227		#
	227	#
228	228	#-------------------------------------------------
229	229
230	230	ifneq ($(filter MB90082,$(VIDEOS)),)
231		VIDEOOBJS+= $(VIDEOOBJ)/mb90082.o
	231	VIDEOOBJS+= $(VIDEOOBJ)/mb90082.o
232	232	endif
233	233
234	234	#-------------------------------------------------
235		#
	235	#
236	236	#-------------------------------------------------
237	237
238	238	ifneq ($(filter MC6845,$(VIDEOS)),)
239		VIDEOOBJS+= $(VIDEOOBJ)/mc6845.o
	239	VIDEOOBJS+= $(VIDEOOBJ)/mc6845.o
240	240	endif
241	241
242	242	#-------------------------------------------------
243		#
	243	#
244	244	#-------------------------------------------------
245	245
246	246	ifneq ($(filter MC6847,$(VIDEOS)),)
247		VIDEOOBJS+= $(VIDEOOBJ)/mc6847.o
	247	VIDEOOBJS+= $(VIDEOOBJ)/mc6847.o
248	248	endif
249	249
250	250	#-------------------------------------------------
251		#
	251	#
252	252	#-------------------------------------------------
253	253
254	254	ifneq ($(filter MSM6255,$(VIDEOS)),)
255		VIDEOOBJS+= $(VIDEOOBJ)/msm6255.o
	255	VIDEOOBJS+= $(VIDEOOBJ)/msm6255.o
256	256	endif
257	257
258	258	#-------------------------------------------------
259		#
	259	#
260	260	#-------------------------------------------------
261	261
262	262	ifneq ($(filter PC_CGA,$(VIDEOS)),)
263	263	VIDEOOBJS+= $(VIDEOOBJ)/pc_cga.o \
264		$(VIDEOOBJ)/cgapal.o
	264	$(VIDEOOBJ)/cgapal.o
265	265	endif
266	266
267	267	#-------------------------------------------------
268		#
	268	#
269	269	#-------------------------------------------------
270	270
271		ifneq ($(filter PC_VGA,$(VIDEOS)),)
272		VIDEOOBJS+= $(VIDEOOBJ)/pc_vga.o
	271	ifneq ($(filter PC_VGA,$(VIDEOS)),)
	272	VIDEOOBJS+= $(VIDEOOBJ)/pc_vga.o
273	273	endif
274	274
275	275	#-------------------------------------------------
276		#
	276	#
277	277	#-------------------------------------------------
278	278
279	279	ifneq ($(filter POLY,$(VIDEOS)),)
280		VIDEOOBJS+= $(VIDEOOBJ)/poly.o
	280	VIDEOOBJS+= $(VIDEOOBJ)/poly.o
281	281	endif
282	282
283	283	#-------------------------------------------------
284		#
	284	#
285	285	#-------------------------------------------------
286	286
287	287	ifneq ($(filter PSX,$(VIDEOS)),)
288		VIDEOOBJS+= $(VIDEOOBJ)/psx.o
	288	VIDEOOBJS+= $(VIDEOOBJ)/psx.o
289	289	endif
290	290
291	291	#-------------------------------------------------
292		#
	292	#
293	293	#-------------------------------------------------
294	294
295	295	ifneq ($(filter RAMDAC,$(VIDEOS)),)
296		VIDEOOBJS+= $(VIDEOOBJ)/ramdac.o
	296	VIDEOOBJS+= $(VIDEOOBJ)/ramdac.o
297	297	endif
298	298
299	299	#-------------------------------------------------
300		#
	300	#
301	301	#-------------------------------------------------
302	302
303	303	ifneq ($(filter S2636,$(VIDEOS)),)
304		VIDEOOBJS+= $(VIDEOOBJ)/s2636.o
	304	VIDEOOBJS+= $(VIDEOOBJ)/s2636.o
305	305	endif
306	306
307	307	#-------------------------------------------------
308		#
	308	#
309	309	#-------------------------------------------------
310	310
311	311	ifneq ($(filter SAA5050,$(VIDEOS)),)
r23623	r23624
313	313	endif
314	314
315	315	#-------------------------------------------------
316		#
	316	#
317	317	#-------------------------------------------------
318	318	ifneq ($(filter SED1330,$(VIDEOS)),)
319	319	VIDEOOBJS+= $(VIDEOOBJ)/sed1330.o
320	320	endif
321	321
322	322	#-------------------------------------------------
323		#
	323	#
324	324	#-------------------------------------------------
325	325
326	326	ifneq ($(filter STVVDP,$(VIDEOS)),)
r23623	r23624
329	329	endif
330	330
331	331	#-------------------------------------------------
332		#
	332	#
333	333	#-------------------------------------------------
334	334
335	335	ifneq ($(filter TLC34076,$(VIDEOS)),)
336		VIDEOOBJS+= $(VIDEOOBJ)/tlc34076.o
	336	VIDEOOBJS+= $(VIDEOOBJ)/tlc34076.o
337	337	endif
338	338
339	339	#-------------------------------------------------
340		#
	340	#
341	341	#-------------------------------------------------
342	342
343	343	ifneq ($(filter TMS34061,$(VIDEOS)),)
344		VIDEOOBJS+= $(VIDEOOBJ)/tms34061.o
	344	VIDEOOBJS+= $(VIDEOOBJ)/tms34061.o
345	345	endif
346	346
347	347	#-------------------------------------------------
348		#
	348	#
349	349	#-------------------------------------------------
350	350
351	351	ifneq ($(filter TMS3556,$(VIDEOS)),)
352		VIDEOOBJS+= $(VIDEOOBJ)/tms3556.o
	352	VIDEOOBJS+= $(VIDEOOBJ)/tms3556.o
353	353	endif
354	354
355	355	#-------------------------------------------------
356		#
	356	#
357	357	#-------------------------------------------------
358	358
359	359	ifneq ($(filter TMS9927,$(VIDEOS)),)
360		VIDEOOBJS+= $(VIDEOOBJ)/tms9927.o
	360	VIDEOOBJS+= $(VIDEOOBJ)/tms9927.o
361	361	endif
362	362
363	363	#-------------------------------------------------
364		#
	364	#
365	365	#-------------------------------------------------
366	366
367	367	ifneq ($(filter TMS9928A,$(VIDEOS)),)
r23623	r23624
369	369	endif
370	370
371	371	#-------------------------------------------------
372		#
	372	#
373	373	#-------------------------------------------------
374	374
375	375	ifneq ($(filter UPD3301,$(VIDEOS)),)
r23623	r23624
377	377	endif
378	378
379	379	#-------------------------------------------------
380		#
	380	#
381	381	#-------------------------------------------------
382	382
383	383	ifneq ($(filter UPD7220,$(VIDEOS)),)
384		VIDEOOBJS+= $(VIDEOOBJ)/upd7220.o
	384	VIDEOOBJS+= $(VIDEOOBJ)/upd7220.o
385	385	endif
386	386
387	387	#-------------------------------------------------
388		#
	388	#
389	389	#-------------------------------------------------
390	390
391	391	ifneq ($(filter UPD7227,$(VIDEOS)),)
r23623	r23624
393	393	endif
394	394
395	395	#-------------------------------------------------
396		#
	396	#
397	397	#-------------------------------------------------
398	398
399	399	ifneq ($(filter V9938,$(VIDEOS)),)
400		VIDEOOBJS+= $(VIDEOOBJ)/v9938.o
	400	VIDEOOBJS+= $(VIDEOOBJ)/v9938.o
401	401	endif
402	402
403	403	#-------------------------------------------------
404		#
	404	#
405	405	#-------------------------------------------------
406	406
407	407	ifneq ($(filter VOODOO,$(VIDEOS)),)

trunk/src/emu/video/msm6255.c
r23623	r23624
198	198
199	199
200	200	//-------------------------------------------------
201		// ir_w -
	201	// ir_w -
202	202	//-------------------------------------------------
203	203
204	204	WRITE8_MEMBER( msm6255_device::ir_w )
r23623	r23624
257	257
258	258
259	259	//-------------------------------------------------
260		// dr_w -
	260	// dr_w -
261	261	//-------------------------------------------------
262	262
263	263	WRITE8_MEMBER( msm6255_device::dr_w )

trunk/src/emu/video/cdp1862.c
r23623	r23624
78	78
79	79	cdp1862_device::cdp1862_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
80	80	: device_t(mconfig, CDP1862, "CDP1862", tag, owner, clock),
81		m_read_rd(*this),
82		m_read_bd(*this),
83		m_read_gd(*this)
	81	m_read_rd(*this),
	82	m_read_bd(*this),
	83	m_read_gd(*this)
84	84	{
85	85	}
86	86

trunk/src/emu/video/tms9927.c
r23623	r23624
85	85	{
86	86	assert(clock() > 0);
87	87	assert(m_hpixels_per_column > 0);
88
	88
89	89	/* copy the initial parameters */
90	90	m_clock = clock();
91
	91
92	92	/* get the screen device */
93	93	m_screen = downcast<screen_device *>(machine().device(m_screen_tag));
94	94	assert(m_screen != NULL);
95
	95
96	96	/* get the self-load PROM */
97	97	if (m_selfload_region != NULL)
98	98	{
r23623	r23624
102	102
103	103	/* register for state saving */
104	104	machine().save().register_postload(save_prepost_delegate(FUNC(tms9927_device::state_postload), this));
105
	105
106	106	save_item(NAME(m_reg));
107	107	save_item(NAME(m_start_datarow));
108	108	save_item(NAME(m_reset));
r23623	r23624
123	123	void tms9927_device::device_stop()
124	124	{
125	125	mame_printf_debug("TMS9937: Final params: (%d, %d, %d, %d, %d, %d, %d)\n",
126		m_clock,
127		m_total_hpix,
128		0, m_visible_hpix,
129		m_total_vpix,
130		0, m_visible_vpix);
	126	m_clock,
	127	m_total_hpix,
	128	0, m_visible_hpix,
	129	m_total_vpix,
	130	0, m_visible_vpix);
131	131	}
132	132
133	133
r23623	r23624
300	300
301	301	m_screen->configure(m_total_hpix, m_total_vpix, visarea, refresh);
302	302	}
303

trunk/src/emu/video/tms9927.h
r23623	r23624
33	33	int screen_reset();
34	34	int upscroll_offset();
35	35	int cursor_bounds(rectangle &bounds);
36
	36
37	37	protected:
38	38	// device-level overrides
39	39	virtual void device_config_complete();
r23623	r23624
46	46	void state_postload();
47	47	void recompute_parameters(int postload);
48	48	void generic_access(address_space &space, offs_t offset);
49
	49
50	50	// internal state
51	51	screen_device *m_screen;
52	52	const UINT8 *m_selfload;
53
	53
54	54	/* live state */
55	55	UINT32 m_clock;
56	56	UINT8 m_reg[9];
57	57	UINT8 m_start_datarow;
58	58	UINT8 m_reset;
59
	59
60	60	/* derived state; no need to save */
61	61	UINT8 m_valid_config;
62	62	UINT16 m_total_hpix, m_total_vpix;

trunk/src/emu/video/upd7227.c
r23623	r23624
44	44
45	45	upd7227_device::upd7227_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
46	46	: device_t(mconfig, UPD7227, "uPD7227", tag, owner, clock),
47		device_memory_interface(mconfig, *this),
48		m_space_config("videoram", ENDIANNESS_BIG, 8, 7, 0, *ADDRESS_MAP_NAME(upd7227_map)),
49		m_cs(1),
50		m_cd(1),
51		m_sck(1),
52		m_si(1),
53		m_so(1)
	47	device_memory_interface(mconfig, *this),
	48	m_space_config("videoram", ENDIANNESS_BIG, 8, 7, 0, *ADDRESS_MAP_NAME(upd7227_map)),
	49	m_cs(1),
	50	m_cd(1),
	51	m_sck(1),
	52	m_si(1),
	53	m_so(1)
54	54	{
55	55	}
56	56

trunk/src/emu/video/upd7227.h
r23623	r23624
63	63	private:
64	64	enum
65	65	{
66		CMD_SMM = 0x18,
67		CMD_SFF = 0x10,
68		CMD_LDPI = 0x80,
69		CMD_SWM = 0x64,
70		CMD_SRM = 0x60,
71		CMD_SANDM = 0x6c,
72		CMD_SORM = 0x68,
73		CMD_SCM = 0x72,
74		CMD_BSET = 0x40,
75		CMD_BRESET = 0x20,
76		CMD_DISP_ON = 0x09,
77		CMD_DISP_OFF = 0x08
	66	CMD_SMM = 0x18,
	67	CMD_SFF = 0x10,
	68	CMD_LDPI = 0x80,
	69	CMD_SWM = 0x64,
	70	CMD_SRM = 0x60,
	71	CMD_SANDM = 0x6c,
	72	CMD_SORM = 0x68,
	73	CMD_SCM = 0x72,
	74	CMD_BSET = 0x40,
	75	CMD_BRESET = 0x20,
	76	CMD_DISP_ON = 0x09,
	77	CMD_DISP_OFF = 0x08
78	78	};
79	79
80	80	int m_sx;

trunk/src/emu/video/huc6270.h
r23623	r23624
67	67	HUC6270_VDW,
68	68	HUC6270_VCR
69	69	};
70
	70
71	71	enum huc6270_h_state {
72	72	HUC6270_HDS,
73	73	HUC6270_HDW,

trunk/src/emu/dislot.c
r23623	r23624
43	43
44	44	return options;
45	45	}
46
	46
47	47	void device_slot_interface::static_set_card_machine_config(device_t &device, const char *card, const machine_config_constructor machine_config)
48	48	{
49	49	static_alloc_card_options(device, card)->m_machine_config = machine_config;

trunk/src/emu/memory.h
r23623	r23624
937	937
938	938
939	939	// device delegate macros
940		#define READ8_DELEGATE(_class, _member) read8_delegate(FUNC(_class::_member), this)
941		#define WRITE8_DELEGATE(_class, _member) write8_delegate(FUNC(_class::_member), this)
942		#define READ16_DELEGATE(_class, _member) read16_delegate(FUNC(_class::_member), this)
943		#define WRITE16_DELEGATE(_class, _member) write16_delegate(FUNC(_class::_member), this)
944		#define READ32_DELEGATE(_class, _member) read32_delegate(FUNC(_class::_member), this)
945		#define WRITE32_DELEGATE(_class, _member) write32_delegate(FUNC(_class::_member), this)
946		#define READ64_DELEGATE(_class, _member) read64_delegate(FUNC(_class::_member), this)
947		#define WRITE64_DELEGATE(_class, _member) write64_delegate(FUNC(_class::_member), this)
	940	#define READ8_DELEGATE(_class, _member) read8_delegate(FUNC(_class::_member), this)
	941	#define WRITE8_DELEGATE(_class, _member) write8_delegate(FUNC(_class::_member), this)
	942	#define READ16_DELEGATE(_class, _member) read16_delegate(FUNC(_class::_member), this)
	943	#define WRITE16_DELEGATE(_class, _member) write16_delegate(FUNC(_class::_member), this)
	944	#define READ32_DELEGATE(_class, _member) read32_delegate(FUNC(_class::_member), this)
	945	#define WRITE32_DELEGATE(_class, _member) write32_delegate(FUNC(_class::_member), this)
	946	#define READ64_DELEGATE(_class, _member) read64_delegate(FUNC(_class::_member), this)
	947	#define WRITE64_DELEGATE(_class, _member) write64_delegate(FUNC(_class::_member), this)
948	948
949		#define READ8_DEVICE_DELEGATE(_device, _class, _member) read8_delegate(FUNC(_class::_member), (_class *)_device)
950		#define WRITE8_DEVICE_DELEGATE(_device, _class, _member) write8_delegate(FUNC(_class::_member), (_class *)_device)
951		#define READ16_DEVICE_DELEGATE(_device, _class, _member) read16_delegate(FUNC(_class::_member), (_class *)_device)
952		#define WRITE16_DEVICE_DELEGATE(_device, _class, _member) write16_delegate(FUNC(_class::_member), (_class *)_device)
953		#define READ32_DEVICE_DELEGATE(_device, _class, _member) read32_delegate(FUNC(_class::_member), (_class *)_device)
954		#define WRITE32_DEVICE_DELEGATE(_device, _class, _member) write32_delegate(FUNC(_class::_member), (_class *)_device)
955		#define READ64_DEVICE_DELEGATE(_device, _class, _member) read64_delegate(FUNC(_class::_member), (_class *)_device)
956		#define WRITE64_DEVICE_DELEGATE(_device, _class, _member) write64_delegate(FUNC(_class::_member), (_class *)_device)
	949	#define READ8_DEVICE_DELEGATE(_device, _class, _member) read8_delegate(FUNC(_class::_member), (_class *)_device)
	950	#define WRITE8_DEVICE_DELEGATE(_device, _class, _member) write8_delegate(FUNC(_class::_member), (_class *)_device)
	951	#define READ16_DEVICE_DELEGATE(_device, _class, _member) read16_delegate(FUNC(_class::_member), (_class *)_device)
	952	#define WRITE16_DEVICE_DELEGATE(_device, _class, _member) write16_delegate(FUNC(_class::_member), (_class *)_device)
	953	#define READ32_DEVICE_DELEGATE(_device, _class, _member) read32_delegate(FUNC(_class::_member), (_class *)_device)
	954	#define WRITE32_DEVICE_DELEGATE(_device, _class, _member) write32_delegate(FUNC(_class::_member), (_class *)_device)
	955	#define READ64_DEVICE_DELEGATE(_device, _class, _member) read64_delegate(FUNC(_class::_member), (_class *)_device)
	956	#define WRITE64_DEVICE_DELEGATE(_device, _class, _member) write64_delegate(FUNC(_class::_member), (_class *)_device)
957	957
958	958
959	959	// helper macro for merging data with the memory mask

trunk/src/emu/machine.c
r23623	r23624
559	559	statename_str.cpy("%g");
560	560	else
561	561	statename_str.cpy(option);
562
	562
563	563	// strip any extension in the provided statename
564	564	int index = statename_str.rchr(0, '.');
565	565	if (index != -1)
566	566	statename_str.substr(0, index);
567
	567
568	568	// handle %d in the template (for image devices)
569	569	astring statename_dev("%d_");
570	570	int pos = statename_str.find(0, statename_dev);
571
	571
572	572	if (pos != -1)
573	573	{
574	574	// if more %d are found, revert to default and ignore them all
r23623	r23624
578	578	else
579	579	{
580	580	int name_found = 0;
581
	581
582	582	// find length of the device name
583	583	int end1 = statename_str.find(pos + 3, "/");
584	584	int end2 = statename_str.find(pos + 3, "%");
585	585	int end = -1;
586
	586
587	587	if ((end1 != -1) && (end2 != -1))
588	588	end = MIN(end1, end2);
589	589	else if (end1 != -1)
r23623	r23624
592	592	end = end2;
593	593	else
594	594	end = statename_str.len();
595
	595
596	596	if (end - pos < 3)
597	597	fatalerror("Something very wrong is going on!!!\n");
598
	598
599	599	// copy the device name to an astring
600	600	astring devname_str;
601	601	devname_str.cpysubstr(statename_str, pos + 3, end - pos - 3);
602	602	//printf("check template: %s\n", devname_str.cstr());
603
	603
604	604	// verify that there is such a device for this system
605	605	image_interface_iterator iter(root_device());
606	606	for (device_image_interface *image = iter.first(); image != NULL; image = iter.next())
r23623	r23624
608	608	// get the device name
609	609	astring tempdevname(image->brief_instance_name());
610	610	//printf("check device: %s\n", tempdevname.cstr());
611
	611
612	612	if (devname_str.cmp(tempdevname) == 0)
613	613	{
614	614	// verify that such a device has an image mounted
615	615	if (image->basename_noext() != NULL)
616	616	{
617	617	astring filename(image->basename_noext());
618
	618
619	619	// setup snapname and remove the %d_
620	620	statename_str.replace(0, devname_str, filename);
621	621	statename_str.del(pos, 3);
622	622	//printf("check image: %s\n", filename.cstr());
623
	623
624	624	name_found = 1;
625	625	}
626	626	}
627	627	}
628
	628
629	629	// or fallback to default
630	630	if (name_found == 0)
631	631	statename_str.cpy("%g");
632	632	}
633	633	}
634
	634
635	635	// substitute path and gamename up front
636	636	statename_str.replace(0, "/", PATH_SEPARATOR);
637	637	statename_str.replace(0, "%g", basename());

trunk/src/emu/sound/msm5205.c
r23623	r23624
85	85	const msm5205_interface intf = reinterpret_cast<const msm5205_interface >(static_config());
86	86	if (intf != NULL)
87	87	static_cast<msm5205_interface >(this) = *intf;
88
	88
89	89	// or initialize to defaults if none provided
90	90	else
91	91	{
92	92	memset(&m_vclk_cb, 0, sizeof(m_vclk_cb));
93	93	m_select = 0;
94	94	}
95
	95
96	96	}
97	97
98	98	//-------------------------------------------------
r23623	r23624
103	103	{
104	104	m_mod_clock = clock();
105	105	m_vclk_callback.resolve(m_vclk_cb, *this);
106
	106
107	107	/* compute the difference tables */
108	108	compute_tables();
109
	109
110	110	/* stream system initialize */
111	111	m_stream = machine().sound().stream_alloc(*this, 0, 1, clock(), this);
112	112	m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(msm5205_device::vclk_callback), this));
113
	113
114	114	/* register for save states */
115	115	save_item(NAME(m_mod_clock));
116	116	save_item(NAME(m_data));
r23623	r23624
127	127	//-------------------------------------------------
128	128
129	129	void msm5205_device::device_reset()
130		{
	130	{
131	131	/* initialize work */
132	132	m_data = 0;
133	133	m_vclk = 0;
134	134	m_reset = 0;
135	135	m_signal = 0;
136	136	m_step = 0;
137
	137
138	138	/* timer and bitwidth set */
139	139	playmode_w(m_select);
140	140	}
r23623	r23624
189	189	int new_signal;
190	190
191	191	/* callback user handler and latch next data */
192		if (!m_vclk_callback.isnull())
	192	if (!m_vclk_callback.isnull())
193	193	m_vclk_callback(1);
194	194
195	195	/* reset check at last hiedge of VCLK */
r23623	r23624
237	237	if (m_vclk != vclk)
238	238	{
239	239	m_vclk = vclk;
240		if (!vclk)
	240	if (!vclk)
241	241	vclk_callback(this, 0);
242	242	}
243	243	}
r23623	r23624
325	325	void msm5205_device::sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples)
326	326	{
327	327	stream_sample_t *buffer = outputs[0];
328
	328
329	329	/* if this voice is active */
330	330	if(m_signal)
331	331	{

trunk/src/emu/sound/ymf271.c
r23623	r23624
1136	1136	slot->ch3_level = data & 0xf;
1137	1137	break;
1138	1138	}
1139
	1139
1140	1140	default:
1141	1141	break;
1142	1142	}
r23623	r23624
1318	1318	if (!m_irq_handler.isnull())
1319	1319	m_irq_handler(1);
1320	1320	}
1321
	1321
1322	1322	// reload timer
1323	1323	m_timA->adjust(attotime::from_hz(m_clock) * (384 * 4 * (256 - m_timerA)), 0);
1324	1324	break;
r23623	r23624
1334	1334	if (!m_irq_handler.isnull())
1335	1335	m_irq_handler(1);
1336	1336	}
1337
	1337
1338	1338	// reload timer
1339	1339	m_timB->adjust(attotime::from_hz(m_clock) * (384 * 16 * (256 - m_timerB)), 0);
1340	1340	break;
r23623	r23624
1447	1447	if (!m_ext_rw && !m_ext_write_handler.isnull())
1448	1448	m_ext_write_handler(m_ext_address, data);
1449	1449	break;
1450
	1450
1451	1451	default:
1452	1452	break;
1453	1453	}
r23623	r23624
1737	1737	m_slots[i].active = 0;
1738	1738	m_slots[i].volume = 0;
1739	1739	}
1740
	1740
1741	1741	// reset timers and IRQ
1742	1742	m_timA->reset();
1743	1743	m_timB->reset();
1744
	1744
1745	1745	m_irqstate = 0;
1746	1746	m_status = 0;
1747	1747	m_enable = 0;

trunk/src/emu/sound/ymz280b.c
r23623	r23624
17	17	8-bit PCM, 16-bit PCM ...... 0.172 to 88.2kHz in 512 steps
18	18	256 steps total level and 16 steps panpot can be set
19	19	Voice signal is output in stereo 16-bit 2's complement MSB-first format
20
	20
21	21	TODO:
22	22	- Is memory handling 100% correct? At the moment, Konami firebeat.c is the only
23	23	hardware currently emulated that uses external handlers.

trunk/src/emu/sound/speaker.c
r23623	r23624
99	99	const speaker_interface intf = reinterpret_cast<const speaker_interface >(static_config());
100	100	if (intf != NULL)
101	101	static_cast<speaker_interface >(this) = *intf;
102
	102
103	103	// or initialize to defaults if none provided
104	104	else
105	105	{
r23623	r23624
116	116	{
117	117	int i;
118	118	double x;
119
	119
120	120	m_channel = machine().sound().stream_alloc(*this, 0, 1, machine().sample_rate(), this);
121	121
122	122	m_level = 0;
r23623	r23624
137	137	/* Note: To avoid time drift due to floating point inaccuracies,
138	138	* it is good if the speaker time synchronizes itself with the stream timing regularly.
139	139	*/
140
	140
141	141	/* Compute filter kernel; */
142	142	/* (Done for each device though the data is shared...
143	143	* No problem really, but should be done as part of system init if I knew how)
r23623	r23624
157	157	#define FILTER_STEP (M_PI / 2 / RATE_MULTIPLIER)
158	158	/* Distribute symmetrically on x axis; center has x=0 if length is odd */
159	159	for (i = 0, x = (0.5 - FILTER_LENGTH / 2.) * FILTER_STEP;
160		i < FILTER_LENGTH;
161		i++, x += FILTER_STEP)
	160	i < FILTER_LENGTH;
	161	i++, x += FILTER_STEP)
162	162	{
163	163	if (x == 0)
164	164	m_ampl[i] = 1;
r23623	r23624
180	180	save_item(NAME(m_channel_last_sample_time));
181	181	save_item(NAME(m_interm_sample_index));
182	182	save_item(NAME(m_last_update_time));
183
	183
184	184	machine().save().register_postload(save_prepost_delegate(FUNC(speaker_sound_device::speaker_postload), this));
185	185	}
186	186
r23623	r23624
201	201	int volume = m_levels[m_level];
202	202	double filtered_volume;
203	203	attotime sampled_time = attotime::zero;
204
	204
205	205	if (samples > 0)
206	206	{
207	207	/* Prepare to update time state */
208	208	sampled_time = attotime(0, m_channel_sample_period);
209	209	if (samples > 1)
210	210	sampled_time *= samples;
211
	211
212	212	/* Note: since the stream is in the process of being updated,
213	213	* stream->sample_time() will return the time before the update! (MAME 0.130)
214	214	* Avoid using it here in order to avoid a subtle dependence on the stream implementation.
215	215	*/
216	216	}
217
	217
218	218	if (samples-- > 0)
219	219	{
220	220	/* Note that first interm. sample may be composed... */
221	221	filtered_volume = update_interm_samples_get_filtered_volume(volume);
222
	222
223	223	/* Composite volume is now quantized to the stream resolution */
224	224	*buffer++ = (stream_sample_t)filtered_volume;
225
	225
226	226	/* Any additional samples will be homogeneous, however may need filtering across samples: */
227	227	while (samples-- > 0)
228	228	{
229	229	filtered_volume = update_interm_samples_get_filtered_volume(volume);
230	230	*buffer++ = (stream_sample_t)filtered_volume;
231	231	}
232
	232
233	233	/* Update the time state */
234	234	m_channel_last_sample_time += sampled_time;
235	235	m_channel_next_sample_time = m_channel_last_sample_time + attotime(0, m_channel_sample_period);
r23623	r23624
289	289
290	290	/* Finally update speaker state before returning */
291	291	m_level = new_level;
292
	292
293	293	}
294	294
295	295
r23623	r23624
394	394
395	395	return filtered_volume;
396	396	}
397
398

trunk/src/emu/sound/speaker.h
r23623	r23624
12	12	#define __SOUND_SPEAKER_H__
13	13
14	14	// Length of anti-aliasing filter kernel, measured in number of intermediate samples
15		enum
	15	enum
16	16	{
17	17	FILTER_LENGTH = 64
18	18	};
r23623	r23624
48	48
49	49	// Updates the composed volume array according to time
50	50	void update_interm_samples(attotime time, int volume);
51
	51
52	52	// Updates the composed volume array and returns final filtered volume of next stream sample
53	53	double update_interm_samples_get_filtered_volume(int volume);
54
	54
55	55	void finalize_interm_sample(int volume);
56	56	void init_next_interm_sample();
57	57	inline double make_fraction(attotime a, attotime b, double timediv);
58	58	double get_filtered_volume();
59
	59
60	60	// Kernel (pulse response) for filtering across samples (while we avoid fancy filtering within samples)
61	61	double m_ampl[FILTER_LENGTH];
62
	62
63	63	sound_stream *m_channel;
64	64	int m_level;
65
	65
66	66	/* The volume of a composed sample grows incrementally each time the speaker is over-sampled.
67	67	* That is in effect a basic average filter.
68	68	* Another filter can and will be applied to the array of composed samples.

trunk/src/emu/sound/sp0256.c
r23623	r23624
27	27	the sp0256_start() call.
28	28
29	29	If the memory map contents is modified during execution (accross of ROM
30		bank switching) the bitrevbuff() call must be called after the section
	30	bank switching) the bitrevbuff() call must be called after the section
31	31	of ROM is modified.
32	32	*/
33	33
r23623	r23624
112	112	const sp0256_interface intf = reinterpret_cast<const sp0256_interface >(static_config());
113	113	if (intf != NULL)
114	114	static_cast<sp0256_interface >(this) = *intf;
115
	115
116	116	// or initialize to defaults if none provided
117	117	else
118	118	{
119	119	memset(&m_lrq_cb, 0, sizeof(m_lrq_cb));
120	120	memset(&m_sby_cb, 0, sizeof(m_sby_cb));
121	121	}
122
	122
123	123	}
124	124
125	125	//-------------------------------------------------
r23623	r23624
132	132	m_sby.resolve(m_sby_cb, *this);
133	133	m_drq(1);
134	134	m_sby(1);
135
	135
136	136	m_stream = machine().sound().stream_alloc(*this, 0, 1, clock() / CLOCK_DIVIDER, this);
137
	137
138	138	/* -------------------------------------------------------------------- */
139	139	/* Configure our internal variables. */
140	140	/* -------------------------------------------------------------------- */
141	141	m_filt.rng = 1;
142
	142
143	143	/* -------------------------------------------------------------------- */
144	144	/* Allocate a scratch buffer for generating ~10kHz samples. */
145	145	/* -------------------------------------------------------------------- */
r23623	r23624
147	147	save_pointer(NAME(m_scratch), SCBUF_SIZE);
148	148
149	149	m_sc_head = m_sc_tail = 0;
150
	150
151	151	/* -------------------------------------------------------------------- */
152	152	/* Set up the microsequencer's initial state. */
153	153	/* -------------------------------------------------------------------- */
r23623	r23624
156	156	m_lrq = 0x8000;
157	157	m_page = 0x1000 << 3;
158	158	m_silent = 1;
159
	159
160	160	/* -------------------------------------------------------------------- */
161	161	/* Setup the ROM. */
162	162	/* -------------------------------------------------------------------- */
r23623	r23624
165	165	// see http://forums.bannister.org/ubbthreads.php?ubb=showflat&Number=72385#Post72385
166	166	// TODO: because of this, check if the bitrev functions are even used anywhere else
167	167	// bitrevbuff(m_rom, 0, 0xffff);
168
	168
169	169	m_lrq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(sp0256_device::set_lrq_timer_proc),this));
170	170
171	171	// save device variables
r23623	r23624
208	208	{
209	209	// reset FIFO and SP0256
210	210	m_fifo_head = m_fifo_tail = m_fifo_bitp = 0;
211
	211
212	212	memset(&m_filt, 0, sizeof(m_filt));
213	213	m_halted = 1;
214	214	m_filt.rpt = -1;
r23623	r23624
223	223	m_silent = 1;
224	224	m_drq(1);
225	225	SET_SBY(1)
226
	226
227	227	m_lrq = 0;
228	228	m_lrq_timer->adjust(attotime::from_ticks(50, m_clock));
229	229	}
r23623	r23624
1196	1196	LOG(("sp0256: Droped ALD write\n"));
1197	1197	return;
1198	1198	}
1199
	1199
1200	1200	/* ---------------------------------------------------------------- */
1201	1201	/* Set LRQ to "busy" and load the 8 LSBs of the data into the ALD */
1202	1202	/* reg. We take the command address, and multiply by 2 bytes to */
r23623	r23624
1206	1206	m_ald = (0xff & data) << 4;
1207	1207	m_drq(0);
1208	1208	SET_SBY(0)
1209
	1209
1210	1210	return;
1211	1211	}
1212	1212
r23623	r23624
1214	1214	{
1215	1215	// force stream update
1216	1216	m_stream->update();
1217
	1217
1218	1218	return m_lrq == 0x8000;
1219	1219	}
1220	1220
1221	1221	READ_LINE_MEMBER( sp0256_device::sby_r )
1222	1222	{
1223		// TODO: force stream update??
	1223	// TODO: force stream update??
1224	1224
1225	1225	return m_sby_line;
1226	1226	}
r23623	r23624
1234	1234	{
1235	1235	return m_lrq;
1236	1236	}
1237
	1237
1238	1238	/* -------------------------------------------------------------------- */
1239	1239	/* Offset 1 returns the SPB640 FIFO full status on bit 15. */
1240	1240	/* -------------------------------------------------------------------- */
r23623	r23624
1242	1242	{
1243	1243	return (m_fifo_head - m_fifo_tail) >= 64 ? 0x8000 : 0;
1244	1244	}
1245
	1245
1246	1246	/* -------------------------------------------------------------------- */
1247	1247	/* Just return 255 for all other addresses in our range. */
1248	1248	/* -------------------------------------------------------------------- */
r23623	r23624
1256	1256	ald_w(space, 0, data & 0xff);
1257	1257	return;
1258	1258	}
1259
	1259
1260	1260	if (offset == 1)
1261	1261	{
1262	1262	/* ---------------------------------------------------------------- */
1263	1263	/* If Bit 10 is set, reset the FIFO, and SP0256. */
1264	1264	/* ---------------------------------------------------------------- */
1265
	1265
1266	1266	if (data & 0x400)
1267	1267	{
1268	1268	m_fifo_head = m_fifo_tail = m_fifo_bitp = 0;
1269	1269	device_reset();
1270	1270	return;
1271	1271	}
1272
	1272
1273	1273	/* ---------------------------------------------------------------- */
1274	1274	/* If the FIFO is full, drop the data. */
1275	1275	/* ---------------------------------------------------------------- */
r23623	r23624
1278	1278	LOG(("spb640: Dropped FIFO write\n"));
1279	1279	return;
1280	1280	}
1281
	1281
1282	1282	/* ---------------------------------------------------------------- */
1283	1283	/* FIFO up the lower 10 bits of the data. */
1284	1284	/* ---------------------------------------------------------------- */
1285
	1285
1286	1286	LOG(("spb640: WR_FIFO %.3X %d.%d %d\n", data & 0x3ff,
1287		m_fifo_tail, m_fifo_bitp, m_fifo_head));
1288
	1287	m_fifo_tail, m_fifo_bitp, m_fifo_head));
	1288
1289	1289	m_fifo[m_fifo_head++ & 63] = data & 0x3ff;
1290
	1290
1291	1291	return;
1292	1292	}
1293	1293	}
r23623	r23624
1313	1313	stream_sample_t *output = outputs[0];
1314	1314	int output_index = 0;
1315	1315	int length, did_samp/, old_idx/;
1316
	1316
1317	1317	while (output_index < samples)
1318	1318	{
1319	1319	/* ---------------------------------------------------------------- */
1320	1320	/* First, drain as much of our scratch buffer as we can into the */
1321	1321	/* sound buffer. */
1322	1322	/* ---------------------------------------------------------------- */
1323
	1323
1324	1324	while (m_sc_tail != m_sc_head)
1325	1325	{
1326	1326	output[output_index++] = m_scratch[m_sc_tail++ & SCBUF_MASK];
1327	1327	m_sc_tail &= SCBUF_MASK;
1328
	1328
1329	1329	if (output_index > samples)
1330	1330	break;
1331	1331	}
1332
	1332
1333	1333	/* ---------------------------------------------------------------- */
1334	1334	/* If output outputs is full, then we're done. */
1335	1335	/* ---------------------------------------------------------------- */
1336	1336	if (output_index > samples)
1337	1337	break;
1338
	1338
1339	1339	length = samples - output_index;
1340
	1340
1341	1341	/* ---------------------------------------------------------------- */
1342	1342	/* Process the current set of filter coefficients as long as the */
1343	1343	/* repeat count holds up and we have room in our scratch buffer. */
r23623	r23624
1347	1347	if (length > 0) do
1348	1348	{
1349	1349	int do_samp;
1350
	1350
1351	1351	/* ------------------------------------------------------------ */
1352	1352	/* If our repeat count expired, emulate the microsequencer. */
1353	1353	/* ------------------------------------------------------------ */
1354	1354	if (m_filt.rpt <= 0)
1355	1355	micro();
1356
	1356
1357	1357	/* ------------------------------------------------------------ */
1358	1358	/* Do as many samples as we can. */
1359	1359	/* ------------------------------------------------------------ */
1360	1360	do_samp = length - did_samp;
1361	1361	if (m_sc_head + do_samp - m_sc_tail > SCBUF_SIZE)
1362	1362	do_samp = m_sc_tail + SCBUF_SIZE - m_sc_head;
1363
	1363
1364	1364	if (do_samp == 0) break;
1365
	1365
1366	1366	if (m_silent && m_filt.rpt <= 0)
1367	1367	{
1368	1368	int y = m_sc_head;
1369
	1369
1370	1370	for (int x = 0; x < do_samp; x++)
1371	1371	m_scratch[y++ & SCBUF_MASK] = 0;
1372	1372	m_sc_head += do_samp;
r23623	r23624
1375	1375	else
1376	1376	{
1377	1377	did_samp += lpc12_update(&m_filt, do_samp,
1378		m_scratch, &m_sc_head);
	1378	m_scratch, &m_sc_head);
1379	1379	}
1380
	1380
1381	1381	m_sc_head &= SCBUF_MASK;
1382
	1382
1383	1383	} while (m_filt.rpt >= 0 && length > did_samp);
1384	1384	}
1385	1385	}

trunk/src/emu/sound/sp0256.h
r23623	r23624
81	81	DECLARE_READ_LINE_MEMBER(sby_r);
82	82	DECLARE_READ16_MEMBER(spb640_r);
83	83	DECLARE_WRITE16_MEMBER(spb640_w);
84
	84
85	85	TIMER_CALLBACK_MEMBER(set_lrq_timer_proc);
86	86	void set_clock(int clock);
87	87	void bitrevbuff(UINT8 *buffer, unsigned int start, unsigned int length);
88
	88
89	89	protected:
90	90	// device-level overrides
91	91	virtual void device_config_complete();
r23623	r23624
97	97	private:
98	98	UINT32 getb(int len);
99	99	void micro();
100
	100
101	101	sound_stream m_stream; / MAME core sound stream */
102	102	devcb_resolved_write_line m_drq; /* Data request callback */
103	103	devcb_resolved_write_line m_sby; /* Standby callback */
104	104
105	105	int m_sby_line; /* Standby line state */
106	106	int m_cur_len; /* Fullness of current sound buffer. */
107
	107
108	108	int m_silent; /* Flag: SP0256 is silent. */
109
	109
110	110	INT16 m_scratch; / Scratch buffer for audio. */
111	111	UINT32 m_sc_head; /* Head pointer into scratch circular buf */
112	112	UINT32 m_sc_tail; /* Tail pointer into scratch circular buf */
113
	113
114	114	struct lpc12_t m_filt; /* 12-pole filter */
115	115	int m_lrq; /* Load ReQuest. == 0 if we can accept a load */
116	116	int m_ald; /* Address LoaD. < 0 if no command pending. */
r23623	r23624
120	120	int m_halted; /* True when CPU is halted. */
121	121	UINT32 m_mode; /* Mode register. */
122	122	UINT32 m_page; /* Page set by SETPAGE */
123
	123
124	124	UINT32 m_fifo_head; /* FIFO head pointer (where new data goes). */
125	125	UINT32 m_fifo_tail; /* FIFO tail pointer (where data comes from). */
126	126	UINT32 m_fifo_bitp; /* FIFO bit-pointer (for partial decles). */
127	127	UINT16 m_fifo[64]; /* The 64-decle FIFO. */
128
	128
129	129	UINT8 m_rom; / 64K ROM. */
130	130
131	131	emu_timer *m_lrq_timer;

trunk/src/lib/formats/bml3_dsk.c
r23623	r23624
36	36
37	37
38	38	LEGACY_FLOPPY_OPTIONS_START( bml3 )
39		LEGACY_FLOPPY_OPTION( bml3_dsk, "bm3", "BML3 floppy disk image", bml3_dsk_identify, bml3_dsk_construct, NULL,
	39	LEGACY_FLOPPY_OPTION( bml3_dsk, "bm3", "BML3 floppy disk image", bml3_dsk_identify, bml3_dsk_construct, NULL,
40	40	HEADS([2])
41	41	TRACKS([40])
42	42	SECTORS([16])

trunk/src/lib/formats/td0_dsk.c
r23623	r23624
1022	1022	}
1023	1023
1024	1024	const floppy_format_type FLOPPY_TD0_FORMAT = &floppy_image_format_creator<td0_format>;
1025
1026

trunk/src/version.c
r23623	r23624
38	38	***************************************************************************/
39	39
40	40	extern const char build_version[];
41		const char build_version[] = "0.14~~8u5~~ ("__DATE__")";
	41	const char build_version[] = "0.149 ("__DATE__")";

trunk/src/mess/drivers/sg1000.c
r23623	r23624
741	741	/* register for state saving */
742	742	save_item(NAME(m_keylatch));
743	743
744		if (m_cartslot && (m_cartslot->get_type() == SEGA8_BASIC_L3 \|\| m_cartslot->get_type() == SEGA8_MUSIC_EDITOR
	744	if (m_cartslot && (m_cartslot->get_type() == SEGA8_BASIC_L3 \|\| m_cartslot->get_type() == SEGA8_MUSIC_EDITOR
745	745	\|\| m_cartslot->get_type() == SEGA8_DAHJEE_TYPEA \|\| m_cartslot->get_type() == SEGA8_DAHJEE_TYPEB))
746	746	{
747	747	m_maincpu->space(AS_PROGRAM).install_read_handler(0xc000, 0xffff, 0, 0, read8_delegate(FUNC(sega8_cart_slot_device::read_ram),(sega8_cart_slot_device*)m_cartslot));

trunk/src/mess/drivers/hx20.c
r23623	r23624
8	8
9	9	/*
10	10
11		TODO:
	11	TODO:
12	12
13		- m6800.c rewrite
14		- keyboard interrupt
15		- LCD controller
16		- serial
17		- SW6 read
18		- RS-232
19		- microcassette
20		- printer
21		- ROM cartridge
22		- floppy TF-20
23		- barcode reader
	13	- m6800.c rewrite
	14	- keyboard interrupt
	15	- LCD controller
	16	- serial
	17	- SW6 read
	18	- RS-232
	19	- microcassette
	20	- printer
	21	- ROM cartridge
	22	- floppy TF-20
	23	- barcode reader
24	24
25	25	*/
26	26
r23623	r23624
84	84	READ8_MEMBER( hx20_state::krtn89_r )
85	85	{
86	86	/*
87
	87
88	88	bit description
89
	89
90	90	0 KRTN8
91	91	1 KRTN9
92		2
93		3
94		4
95		5
	92	2
	93	3
	94	4
	95	5
96	96	6 _PWSW
97	97	7 _BUSY
98
	98
99	99	*/
100	100
101	101	UINT8 data = 0xff;
r23623	r23624
120	120	WRITE8_MEMBER( hx20_state::lcd_cs_w )
121	121	{
122	122	/*
123
	123
124	124	bit description
125
	125
126	126	0 LCD CS bit 0
127	127	1 LCD CS bit 1
128	128	2 LCD CS bit 2
r23623	r23624
131	131	5 SERIAL POUT
132	132	6 MO1
133	133	7 MO2
134
	134
135	135	*/
136	136
137	137	logerror("LCD CS %02x\n", data);
r23623	r23624
153	153	case 5: m_lcdc4->cs_w(0); break;
154	154	case 6: m_lcdc5->cs_w(0); break;
155	155	}
156
	156
157	157	int cd = BIT(data, 3);
158	158
159	159	m_lcdc0->cd_w(cd);
r23623	r23624
187	187	READ8_MEMBER( hx20_state::main_p1_r )
188	188	{
189	189	/*
190
	190
191	191	bit description
192
	192
193	193	0 RS-232 DSR
194	194	1 RS-232 CTS
195		2
	195	2
196	196	3 _INT EX
197	197	4 _PWA
198	198	5 _K.B REQUEST
199	199	6 SERIAL PIN
200	200	7 CARTRIDGE MI1 (0=ROM, 1=microcassette)
201
	201
202	202	*/
203	203
204	204	UINT8 data = 0x98;
r23623	r23624
224	224	WRITE8_MEMBER( hx20_state::main_p1_w )
225	225	{
226	226	/*
227
	227
228	228	bit description
229
230		0
231		1
232		2
233		3
234		4
235		5
236		6
237		7
238
	229
	230	0
	231	1
	232	2
	233	3
	234	4
	235	5
	236	6
	237	7
	238
239	239	*/
240	240	}
241	241
r23623	r23624
247	247	READ8_MEMBER( hx20_state::main_p2_r )
248	248	{
249	249	/*
250
	250
251	251	bit description
252
	252
253	253	0 bar code reader data
254		1
	254	1
255	255	2 SLAVE P34
256	256	3 RX
257		4
258		5
259		6
260		7
261
	257	4
	258	5
	259	6
	260	7
	261
262	262	*/
263
	263
264	264	UINT8 data = M6801_MODE_4;
265	265
266	266	// serial
267	267	data &= ~(!m_slave_flag << 2);
268
	268
269	269	if (m_slave_sio)
270	270	data \|= m_slave_rx << 3;
271	271	else
r23623	r23624
282	282	WRITE8_MEMBER( hx20_state::main_p2_w )
283	283	{
284	284	/*
285
	285
286	286	bit description
287
288		0
	287
	288	0
289	289	1 RS-232 TXD
290	290	2 serial select (0=peripheral, 1=slave 6301)
291		3
	291	3
292	292	4 TX
293		5
294		6
295		7
296
	293	5
	294	6
	295	7
	296
297	297	*/
298	298
299	299	// RS-232
r23623	r23624
316	316	READ8_MEMBER( hx20_state::slave_p1_r )
317	317	{
318	318	/*
319
	319
320	320	bit description
321
322		0
323		1
324		2
325		3
326		4
327		5
	321
	322	0
	323	1
	324	2
	325	3
	326	4
	327	5
328	328	6 printer reset pulse
329	329	7 printer timing pulse
330
	330
331	331	*/
332	332
333	333	UINT8 data = 0;
r23623	r23624
343	343	WRITE8_MEMBER( hx20_state::slave_p1_w )
344	344	{
345	345	/*
346
	346
347	347	bit description
348
	348
349	349	0 printer head 1 (1=on)
350	350	1 printer head 2
351	351	2 printer head 3
352	352	3 printer head 4
353	353	4 printer motor (0=on)
354	354	5 speaker (1=on)
355		6
356		7
357
	355	6
	356	7
	357
358	358	*/
359	359
360	360	// speaker
r23623	r23624
369	369	READ8_MEMBER( hx20_state::slave_p2_r )
370	370	{
371	371	/*
372
	372
373	373	bit description
374
	374
375	375	0 RS-232 RXD / microcassette (0=read, 1=write)
376		1
377		2
	376	1
	377	2
378	378	3 TX
379		4
380		5
381		6
382		7
383
	379	4
	380	5
	381	6
	382	7
	383
384	384	*/
385
	385
386	386	UINT8 data = M6801_MODE_7;
387	387
388	388	// serial
r23623	r23624
399	399	WRITE8_MEMBER( hx20_state::slave_p2_w )
400	400	{
401	401	/*
402
	402
403	403	bit description
404
405		0
	404
	405	0
406	406	1 microcassette internal clock, write data
407	407	2 serial select (0=brake, 1=normal)
408		3
	408	3
409	409	4 RX
410		5
411		6
412		7
413
	410	5
	411	6
	412	7
	413
414	414	*/
415	415
416	416	// serial
r23623	r23624
425	425	READ8_MEMBER( hx20_state::slave_p3_r )
426	426	{
427	427	/*
428
	428
429	429	bit description
430
431		0
432		1
	430
	431	0
	432	1
433	433	2 external cassette read data
434		3
435		4
436		5
437		6
438		7
439
	434	3
	435	4
	436	5
	437	6
	438	7
	439
440	440	*/
441	441
442	442	UINT8 data = 0;
r23623	r23624
452	452	WRITE8_MEMBER( hx20_state::slave_p3_w )
453	453	{
454	454	/*
455
	455
456	456	bit description
457
	457
458	458	0 external cassette remote (0=on)
459	459	1 RS-232 RTS
460		2
	460	2
461	461	3 external cassette write data
462	462	4 slave status flag
463	463	5 bar code power (1=on)
464	464	6 RS-232 power (1=on)
465	465	7 program power (1=on)
466
	466
467	467	*/
468	468
469	469	// RS-232
r23623	r23624
481	481	READ8_MEMBER( hx20_state::slave_p4_r )
482	482	{
483	483	/*
484
	484
485	485	bit description
486
	486
487	487	0 PLUG 2
488		1
489		2
490		3
491		4
492		5
493		6
	488	1
	489	2
	490	3
	491	4
	492	5
	493	6
494	494	7 RS-232 CD
495
	495
496	496	*/
497
	497
498	498	UINT8 data = 0;
499	499
500	500	// RS-232
r23623	r23624
511	511	WRITE8_MEMBER( hx20_state::slave_p4_w )
512	512	{
513	513	/*
514
	514
515	515	bit description
516
517		0
	516
	517	0
518	518	1 port enable always on / printer motor control (0=open, 1=brake)
519	519	2 clear shift register / microcassette power switch (1=on)
520	520	3 ROM cartridge power switch (1=on) / microcassette command
521	521	4 ROM address counter clear / clock
522	522	5 cassette/RS-232 select (0=RS-232, 1=microcassette)
523	523	6 ROM cartridge select / microcassette clock (0=counter, 1=head switch)
524		7
525
	524	7
	525
526	526	*/
527	527	}
528	528
r23623	r23624
598	598	static INPUT_PORTS_START( hx20 )
599	599	PORT_START("KSC0")
600	600	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('_')
601		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
	601	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
602	602	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('\"')
603	603	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
604	604	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
r23623	r23624
871	871	MCFG_RS232_PORT_ADD(RS232_TAG, rs232_intf, default_rs232_devices, NULL)
872	872	MCFG_CASSETTE_ADD(CASSETTE_TAG, default_cassette_interface)
873	873	MCFG_EPSON_SIO_ADD("sio", "tf20")
874
	874
875	875	// internal ram
876	876	MCFG_RAM_ADD(RAM_TAG)
877	877	MCFG_RAM_DEFAULT_SIZE("16K")

trunk/src/mess/drivers/scv.c
r23623	r23624
71	71
72	72	ioport_port *m_key[8];
73	73	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
74
	74
75	75	void scv_set_banks();
76	76	inline void plot_sprite_part( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 pat, UINT8 col, UINT8 screen_sprite_start_line );
77	77	inline void draw_sprite( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 tile_idx, UINT8 col, UINT8 left, UINT8 right, UINT8 top, UINT8 bottom, UINT8 clip_y, UINT8 screen_sprite_start_line );
r23623	r23624
421	421	case TIMER_VB:
422	422	{
423	423	int vpos = machine().primary_screen->vpos();
424
	424
425	425	switch( vpos )
426	426	{
427	427	case 240:
r23623	r23624
784	784	save_item(NAME(m_porta));
785	785	save_item(NAME(m_portc));
786	786	save_item(NAME(m_cart_ram_enabled));
787
	787
788	788	machine().save().register_postload(save_prepost_delegate(FUNC(scv_state::scv_postload), this));
789	789	}
790	790

trunk/src/mess/drivers/gba.c
r23623	r23624
1920	1920	AM_RANGE(0x05000000, 0x050003ff) AM_RAM_WRITE(gba_pram_w) AM_SHARE("gba_pram") // Palette RAM
1921	1921	AM_RANGE(0x06000000, 0x06017fff) AM_RAM_WRITE(gba_vram_w) AM_SHARE("gba_vram") // VRAM
1922	1922	AM_RANGE(0x07000000, 0x070003ff) AM_RAM_WRITE(gba_oam_w) AM_SHARE("gba_oam") // OAM
1923		//AM_RANGE(0x08000000, 0x0cffffff) // cart ROM + mirrors, mapped here at machine_start if a cart is present
	1923	//AM_RANGE(0x08000000, 0x0cffffff) // cart ROM + mirrors, mapped here at machine_start if a cart is present
1924	1924	AM_RANGE(0x10000000, 0xffffffff) AM_READ(gba_10000000_r) // for "Justice League Chronicles" (game bug)
1925	1925	ADDRESS_MAP_END
1926	1926
r23623	r23624
2117	2117	/* and an IRQ handling timer */
2118	2118	m_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gba_state::handle_irq),this));
2119	2119	m_irq_timer->adjust(attotime::never);
2120
	2120
2121	2121	// install the cart ROM into the address map, if present
2122	2122	m_cartslot->install_rom();
2123	2123
r23623	r23624
2144	2144	m_maincpu->space(AS_PROGRAM).install_read_handler(0xe000000, 0xe01ffff, read32_delegate(FUNC(gba_cart_slot_device::read_ram),(gba_cart_slot_device*)m_cartslot));
2145	2145	m_maincpu->space(AS_PROGRAM).install_write_handler(0xe000000, 0xe01ffff, write32_delegate(FUNC(gba_cart_slot_device::write_ram),(gba_cart_slot_device*)m_cartslot));
2146	2146	}
2147
	2147
2148	2148	save_item(NAME(m_DISPSTAT));
2149	2149	save_item(NAME(m_BG2X));
2150	2150	save_item(NAME(m_BG2Y));
r23623	r23624
2241	2241	SLOT_INTERFACE_INTERNAL("gba_eeprom", GBA_ROM_EEPROM)
2242	2242	SLOT_INTERFACE_INTERNAL("gba_eeprom_4k", GBA_ROM_EEPROM)
2243	2243	SLOT_INTERFACE_INTERNAL("gba_eeprom_64k", GBA_ROM_EEPROM64)
2244		SLOT_INTERFACE_INTERNAL("gba_flash", GBA_ROM_FLASH) // Panasonic
2245		SLOT_INTERFACE_INTERNAL("gba_flash_512", GBA_ROM_FLASH) // Panasonic
2246		SLOT_INTERFACE_INTERNAL("gba_flash_1m", GBA_ROM_FLASH1M) // Sanyo
	2244	SLOT_INTERFACE_INTERNAL("gba_flash", GBA_ROM_FLASH) // Panasonic
	2245	SLOT_INTERFACE_INTERNAL("gba_flash_512", GBA_ROM_FLASH) // Panasonic
	2246	SLOT_INTERFACE_INTERNAL("gba_flash_1m", GBA_ROM_FLASH1M) // Sanyo
2247	2247	SLOT_INTERFACE_END
2248	2248
2249	2249

trunk/src/mess/drivers/altos5.c
r23623	r23624
129	129	// normalise bank number (4x becomes 0x; 2x and 1x are already ok)
130	130	return data & 0x3f;
131	131	}
132
	132
133	133	void altos5_state::setup_banks(UINT8 source)
134	134	{
135	135	offs_t offs,temp;
r23623	r23624
248	248	{
249	249	DEVCB_DRIVER_LINE_MEMBER(altos5_state, busreq_w),
250	250	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
251		DEVCB_NULL, // BAO, not used
	251	DEVCB_NULL, // BAO, not used
252	252	DEVCB_DRIVER_MEMBER(altos5_state, memory_read_byte),
253	253	DEVCB_DRIVER_MEMBER(altos5_state, memory_write_byte),
254	254	DEVCB_DRIVER_MEMBER(altos5_state, io_read_byte),
r23623	r23624
300	300	d0: L = a HD is present
301	301	d1: L = a 2nd hard drive is present
302	302	d2: unused configuration input (must be H to skip HD boot)
303		d3: selected floppy is single(L) or double sided(H)
	303	d3: selected floppy is single(L) or double sided(H)
304	304	d7: IRQ from FDC
305	305	*/
306	306	READ8_MEMBER( altos5_state::port08_r )

trunk/src/mess/drivers/vt100.c
r23623	r23624
27	27	#include "video/vtvideo.h"
28	28	#include "vt100.lh"
29	29
30		#define RS232_TAG "rs232"
31		#define COM5016T_TAG "com5016t"
	30	#define RS232_TAG "rs232"
	31	#define COM5016T_TAG "com5016t"
32	32
33	33	class vt100_state : public driver_device
34	34	{

trunk/src/mess/drivers/chessmst.c
r23623	r23624
23	23	: driver_device(mconfig, type, tag),
24	24	m_maincpu(*this, "maincpu"),
25	25	m_speaker(*this, "speaker")
26		{ }
	26	{ }
27	27
28	28	required_device<cpu_device> m_maincpu;
29	29	required_device<speaker_sound_device> m_speaker;

trunk/src/mess/drivers/superslave.c
r23623	r23624
104	104	WRITE8_MEMBER( superslave_state::memctrl_w )
105	105	{
106	106	/*
107
	107
108	108	bit description
109
	109
110	110	0 Memory bank 0 on
111	111	1 Memory bank 1 on
112		2
113		3
	112	2
	113	3
114	114	4 Unswitched memory boundary bit 0
115	115	5 Unswitched memory boundary bit 1
116	116	6 Unswitched memory boundary bit 2
117	117	7 Unswitched memory boundary bit 3
118
	118
119	119	*/
120	120
121	121	m_memctrl = data;
r23623	r23624
129	129	READ8_MEMBER( superslave_state::status_r)
130	130	{
131	131	/*
132
	132
133	133	bit description
134
	134
135	135	0 Sense Switch (0=closed)
136	136	1 Parity error (1=error)
137	137	2 Syncerr (1=error)
r23623	r23624
140	140	5 Data Set Ready 2
141	141	6 Data Set Ready 1
142	142	7 Data Set Ready 0
143
	143
144	144	*/
145	145
146	146	UINT8 data = 1;
r23623	r23624
162	162	WRITE8_MEMBER( superslave_state::cmd_w )
163	163	{
164	164	/*
165
	165
166	166	bit description
167
	167
168	168	0 Prom enable (1=enabled)
169	169	1 Clear Parity (1=cleared)
170	170	2 Clear Syncerr (1=cleared)
r23623	r23624
173	173	5 Command bit 5
174	174	6 Command bit 6
175	175	7 Command bit 7
176
	176
177	177	*/
178	178
179	179	m_cmd = data;

trunk/src/mess/drivers/ql.c
r23623	r23624
144	144	bit description
145	145
146	146	0 Serial data input (SER2 RxD, SER1 TxD)
147		1
148		2
149		3
150		4
151		5
152		6
	147	1
	148	2
	149	3
	150	4
	151	5
	152	6
153	153	7 ZX8302 serial link input/output (COMDATA)
154	154
155	155	*/
r23623	r23624
176	176
177	177	bit description
178	178
179		0
	179	0
180	180	1 Speaker output
181	181	2 Interrupt output (IPL0-2)
182	182	3 Interrupt output (IPL1)
183	183	4 Serial Clear-to-Send output (SER1 CTS)
184	184	5 Serial Data Terminal Ready output (SER2 DTR)
185		6
	185	6
186	186	7 ZX8302 serial link input/output (COMDATA)
187	187
188	188	*/
r23623	r23624
1074	1074	//-------------------------------------------------
1075	1075
1076	1076	static MACHINE_CONFIG_DERIVED( opd, ql )
1077		// internal ram
1078		MCFG_RAM_MODIFY(RAM_TAG)
1079		MCFG_RAM_DEFAULT_SIZE("128K")
1080		MCFG_RAM_EXTRA_OPTIONS("256K")
	1077	// internal ram
	1078	MCFG_RAM_MODIFY(RAM_TAG)
	1079	MCFG_RAM_DEFAULT_SIZE("128K")
	1080	MCFG_RAM_EXTRA_OPTIONS("256K")
1081	1081	MACHINE_CONFIG_END
1082	1082
1083	1083

trunk/src/mess/drivers/pv1000.c
r23623	r23624
35	35	UINT16 period;
36	36	UINT8 val;
37	37	} m_voice[4];
38
	38
39	39	sound_stream *m_sh_channel;
40	40	};
41	41
r23623	r23624
95	95
96	96	/*
97	97	plgDavid's audio implementation/analysis notes:
98
	98
99	99	Sound appears to be 3 50/50 pulse voices made by cutting the main clock by 1024,
100	100	then by the value of the 6bit period registers.
101	101	This creates a surprisingly accurate pitch range.
102
	102
103	103	Note: the register periods are inverted.
104	104	*/
105	105
106	106	void pv1000_sound_device::sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples)
107	107	{
108	108	stream_sample_t *buffer = outputs[0];
109
	109
110	110	while (samples > 0)
111	111	{
112	112	*buffer=0;
113
	113
114	114	for (int i = 0; i < 3; i++)
115	115	{
116	116	UINT32 per = (0x3f - (m_voice[i].period & 0x3f));
117
118		if (per != 0) //OFF!
	117
	118	if (per != 0) //OFF!
119	119	buffer += m_voice[i].val 8192;
120
	120
121	121	m_voice[i].count++;
122
	122
123	123	if (m_voice[i].count >= per)
124	124	{
125	125	m_voice[i].count = 0;
126	126	m_voice[i].val = !m_voice[i].val;
127	127	}
128	128	}
129
	129
130	130	buffer++;
131	131	samples--;
132	132	}
r23623	r23624
412	412
413	413	m_gfxram = memregion("gfxram")->base();
414	414	save_pointer(NAME(m_gfxram), 0x400);
415
	415
416	416	save_item(NAME(m_io_regs));
417	417	save_item(NAME(m_fd_data));
418	418	save_item(NAME(m_pcg_bank));

trunk/src/mess/drivers/applix.c
r23623	r23624
954	954
955	955	DRIVER_INIT_MEMBER(applix_state, applix)
956	956	{
957
958	957	floppy_connector *con = machine().device<floppy_connector>("wd1772:0");
959	958	floppy_image_device *floppy = con ? con->get_device() : 0;
960	959	if (floppy)

trunk/src/mess/drivers/ep64.c
r23623	r23624
13	13	Enterprise Computers Ltd. 1985
14	14
15	15	MAIN PCB Layout
16		---------------
	16	---------------
17	17	DUAL
18	18	\|-----------\| 9V TAPE_IN/OUT RES
19		\|HEATSINK \| DC_IN MON1 AND REMOTE SR1 PR1 CN2A CN1A \|-\|
	19	\|HEATSINK \| DC_IN MON1 AND REMOTE SR1 PR1 CN2A CN1A \|-\|
20	20	\| \|--\|\|---\|--\|\|--\|--\| \|--\| \|-\|\|-\|\|-\|\|-\|\|-\| \|----\| \|-----\| \|--\| \|--\| \|-\|-\|------\|
21		\|-----------\|7805 \| MOD \| \|-\| \|-\| \|-\| \|-\| \|-\| \|-\| \|-\| EXP2 --\|EXTERNAL
	21	\|-----------\|7805 \| MOD \| \|-\| \|-\| \|-\| \|-\| \|-\| \|-\| \|-\| EXP2 --\|EXTERNAL
22	22	\|---+7805 \| \| 74LS06 74LS273 74LS86 74LS32 --\|EXPANSION
23	23	\| \| \|------\| 74LS244 --\|CONNECTOR
24	24	\| \|78L12 POT1 LM386 \|-----\| \|-----\| EXP1 --\|
r23623	r23624
27	27	\| \| 4.433619MHz 74LS145 POT3 LED \|-----\| \|-----\| --\|
28	28	\|---+ --\|
29	29	\| 74LS74 74LS244 74LS244 74LS245 \|---------\|
30		\| \|
	30	\| \|
31	31	\| 74LS373 4164 4164 74F157 \|
32	32	\| \|
33	33	\| 16-2-103 LM339 LM324 4164 4164 74F157 EXOS.IC2 \|
r23623	r23624
38	38	\|------------------------------------------------------------------\|
39	39	Notes: (all IC's shown)
40	40	Z80A - Z80A CPU, clock input 4MHz [8/2]
41		EXOS.IC2 - 32k x8-bit mask ROM usually 23256 manufactured by GI (DIP24). Contains EXOS operating
42		system and built-in word processor software. A few official revisions were made and
	41	EXOS.IC2 - 32k x8-bit mask ROM usually 23256 manufactured by GI (DIP24). Contains EXOS operating
	42	system and built-in word processor software. A few official revisions were made and
43	43	there were a few unofficial revision made with additional capabilities and bug-fixes
44	44	ROM labelling of some official versions found....
45	45	9256DS-0019 (C)1984 INTELLIGENT SOFTWARE LTD ENTER 08-45-A GI
r23623	r23624
77	77	MOD - Astec UM1233 TV modulator
78	78	RES - Reset push button switch
79	79	MON1 - Monitor output connector. Pinout is....
80
	80
81	81	Green A1 B1 NC
82	82	Ground A2 B2 Ground
83	83	Mono Comp. Video A3 B3 Blue
r23623	r23624
85	85	VSync A5 B5 Composite Sync
86	86	NC A6 B6 Mode Switch
87	87	Left Audio A7 B7 Right Audio
88
	88
89	89	SR1 - Serial/Network connector. Pinout is....
90
	90
91	91	Reference A1 B1 Ground
92	92	- A2 B2 -
93	93	RTS A3 B3 Data Out
94	94	CTS A4 B4 Data In
95	95
96	96	PR1 - Printer connector. Pinout is....
97
	97
98	98	Ground A1 B1 Ground
99	99	Strobe A2 B2 Ready
100	100	Data 3 A3 B3 Data 4
r23623	r23624
104	104	Data 0 A7 B7 Data 7
105	105
106	106	CN2A - Joystick 2 connector
107		CN1A - Joystick 1 connector
	107	CN1A - Joystick 1 connector
108	108	Pinout is....
109
	109
110	110	Keyboard J A1 B1 Ground
111	111	Keyboard L A2 B2 Keyboard K
112	112	- A3 B3 -
r23623	r23624
116	116
117	117
118	118	Internal Memory Expansion PCB Layout
119		------------------------------------
	119	------------------------------------
120	120
121	121	\|---------------------\|
122	122	\| 4164 74LS00 PL3 PL2\|
r23623	r23624
138	138
139	139	/*
140	140
141		TODO:
	141	TODO:
142	142
143		- POST RAM errors
144		- rewrite DAVE to output to discrete DAC
145		- rewrite NICK
146		- cassette
147		- external joysticks
	143	- POST RAM errors
	144	- rewrite DAVE to output to discrete DAC
	145	- rewrite NICK
	146	- cassette
	147	- external joysticks
148	148
149		http://ep.homeserver.hu/Dokumentacio/Konyvek/
	149	http://ep.homeserver.hu/Dokumentacio/Konyvek/
150	150
151	151	*/
152	152
r23623	r23624
191	191	WRITE8_MEMBER( ep64_state::wr0_w )
192	192	{
193	193	/*
194
	194
195	195	bit description
196
	196
197	197	0 KEY A
198	198	1 KEY B
199	199	2 KEY C
r23623	r23624
202	202	5 CASSETTE OUT
203	203	6 REMOTE 1
204	204	7 REMOTE 2
205
	205
206	206	*/
207	207
208	208	// keyboard
r23623	r23624
228	228	READ8_MEMBER( ep64_state::rd1_r )
229	229	{
230	230	/*
231
	231
232	232	bit description
233
	233
234	234	0 KBJ
235	235	1 KBK
236	236	2 KBL
r23623	r23624
239	239	5 SERIAL/NET STATUS IN
240	240	6 CASSETTE IN
241	241	7 ?
242
	242
243	243	*/
244	244
245	245	UINT8 data = 0;
r23623	r23624
265	265	WRITE8_MEMBER( ep64_state::wr2_w )
266	266	{
267	267	/*
268
	268
269	269	bit description
270
	270
271	271	0 SERIAL/NET DATA OUT
272	272	1 SERIAL/NET STATUS OUT
273		2
274		3
275		4
276		5
277		6
278		7
279
	273	2
	274	3
	275	4
	276	5
	277	6
	278	7
	279
280	280	*/
281	281
282	282	// serial
r23623	r23624
596	596	ROM_CART_LOAD( "cart", 0x00000, 0x10000, ROM_MIRROR )
597	597	ROM_END
598	598
599		#define rom_phc64 rom_ep64
	599	#define rom_phc64 rom_ep64
600	600
601	601
602	602	//-------------------------------------------------

trunk/src/mess/drivers/argo.c
r23623	r23624
35	35
36	36	argo_state(const machine_config &mconfig, device_type type, const char *tag)
37	37	: driver_device(mconfig, type, tag),
38		m_maincpu(*this, "maincpu"),
39		m_p_videoram(*this, "p_videoram"){ }
	38	m_maincpu(*this, "maincpu"),
	39	m_p_videoram(*this, "p_videoram"){ }
40	40
41	41	required_device<cpu_device> m_maincpu;
42	42	DECLARE_WRITE8_MEMBER(argo_videoram_w);

trunk/src/mess/drivers/tec1.c
r23623	r23624
258	258	else
259	259	if (m_kbd_row == 3)
260	260	i = m_io_line3->read();
261
	261
262	262	/* if previous key is still held, bail out */
263	263	if (i)
264	264	if (tec1_convert_col_to_bin(i, m_kbd_row) == m_kbd)

trunk/src/mess/drivers/softbox.c
r23623	r23624
5	5	http://mikenaberezny.com/hardware/pet-cbm/sse-softbox-z80-computer/
6	6
7	7
8		Using the Corvus hard disk
9		--------------------------
	8	Using the Corvus hard disk
	9	--------------------------
10	10
11		The SoftBox distribution disk (softbox-distrib.d80) is configured for
12		a CBM 8050 as CP/M drives A/B and a 10MB Corvus hard disk as drives C/D.
	11	The SoftBox distribution disk (softbox-distrib.d80) is configured for
	12	a CBM 8050 as CP/M drives A/B and a 10MB Corvus hard disk as drives C/D.
13	13
14		Use the CHDMAN utility to create a 10MB hard disk image for the Corvus:
	14	Use the CHDMAN utility to create a 10MB hard disk image for the Corvus:
15	15
16		$ chdman createhd -o /path/to/corvus10mb.chd -chs 358,3,20 -ss 512
	16	$ chdman createhd -o /path/to/corvus10mb.chd -chs 358,3,20 -ss 512
17	17
18		Start the SoftBox emulator with the floppy and hard disk images mounted:
	18	Start the SoftBox emulator with the floppy and hard disk images mounted:
19	19
20		$ mess softbox -flop1 /path/to/softbox-distrib.d80 \
21		-hard1 /path/to/corvus10mb.chd
	20	$ mess softbox -flop1 /path/to/softbox-distrib.d80 \
	21	-hard1 /path/to/corvus10mb.chd
22	22
23		Before the Corvus can be used under CP/M, it must be prepared
24		by running DIAG.COM and FORMAT.COM.
	23	Before the Corvus can be used under CP/M, it must be prepared
	24	by running DIAG.COM and FORMAT.COM.
25	25
26		DIAG.COM
	26	DIAG.COM
27	27
28		Enter "diag" (no arguments) at the CP/M prompt to run the Corvus diagnostics
29		program. This program will perform the Corvus low-level format.
	28	Enter "diag" (no arguments) at the CP/M prompt to run the Corvus diagnostics
	29	program. This program will perform the Corvus low-level format.
30	30
31		Select option 6 (Update Controller Code) at the menu.
32		Enter "corvb184.fmt" when prompted for the filename.
33		Enter "y" at the confirmation prompts.
34		Enter "1" for the Corvus drive number (two prompts).
35		After formatting is complete, it will return to the menu.
	31	Select option 6 (Update Controller Code) at the menu.
	32	Enter "corvb184.fmt" when prompted for the filename.
	33	Enter "y" at the confirmation prompts.
	34	Enter "1" for the Corvus drive number (two prompts).
	35	After formatting is complete, it will return to the menu.
36	36
37		Select option 3 (Read Controller Code Version #) at the menu.
38		Enter "1" for the Corvus drive number.
39		It should report "V18.4AP" and then return to the menu.
	37	Select option 3 (Read Controller Code Version #) at the menu.
	38	Enter "1" for the Corvus drive number.
	39	It should report "V18.4AP" and then return to the menu.
40	40
41		Select option 9 to return to CP/M.
	41	Select option 9 to return to CP/M.
42	42
43		FORMAT.COM
	43	FORMAT.COM
44	44
45		Enter "format" (no arguments) at the CP/M prompt to run the SoftBox disk
46		format program. This program will perform the CP/M filesystem format.
	45	Enter "format" (no arguments) at the CP/M prompt to run the SoftBox disk
	46	format program. This program will perform the CP/M filesystem format.
47	47
48		Enter drive letter "c" at the prompt.
49		Enter "y" to confirm the format.
50		After formatting is complete, it will prompt for a drive letter again.
	48	Enter drive letter "c" at the prompt.
	49	Enter "y" to confirm the format.
	50	After formatting is complete, it will prompt for a drive letter again.
51	51
52		Enter drive letter "d" at the prompt.
53		Enter "y" to confirm the format.
54		After formatting is complete, it will prompt for a drive letter again.
	52	Enter drive letter "d" at the prompt.
	53	Enter "y" to confirm the format.
	54	After formatting is complete, it will prompt for a drive letter again.
55	55
56		Press RETURN to return to CP/M.
	56	Press RETURN to return to CP/M.
57	57
58		STAT.COM
	58	STAT.COM
59	59
60		After all steps are completed, drives C and D should be usable from
61		CP/M. Each drive is one half of the Corvus 10MB disk. Running the
62		command "stat c: dsk:" should show 4712 kilobyte drive capacity.
63		Drive D should show the same information.
	60	After all steps are completed, drives C and D should be usable from
	61	CP/M. Each drive is one half of the Corvus 10MB disk. Running the
	62	command "stat c: dsk:" should show 4712 kilobyte drive capacity.
	63	Drive D should show the same information.
64	64
65	65
66		Using other Corvus hard disk sizes
67		----------------------------------
	66	Using other Corvus hard disk sizes
	67	----------------------------------
68	68
69		The SoftBox supports 5, 10, and 20 MB hard disks. The distribution disk
70		is configured for 10 MB as explained above. To use other sizes, make
71		a new image with CHDMAN. See the top of src/mess/includes/corvushd.h
72		for the parameters for the other drives.
	69	The SoftBox supports 5, 10, and 20 MB hard disks. The distribution disk
	70	is configured for 10 MB as explained above. To use other sizes, make
	71	a new image with CHDMAN. See the top of src/mess/includes/corvushd.h
	72	for the parameters for the other drives.
73	73
74		After the image has been created and the SoftBox emulator started with
75		it mounted, the SoftBox BIOS needs to be told what size Corvus hard
76		disk is attached. Use the NEWSYS.COM utility to reconfigure the drive
77		size. When NEWSYS prompts for a source drive, enter "a" (the drive letter
78		of the CP/M distribution disk). Use option "d" (Disk drive assignment)
79		to reconfigure the Corvus size. After the change has been made, use option
80		"s" (Save new system) to write the configuration to the floppy (drive A) and
81		option "e" (Execute new system) to restart CP/M with the configuration.
82		DIAG.COM and FORMAT.COM can then be used to format the hard disk.
	74	After the image has been created and the SoftBox emulator started with
	75	it mounted, the SoftBox BIOS needs to be told what size Corvus hard
	76	disk is attached. Use the NEWSYS.COM utility to reconfigure the drive
	77	size. When NEWSYS prompts for a source drive, enter "a" (the drive letter
	78	of the CP/M distribution disk). Use option "d" (Disk drive assignment)
	79	to reconfigure the Corvus size. After the change has been made, use option
	80	"s" (Save new system) to write the configuration to the floppy (drive A) and
	81	option "e" (Execute new system) to restart CP/M with the configuration.
	82	DIAG.COM and FORMAT.COM can then be used to format the hard disk.
83	83
84	84	*/
85	85

trunk/src/mess/drivers/concept.c
r23623	r23624
237	237	MCFG_MOS6551_ADD(ACIA_1_TAG, XTAL_1_8432MHz, NULL)
238	238
239	239	MCFG_CONCEPT_EXP_PORT_ADD("exp1", concept_exp_devices, NULL)
240		MCFG_CONCEPT_EXP_PORT_ADD("exp2", concept_exp_devices, "fdc") // Flat cable Hard Disk Controller in Slot 2
241		MCFG_CONCEPT_EXP_PORT_ADD("exp3", concept_exp_devices, "hdc") // Floppy Disk Controller in Slot 3
	240	MCFG_CONCEPT_EXP_PORT_ADD("exp2", concept_exp_devices, "fdc") // Flat cable Hard Disk Controller in Slot 2
	241	MCFG_CONCEPT_EXP_PORT_ADD("exp3", concept_exp_devices, "hdc") // Floppy Disk Controller in Slot 3
242	242	MCFG_CONCEPT_EXP_PORT_ADD("exp4", concept_exp_devices, NULL)
243	243
244	244	// 2x RS232 ports!
r23623	r23624
249	249	ROM_REGION16_BE(0x100000,"maincpu",0) /* 68k rom and ram */
250	250
251	251	// concept boot ROM
252		ROM_SYSTEM_BIOS(0, "lvl8", "Level 8" ) // v0?
	252	ROM_SYSTEM_BIOS(0, "lvl8", "Level 8" ) // v0?
253	253	ROMX_LOAD("bootl08h", 0x010000, 0x1000, CRC(ee479f51) SHA1(b20ba18564672196076e46507020c6d69a640a2f), ROM_BIOS(1) \| ROM_SKIP(1))
254	254	ROMX_LOAD("bootl08l", 0x010001, 0x1000, CRC(acaefd07) SHA1(de0c7eaacaf4c0652aa45e523cebce2b2993c437), ROM_BIOS(1) \| ROM_SKIP(1))
255	255
256		ROM_SYSTEM_BIOS(1, "lvl7", "Level 7" ) // v0? v1?
	256	ROM_SYSTEM_BIOS(1, "lvl7", "Level 7" ) // v0? v1?
257	257	ROMX_LOAD("cc07h", 0x010000, 0x1000, CRC(455abac8) SHA1(b12e1580220242d34eafed1b486cebd89e823c8b), ROM_BIOS(2) \| ROM_SKIP(1))
258	258	ROMX_LOAD("cc07l", 0x010001, 0x1000, CRC(107a3830) SHA1(0ea12ef13b0d11fcd83b306b3a1bb8014ba910c0), ROM_BIOS(2) \| ROM_SKIP(1))
259	259
260		ROM_SYSTEM_BIOS(2, "lvl6", "Level 6" ) // v0?
	260	ROM_SYSTEM_BIOS(2, "lvl6", "Level 6" ) // v0?
261	261	ROMX_LOAD("cc06h", 0x010000, 0x1000, CRC(66b6b259) SHA1(1199a38ef3e94f695e8da6a7c80c6432da3cb80c), ROM_BIOS(3) \| ROM_SKIP(1))
262	262	ROMX_LOAD("cc06l", 0x010001, 0x1000, CRC(600940d3) SHA1(c3278bf23b3b1c35ea1e3da48a05e877862a8345), ROM_BIOS(3) \| ROM_SKIP(1))
263	263
264	264	#if 0
265	265	// version 1 lvl 7 release
266		ROM_LOAD16_BYTE("bootl17h", 0x010000, 0x1000, CRC(6dd9718f)) // where does this come from?
	266	ROM_LOAD16_BYTE("bootl17h", 0x010000, 0x1000, CRC(6dd9718f)) // where does this come from?
267	267	ROM_LOAD16_BYTE("bootl17l", 0x010001, 0x1000, CRC(107a3830))
268	268	#elif 0
269	269	// version $F lvl 8 (development version found on a floppy disk along with

trunk/src/mess/drivers/qx10.c
r23623	r23624
45	45
46	46	#define MAIN_CLK 15974400
47	47
48		#define RS232_TAG "rs232"
	48	#define RS232_TAG "rs232"
49	49
50	50	/*
51	51	Driver data
r23623	r23624
696	696	/* TODO: shift break */
697	697	/*INPUT_CHANGED_MEMBER(qx10_state::key_stroke)
698	698	{
699		if(newval && !oldval)
700		{
701		m_keyb.rx = (UINT8)(FPTR)(param) & 0x7f;
702		m_pic_m->ir4_w(1);
703		}
	699	if(newval && !oldval)
	700	{
	701	m_keyb.rx = (UINT8)(FPTR)(param) & 0x7f;
	702	m_pic_m->ir4_w(1);
	703	}
704	704
705		if(oldval && !newval)
706		m_keyb.rx = 0;
	705	if(oldval && !newval)
	706	m_keyb.rx = 0;
707	707	}*/
708	708
709	709	static INPUT_PORTS_START( qx10 )

trunk/src/mess/drivers/cortex.c
r23623	r23624
16	16	TMS9929 - Video
17	17	TMS9911 - DMA to floppy
18	18	TMS9909 - Floppy Disk Controller
19		AY-5-2376 - Keyboard controller
	19	AY-5-2376 - Keyboard controller
20	20
21	21	****************************************************************************/
22	22

trunk/src/mess/drivers/abc80.c
r23623	r23624
215	215	PORT_DIPUNKNOWN_DIPLOC( 0x20, IP_ACTIVE_LOW, "SW1:6" )
216	216	PORT_DIPUNKNOWN_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW1:7" )
217	217	PORT_DIPUNKNOWN_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW1:8" )
218
	218
219	219	PORT_START("SW2")
220	220	PORT_DIPUNKNOWN_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW2:1" )
221	221	PORT_DIPUNKNOWN_DIPLOC( 0x02, IP_ACTIVE_LOW, "SW2:2" )

trunk/src/mess/drivers/bml3.c
r23623	r23624
806	806	TIMER_DEVICE_CALLBACK_MEMBER(bml3_state::keyboard_callback)
807	807	{
808	808	static const char *const portnames[3] = { "key1","key2","key3" };
809		int i,port_i,scancode,trigger = 0;
	809	int i,port_i,scancode,trigger = 0;
810	810
811		if(!m_keyb_press_flag)
812		{
813		m_keyb_scancode = (m_keyb_scancode + 1) & 0x7F;
814		scancode = m_keyb_scancode;
	811	if(!m_keyb_press_flag)
	812	{
	813	m_keyb_scancode = (m_keyb_scancode + 1) & 0x7F;
	814	scancode = m_keyb_scancode;
815	815
816		if (scancode == 0x7F)
817		{
818		if (m_keyb_empty_scan == 1)
819		{
820		// full scan completed with no keypress
821		m_keyb_press = 0;
822		if (!m_keyb_counter_operation_disabled)
823		trigger = !0;
824		}
825		if (m_keyb_empty_scan > 0)
826		m_keyb_empty_scan--;
827		}
828		else if (scancode < 32*3)
829		{
830		port_i = scancode / 32;
831		i = scancode % 32;
	816	if (scancode == 0x7F)
	817	{
	818	if (m_keyb_empty_scan == 1)
	819	{
	820	// full scan completed with no keypress
	821	m_keyb_press = 0;
	822	if (!m_keyb_counter_operation_disabled)
	823	trigger = !0;
	824	}
	825	if (m_keyb_empty_scan > 0)
	826	m_keyb_empty_scan--;
	827	}
	828	else if (scancode < 32*3)
	829	{
	830	port_i = scancode / 32;
	831	i = scancode % 32;
832	832	if((ioport(portnames[port_i])->read()>>i) & 1)
833	833	{
834		m_keyb_empty_scan = 2;
835		trigger = !0;
836		}
837		}
838		if (trigger)
839		{
840		m_keyb_press_flag = 1;
841		m_keyb_press = m_keyb_scancode \| 0x80;
842		if (!m_keyb_interrupt_disabled)
	834	m_keyb_empty_scan = 2;
	835	trigger = !0;
	836	}
	837	}
	838	if (trigger)
	839	{
	840	m_keyb_press_flag = 1;
	841	m_keyb_press = m_keyb_scancode \| 0x80;
	842	if (!m_keyb_interrupt_disabled)
843	843	m_maincpu->set_input_line(M6809_IRQ_LINE, HOLD_LINE);
844		}
845		/*
846		else {
847		// #$# ? don't need this
848		m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
849		}
850		*/
851		}
	844	}
	845	/*
	846	else {
	847	// #$# ? don't need this
	848	m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
	849	}
	850	*/
	851	}
852	852
853	853	}
854	854
r23623	r23624
1167	1167	MCFG_PIA6821_ADD("pia6821", bml3_pia_config)
1168	1168	MCFG_ACIA6850_ADD("acia6850", bml3_acia_if)
1169	1169
1170		/* floppy */
	1170	/* floppy */
1171	1171	// #$# not sure what wd17xx model, this is just a guess
1172		MCFG_WD1773_ADD("fdc", bml3_wd17xx_interface )
1173		MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(bml3_floppy_interface)
	1172	MCFG_WD1773_ADD("fdc", bml3_wd17xx_interface )
	1173	MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(bml3_floppy_interface)
1174	1174
1175	1175	/* Audio */
1176	1176	MCFG_SPEAKER_STANDARD_MONO("mono")

trunk/src/mess/drivers/victor9k.c
r23623	r23624
9	9
10	10	/*
11	11
12		Sector format
13		-------------
	12	Sector format
	13	-------------
14	14
15		Header sync
16		Sector header (header ID, track ID, sector ID, and checksum)
17		Gap 1
18		Data Sync
19		Data field (data sync, data ID, data bytes, and checksum)
20		Gap 2
	15	Header sync
	16	Sector header (header ID, track ID, sector ID, and checksum)
	17	Gap 1
	18	Data Sync
	19	Data field (data sync, data ID, data bytes, and checksum)
	20	Gap 2
21	21
22		Track format
23		------------
24
25		ZONE LOWER HEAD UPPER HEAD SECTORS ROTATIONAL
26		NUMBER TRACKS TRACKS PER TRACK PERIOD (MS)
	22	Track format
	23	------------
27	24
28		0 0-3 unused 19 237.9
29		1 4-15 0-7 18 224.5
30		2 16-26 8-18 17 212.2
31		3 27-37 19-29 16 199.9
32		4 38-48 30-40 15 187.6
33		5 49-59 41-51 14 175.3
34		6 60-70 52-62 13 163.0
35		7 71-79 63-74 12 149.6
36		8 unused 75-79 11 144.0
	25	ZONE LOWER HEAD UPPER HEAD SECTORS ROTATIONAL
	26	NUMBER TRACKS TRACKS PER TRACK PERIOD (MS)
37	27
	28	0 0-3 unused 19 237.9
	29	1 4-15 0-7 18 224.5
	30	2 16-26 8-18 17 212.2
	31	3 27-37 19-29 16 199.9
	32	4 38-48 30-40 15 187.6
	33	5 49-59 41-51 14 175.3
	34	6 60-70 52-62 13 163.0
	35	7 71-79 63-74 12 149.6
	36	8 unused 75-79 11 144.0
	37
38	38	*/
39	39
40	40	/*
r23623	r23624
67	67	READ8_MEMBER( victor9k_state::floppy_p1_r )
68	68	{
69	69	/*
70
	70
71	71	bit description
72
	72
73	73	0 L0MS0
74	74	1 L0MS1
75	75	2 L0MS2
r23623	r23624
78	78	5 L1MS1
79	79	6 L1MS2
80	80	7 L1MS3
81
	81
82	82	*/
83	83
84	84	return m_lms;
r23623	r23624
92	92	READ8_MEMBER( victor9k_state::floppy_p2_r )
93	93	{
94	94	/*
95
	95
96	96	bit description
97
98		0
99		1
100		2
101		3
102		4
103		5
	97
	98	0
	99	1
	100	2
	101	3
	102	4
	103	5
104	104	6 RDY0
105	105	7 RDY1
106
	106
107	107	*/
108	108
109	109	UINT8 data = 0;
r23623	r23624
122	122	WRITE8_MEMBER( victor9k_state::floppy_p2_w )
123	123	{
124	124	/*
125
	125
126	126	bit description
127
	127
128	128	0 START0
129	129	1 STOP0
130	130	2 START1
131	131	3 STOP1
132	132	4 SEL1
133	133	5 SEL0
134		6
135		7
136
	134	6
	135	7
	136
137	137	*/
138	138
139	139	if (BIT(data, 0)) m_floppy0->mon_w(0);
r23623	r23624
142	142	if (BIT(data, 3)) m_floppy1->mon_w(1);
143	143
144	144	int sel0 = BIT(data, 5);
145
	145
146	146	if (m_sel0 && !sel0)
147	147	{
148	148	m_da0 = m_da;
r23623	r23624
152	152	m_sel0 = sel0;
153	153
154	154	int sel1 = BIT(data, 4);
155
	155
156	156	if (m_sel1 && !sel1)
157	157	{
158	158	m_da1 = m_da;
r23623	r23624
1034	1034
1035	1035	// single/double sided
1036	1036	data \|= (m_drive ? m_floppy1->twosid_r() : m_floppy0->twosid_r()) << 5;
1037
	1037
1038	1038	return data;
1039	1039	}
1040	1040
r23623	r23624
1148	1148	void victor9k_state::ready1_cb(floppy_image_device *device, int state)
1149	1149	{
1150	1150	m_rdy1 = state;
1151
	1151
1152	1152	m_via5->write_cb2(m_rdy1);
1153	1153	}
1154	1154

trunk/src/mess/drivers/pc1512.c
r23623	r23624
473	473	offs_t addr = offset & 0x3ff;
474	474	bool decoded = false;
475	475
476		if ( addr <= 0x00f) { data = m_dmac->read(space, offset & 0x0f); decoded = true; }
	476	if ( addr <= 0x00f) { data = m_dmac->read(space, offset & 0x0f); decoded = true; }
477	477	else if (addr >= 0x020 && addr <= 0x021) { data = m_pic->read(space, offset & 0x01); decoded = true; }
478	478	else if (addr >= 0x040 && addr <= 0x043) { data = m_pit->read(space, offset & 0x03); decoded = true; }
479	479	else if (addr >= 0x060 && addr <= 0x06f) { data = system_r(space, offset & 0x0f); decoded = true; }

trunk/src/mess/drivers/a7000.c
r23623	r23624
5	5	very preliminary driver by Angelo Salese,
6	6	based on work by Tomasz Slanina and Tom Walker
7	7
8		TODO:
9		- probably needs a full rewrite & merge with ssfindo.c
	8	TODO:
	9	- probably needs a full rewrite & merge with ssfindo.c
10	10
11	11	???
12	12	bp (0382827C) (second trigger)

trunk/src/mess/drivers/sdk86.c
r23623	r23624
31	31	#include "machine/serial.h"
32	32	#include "sdk86.lh"
33	33
34		#define I8251_TAG "i8251"
35		#define RS232_TAG "rs232"
	34	#define I8251_TAG "i8251"
	35	#define RS232_TAG "rs232"
36	36
37	37
38	38	class sdk86_state : public driver_device
r23623	r23624
40	40	public:
41	41	sdk86_state(const machine_config &mconfig, device_type type, const char *tag)
42	42	: driver_device(mconfig, type, tag) ,
43		m_maincpu(*this, "maincpu"),
44		m_usart(*this, I8251_TAG)
	43	m_maincpu(*this, "maincpu"),
	44	m_usart(*this, I8251_TAG)
45	45	{ }
46	46
47	47	required_device<cpu_device> m_maincpu;

trunk/src/mess/drivers/pc.c
r23623	r23624
1567	1567	MCFG_DEVICE_REMOVE("pit8253")
1568	1568
1569	1569	MCFG_PIT8253_ADD( "pit8253", pcjr_pit8253_config )
1570
	1570
1571	1571	MCFG_FLOPPY_DRIVE_ADD("fdc:0", asst128_floppies, "525ssqd", pc_state::asst128_formats)
1572	1572	MCFG_FLOPPY_DRIVE_ADD("fdc:1", asst128_floppies, "525ssqd", pc_state::asst128_formats)
1573	1573
r23623	r23624
2038	2038	ROM_START( t1000sl )
2039	2039	ROM_REGION(0x100000,"maincpu", 0)
2040	2040
2041		// 8076312.hu1 - most likely v01.04.00
2042		// 8075312.hu2
	2041	// 8076312.hu1 - most likely v01.04.00
	2042	// 8075312.hu2
2043	2043
2044	2044
2045	2045	// partlist says it has 1 128kbyte rom

trunk/src/mess/drivers/juicebox.c
r23623	r23624
258	258	address_space &space = m_maincpu->space(AS_PROGRAM);
259	259
260	260	smc_init();
261
	261
262	262	space.install_readwrite_handler(0x01c00000, 0x01c0000b, 0, 0, read32_delegate(FUNC(s3c44b0_device::cpuwrap_r), &(m_s3c44b0)), write32_delegate(FUNC(s3c44b0_device::cpuwrap_w), &(m_s3c44b0)));
263	263	space.install_readwrite_handler(0x01d00000, 0x01d0002b, 0, 0, read32_delegate(FUNC(s3c44b0_device::uart_0_r), &(m_s3c44b0)), write32_delegate(FUNC(s3c44b0_device::uart_0_w), &(m_s3c44b0)));
264	264	space.install_readwrite_handler(0x01d04000, 0x01d0402b, 0, 0, read32_delegate(FUNC(s3c44b0_device::uart_1_r), &(m_s3c44b0)), write32_delegate(FUNC(s3c44b0_device::uart_1_w), &(m_s3c44b0)));

trunk/src/mess/drivers/snes.c
r23623	r23624
531	531	READ8_MEMBER( snes_console_state::snessa1_hi_r )
532	532	{
533	533	UINT16 address = offset & 0xffff;
534
	534
535	535	if (offset < 0x400000)
536	536	{
537	537	if (address < 0x2000)
r23623	r23624
539	539	else if (address < 0x6000)
540	540	{
541	541	if (address >= 0x2200 && address < 0x2400)
542		return m_cartslot->chip_read(space, offset); // SA-1 Regs
	542	return m_cartslot->chip_read(space, offset); // SA-1 Regs
543	543	else if (address >= 0x3000 && address < 0x3800)
544		return m_cartslot->chip_read(space, offset); // Internal SA-1 RAM (2K)
	544	return m_cartslot->chip_read(space, offset); // Internal SA-1 RAM (2K)
545	545	else
546	546	return snes_r_io(space, address);
547	547	}
548	548	else if (address < 0x8000)
549		return m_cartslot->chip_read(space, offset); // SA-1 BWRAM
	549	return m_cartslot->chip_read(space, offset); // SA-1 BWRAM
550	550	else
551	551	return m_cartslot->read_h(space, offset);
552	552	}
r23623	r23624
557	557	READ8_MEMBER( snes_console_state::snessa1_lo_r )
558	558	{
559	559	UINT16 address = offset & 0xffff;
560
	560
561	561	if (offset < 0x400000)
562	562	{
563	563	if (address < 0x2000)
r23623	r23624
565	565	else if (address < 0x6000)
566	566	{
567	567	if (address >= 0x2200 && address < 0x2400)
568		return m_cartslot->chip_read(space, offset); // SA-1 Regs
	568	return m_cartslot->chip_read(space, offset); // SA-1 Regs
569	569	else if (address >= 0x3000 && address < 0x3800)
570		return m_cartslot->chip_read(space, offset); // Internal SA-1 RAM (2K)
	570	return m_cartslot->chip_read(space, offset); // Internal SA-1 RAM (2K)
571	571	else
572	572	return snes_r_io(space, address);
573	573	}
574	574	else if (address < 0x8000)
575		return m_cartslot->chip_read(space, offset); // SA-1 BWRAM
	575	return m_cartslot->chip_read(space, offset); // SA-1 BWRAM
576	576	else
577	577	return m_cartslot->read_l(space, offset);
578	578	}
579	579	else if (offset < 0x500000)
580		return m_cartslot->chip_read(space, offset); // SA-1 BWRAM (not mirrored above!)
	580	return m_cartslot->chip_read(space, offset); // SA-1 BWRAM (not mirrored above!)
581	581	else
582		return snes_r_io(space, address); // nothing mapped here!
	582	return snes_r_io(space, address); // nothing mapped here!
583	583	}
584	584
585	585	WRITE8_MEMBER( snes_console_state::snessa1_hi_w )
r23623	r23624
592	592	else if (address < 0x6000)
593	593	{
594	594	if (address >= 0x2200 && address < 0x2400)
595		m_cartslot->chip_write(space, offset, data); // SA-1 Regs
	595	m_cartslot->chip_write(space, offset, data); // SA-1 Regs
596	596	else if (address >= 0x3000 && address < 0x3800)
597		m_cartslot->chip_write(space, offset, data); // Internal SA-1 RAM (2K)
	597	m_cartslot->chip_write(space, offset, data); // Internal SA-1 RAM (2K)
598	598	else
599	599	snes_w_io(space, address, data);
600	600	}
601	601	else if (address < 0x8000)
602		m_cartslot->chip_write(space, offset, data); // SA-1 BWRAM
	602	m_cartslot->chip_write(space, offset, data); // SA-1 BWRAM
603	603	}
604	604	}
605	605
606	606	WRITE8_MEMBER( snes_console_state::snessa1_lo_w )
607	607	{
608	608	if (offset >= 0x400000 && offset < 0x500000)
609		m_cartslot->chip_write(space, offset, data); // SA-1 BWRAM (not mirrored above!)
	609	m_cartslot->chip_write(space, offset, data); // SA-1 BWRAM (not mirrored above!)
610	610	else
611	611	snessfx_hi_w(space, offset, data, 0xff);
612	612	}
r23623	r23624
886	886	READ8_MEMBER( snes_console_state::snessgb_hi_r )
887	887	{
888	888	UINT16 address = offset & 0xffff;
889
	889
890	890	if (offset < 0x400000)
891	891	{
892	892	if (address < 0x2000)

trunk/src/mess/drivers/vip.c
r23623	r23624
762	762
763	763	MCFG_VIP_BYTEIO_PORT_ADD(VIP_BYTEIO_PORT_TAG, vip_byteio_cards, NULL, WRITELINE(vip_state, byteio_inst_w))
764	764	MCFG_VIP_EXPANSION_SLOT_ADD(VIP_EXPANSION_SLOT_TAG, XTAL_3_52128MHz/2, vip_expansion_cards, NULL)
765		MCFG_VIP_EXPANSION_SLOT_CALLBACKS(WRITELINE(vip_state, exp_int_w), WRITELINE(vip_state, exp_dma_out_w), WRITELINE(vip_state, exp_dma_in_w))
	765	MCFG_VIP_EXPANSION_SLOT_CALLBACKS(WRITELINE(vip_state, exp_int_w), WRITELINE(vip_state, exp_dma_out_w), WRITELINE(vip_state, exp_dma_in_w))
766	766
767	767	// devices
768	768	MCFG_QUICKLOAD_ADD("quickload", vip_state, vip, "bin,c8,c8x", 0)

trunk/src/mess/drivers/intv.c
r23623	r23624
94	94
95	95	for (int i = 0; i < 16; i++)
96	96	{
97		r = intv_colors[i * 3 + 0];
98		g = intv_colors[i * 3 + 1];
	97	r = intv_colors[i * 3 + 0];
	98	g = intv_colors[i * 3 + 1];
99	99	b = intv_colors[i * 3 + 2];
100	100	colortable_palette_set_color(machine().colortable, i, MAKE_RGB(r, g, b));
101	101	colortable_palette_set_color(machine().colortable, i + 16, MAKE_RGB(r, g, b));

trunk/src/mess/drivers/pes.c
r23623	r23624
223	223	******************************************************************************/
224	224	/*static TIMER_CALLBACK_MEMBER(pes_state::serial_read_cb )
225	225	{
226		timer_set(attotime::from_hz(10000), TIMER_OUTFIFO_READ);
	226	timer_set(attotime::from_hz(10000), TIMER_OUTFIFO_READ);
227	227	}*/
228	228
229	229	DRIVER_INIT_MEMBER(pes_state,pes)

trunk/src/mess/drivers/vk100.c
r23623	r23624
153	153	#include "machine/serial.h"
154	154	#include "vk100.lh"
155	155
156		#define RS232_TAG "rs232"
157		#define COM5016T_TAG "com5016t"
	156	#define RS232_TAG "rs232"
	157	#define COM5016T_TAG "com5016t"
158	158
159	159	class vk100_state : public driver_device
160	160	{

trunk/src/mess/drivers/pet.c
r23623	r23624
668	668
669	669	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
670	670	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD))
671		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'')
	671	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'')
672	672	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
673	673	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
674	674

trunk/src/mess/drivers/pasogo.c
r23623	r23624
30	30	\|----------------------------\|
31	31	Notes: (all ICs shown)
32	32
33		VG230 - Vadem VG230 single-chip PC platform. Contains 16 MHz NEC uPD70116H V30HL CPU
34		(which is a high-speed low-power 8086 variation), IBM PC/XT-compatible core
	33	VG230 - Vadem VG230 single-chip PC platform. Contains 16 MHz NEC uPD70116H V30HL CPU
	34	(which is a high-speed low-power 8086 variation), IBM PC/XT-compatible core
35	35	logic, LCD controller (CGA/AT&T640x400), keyboard matrix scanner, dual PCMCIA
36	36	2.1 card controller, EMS 4.0 hardware support for up to 64MB, built-in timer
37	37	PIC/DMA/UART/RTC controllers. The clock input is 32.2200MHz. An internal divider
38	38	creates a 16.11MHz clock for the V30HL CPU.
39		HM514800 - Hitachi HM514800 512k x8-bit DRAM
	39	HM514800 - Hitachi HM514800 512k x8-bit DRAM
40	40	MC14071 - Motorola MC14071 Quad 2-input OR gate
41	41	74HC04 - 74HC04 Hex inverter
42	42	LM2937 - Texas Instruments LM2937ES-5 voltage regulator (Max 26V input, 5V output at 500mA)
r23623	r23624
45	45	VOL - Volume pot
46	46	CN5 - 5 pin connector for 4-way control pad (up/down/left/right/ground)
47	47	CN4 - 5 pin connector for on/off switch and 2 buttons
48		CN3 - 2 pin power input from 6x AA-battery compartment (input voltage is 9V DC)
49		CN2 - Flat cable connector for video out to LCD panel. When the LCD is powered on the pixels
50		are blue. The LCD panel PCB has part number 97-44264-8 LMG6912RPFC LMG6910RPGR
	48	CN3 - 2 pin power input from 6x AA-battery compartment (input voltage is 9V DC)
	49	CN2 - Flat cable connector for video out to LCD panel. When the LCD is powered on the pixels
	50	are blue. The LCD panel PCB has part number 97-44264-8 LMG6912RPFC LMG6910RPGR
51	51	and contains the following parts.....
52	52	Matsushita 53008HEB-8
53	53	Sanyo LA6324N quad operational amplifier
54	54	Hitachi BD66285BFC LCD controller IC (x3)
55	55	Hitachi BD66284BFC LCD controller IC (x4)
56		The LCD flat cable has several wires but 2 of them have frequencies which measure
	56	The LCD flat cable has several wires but 2 of them have frequencies which measure
57	57	69.9161Hz and 16.7798kHz. These are assumed to be VSync and HSync
58	58	CN1 - Cart slot
59	59	X1 - Marked 322. Measures 32.21732MHz so this is a common 32.22MHz OSC.
60	60	X2 - No markings. Measures 32.768kHz and used for the RTC
61	61	* - These parts are on the other side of the PCB
62
63	62
	63
64	64	Carts
65	65	-----
66		All of the carts are identical. Most have only one surface mounted mask ROM. Either a
67		MX23C8100 (8M) or YRM0442 (4M). Some are populated with additional parts including a 62256
68		32kx8 SRAM, a 3v coin battery and a MM1081N reset chip plus a few resistors/capacitors and
	66	All of the carts are identical. Most have only one surface mounted mask ROM. Either a
	67	MX23C8100 (8M) or YRM0442 (4M). Some are populated with additional parts including a 62256
	68	32kx8 SRAM, a 3v coin battery and a MM1081N reset chip plus a few resistors/capacitors and
69	69	a transistor. All parts are surface mounted.
70	70
71	71	PT-GMEM01B
r23623	r23624
214	214	UINT8 m_pc_spkrdata;
215	215	UINT8 m_pc_input;
216	216
217		int m_ppi_portc_switch_high;
218		int m_ppi_speaker;
219		int m_ppi_keyboard_clear;
220		UINT8 m_ppi_keyb_clock;
221		UINT8 m_ppi_portb;
222		UINT8 m_ppi_clock_signal;
223		UINT8 m_ppi_data_signal;
224		UINT8 m_ppi_shift_register;
225		UINT8 m_ppi_shift_enable;
	217	int m_ppi_portc_switch_high;
	218	int m_ppi_speaker;
	219	int m_ppi_keyboard_clear;
	220	UINT8 m_ppi_keyb_clock;
	221	UINT8 m_ppi_portb;
	222	UINT8 m_ppi_clock_signal;
	223	UINT8 m_ppi_data_signal;
	224	UINT8 m_ppi_shift_register;
	225	UINT8 m_ppi_shift_enable;
226	226
227	227	};
228	228

trunk/src/mess/drivers/attache.c
r23623	r23624
68	68	public:
69	69	attache_state(const machine_config &mconfig, device_type type, const char *tag)
70	70	: driver_device(mconfig, type, tag),
71		m_maincpu(*this,"maincpu"),
72		m_rom(*this,"boot"),
73		m_ram(*this,RAM_TAG),
74		m_char_rom(*this,"video"),
75		m_rtc(*this,"rtc"),
76		m_psg(*this,"psg"),
77		m_fdc(*this,"fdc"),
78		m_sio(*this,"sio"),
79		m_pio(*this,"pio"),
80		m_ctc(*this,"ctc"),
81		m_crtc(*this,"crtc"),
82		m_dma(*this, "dma"),
83		m_floppy0(*this, "fdc:0:525dd"),
84		m_floppy1(*this, "fdc:1:525dd"),
85		m_kb_row0(*this, "row0"),
86		m_kb_row1(*this, "row1"),
87		m_kb_row2(*this, "row2"),
88		m_kb_row3(*this, "row3"),
89		m_kb_row4(*this, "row4"),
90		m_kb_row5(*this, "row5"),
91		m_kb_row6(*this, "row6"),
92		m_kb_row7(*this, "row7"),
93		m_kb_mod(*this, "modifiers"),
94		m_membank1(*this, "bank1"),
95		m_membank2(*this, "bank2"),
96		m_membank3(*this, "bank3"),
97		m_membank4(*this, "bank4"),
98		m_membank5(*this, "bank5"),
99		m_membank6(*this, "bank6"),
100		m_membank7(*this, "bank7"),
101		m_membank8(*this, "bank8"),
102		m_nvram(*this, "nvram"),
103		m_rom_active(true),
104		m_gfx_enabled(false),
105		m_kb_clock(true),
106		m_kb_empty(true)
	71	m_maincpu(*this,"maincpu"),
	72	m_rom(*this,"boot"),
	73	m_ram(*this,RAM_TAG),
	74	m_char_rom(*this,"video"),
	75	m_rtc(*this,"rtc"),
	76	m_psg(*this,"psg"),
	77	m_fdc(*this,"fdc"),
	78	m_sio(*this,"sio"),
	79	m_pio(*this,"pio"),
	80	m_ctc(*this,"ctc"),
	81	m_crtc(*this,"crtc"),
	82	m_dma(*this, "dma"),
	83	m_floppy0(*this, "fdc:0:525dd"),
	84	m_floppy1(*this, "fdc:1:525dd"),
	85	m_kb_row0(*this, "row0"),
	86	m_kb_row1(*this, "row1"),
	87	m_kb_row2(*this, "row2"),
	88	m_kb_row3(*this, "row3"),
	89	m_kb_row4(*this, "row4"),
	90	m_kb_row5(*this, "row5"),
	91	m_kb_row6(*this, "row6"),
	92	m_kb_row7(*this, "row7"),
	93	m_kb_mod(*this, "modifiers"),
	94	m_membank1(*this, "bank1"),
	95	m_membank2(*this, "bank2"),
	96	m_membank3(*this, "bank3"),
	97	m_membank4(*this, "bank4"),
	98	m_membank5(*this, "bank5"),
	99	m_membank6(*this, "bank6"),
	100	m_membank7(*this, "bank7"),
	101	m_membank8(*this, "bank8"),
	102	m_nvram(*this, "nvram"),
	103	m_rom_active(true),
	104	m_gfx_enabled(false),
	105	m_kb_clock(true),
	106	m_kb_empty(true)
107	107	{ }
108	108
109	109	// PIO port B operation select
r23623	r23624
235	235	{
236	236	UINT8 x,y,bit,scan,data;
237	237	UINT8 dbl_mode = 0; // detemines which half of character to display when using double size attribute,
238		// as it can start on either odd or even character cells.
	238	// as it can start on either odd or even character cells.
239	239
240	240	// Graphics output (if enabled)
241	241	if(m_gfx_enabled)
r23623	r23624
542	542
543	543	WRITE8_MEMBER(attache_state::pio_portA_w)
544	544	{
545		// AO-7 = LATCH DATA OUT:
546		// LO = MOTOR ON
547		// L1 = GRAPHICS ENABLE
548		// L2 = /EPROM ENABLE
549		// L3-7 = DISPLAY BRIGHTNESS
550		// AO-7 = 8910 DATA I/O:
551		// AO-3 = 5832 DO-3 I/O
552		// A4-7 = 5832 AO-3 OUT
553		// AO-3 = 5101 DO-3 I/O
554		// A4-7 = 5101 AO-3 OUT
	545	// AO-7 = LATCH DATA OUT:
	546	// LO = MOTOR ON
	547	// L1 = GRAPHICS ENABLE
	548	// L2 = /EPROM ENABLE
	549	// L3-7 = DISPLAY BRIGHTNESS
	550	// AO-7 = 8910 DATA I/O:
	551	// AO-3 = 5832 DO-3 I/O
	552	// A4-7 = 5832 AO-3 OUT
	553	// AO-3 = 5101 DO-3 I/O
	554	// A4-7 = 5101 AO-3 OUT
555	555	m_pio_porta = data;
556	556	}
557	557
558	558	WRITE8_MEMBER(attache_state::pio_portB_w)
559	559	{
560		// BO-1 = 5101 A4-5
561		// B2-4 = OPERATION SELECT
562		// 0 = 8910 ADDR LOAD
563		// 1 = 8910 DATA LOAD
564		// 2 = 5832 WRITE
565		// 3 = 5832 READ
566		// 4 = 5101 WRITE
567		// 5 = 5101 READ
568		// 6 = LATCH LOAD
569		// 7 = NO-OP
	560	// BO-1 = 5101 A4-5
	561	// B2-4 = OPERATION SELECT
	562	// 0 = 8910 ADDR LOAD
	563	// 1 = 8910 DATA LOAD
	564	// 2 = 5832 WRITE
	565	// 3 = 5832 READ
	566	// 4 = 5101 WRITE
	567	// 5 = 5101 READ
	568	// 6 = LATCH LOAD
	569	// 7 = NO-OP
570	570	//B5 = /'138 OPERATION STROBE
571	571	//B6 = /KEYBOARD DATA IN
572	572	//B7 = /KEYBOARD CLOCK OUT
r23623	r23624
646	646	case DISP_CHAR:
647	647	m_char_ram[(m_char_line*128)+(param & 0x7f)] = data;
648	648	break;
649		// default:
650		// logerror("Unimplemented display operation %02x data %02x param %02x\n",m_current_cmd,data,param);
	649	// default:
	650	// logerror("Unimplemented display operation %02x data %02x param %02x\n",m_current_cmd,data,param);
651	651	}
652	652	}
653	653
r23623	r23624
756	756
757	757	WRITE_LINE_MEMBER( attache_state::fdc_dack_w )
758	758	{
759
760	759	}
761	760
762	761	static ADDRESS_MAP_START( attache_map , AS_PROGRAM, 8, attache_state)
r23623	r23624
1040	1039
1041	1040	MCFG_RAM_ADD(RAM_TAG)
1042	1041	MCFG_RAM_DEFAULT_SIZE("64k")
1043
	1042
1044	1043	MCFG_SOFTWARE_LIST_ADD("disk_list","attache")
1045	1044	MACHINE_CONFIG_END
1046	1045

trunk/src/mess/drivers/samcoupe.c
r23623	r23624
55	55
56	56
57	57	/***************************************************************************
58		TIMERS
	58	TIMERS
59	59	***************************************************************************/
60	60
61	61	void samcoupe_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)

trunk/src/mess/audio/mac.c
r23623	r23624
82	82	{
83	83	INT16 last_val = 0;
84	84	stream_sample_t *buffer = outputs[0];
85
	85
86	86	if ((m_mac_model == MODEL_MAC_PORTABLE) \|\| (m_mac_model == MODEL_MAC_PB100))
87	87	{
88	88	memset(buffer, 0, samples * sizeof(*buffer));
89	89	return;
90	90	}
91
	91
92	92	/* if we're not enabled, just fill with 0 */
93	93	if (machine().sample_rate() == 0)
94	94	{
95	95	memset(buffer, 0, samples * sizeof(*buffer));
96	96	return;
97	97	}
98
	98
99	99	/* fill in the sample */
100	100	while (samples && m_snd_cache_len)
101	101	{
r23623	r23624
105	105	m_snd_cache_len--;
106	106	samples--;
107	107	}
108
	108
109	109	while (samples--)
110	110	{
111	111	/* should never happen */

trunk/src/mess/audio/upd1771.c
r23623	r23624
240	240	const upd1771_interface intf = reinterpret_cast<const upd1771_interface >(static_config());
241	241	if (intf != NULL)
242	242	static_cast<upd1771_interface >(this) = *intf;
243
	243
244	244	// or initialize to defaults if none provided
245	245	else
246	246	{
r23623	r23624
256	256	{
257	257	/* resolve callbacks */
258	258	m_ack_out_func.resolve(m_ack_callback, *this);
259
	259
260	260	m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(upd1771c_device::ack_callback),this));
261
	261
262	262	m_channel = machine().sound().stream_alloc(*this, 0, 1, clock() / 4, this);
263
	263
264	264	save_item(NAME(m_packet));
265	265	save_item(NAME(m_index));
266	266	save_item(NAME(m_expected_bytes));
r23623	r23624
385	385	m_index = 0;
386	386	//logerror( "upd1771_w: ----------------silence state reset\n");
387	387	break;
388
	388
389	389	case 1:
390	390	if (m_index == 10)
391	391	{
392	392	m_state = STATE_NOISE;
393	393	m_index = 0;
394
	394
395	395	m_nw_timbre = (m_packet[1] & 0xe0) >> 5;
396	396	m_nw_period = ((UINT32)m_packet[2] + 1) << 7;
397	397	m_nw_volume = m_packet[3] & 0x1f;
398
	398
399	399	//very long clocked periods.. used for engine drones
400	400	m_n_period[0] = (((UINT32)m_packet[4]) + 1) << 7;
401	401	m_n_period[1] = (((UINT32)m_packet[5]) + 1) << 7;
402	402	m_n_period[2] = (((UINT32)m_packet[6]) + 1) << 7;
403
	403
404	404	m_n_volume[0] = m_packet[7] & 0x1f;
405	405	m_n_volume[1] = m_packet[8] & 0x1f;
406	406	m_n_volume[2] = m_packet[9] & 0x1f;
407
	407
408	408	//logerror( "upd1771_w: ----------------noise state reset\n");
409	409	}
410	410	else
411	411	m_timer->adjust(attotime::from_ticks(512, clock()));
412	412	break;
413
	413
414	414	case 2:
415	415	if (m_index == 4)
416	416	{
r23623	r23624
421	421	//smaller periods dont all equal to 0x20
422	422	if (m_t_period < 0x20)
423	423	m_t_period = 0x20;
424
	424
425	425	m_t_volume = m_packet[3] & 0x1f;
426	426	m_state = STATE_TONE;
427	427	m_index = 0;
428	428	}
429	429	else
430		m_timer->adjust(attotime::from_ticks(512, clock()));
	430	m_timer->adjust(attotime::from_ticks(512, clock()));
431	431	break;
432	432
433	433	case 0x1f:
434	434	//6Khz(ish) DIGI playback
435
	435
436	436	//end capture
437	437	if (m_index >= 2 && m_packet[m_index - 2] == 0xfe && m_packet[m_index - 1] == 0x00)
438	438	{
r23623	r23624
481	481	void upd1771c_device::sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples)
482	482	{
483	483	stream_sample_t *buffer = outputs[0];
484
	484
485	485	switch (m_state)
486	486	{
487	487	case STATE_TONE:
488	488	//logerror( "upd1771_STATE_TONE samps:%d %d %d %d %d %d\n",(int)samples,
489	489	// (int)m_t_timbre,(int)m_t_offset,(int)m_t_volume,(int)m_t_period,(int)m_t_tpos);
490
	490
491	491	while (--samples >= 0)
492	492	{
493	493	buffer++ = (WAVEFORMS[m_t_timbre][m_t_tpos]) m_t_volume * 2;
494
	494
495	495	m_t_ppos++;
496	496	if (m_t_ppos >= m_t_period)
497	497	{
498	498	m_t_tpos++;
499	499	if (m_t_tpos == 32)
500	500	m_t_tpos = m_t_offset;
501
	501
502	502	m_t_ppos = 0;
503	503	}
504	504	}
505	505	break;
506
	506
507	507	case STATE_NOISE:
508	508	while (--samples >= 0)
509	509	{
510	510	*buffer = 0;
511
	511
512	512	//"wavetable-LFSR" component
513	513	int wlfsr_val = ((int)noise_tbl[m_nw_tpos]) - 127;//data too wide
514
	514
515	515	m_nw_ppos++;
516	516	if (m_nw_ppos >= m_nw_period)
517	517	{
r23623	r23624
520	520	m_nw_tpos = 0;
521	521	m_nw_ppos = 0;
522	522	}
523
	523
524	524	//mix in each of the noise's 3 pulse components
525	525	char res[3];
526	526	for (int i = 0; i < 3; ++i)
r23623	r23624
535	535	}
536	536	//not quite, but close.
537	537	*buffer+= (
538		(wlfsr_val * m_nw_volume) \|
539		(res[0] * m_n_volume[0]) \|
540		(res[1] * m_n_volume[1]) \|
541		(res[2] * m_n_volume[2])
542		) ;
543
	538	(wlfsr_val * m_nw_volume) \|
	539	(res[0] * m_n_volume[0]) \|
	540	(res[1] * m_n_volume[1]) \|
	541	(res[2] * m_n_volume[2])
	542	) ;
	543
544	544	buffer++;
545	545	}
546	546	break;
547
	547
548	548	default:
549	549	//fill buffer with silence
550	550	while (--samples >= 0)

trunk/src/mess/audio/mea8000.c
r23623	r23624
130	130	const mea8000_interface intf = reinterpret_cast<const mea8000_interface >(static_config());
131	131	if (intf != NULL)
132	132	static_cast<mea8000_interface >(this) = *intf;
133
	133
134	134	// or initialize to defaults if none provided
135	135	else
136	136	{
r23623	r23624
146	146	m_req_out.resolve(m_req_out_cb, *this);
147	147
148	148	m_dac = machine().device<dac_device>(m_channel);
149
	149
150	150	init_tables();
151
	151
152	152	m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mea8000_device::timer_expire),this));
153	153
154	154	save_item(NAME(m_state));
r23623	r23624
176	176	save_item(NAME(m_last_pitch));
177	177	save_item(NAME(m_pitch));
178	178	save_item(NAME(m_noise));
179		}
	179	}
180	180
181	181	//-------------------------------------------------
182	182	// device_reset - device-specific reset
r23623	r23624
210	210
211	211	void mea8000_device::update_req()
212	212	{
213
214	213	// actually, req pulses less than 3us for each new byte,
215	214	// it goes back up if there space left in the buffer, or stays low if the
216	215	// buffer contains a complete frame and the CPU nees to wait for the next
r23623	r23624
557	556	else
558	557	{
559	558	/* enqueue frame byte */
560		LOG(("$%04x %f: mea8000_w data %02X in frame pos %i\n", machine().firstcpu->pcbase(), machine().time().as_double(),
	559	LOG(("$%04x %f: mea8000_w data %02X in frame pos %i\n", machine().firstcpu->pcbase(), machine().time().as_double(),
561	560	data, m_bufpos));
562	561	m_buf[m_bufpos] = data;
563	562	m_bufpos++;

trunk/src/mess/audio/upd1771.h
r23623	r23624
36	36	DECLARE_READ8_MEMBER( read );
37	37	DECLARE_WRITE8_MEMBER( write );
38	38	WRITE_LINE_MEMBER( pcm_write );
39
	39
40	40	protected:
41	41	// device-level overrides
42	42	virtual void device_config_complete();
r23623	r23624
57	57	UINT8 m_packet[MAX_PACKET_SIZE];
58	58	UINT32 m_index;
59	59	UINT8 m_expected_bytes;
60
	60
61	61	UINT8 m_state;//0:silence, 1 noise, 2 tone
62	62	UINT8 m_pc3;
63
	63
64	64	//tone
65	65	UINT8 m_t_timbre; //[0; 7]
66	66	UINT8 m_t_offset; //[0; 32]
r23623	r23624
68	68	UINT8 m_t_volume; //[0; 31]
69	69	UINT8 m_t_tpos;//timbre pos
70	70	UINT16 m_t_ppos;//period pos
71
	71
72	72	//noise wavetable LFSR
73	73	UINT8 m_nw_timbre; //[0; 7]
74	74	UINT8 m_nw_volume; //[0; 31]
75	75	UINT32 m_nw_period;
76	76	UINT32 m_nw_tpos; //timbre pos
77	77	UINT32 m_nw_ppos; //period pos
78
	78
79	79	//noise pulse components
80	80	UINT8 m_n_value[3]; //[0;1]
81	81	UINT16 m_n_volume[3]; //[0; 31]

trunk/src/mess/audio/dave.c
r23623	r23624
55	55
56	56	dave_device::dave_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
57	57	: device_t(mconfig, DAVE, "DAVE", tag, owner, clock, "dave", __FILE__),
58		device_memory_interface(mconfig, *this),
59		device_sound_interface(mconfig, *this),
60		m_program_space_config("program", ENDIANNESS_LITTLE, 8, 22, 0, *ADDRESS_MAP_NAME(program_map)),
61		m_io_space_config("i/o", ENDIANNESS_LITTLE, 8, 16, 0, *ADDRESS_MAP_NAME(io_map)),
62		m_write_irq(*this),
63		m_write_lh(*this),
64		m_write_rh(*this)
	58	device_memory_interface(mconfig, *this),
	59	device_sound_interface(mconfig, *this),
	60	m_program_space_config("program", ENDIANNESS_LITTLE, 8, 22, 0, *ADDRESS_MAP_NAME(program_map)),
	61	m_io_space_config("i/o", ENDIANNESS_LITTLE, 8, 16, 0, *ADDRESS_MAP_NAME(io_map)),
	62	m_write_irq(*this),
	63	m_write_lh(*this),
	64	m_write_rh(*this)
65	65	{
66	66	}
67	67
r23623	r23624
80	80	// allocate timers
81	81	m_timer_1hz = timer_alloc(TIMER_1HZ);
82	82	m_timer_1hz->adjust(attotime::from_hz(2), 0, attotime::from_hz(2));
83
	83
84	84	m_timer_50hz = timer_alloc(TIMER_50HZ);
85	85	m_timer_50hz->adjust(attotime::from_hz(2000), 0, attotime::from_hz(2000));
86	86
r23623	r23624
101	101	m_count[i] = (STEP * machine().sample_rate()) / 125000;
102	102	m_level[i] = 0;
103	103	}
104
	104
105	105	/* dave has 3 tone channels and 1 noise channel.
106	106	the volumes are mixed internally and output as left and right volume */
107
	107
108	108	/* 3 tone channels + 1 noise channel */
109	109	m_sound_stream_var = machine().sound().stream_alloc(*this, 0, 2, machine().sample_rate(), this);
110	110	}
r23623	r23624
186	186	int output_volumes[8];
187	187	int left_volume;
188	188	int right_volume;
189
	189
190	190	//logerror("sound update!\n");
191
	191
192	192	buffer1 = outputs[0];
193	193	buffer2 = outputs[1];
194
	194
195	195	while (samples)
196	196	{
197	197	int vol[4];
198
	198
199	199	/* vol[] keeps track of how long each square wave stays */
200	200	/* in the 1 position during the sample period. */
201	201	vol[0] = vol[1] = vol[2] = vol[3] = 0;
202
	202
203	203	for (int i = 0; i < 3; i++)
204	204	{
205	205	if ((m_regs[7] & (1 << i))==0)
r23623	r23624
230	230	vol[i] -= m_count[i];
231	231	}
232	232	}
233
	233
234	234	/* update volume outputs */
235
	235
236	236	/* setup output volumes for each channel */
237	237	/* channel 0 */
238	238	output_volumes[0] = ((m_level[0] & m_level_and[0]) \| m_level_or[0]) & m_mame_volumes[0];
r23623	r23624
246	246	/* channel 3 */
247	247	output_volumes[6] = ((m_level[3] & m_level_and[6]) \| m_level_or[6]) & m_mame_volumes[3];
248	248	output_volumes[7] = ((m_level[3] & m_level_and[7]) \| m_level_or[7]) & m_mame_volumes[7];
249
	249
250	250	left_volume = (output_volumes[0] + output_volumes[2] + output_volumes[4] + output_volumes[6])>>2;
251	251	right_volume = (output_volumes[1] + output_volumes[3] + output_volumes[5] + output_volumes[7])>>2;
252
	252
253	253	*(buffer1++) = left_volume;
254	254	*(buffer2++) = right_volume;
255
	255
256	256	samples--;
257	257	}
258	258	}
r23623	r23624
600	600
601	601
602	602	//-------------------------------------------------
603		// update_interrupt -
	603	// update_interrupt -
604	604	//-------------------------------------------------
605	605
606	606	void dave_device::update_interrupt()

trunk/src/mess/audio/mea8000.h
r23623	r23624
52	52	{
53	53	/* output channel */
54	54	const char * m_channel;
55
	55
56	56	/* 1-bit 'ready' output, not negated */
57	57	devcb_write8 m_req_out_cb;
58	58	};
r23623	r23624
105	105
106	106	/* state */
107	107	mea8000_state m_state; /* current state */
108
	108
109	109	UINT8 m_buf[4]; /* store 4 consecutive data to form a frame info */
110	110	UINT8 m_bufpos; /* new byte to write in frame info buffer */
111
	111
112	112	UINT8 m_cont; /* if no data 0=stop 1=repeat last frame */
113	113	UINT8 m_roe; /* enable req output, now unimplemented */
114
	114
115	115	UINT16 m_framelength; /* in samples */
116	116	UINT16 m_framepos; /* in samples */
117	117	UINT16 m_framelog; /* log2 of framelength */
118
	118
119	119	INT16 m_lastsample, m_sample; /* output samples are interpolated */
120
	120
121	121	UINT32 m_phi; /* absolute phase for frequency / noise generator */
122
	122
123	123	filter_t m_f[4]; /* filters */
124
	124
125	125	UINT16 m_last_ampl, m_ampl; /* amplitude * 1000 */
126	126	UINT16 m_last_pitch, m_pitch; /* pitch of sawtooth signal, in Hz */
127	127	UINT8 m_noise;
128
	128
129	129	emu_timer *m_timer;
130
	130
131	131	devcb_resolved_write8 m_req_out;
132	132
133
	133
134	134	int m_cos_table[TABLE_LEN]; /* fm => cos coefficient */
135	135	int m_exp_table[TABLE_LEN]; /* bw => exp coefficient */
136	136	int m_exp2_table[TABLE_LEN]; /* bw => 2exp coefficient /
137	137	int m_noise_table[NOISE_LEN];
138
	138
139	139	};
140	140
141	141	extern const device_type MEA8000;

trunk/src/mess/audio/dave.h
r23623	r23624
27	27	///*************************************************************************
28	28
29	29	#define MCFG_DAVE_ADD(_tag, _clock, _irq, _program_map, _io_map) \
30		MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") \
	30	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") \
31	31	MCFG_SOUND_ADD(_tag, DAVE, _clock) \
32	32	MCFG_SOUND_ROUTE(0, "lspeaker", 0.25) \
33	33	MCFG_SOUND_ROUTE(1, "rspeaker", 0.25) \
34		MCFG_DEVICE_ADDRESS_MAP(AS_PROGRAM, _program_map) \
35		MCFG_DEVICE_ADDRESS_MAP(AS_IO, _io_map) \
	34	MCFG_DEVICE_ADDRESS_MAP(AS_PROGRAM, _program_map) \
	35	MCFG_DEVICE_ADDRESS_MAP(AS_IO, _io_map) \
36	36	downcast<dave_device *>(device)->set_irq_callback(DEVCB2_##_irq);
37	37
38	38
r23623	r23624
89	89
90	90	enum
91	91	{
92		IRQ_50HZ_DIVIDER = 0x01,
93		IRQ_50HZ_LATCH = 0x02,
94		IRQ_1HZ_DIVIDER = 0x04,
95		IRQ_1HZ_LATCH = 0x08,
96		IRQ_INT1 = 0x10,
97		IRQ_INT1_LATCH = 0x20,
98		IRQ_INT2 = 0x40,
99		IRQ_INT2_LATCH = 0x80,
	92	IRQ_50HZ_DIVIDER = 0x01,
	93	IRQ_50HZ_LATCH = 0x02,
	94	IRQ_1HZ_DIVIDER = 0x04,
	95	IRQ_1HZ_LATCH = 0x08,
	96	IRQ_INT1 = 0x10,
	97	IRQ_INT1_LATCH = 0x20,
	98	IRQ_INT2 = 0x40,
	99	IRQ_INT2_LATCH = 0x80,
100	100	IRQ_LATCH = IRQ_INT2_LATCH \| IRQ_INT1_LATCH \| IRQ_1HZ_LATCH \| IRQ_50HZ_LATCH
101	101	};
102	102
r23623	r23624
122	122	int m_period[4];
123	123	int m_count[4];
124	124	int m_level[4];
125
	125
126	126	/* these are used to force channels on/off */
127	127	/* if one of the or values is 0x0ff, this means
128	128	the volume will be forced on,else it is dependant on
r23623	r23624
131	131	/* if one of the values is 0x00, this means the
132	132	volume is forced off, else it is dependant on the wave */
133	133	int m_level_and[8];
134
	134
135	135	/* these are the current channel volumes in MAME form */
136	136	int m_mame_volumes[8];
137
	137
138	138	/* update step */
139	139	//int m_update_step;
140
	140
141	141	sound_stream *m_sound_stream_var;
142	142	};
143	143

trunk/src/mess/machine/upd71071.c
r23623	r23624
100	100	const upd71071_intf intf = reinterpret_cast<const upd71071_intf >(static_config());
101	101	if (intf != NULL)
102	102	static_cast<upd71071_intf >(this) = *intf;
103
	103
104	104	// or initialize to defaults if none provided
105	105	else
106	106	{

trunk/src/mess/machine/sms.c
r23623	r23624
694	694	{
695	695	bool bios_selected = false;
696	696	bool cartridge_selected = false;
697
	697
698	698	m_mapper[offset] = data;
699	699	m_mainram[0x1ffc + offset] = data;
700	700
r23623	r23624
703	703	if (!(m_bios_port & IO_CARTRIDGE) \|\| (m_is_gamegear && m_BIOS == NULL))
704	704	cartridge_selected = true;
705	705	else
706		return; // nothing to page in
	706	return; // nothing to page in
707	707	}
708	708	else
709	709	{
710	710	if (!m_BIOS)
711		return; // nothing to page in
	711	return; // nothing to page in
712	712	bios_selected = true;
713	713	}
714
	714
715	715	switch (offset)
716	716	{
717	717	case 0: // Control RAM/ROM
718		if (!(data & 0x08) && !(m_bios_port & IO_BIOS_ROM) && bios_selected) // BIOS ROM
	718	if (!(data & 0x08) && !(m_bios_port & IO_BIOS_ROM) && bios_selected) // BIOS ROM
719	719	{
720	720	if (!m_has_bios_0400 && !m_has_bios_2000)
721	721	{
r23623	r23624
723	723	m_bios_page[2] = m_mapper[3];
724	724	}
725	725	}
726		else if (cartridge_selected) // CART ROM/RAM
	726	else if (cartridge_selected) // CART ROM/RAM
727	727	{
728	728	m_bank_enabled[2] = ENABLE_CART;
729	729	m_cartslot->write_mapper(space, offset, data);
730	730	}
731	731	break;
732
	732
733	733	case 1: // Select 16k ROM bank for 0400-3fff
734	734	case 2: // Select 16k ROM bank for 4000-7fff
735	735	case 3: // Select 16k ROM bank for 8000-bfff
r23623	r23624
761	761	return m_BIOS[(m_bios_page[3] * 0x4000) + (offset & 0x3fff)];
762	762	}
763	763	if (m_bank_enabled[3] == ENABLE_CART)
764		return m_cartslot->read_cart(space, offset);
	764	return m_cartslot->read_cart(space, offset);
765	765	if (m_card && m_bank_enabled[3] == ENABLE_CARD)
766		return m_card->read_cart(space, offset);
	766	return m_card->read_cart(space, offset);
767	767	}
768	768	else
769	769	{
r23623	r23624
773	773	return m_BIOS[(m_bios_page[0] * 0x4000) + (offset & 0x3fff)];
774	774	}
775	775	if (m_bank_enabled[0] == ENABLE_CART)
776		return m_cartslot->read_cart(space, offset);
	776	return m_cartslot->read_cart(space, offset);
777	777	if (m_card && m_bank_enabled[0] == ENABLE_CARD)
778		return m_card->read_cart(space, offset);
779		}
	778	return m_card->read_cart(space, offset);
	779	}
780	780	return m_region_maincpu->base()[offset];
781	781	}
782	782
r23623	r23624
789	789	}
790	790
791	791	if (m_bank_enabled[1] == ENABLE_CART)
792		return m_cartslot->read_cart(space, offset + 0x4000);
	792	return m_cartslot->read_cart(space, offset + 0x4000);
793	793	if (m_card && m_bank_enabled[1] == ENABLE_CARD)
794		return m_card->read_cart(space, offset + 0x4000);
	794	return m_card->read_cart(space, offset + 0x4000);
795	795
796	796	return m_region_maincpu->base()[offset];
797	797	}
r23623	r23624
805	805	}
806	806
807	807	if (m_bank_enabled[2] == ENABLE_CART)
808		return m_cartslot->read_cart(space, offset + 0x8000);
	808	return m_cartslot->read_cart(space, offset + 0x8000);
809	809	if (m_card && m_bank_enabled[2] == ENABLE_CARD)
810		return m_card->read_cart(space, offset + 0x8000);
	810	return m_card->read_cart(space, offset + 0x8000);
811	811
812	812	return m_region_maincpu->base()[offset];
813	813	}
r23623	r23624
827	827	return m_BIOS[(m_bios_page[3] * 0x4000) + (offset & 0x3fff)];
828	828	}
829	829	if (m_bank_enabled[3] == ENABLE_CART)
830		return m_slots[m_current_cartridge]->read_cart(space, offset);
	830	return m_slots[m_current_cartridge]->read_cart(space, offset);
831	831	if (m_bank_enabled[3] == ENABLE_CARD)
832		return m_cards[m_current_cartridge]->read_cart(space, offset);
	832	return m_cards[m_current_cartridge]->read_cart(space, offset);
833	833	}
834	834	else
835	835	{
r23623	r23624
839	839	return m_BIOS[(m_bios_page[0] * 0x4000) + (offset & 0x3fff)];
840	840	}
841	841	if (m_bank_enabled[0] == ENABLE_CART)
842		return m_slots[m_current_cartridge]->read_cart(space, offset);
	842	return m_slots[m_current_cartridge]->read_cart(space, offset);
843	843	if (m_bank_enabled[0] == ENABLE_CARD)
844		return m_cards[m_current_cartridge]->read_cart(space, offset);
845		}
	844	return m_cards[m_current_cartridge]->read_cart(space, offset);
	845	}
846	846
847	847	return m_region_maincpu->base()[offset];
848	848	}
r23623	r23624
855	855	return m_BIOS[(m_bios_page[1] * 0x4000) + (offset & 0x3fff)];
856	856	}
857	857	if (m_bank_enabled[1] == ENABLE_CART)
858		return m_slots[m_current_cartridge]->read_cart(space, offset + 0x4000);
	858	return m_slots[m_current_cartridge]->read_cart(space, offset + 0x4000);
859	859	if (m_bank_enabled[1] == ENABLE_CARD)
860		return m_cards[m_current_cartridge]->read_cart(space, offset + 0x4000);
861
	860	return m_cards[m_current_cartridge]->read_cart(space, offset + 0x4000);
	861
862	862	return m_region_maincpu->base()[offset];
863	863	}
864	864
r23623	r23624
868	868	{
869	869	if (m_BIOS)
870	870	return m_BIOS[(m_bios_page[2] * 0x4000) + (offset & 0x3fff)];
871		}
	871	}
872	872	if (m_bank_enabled[2] == ENABLE_CART)
873		return m_slots[m_current_cartridge]->read_cart(space, offset + 0x8000);
	873	return m_slots[m_current_cartridge]->read_cart(space, offset + 0x8000);
874	874	if (m_bank_enabled[2] == ENABLE_CARD)
875		return m_cards[m_current_cartridge]->read_cart(space, offset + 0x8000);
876
	875	return m_cards[m_current_cartridge]->read_cart(space, offset + 0x8000);
	876
877	877	return m_region_maincpu->base()[offset];
878	878	}
879	879
r23623	r23624
882	882	// this might only work because we are not emulating properly the cart/card selection system
883	883	// it will have to be reviewed when proper emulation is worked on!
884	884	if (m_bank_enabled[0] == ENABLE_CART)
885		m_slots[m_current_cartridge]->write_cart(space, offset, data);
	885	m_slots[m_current_cartridge]->write_cart(space, offset, data);
886	886	if (m_bank_enabled[0] == ENABLE_CARD)
887		m_cards[m_current_cartridge]->write_cart(space, offset, data);
	887	m_cards[m_current_cartridge]->write_cart(space, offset, data);
888	888	}
889	889
890	890	READ8_MEMBER(smssdisp_state::store_cart_peek)
891	891	{
892	892	if (m_bank_enabled[1] == ENABLE_CART)
893		return m_slots[m_current_cartridge]->read_cart(space, 0x4000 + (offset & 0x1fff));
	893	return m_slots[m_current_cartridge]->read_cart(space, 0x4000 + (offset & 0x1fff));
894	894	if (m_bank_enabled[1] == ENABLE_CARD)
895		return m_cards[m_current_cartridge]->read_cart(space, 0x4000 + (offset & 0x1fff));
896
	895	return m_cards[m_current_cartridge]->read_cart(space, 0x4000 + (offset & 0x1fff));
	896
897	897	return m_region_maincpu->base()[offset];
898	898	}
899	899
r23623	r23624
1055	1055	MACHINE_START_MEMBER(sms_state,sms)
1056	1056	{
1057	1057	char str[7];
1058
	1058
1059	1059	m_rapid_fire_timer = timer_alloc(TIMER_RAPID_FIRE);
1060	1060	m_rapid_fire_timer->adjust(attotime::from_hz(10), 0, attotime::from_hz(10));
1061	1061
r23623	r23624
1132	1132
1133	1133	// a bunch of SG1000 carts (compatible with SG1000 Mark III) can access directly system RAM... let's install here the necessary handlers
1134	1134	// TODO: are BASIC and Music actually compatible with Mark III??
1135		if (m_cartslot->get_type() == SEGA8_BASIC_L3 \|\| m_cartslot->get_type() == SEGA8_MUSIC_EDITOR
	1135	if (m_cartslot->get_type() == SEGA8_BASIC_L3 \|\| m_cartslot->get_type() == SEGA8_MUSIC_EDITOR
1136	1136	\|\| m_cartslot->get_type() == SEGA8_DAHJEE_TYPEA \|\| m_cartslot->get_type() == SEGA8_DAHJEE_TYPEB)
1137	1137	{
1138	1138	m_maincpu->space(AS_PROGRAM).install_read_handler(0xc000, 0xffff, 0, 0, read8_delegate(FUNC(sega8_cart_slot_device::read_ram),(sega8_cart_slot_device*)m_cartslot));
r23623	r23624
1206	1206
1207	1207	logerror("switching in part of %s slot #%d\n", slottype ? "card" : "cartridge", slot );
1208	1208	/* cartridge? slot #0 */
1209		// if (slottype == 0)
1210		// m_current_cartridge = slot;
	1209	// if (slottype == 0)
	1210	// m_current_cartridge = slot;
1211	1211
1212	1212	setup_rom();
1213	1213	}

trunk/src/mess/machine/sns_spc7110.c
r23623	r23624
318	318	+ map(3, 24) + map(2, 16) + map(1, 8) + map(0, 0);
319	319	#undef map
320	320	}
321
	321
322	322	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_decomp_mode);
323	323	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_decomp_offset);
324	324	state_save_register_item_pointer(machine, "SNES_SPC7110", NULL, 0, m_decomp_buffer, SPC7110_DECOMP_BUFFER_SIZE);
r23623	r23624
331	331	state_save_register_item(machine, "SNES_SPC7110", NULL, i, m_context[i].index);
332	332	state_save_register_item(machine, "SNES_SPC7110", NULL, i, m_context[i].invert);
333	333	}
334
	334
335	335	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m0_val);
336	336	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m0_in);
337	337	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m0_span);
r23623	r23624
349	349	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m1_inverts);
350	350	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m1_lps);
351	351	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m1_in_count);
352
	352
353	353	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m2_pixelorder);
354	354	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m2_realorder);
355	355	state_save_register_item(machine, "SNES_SPC7110", NULL, 0, m_m2_bitplanebuffer);
r23623	r23624
455	455	}
456	456
457	457	void SPC7110_Decomp::mode0(UINT8 init, UINT8 *ROM, UINT32 len)
458		{
	458	{
459	459	if (init == 1)
460	460	{
461	461	m_m0_out = m_m0_inverts = m_m0_lps = 0;

trunk/src/mess/machine/sns_spc7110.h
r23623	r23624
36	36	void mode2(UINT8 init, UINT8 *ROM, UINT32 len);
37	37
38	38	private:
39
	39
40	40	UINT8 dataread(UINT8 *ROM, UINT32 len);
41	41	UINT8 probability(UINT32 n);
42	42	UINT8 next_lps(UINT32 n);
r23623	r23624
44	44	UINT8 toggle_invert(UINT32 n);
45	45	UINT32 morton_2x8(UINT32 data);
46	46	UINT32 morton_4x8(UINT32 data);
47
	47
48	48	UINT32 m_decomp_mode;
49	49	UINT32 m_decomp_offset;
50
	50
51	51	UINT8 *m_decomp_buffer;
52	52	UINT32 m_decomp_buffer_rdoffset;
53	53	UINT32 m_decomp_buffer_wroffset;
54	54	UINT32 m_decomp_buffer_length;
55
	55
56	56	struct ContextState
57	57	{
58	58	UINT8 index;
59	59	UINT8 invert;
60	60	} m_context[32];
61
	61
62	62	UINT32 m_morton16[2][256];
63	63	UINT32 m_morton32[4][256];
64	64

trunk/src/mess/machine/softbox.h
r23623	r23624
74	74
75	75
76	76
77		#endif
		No newline at end of file
	77	#endif

trunk/src/mess/machine/concept.c
r23623	r23624
58	58	/* clear keyboard interface state */
59	59	m_KeyQueueHead = m_KeyQueueLen = 0;
60	60	memset(m_KeyStateSave, 0, sizeof(m_KeyStateSave));
61
	61
62	62	m_exp[0] = machine().device<concept_exp_port_device>("exp1");
63	63	m_exp[1] = machine().device<concept_exp_port_device>("exp2");
64	64	m_exp[2] = machine().device<concept_exp_port_device>("exp3");
r23623	r23624
248	248	/* I/O slot regs */
249	249	switch ((offset >> 4) & 7)
250	250	{
251		case 1: // IO1 registers
252		case 2: // IO2 registers
253		case 3: // IO3 registers
254		case 4: // IO4 registers
	251	case 1: // IO1 registers
	252	case 2: // IO2 registers
	253	case 3: // IO3 registers
	254	case 4: // IO4 registers
255	255	return m_exp[((offset >> 4) & 7) - 1]->reg_r(space, offset & 0x0f);
256	256	break;
257	257
r23623	r23624
261	261	}
262	262	break;
263	263
264		case 1: // IO1 ROM
265		case 2: // IO2 ROM
266		case 3: // IO3 ROM
267		case 4: // IO4 ROM
	264	case 1: // IO1 ROM
	265	case 2: // IO2 ROM
	266	case 3: // IO3 ROM
	267	case 4: // IO4 ROM
268	268	LOG(("concept_io_r: Slot ROM memory accessed for slot %d at address 0x03%4.4x\n", ((offset >> 8) & 7) - 1, offset << 1));
269	269	return m_exp[((offset >> 8) & 7) - 1]->rom_r(space, offset & 0xff);
270	270	break;
r23623	r23624
373	373	/* I/O slot regs */
374	374	switch ((offset >> 4) & 7)
375	375	{
376		case 1: // IO1 registers
377		case 2: // IO2 registers
378		case 3: // IO3 registers
379		case 4: // IO4 registers
	376	case 1: // IO1 registers
	377	case 2: // IO2 registers
	378	case 3: // IO3 registers
	379	case 4: // IO4 registers
380	380	return m_exp[((offset >> 4) & 7) - 1]->reg_w(space, offset & 0x0f, data);
381	381	break;
382	382
383		default: // ???
	383	default: // ???
384	384	logerror("concept_io_w: Slot I/O memory written for unknown purpose at address 0x03%4.4x, data: 0x%4.4x\n", offset << 1, data);
385	385	break;
386	386	}
387	387	break;
388	388
389		case 1: // IO1 ROM
390		case 2: // IO2 ROM
391		case 3: // IO3 ROM
392		case 4: // IO4 ROM
	389	case 1: // IO1 ROM
	390	case 2: // IO2 ROM
	391	case 3: // IO3 ROM
	392	case 4: // IO4 ROM
393	393	LOG(("concept_io_w: Slot ROM memory written to for slot %d at address 0x03%4.4x, data: 0x%4.4x\n", ((offset >> 8) & 7) - 1, offset << 1, data));
394	394	return m_exp[((offset >> 8) & 7) - 1]->rom_w(space, offset & 0xff, data);
395	395	break;
r23623	r23624
463	463	break;
464	464	}
465	465	}
466

trunk/src/mess/machine/ep64_exdos.c
r23623	r23624
12	12	Floppy Drive Controller PCB Layout
13	13	----------------------------------
14	14
15		INTELLIGENT SOFTWARE LTD DISK CONTROLLER
	15	INTELLIGENT SOFTWARE LTD DISK CONTROLLER
16	16	ISS1
17	17	\|--------------------------------------------\|
18	18	\| \|
r23623	r23624
54	54	// MACROS/CONSTANTS
55	55	//**************************************************************************
56	56
57		#define WD1770_TAG "u1"
	57	#define WD1770_TAG "u1"
58	58
59	59
60	60
r23623	r23624
180	180	READ8_MEMBER( ep64_exdos_device::read )
181	181	{
182	182	/*
183
	183
184	184	bit description
185
186		0
	185
	186	0
187	187	1 INTRQ
188		2
189		3
190		4
191		5
	188	2
	189	3
	190	4
	191	5
192	192	6 DCHG
193	193	7 DRQ
194
	194
195	195	*/
196	196
197	197	UINT8 data = 0;
r23623	r23624
212	212	WRITE8_MEMBER( ep64_exdos_device::write )
213	213	{
214	214	/*
215
	215
216	216	bit description
217
	217
218	218	0 SELECT 0
219	219	1 SELECT 1
220	220	2 SELECT 2
r23623	r23624
223	223	5 _DDEN
224	224	6 DISK CHANGE RESET
225	225	7 IN USE
226
	226
227	227	*/
228	228
229	229	m_floppy = NULL;

trunk/src/mess/machine/ep64_exdos.h
r23623	r23624
26	26	// ======================> ep64_exdos_device
27	27
28	28	class ep64_exdos_device : public device_t,
29		public device_ep64_expansion_bus_card_interface
	29	public device_ep64_expansion_bus_card_interface
30	30	{
31	31	public:
32	32	// construction/destruction

trunk/src/mess/machine/gba_rom.c
r23623	r23624
1	1	/***********************************************************************************************************
2	2
3
	3
4	4	Game Boy Advance cart emulation
5	5
6	6
7	7	We support carts with several kind of Save RAM (actual SRAM, Flash RAM or EEPROM)
8
9
10	8
	9
	10
11	11	***********************************************************************************************************/
12	12
13	13
r23623	r23624
120	120	{
121	121	astring tempstring;
122	122	m_rom = (UINT32 *)memregion(this->subtag(tempstring, "cartridge"))->base();
123
	123
124	124	// for the moment we use a custom eeprom implementation, so we alloc/save it as nvram
125	125	nvram_alloc(machine(), 0x2000);
126	126	m_eeprom = auto_alloc(machine(), gba_eeprom_device(machine(), (UINT8*)get_nvram_base(), get_nvram_size(), 14));
r23623	r23624
140	140	{
141	141	if (m_nvram && offset < m_nvram_size/4)
142	142	return m_nvram[offset];
143		else // this cannot actually happen...
	143	else // this cannot actually happen...
144	144	return 0xffffffff;
145	145	}
146	146
r23623	r23624
168	168	READ32_MEMBER(gba_rom_flash_device::read_ram)
169	169	{
170	170	UINT32 rv = 0;
171
	171
172	172	offset &= m_flash_mask;
173
174		if (mem_mask & 0xff)
	173
	174	if (mem_mask & 0xff)
175	175	rv \|= m_flash->read(offset * 4);
176		if (mem_mask & 0xff00)
	176	if (mem_mask & 0xff00)
177	177	rv \|= m_flash->read((offset * 4) + 1) << 8;
178		if (mem_mask & 0xff0000)
	178	if (mem_mask & 0xff0000)
179	179	rv \|= m_flash->read((offset * 4) + 2) << 16;
180		if (mem_mask & 0xff000000)
	180	if (mem_mask & 0xff000000)
181	181	rv \|= m_flash->read((offset * 4) + 3) << 24;
182
	182
183	183	return rv;
184	184	}
185	185
186	186	WRITE32_MEMBER(gba_rom_flash_device::write_ram)
187	187	{
188	188	offset &= m_flash_mask;
189
	189
190	190	switch (mem_mask)
191	191	{
192	192	case 0xff:
r23623	r23624
220	220	READ32_MEMBER(gba_rom_flash1m_device::read_ram)
221	221	{
222	222	UINT32 rv = 0;
223
	223
224	224	offset &= m_flash_mask;
225	225
226		if (mem_mask & 0xff)
	226	if (mem_mask & 0xff)
227	227	rv \|= m_flash->read(offset * 4);
228		if (mem_mask & 0xff00)
	228	if (mem_mask & 0xff00)
229	229	rv \|= m_flash->read((offset * 4) + 1) << 8;
230		if (mem_mask & 0xff0000)
	230	if (mem_mask & 0xff0000)
231	231	rv \|= m_flash->read((offset * 4) + 2) << 16;
232		if (mem_mask & 0xff000000)
	232	if (mem_mask & 0xff000000)
233	233	rv \|= m_flash->read((offset * 4) + 3) << 24;
234
	234
235	235	return rv;
236	236	}
237	237
r23623	r23624
262	262
263	263	/*-------------------------------------------------
264	264	Carts with EEPROM
265
266		TODO: can this sketchy EEPROM device be merged
	265
	266	TODO: can this sketchy EEPROM device be merged
267	267	with the core implementation?
268	268	-------------------------------------------------*/
269	269
r23623	r23624
288	288	UINT32 gba_eeprom_device::read()
289	289	{
290	290	UINT32 out;
291
	291
292	292	switch (m_state)
293	293	{
294	294	case EEP_IDLE:
295	295	// printf("eeprom_r: @ %x, mask %08x (state %d) (PC=%x) = %d\n", offset, ~mem_mask, m_state, activecpu_get_pc(), 1);
296	296	return 0x00010001; // "ready"
297
	297
298	298	case EEP_READFIRST:
299	299	m_count--;
300
	300
301	301	if (!m_count)
302	302	{
303	303	m_count = 64;
r23623	r23624
318	318	m_addr++;
319	319	m_bits = 8;
320	320	}
321
	321
322	322	out = (m_eep_data & 0x80) ? 1 : 0;
323	323	out \|= (out<<16);
324	324	m_eep_data <<= 1;
325
	325
326	326	m_bits--;
327	327	m_count--;
328
	328
329	329	if (!m_count)
330	330	{
331	331	m_state = EEP_IDLE;
332	332	}
333
	333
334	334	// printf("out = %08x\n", out);
335	335	// printf("eeprom_r: @ %x, mask %08x (state %d) (PC=%x) = %08x\n", offset, ~mem_mask, m_state, activecpu_get_pc(), out);
336	336	return out;
r23623	r23624
348	348	if (data == 1)
349	349	m_state++;
350	350	break;
351
	351
352	352	case EEP_COMMAND:
353	353	if (data == 1)
354	354	m_command = EEP_READFIRST;
r23623	r23624
358	358	m_count = m_addr_bits;
359	359	m_addr = 0;
360	360	break;
361
	361
362	362	case EEP_ADDR:
363	363	m_addr <<= 1;
364	364	m_addr \|= (data & 1);
r23623	r23624
377	377	}
378	378	}
379	379	break;
380
	380
381	381	case EEP_AFTERADDR:
382	382	m_state = m_command;
383	383	m_count = 64;
r23623	r23624
386	386	if (m_state == EEP_READFIRST)
387	387	m_count = 4;
388	388	break;
389
	389
390	390	case EEP_WRITE:
391	391	m_eep_data <<= 1;
392	392	m_eep_data \|= (data & 1);
393	393	m_bits--;
394	394	m_count--;
395
	395
396	396	if (m_bits == 0)
397	397	{
398	398	mame_printf_verbose("%08x: EEPROM: %02x to %x\n", machine().device("maincpu")->safe_pc(), m_eep_data, m_addr);
r23623	r23624
404	404	m_eep_data = 0;
405	405	m_bits = 8;
406	406	}
407
	407
408	408	if (!m_count)
409	409	m_state = EEP_AFTERWRITE;
410	410	break;
411
	411
412	412	case EEP_AFTERWRITE:
413	413	m_state = EEP_IDLE;
414	414	break;
r23623	r23624
434	434
435	435	if (~mem_mask == 0x0000ffff)
436	436	data >>= 16;
437
	437
438	438	m_eeprom->write(data);
439	439	}
440	440
r23623	r23624
443	443	// Larger games have smaller access to EERPOM content
444	444	if (m_rom_size > (16 * 1024 * 1024) && offset < 0xffff00/4)
445	445	return 0xffffffff;
446
	446
447	447	return m_eeprom->read();
448	448	}
449	449
r23623	r23624
452	452	// Larger games have smaller access to EEPROM content
453	453	if (m_rom_size > (16 * 1024 * 1024) && offset < 0xffff00/4)
454	454	return;
455
	455
456	456	if (~mem_mask == 0x0000ffff)
457	457	data >>= 16;
458
	458
459	459	m_eeprom->write(data);
460	460	}
461

trunk/src/mess/machine/gba_rom.h
r23623	r23624
19	19	virtual void device_start();
20	20	virtual const rom_entry *device_rom_region() const;
21	21	virtual void device_reset();
22
	22
23	23	// reading and writing
24	24	virtual DECLARE_READ32_MEMBER(read_rom) { return m_rom[offset]; }
25	25	};
r23623	r23624
31	31	public:
32	32	// construction/destruction
33	33	gba_rom_sram_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
34
	34
35	35	// reading and writing
36	36	virtual DECLARE_READ32_MEMBER(read_ram);
37	37	virtual DECLARE_WRITE32_MEMBER(write_ram);
r23623	r23624
44	44	public:
45	45	// construction/destruction
46	46	gba_rom_flash_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
47
	47
48	48	// device-level overrides
49	49	virtual machine_config_constructor device_mconfig_additions() const;
50	50	virtual void device_reset();
51
	51
52	52	// reading and writing
53	53	virtual DECLARE_READ32_MEMBER(read_ram);
54	54	virtual DECLARE_WRITE32_MEMBER(write_ram);
r23623	r23624
66	66	public:
67	67	// construction/destruction
68	68	gba_rom_flash1m_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
69
	69
70	70	// device-level overrides
71	71	virtual machine_config_constructor device_mconfig_additions() const;
72	72	virtual void device_reset();
73
	73
74	74	// reading and writing
75	75	virtual DECLARE_READ32_MEMBER(read_ram);
76	76	virtual DECLARE_WRITE32_MEMBER(write_ram);
77
	77
78	78	private:
79	79	//UINT32 m_flash_size;
80	80	UINT32 m_flash_mask;
r23623	r23624
115	115	int m_bits;
116	116	int m_addr_bits;
117	117	UINT8 m_eep_data;
118
	118
119	119	running_machine& m_machine;
120	120	};
121	121
r23623	r23624
127	127	public:
128	128	// construction/destruction
129	129	gba_rom_eeprom_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
130
	130
131	131	// device-level overrides
132	132	virtual void device_start();
133
	133
134	134	// reading and writing
135	135	virtual DECLARE_READ32_MEMBER(read_ram);
136	136	virtual DECLARE_WRITE32_MEMBER(write_ram);
r23623	r23624
147	147	public:
148	148	// construction/destruction
149	149	gba_rom_eeprom64_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
150
	150
151	151	// device-level overrides
152	152	virtual void device_start();
153
	153
154	154	// reading and writing
155	155	virtual DECLARE_READ32_MEMBER(read_ram);
156	156	virtual DECLARE_WRITE32_MEMBER(write_ram);
157
	157
158	158	private:
159	159	gba_eeprom_device *m_eeprom;
160	160	};

trunk/src/mess/machine/sns_sa1.c
r23623	r23624
53	53
54	54	void sns_sa1_device::device_start()
55	55	{
56
57	56	}
58	57
59	58	void sns_sa1_device::device_reset()
r23623	r23624
78	77	m_bwram_sa1 = 0;
79	78	m_bwram_sa1_source = 0;
80	79	m_bwram_sa1_format = 0;
81		m_bwram_write_snes = 1;
	80	m_bwram_write_snes = 1;
82	81	m_bwram_write_sa1 = 1;
83	82	m_bwpa_sa1 = 0x0f;
84	83	m_iram_write_snes = 1;
r23623	r23624
220	219	UINT32 data = (var_length_read(space, m_vda + 0) << 0) \| (var_length_read(space, m_vda + 1) << 8)
221	220	\| (var_length_read(space, m_vda + 2) << 16);
222	221	data >>= m_vbit;
223
224		if (m_drm == 1)
	222
	223	if (m_drm == 1)
225	224	{
226	225	//auto-increment mode
227	226	m_vbit += m_vlen;
228	227	m_vda += (m_vbit >> 3);
229	228	m_vbit &= 7;
230	229	}
231
	230
232	231	value = (data >> 8) & 0xff;
233	232	}
234	233	break;
r23623	r23624
255	254	// reset sa-1?
256	255	}
257	256	m_sa1_ctrl = data;
258
	257
259	258	if (BIT(m_sa1_ctrl, 7))
260	259	{
261	260	// IRQ

trunk/src/mess/machine/sega8_slot.c
r23623	r23624
1	1	/***********************************************************************************************************
2
3
	2
	3
4	4	Sega 8-bit cart emulation
5	5	(through slot devices)
6	6
7	7	Master System (Mark III) and Game Gear memory map can access 3 x 16K banks of ROM in
8		0x0000-0xbfff memory range. These banks can however point to different ROM or RAM area
	8	0x0000-0xbfff memory range. These banks can however point to different ROM or RAM area
9	9	of the cart (or to BIOS banks, but these are handled directly in SMS emulation).
10
	10
11	11	Hence, carts can interface with the main system through the following handlers
12	12	* read_cart : to read from ROM/RAM in memory range [0000-bfff]
13	13	* write_cart : to write to ROM/RAM in memory range [0000-bfff]
r23623	r23624
17	17	Note about Sega Card / MyCard: the data contained in these matches the data in carts, it's only
18	18	the connector to be different. We emulate this with a variant of the slot having different media
19	19	switch and different interface (the latter not implemented yet)
20
	20
21	21	TODO:
22	22	- investigate SG-1000 carts so to reduce duplicated code and to add full .sg support to sg1000m3
23
	23
24	24	***********************************************************************************************************/
25	25
26	26
r23623	r23624
81	81	m_rom = auto_alloc_array_clear(machine, UINT8, size);
82	82	m_rom_size = size;
83	83	m_rom_page_count = size / 0x4000;
84		if (!m_rom_page_count)
85		m_rom_page_count = 1; // we compute rom pages through (XXX % m_rom_page_count)!
	84	if (!m_rom_page_count)
	85	m_rom_page_count = 1; // we compute rom pages through (XXX % m_rom_page_count)!
86	86	late_bank_setup();
87	87	}
88	88	}
r23623	r23624
221	221	int sega8_cart_slot_device::verify_cart( UINT8 *magic, int size )
222	222	{
223	223	int retval = IMAGE_VERIFY_FAIL;
224
	224
225	225	// Verify the file is a valid image - check $7ff0 for "TMR SEGA"
226	226	if (size >= 0x8000)
227	227	{
228	228	if (!strncmp((char*)&magic[0x7ff0], "TMR SEGA", 8))
229		retval = IMAGE_VERIFY_PASS;
	229	retval = IMAGE_VERIFY_PASS;
230	230	}
231
	231
232	232	return retval;
233	233	}
234	234
r23623	r23624
256	256	{
257	257	if (!memcmp(&rom[0x7ff0], signatures[0], 16) \|\| !memcmp(&rom[0x7ff0], signatures[1], 16))
258	258	xoff = 41;
259
	259
260	260	if (!memcmp(&rom[0x7ff0], signatures[2], 16))
261	261	xoff = 50;
262
	262
263	263	if (!memcmp(&rom[0x7ff0], signatures[3], 16))
264	264	xoff = 48;
265
	265
266	266	if (!memcmp(&rom[0x7ff0], signatures[4], 16))
267	267	xoff = 45;
268
	268
269	269	if (!memcmp(&rom[0x7ff0], signatures[5], 16))
270	270	xoff = 54;
271
	271
272	272	}
273	273
274	274	m_cart->set_lphaser_xoffs(xoff);
r23623	r23624
313	313	// Codemasters cart can have 64KB of RAM (Ernie Els Golf? or 8KB?) and no battery
314	314	m_cart->ram_alloc(machine(), 0x10000);
315	315	m_cart->set_has_battery(FALSE);
316		}
	316	}
317	317	else
318	318	{
319		// for generic carts loaded from fullpath we have no way to know exactly if there was RAM,
320		// how much RAM was in the cart and if there was a battery so we always alloc 32KB and
	319	// for generic carts loaded from fullpath we have no way to know exactly if there was RAM,
	320	// how much RAM was in the cart and if there was a battery so we always alloc 32KB and
321	321	// we save its content only if the game enable the RAM
322	322	m_cart->set_late_battery(TRUE);
323	323	m_cart->ram_alloc(machine(), 0x08000);
r23623	r23624
328	328	// from softlist we rely on the xml to only allocate the correct amount of RAM and to save it only if a battery was present
329	329	const char *battery = get_feature("battery");
330	330	m_cart->set_late_battery(FALSE);
331
	331
332	332	if (get_software_region_length("ram"))
333	333	m_cart->ram_alloc(machine(), get_software_region_length("ram"));
334	334
335	335	if (battery && !strcmp(battery, "yes"))
336	336	m_cart->set_has_battery(TRUE);
337		}
	337	}
338	338	}
339	339
340	340	bool sega8_cart_slot_device::call_load()
r23623	r23624
350	350	seterror(IMAGE_ERROR_UNSPECIFIED, "Attempted loading a card larger than 32KB");
351	351	return IMAGE_INIT_FAIL;
352	352	}
353
	353
354	354	// check for header
355	355	if ((len % 0x4000) == 512)
356	356	{
357	357	offset = 512;
358	358	len -= 512;
359	359	}
360
	360
361	361	// make sure that we only get complete (0x4000) rom banks
362	362	if (len & 0x3fff)
363	363	len = ((len >> 14) + 1) << 14;
364
	364
365	365	m_cart->rom_alloc(machine(), len);
366	366	ROM = m_cart->get_rom_base();
367
	367
368	368	if (software_entry() == NULL)
369	369	{
370	370	fseek(offset, SEEK_SET);
r23623	r23624
372	372	}
373	373	else
374	374	memcpy(ROM, get_software_region("rom") + offset, len);
375
	375
376	376	/* check the image */
377	377	if (verify_cart(ROM, len) == IMAGE_VERIFY_FAIL)
378	378	logerror("Warning loading image: verify_cart failed\n");
r23623	r23624
381	381	m_type = sega8_get_pcb_id(get_feature("slot") ? get_feature("slot") : "rom");
382	382	else
383	383	m_type = get_cart_type(ROM, len);
384
	384
385	385	set_lphaser_xoffset(ROM, len);
386	386
387	387	setup_ram();
388
	388
389	389	// Check for gamegear cartridges with PIN 42 set to SMS mode
390	390	if (software_entry() != NULL)
391	391	{
r23623	r23624
398	398	// we attempt to load a battery because the game might have it!
399	399	if (m_cart->get_ram_size() && (m_cart->get_has_battery() \|\| m_cart->get_late_battery()))
400	400	battery_load(m_cart->get_ram_base(), m_cart->get_ram_size(), 0x00);
401
	401
402	402	//printf("Type: %s\n", sega8_get_slot(type));
403
	403
404	404	internal_header_logging(ROM + offset, len, m_cart->get_ram_size());
405
	405
406	406	return IMAGE_INIT_PASS;
407	407	}
408	408
r23623	r23624
452	452	- gamegear Pete Sampras Tennis
453	453	- gamegear S.S. Lucifer
454	454	- 95 - gamegear Micro Machines 2 - Turbo Tournament
455
	455
456	456	The Korean game Jang Pung II also seems to use a codemasters style mapper.
457	457	*/
458	458	int sms_state::detect_codemasters_mapper( UINT8 *rom )
459	459	{
460	460	static const UINT8 jang_pung2[16] = { 0x00, 0xba, 0x38, 0x0d, 0x00, 0xb8, 0x38, 0x0c, 0x00, 0xb6, 0x38, 0x0b, 0x00, 0xb4, 0x38, 0x0a };
461
	461
462	462	if (((rom[0x7fe0] & 0x0f ) <= 9) && (rom[0x7fe3] == 0x93 \|\| rom[0x7fe3] == 0x94 \|\| rom[0x7fe3] == 0x95) && rom[0x7fef] == 0x00)
463	463	return 1;
464
	464
465	465	if (!memcmp(&rom[0x7ff0], jang_pung2, 16))
466	466	return 1;
467
	467
468	468	return 0;
469	469	}
470	470
r23623	r23624
477	477	{ 0x41, 0x48, 0x37, 0x37, 0x44, 0x37, 0x4e, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x20 }, /* Sangokushi 3 */
478	478	};
479	479	int i;
480
	480
481	481	for (i = 0; i < 2; i++)
482	482	{
483	483	if (!memcmp(&rom[0x7ff0], signatures[i], 16))
r23623	r23624
518	518	{ i += 2; _6000++; continue; }
519	519	}
520	520	}
521
	521
522	522	LOG(("Mapper test: _0002 = %d, _8000 = %d, _a000 = %d, _ffff = %d\n", _0002, _8000, _a000, _ffff));
523
	523
524	524	// 2 is a security measure, although tests on existing ROM showed it was not needed
525	525	if (_0002 > _ffff + 2 \|\| (_0002 > 0 && _ffff == 0))
526	526	{
r23623	r23624
545	545	if (len >= 0x8000)
546	546	{
547	547	int x2000_3000 = 0, xd000_e000_f000 = 0, x2000_ff = 0;
548
	548
549	549	for (int i = 0; i < 0x8000; i++)
550	550	{
551	551	if (ROM[i] == 0x32)
552	552	{
553	553	UINT16 addr = ROM[i + 1] \| (ROM[i + 2] << 8);
554
	554
555	555	switch (addr & 0xf000)
556	556	{
557	557	case 0x2000:
r23623	r23624
559	559	i += 2;
560	560	x2000_3000++;
561	561	break;
562
	562
563	563	case 0xd000:
564	564	case 0xe000:
565	565	case 0xf000:
r23623	r23624
582	582	type = SEGA8_DAHJEE_TYPEA;
583	583	}
584	584	}
585
	585
586	586	// Terebi Oekaki (TV Draw)
587	587	if (!strncmp((const char *)&ROM[0x13b3], "annakmn", 7))
588	588	type = SEGA8_TEREBIOEKAKI;
r23623	r23624
590	590	// The Castle (ROM+RAM)
591	591	if (!strncmp((const char *)&ROM[0x1cc3], "ASCII 1986", 10))
592	592	type = SEGA8_CASTLE;
593
	593
594	594	// BASIC Level 3
595	595	if (!strncmp((const char *)&ROM[0x6a20], "SC-3000 BASIC Level 3 ver 1.0", 29))
596	596	type = SEGA8_BASIC_L3;
597
	597
598	598	// Music Editor
599	599	if (!strncmp((const char )&ROM[0x0841], "PIANO", 5) \|\| !strncmp((const char )&ROM[0x0841], "music", 5))
600	600	type = SEGA8_MUSIC_EDITOR;
601
602
	601
	602
603	603	return type;
604	604	}
605	605	/*-------------------------------------------------
r23623	r23624
724	724	0x10000,
725	725	0x20000,
726	726	};
727
	727
728	728	char reserved[10];
729	729	UINT8 version, csum_size, region, serial[3];
730	730	UINT16 checksum, csum = 0;
731	731	UINT32 csum_end = 0;
732
	732
733	733	// LOG FILE DETAILS
734	734	logerror("FILE DETAILS\n" );
735	735	logerror("============\n" );
r23623	r23624
741	741	if (nvram_len)
742	742	logerror("RAM (Allocated) Size: 0x%X - Battery: %s\n", nvram_len, m_cart->get_has_battery() ? "Yes" : "No");
743	743	logerror("\n" );
744
745
	744
	745
746	746	// LOG HEADER DETAILS
747	747	if (len < 0x8000)
748	748	return;
749	749
750	750	for (int i = 0; i < 10; i++)
751	751	reserved[i] = ROM[0x7ff0 + i];
752
	752
753	753	checksum = ROM[0x7ffa] \| (ROM[0x7ffb] << 8);
754
	754
755	755	for (int i = 0; i < 3; i++)
756	756	serial[i] = ROM[0x7ffc + i];
757	757	serial[2] &= 0x0f;
758
	758
759	759	version = (ROM[0x7ffe] & 0xf0) >> 4;
760
	760
761	761	csum_size = ROM[0x7fff] & 0x0f;
762	762	csum_end = csum_length[csum_size];
763	763	if (!csum_end \|\| csum_end > len)
764	764	csum_end = len;
765
	765
766	766	region = (ROM[0x7fff] & 0xf0) >> 4;
767
	767
768	768	// compute cart checksum to compare with expected one
769	769	for (int i = 0; i < csum_end; i++)
770	770	{
r23623	r23624
772	772	{
773	773	csum += ROM[i];
774	774	csum &= 0xffff;
775		}
	775	}
776	776	}
777
	777
778	778	logerror("INTERNAL HEADER\n" );
779	779	logerror("===============\n" );
780	780	logerror("Reserved String: %.10s\n", reserved);
r23623	r23624
785	785	logerror("Software Revision: %x\n", version);
786	786	logerror("\n" );
787	787
788
	788
789	789	if (m_type == SEGA8_CODEMASTERS)
790	790	{
791	791	UINT8 day, month, year, hour, minute;
792	792	csum = 0;
793
	793
794	794	day = ROM[0x7fe1];
795	795	month = ROM[0x7fe2];
796	796	year = ROM[0x7fe3];
r23623	r23624
808	808	csum &= 0xffff;
809	809	}
810	810	}
811
	811
812	812	logerror("CODEMASTERS HEADER\n" );
813	813	logerror("==================\n" );
814	814	logerror("Build date & time: %x/%x/%x %.2x:%.2x\n", day, month, year, hour, minute);

trunk/src/mess/machine/pce_slot.c
r23623	r23624
96	96	// setup the rom_bank_map array to faster ROM read
97	97	for (i = 0; i < size / 0x20000 && i < 8; i++)
98	98	rom_bank_map[i] = i;
99
	99
100	100	// fill up remaining blocks with mirrors
101	101	while (i % 8)
102	102	{
r23623	r23624
110	110	}
111	111	}
112	112	// check bank map!
113		// for (i = 0; i < 8; i++)
114		// {
115		// printf("bank %3d = %3d\t", i, rom_bank_map[i]);
116		// }
	113	// for (i = 0; i < 8; i++)
	114	// {
	115	// printf("bank %3d = %3d\t", i, rom_bank_map[i]);
	116	// }
117	117	}
118	118
119	119
r23623	r23624
218	218	UINT32 offset = 0;
219	219	UINT32 len = (software_entry() == NULL) ? length() : get_software_region_length("rom");
220	220	UINT8 *ROM;
221
	221
222	222	// From fullpath, check for presence of a header and skip it
223	223	if (software_entry() == NULL && (len % 0x4000) == 512)
224	224	{
r23623	r23624
227	227	len -= offset;
228	228	fseek(offset, SEEK_SET);
229	229	}
230
	230
231	231	m_cart->rom_alloc(machine(), len);
232	232	ROM = m_cart->get_rom_base();
233	233
r23623	r23624
240	240	if (ROM[0x1fff] < 0xe0)
241	241	{
242	242	UINT8 decrypted[256];
243
	243
244	244	/* Initialize decryption table */
245	245	for (int i = 0; i < 256; i++)
246	246	decrypted[i] = ((i & 0x01) << 7) \| ((i & 0x02) << 5) \| ((i & 0x04) << 3) \| ((i & 0x08) << 1) \| ((i & 0x10) >> 1) \| ((i & 0x20 ) >> 3) \| ((i & 0x40) >> 5) \| ((i & 0x80) >> 7);
247
	247
248	248	/* Decrypt ROM image */
249	249	for (int i = 0; i < len; i++)
250	250	ROM[i] = decrypted[ROM[i]];
r23623	r23624
253	253	m_cart->rom_map_setup(len);
254	254
255	255	if (software_entry() == NULL)
256		m_type = get_cart_type(ROM, len);
	256	m_type = get_cart_type(ROM, len);
257	257	else
258	258	{
259	259	const char *pcb_name = get_feature("slot");
260	260	if (pcb_name)
261	261	m_type = pce_get_pcb_id(pcb_name);
262		}
	262	}
263	263	//printf("Type: %s\n", pce_get_slot(m_type));
264	264
265	265	if (m_type == PCE_POPULOUS)
r23623	r23624
296	296
297	297
298	298	/*-------------------------------------------------
299		get_cart_type - code to detect NVRAM type from
	299	get_cart_type - code to detect NVRAM type from
300	300	fullpath
301	301	-------------------------------------------------*/
302	302
r23623	r23624
307	307	/* Check for Street fighter 2 */
308	308	if (len == 0x280000)
309	309	type = PCE_SF2;
310
	310
311	311	/* Check for Populous */
312	312	if (len >= 0x1f26 + 8 && !memcmp(ROM + 0x1f26, "POPULOUS", 8))
313	313	type = PCE_POPULOUS;
314
	314
315	315	// Check for CD system card v3 which adds on-cart RAM to the system
316	316	if (!memcmp(ROM + 0x3FFB6, "PC Engine CD-ROM SYSTEM", 23))
317	317	{
r23623	r23624
382	382	void pce_cart_slot_device::internal_header_logging(UINT8 *ROM, UINT32 len)
383	383	{
384	384	}
385

trunk/src/mess/machine/sega8_slot.h
r23623	r23624
48	48	// a few carts (for SG1000) acts as a RAM expansion, taking control of the system RAM in 0xc000-0xffff
49	49	virtual DECLARE_READ8_MEMBER(read_ram) { return 0xff; }
50	50	virtual DECLARE_WRITE8_MEMBER(write_ram) {}
51
	51
52	52	void rom_alloc(running_machine &machine, UINT32 size);
53	53	void ram_alloc(running_machine &machine, UINT32 size);
54
	54
55	55	virtual void late_bank_setup() {}
56
	56
57	57	void set_has_battery(bool val) { has_battery = val; }
58	58	bool get_has_battery() { return has_battery; }
59	59	void set_late_battery(bool val) { m_late_battery_enable = val; }
r23623	r23624
62	62	int get_lphaser_xoffs() { return m_lphaser_xoffs; }
63	63	void set_sms_mode(int val) { m_sms_mode = val; }
64	64	int get_sms_mode() { return m_sms_mode; }
65
	65
66	66	//protected:
67	67	UINT8* get_rom_base() { return m_rom; }
68	68	UINT8* get_ram_base() { return m_ram; }
r23623	r23624
81	81	int m_rom_page_count;
82	82
83	83	bool has_battery;
84
85		// we use this variable for fullpath loading only: in this case, RAM is always allocated,
	84
	85	// we use this variable for fullpath loading only: in this case, RAM is always allocated,
86	86	// but we set has_battery only if RAM is actually enabled during game...
87		bool m_late_battery_enable;
	87	bool m_late_battery_enable;
88	88
89	89	int m_lphaser_xoffs;
90	90	int m_sms_mode;
r23623	r23624
218	218	MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
219	219	static_cast<sega8_card_slot_device *>(device)->set_mandatory(FALSE); \
220	220	static_cast<sega8_card_slot_device *>(device)->set_intf("sms_card"); \
221		static_cast<sega8_card_slot_device *>(device)->set_ext("bin"); \
222
	221	static_cast<sega8_card_slot_device *>(device)->set_ext("bin");
223	222	#define MCFG_SG1000_CARD_ADD(_tag,_slot_intf,_def_slot) \
224	223	MCFG_DEVICE_ADD(_tag, SEGA8_CARD_SLOT, 0) \
225	224	MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
226	225	static_cast<sega8_card_slot_device *>(device)->set_intf("sg1000_cart"); \
227		static_cast<sega8_card_slot_device *>(device)->set_ext("bin,sg"); \
	226	static_cast<sega8_card_slot_device *>(device)->set_ext("bin,sg");
228	227
229	228
230
231	229	#endif

trunk/src/mess/machine/pce_slot.h
r23623	r23624
44	44	UINT32 m_ram_size;
45	45
46	46	void rom_map_setup(UINT32 size);
47
	47
48	48	UINT8 rom_bank_map[8]; // 128K chunks of rom
49	49	};
50	50

trunk/src/mess/machine/ep64exp.h
r23623	r23624
57	57	// MACROS / CONSTANTS
58	58	//**************************************************************************
59	59
60		#define EP64_EXPANSION_BUS_TAG "exp"
	60	#define EP64_EXPANSION_BUS_TAG "exp"
61	61
62	62
63	63
r23623	r23624
86	86	class device_ep64_expansion_bus_card_interface;
87	87
88	88	class ep64_expansion_bus_slot_device : public device_t,
89		public device_slot_interface
	89	public device_slot_interface
90	90	{
91	91	friend class device_ep64_expansion_bus_card_interface;
92	92

trunk/src/mess/machine/abc99.c
r23623	r23624
153	153	//-------------------------------------------------
154	154
155	155	static ADDRESS_MAP_START( abc99_z5_io, AS_IO, 8, abc99_device )
156		/* AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(z5_p1_r)
157		AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(z5_p2_w)
158		AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_WRITENOP // Z2 CLK
159		AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(z5_t1_r)*/
	156	/* AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(z5_p1_r)
	157	AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(z5_p2_w)
	158	AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_WRITENOP // Z2 CLK
	159	AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(z5_t1_r)*/
160	160	ADDRESS_MAP_END
161	161
162	162

trunk/src/mess/machine/abc99.h
r23623	r23624
64	64	TIMER_SERIAL,
65	65	TIMER_MOUSE
66	66	};
67
	67
68	68	enum
69	69	{
70	70	LED_1 = 0,

trunk/src/mess/machine/pce_rom.c
r23623	r23624
1	1	/***********************************************************************************************************
2	2
3
	3
4	4	PC-Engine & Turbografx-16 cart emulation
5
6	5
	6
7	7	***********************************************************************************************************/
8	8
9	9
r23623	r23624
98	98	int bank = offset / 0x20000;
99	99	if (m_ram && offset >= 0x80000 && offset < 0x88000)
100	100	return m_ram[offset];
101
	101
102	102	return m_rom[rom_bank_map[bank] * 0x20000 + (offset & 0x1ffff)];
103	103	}
104	104
r23623	r23624
122	122	if (offset >= 0x1ff0 && offset < 0x1ff4)
123	123	m_bank_base = offset & 3;
124	124	}
125

trunk/src/mess/machine/sega8_rom.c
r23623	r23624
1	1	/***********************************************************************************************************
2	2
3	3	Sega 8-bit cart emulation (for Master System, GameGear and SG-1000)
4
	4
5	5	TODO: implement proper ROM & RAM mirroring when the cart size is not a power of 2K (e.g. 24K or 48K)
6	6
7	7	***********************************************************************************************************/
r23623	r23624
318	318	-------------------------------------------------*/
319	319
320	320	/*-------------------------------------------------
321
	321
322	322	Base Sega 8bit carts, possibly with bankswitch
323	323	(only used by Mark III, SMS and GG games)
324
	324
325	325	-------------------------------------------------*/
326	326
327	327	READ8_MEMBER(sega8_rom_device::read_cart)
328	328	{
329	329	int bank = offset / 0x4000;
330
	330
331	331	if (bank == 2 && m_ram && m_ram_enabled)
332	332	return m_ram[(m_ram_base * 0x4000 + (offset & 0x3fff)) % m_ram_size];
333	333
334		if (offset < 0x400) // first 1k is hardcoded
	334	if (offset < 0x400) // first 1k is hardcoded
335	335	return m_rom[offset];
336	336
337	337	return m_rom[m_rom_bank_base[bank] * 0x4000 + (offset & 0x3fff)];
r23623	r23624
340	340	WRITE8_MEMBER(sega8_rom_device::write_cart)
341	341	{
342	342	int bank = offset / 0x4000;
343
	343
344	344	if (bank == 2 && m_ram && m_ram_enabled)
345	345	m_ram[(m_ram_base * 0x4000 + (offset & 0x3fff)) % m_ram_size] = data;
346	346	}
r23623	r23624
362	362	else
363	363	m_ram_enabled = 0;
364	364	break;
365
	365
366	366	case 1: // Select 16k ROM bank for 0000-3fff
367	367	case 2: // Select 16k ROM bank for 4000-7fff
368	368	case 3: // Select 16k ROM bank for 8000-bfff
369	369	m_rom_bank_base[offset - 1] = data % m_rom_page_count;
370	370	break;
371		}
	371	}
372	372	}
373	373
374	374
375	375	/*-------------------------------------------------
376
377		Sega Card Catcher is a passthrough adapter for
378		SG-1000 to load games in MyCard format into the
	376
	377	Sega Card Catcher is a passthrough adapter for
	378	SG-1000 to load games in MyCard format into the
379	379	main cartslot
380
	380
381	381	-------------------------------------------------*/
382	382
383	383	READ8_MEMBER(sega8_cardcatch_device::read_cart)
384	384	{
385	385	if (offset < 0x8000)
386	386	return m_card->read_cart(space, offset);
387
	387
388	388	return 0xff;
389	389	}
390	390
r23623	r23624
409	409	}
410	410
411	411	/*-------------------------------------------------
412
413		Othello is a SG-1000 game featuring 2K of
	412
	413	Othello is a SG-1000 game featuring 2K of
414	414	oncart RAM, mapped at 0x8000-0x9fff.
415	415	Is RAM mirrored? For now we assume so...
416
	416
417	417	-------------------------------------------------*/
418	418
419	419	READ8_MEMBER(sega8_othello_device::read_cart)
r23623	r23624
421	421	// 8K of RAM sits in 0x8000-0x9fff
422	422	if (offset >= 0x8000 && offset < 0xa000)
423	423	return m_ram[offset & 0x7ff];
424
	424
425	425	return m_rom[offset % m_rom_size];
426	426	}
427	427
r23623	r23624
434	434
435	435
436	436	/*-------------------------------------------------
437
438		The Castle is a SG-1000 game featuring 8K of
	437
	438	The Castle is a SG-1000 game featuring 8K of
439	439	oncart RAM, mapped at 0x8000-0x9fff
440
	440
441	441	-------------------------------------------------*/
442	442
443	443	READ8_MEMBER(sega8_castle_device::read_cart)
r23623	r23624
445	445	// 8K of RAM sits in 0x8000-0x9fff
446	446	if (offset >= 0x8000 && offset < 0xa000)
447	447	return m_ram[offset & 0x1fff];
448
	448
449	449	return m_rom[offset % m_rom_size];
450	450	}
451	451
r23623	r23624
458	458
459	459
460	460	/*-------------------------------------------------
461
462		BASIC Level III cart featured 32K of
	461
	462	BASIC Level III cart featured 32K of
463	463	oncart RAM, mapped at 0x8000-0xffff?
464
	464
465	465	-------------------------------------------------*/
466	466
467	467	READ8_MEMBER(sega8_basic_l3_device::read_cart)
r23623	r23624
469	469	// 8K of RAM sits in 0x8000-0x9fff
470	470	if (offset >= 0x8000)
471	471	return m_ram[offset & 0x3fff];
472
	472
473	473	return m_rom[offset % m_rom_size];
474	474	}
475	475
r23623	r23624
492	492
493	493
494	494	/*-------------------------------------------------
495
496		Music Editor cart featured 10K of oncart RAM, mapped
	495
	496	Music Editor cart featured 10K of oncart RAM, mapped
497	497	in 0x8000-0x9fff and 0xc000-0xffff
498
	498
499	499	-------------------------------------------------*/
500	500
501	501	READ8_MEMBER(sega8_music_editor_device::read_cart)
r23623	r23624
503	503	// 8K of RAM sits in 0x8000-0x9fff
504	504	if (offset >= 0x8000 && offset < 0xa000)
505	505	return m_ram[offset & 0x1fff];
506
	506
507	507	return m_rom[offset % m_rom_size];
508	508	}
509	509
r23623	r23624
530	530
531	531
532	532	/*-------------------------------------------------
533
	533
534	534	SG-1000 Terebi Oekaki using a Tablet input device
535
	535
536	536	-------------------------------------------------*/
537	537
538	538	/*
539
	539
540	540	Terebi Oekaki (TV Draw)
541
	541
542	542	Address Access Bits
543	543	7 6 5 4 3 2 1 0
544	544	$6000 W - - - - - - - AXIS
545	545	$8000 R BUSY - - - - - - PRESS
546	546	$A000 R/W DATA
547
	547
548	548	AXIS: write 0 to select X axis, 1 to select Y axis.
549	549	BUSY: reads 1 when graphic board is busy sampling position, else 0.
550	550	PRESS: reads 0 when pen is touching graphic board, else 1.
551	551	DATA: when pen is touching graphic board, return 8-bit sample position for currently selected axis (X is in the 0-255 range, Y in the 0-191 range). Else, return 0.
552
	552
553	553	*/
554	554
555	555
556	556	READ8_MEMBER(sega8_terebi_device::read_cart)
557	557	{
558	558	int bank = offset / 0x4000;
559
	559
560	560	if (offset == 0x8000)
561	561	return m_tvdraw_pen->read();
562	562	if (offset == 0xa000)
563	563	return m_tvdraw_data;
564
	564
565	565	return m_rom[m_rom_bank_base[bank] * 0x4000 + (offset & 0x3fff)];
566	566	}
567	567
r23623	r23624
573	573	if (data & 0x01)
574	574	{
575	575	m_tvdraw_data = m_tvdraw_x->read();
576
	576
577	577	if (m_tvdraw_data < 4) m_tvdraw_data = 4;
578	578	if (m_tvdraw_data > 251) m_tvdraw_data = 251;
579	579	}
r23623	r23624
604	604
605	605
606	606	/*-------------------------------------------------
607
	607
608	608	Dahjee carts were sold with a RAM expansion pass-through
609		cart (which we don't emulate separately for the
610		moment) which allowed to play on old SG1000 machines
	609	cart (which we don't emulate separately for the
	610	moment) which allowed to play on old SG1000 machines
611	611	some MSX conversions requiring more RAM than available
612
	612
613	613	Two kind of expansion existed (for different games),
614		one with 9K of RAM (Type A) and one with 8K of
	614	one with 9K of RAM (Type A) and one with 8K of
615	615	RAM (Type B).
616
	616
617	617	-------------------------------------------------*/
618	618
619	619	// TYPE A
r23623	r23624
622	622	// 8K of RAM sits in 0x2000-0x3fff
623	623	if (offset >= 0x2000 && offset < 0x4000)
624	624	return m_ram[offset & 0x1fff];
625
	625
626	626	return m_rom[offset % m_rom_size];
627	627	}
628	628
r23623	r23624
670	670
671	671
672	672	/*-------------------------------------------------
673
	673
674	674	Sega carts + EEPROM, used for some GameGear baseball
675	675	games
676
	676
677	677	-------------------------------------------------*/
678	678
679	679
680	680	READ8_MEMBER(sega8_eeprom_device::read_cart)
681	681	{
682	682	int bank = offset / 0x4000;
683
	683
684	684	if (offset == 0x8000 && m_93c46_enabled)
685	685	{
686	686	UINT8 value = (m_93c46_lines & 0xfc) \| 0x02;
687	687	value \|= m_eeprom->read_bit() ? 1 : 0;
688	688	return value;
689	689	}
690
691		if (offset < 0x400) // first 1k is hardcoded
	690
	691	if (offset < 0x400) // first 1k is hardcoded
692	692	return m_rom[offset];
693
	693
694	694	return m_rom[m_rom_bank_base[bank] * 0x4000 + (offset & 0x3fff)];
695	695	}
696	696
r23623	r23624
719	719	m_93c46_enabled = BIT(data, 3);
720	720	logerror("eeprom %s\n", m_93c46_enabled ? "enabled" : "disabled");
721	721	break;
722
	722
723	723	case 1: // Select 16k ROM bank for 0000-3fff
724	724	case 2: // Select 16k ROM bank for 4000-7fff
725	725	case 3: // Select 16k ROM bank for 8000-bfff
726	726	m_rom_bank_base[offset - 1] = data % m_rom_page_count;
727	727	break;
728		}
	728	}
729	729	}
730	730
731	731	MACHINE_CONFIG_FRAGMENT( gg_eeprom )
r23623	r23624
739	739
740	740
741	741	/*-------------------------------------------------
742
	742
743	743	Codemasters carts, possibly having on cart RAM
744	744	(Ernie Els Golf)
745
	745
746	746	-------------------------------------------------*/
747	747
748	748	READ8_MEMBER(sega8_codemasters_device::read_cart)
749	749	{
750	750	int bank = offset / 0x2000;
751
	751
752	752	if (bank == 5 && m_ram && m_ram_enabled)
753	753	return m_ram[(m_ram_base * 0x2000 + (offset & 0x1fff)) % m_ram_size];
754
	754
755	755	return m_rom[m_rom_bank_base[bank/2] * 0x4000 + (offset & 0x3fff)];
756	756	}
757	757
r23623	r23624
786	786	}
787	787
788	788	/*-------------------------------------------------
789
	789
790	790	HES 4 PAK All Action cart
791
	791
792	792	-------------------------------------------------*/
793	793
794	794
r23623	r23624
814	814
815	815
816	816	/*-------------------------------------------------
817
	817
818	818	base Zemina carts, allowing for 8K bankswitch
819
	819
820	820	-------------------------------------------------*/
821	821
822	822	READ8_MEMBER(sega8_zemina_device::read_cart)
823	823	{
824	824	int bank = offset / 0x2000;
825
	825
826	826	if (bank >= 4 && m_ram && m_ram_enabled)
827	827	return m_ram[(m_ram_base * 0x2000 + (offset & 0x1fff)) % m_ram_size];
828
	828
829	829	return m_rom[m_rom_bank_base[bank] * 0x2000 + (offset & 0x1fff)];
830	830	}
831	831
832	832	WRITE8_MEMBER(sega8_zemina_device::write_cart)
833	833	{
834	834	int bank = offset / 0x2000;
835
	835
836	836	if (bank >= 4 && m_ram && m_ram_enabled)
837	837	m_ram[(m_ram_base * 0x2000 + (offset & 0x1fff)) % m_ram_size] = data;
838	838
r23623	r23624
857	857	}
858	858
859	859	/*-------------------------------------------------
860
	860
861	861	Zemina cart used for Nemesis: same as above, but
862	862	different bank layout at start (see late_bank_setup)
863
	863
864	864	-------------------------------------------------*/
865	865
866	866	/*-------------------------------------------------
867
	867
868	868	Daiou cart used for SMS Janggun-ui Adeul
869
	869
870	870	the game expects to access 256 x 8K banks:
871	871	first 64 are just the game, second 64 are a mirror of the first ones
872	872	upper 128 are the same as the previous but with bytes in reverse order
873	873	probably as a shortcut to get sprite flipping for free from hw
874	874	so if bit7 of current bank page is set, we swap the result
875
	875
876	876	-------------------------------------------------*/
877	877
878	878	READ8_MEMBER(sega8_janggun_device::read_cart)
879	879	{
880	880	int bank = offset / 0x2000;
881
	881
882	882	if (m_rom_bank_base[bank] < 0x80)
883	883	return m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)];
884	884	else
r23623	r23624
911	911	{
912	912	case 0:
913	913	break;
914
	914
915	915	case 1: // Select 16k ROM bank for 0000-3fff
916	916	case 2: // Select 16k ROM bank for 4000-7fff
917	917	case 3: // Select 16k ROM bank for 8000-bfff
918	918	m_rom_bank_base[(offset - 1) * 2] = (data % m_rom_page_count) * 2;
919	919	m_rom_bank_base[(offset - 1) * 2 + 1] = (data % m_rom_page_count) * 2 + 1;
920	920	break;
921		}
	921	}
922	922	}
923	923
924	924
925	925	/*-------------------------------------------------
926
927		Korean cart, used e.g. in Dodgeball King,
	926
	927	Korean cart, used e.g. in Dodgeball King,
928	928	uses writes to 0xa000 for bankswitch
929
	929
930	930	-------------------------------------------------*/
931	931
932	932	WRITE8_MEMBER(sega8_korean_device::write_cart)
933	933	{
934	934	int bank = offset / 0x4000;
935
	935
936	936	if (bank == 2 && m_ram && m_ram_enabled)
937	937	m_ram[m_ram_base * 0x4000 + (offset & 0x3fff)] = data;
938	938
939	939	if (offset == 0xa000)
940	940	m_rom_bank_base[2] = data % m_rom_page_count;
941	941	}
942

trunk/src/mess/machine/pce_rom.h
r23623	r23624
13	13	// construction/destruction
14	14	pce_rom_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, const char shortname, const char *source);
15	15	pce_rom_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
16
	16
17	17	// device-level overrides
18	18	virtual void device_start() {}
19	19	virtual void device_reset() {}
20
	20
21	21	// reading and writing
22	22	virtual DECLARE_READ8_MEMBER(read_cart);
23	23	};
r23623	r23624
57	57	public:
58	58	// construction/destruction
59	59	pce_sf2_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
60
	60
61	61	// device-level overrides
62	62	virtual void device_start();
63	63	virtual void device_reset();
64
	64
65	65	// reading and writing
66	66	virtual DECLARE_READ8_MEMBER(read_cart);
67	67	virtual DECLARE_WRITE8_MEMBER(write_cart);

trunk/src/mess/machine/sega8_rom.h
r23623	r23624
41	41	public:
42	42	// construction/destruction
43	43	sega8_cardcatch_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
44
	44
45	45	// reading and writing
46	46	virtual DECLARE_READ8_MEMBER(read_cart);
47	47	virtual DECLARE_WRITE8_MEMBER(write_cart);
48	48	virtual DECLARE_WRITE8_MEMBER(write_mapper) {}
49
	49
50	50	virtual machine_config_constructor device_mconfig_additions() const;
51
	51
52	52	protected:
53	53	required_device<sega8_card_slot_device> m_card;
54	54	};
r23623	r23624
61	61	public:
62	62	// construction/destruction
63	63	sega8_othello_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
64
	64
65	65	// reading and writing
66	66	virtual DECLARE_READ8_MEMBER(read_cart);
67	67	virtual DECLARE_WRITE8_MEMBER(write_cart);
r23623	r23624
76	76	public:
77	77	// construction/destruction
78	78	sega8_castle_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
79
	79
80	80	// reading and writing
81	81	virtual DECLARE_READ8_MEMBER(read_cart);
82	82	virtual DECLARE_WRITE8_MEMBER(write_cart);
r23623	r23624
91	91	public:
92	92	// construction/destruction
93	93	sega8_basic_l3_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
94
	94
95	95	// reading and writing
96	96	virtual DECLARE_READ8_MEMBER(read_cart);
97	97	virtual DECLARE_WRITE8_MEMBER(write_cart);
98	98	virtual DECLARE_WRITE8_MEMBER(write_mapper) {}
99
	99
100	100	// has internal RAM which overwrites the system one!
101	101	virtual DECLARE_READ8_MEMBER(read_ram);
102	102	virtual DECLARE_WRITE8_MEMBER(write_ram);
r23623	r23624
110	110	public:
111	111	// construction/destruction
112	112	sega8_music_editor_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
113
	113
114	114	// reading and writing
115	115	virtual DECLARE_READ8_MEMBER(read_cart);
116	116	virtual DECLARE_WRITE8_MEMBER(write_cart);
117	117	virtual DECLARE_WRITE8_MEMBER(write_mapper) {}
118
	118
119	119	// has internal RAM which overwrites the system one!
120	120	virtual DECLARE_READ8_MEMBER(read_ram);
121	121	virtual DECLARE_WRITE8_MEMBER(write_ram);
r23623	r23624
129	129	public:
130	130	// construction/destruction
131	131	sega8_terebi_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
132
	132
133	133	// device-level overrides
134	134	virtual void device_start();
135	135	virtual ioport_constructor device_input_ports() const;
136	136	virtual void device_reset();
137
	137
138	138	required_ioport m_tvdraw_x;
139	139	required_ioport m_tvdraw_y;
140	140	required_ioport m_tvdraw_pen;
141
	141
142	142	// reading and writing
143	143	virtual DECLARE_READ8_MEMBER(read_cart);
144	144	virtual DECLARE_WRITE8_MEMBER(write_cart);
145	145	virtual DECLARE_WRITE8_MEMBER(write_mapper) {}
146
	146
147	147	protected:
148	148	UINT8 m_tvdraw_data;
149	149	};
r23623	r23624
156	156	public:
157	157	// construction/destruction
158	158	sega8_dahjee_typea_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
159
	159
160	160	// reading and writing
161	161	virtual DECLARE_READ8_MEMBER(read_cart);
162	162	virtual DECLARE_WRITE8_MEMBER(write_cart);
163	163	virtual DECLARE_WRITE8_MEMBER(write_mapper) {}
164
	164
165	165	// has internal RAM which overwrites the system one!
166	166	virtual DECLARE_READ8_MEMBER(read_ram);
167	167	virtual DECLARE_WRITE8_MEMBER(write_ram);
r23623	r23624
175	175	public:
176	176	// construction/destruction
177	177	sega8_dahjee_typeb_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
178
	178
179	179	// reading and writing
180	180	virtual DECLARE_READ8_MEMBER(read_cart);
181	181	virtual DECLARE_WRITE8_MEMBER(write_cart) {}
182	182	virtual DECLARE_WRITE8_MEMBER(write_mapper) {}
183
	183
184	184	// has internal RAM which overwrites the system one!
185	185	virtual DECLARE_READ8_MEMBER(read_ram);
186	186	virtual DECLARE_WRITE8_MEMBER(write_ram);
r23623	r23624
197	197	public:
198	198	// construction/destruction
199	199	sega8_eeprom_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
200
	200
201	201	// device-level overrides
202	202	virtual void device_start();
203	203	virtual machine_config_constructor device_mconfig_additions() const;
204	204	virtual void device_reset();
205
	205
206	206	virtual void late_bank_setup();
207
	207
208	208	// reading and writing
209	209	virtual DECLARE_READ8_MEMBER(read_cart);
210	210	virtual DECLARE_WRITE8_MEMBER(write_cart);
211	211	virtual DECLARE_WRITE8_MEMBER(write_mapper);
212
	212
213	213	protected:
214	214	UINT8 m_rom_bank_base[3];
215
	215
216	216	required_device<eeprom_device> m_eeprom;
217	217	int m_93c46_enabled;
218	218	UINT8 m_93c46_lines;
r23623	r23624
227	227	public:
228	228	// construction/destruction
229	229	sega8_codemasters_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
230
	230
231	231	// device-level overrides
232	232	virtual void device_start();
233	233	virtual void device_reset();
234
	234
235	235	virtual void late_bank_setup();
236
	236
237	237	// reading and writing
238	238	virtual DECLARE_READ8_MEMBER(read_cart);
239	239	virtual DECLARE_WRITE8_MEMBER(write_cart);
240	240	// no mapper write for this!
241
	241
242	242	protected:
243	243	UINT8 m_rom_bank_base[3];
244	244	UINT8 m_ram_base;
r23623	r23624
253	253	public:
254	254	// construction/destruction
255	255	sega8_4pak_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
256
	256
257	257	// device-level overrides
258	258	virtual void device_start();
259	259	virtual void device_reset();
r23623	r23624
275	275	// construction/destruction
276	276	sega8_zemina_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, const char shortname, const char *source);
277	277	sega8_zemina_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
278
	278
279	279	// device-level overrides
280	280	virtual void device_start();
281	281	virtual void device_reset();
282
	282
283	283	virtual void late_bank_setup();
284
	284
285	285	// reading and writing
286	286	virtual DECLARE_READ8_MEMBER(read_cart);
287	287	virtual DECLARE_WRITE8_MEMBER(write_cart);
288	288	// no mapper write for this!
289
	289
290	290	protected:
291	291	UINT8 m_rom_bank_base[6];
292	292	UINT8 m_ram_base;
r23623	r23624
301	301	public:
302	302	// construction/destruction
303	303	sega8_nemesis_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
304
	304
305	305	virtual void late_bank_setup();
306	306	};
307	307
r23623	r23624
317	317
318	318	// device-level overrides
319	319	virtual void device_start() { save_item(NAME(m_rom_bank_base)); }
320
	320
321	321	virtual void late_bank_setup();
322
	322
323	323	// reading and writing
324	324	virtual DECLARE_READ8_MEMBER(read_cart);
325	325	virtual DECLARE_WRITE8_MEMBER(write_cart);
326	326	virtual DECLARE_WRITE8_MEMBER(write_mapper);
327
	327
328	328	protected:
329	329	UINT8 m_rom_bank_base[6];
330	330	};
r23623	r23624
337	337	public:
338	338	// construction/destruction
339	339	sega8_korean_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
340
	340
341	341	virtual void late_bank_setup();
342
	342
343	343	// reading and writing
344	344	virtual DECLARE_WRITE8_MEMBER(write_cart);
345	345	virtual DECLARE_WRITE8_MEMBER(write_mapper) {}

trunk/src/mess/machine/bbc.c
r23623	r23624
1417	1417
1418	1418
1419	1419	READ_LINE_MEMBER( bbc_state::bbc_rxd_r )
1420		{
1421		return ( m_serproc_data & 0x40 ) ? m_rs232->rx() : m_rxd_cass;
	1420	{
	1421	return ( m_serproc_data & 0x40 ) ? m_rs232->rx() : m_rxd_cass;
1422	1422	}
1423	1423
1424	1424
r23623	r23624
1429	1429
1430	1430
1431	1431	READ_LINE_MEMBER( bbc_state::bbc_cts_r )
1432		{
	1432	{
1433	1433	return ( m_serproc_data & 0x40 ) ? m_rs232->cts_r() : 0;
1434	1434	}
1435	1435

trunk/src/mess/machine/gba_slot.c
r23623	r23624
159	159	{
160	160	UINT8 ROM = (UINT8 )m_cart->get_rom_base();
161	161	UINT32 cart_size;
162
	162
163	163	if (software_entry() == NULL)
164	164	{
165	165	cart_size = length();
r23623	r23624
169	169	return IMAGE_INIT_FAIL;
170	170	}
171	171	fread(ROM, cart_size);
172		m_cart->set_rom_size(cart_size); // we store the actual game size...
	172	m_cart->set_rom_size(cart_size); // we store the actual game size...
173	173
174		m_type = get_cart_type(ROM, cart_size);
	174	m_type = get_cart_type(ROM, cart_size);
175	175	}
176	176	else
177	177	{
r23623	r23624
184	184	return IMAGE_INIT_FAIL;
185	185	}
186	186	memcpy(ROM, get_software_region("rom"), cart_size);
187		m_cart->set_rom_size(cart_size); // we store the actual game size...
188
	187	m_cart->set_rom_size(cart_size); // we store the actual game size...
	188
189	189	if (pcb_name)
190	190	m_type = gba_get_pcb_id(pcb_name);
191	191
r23623	r23624
249	249
250	250
251	251	/*-------------------------------------------------
252		get_cart_type - code to detect NVRAM type from
	252	get_cart_type - code to detect NVRAM type from
253	253	fullpath
254	254	-------------------------------------------------*/
255	255
r23623	r23624
305	305	chip \|= GBA_CHIP_RTC;
306	306	}
307	307	mame_printf_info("GBA: Detected (ROM) %s\n", gba_chip_string(chip).cstr());
308
	308
309	309	// fix for games which return more than one kind of chip: either it is one of the known titles, or we default to no battery
310	310	if (gba_chip_has_conflict(chip))
311	311	{
312	312	char game_code[5] = { 0 };
313	313	bool resolved = FALSE;
314
	314
315	315	if (len >= 0xac + 4)
316	316	memcpy(game_code, ROM + 0xac, 4);
317
	317
318	318	mame_printf_info("GBA: Game Code \"%s\"\n", game_code);
319	319
320	320	chip &= ~(GBA_CHIP_EEPROM \| GBA_CHIP_EEPROM_4K \| GBA_CHIP_EEPROM_64K \| GBA_CHIP_FLASH \| GBA_CHIP_FLASH_1M \| GBA_CHIP_FLASH_512 \| GBA_CHIP_SRAM);
r23623	r23624
333	333	if (!resolved)
334	334	mame_printf_warning("GBA: NVRAM is disabled because multiple NVRAM chips were detected!\n");
335	335	}
336
	336
337	337	// fix for games which are known to require an eeprom with 14-bit addressing (64 kbit)
338	338	if (chip & GBA_CHIP_EEPROM)
339	339	{
r23623	r23624
341	341
342	342	if (len >= 0xac + 4)
343	343	memcpy(game_code, ROM + 0xac, 4);
344
	344
345	345	mame_printf_info("GBA: Game Code \"%s\"\n", game_code);
346	346
347	347	for (int i = 0; i < sizeof(gba_chip_fix_eeprom_list) / sizeof(gba_chip_fix_eeprom_item); i++)
r23623	r23624
462	462
463	463
464	464	/*-------------------------------------------------
465		Install ROM - directly point system address map
	465	Install ROM - directly point system address map
466	466	to the cart ROM region so to avoid the memory
467	467	system additional load
468	468	-------------------------------------------------*/
r23623	r23624
481	481	machine().root_device().membank("rom3")->set_base(machine().root_device().memregion(m_cart->device().subtag(tempstring, "cartridge"))->base());
482	482	}
483	483	}
484

trunk/src/mess/machine/gba_slot.h
r23623	r23624
42	42	void set_rom_size(UINT32 val) { m_rom_size = val; }
43	43
44	44	// internal state
45		UINT32 *m_rom; // this points to the cart rom region
	45	UINT32 *m_rom; // this points to the cart rom region
46	46	UINT32 *m_nvram;
47		UINT32 m_rom_size; // this is the actual game size, not the rom region size!
	47	UINT32 m_rom_size; // this is the actual game size, not the rom region size!
48	48	UINT32 m_nvram_size;
49	49	};
50	50
r23623	r23624
119	119
120	120
121	121	//------------------------------------------------------------------------
122		//
	122	//
123	123	// Misc structs to attempt NVRAM identification when loading from fullpath
124		//
	124	//
125	125	//------------------------------------------------------------------------
126	126
127	127

trunk/src/mess/machine/s3c44b0.c
r23623	r23624
61	61	const s3c44b0_interface intf = reinterpret_cast<const s3c44b0_interface >(static_config());
62	62	if (intf != NULL)
63	63	static_cast<s3c44b0_interface >(this) = *intf;
64
	64
65	65	// or initialize to defaults if none provided
66	66	else
67	67	{
r23623	r23624
83	83	m_sda_w.resolve(i2c_itf.sda_w, *this);
84	84	m_adc_data_r.resolve(adc_itf.data_r, *this);
85	85	m_i2s_data_w.resolve(i2s_itf.data_w, *this);
86
87
	86
	87
88	88	for (int i = 0; i < 6; i++) m_pwm.timer[i] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(s3c44b0_device::pwm_timer_exp),this));
89	89	for (int i = 0; i < 2; i++) m_uart[i].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(s3c44b0_device::uart_timer_exp),this));
90	90	for (int i = 0; i < 2; i++) m_zdma[i].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(s3c44b0_device::zdma_timer_exp),this));
r23623	r23624
114	114	save_item(NAME(m_irq.regs.f_ispc));
115	115	save_item(NAME(m_irq.line_irq));
116	116	save_item(NAME(m_irq.line_fiq));
117
	117
118	118	save_item(NAME(m_clkpow.regs.pllcon));
119	119	save_item(NAME(m_clkpow.regs.clkcon));
120	120	save_item(NAME(m_clkpow.regs.clkslow));
121	121	save_item(NAME(m_clkpow.regs.locktime));
122
	122
123	123	// FIXME: how to save m_lcd.bitmap which gets allocated/freed during emulation?
124	124	save_item(NAME(m_lcd.regs.lcdcon1));
125	125	save_item(NAME(m_lcd.regs.lcdcon2));
r23623	r23624
149	149	save_item(NAME(m_lcd.vpos_max));
150	150	save_item(NAME(m_lcd.vpos_end));
151	151	save_item(NAME(m_lcd.frame_time));
152
	152
153	153	machine().save().register_postload(save_prepost_delegate(FUNC(s3c44b0_device::s3c44b0_postload), this));
154
	154
155	155	for (int i = 0; i < 2; i++)
156	156	{
157	157	save_item(NAME(m_zdma[i].regs.dcon), i);
r23623	r23624
161	161	save_item(NAME(m_zdma[i].regs.dcsrc), i);
162	162	save_item(NAME(m_zdma[i].regs.dcdst), i);
163	163	save_item(NAME(m_zdma[i].regs.dccnt), i);
164
	164
165	165	save_item(NAME(m_bdma[i].regs.dcon), i);
166	166	save_item(NAME(m_bdma[i].regs.disrc), i);
167	167	save_item(NAME(m_bdma[i].regs.didst), i);
r23623	r23624
169	169	save_item(NAME(m_bdma[i].regs.dcsrc), i);
170	170	save_item(NAME(m_bdma[i].regs.dcdst), i);
171	171	save_item(NAME(m_bdma[i].regs.dccnt), i);
172
	172
173	173	save_item(NAME(m_uart[i].regs.ulcon), i);
174	174	save_item(NAME(m_uart[i].regs.ucon), i);
175	175	save_item(NAME(m_uart[i].regs.ufcon), i);
r23623	r23624
182	182	save_item(NAME(m_uart[i].regs.urxh), i);
183	183	save_item(NAME(m_uart[i].regs.ubrdiv), i);
184	184	}
185
	185
186	186	save_item(NAME(m_sio.regs.siocon));
187	187	save_item(NAME(m_sio.regs.siodat));
188	188	save_item(NAME(m_sio.regs.sbrdr));
189	189	save_item(NAME(m_sio.regs.itvcnt));
190	190	save_item(NAME(m_sio.regs.dcntz));
191
	191
192	192	save_item(NAME(m_pwm.regs.tcfg0));
193	193	save_item(NAME(m_pwm.regs.tcfg1));
194	194	save_item(NAME(m_pwm.regs.tcon));
r23623	r23624
212	212	save_item(NAME(m_pwm.cnt));
213	213	save_item(NAME(m_pwm.cmp));
214	214	save_item(NAME(m_pwm.freq));
215
	215
216	216	save_item(NAME(m_wdt.regs.wtcon));
217	217	save_item(NAME(m_wdt.regs.wtdat));
218	218	save_item(NAME(m_wdt.regs.wtcnt));
219
	219
220	220	save_item(NAME(m_iic.regs.iiccon));
221	221	save_item(NAME(m_iic.regs.iicstat));
222	222	save_item(NAME(m_iic.regs.iicadd));
223	223	save_item(NAME(m_iic.regs.iicds));
224	224	save_item(NAME(m_iic.count));
225
	225
226	226	save_item(NAME(m_iis.regs.iiscon));
227	227	save_item(NAME(m_iis.regs.iismod));
228	228	save_item(NAME(m_iis.regs.iispsr));
r23623	r23624
230	230	save_item(NAME(m_iis.regs.iisfifo));
231	231	save_item(NAME(m_iis.fifo));
232	232	save_item(NAME(m_iis.fifo_index));
233
	233
234	234	save_item(NAME(m_gpio.regs.gpacon));
235	235	save_item(NAME(m_gpio.regs.gpadat));
236	236	save_item(NAME(m_gpio.regs.gpbcon));
r23623	r23624
253	253	save_item(NAME(m_gpio.regs.spucr));
254	254	save_item(NAME(m_gpio.regs.extint));
255	255	save_item(NAME(m_gpio.regs.extintpnd));
256
	256
257	257	save_item(NAME(m_adc.regs.adccon));
258	258	save_item(NAME(m_adc.regs.adcpsr));
259	259	save_item(NAME(m_adc.regs.adcdat));
260
	260
261	261	save_item(NAME(m_cpuwrap.regs.syscfg));
262	262	save_item(NAME(m_cpuwrap.regs.ncachbe0));
263	263	save_item(NAME(m_cpuwrap.regs.ncachbe1));

trunk/src/mess/machine/s3c44b0.h
r23623	r23624
635	635	public:
636	636	s3c44b0_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
637	637	~s3c44b0_device() {}
638
	638
639	639	DECLARE_READ32_MEMBER(lcd_r);
640	640	DECLARE_READ32_MEMBER(clkpow_r);
641	641	DECLARE_READ32_MEMBER(irq_r);
r23623	r23624
680	680	virtual void device_config_complete();
681	681	virtual void device_start();
682	682	virtual void device_reset();
683
	683
684	684	private:
685	685	// internal state
686	686	// LCD Controller
r23623	r23624
754	754	void adc_stop();
755	755	void adc_recalc();
756	756	TIMER_CALLBACK_MEMBER(adc_timer_exp);
757
	757
758	758	// SIO
759	759	void sio_start();
760	760	void sio_stop();

trunk/src/mess/machine/mc68328.c
r23623	r23624
47	47	const mc68328_interface intf = reinterpret_cast<const mc68328_interface >(static_config());
48	48	if (intf != NULL)
49	49	static_cast<mc68328_interface >(this) = *intf;
50
	50
51	51	// or initialize to defaults if none provided
52	52	else
53	53	{
r23623	r23624
84	84	//-------------------------------------------------
85	85
86	86	void mc68328_device::device_start()
87		{
	87	{
88	88	m_out_port_a.resolve(m_out_port_a_func, *this);
89	89	m_out_port_b.resolve(m_out_port_b_func, *this);
90	90	m_out_port_c.resolve(m_out_port_c_func, *this);
r23623	r23624
95	95	m_out_port_j.resolve(m_out_port_j_func, *this);
96	96	m_out_port_k.resolve(m_out_port_k_func, *this);
97	97	m_out_port_m.resolve(m_out_port_m_func, *this);
98
	98
99	99	m_in_port_a.resolve(m_in_port_a_func, *this);
100	100	m_in_port_b.resolve(m_in_port_b_func, *this);
101	101	m_in_port_c.resolve(m_in_port_c_func, *this);
r23623	r23624
108	108	m_in_port_m.resolve(m_in_port_m_func, *this);
109	109
110	110	m_out_pwm.resolve(m_out_pwm_func, *this);
111
	111
112	112	m_out_spim.resolve(m_out_spim_func, *this);
113	113	m_in_spim.resolve(m_in_spim_func, *this);
114	114
r23623	r23624
155	155	m_regs.csd1 = 0x00010006;
156	156	m_regs.csd2 = 0x00010006;
157	157	m_regs.csd3 = 0x00010006;
158
	158
159	159	m_regs.pllcr = 0x2400;
160	160	m_regs.pllfsr = 0x0123;
161	161	m_regs.pctlr = 0x1f;
162
	162
163	163	m_regs.ivr = 0x00;
164	164	m_regs.icr = 0x0000;
165	165	m_regs.imr = 0x00ffffff;
166	166	m_regs.iwr = 0x00ffffff;
167	167	m_regs.isr = 0x00000000;
168	168	m_regs.ipr = 0x00000000;
169
	169
170	170	m_regs.padir = 0x00;
171	171	m_regs.padata = 0x00;
172	172	m_regs.pasel = 0x00;
r23623	r23624
206	206	m_regs.pmdata = 0x00;
207	207	m_regs.pmpuen = 0xff;
208	208	m_regs.pmsel = 0xff;
209
	209
210	210	m_regs.pwmc = 0x0000;
211	211	m_regs.pwmp = 0x0000;
212	212	m_regs.pwmw = 0x0000;
213	213	m_regs.pwmcnt = 0x0000;
214
	214
215	215	m_regs.tctl[0] = m_regs.tctl[1] = 0x0000;
216	216	m_regs.tprer[0] = m_regs.tprer[1] = 0x0000;
217	217	m_regs.tcmp[0] = m_regs.tcmp[1] = 0xffff;
r23623	r23624
221	221	m_regs.wctlr = 0x0000;
222	222	m_regs.wcmpr = 0xffff;
223	223	m_regs.wcn = 0x0000;
224
	224
225	225	m_regs.spisr = 0x0000;
226
	226
227	227	m_regs.spimdata = 0x0000;
228	228	m_regs.spimcont = 0x0000;
229
	229
230	230	m_regs.ustcnt = 0x0000;
231	231	m_regs.ubaud = 0x003f;
232	232	m_regs.urx = 0x0000;
233	233	m_regs.utx = 0x0000;
234	234	m_regs.umisc = 0x0000;
235
	235
236	236	m_regs.lssa = 0x00000000;
237	237	m_regs.lvpw = 0xff;
238	238	m_regs.lxmax = 0x03ff;
r23623	r23624
251	251	m_regs.lposr = 0x00;
252	252	m_regs.lfrcm = 0xb9;
253	253	m_regs.lgpmr = 0x1073;
254
	254
255	255	m_regs.hmsr = 0x00000000;
256	256	m_regs.alarm = 0x00000000;
257	257	m_regs.rtcctl = 0x00;
258	258	m_regs.rtcisr = 0x00;
259	259	m_regs.rtcienr = 0x00;
260	260	m_regs.stpwtch = 0x00;
261
	261
262	262	m_rtc->adjust(attotime::from_hz(1), 0, attotime::from_hz(1));
263	263	}
264	264
r23623	r23624
2735	2735	UINT16 word;
2736	2736	UINT16 *line;
2737	2737	int y, x, b;
2738
	2738
2739	2739	if (m_regs.lckcon & LCKCON_LCDC_EN)
2740	2740	{
2741	2741	for (y = 0; y < 160; y++)
2742	2742	{
2743	2743	line = &bitmap.pix16(y);
2744
	2744
2745	2745	for (x = 0; x < 160; x += 16)
2746	2746	{
2747	2747	word = *(video_ram++);
r23623	r23624
2757	2757	for (y = 0; y < 160; y++)
2758	2758	{
2759	2759	line = &bitmap.pix16(y);
2760
	2760
2761	2761	for (x = 0; x < 160; x++)
2762	2762	{
2763	2763	line[x] = 0;
r23623	r23624
2905	2905	save_item(NAME(m_regs.rtcienr));
2906	2906	save_item(NAME(m_regs.stpwtch));
2907	2907	}
2908

trunk/src/mess/machine/sns_sdd1.c
r23623	r23624
435	435	save_item(NAME(m_sdd1_enable));
436	436	save_item(NAME(m_xfer_enable));
437	437	save_item(NAME(m_mmc));
438
	438
439	439	for (int i = 0; i < 8; i++)
440	440	{
441	441	save_item(NAME(m_dma[i].addr), i);

trunk/src/mess/machine/mc68328.h
r23623	r23624
1	1	/**********************************************************************
2
	2
3	3	Motorola 68328 ("DragonBall") System-on-a-Chip implementation
4
	4
5	5	By MooglyGuy
6	6	contact mooglyguy@gmail.com with licensing and usage questions.
7
	7
8	8	**********************************************************************/
9	9
10	10	/*****************************************************************************************************************
11
	11
12	12	P P P P P P P P P P P P P P
13	13	E E E E E E E J J J J J J J
14	14	1 2 3 4 5 6 7 0 1 2 3 4 5 6
r23623	r23624
80	80	1 2 P
81	81	I
82	82	O
83
	83
84	84	Figure 12-1. MC68328 144-Lead Plastic Thin-Quad Flat Pack Pin Assignment
85
	85
86	86	Source: MC68328 (DragonBall)(tm) Integrated Processor User's Manual
87
	87
88	88	*****************************************************************************************************************/
89	89
90	90	#ifndef __MC68328_H__
r23623	r23624
412	412	struct mc68328_interface
413	413	{
414	414	const char *m68k_cpu_tag;
415
	415
416	416	devcb_write8 m_out_port_a_func; /* 8-bit output */
417	417	devcb_write8 m_out_port_b_func; /* 8-bit output */
418	418	devcb_write8 m_out_port_c_func; /* 8-bit output */
r23623	r23624
423	423	devcb_write8 m_out_port_j_func; /* 8-bit output */
424	424	devcb_write8 m_out_port_k_func; /* 8-bit output */
425	425	devcb_write8 m_out_port_m_func; /* 8-bit output */
426
	426
427	427	devcb_read8 m_in_port_a_func; /* 8-bit input */
428	428	devcb_read8 m_in_port_b_func; /* 8-bit input */
429	429	devcb_read8 m_in_port_c_func; /* 8-bit input */
r23623	r23624
434	434	devcb_read8 m_in_port_j_func; /* 8-bit input */
435	435	devcb_read8 m_in_port_k_func; /* 8-bit input */
436	436	devcb_read8 m_in_port_m_func; /* 8-bit input */
437
	437
438	438	devcb_write8 m_out_pwm_func; /* 1-bit output */
439
	439
440	440	devcb_write16 m_out_spim_func; /* 16-bit output */
441	441	devcb_read16 m_in_spim_func; /* 16-bit input */
442	442
r23623	r23624
449	449	// $(FF)FFF000
450	450	UINT8 scr; // System Control Register
451	451	UINT8 unused0[255];
452
	452
453	453	// $(FF)FFF100
454	454	UINT16 grpbasea; // Chip Select Group A Base Register
455	455	UINT16 grpbaseb; // Chip Select Group B Base Register
r23623	r23624
476	476	UINT32 csd2; // Group D Chip Select 2 Register
477	477	UINT32 csd3; // Group D Chip Select 3 Register
478	478	UINT8 unused1[176];
479
	479
480	480	// $(FF)FFF200
481	481	UINT16 pllcr; // PLL Control Register
482	482	UINT16 pllfsr; // PLL Frequency Select Register
483	483	UINT8 pad2[3];
484	484	UINT8 pctlr; // Power Control Register
485	485	UINT8 unused3[248];
486
	486
487	487	// $(FF)FFF300
488	488	UINT8 ivr; // Interrupt Vector Register
489	489	UINT8 unused4[1];
r23623	r23624
493	493	UINT32 isr; // Interrupt Status Register
494	494	UINT32 ipr; // Interrupt Pending Register
495	495	UINT8 unused5[236];
496
	496
497	497	// $(FF)FFF400
498	498	UINT8 padir; // Port A Direction Register
499	499	UINT8 padata; // Port A Data Register
500	500	UINT8 unused6[1];
501	501	UINT8 pasel; // Port A Select Register
502	502	UINT8 unused7[4];
503
	503
504	504	UINT8 pbdir; // Port B Direction Register
505	505	UINT8 pbdata; // Port B Data Register
506	506	UINT8 unused8[1];
507	507	UINT8 pbsel; // Port B Select Register
508	508	UINT8 unused9[4];
509
	509
510	510	UINT8 pcdir; // Port C Direction Register
511	511	UINT8 pcdata; // Port C Data Register
512	512	UINT8 unused10[1];
513	513	UINT8 pcsel; // Port C Select Register
514	514	UINT8 unused11[4];
515
	515
516	516	UINT8 pddir; // Port D Direction Register
517	517	UINT8 pddata; // Port D Data Register
518	518	UINT8 pdpuen; // Port D Pullup Enable Register
r23623	r23624
521	521	UINT8 pdirqen; // Port D IRQ Enable Register
522	522	UINT8 pddataedge; // Port D Data Edge Level
523	523	UINT8 pdirqedge; // Port D IRQ Edge Register
524
	524
525	525	UINT8 pedir; // Port E Direction Register
526	526	UINT8 pedata; // Port E Data Register
527	527	UINT8 pepuen; // Port E Pullup Enable Register
528	528	UINT8 pesel; // Port E Select Register
529	529	UINT8 unused14[4];
530
	530
531	531	UINT8 pfdir; // Port F Direction Register
532	532	UINT8 pfdata; // Port F Data Register
533	533	UINT8 pfpuen; // Port F Pullup Enable Register
534	534	UINT8 pfsel; // Port F Select Register
535	535	UINT8 unused15[4];
536
	536
537	537	UINT8 pgdir; // Port G Direction Register
538	538	UINT8 pgdata; // Port G Data Register
539	539	UINT8 pgpuen; // Port G Pullup Enable Register
540	540	UINT8 pgsel; // Port G Select Register
541	541	UINT8 unused16[4];
542
	542
543	543	UINT8 pjdir; // Port J Direction Register
544	544	UINT8 pjdata; // Port J Data Register
545	545	UINT8 unused17[1];
r23623	r23624
550	550	UINT8 pkpuen; // Port K Pullup Enable Register
551	551	UINT8 pksel; // Port K Select Register
552	552	UINT8 unused19[4];
553
	553
554	554	UINT8 pmdir; // Port M Direction Register
555	555	UINT8 pmdata; // Port M Data Register
556	556	UINT8 pmpuen; // Port M Pullup Enable Register
557	557	UINT8 pmsel; // Port M Select Register
558	558	UINT8 unused20[180];
559
	559
560	560	// $(FF)FFF500
561	561	UINT16 pwmc; // PWM Control Register
562	562	UINT16 pwmp; // PWM Period Register
563	563	UINT16 pwmw; // PWM Width Register
564	564	UINT16 pwmcnt; // PWN Counter
565	565	UINT8 unused21[248];
566
	566
567	567	// $(FF)FFF600
568	568	UINT16 tctl[2]; // Timer Control Register
569	569	UINT16 tprer[2]; // Timer Prescaler Register
r23623	r23624
576	576	UINT16 wcn; // Watchdog Counter
577	577	UINT8 tclear[2]; // Timer Clearable Status
578	578	UINT8 unused22[224];
579
	579
580	580	// $(FF)FFF700
581	581	UINT16 spisr; // SPIS Register
582	582	UINT8 unused23[254];
583
	583
584	584	// $(FF)FFF800
585	585	UINT16 spimdata; // SPIM Data Register
586	586	UINT16 spimcont; // SPIM Control/Status Register
587	587	UINT8 unused24[252];
588
	588
589	589	// $(FF)FFF900
590	590	UINT16 ustcnt; // UART Status/Control Register
591	591	UINT16 ubaud; // UART Baud Control Register
r23623	r23624
593	593	UINT16 utx; // UART TX Register
594	594	UINT16 umisc; // UART Misc Register
595	595	UINT8 unused25[246];
596
	596
597	597	// $(FF)FFFA00
598	598	UINT32 lssa; // Screen Starting Address Register
599	599	UINT8 unused26[1];
r23623	r23624
625	625	UINT8 lfrcm; // Frame Rate Control Modulation Register
626	626	UINT16 lgpmr; // Gray Palette Mapping Register
627	627	UINT8 unused37[204];
628
	628
629	629	// $(FF)FFFB00
630	630	UINT32 hmsr; // RTC Hours Minutes Seconds Register
631	631	UINT32 alarm; // RTC Alarm Register
r23623	r23624
657	657	virtual void device_config_complete();
658	658	virtual void device_start();
659	659	virtual void device_reset();
660
661		private:
	660
	661	private:
662	662	// internal state
663	663	void set_interrupt_line(UINT32 line, UINT32 active);
664	664	void poll_port_d_interrupts();
665	665	UINT32 get_timer_frequency(UINT32 index);
666	666	void maybe_start_timer(UINT32 index, UINT32 new_enable);
667	667	void timer_compare_event(UINT32 index);
668
	668
669	669	void register_state_save();
670	670
671	671	TIMER_CALLBACK_MEMBER(timer1_hit);
r23623	r23624
674	674	TIMER_CALLBACK_MEMBER(rtc_tick);
675	675
676	676	mc68328_regs_t m_regs;
677
	677
678	678	emu_timer *m_gptimer[2];
679	679	emu_timer *m_rtc;
680	680	emu_timer *m_pwm;
681
	681
682	682	devcb_resolved_write8 m_out_port_a; /* 8-bit output */
683	683	devcb_resolved_write8 m_out_port_b; /* 8-bit output */
684	684	devcb_resolved_write8 m_out_port_c; /* 8-bit output */
r23623	r23624
689	689	devcb_resolved_write8 m_out_port_j; /* 8-bit output */
690	690	devcb_resolved_write8 m_out_port_k; /* 8-bit output */
691	691	devcb_resolved_write8 m_out_port_m; /* 8-bit output */
692
	692
693	693	devcb_resolved_read8 m_in_port_a; /* 8-bit input */
694	694	devcb_resolved_read8 m_in_port_b; /* 8-bit input */
695	695	devcb_resolved_read8 m_in_port_c; /* 8-bit input */
r23623	r23624
700	700	devcb_resolved_read8 m_in_port_j; /* 8-bit input */
701	701	devcb_resolved_read8 m_in_port_k; /* 8-bit input */
702	702	devcb_resolved_read8 m_in_port_m; /* 8-bit input */
703
	703
704	704	devcb_resolved_write8 m_out_pwm; /* 1-bit output */
705
	705
706	706	devcb_resolved_write16 m_out_spim; /* 16-bit output */
707	707	devcb_resolved_read16 m_in_spim; /* 16-bit input */
708	708
709		devcb_resolved_write_line m_spim_xch_trigger; // not really a write_line, fix when converting to devcb2!
	709	devcb_resolved_write_line m_spim_xch_trigger; // not really a write_line, fix when converting to devcb2!
710	710
711	711	cpu_device *m_cpu;
712	712	};

trunk/src/mess/machine/wangpc_mcc.c
r23623	r23624
272	272	case 0x06/2:
273	273	m_sio->cd_ba_w(space, offset >> 1, data & 0xff);
274	274	break;
275
	275
276	276	case 0x08/2:
277	277	case 0x0a/2:
278	278	case 0x0c/2:

trunk/src/mess/machine/abckb.h
r23623	r23624
20	20	// MACROS / CONSTANTS
21	21	//**************************************************************************
22	22
23		#define ABC_KEYBOARD_PORT_TAG "kb"
	23	#define ABC_KEYBOARD_PORT_TAG "kb"
24	24
25	25
26	26

trunk/src/mess/machine/intv.c
r23623	r23624
250	250	{
251	251	if (m_bus_copy_mode \|\| !m_stic->read_stic_handshake())
252	252	return m_stic->read(space, offset, mem_mask);
253		else
	253	else
254	254	return offset;
255	255	}
256	256
r23623	r23624
266	266	//logerror("read: %d = GRAM(%d)\n",state->m_gram[offset],offset);
267	267	if (m_bus_copy_mode \|\| !m_stic->read_stic_handshake())
268	268	return m_stic->gram_read(space, offset, mem_mask);
269		else
270		return offset;
	269	else
	270	return offset;
271	271	}
272	272
273	273	WRITE16_MEMBER( intv_state::intv_gram_w )
r23623	r23624
345	345	if (data == 0x7a50)
346	346	{
347	347	m_ecs_bank_src[1] = 1;
348		m_bank2->set_base(m_bank_base[m_ecs_bank_src[1]] + (0x7000 << 1)); // ECS ROM at 0x7000 is on page 1
	348	m_bank2->set_base(m_bank_base[m_ecs_bank_src[1]] + (0x7000 << 1)); // ECS ROM at 0x7000 is on page 1
349	349	}
350	350	else if (data == 0x7a51 )
351	351	{
r23623	r23624
619	619	if (m_is_ecs)
620	620	{
621	621	// ECS can switch between the maincpu and the ecs roms
622		m_ecs_bank_src[0] = 0; // CPU
623		m_ecs_bank_src[1] = 1; // ECS
624		m_ecs_bank_src[2] = 0; // CPU
625		m_ecs_bank_src[3] = 0; // CPU
	622	m_ecs_bank_src[0] = 0; // CPU
	623	m_ecs_bank_src[1] = 1; // ECS
	624	m_ecs_bank_src[2] = 0; // CPU
	625	m_ecs_bank_src[3] = 0; // CPU
626	626	m_bank_base[0] = m_region_maincpu->base();
627	627	m_bank_base[1] = m_region_ecs_rom->base();
628	628	m_bank1->set_base(m_bank_base[m_ecs_bank_src[0]] + (0x2000 << 1));
r23623	r23624
684	684	save_item(NAME(m_ecs_bank_src));
685	685	machine().save().register_postload(save_prepost_delegate(FUNC(intv_state::ecs_banks_restore), this));
686	686	}
687
	687
688	688	// intvkbd
689	689	if (m_is_keybd)
690	690	{

trunk/src/mess/machine/mboard.c
r23623	r23624
109	109	else
110	110	{
111	111	/* looking for a piece in this line and clear bit in data if found */
112
	112
113	113	for (i_AH = 0; i_AH < 8; i_AH = i_AH + 1)
114	114	if (IsPiece(64 - (i_18 * 8 + 8 - i_AH)))
115	115	data &= ~(1 << i_AH); // clear bit
116
	116
117	117	read_board_flag = TRUE;
118	118	}
119	119	}

trunk/src/mess/machine/victor9kb.h
r23623	r23624
32	32
33	33	#define MCFG_VICTOR9K_KEYBOARD_ADD(_kbrdy) \
34	34	MCFG_DEVICE_ADD(VICTOR9K_KEYBOARD_TAG, VICTOR9K_KEYBOARD, 0) \
35		downcast<victor9k_keyboard_device *>(device)->set_kbrdy_callback(DEVCB2_##_kbrdy); \
	35	downcast<victor9k_keyboard_device *>(device)->set_kbrdy_callback(DEVCB2_##_kbrdy);
36	36
37	37
38
39	38	//**************************************************************************
40	39	// TYPE DEFINITIONS
41	40	//**************************************************************************

trunk/src/mess/machine/msx.c
r23623	r23624
858	858
859	859	size = layout->size;
860	860	option = layout->option;
861
	861
862	862	if (layout->type != SLOT_CARTRIDGE1 && layout->type != SLOT_CARTRIDGE2)
863	863	{
864	864	int size_tmp = 0;

trunk/src/mess/machine/zx8302.h
r23623	r23624
172	172
173	173	enum
174	174	{
175		INT_GAP = 0x01,
	175	INT_GAP = 0x01,
176	176	INT_INTERFACE = 0x02,
177	177	INT_TRANSMIT = 0x04,
178	178	INT_FRAME = 0x08,
r23623	r23624
181	181
182	182	enum
183	183	{
184		STATUS_NETWORK_PORT = 0x01,
	184	STATUS_NETWORK_PORT = 0x01,
185	185	STATUS_TX_BUFFER_FULL = 0x02,
186	186	STATUS_RX_BUFFER_FULL = 0x04,
187	187	STATUS_MICRODRIVE_GAP = 0x08,

trunk/src/mess/machine/sns_sgb.c
r23623	r23624
1	1	/***********************************************************************************************************
2
	2
3	3	Super Game Boy emulation (for SNES/SFC)
4
	4
5	5	Copyright MESS Team.
6	6	Visit http://mamedev.org for licensing and usage restrictions.
7	7
8	8	TODO: almost everything
9
	9
10	10	***********************************************************************************************************/
11	11
12	12
r23623	r23624
123	123	UINT16 address = offset & 0xffff;
124	124
125	125	//LY counter
126		if (address == 0x6000)
	126	if (address == 0x6000)
127	127	{
128	128	m_sgb_ly = 0;// GameBoy PPU LY here
129	129	m_sgb_row = m_lcd_row;
130	130	return m_sgb_ly;
131	131	}
132
	132
133	133	//command ready port
134		if (address == 0x6002)
	134	if (address == 0x6002)
135	135	{
136	136	bool data = (m_packetsize > 0);
137		if (data)
	137	if (data)
138	138	{
139		for (int i = 0; i < 16; i++)
	139	for (int i = 0; i < 16; i++)
140	140	m_joy_pckt[i] = m_packet_data[0][i];
141		m_packetsize--;
	141	m_packetsize--;
142	142
143	143	//hack because we still don't emulate input packets!
144	144	if (!m_packetsize) m_packetsize = 64;
145	145
146	146	// shift packet
147		for (int i = 0; i < m_packetsize; i++)
	147	for (int i = 0; i < m_packetsize; i++)
148	148	for (int j = 0; j < 16; j++)
149	149	m_packet_data[i][j] = m_packet_data[i + 1][j];
150	150	}
151	151	return data;
152	152	}
153
	153
154	154	//ICD2 revision
155		if (address == 0x600f)
	155	if (address == 0x600f)
156	156	return 0x21;
157
	157
158	158	//command port
159		if ((address & 0xfff0) == 0x7000)
	159	if ((address & 0xfff0) == 0x7000)
160	160	return m_joy_pckt[address & 0x0f];
161
	161
162	162	//VRAM port
163		if (address == 0x7800)
	163	if (address == 0x7800)
164	164	{
165	165	UINT8 data = m_lcd_output[m_vram_offs];
166	166	m_vram_offs = (m_vram_offs + 1) % 320;
167	167	return data;
168	168	}
169	169
170		return 0x00; // this should never happen?
	170	return 0x00; // this should never happen?
171	171	}
172	172
173		void sns_rom_sgb_device::lcd_render(UINT32 *source)
	173	void sns_rom_sgb_device::lcd_render(UINT32 *source)
174	174	{
175	175	memset(m_lcd_output, 0x00, 320 * sizeof(UINT16));
176
	176
177	177	for (int y = 0; y < 8; y++)
178	178	{
179		for (int x = 0; x < 160; x++)
	179	for (int x = 0; x < 160; x++)
180	180	{
181	181	UINT32 pixel = *source++;
182	182	UINT16 addr = y * 2 + (x / 8 * 16);
r23623	r23624
189	189	WRITE8_MEMBER( sns_rom_sgb_device::chip_write )
190	190	{
191	191	UINT16 address = offset & 0xffff;
192
	192
193	193	//VRAM port
194		if (address == 0x6001)
	194	if (address == 0x6001)
195	195	{
196	196	m_vram = data;
197	197	m_vram_offs = 0;
198
	198
199	199	UINT8 offset = (m_sgb_row - (4 - (m_vram - (m_sgb_ly & 3)))) & 3;
200	200	lcd_render(m_lcd_buffer + offset * 160 * 8);
201
	201
202	202	return;
203	203	}
204
	204
205	205	//control port
206		if (address == 0x6003)
	206	if (address == 0x6003)
207	207	{
208		if ((m_port & 0x80) == 0x00 && (data & 0x80) == 0x80)
	208	if ((m_port & 0x80) == 0x00 && (data & 0x80) == 0x80)
209	209	{
210	210	//reset
211	211	}
212	212
213		switch (data & 3)
	213	switch (data & 3)
214	214	{
215	215	//change CPU frequency
216	216	}
217	217	m_port = data;
218	218	return;
219	219	}
220
221		if (address == 0x6004)
	220
	221	if (address == 0x6004)
222	222	{
223	223	//joypad 1
224		m_joy1 = data;
225		return;
	224	m_joy1 = data;
	225	return;
226	226	}
227		if (address == 0x6005)
	227	if (address == 0x6005)
228	228	{
229	229	//joypad 2
230		m_joy2 = data;
231		return;
	230	m_joy2 = data;
	231	return;
232	232	}
233		if (address == 0x6006)
	233	if (address == 0x6006)
234	234	{
235	235	//joypad 3
236		m_joy3 = data;
237		return;
	236	m_joy3 = data;
	237	return;
238	238	}
239		if (address == 0x6007)
	239	if (address == 0x6007)
240	240	{
241	241	//joypad 4
242		m_joy4 = data;
243		return;
	242	m_joy4 = data;
	243	return;
244	244	}
245
246		}
247	245
	246	}

trunk/src/mess/machine/sns_sgb.h
r23623	r23624
14	14	public:
15	15	// construction/destruction
16	16	sns_rom_sgb_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
17
	17
18	18	// device-level overrides
19	19	virtual void device_start();
20	20	virtual void device_reset();
r23623	r23624
25	25	virtual DECLARE_READ8_MEMBER(read_h);
26	26	virtual DECLARE_READ8_MEMBER(chip_read);
27	27	virtual DECLARE_WRITE8_MEMBER(chip_write);
28
	28
29	29	virtual DECLARE_READ8_MEMBER(gb_cart_r);
30	30	virtual DECLARE_WRITE8_MEMBER(gb_bank_w);
31	31	virtual DECLARE_READ8_MEMBER(gb_ram_r);

trunk/src/mess/machine/concept_exp.c
r23623	r23624
1	1	/**********************************************************************
2
	2
3	3	Corvus Concept expansion port emulation
4
	4
5	5	Copyright MESS Team.
6	6	Visit http://mamedev.org for licensing and usage restrictions.
7
8
	7
	8
9	9	FIXME: Concept expansion ports should just use the Apple II Bus device!
10		The code below is outdated and inaccurate!
11
	10	The code below is outdated and inaccurate!
	11
12	12	**********************************************************************/
13	13
14	14	#include "machine/concept_exp.h"
r23623	r23624
82	82	{
83	83	if (m_card)
84	84	return m_card->reg_r(space, offset);
85
	85
86	86	return 0;
87	87	}
88	88
r23623	r23624
139	139	LS_8IN_bit = 5, // 1 if 8" floppy drive?
140	140	LS_DSKCHG_bit = 6, // 0 if disk changed, 1 if not
141	141	LS_SD_bit = 7, // 1 if single density
142
	142
143	143	LS_DRQ_mask = (1 << LS_DRQ_bit),
144	144	LS_INT_mask = (1 << LS_INT_bit),
145	145	LS_SS_mask = (1 << LS_SS_bit),
r23623	r23624
156	156	LC_MOTOROF_bit = 5, // 1 if motor to be turned off
157	157	LC_FLP8IN_bit = 6, // 1 to select 8", 0 for 5"1/4 (which I knew what it means)
158	158	LC_FMMFM_bit = 7, // 1 to select single density, 0 for double
159
	159
160	160	LC_FLPSD1_mask = (1 << LC_FLPSD1_bit),
161	161	LC_DE0_mask = (1 << LC_DE0_bit),
162	162	LC_DE1_mask = (1 << LC_DE1_bit),
r23623	r23624
209	209	{
210	210	switch (offset)
211	211	{
212		case 0: // LOCAL STATUS REG
	212	case 0: // LOCAL STATUS REG
213	213	return m_fdc_local_status;
214
215		case 8: // FDC STATUS REG
	214
	215	case 8: // FDC STATUS REG
216	216	return wd17xx_status_r(m_wd179x, space, offset);
217
218		case 9: // FDC TRACK REG
	217
	218	case 9: // FDC TRACK REG
219	219	return wd17xx_track_r(m_wd179x, space, offset);
220
221		case 10: // FDC SECTOR REG
	220
	221	case 10: // FDC SECTOR REG
222	222	return wd17xx_sector_r(m_wd179x, space, offset);
223
224		case 11: // FDC DATA REG
	223
	224	case 11: // FDC DATA REG
225	225	return wd17xx_data_r(m_wd179x, space, offset);
226	226	}
227
	227
228	228	return 0;
229	229	}
230	230
r23623	r23624
234	234
235	235	switch (offset)
236	236	{
237		case 0: // LOCAL COMMAND REG
	237	case 0: // LOCAL COMMAND REG
238	238	m_fdc_local_command = data;
239
	239
240	240	wd17xx_set_side(m_wd179x, (data & LC_FLPSD1_mask) != 0);
241	241	current_drive = ((data >> LC_DE0_bit) & 1) \| ((data >> (LC_DE1_bit-1)) & 2);
242	242	wd17xx_set_drive(m_wd179x, current_drive);
r23623	r23624
246	246	wd17xx_dden_w(m_wd179x, BIT(data, 7));
247	247	floppy_drive_set_ready_state(floppy_get_device(machine(), current_drive), 1, 0);
248	248	break;
249
250		case 8: // FDC COMMAMD REG
	249
	250	case 8: // FDC COMMAMD REG
251	251	wd17xx_command_w(m_wd179x, space, offset, data);
252	252	break;
253
254		case 9: // FDC TRACK REG
	253
	254	case 9: // FDC TRACK REG
255	255	wd17xx_track_w(m_wd179x, space, offset, data);
256	256	break;
257
258		case 10: // FDC SECTOR REG
	257
	258	case 10: // FDC SECTOR REG
259	259	wd17xx_sector_w(m_wd179x, space, offset, data);
260	260	break;
261
262		case 11: // FDC DATA REG
	261
	262	case 11: // FDC DATA REG
263	263	wd17xx_data_w(m_wd179x, space, offset, data);
264	264	break;
265	265	}
r23623	r23624
276	276	#if 1
277	277	/* SSSD 8" */
278	278	LEGACY_FLOPPY_OPTION(concept, "img", "Corvus Concept 8\" SSSD disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
279		HEADS([1])
280		TRACKS([77])
281		SECTORS([26])
282		SECTOR_LENGTH([128])
283		FIRST_SECTOR_ID([1]))
	279	HEADS([1])
	280	TRACKS([77])
	281	SECTORS([26])
	282	SECTOR_LENGTH([128])
	283	FIRST_SECTOR_ID([1]))
284	284	#elif 0
285	285	/* SSDD 8" (according to ROMs) */
286	286	LEGACY_FLOPPY_OPTION(concept, "img", "Corvus Concept 8\" SSDD disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
287		HEADS([1])
288		TRACKS([77])
289		SECTORS([26])
290		SECTOR_LENGTH([256])
291		FIRST_SECTOR_ID([1]))
	287	HEADS([1])
	288	TRACKS([77])
	289	SECTORS([26])
	290	SECTOR_LENGTH([256])
	291	FIRST_SECTOR_ID([1]))
292	292	#elif 0
293	293	/* Apple II DSDD 5"1/4 (according to ROMs) */
294	294	LEGACY_FLOPPY_OPTION(concept, "img", "Corvus Concept Apple II 5\"1/4 DSDD disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
295		HEADS([2])
296		TRACKS([35])
297		SECTORS([16])
298		SECTOR_LENGTH([256])
299		FIRST_SECTOR_ID([1]))
	295	HEADS([2])
	296	TRACKS([35])
	297	SECTORS([16])
	298	SECTOR_LENGTH([256])
	299	FIRST_SECTOR_ID([1]))
300	300	#elif 0
301	301	/* actual formats found */
302	302	LEGACY_FLOPPY_OPTION(concept, "img", "Corvus Concept 5\"1/4 DSDD disk image (256-byte sectors)", basicdsk_identify_default, basicdsk_construct_default, NULL,
303		HEADS([2])
304		TRACKS([80])
305		SECTORS([16])
306		SECTOR_LENGTH([256])
307		FIRST_SECTOR_ID([1]))
	303	HEADS([2])
	304	TRACKS([80])
	305	SECTORS([16])
	306	SECTOR_LENGTH([256])
	307	FIRST_SECTOR_ID([1]))
308	308	#else
309	309	LEGACY_FLOPPY_OPTION(concept, "img", "Corvus Concept 5\"1/4 DSDD disk image (512-byte sectors)", basicdsk_identify_default, basicdsk_construct_default, NULL,
310		HEADS([2])
311		TRACKS([80])
312		SECTORS([9])
313		SECTOR_LENGTH([512])
314		FIRST_SECTOR_ID([1]))
	310	HEADS([2])
	311	TRACKS([80])
	312	SECTORS([9])
	313	SECTOR_LENGTH([512])
	314	FIRST_SECTOR_ID([1]))
315	315	#endif
316	316	LEGACY_FLOPPY_OPTIONS_END
317	317
r23623	r23624
358	358	{
359	359	switch (offset)
360	360	{
361		case 0: // HDC Data Register
	361	case 0: // HDC Data Register
362	362	return corvus_hdc_data_r(space, offset);
363
364		case 1: // HDC Status Register
	363
	364	case 1: // HDC Status Register
365	365	return corvus_hdc_status_r(space, offset);
366	366	}
367
	367
368	368	return 0;
369	369	}
370	370
r23623	r23624
373	373	{
374	374	switch (offset)
375	375	{
376		case 0: // HDC Data Register
	376	case 0: // HDC Data Register
377	377	corvus_hdc_data_w(space, offset, data);
378	378	break;
379	379	}
r23623	r23624
396	396	{
397	397	return MACHINE_CONFIG_NAME(hdc);
398	398	}
399

trunk/src/mess/machine/concept_exp.h
r23623	r23624
54	54	public:
55	55	// construction/destruction
56	56	concept_exp_card_device(const machine_config &mconfig, device_t &device);
57
	57
58	58	DECLARE_READ8_MEMBER( reg_r ) { return 0xff; }
59	59	DECLARE_READ8_MEMBER( rom_r ) { return 0xff; }
60	60	DECLARE_WRITE8_MEMBER( reg_w ) {}
61	61	DECLARE_WRITE8_MEMBER( rom_w ) {}
62
	62
63	63	protected:
64	64	};
65	65
r23623	r23624
70	70	public:
71	71	// construction/destruction
72	72	concept_fdc_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
73
	73
74	74	DECLARE_READ8_MEMBER(reg_r);
75	75	DECLARE_READ8_MEMBER(rom_r);
76	76	DECLARE_WRITE8_MEMBER(reg_w);
77	77
78	78	DECLARE_WRITE_LINE_MEMBER(intrq_w);
79	79	DECLARE_WRITE_LINE_MEMBER(drq_w);
80
	80
81	81	// device-level overrides
82	82	virtual void device_start();
83	83	virtual void device_reset();
84	84	virtual machine_config_constructor device_mconfig_additions() const;
85
	85
86	86	protected:
87	87	device_t *m_wd179x;
88	88
r23623	r23624
96	96	public:
97	97	// construction/destruction
98	98	concept_hdc_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
99
	99
100	100	DECLARE_READ8_MEMBER( reg_r );
101	101	DECLARE_READ8_MEMBER( rom_r );
102	102	DECLARE_WRITE8_MEMBER( reg_w );

trunk/src/mess/machine/md_rom.c
r23623	r23624
1212	1212	// data output mode bit 1 ? (never written by game)
1213	1213	break;
1214	1214	default:
1215		if (data & 0x100) // data input (only connected to D0 ?)
	1215	if (data & 0x100) // data input (only connected to D0 ?)
1216	1216	{
1217	1217	// 4-bit hardware register ($400004 corresponds to bit0, $400006 to bit1, etc)
1218	1218	int shift = (offset - 2) & 3;

trunk/src/mess/machine/md_rom.h
r23623	r23624
155	155	public:
156	156	// construction/destruction
157	157	md_rom_16mj2_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
158
	158
159	159	// reading and writing
160	160	virtual DECLARE_READ16_MEMBER(read);
161	161	};
r23623	r23624
447	447	public:
448	448	// construction/destruction
449	449	md_rom_tekkensp_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
450
	450
451	451	// device-level overrides
452	452	virtual void device_start();
453	453	virtual void device_reset();
454
	454
455	455	// reading and writing
456	456	virtual DECLARE_READ16_MEMBER(read);
457	457	virtual DECLARE_WRITE16_MEMBER(write);
458
	458
459	459	private:
460	460	UINT16 m_reg;
461	461	};

trunk/src/mess/machine/apollo.c
r23623	r23624
691	691
692	692	READ8_MEMBER( apollo_state::apollo_pic8259_get_slave_ack )
693	693	{
694		MLOG1(("apollo_pic8259_get_slave_ack: offset=%x", offset));
	694	MLOG1(("apollo_pic8259_get_slave_ack: offset=%x", offset));
695	695
696		return offset == 3 ? m_pic8259_slave->inta_r() : 0;
	696	return offset == 3 ? m_pic8259_slave->inta_r() : 0;
697	697	}
698	698
699	699	WRITE_LINE_MEMBER( apollo_state::apollo_pic8259_master_set_int_line ) {

trunk/src/mess/machine/ds1315.c
r23623	r23624
216	216	We always return the host's time when asked.
217	217	*/
218	218	}
219
220

trunk/src/mess/machine/ds1315.h
r23623	r23624
48	48
49	49	void fill_raw_data();
50	50	void input_raw_data();
51
	51
52	52	int m_count;
53	53	ds1315_mode_t m_mode;
54	54	UINT8 m_raw_data[8*8];

trunk/src/mess/machine/vp575.c
r23623	r23624
65	65
66	66	static MACHINE_CONFIG_FRAGMENT( vp575 )
67	67	MCFG_VIP_EXPANSION_SLOT_ADD("exp1", XTAL_3_52128MHz/2, vip_expansion_cards, NULL)
68		MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp1_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp1_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp1_dma_in_w))
	68	MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp1_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp1_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp1_dma_in_w))
69	69	MCFG_VIP_EXPANSION_SLOT_ADD("exp2", XTAL_3_52128MHz/2, vip_expansion_cards, NULL)
70		MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp2_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp2_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp2_dma_in_w))
	70	MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp2_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp2_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp2_dma_in_w))
71	71	MCFG_VIP_EXPANSION_SLOT_ADD("exp3", XTAL_3_52128MHz/2, vip_expansion_cards, NULL)
72		MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp3_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp3_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp3_dma_in_w))
	72	MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp3_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp3_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp3_dma_in_w))
73	73	MCFG_VIP_EXPANSION_SLOT_ADD("exp4", XTAL_3_52128MHz/2, vip_expansion_cards, NULL)
74		MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp4_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp4_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp4_dma_in_w))
	74	MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp4_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp4_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp4_dma_in_w))
75	75	MCFG_VIP_EXPANSION_SLOT_ADD("exp5", XTAL_3_52128MHz/2, vip_expansion_cards, NULL)
76		MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp5_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp5_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp5_dma_in_w))
	76	MCFG_VIP_EXPANSION_SLOT_CALLBACKS(DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp5_int_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp5_dma_out_w), DEVWRITELINE(DEVICE_SELF_OWNER, vp575_device, exp5_dma_in_w))
77	77	MACHINE_CONFIG_END
78	78
79	79

trunk/src/mess/machine/pce_cd.c
r23623	r23624
98	98	/* set up adpcm related things */
99	99	m_adpcm_ram = auto_alloc_array_clear(machine(), UINT8, PCE_ADPCM_RAM_SIZE);
100	100	m_adpcm_clock_divider = 1;
101
	101
102	102	/* Set up cd command buffer */
103	103	m_command_buffer = auto_alloc_array_clear(machine(), UINT8, PCE_CD_COMMAND_BUFFER_SIZE);
104	104	m_command_buffer_index = 0;
105
	105
106	106	/* Set up Arcade Card RAM buffer */
107	107	m_acard_ram = auto_alloc_array_clear(machine(), UINT8, PCE_ACARD_RAM_SIZE);
108
	108
109	109	m_data_buffer = auto_alloc_array_clear(machine(), UINT8, 8192);
110	110	m_data_buffer_size = 0;
111	111	m_data_buffer_index = 0;
112
	112
113	113	m_subcode_buffer = auto_alloc_array(machine(), UINT8, 96);
114
	114
115	115	m_data_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pce_cd_device::data_timer_callback),this));
116	116	m_data_timer->adjust(attotime::never);
117	117	m_adpcm_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pce_cd_device::adpcm_dma_timer_callback),this));
118	118	m_adpcm_dma_timer->adjust(attotime::never);
119
	119
120	120	m_cdda_fadeout_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pce_cd_device::cdda_fadeout_callback),this));
121	121	m_cdda_fadeout_timer->adjust(attotime::never);
122	122	m_cdda_fadein_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pce_cd_device::cdda_fadein_callback),this));
123	123	m_cdda_fadein_timer->adjust(attotime::never);
124
	124
125	125	m_adpcm_fadeout_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pce_cd_device::adpcm_fadeout_callback),this));
126	126	m_adpcm_fadeout_timer->adjust(attotime::never);
127	127	m_adpcm_fadein_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pce_cd_device::adpcm_fadein_callback),this));
r23623	r23624
187	187	}
188	188
189	189	void pce_cd_device::device_reset()
190		{
	190	{
191	191	m_adpcm_read_buf = 0;
192	192	m_adpcm_write_buf = 0;
193
	193
194	194	// TODO: add CD-DA stop command here
195	195	//m_cdda_status = PCE_CD_CDDA_OFF;
196	196	//m_cdda->stop_audio();
197	197
198	198	memset(m_regs, 0, sizeof(m_regs));
199
	199
200	200	m_regs[0x0c] \|= PCE_CD_ADPCM_STOP_FLAG;
201	201	m_regs[0x0c] &= ~PCE_CD_ADPCM_PLAY_FLAG;
202	202	//m_regs[0x03] = (m_regs[0x03] & ~0x0c) \| (PCE_CD_SAMPLE_STOP_PLAY);
r23623	r23624
286	286	WRITE_LINE_MEMBER( pce_cd_device::msm5205_int )
287	287	{
288	288	UINT8 msm_data;
289
	289
290	290	// popmessage("%08x %08x %08x %02x %02x",m_msm_start_addr,m_msm_end_addr,m_msm_half_addr,m_regs[0x0c],m_regs[0x0d]);
291
	291
292	292	if (m_msm_idle)
293	293	return;
294
	294
295	295	/* Supply new ADPCM data */
296	296	msm_data = (m_msm_nibble) ? (m_adpcm_ram[m_msm_start_addr] & 0x0f) : ((m_adpcm_ram[m_msm_start_addr] & 0xf0) >> 4);
297
	297
298	298	m_msm->data_w(msm_data);
299	299	m_msm_nibble ^= 1;
300
	300
301	301	if (m_msm_nibble == 0)
302	302	{
303	303	m_msm_start_addr++;
304
	304
305	305	if (m_msm_start_addr == m_msm_half_addr)
306	306	{
307	307	//set_irq_line(PCE_CD_IRQ_SAMPLE_FULL_PLAY, CLEAR_LINE);
308	308	//set_irq_line(PCE_CD_IRQ_SAMPLE_HALF_PLAY, ASSERT_LINE);
309	309	}
310
	310
311	311	if (m_msm_start_addr > m_msm_end_addr)
312	312	{
313	313	//set_irq_line(PCE_CD_IRQ_SAMPLE_HALF_PLAY, CLEAR_LINE);
r23623	r23624
328	328	m_scsi_MSG = 0;
329	329	m_message_after_status = 1;
330	330	m_status_sent = m_message_sent = 0;
331
	331
332	332	if (status == SCSI_STATUS_OK)
333	333	{
334	334	m_regs[0x01] = 0x00;
r23623	r23624
361	361	UINT32 frame = ((m_command_buffer[1] & 0x1f) << 16) \| (m_command_buffer[2] << 8) \| m_command_buffer[3];
362	362	UINT32 frame_count = m_command_buffer[4];
363	363	printf("%08x %08x\n",frame,frame_count);
364
	364
365	365	/* Check for presence of a CD */
366	366	if (!m_cd_file)
367	367	{
368	368	reply_status_byte(SCSI_CHECK_CONDITION);
369	369	return;
370	370	}
371
	371
372	372	if (m_cdda_status != PCE_CD_CDDA_OFF)
373	373	{
374	374	m_cdda_status = PCE_CD_CDDA_OFF;
375	375	m_cdda->stop_audio();
376	376	m_end_mark = 0;
377	377	}
378
	378
379	379	m_current_frame = frame;
380	380	m_end_frame = frame + frame_count;
381
	381
382	382	if (frame_count == 0)
383	383	{
384	384	/* Star Breaker uses this */
r23623	r23624
389	389	{
390	390	m_data_timer->adjust(attotime::from_hz(PCE_CD_DATA_FRAMES_PER_SECOND), 0, attotime::from_hz(PCE_CD_DATA_FRAMES_PER_SECOND));
391	391	}
392
	392
393	393	/* TODO: correct place? */
394	394	set_irq_line(PCE_CD_IRQ_TRANSFER_READY, ASSERT_LINE);
395	395	}
r23623	r23624
398	398	void pce_cd_device::nec_set_audio_start_position()
399	399	{
400	400	UINT32 frame = 0;
401
	401
402	402	if (!m_cd_file)
403	403	{
404	404	/* Throw some error here */
405	405	reply_status_byte(SCSI_CHECK_CONDITION);
406	406	return;
407	407	}
408
	408
409	409	switch (m_command_buffer[9] & 0xC0)
410	410	{
411	411	case 0x00:
r23623	r23624
415	415	case 0x40:
416	416	{
417	417	UINT8 m,s,f;
418
	418
419	419	m = bcd_2_dec(m_command_buffer[2]);
420	420	s = bcd_2_dec(m_command_buffer[3]);
421	421	f = bcd_2_dec(m_command_buffer[4]);
422
	422
423	423	frame = f + 75 * (s + m * 60);
424	424	// PCE tries to be clever here and set (start of track + track pregap size) to skip the pregap
425	425	// (I guess it wants the TOC to have the real start sector for data tracks and the start of the pregap for audio?)
r23623	r23624
434	434	//assert(NULL == nec_set_audio_start_position);
435	435	break;
436	436	}
437
	437
438	438	m_current_frame = frame;
439
	439
440	440	if (m_cdda_status == PCE_CD_CDDA_PAUSED)
441	441	{
442	442	m_cdda_status = PCE_CD_CDDA_OFF;
r23623	r23624
463	463	m_cdda_play_mode = 3;
464	464	}
465	465	}
466
	466
467	467	reply_status_byte(SCSI_STATUS_OK);
468	468	set_irq_line(PCE_CD_IRQ_TRANSFER_DONE, ASSERT_LINE);
469	469	}
r23623	r23624
472	472	void pce_cd_device::nec_set_audio_stop_position()
473	473	{
474	474	UINT32 frame = 0;
475
	475
476	476	if (!m_cd_file)
477	477	{
478	478	/* Throw some error here */
479	479	reply_status_byte(SCSI_CHECK_CONDITION);
480	480	return;
481	481	}
482
	482
483	483	switch (m_command_buffer[9] & 0xC0)
484	484	{
485	485	case 0x00:
r23623	r23624
489	489	case 0x40:
490	490	{
491	491	UINT8 m,s,f;
492
	492
493	493	m = bcd_2_dec(m_command_buffer[2]);
494	494	s = bcd_2_dec(m_command_buffer[3]);
495	495	f = bcd_2_dec(m_command_buffer[4]);
496
	496
497	497	frame = f + 75 * (s + m * 60);
498	498	// if (frame >= 525) // TODO: seven seconds gap? O_o
499	499	// frame -= 525;
r23623	r23624
507	507	//assert(NULL == nec_set_audio_start_position);
508	508	break;
509	509	}
510
	510
511	511	m_end_frame = frame;
512	512	m_cdda_play_mode = m_command_buffer[1] & 0x03;
513
	513
514	514	if (m_cdda_play_mode)
515	515	{
516	516	if (m_cdda_status == PCE_CD_CDDA_PAUSED)
r23623	r23624
533	533	m_end_mark = 0;
534	534	// assert(NULL == nec_set_audio_stop_position);
535	535	}
536
	536
537	537	reply_status_byte(SCSI_STATUS_OK);
538	538	set_irq_line(PCE_CD_IRQ_TRANSFER_DONE, ASSERT_LINE);
539	539	}
r23623	r23624
547	547	reply_status_byte(SCSI_CHECK_CONDITION);
548	548	return;
549	549	}
550
	550
551	551	/* If there was no cdda playing, throw an error */
552	552	if (m_cdda_status == PCE_CD_CDDA_OFF)
553	553	{
554	554	reply_status_byte(SCSI_CHECK_CONDITION);
555	555	return;
556	556	}
557
	557
558	558	m_cdda_status = PCE_CD_CDDA_PAUSED;
559	559	m_current_frame = m_cdda->get_audio_lba();
560	560	m_cdda->pause_audio(1);
r23623	r23624
566	566	{
567	567	/* WP - I do not have access to chds with subchannel information yet, so I'm faking something here */
568	568	UINT32 msf_abs, msf_rel, track, frame;
569
	569
570	570	if (!m_cd_file)
571	571	{
572	572	/* Throw some error here */
573	573	reply_status_byte(SCSI_CHECK_CONDITION);
574	574	return;
575	575	}
576
	576
577	577	frame = m_current_frame;
578
	578
579	579	switch (m_cdda_status)
580	580	{
581	581	case PCE_CD_CDDA_PAUSED:
r23623	r23624
590	590	m_data_buffer[0] = 3;
591	591	break;
592	592	}
593
	593
594	594	msf_abs = lba_to_msf_alt(frame);
595	595	track = cdrom_get_track(m_cd_file, frame);
596	596	msf_rel = lba_to_msf_alt(frame - cdrom_get_track_start(m_cd_file, track));
597
	597
598	598	m_data_buffer[1] = 0x01 \| ((cdrom_get_track_type(m_cd_file, cdrom_get_track(m_cd_file, track+1)) == CD_TRACK_AUDIO) ? 0x00 : 0x40);
599	599	m_data_buffer[2] = dec_2_bcd(track+1); /* track */
600	600	m_data_buffer[3] = 1; /* index */
r23623	r23624
605	605	m_data_buffer[8] = dec_2_bcd((msf_abs >> 8) & 0xFF); /* S (absolute) */
606	606	m_data_buffer[9] = dec_2_bcd(msf_abs & 0xFF); /* F (absolute) */
607	607	m_data_buffer_size = 10;
608
	608
609	609	m_data_buffer_index = 0;
610	610	m_data_transferred = 1;
611	611	m_scsi_IO = 1;
r23623	r23624
618	618	UINT32 frame, msf, track = 0;
619	619	const cdrom_toc *toc;
620	620	logerror("nec get dir info\n");
621
	621
622	622	if (!m_cd_file)
623	623	{
624	624	/* Throw some error here */
625	625	reply_status_byte(SCSI_CHECK_CONDITION);
626	626	}
627
	627
628	628	toc = cdrom_get_toc(m_cd_file);
629
	629
630	630	switch (m_command_buffer[1])
631	631	{
632	632	case 0x00: /* Get first and last track numbers */
r23623	r23624
638	638	frame = toc->tracks[toc->numtrks-1].logframeofs;
639	639	frame += toc->tracks[toc->numtrks-1].frames;
640	640	msf = lba_to_msf(frame + 150);
641
	641
642	642	m_data_buffer[0] = (msf >> 16) & 0xFF; /* M */
643	643	m_data_buffer[1] = (msf >> 8) & 0xFF; /* S */
644	644	m_data_buffer[2] = msf & 0xFF; /* F */
r23623	r23624
672	672	// assert(pce_cd_nec_get_dir_info == NULL); // Not implemented yet
673	673	break;
674	674	}
675
	675
676	676	m_data_buffer_index = 0;
677	677	m_data_transferred = 1;
678	678	m_scsi_IO = 1;
r23623	r23624
702	702	{ 0xDE,10, &pce_cd_device::nec_get_dir_info }, /* NEC GET DIR INFO */
703	703	{ 0xFF, 1, &pce_cd_device::end_of_list } /* end of list marker */
704	704	};
705
	705
706	706	if (m_scsi_REQ && m_scsi_ACK)
707	707	{
708	708	/* Command byte received */
709	709	logerror("Command byte $%02X received\n", m_regs[0x01]);
710
	710
711	711	/* Check for buffer overflow */
712	712	assert(m_command_buffer_index < PCE_CD_COMMAND_BUFFER_SIZE);
713
	713
714	714	m_command_buffer[m_command_buffer_index] = m_regs[0x01];
715	715	m_command_buffer_index++;
716	716	m_scsi_REQ = 0;
717	717	}
718
	718
719	719	if (! m_scsi_REQ && ! m_scsi_ACK && m_command_buffer_index)
720	720	{
721	721	int i = 0;
722
	722
723	723	logerror("Check if command done\n");
724
	724
725	725	for(i = 0; m_command_buffer[0] > pce_cd_commands[i].command_byte; i++);
726
	726
727	727	/* Check for unknown commands */
728	728	if (m_command_buffer[0] != pce_cd_commands[i].command_byte)
729	729	{
r23623	r23624
732	732	popmessage("CD command 0x03 issued (Request Sense), contact MESSdev");
733	733	}
734	734	assert(m_command_buffer[0] == pce_cd_commands[i].command_byte);
735
	735
736	736	if (m_command_buffer_index == pce_cd_commands[i].command_size)
737	737	{
738	738	//printf("%02x command issued\n",m_command_buffer[0]);
r23623	r23624
757	757	m_scsi_REQ = 0;
758	758	m_status_sent = 1;
759	759	}
760
	760
761	761	if (! m_scsi_REQ && ! m_scsi_ACK && m_status_sent)
762	762	{
763	763	m_status_sent = 0;
r23623	r23624
777	777	{
778	778	m_scsi_REQ = 0;
779	779	}
780
	780
781	781	if (! m_scsi_REQ && ! m_scsi_ACK)
782	782	{
783	783	if (m_data_buffer_index == m_data_buffer_size)
r23623	r23624
814	814	m_scsi_REQ = 0;
815	815	m_message_sent = 1;
816	816	}
817
	817
818	818	if (! m_scsi_REQ && ! m_scsi_ACK && m_message_sent)
819	819	{
820	820	m_message_sent = 0;
r23623	r23624
842	842	}
843	843	m_scsi_last_RST = m_scsi_RST;
844	844	}
845
	845
846	846	/* Check if bus can be freed */
847	847	if (! m_scsi_SEL && ! m_scsi_BSY && m_selected)
848	848	{
r23623	r23624
851	851	m_scsi_CD = m_scsi_MSG = m_scsi_IO = m_scsi_REQ = 0;
852	852	set_irq_line(PCE_CD_IRQ_TRANSFER_DONE, CLEAR_LINE);
853	853	}
854
	854
855	855	/* Select the CD device */
856	856	if (m_scsi_SEL)
857	857	{
r23623	r23624
863	863	m_scsi_MSG = m_scsi_IO = 0;
864	864	}
865	865	}
866
	866
867	867	if (m_scsi_ATN)
868	868	{
869	869	}
r23623	r23624
900	900	}
901	901	}
902	902	}
903
	903
904	904	/* FIXME: presumably CD-DA needs an irq interface for this */
905	905	if (m_cdda->audio_ended() && m_end_mark == 1)
906	906	{
r23623	r23624
919	919	m_regs[0x03] \|= num;
920	920	else
921	921	m_regs[0x03] &= ~num;
922
	922
923	923	if (m_regs[0x02] & m_regs[0x03] & 0x7c)
924	924	{
925	925	//printf("IRQ PEND = %02x MASK = %02x IRQ ENABLE %02X\n",m_regs[0x02] & m_regs[0x03] & 0x7c,m_regs[0x02] & 0x7c,m_regs[0x03] & 0x7c);
r23623	r23624
945	945	{
946	946	logerror("Succesfully read mode1 frame #%d\n", m_current_frame);
947	947	}
948
	948
949	949	m_data_buffer_index = 0;
950	950	m_data_buffer_size = 2048;
951	951	m_current_frame++;
952
	952
953	953	m_scsi_IO = 1;
954	954	m_scsi_CD = 0;
955
	955
956	956	if (m_current_frame == m_end_frame)
957	957	{
958	958	/* We are done, disable the timer */
r23623	r23624
997	997	TIMER_CALLBACK_MEMBER(pce_cd_device::cdda_fadeout_callback)
998	998	{
999	999	m_cdda_volume -= 0.1;
1000
	1000
1001	1001	if (m_cdda_volume <= 0)
1002	1002	{
1003	1003	m_cdda_volume = 0.0;
r23623	r23624
1014	1014	TIMER_CALLBACK_MEMBER(pce_cd_device::cdda_fadein_callback)
1015	1015	{
1016	1016	m_cdda_volume += 0.1;
1017
	1017
1018	1018	if (m_cdda_volume >= 100.0)
1019	1019	{
1020	1020	m_cdda_volume = 100.0;
r23623	r23624
1031	1031	TIMER_CALLBACK_MEMBER(pce_cd_device::adpcm_fadeout_callback)
1032	1032	{
1033	1033	m_adpcm_volume -= 0.1;
1034
	1034
1035	1035	if (m_adpcm_volume <= 0)
1036	1036	{
1037	1037	m_adpcm_volume = 0.0;
r23623	r23624
1048	1048	TIMER_CALLBACK_MEMBER(pce_cd_device::adpcm_fadein_callback)
1049	1049	{
1050	1050	m_adpcm_volume += 0.1;
1051
	1051
1052	1052	if (m_adpcm_volume >= 100.0)
1053	1053	{
1054	1054	m_adpcm_volume = 100.0;
r23623	r23624
1066	1066	WRITE8_MEMBER(pce_cd_device::intf_w)
1067	1067	{
1068	1068	logerror("%04X: write to CD interface offset %02X, data %02X\n", space.device().safe_pc(), offset, data);
1069
	1069
1070	1070	switch (offset & 0xf)
1071	1071	{
1072	1072	case 0x00: /* CDC status */
r23623	r23624
1134	1134	adpcm_stop(0);
1135	1135	m_msm->reset_w(1);
1136	1136	}
1137
	1137
1138	1138	if ((data & 0x40) && ((m_regs[0x0D] & 0x40) == 0)) // ADPCM play
1139	1139	{
1140	1140	m_msm_start_addr = (m_adpcm_read_ptr);
r23623	r23624
1143	1143	m_msm_nibble = 0;
1144	1144	adpcm_play();
1145	1145	m_msm->reset_w(0);
1146
	1146
1147	1147	//popmessage("%08x %08x",m_adpcm_read_ptr,m_adpcm_length);
1148	1148	}
1149	1149	else if ((data & 0x40) == 0)
r23623	r23624
1152	1152	adpcm_stop(0);
1153	1153	m_msm->reset_w(1);
1154	1154	}
1155
	1155
1156	1156	m_msm_repeat = BIT(data, 5);
1157
	1157
1158	1158	if (data & 0x10) //ADPCM set length
1159	1159	{
1160	1160	m_adpcm_length = (m_regs[0x09] << 8) \| m_regs[0x08];
r23623	r23624
1273	1273	{
1274	1274	m_adpcm_ram[m_adpcm_write_ptr] = get_cd_data_byte();
1275	1275	m_adpcm_write_ptr = (m_adpcm_write_ptr + 1) & 0xFFFF;
1276
	1276
1277	1277	m_regs[0x0c] &= ~4;
1278	1278	}
1279	1279	}
r23623	r23624
1288	1288	else
1289	1289	{
1290	1290	UINT8 res;
1291
	1291
1292	1292	res = m_adpcm_ram[m_adpcm_read_ptr];
1293	1293	m_adpcm_read_ptr = ((m_adpcm_read_ptr + 1) & 0xffff);
1294
	1294
1295	1295	return res;
1296	1296	}
1297	1297	}
r23623	r23624
1356	1356	data = 0xFF;
1357	1357	break;
1358	1358	}
1359
	1359
1360	1360	return data;
1361	1361	}
1362	1362
r23623	r23624
1370	1370	READ8_MEMBER(pce_cd_device::acard_r)
1371	1371	{
1372	1372	UINT8 r_num;
1373
	1373
1374	1374	if ((offset & 0x2e0) == 0x2e0)
1375	1375	{
1376	1376	switch (offset & 0x2ef)
r23623	r23624
1384	1384	case 0x2ee: return 0x10;
1385	1385	case 0x2ef: return 0x51;
1386	1386	}
1387
	1387
1388	1388	return 0;
1389	1389	}
1390
	1390
1391	1391	r_num = (offset & 0x30) >> 4;
1392
	1392
1393	1393	switch (offset & 0x0f)
1394	1394	{
1395	1395	case 0x00:
r23623	r23624
1400	1400	res = m_acard_ram[(m_acard_base_addr[r_num] + m_acard_addr_offset[r_num]) & 0x1fffff];
1401	1401	else
1402	1402	res = m_acard_ram[m_acard_base_addr[r_num] & 0x1fffff];
1403
	1403
1404	1404	if (m_acard_ctrl[r_num] & 0x1)
1405	1405	{
1406	1406	if (m_acard_ctrl[r_num] & 0x10)
r23623	r23624
1413	1413	m_acard_addr_offset[r_num] += m_acard_addr_inc[r_num];
1414	1414	}
1415	1415	}
1416
	1416
1417	1417	return res;
1418	1418	}
1419	1419	case 0x02: return (m_acard_base_addr[r_num] >> 0) & 0xff;
r23623	r23624
1426	1426	case 0x09: return m_acard_ctrl[r_num];
1427	1427	default: return 0;
1428	1428	}
1429
	1429
1430	1430	return 0;
1431	1431	}
1432	1432
1433	1433	WRITE8_MEMBER(pce_cd_device::acard_w)
1434	1434	{
1435	1435	UINT8 w_num;
1436
	1436
1437	1437	if ((offset & 0x2e0) == 0x2e0)
1438	1438	{
1439	1439	switch (offset & 0x0f)
r23623	r23624
1445	1445	case 4:
1446	1446	{
1447	1447	m_acard_shift_reg = data & 0x0f;
1448
	1448
1449	1449	if (m_acard_shift_reg != 0)
1450	1450	{
1451	1451	m_acard_shift = (m_acard_shift_reg < 8) ?
r23623	r23624
1460	1460	else
1461	1461	{
1462	1462	w_num = (offset & 0x30) >> 4;
1463
	1463
1464	1464	switch (offset & 0x0f)
1465	1465	{
1466	1466	case 0x00:
r23623	r23624
1469	1469	m_acard_ram[(m_acard_base_addr[w_num] + m_acard_addr_offset[w_num]) & 0x1fffff] = data;
1470	1470	else
1471	1471	m_acard_ram[m_acard_base_addr[w_num] & 0x1FFFFF] = data;
1472
	1472
1473	1473	if (m_acard_ctrl[w_num] & 0x1)
1474	1474	{
1475	1475	if (m_acard_ctrl[w_num] & 0x10)
r23623	r23624
1482	1482	m_acard_addr_offset[w_num] += m_acard_addr_inc[w_num];
1483	1483	}
1484	1484	}
1485
	1485
1486	1486	break;
1487
	1487
1488	1488	case 0x02: m_acard_base_addr[w_num] = (data & 0xff) \| (m_acard_base_addr[w_num] & 0xffff00); break;
1489	1489	case 0x03: m_acard_base_addr[w_num] = (data << 8) \| (m_acard_base_addr[w_num] & 0xff00ff); break;
1490	1490	case 0x04: m_acard_base_addr[w_num] = (data << 16) \| (m_acard_base_addr[w_num] & 0x00ffff); break;
1491	1491	case 0x05: m_acard_addr_offset[w_num] = (data & 0xff) \| (m_acard_addr_offset[w_num] & 0xff00); break;
1492	1492	case 0x06:
1493	1493	m_acard_addr_offset[w_num] = (data << 8) \| (m_acard_addr_offset[w_num] & 0x00ff);
1494
	1494
1495	1495	if ((m_acard_ctrl[w_num] & 0x60) == 0x40)
1496	1496	{
1497	1497	m_acard_base_addr[w_num] += m_acard_addr_offset[w_num] + ((m_acard_ctrl[w_num] & 0x08) ? 0xff0000 : 0);

trunk/src/mess/machine/pce_cd.h
r23623	r23624
105	105	UINT8 m_msm_nibble;
106	106	UINT8 m_msm_idle;
107	107	UINT8 m_msm_repeat;
108
	108
109	109	/* SCSI signals */
110	110	int m_scsi_BSY; /* Busy. Bus in use */
111	111	int m_scsi_SEL; /* Select. Initiator has won arbitration and has selected a target */
r23623	r23624
128	128	int m_data_buffer_size;
129	129	int m_data_buffer_index;
130	130	int m_data_transferred;
131
	131
132	132	/* Arcade Card specific */
133	133	UINT8 *m_acard_ram;
134	134	UINT8 m_acard_latch;
r23623	r23624
138	138	UINT16 m_acard_addr_inc[4];
139	139	UINT32 m_acard_shift;
140	140	UINT8 m_acard_shift_reg;
141
	141
142	142	UINT32 m_current_frame;
143	143	UINT32 m_end_frame;
144	144	UINT32 m_last_frame;
r23623	r23624
151	151	required_device<cdda_device> m_cdda;
152	152	required_device<nvram_device> m_nvram;
153	153	required_device<cdrom_image_device> m_cdrom;
154
	154
155	155	cdrom_file *m_cd_file;
156	156	const cdrom_toc* m_toc;
157	157	emu_timer *m_data_timer;
158	158	emu_timer *m_adpcm_dma_timer;
159
	159
160	160	emu_timer *m_cdda_fadeout_timer;
161	161	emu_timer *m_cdda_fadein_timer;
162	162	double m_cdda_volume;

trunk/src/mess/machine/pce.c
r23623	r23624
120	120	m_sys3_card = 1;
121	121	m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x080000, 0x087fff, read8_delegate(FUNC(pce_state::pce_cd_acard_wram_r),this),write8_delegate(FUNC(pce_state::pce_cd_acard_wram_w),this));
122	122	}
123
	123
124	124	if (m_cartslot->get_type() == PCE_CDSYS3U)
125	125	{
126	126	m_sys3_card = 3;
r23623	r23624
213	213
214	214	if (offset & 0x200 && m_sys3_card && m_acard) // route Arcade Card handling ports
215	215	return m_cd->acard_w(space, offset, data);
216
	216
217	217	m_cd->intf_w(space, offset, data);
218	218
219	219	m_cd->update();
r23623	r23624
238	238	case 0xc7: return 0x03;
239	239	}
240	240	}
241
	241
242	242	return m_cd->intf_r(space, offset);
243	243	}
244	244

trunk/src/mess/video/newport.h
r23623	r23624
116	116	public:
117	117	newport_video_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
118	118	~newport_video_device() {}
119
120
	119
	120
121	121	DECLARE_READ32_MEMBER( rex3_r );
122	122	DECLARE_WRITE32_MEMBER( rex3_w );
123
	123
124	124	UINT32 screen_update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect);
125
	125
126	126	protected:
127	127	// device-level overrides
128	128	virtual void device_config_complete();
129	129	virtual void device_start();
130	130	virtual void device_reset();
131
132		private:
	131
	132	private:
133	133	// internal state
134
	134
135	135	DECLARE_READ32_MEMBER( cmap0_r );
136	136	DECLARE_WRITE32_MEMBER( cmap0_w );
137	137	DECLARE_READ32_MEMBER( cmap1_r );
r23623	r23624
142	142	DECLARE_READ32_MEMBER( vc2_r );
143	143	DECLARE_WRITE32_MEMBER( vc2_w );
144	144	void DoREX3Command();
145
	145
146	146	VC2_t m_VC2;
147	147	XMAP_t m_XMAP0;
148	148	XMAP_t m_XMAP1;
149	149	REX3_t m_REX3;
150	150	UINT32 *m_base;
151	151	UINT8 m_nDrawGreen;
152		CMAP_t m_CMAP0;
	152	CMAP_t m_CMAP0;
153	153	};
154	154
155	155

trunk/src/mess/video/gba.c
r23623	r23624
53	53	for (int x = 0; x < 240; x++)
54	54	{
55	55	mask[x] = out_mask;
56
	56
57	57	if ((obj_win[x] & 0x80000000) == 0)
58	58	mask[x] = m_WINOUT >> 8;
59
	59
60	60	if (inwin1)
61	61	{
62	62	if (is_in_window(x, 1))
63	63	mask[x] = in1_mask;
64	64	}
65
	65
66	66	if (inwin0)
67	67	{
68	68	if (is_in_window(x, 0))
r23623	r23624
87	87	mode_mask = ~0x0b;
88	88	}
89	89
90
	90
91	91	if (mode_mask)
92	92	{
93	93	for (int x = 0; x < 240; x++)
r23623	r23624
103	103	UINT8 inWin0Mask = m_WININ & 0x00ff;
104	104	UINT8 inWin1Mask = m_WININ >> 8;
105	105	UINT8 outMask = m_WINOUT & 0x00ff;
106		UINT8 masks[240]; // this puts together WinMasks with the fact that some modes/submodes skip specific layers!
107
	106	UINT8 masks[240]; // this puts together WinMasks with the fact that some modes/submodes skip specific layers!
	107
108	108	if (submode == GBA_SUBMODE2)
109	109	{
110	110	if (m_DISPCNT & DISPCNT_WIN0_EN)
r23623	r23624
117	117	else
118	118	inWindow0 \|= (y >= v0 \|\| y < v1) ? 1 : 0;
119	119	}
120
	120
121	121	if (m_DISPCNT & DISPCNT_WIN1_EN)
122	122	{
123	123	UINT8 v0 = m_WIN1V >> 8;
r23623	r23624
129	129	inWindow1 \|= (y >= v0 \|\| y < v1) ? 1 : 0;
130	130	}
131	131	}
132
	132
133	133	// Draw BG
134	134	switch (mode)
135	135	{
r23623	r23624
154	154	draw_roz_bitmap_scanline(line2, y, DISPCNT_BG2_EN, m_BG2CNT, m_BG2X, m_BG2Y, m_BG2PA, m_BG2PB, m_BG2PC, m_BG2PD, &m_gfxBG2X, &m_gfxBG2Y, m_gfxBG2Changed, bpp);
155	155	break;
156	156	}
157
	157
158	158	// Draw OAM
159	159	draw_gba_oam(lineOBJ, y);
160	160	if (submode == GBA_SUBMODE2)
r23623	r23624
162	162
163	163	memset(masks, 0xff, sizeof(masks));
164	164	update_mask(&masks[0], mode, submode, lineOBJWin, inWindow0, inWindow1, inWin0Mask, inWin1Mask, outMask);
165
	165
166	166	for (int x = 0; x < 240; x++)
167	167	{
168	168	UINT32 color = backdrop;
169	169	UINT8 top = 0x20;
170
	170
171	171	if ((UINT8)(line0[x] >> 24) < (UINT8)(color >> 24) && masks[x] & 0x01)
172	172	{
173	173	color = line0[x];
174	174	top = 0x01;
175	175	}
176
	176
177	177	if ((UINT8)(line1[x] >> 24) < (UINT8)(color >> 24) && masks[x] & 0x02)
178	178	{
179	179	color = line1[x];
180	180	top = 0x02;
181	181	}
182
	182
183	183	if ((UINT8)(line2[x] >> 24) < (UINT8)(color >> 24) && masks[x] & 0x04)
184	184	{
185	185	color = line2[x];
186	186	top = 0x04;
187	187	}
188
	188
189	189	if ((UINT8)(line3[x] >> 24) < (UINT8)(color >> 24) && masks[x] & 0x08)
190	190	{
191	191	color = line3[x];
192	192	top = 0x08;
193	193	}
194
	194
195	195	if ((UINT8)(lineOBJ[x] >> 24) < (UINT8)(color >> 24) && masks[x] & 0x10)
196	196	{
197	197	color = lineOBJ[x];
198	198	top = 0x10;
199	199	}
200
	200
201	201	if (color & 0x00010000)
202	202	{
203	203	if (submode != GBA_SUBMODE0 \|\| top == 0x10)
204	204	{
205	205	UINT32 back = backdrop;
206	206	UINT8 top2 = 0x20;
207
	207
208	208	if ((UINT8)(line0[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x01)
209	209	{
210	210	back = line0[x];
211	211	top2 = 0x01;
212	212	}
213
	213
214	214	if ((UINT8)(line1[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x02)
215	215	{
216	216	back = line1[x];
217	217	top2 = 0x02;
218	218	}
219
	219
220	220	if ((UINT8)(line2[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x04)
221	221	{
222	222	back = line2[x];
223	223	top2 = 0x04;
224	224	}
225
	225
226	226	if ((UINT8)(line3[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x08)
227	227	{
228	228	back = line3[x];
229	229	top2 = 0x08;
230	230	}
231
	231
232	232	if (top2 & (m_BLDCNT >> BLDCNT_TP2_SHIFT))
233	233	color = alpha_blend_pixel(color, back, coeff[m_BLDALPHA & 0x1f], coeff[(m_BLDALPHA >> 8) & 0x1f]);
234	234	else
r23623	r23624
260	260	{
261	261	UINT32 back = backdrop;
262	262	UINT8 top2 = 0x20;
263
	263
264	264	if ((UINT8)(line0[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x01)
265	265	{
266	266	if (top != 0x01)
r23623	r23624
269	269	top2 = 0x01;
270	270	}
271	271	}
272
	272
273	273	if ((UINT8)(line1[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x02)
274	274	{
275	275	if (top != 0x02)
r23623	r23624
278	278	top2 = 0x02;
279	279	}
280	280	}
281
	281
282	282	if ((UINT8)(line2[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x04)
283	283	{
284	284	if (top != 0x04)
r23623	r23624
287	287	top2 = 0x04;
288	288	}
289	289	}
290
	290
291	291	if ((UINT8)(line3[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x08)
292	292	{
293	293	if (top != 0x08)
r23623	r23624
296	296	top2 = 0x08;
297	297	}
298	298	}
299
	299
300	300	if ((UINT8)(lineOBJ[x] >> 24) < (UINT8)(back >> 24) && masks[x] & 0x10)
301	301	{
302	302	if (top != 0x10)
r23623	r23624
305	305	top2 = 0x10;
306	306	}
307	307	}
308
	308
309	309	if (top2 & (m_BLDCNT >> BLDCNT_TP2_SHIFT))
310	310	color = alpha_blend_pixel(color, back, coeff[m_BLDALPHA & 0x1f], coeff[(m_BLDALPHA >> 8) & 0x1f]);
311	311	}
r23623	r23624
320	320	}
321	321	}
322	322	lineMix[x] = color;
323		}
	323	}
324	324	if (mode == GBA_MODE1 \|\| mode == GBA_MODE2 \|\| mode == GBA_MODE345)
325	325	m_gfxBG2Changed = 0;
326	326	if (mode == GBA_MODE2)
r23623	r23624
336	336	INT32 sy = (depth == 4) ? 128 : 160;
337	337	UINT32 prio = ((ctrl & BGCNT_PRIORITY) << 25) + 0x1000000;
338	338	INT32 cx, cy, pixx, pixy, x;
339
	339
340	340	if ((depth == 8) && (m_DISPCNT & DISPCNT_FRAMESEL))
341	341	src8 += 0xa000;
342
	342
343	343	if ((depth == 4) && (m_DISPCNT & DISPCNT_FRAMESEL))
344	344	src16 += 0xa000/2;
345
	345
346	346	// sign extend roz parameters
347	347	if (X & 0x08000000) X \|= 0xf0000000;
348	348	if (Y & 0x08000000) Y \|= 0xf0000000;
r23623	r23624
350	350	if (PB & 0x8000) PB \|= 0xffff0000;
351	351	if (PC & 0x8000) PC \|= 0xffff0000;
352	352	if (PD & 0x8000) PD \|= 0xffff0000;
353
	353
354	354	if(ypos == 0)
355	355	changed = 3;
356
	356
357	357	if(changed & 1)
358	358	*currentx = X;
359	359	else
360	360	*currentx += PB;
361
	361
362	362	if(changed & 2)
363	363	*currenty = Y;
364	364	else
365	365	*currenty += PD;
366
	366
367	367	cx = *currentx;
368	368	cy = *currenty;
369
	369
370	370	if(ctrl & BGCNT_MOSAIC)
371	371	{
372	372	INT32 mosaic_line = ((m_MOSAIC & 0xf0) >> 4) + 1;
r23623	r23624
374	374	cx = X + tempy*PB;
375	375	cy = Y + tempy*PD;
376	376	}
377
	377
378	378	pixx = cx >> 8;
379	379	pixy = cy >> 8;
380
	380
381	381	for(x = 0; x < 240; x++)
382	382	{
383	383	if(pixx < 0 \|\| pixy < 0 \|\| pixx >= sx \|\| pixy >= sy)
r23623	r23624
396	396	scanline[x] = src16[pixy*sx + pixx] \| prio;
397	397	}
398	398	}
399
	399
400	400	cx += PA;
401	401	cy += PC;
402
	402
403	403	pixx = cx >> 8;
404	404	pixy = cy >> 8;
405	405	}
406
	406
407	407	if(ctrl & BGCNT_MOSAIC)
408	408	{
409	409	INT32 mosaicx = (m_MOSAIC & 0x0f) + 1;
r23623	r23624
508	508	// shall we shift for (ctrl & BGCNT_PALETTE256)?? or is not effective for ROZ?
509	509	tile = mgba_vram[mapbase + (pixx >> 3) + (pixy >> 3) * (sizes[size] >> 3)];
510	510	pixel = mgba_vram[base + (tile << 6) + (tiley << 3) + tilex];
511
	511
512	512	// plot it
513	513	scanline[x] = pixel ? (pgba_pram[pixel] \| prio) : 0x80000000;
514	514	}
515
	515
516	516	cx += PA;
517	517	cy += PC;
518
	518
519	519	pixx = cx >> 8;
520	520	pixy = cy >> 8;
521
	521
522	522	if(ctrl & BGCNT_PALETTESET_WRAP)
523	523	{
524	524	pixx %= sizes[size];
r23623	r23624
573	573
574	574	for (x = 0; x < 240; x++)
575	575	scanline[x] = 0x80000000;
576
	576
577	577	if(m_DISPCNT & enablemask)
578	578	{
579
580	579	switch((ctrl & BGCNT_SCREENSIZE) >> BGCNT_SCREENSIZE_SHIFT)
581	580	{
582	581	case 1:
r23623	r23624
590	589	height = 512;
591	590	break;
592	591	}
593
	592
594	593	maskx = width - 1;
595	594	masky = height - 1;
596
	595
597	596	pixx = hofs & maskx;
598	597	pixy = (vofs + ypos) & masky;
599
	598
600	599	if(use_mosaic)
601	600	{
602	601	if((ypos % mosaicy) != 0)
r23623	r23624
605	604	pixy = (vofs + mosaicy) & masky;
606	605	}
607	606	}
608
	607
609	608	if(pixy > 255 && height > 256)
610	609	{
611	610	pixy &= 0x000000ff;
r23623	r23624
615	614	screendata += 0x400;
616	615	}
617	616	}
618
	617
619	618	stride = (pixy >> 3) << 5;
620
	619
621	620	UINT16 src = screendata + 0x400 (pixx >> 8) + ((pixx & 255) >> 3) + stride;
622	621	for(x = 0; x < 240; x++)
623	622	{
r23623	r23624
627	626	INT32 tiley = pixy & 7;
628	627	UINT8 color;
629	628	UINT8 palindex;
630
	629
631	630	if(data & TILEOBJ_HFLIP)
632	631	{
633	632	tilex = 7 - tilex;
r23623	r23624
636	635	{
637	636	tiley = 7 - tiley;
638	637	}
639
	638
640	639	if (ctrl & BGCNT_PALETTE256)
641	640	{
642	641	color = chardata[(tile << 6) + (tiley << 3) + tilex];
r23623	r23624
645	644	else
646	645	{
647	646	color = chardata[(tile << 5) + (tiley << 2) + (tilex >> 1)];
648
	647
649	648	if (tilex & 1)
650	649	color >>= 4;
651	650	else
652	651	color &= 0x0f;
653	652	palindex = (data >> 8) & 0x00f0;
654		}
	653	}
655	654
656	655	if (color)
657	656	scanline[x] = palette[palindex + color] \| priority;
658	657	else
659	658	scanline[x] = 0x80000000;
660
	659
661	660	if (data & TILEOBJ_HFLIP)
662	661	{
663	662	if (tilex == 0)
r23623	r23624
669	668	{
670	669	src++;
671	670	}
672
	671
673	672	pixx++;
674	673	if(pixx == 256)
675	674	{
r23623	r23624
689	688	src = screendata + stride;
690	689	}
691	690	}
692
	691
693	692	if(use_mosaic)
694	693	{
695	694	if(mosaicx > 1)
r23623	r23624
707	706	}
708	707	}
709	708	}
710
	709
711	710	}
712	711	}
713	712
r23623	r23624
722	721
723	722	for (x = 0; x < 240; x++)
724	723	scanline[x] = 0x80000000;
725
	724
726	725	if (m_DISPCNT & DISPCNT_OBJWIN_EN)
727	726	{
728	727	for( gba_oamindex = 127; gba_oamindex >= 0; gba_oamindex-- )
r23623	r23624
1170	1169
1171	1170	for (x = 0; x < 240; x++)
1172	1171	scanline[x] = 0x80000000;
1173
	1172
1174	1173	if( m_DISPCNT & DISPCNT_OBJ_EN )
1175	1174	{
1176	1175	for( gba_oamindex = 0; gba_oamindex < 128; gba_oamindex++ )
r23623	r23624
1861	1860	depth = 8;
1862	1861	else if ((m_DISPCNT & 7) == 5)
1863	1862	depth = 4;
1864
	1863
1865	1864	//printf("mode = %d, %d\n", m_DISPCNT & 7, submode);
1866	1865
1867	1866	switch(m_DISPCNT & 7)
r23623	r23624
1880	1879	fatalerror("Invalid screen mode (6 or 7)!\n");
1881	1880	break;
1882	1881	}
1883
	1882
1884	1883	for (int x = 0; x < 240; x++)
1885	1884	{
1886	1885	scanline[x] = m_xferscan[6][1024 + x] & 0x7fff;

trunk/src/mess/video/vic4567.c
r23623	r23624
159	159	const vic3_interface intf = reinterpret_cast<const vic3_interface >(static_config());
160	160	if (intf != NULL)
161	161	static_cast<vic3_interface >(this) = *intf;
162
	162
163	163	// or initialize to defaults if none provided
164	164	else
165	165	{
r23623	r23624
184	184	void vic3_device::device_start()
185	185	{
186	186	int width, height;
187
	187
188	188	m_cpu = machine().device(cpu_tag);
189	189	m_main_screen = machine().device<screen_device>(screen_tag);
190	190	width = m_main_screen->width();
191	191	height = m_main_screen->height();
192
	192
193	193	m_bitmap = auto_bitmap_ind16_alloc(machine(), width, height);
194
	194
195	195	m_type = vic_type;
196
	196
197	197	m_dma_read.resolve(dma_read, *this);
198	198	m_dma_read_color.resolve(dma_read_color, *this);
199	199	m_interrupt.resolve(irq, *this);
200
	200
201	201	m_port_changed.resolve(port_changed, *this);
202
	202
203	203	m_c64_mem_r.resolve(c64_mem_r, *this);
204
	204
205	205	m_lightpen_button_cb.resolve(button_cb, *this);
206	206	m_lightpen_x_cb.resolve(x_cb, *this);
207	207	m_lightpen_y_cb.resolve(y_cb, *this);
208
	208
209	209	m_screen[0] = auto_alloc_array(machine(), UINT8, 216 * 656 / 8);
210
	210
211	211	for (int i = 1; i < 216; i++)
212	212	m_screen[i] = m_screen[i - 1] + 656 / 8;
213
	213
214	214	for (int i = 0; i < 256; i++)
215	215	{
216	216	m_foreground[i] = 0;
r23623	r23624
223	223	if ((i & 0xc0) > 0x40)
224	224	m_foreground[i] \|= 0xc0;
225	225	}
226
	226
227	227	for (int i = 0; i < 256; i++)
228	228	{
229	229	m_expandx[i] = 0;
r23623	r23624
244	244	if (i & 0x80)
245	245	m_expandx[i] \|= 0xc000;
246	246	}
247
	247
248	248	for (int i = 0; i < 256; i++)
249	249	{
250	250	m_expandx_multi[i] = 0;
r23623	r23624
265	265	if (i & 0x80)
266	266	m_expandx_multi[i] \|= 0xa000;
267	267	}
268
	268
269	269	save_item(NAME(m_reg));
270
	270
271	271	save_item(NAME(m_on));
272
	272
273	273	//save_item(NAME(m_bitmap));
274
	274
275	275	save_item(NAME(m_lines));
276
	276
277	277	save_item(NAME(m_chargenaddr));
278	278	save_item(NAME(m_videoaddr));
279	279	save_item(NAME(m_bitmapaddr));
280
	280
281	281	save_item(NAME(m_x_begin));
282	282	save_item(NAME(m_x_end));
283	283	save_item(NAME(m_y_begin));
284	284	save_item(NAME(m_y_end));
285
	285
286	286	save_item(NAME(m_c64_bitmap));
287	287	save_item(NAME(m_bitmapmulti));
288	288	save_item(NAME(m_mono));
r23623	r23624
290	290	save_item(NAME(m_ecmcolor));
291	291	save_item(NAME(m_colors));
292	292	save_item(NAME(m_spritemulti));
293
	293
294	294	save_item(NAME(m_lastline));
295	295	save_item(NAME(m_rasterline));
296	296	save_item(NAME(m_interlace));
297
	297
298	298	save_item(NAME(m_columns));
299	299	save_item(NAME(m_rows));
300
	300
301	301	save_item(NAME(m_shift));
302	302	save_item(NAME(m_foreground));
303	303	save_item(NAME(m_multi_collision));
304
	304
305	305	save_item(NAME(m_palette_red));
306	306	save_item(NAME(m_palette_green));
307	307	save_item(NAME(m_palette_blue));
308	308	save_item(NAME(m_palette_dirty));
309
	309
310	310	for (int i = 0; i < 8; i++)
311	311	{
312	312	save_item(NAME(m_sprites[i].x), i);
r23623	r23624
332	332	void vic3_device::device_reset()
333	333	{
334	334	memset(m_reg, 0, ARRAY_LENGTH(m_reg));
335
	335
336	336	m_on = 1;
337
	337
338	338	m_interlace = 0;
339	339	m_columns = 640;
340	340	m_rows = 200;
341	341	m_lines = VIC2_LINES;
342
	342
343	343	memset(&m_sprites, 0, sizeof(m_sprites));
344
	344
345	345	m_chargenaddr = 0;
346	346	m_videoaddr = 0;
347	347	m_bitmapaddr = 0;
348
	348
349	349	m_x_begin = 0;
350	350	m_x_end = 0;
351	351	m_y_begin = 0;
352	352	m_y_end = 0;
353
	353
354	354	for (int i = 0; i < 2; i++)
355	355	{
356	356	m_c64_bitmap[i] = 0;
357	357	m_mono[i] = 0;
358	358	m_ecmcolor[i] = 0;
359	359	}
360
	360
361	361	for (int i = 0; i < 4; i++)
362	362	{
363	363	m_bitmapmulti[i] = 0;
r23623	r23624
365	365	m_colors[i] = 0;
366	366	m_spritemulti[i] = 0;
367	367	}
368
	368
369	369	m_lastline = 0;
370	370	m_rasterline = 0;
371
	371
372	372	memset(m_shift, 0, ARRAY_LENGTH(m_shift));
373	373	memset(m_multi_collision, 0, ARRAY_LENGTH(m_multi_collision));
374	374	memset(m_palette_red, 0, ARRAY_LENGTH(m_palette_red));
375	375	memset(m_palette_green, 0, ARRAY_LENGTH(m_palette_green));
376	376	memset(m_palette_blue, 0, ARRAY_LENGTH(m_palette_blue));
377
	377
378	378	m_palette_dirty = 0;
379	379	}
380	380
r23623	r23624
535	535
536	536	if ((y < YPOS) \|\| (y >= (VIC2_STARTVISIBLELINES + VIC2_VISIBLELINES)) \|\| (xbegin <= 1) \|\| (xbegin >= (VIC2_STARTVISIBLECOLUMNS + VIC2_VISIBLECOLUMNS)))
537	537	return;
538
	538
539	539	for (x = 0, mask = 0xc0, shift = 6; x < 8; x += 2, mask >>= 2, shift -= 2)
540	540	{
541	541	if (code & mask)
r23623	r23624
1499	1499	break;
1500	1500	case 0x30:
1501	1501	m_reg[offset] = data;
1502		if (!m_port_changed.isnull())
	1502	if (!m_port_changed.isnull())
1503	1503	{
1504	1504	DBG_LOG(2, "vic write", ("%.2x:%.2x\n", offset, data));
1505	1505	m_reg[offset] = data;
r23623	r23624
2058	2058	copybitmap(bitmap, *m_bitmap, 0, 0, 0, 0, cliprect);
2059	2059	return 0;
2060	2060	}
2061
2062

trunk/src/mess/video/vic4567.h
r23623	r23624
47	47	struct vic3_sprite
48	48	{
49	49	int x, y;
50
	50
51	51	int repeat; /* expand, line once drawn */
52	52	int line; /* 0 not painting, else painting */
53
	53
54	54	/* buffer for currently painted line */
55	55	int paintedline[8];
56	56	UINT8 bitmap[8][SPRITE_BASE_X_SIZE * 2 / 8 + 1 /for simplier sprite collision detection/];
r23623	r23624
151	151	DECLARE_WRITE8_MEMBER(port_w);
152	152	DECLARE_WRITE8_MEMBER(palette_w);
153	153	DECLARE_READ8_MEMBER(port_r);
154
	154
155	155	void raster_interrupt_gen();
156	156	UINT32 video_update(bitmap_ind16 &bitmap, const rectangle &cliprect);
157	157
r23623	r23624
184	184	void draw_bitplanes();
185	185
186	186	TIMER_CALLBACK_MEMBER(timer_timeout);
187
	187
188	188	vic3_type m_type;
189
	189
190	190	screen_device *m_main_screen; // screen which sets bitmap properties
191
	191
192	192	device_t *m_cpu;
193
	193
194	194	UINT8 m_reg[0x80];
195	195	int m_on; /* rastering of the screen */
196
	196
197	197	int m_lines;
198
	198
199	199	UINT16 m_chargenaddr, m_videoaddr, m_bitmapaddr;
200
	200
201	201	bitmap_ind16 *m_bitmap;
202	202	int m_x_begin, m_x_end;
203	203	int m_y_begin, m_y_end;
204
	204
205	205	UINT16 m_c64_bitmap[2], m_bitmapmulti[4], m_mono[2], m_multi[4], m_ecmcolor[2], m_colors[4], m_spritemulti[4];
206
	206
207	207	int m_lastline, m_rasterline;
208
	208
209	209	int m_interlace;
210	210	int m_columns, m_rows;
211
	211
212	212	/* background/foreground for sprite collision */
213	213	UINT8 *m_screen[216], m_shift[216];
214
	214
215	215	/* convert multicolor byte to background/foreground for sprite collision */
216	216	UINT8 m_foreground[256];
217	217	UINT16 m_expandx[256];
218	218	UINT16 m_expandx_multi[256];
219
	219
220	220	/* converts sprite multicolor info to info for background collision checking */
221	221	UINT8 m_multi_collision[256];
222
	222
223	223	vic3_sprite m_sprites[8];
224
	224
225	225	/* DMA */
226	226	devcb_resolved_read8 m_dma_read;
227	227	devcb_resolved_read8 m_dma_read_color;
228
	228
229	229	/* IRQ */
230	230	devcb_resolved_write_line m_interrupt;
231
	231
232	232	/* Port Changed */
233	233	devcb_resolved_write8 m_port_changed;
234
	234
235	235	/* lightpen */
236	236	devcb_resolved_read8 m_lightpen_button_cb;
237	237	devcb_resolved_read8 m_lightpen_x_cb;
238	238	devcb_resolved_read8 m_lightpen_y_cb;
239
	239
240	240	/* C64 memory access */
241	241	devcb_resolved_read8 m_c64_mem_r;
242
	242
243	243	/* palette - vic3 specific items (the ones above are used for VIC II as well) */
244	244	UINT8 m_palette_red[0x100];
245	245	UINT8 m_palette_green[0x100];

trunk/src/mess/video/vtvideo.c
r23623	r23624
56	56	const vt_video_interface intf = reinterpret_cast<const vt_video_interface >(static_config());
57	57	if (intf != NULL)
58	58	static_cast<vt_video_interface >(this) = *intf;
59
	59
60	60	// or initialize to defaults if none provided
61	61	else
62	62	{
r23623	r23624
76	76	/* resolve callbacks */
77	77	m_in_ram_func.resolve(m_in_ram_cb, *this);
78	78	m_clear_video_interrupt.resolve(m_clear_video_cb, *this);
79
	79
80	80	/* get the screen device */
81	81	m_screen = machine().device<screen_device>(m_screen_tag);
82	82	assert(m_screen != NULL);
83
	83
84	84	m_gfx = machine().root_device().memregion(m_char_rom_tag)->base();
85	85	assert(m_gfx != NULL);
86
	86
87	87	// LBA7 is scan line frequency update
88	88	machine().scheduler().timer_pulse(attotime::from_nsec(31778), timer_expired_delegate(FUNC(vt100_video_device::lba7_change),this));
89	89
90
	90
91	91	save_item(NAME(m_lba7));
92	92	save_item(NAME(m_scroll_latch));
93	93	save_item(NAME(m_blink_flip_flop));
r23623	r23624
108	108	{
109	109	palette_set_color_rgb(machine(), 0, 0x00, 0x00, 0x00); // black
110	110	palette_set_color_rgb(machine(), 1, 0xff, 0xff, 0xff); // white
111
	111
112	112	m_height = 25;
113	113	m_lba7 = 0;
114
	114
115	115	m_scroll_latch = 0;
116	116	m_blink_flip_flop = 0;
117	117	m_reverse_field = 0;
118	118	m_basic_attribute = 0;
119
	119
120	120	m_columns = 80;
121	121	m_frequency = 60;
122	122	m_interlaced = 1;
r23623	r23624
151	151
152	152	WRITE8_MEMBER( vt100_video_device::dc012_w )
153	153	{
154		if (!(data & 0x08))
	154	if (!(data & 0x08))
155	155	{
156		if (!(data & 0x04))
	156	if (!(data & 0x04))
157	157	{
158	158	// set lower part scroll
159	159	m_scroll_latch = (m_scroll_latch & 0x0c) \| (data & 0x03);
160		}
161		else
	160	}
	161	else
162	162	{
163	163	// set higher part scroll
164	164	m_scroll_latch = (m_scroll_latch & 0x03) \| ((data & 0x03) << 2);
165	165	}
166		}
167		else
	166	}
	167	else
168	168	{
169		switch (data & 0x0f)
	169	switch (data & 0x0f)
170	170	{
171	171	case 0x08:
172	172	// toggle blink flip flop
r23623	r23624
206	206
207	207	WRITE8_MEMBER( vt100_video_device::dc011_w )
208	208	{
209		if (!BIT(data, 5))
	209	if (!BIT(data, 5))
210	210	{
211	211	UINT8 col = m_columns;
212		if (!BIT(data, 4))
	212	if (!BIT(data, 4))
213	213	{
214	214	m_columns = 80;
215		}
216		else
	215	}
	216	else
217	217	{
218	218	m_columns = 132;
219	219	}
220		if (col != m_columns)
	220	if (col != m_columns)
221	221	{
222	222	recompute_parameters();
223	223	}
224	224	m_interlaced = 1;
225		}
226		else
	225	}
	226	else
227	227	{
228		if (!BIT(data, 4))
	228	if (!BIT(data, 4))
229	229	{
230	230	m_frequency = 60;
231	231	m_skip_lines = 2;
232		}
233		else
	232	}
	233	else
234	234	{
235	235	m_frequency = 50;
236	236	m_skip_lines = 5;
r23623	r23624
252	252
253	253	for (int i = 0; i < 10; i++)
254	254	{
255		switch (display_type)
	255	switch (display_type)
256	256	{
257	257	case 0 : // bottom half, double height
258	258	j = (i >> 1) + 5; break;
r23623	r23624
268	268
269	269	line = m_gfx[(code & 0x7f) * 16 + j];
270	270
271		if (m_basic_attribute == 1)
	271	if (m_basic_attribute == 1)
272	272	{
273	273	if ((code & 0x80) == 0x80)
274	274	invert = 1;
r23623	r23624
280	280	{
281	281	prevbit = bit;
282	282	bit = BIT((line << b), 7);
283		if (double_width)
	283	if (double_width)
284	284	{
285	285	bitmap.pix16(y * 10 + i, x * 20 + b * 2) = (bit \| prevbit) ^ invert;
286	286	bitmap.pix16(y * 10 + i, x * 20 + b * 2 + 1) = bit ^ invert;
287		}
288		else
	287	}
	288	else
289	289	{
290	290	bitmap.pix16(y * 10 + i, x * 10 + b) = (bit \| prevbit) ^ invert;
291	291	}
292	292	}
293	293	prevbit = bit;
294	294	// char interleave is filled with last bit
295		if (double_width)
	295	if (double_width)
296	296	{
297	297	bitmap.pix16(y * 10 + i, x * 20 + 16) = (bit \| prevbit) ^ invert;
298	298	bitmap.pix16(y * 10 + i, x * 20 + 17) = bit ^ invert;
299	299	bitmap.pix16(y * 10 + i, x * 20 + 18) = bit ^ invert;
300	300	bitmap.pix16(y * 10 + i, x * 20 + 19) = bit ^ invert;
301		}
302		else
	301	}
	302	else
303	303	{
304	304	bitmap.pix16(y * 10 + i, x * 10 + 8) = (bit \| prevbit) ^ invert;
305	305	bitmap.pix16(y * 10 + i, x * 10 + 9) = bit ^ invert;
r23623	r23624
319	319	UINT8 display_type = 3; // binary 11
320	320	UINT16 temp = 0;
321	321
322		if (m_in_ram_func(0) != 0x7f)
	322	if (m_in_ram_func(0) != 0x7f)
323	323	return;
324	324
325		while (line < (m_height + m_skip_lines))
	325	while (line < (m_height + m_skip_lines))
326	326	{
327	327	code = m_in_ram_func(addr + xpos);
328		if (code == 0x7f)
	328	if (code == 0x7f)
329	329	{
330	330	// end of line, fill empty till end of line
331		if (line >= m_skip_lines)
	331	if (line >= m_skip_lines)
332	332	{
333	333	for (x = xpos; x < ((display_type == 2) ? (m_columns / 2) : m_columns); x++)
334	334	{
r23623	r23624
342	342	if (addr & 0x1000) addr &= 0xfff; else addr \|= 0x2000;
343	343	scroll_region = (temp >> 15) & 1;
344	344	display_type = (temp >> 13) & 3;
345		if (line >= m_skip_lines)
	345	if (line >= m_skip_lines)
346	346	{
347	347	ypos++;
348	348	}
349	349	xpos = 0;
350	350	line++;
351		}
352		else
	351	}
	352	else
353	353	{
354	354	// display regular char
355		if (line >= m_skip_lines)
	355	if (line >= m_skip_lines)
356	356	{
357	357	display_char(bitmap, code, xpos, ypos, scroll_region, display_type);
358	358	}
359	359	xpos++;
360		if (xpos > m_columns)
	360	if (xpos > m_columns)
361	361	{
362	362	line++;
363	363	xpos = 0;
r23623	r23624
375	375
376	376	for (int i = 0; i < 10; i++)
377	377	{
378		switch (display_type)
	378	switch (display_type)
379	379	{
380	380	case 0 : // bottom half, double height
381	381	j = (i >> 1) + 5; break;
r23623	r23624
390	390	if (j == 0) j = 15; else j = j - 1;
391	391
392	392	line = m_gfx[code * 16 + j];
393		if (m_basic_attribute == 1)
	393	if (m_basic_attribute == 1)
394	394	{
395		if ((code & 0x80) == 0x80)
	395	if ((code & 0x80) == 0x80)
396	396	{
397	397	line = line ^ 0xff;
398	398	}
r23623	r23624
401	401	for (int b = 0; b < 8; b++)
402	402	{
403	403	bit = BIT((line << b), 7);
404		if (double_width)
	404	if (double_width)
405	405	{
406	406	bitmap.pix16(y * 10 + i, x * 20 + b * 2) = bit;
407	407	bitmap.pix16(y * 10 + i, x * 20 + b * 2 + 1) = bit;
408		}
409		else
	408	}
	409	else
410	410	{
411	411	bitmap.pix16(y * 10 + i, x * 10 + b) = bit;
412	412	}
413	413	}
414	414	// char interleave is filled with last bit
415		if (double_width)
	415	if (double_width)
416	416	{
417	417	bitmap.pix16(y * 10 + i, x * 20 + 16) = bit;
418	418	bitmap.pix16(y * 10 + i, x * 20 + 17) = bit;
419	419	bitmap.pix16(y * 10 + i, x * 20 + 18) = bit;
420	420	bitmap.pix16(y * 10 + i, x * 20 + 19) = bit;
421		}
422		else
	421	}
	422	else
423	423	{
424	424	bitmap.pix16(y * 10 + i, x * 10 + 8) = bit;
425	425	bitmap.pix16(y * 10 + i, x * 10 + 9) = bit;
r23623	r23624
440	440	UINT8 display_type = 3; // binary 11
441	441	UINT16 temp = 0;
442	442
443		while (line < (m_height + m_skip_lines))
	443	while (line < (m_height + m_skip_lines))
444	444	{
445	445	code = m_in_ram_func(addr + xpos);
446		if (code == 0xff)
	446	if (code == 0xff)
447	447	{
448	448	// end of line, fill empty till end of line
449		if (line >= m_skip_lines)
	449	if (line >= m_skip_lines)
450	450	{
451	451	for (x = xpos; x < ((display_type == 2) ? (m_columns / 2) : m_columns); x++)
452	452	{
r23623	r23624
462	462	temp = m_in_ram_func(attr_addr);
463	463	scroll_region = (temp) & 1;
464	464	display_type = (temp>> 1) & 3;
465		if (line >= m_skip_lines)
	465	if (line >= m_skip_lines)
466	466	{
467	467	ypos++;
468	468	}
469	469	xpos = 0;
470	470	line++;
471		}
472		else
	471	}
	472	else
473	473	{
474	474	// display regular char
475		if (line >= m_skip_lines)
	475	if (line >= m_skip_lines)
476	476	{
477	477	display_char(bitmap, code, xpos, ypos, scroll_region, display_type);
478	478	}
479	479	xpos++;
480		if (xpos > m_columns)
	480	if (xpos > m_columns)
481	481	{
482	482	line++;
483	483	xpos = 0;

trunk/src/mess/video/vtvideo.h
r23623	r23624
19	19	{
20	20	const char m_screen_tag; / screen we are acting on */
21	21	const char m_char_rom_tag; / character rom region */
22
	22
23	23	/* this gets called for every memory read */
24	24	devcb_read8 m_in_ram_cb;
25	25	devcb_write8 m_clear_video_cb;
r23623	r23624
54	54
55	55	devcb_resolved_read8 m_in_ram_func;
56	56	devcb_resolved_write8 m_clear_video_interrupt;
57
	57
58	58	screen_device m_screen; / screen */
59	59	UINT8 m_gfx; / content of char rom */
60
	60
61	61	int m_lba7;
62
	62
63	63	// dc012 attributes
64	64	UINT8 m_scroll_latch;
65	65	UINT8 m_blink_flip_flop;

trunk/src/mess/video/stic.c
r23623	r23624
1	1	/**********************************************************************
2
	2
3	3	General Instruments AY-3-8900-1 a.k.a. Standard Television Interface Chip
4	4	(STIC) emulation for Mattel Intellivision
5
	5
6	6	Copyright MESS Team.
7	7	Visit http://mamedev.org for licensing and usage restrictions.
8
	8
9	9	*********************************************************************/
10	10
11	11	#include "emu.h"
r23623	r23624
42	42	void stic_device::device_start()
43	43	{
44	44	machine().primary_screen->register_screen_bitmap(m_bitmap);
45
	45
46	46	save_item(NAME(m_stic_registers));
47	47	save_item(NAME(m_gramdirty));
48	48	save_item(NAME(m_gram));
r23623	r23624
123	123	m_col_delay = 0;
124	124	m_row_delay = 0;
125	125	m_left_edge_inhibit = 0;
126		m_top_edge_inhibit = 0;
	126	m_top_edge_inhibit = 0;
127	127	}
128	128
129	129	ROM_START( stic_grom )
r23623	r23624
149	149	void stic_device::intv_set_pixel(bitmap_ind16 &bitmap, int x, int y, UINT32 color)
150	150	{
151	151	int w, h;
152
	152
153	153	// output scaling
154	154	x *= m_x_scale;
155	155	y *= m_y_scale;
156	156	color = SET_COLOR(color);
157
	157
158	158	for (h = 0; h < m_y_scale; h++)
159	159	for (w = 0; w < m_x_scale; w++)
160	160	bitmap.pix16(y + h, x + w) = color;
r23623	r23624
174	174	int stic_device::sprites_collide(int spriteNum1, int spriteNum2)
175	175	{
176	176	INT16 x0, y0, w0, h0, x1, y1, w1, h1, x2, y2, w2, h2;
177
	177
178	178	intv_sprite_type* s1 = &m_sprite[spriteNum1];
179	179	intv_sprite_type* s2 = &m_sprite[spriteNum2];
180
	180
181	181	x0 = STIC_OVERSCAN_LEFT_WIDTH + m_col_delay - STIC_CARD_WIDTH;
182	182	y0 = STIC_OVERSCAN_TOP_HEIGHT + m_row_delay - STIC_CARD_HEIGHT;
183	183	x1 = (s1->xpos + x0) * STIC_X_SCALE; y1 = (s1->ypos + y0) * STIC_Y_SCALE;
r23623	r23624
186	186	w2 = (s2->doublex ? 2 : 1) * STIC_CARD_WIDTH;
187	187	h1 = (s1->quady ? 4 : 1) * (s1->doubley ? 2 : 1) * (s1->doubleyres ? 2 : 1) * STIC_CARD_HEIGHT;
188	188	h2 = (s2->quady ? 4 : 1) * (s2->doubley ? 2 : 1) * (s2->doubleyres ? 2 : 1) * STIC_CARD_HEIGHT;
189
	189
190	190	if ((x1 >= x2 + w2) \|\| (y1 >= y2 + h2) \|\|
191	191	(x2 >= x1 + w1) \|\| (y2 >= y1 + h1))
192	192	return FALSE;
193
	193
194	194	// iterate over the intersecting bits to see if any touch
195	195	x0 = MAX(x1, x2);
196	196	y0 = MAX(y1, y2);
r23623	r23624
209	209	return TRUE;
210	210	}
211	211	}
212
	212
213	213	return FALSE;
214	214	}
215	215
r23623	r23624
221	221	intv_sprite_type* s1 = &m_sprite[i];
222	222	if (s1->xpos == 0 \|\| !s1->coll)
223	223	continue;
224
	224
225	225	for (int j = i + 1; j < STIC_MOBS; j++)
226	226	{
227	227	intv_sprite_type* s2 = &m_sprite[j];
228	228	if (s2->xpos == 0 \|\| !s2->coll)
229	229	continue;
230
	230
231	231	if (sprites_collide(i, j))
232	232	{
233	233	s1->collision \|= (1 << j);
r23623	r23624
246	246	INT32 nextX;
247	247	INT32 nextY;
248	248	INT32 xInc;
249
	249
250	250	UINT8* memory = m_grom_region->base();
251
	251
252	252	for (int i = 0; i < STIC_MOBS; i++)
253	253	{
254	254	intv_sprite_type* s = &m_sprite[i];
255
	255
256	256	if (s->grom)
257	257	cardMemoryLocation = (s->card * STIC_CARD_HEIGHT);
258	258	else
259	259	cardMemoryLocation = ((s->card & 0x003F) * STIC_CARD_HEIGHT);
260
	260
261	261	pixelSize = (s->quady ? 4 : 1) * (s->doubley ? 2 : 1);
262	262	spritePixelHeight = pixelSize * (s->doubleyres ? 2 : 1) * STIC_CARD_HEIGHT;
263
	263
264	264	for (int j = 0; j < spritePixelHeight; j++)
265	265	{
266	266	nextMemoryLocation = (cardMemoryLocation + (j/pixelSize));
r23623	r23624
273	273	nextX = (s->xflip ? ((s->doublex ? 2 : 1) * STIC_CARD_WIDTH - 1) : 0);
274	274	nextY = (s->yflip ? (spritePixelHeight - j - 1) : j);
275	275	xInc = (s->xflip ? -1: 1);
276
	276
277	277	for (int k = 0; k < STIC_CARD_WIDTH * (1 + s->doublex); k++)
278	278	{
279	279	m_sprite_buffers[i][nextX + k * xInc][nextY] = (nextData & (1 << ((STIC_CARD_WIDTH - 1) - k / (1 + s->doublex)))) != 0;
r23623	r23624
285	285	void stic_device::render_line(bitmap_ind16 &bitmap, UINT8 nextByte, UINT16 x, UINT16 y, UINT8 fgcolor, UINT8 bgcolor)
286	286	{
287	287	UINT32 color;
288
	288
289	289	for (int i = 0; i < STIC_CARD_WIDTH; i++)
290	290	{
291	291	color = (nextByte & (1 << ((STIC_CARD_WIDTH - 1) - i)) ? fgcolor : bgcolor);
r23623	r23624
308	308	UINT8 csPtr = 0;
309	309	UINT16 nextCard;
310	310	UINT8 *ram = m_grom_region->base();
311
	311
312	312	for (h = 0, nexty = (STIC_OVERSCAN_TOP_HEIGHT + m_row_delay) * STIC_Y_SCALE;
313		h < STIC_BACKTAB_HEIGHT;
314		h++, nexty += STIC_CARD_HEIGHT * STIC_Y_SCALE)
	313	h < STIC_BACKTAB_HEIGHT;
	314	h++, nexty += STIC_CARD_HEIGHT * STIC_Y_SCALE)
315	315	{
316	316	for (w = 0, nextx = (STIC_OVERSCAN_LEFT_WIDTH + m_col_delay) * STIC_X_SCALE;
317		w < STIC_BACKTAB_WIDTH;
318		w++, nextx += STIC_CARD_WIDTH * STIC_X_SCALE)
	317	w < STIC_BACKTAB_WIDTH;
	318	w++, nextx += STIC_CARD_WIDTH * STIC_X_SCALE)
319	319	{
320	320	nextCard = m_backtab_buffer[h][w];
321
	321
322	322	// colored squares mode
323	323	if ((nextCard & (STIC_CSTM_FG3\|STIC_CSTM_SEL)) == STIC_CSTM_FG3)
324	324	{
r23623	r23624
329	329	UINT8 color3 = ((nextCard & STIC_CSQM_D2) >> 11) \|
330	330	((nextCard & (STIC_CSQM_D10)) >> 9);
331	331	render_colored_squares(bitmap, nextx, nexty,
332		(color0 == 7 ? csColor : (color0 \| FOREGROUND_BIT)),
333		(color1 == 7 ? csColor : (color1 \| FOREGROUND_BIT)),
334		(color2 == 7 ? csColor : (color2 \| FOREGROUND_BIT)),
335		(color3 == 7 ? csColor : (color3 \| FOREGROUND_BIT)));
	332	(color0 == 7 ? csColor : (color0 \| FOREGROUND_BIT)),
	333	(color1 == 7 ? csColor : (color1 \| FOREGROUND_BIT)),
	334	(color2 == 7 ? csColor : (color2 \| FOREGROUND_BIT)),
	335	(color3 == 7 ? csColor : (color3 \| FOREGROUND_BIT)));
336	336	}
337	337	//color stack mode
338	338	else
r23623	r23624
340	340	UINT8 isGrom;
341	341	UINT16 memoryLocation, fgcolor, bgcolor;
342	342	UINT8* memory;
343
	343
344	344	//advance the color pointer, if necessary
345	345	if (nextCard & STIC_CSTM_ADV)
346	346	csPtr = (csPtr+1) & (STIC_CSRS - 1);
347
	347
348	348	fgcolor = ((nextCard & STIC_CSTM_FG3) >> 9) \|
349	349	(nextCard & (STIC_CSTM_FG20)) \| FOREGROUND_BIT;
350	350	bgcolor = m_stic_registers[STIC_CSR + csPtr] & STIC_CSR_BG;
351
	351
352	352	isGrom = !(nextCard & STIC_CSTM_SEL);
353	353	if (isGrom)
354	354	{
r23623	r23624
378	378	UINT16 nextCard, memoryLocation;
379	379	UINT8* memory;
380	380	UINT8* ram = m_grom_region->base();
381
	381
382	382	for (h = 0, nexty = (STIC_OVERSCAN_TOP_HEIGHT + m_row_delay) * STIC_Y_SCALE;
383		h < STIC_BACKTAB_HEIGHT;
384		h++, nexty += STIC_CARD_HEIGHT * STIC_Y_SCALE)
	383	h < STIC_BACKTAB_HEIGHT;
	384	h++, nexty += STIC_CARD_HEIGHT * STIC_Y_SCALE)
385	385	{
386	386	for (w = 0, nextx = (STIC_OVERSCAN_LEFT_WIDTH + m_col_delay) * STIC_X_SCALE;
387		w < STIC_BACKTAB_WIDTH;
388		w++, nextx += STIC_CARD_WIDTH * STIC_X_SCALE)
	387	w < STIC_BACKTAB_WIDTH;
	388	w++, nextx += STIC_CARD_WIDTH * STIC_X_SCALE)
389	389	{
390	390	nextCard = m_backtab_buffer[h][w];
391	391	fgcolor = (nextCard & STIC_FBM_FG) \| FOREGROUND_BIT;
392	392	bgcolor = ((nextCard & STIC_FBM_BG2) >> 11) \|
393	393	((nextCard & STIC_FBM_BG310) >> 9);
394
	394
395	395	isGrom = !(nextCard & STIC_FBM_SEL);
396	396	if (isGrom)
397	397	{
r23623	r23624
421	421	INT16 leftX, nextY;
422	422	INT16 leftBorder, rightBorder, topBorder, bottomBorder;
423	423	INT32 nextX;
424
	424
425	425	for (int i = STIC_MOBS - 1; i >= 0; i--)
426	426	{
427	427	intv_sprite_type *s = &m_sprite[i];
428	428	if (s->xpos == 0 \|\| (!s->coll && !s->visible))
429	429	continue;
430
	430
431	431	borderCollision = FALSE;
432	432	foregroundCollision = FALSE;
433
	433
434	434	spritePixelHeight = (s->quady ? 4 : 1) * (s->doubley ? 2 : 1) * (s->doubleyres ? 2 : 1) * STIC_CARD_HEIGHT;
435	435	width = (s->doublex ? 2 : 1) * STIC_CARD_WIDTH;
436
	436
437	437	leftX = (s->xpos - STIC_CARD_WIDTH + STIC_OVERSCAN_LEFT_WIDTH + m_col_delay) * STIC_X_SCALE;
438	438	nextY = (s->ypos - STIC_CARD_HEIGHT + STIC_OVERSCAN_TOP_HEIGHT + m_row_delay) * STIC_Y_SCALE;
439
	439
440	440	leftBorder = (STIC_OVERSCAN_LEFT_WIDTH + (m_left_edge_inhibit ? STIC_CARD_WIDTH : 0)) * STIC_X_SCALE;
441	441	rightBorder = (STIC_OVERSCAN_LEFT_WIDTH + STIC_BACKTAB_WIDTH * STIC_CARD_WIDTH - 1 - 1) * STIC_X_SCALE;
442	442	topBorder = (STIC_OVERSCAN_TOP_HEIGHT + (m_top_edge_inhibit ? STIC_CARD_HEIGHT : 0)) * STIC_Y_SCALE;
443	443	bottomBorder = (STIC_OVERSCAN_TOP_HEIGHT + STIC_BACKTAB_HEIGHT * STIC_CARD_HEIGHT) * STIC_Y_SCALE - 1;
444
	444
445	445	for (y = 0; y < spritePixelHeight; y++)
446	446	{
447	447	for (x = 0; x < width; x++)
r23623	r23624
449	449	//if this sprite pixel is not on, then don't paint it
450	450	if (!m_sprite_buffers[i][x][y])
451	451	continue;
452
	452
453	453	nextX = leftX + x;
454	454	//if the next pixel location is on the border, then we
455	455	//have a border collision and we can ignore painting it
r23623	r23624
459	459	borderCollision = TRUE;
460	460	continue;
461	461	}
462
	462
463	463	currentPixel = intv_get_pixel(bitmap, nextX, nextY);
464
	464
465	465	//check for foreground collision
466	466	if (currentPixel & FOREGROUND_BIT)
467	467	{
r23623	r23624
469	469	if (s->behind_foreground)
470	470	continue;
471	471	}
472
	472
473	473	if (s->visible)
474	474	{
475	475	intv_set_pixel(bitmap, nextX, nextY, s->color \| (currentPixel & FOREGROUND_BIT));
r23623	r23624
477	477	}
478	478	nextY++;
479	479	}
480
	480
481	481	//update the collision bits
482	482	if (s->coll)
483	483	{
r23623	r23624
506	506	int row,col;
507	507	int fgcolor,bgcolor = 0;
508	508	int code;
509
	509
510	510	int colora, colorb, colorc, colord;
511
	511
512	512	int n_bit;
513	513	int p_bit;
514	514	int g_bit;
515
	515
516	516	int j;
517
	517
518	518	int x0 = STIC_OVERSCAN_LEFT_WIDTH + m_col_delay;
519	519	int y0 = STIC_OVERSCAN_TOP_HEIGHT + m_row_delay;
520
	520
521	521	if (m_color_stack_mode == 1)
522	522	{
523	523	m_color_stack_offset = 0;
r23623	r23624
526	526	for(col = 0; col < STIC_BACKTAB_WIDTH; col++)
527	527	{
528	528	value = m_ram16[offs];
529
	529
530	530	n_bit = value & STIC_CSTM_ADV;
531	531	p_bit = value & STIC_CSTM_FG3;
532	532	g_bit = value & STIC_CSTM_SEL;
533
	533
534	534	if (p_bit && (!g_bit)) // colored squares mode
535	535	{
536	536	colora = value & STIC_CSQM_A;
r23623	r23624
554	554	m_color_stack_offset += 1;
555	555	m_color_stack_offset &= (STIC_CSRS - 1);
556	556	}
557
	557
558	558	if (p_bit) // pastel color set
559	559	fgcolor = (value & STIC_CSTM_FG20) + 8;
560	560	else
561	561	fgcolor = value & STIC_CSTM_FG20;
562
	562
563	563	bgcolor = m_stic_registers[STIC_CSR + m_color_stack_offset];
564	564	code = (value & STIC_CSTM_C)>>3;
565
	565
566	566	if (g_bit) // read from gram
567	567	{
568	568	code &= (STIC_CSTM_C50 >> 3); // keep from going outside the array
569	569	//if (m_gramdirtybytes[code] == 1)
570	570	{
571	571	decodechar(machine().gfx[1],
572		code,
573		m_gram,
574		machine().config()->gfxdecodeinfo[1].gfxlayout);
	572	code,
	573	m_gram,
	574	machine().config()->gfxdecodeinfo[1].gfxlayout);
575	575	m_gramdirtybytes[code] = 0;
576	576	}
577	577	// Draw GRAM char
r23623	r23624
580	580	bgcolor*16+fgcolor,
581	581	0,0, (x0 + col * STIC_CARD_WIDTH) * STIC_X_SCALE, (y0 + row * STIC_CARD_HEIGHT) * STIC_Y_SCALE,
582	582	0,transparency,bgcolor);
583
	583
584	584	for(j=0;j<8;j++)
585	585	{
586	586	//intv_set_pixel(bitmap, (x0 + col * STIC_CARD_WIDTH + j) * STIC_X_SCALE, (y0 + row * STIC_CARD_HEIGHT + 7) * STIC_Y_SCALE + 1, 1);
587	587	}
588
	588
589	589	}
590	590	else // read from grom
591	591	{
r23623	r23624
594	594	bgcolor*16+fgcolor,
595	595	0,0, (x0 + col * STIC_CARD_WIDTH) * STIC_X_SCALE, (y0 + row * STIC_CARD_HEIGHT) * STIC_Y_SCALE,
596	596	0,transparency,bgcolor);
597
	597
598	598	for(j=0;j<8;j++)
599	599	{
600	600	//intv_set_pixel(bitmap, (x0 + col * STIC_CARD_WIDTH + j) * STIC_X_SCALE, (y0 + row * STIC_CARD_HEIGHT + 7) * STIC_Y_SCALE + 1, 2);
r23623	r23624
616	616	fgcolor = value & STIC_FBM_FG;
617	617	bgcolor = ((value & STIC_FBM_BG2) >> 11) + ((value & STIC_FBM_BG310) >> 9);
618	618	code = (value & STIC_FBM_C) >> 3;
619
	619
620	620	if (value & STIC_FBM_SEL) // read for GRAM
621	621	{
622	622	//if (m_gramdirtybytes[code] == 1)
623	623	{
624	624	decodechar(machine().gfx[1],
625		code,
626		m_gram,
627		machine().config()->gfxdecodeinfo[1].gfxlayout);
	625	code,
	626	m_gram,
	627	machine().config()->gfxdecodeinfo[1].gfxlayout);
628	628	m_gramdirtybytes[code] = 0;
629	629	}
630	630	// Draw GRAM char
r23623	r23624
656	656	int code;
657	657	int x0 = STIC_OVERSCAN_LEFT_WIDTH + m_col_delay - STIC_CARD_WIDTH;
658	658	int y0 = STIC_OVERSCAN_TOP_HEIGHT + m_row_delay - STIC_CARD_HEIGHT;
659
	659
660	660	for (int i = STIC_MOBS - 1; i >= 0; --i)
661	661	{
662	662	intv_sprite_type *s = &m_sprite[i];
r23623	r23624
671	671	//if (m_gramdirtybytes[code] == 1)
672	672	{
673	673	decodechar(machine().gfx[1],
674		code,
675		m_gram,
676		machine().config()->gfxdecodeinfo[1].gfxlayout);
	674	code,
	675	m_gram,
	676	machine().config()->gfxdecodeinfo[1].gfxlayout);
677	677	m_gramdirtybytes[code] = 0;
678	678	}
679	679	// Draw GRAM char
680	680	drawgfxzoom_transpen(bitmap,&machine().screen[0].visarea,machine().gfx[1],
681		code,
682		s->color,
683		s->xflip,s->yflip,
684		(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE,
685		0x8000 * s->xsize, 0x8000 * s->ysize,0);
	681	code,
	682	s->color,
	683	s->xflip,s->yflip,
	684	(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE,
	685	0x8000 * s->xsize, 0x8000 * s->ysize,0);
686	686	}
687	687	else
688	688	{
689	689	//if ((m_gramdirtybytes[code] == 1) \|\| (m_gramdirtybytes[code+1] == 1))
690	690	{
691	691	decodechar(machine().gfx[1],
692		code,
693		m_gram,
694		machine().config()->gfxdecodeinfo[1].gfxlayout);
	692	code,
	693	m_gram,
	694	machine().config()->gfxdecodeinfo[1].gfxlayout);
695	695	decodechar(machine().gfx[1],
696		code+1,
697		m_gram,
698		machine().config()->gfxdecodeinfo[1].gfxlayout);
	696	code+1,
	697	m_gram,
	698	machine().config()->gfxdecodeinfo[1].gfxlayout);
699	699	m_gramdirtybytes[code] = 0;
700	700	m_gramdirtybytes[code+1] = 0;
701	701	}
702	702	// Draw GRAM char
703	703	drawgfxzoom_transpen(bitmap,&machine().screen[0].visarea,machine().gfx[1],
704		code,
705		s->color,
706		s->xflip,s->yflip,
707		(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE + s->yflip * s->ysize * STIC_CARD_HEIGHT,
708		0x8000s->xsize, 0x8000s->ysize,0);
	704	code,
	705	s->color,
	706	s->xflip,s->yflip,
	707	(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE + s->yflip * s->ysize * STIC_CARD_HEIGHT,
	708	0x8000s->xsize, 0x8000s->ysize,0);
709	709	drawgfxzoom_transpen(bitmap,&machine().screen[0].visarea,machine().gfx[1],
710		code+1,
711		s->color,
712		s->xflip,s->yflip,
713		(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE + (1 - s->yflip) * s->ysize * STIC_CARD_HEIGHT,
714		0x8000s->xsize, 0x8000s->ysize,0);
	710	code+1,
	711	s->color,
	712	s->xflip,s->yflip,
	713	(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE + (1 - s->yflip) * s->ysize * STIC_CARD_HEIGHT,
	714	0x8000s->xsize, 0x8000s->ysize,0);
715	715	}
716	716	}
717	717	else
r23623	r23624
720	720	{
721	721	// Draw GROM char
722	722	drawgfxzoom_transpen(bitmap,&machine().screen[0].visarea,machine().gfx[0],
723		code,
724		s->color,
725		s->xflip,s->yflip,
726		(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE,
727		0x8000s->xsize, 0x8000s->ysize,0);
	723	code,
	724	s->color,
	725	s->xflip,s->yflip,
	726	(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE,
	727	0x8000s->xsize, 0x8000s->ysize,0);
728	728	}
729	729	else
730	730	{
731	731	drawgfxzoom_transpen(bitmap,&machine().screen[0].visarea,machine().gfx[0],
732		code,
733		s->color,
734		s->xflip,s->yflip,
735		(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE + s->yflip * s->ysize * STIC_CARD_HEIGHT,
736		0x8000s->xsize, 0x8000s->ysize,0);
	732	code,
	733	s->color,
	734	s->xflip,s->yflip,
	735	(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE + s->yflip * s->ysize * STIC_CARD_HEIGHT,
	736	0x8000s->xsize, 0x8000s->ysize,0);
737	737	drawgfxzoom_transpen(bitmap,&machine().screen[0].visarea,machine().gfx[0],
738		code+1,
739		s->color,
740		s->xflip,s->yflip,
741		(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE + (1 - s->yflip) * s->ysize * STIC_CARD_HEIGHT,
742		0x8000s->xsize, 0x8000s->ysize,0);
	738	code+1,
	739	s->color,
	740	s->xflip,s->yflip,
	741	(s->xpos + x0) * STIC_X_SCALE, (s->ypos + y0) * STIC_Y_SCALE + (1 - s->yflip) * s->ysize * STIC_CARD_HEIGHT,
	742	0x8000s->xsize, 0x8000s->ysize,0);
743	743	}
744	744	}
745	745	}
r23623	r23624
751	751	{
752	752	intv_plot_box(bitmap, 0, 0, (STIC_OVERSCAN_LEFT_WIDTH + (m_left_edge_inhibit ? STIC_CARD_WIDTH : m_col_delay)) * STIC_X_SCALE, (STIC_OVERSCAN_TOP_HEIGHT + STIC_BACKTAB_HEIGHT * STIC_CARD_HEIGHT + STIC_OVERSCAN_BOTTOM_HEIGHT) * STIC_Y_SCALE, m_border_color);
753	753	intv_plot_box(bitmap, (STIC_OVERSCAN_LEFT_WIDTH + STIC_BACKTAB_WIDTH * STIC_CARD_WIDTH - 1) * STIC_X_SCALE, 0, STIC_OVERSCAN_RIGHT_WIDTH, (STIC_OVERSCAN_TOP_HEIGHT + STIC_BACKTAB_HEIGHT * STIC_CARD_HEIGHT + STIC_OVERSCAN_BOTTOM_HEIGHT) * STIC_Y_SCALE, m_border_color);
754
	754
755	755	intv_plot_box(bitmap, 0, 0, (STIC_OVERSCAN_LEFT_WIDTH + STIC_BACKTAB_WIDTH * STIC_CARD_WIDTH - 1 + STIC_OVERSCAN_RIGHT_WIDTH) * STIC_X_SCALE, (STIC_OVERSCAN_TOP_HEIGHT + (m_top_edge_inhibit ? STIC_CARD_HEIGHT : m_row_delay)) * STIC_Y_SCALE, m_border_color);
756	756	intv_plot_box(bitmap, 0, (STIC_OVERSCAN_TOP_HEIGHT + STIC_BACKTAB_HEIGHT * STIC_CARD_HEIGHT) * STIC_Y_SCALE, (STIC_OVERSCAN_LEFT_WIDTH + STIC_BACKTAB_WIDTH * STIC_CARD_WIDTH - 1 + STIC_OVERSCAN_RIGHT_WIDTH) * STIC_X_SCALE, STIC_OVERSCAN_BOTTOM_HEIGHT * STIC_Y_SCALE, m_border_color);
757	757	}
r23623	r23624
765	765	render_background(m_bitmap);
766	766	// Render the sprites into their buffers
767	767	render_sprites();
768		for (int i = 0; i < STIC_MOBS; i++)
	768	for (int i = 0; i < STIC_MOBS; i++)
769	769	m_sprite[i].collision = 0;
770	770	// Copy the sprites to the background
771	771	copy_sprites_to_background(m_bitmap);
772	772	determine_sprite_collisions();
773		for (int i = 0; i < STIC_MOBS; i++)
	773	for (int i = 0; i < STIC_MOBS; i++)
774	774	m_stic_registers[STIC_MCR + i] \|= m_sprite[i].collision;
775	775	/* draw the screen borders if enabled */
776	776	draw_borders(m_bitmap);
r23623	r23624
951	951	//logerror("unmapped write to STIC register %02X: %04X\n", offset, data);
952	952	break;
953	953	}
954
	954
955	955	if (offset < sizeof(m_stic_registers) / sizeof(m_stic_registers[0]))
956	956	m_stic_registers[offset] = data;
957	957	}

trunk/src/mess/video/stic.h
r23623	r23624
476	476	// construction/destruction
477	477	stic_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
478	478	virtual ~stic_device();
479
	479
480	480	DECLARE_READ16_MEMBER(read);
481	481	DECLARE_READ16_MEMBER(gram_read);
482	482	DECLARE_READ16_MEMBER(grom_read) { if (offset > 0x800) printf("help! %X\n", offset); return (0xff00 \| m_grom_region->base()[offset]); }
r23623	r23624
488	488	int read_stic_handshake() { return m_stic_handshake; }
489	489	void set_x_scale(int val) { m_x_scale = val; }
490	490	void set_y_scale(int val) { m_y_scale = val; }
491
	491
492	492	// device-level overrides
493	493	virtual void device_start();
494	494	virtual const rom_entry *device_rom_region() const;
495	495	virtual void device_reset();
496
	496
497	497	void screenrefresh();
498	498	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
499	499
500	500	private:
501
	501
502	502	required_memory_region m_grom_region;
503	503
504	504	void intv_set_pixel(bitmap_ind16 &bitmap, int x, int y, UINT32 color);
r23623	r23624
514	514	void copy_sprites_to_background(bitmap_ind16 &bitmap);
515	515	void render_background(bitmap_ind16 &bitmap);
516	516	void draw_borders(bitmap_ind16 &bitmap);
517
	517
518	518	#ifdef UNUSED_CODE
519	519	void draw_background(bitmap_ind16 &bitmap, int transparency);
520	520	void draw_sprites(bitmap_ind16 &bitmap, int behind_foreground);
521	521	#endif
522
	522
523	523	bitmap_ind16 m_bitmap;
524
	524
525	525	intv_sprite_type m_sprite[STIC_MOBS];
526	526	UINT8 m_sprite_buffers[STIC_MOBS][STIC_CARD_WIDTH * 2][STIC_CARD_HEIGHT * 4 * 2 * 2];
527	527	UINT16 m_backtab_buffer[STIC_BACKTAB_HEIGHT][STIC_BACKTAB_WIDTH];
r23623	r23624
539	539
540	540	UINT8 m_gramdirty;
541	541	UINT8 m_gram[512];
542		UINT8 m_gramdirtybytes[512];
	542	UINT8 m_gramdirtybytes[512];
543	543	};
544	544
545	545	// device type definition

trunk/src/mess/video/nick.c
r23623	r23624
104	104
105	105	nick_device::nick_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
106	106	: device_t(mconfig, NICK, "NICK", tag, owner, clock, "nick", __FILE__),
107		device_memory_interface(mconfig, *this),
108		m_space_config("vram", ENDIANNESS_LITTLE, 8, 16, 0, *ADDRESS_MAP_NAME(nick_map)),
109		m_write_virq(*this),
110		horizontal_clock(0),
111		m_scanline_count(0),
112		m_FIXBIAS(0),
113		m_BORDER(0),
114		m_LPL(0),
115		m_LPH(0),
116		m_LD1(0),
117		m_LD2(0),
118		m_virq(CLEAR_LINE)
	107	device_memory_interface(mconfig, *this),
	108	m_space_config("vram", ENDIANNESS_LITTLE, 8, 16, 0, *ADDRESS_MAP_NAME(nick_map)),
	109	m_write_virq(*this),
	110	horizontal_clock(0),
	111	m_scanline_count(0),
	112	m_FIXBIAS(0),
	113	m_BORDER(0),
	114	m_LPL(0),
	115	m_LPH(0),
	116	m_LD1(0),
	117	m_LD2(0),
	118	m_virq(CLEAR_LINE)
119	119	{
120	120	}
121	121
r23623	r23624
243	243
244	244
245	245	//-------------------------------------------------
246		// fixbias_w -
	246	// fixbias_w -
247	247	//-------------------------------------------------
248	248
249	249	WRITE8_MEMBER( nick_device::fixbias_w )
r23623	r23624
253	253
254	254
255	255	//-------------------------------------------------
256		// border_w -
	256	// border_w -
257	257	//-------------------------------------------------
258	258
259	259	WRITE8_MEMBER( nick_device::border_w )
r23623	r23624
263	263
264	264
265	265	//-------------------------------------------------
266		// lpl_w -
	266	// lpl_w -
267	267	//-------------------------------------------------
268	268
269	269	WRITE8_MEMBER( nick_device::lpl_w )
r23623	r23624
275	275
276	276
277	277	//-------------------------------------------------
278		// lph_w -
	278	// lph_w -
279	279	//-------------------------------------------------
280	280
281	281	WRITE8_MEMBER( nick_device::lph_w )
r23623	r23624
287	287
288	288
289	289	//-------------------------------------------------
290		// initialize_palette -
	290	// initialize_palette -
291	291	//-------------------------------------------------
292	292
293	293	void nick_device::initialize_palette()
r23623	r23624
305	305	for (int i = 0; i < 256; i++)
306	306	{
307	307	/*
308
	308
309	309	bit description
310
	310
311	311	PC0 100R -- RED
312	312	PC1 100R -- GREEN
313	313	PC2 82R -- BLUE
r23623	r23624
316	316	PC5 220R -- BLUE
317	317	PC6 470R -- RED
318	318	PC7 470R -- GREEN
319
	319
320	320	*/
321	321
322	322	int ra = BIT(i, 0);
r23623	r23624
340	340	for (int i = 0; i < 256; i++)
341	341	{
342	342	int pen_index;
343
	343
344	344	pen_index = (BIT(i, 7) << 0) \| (BIT(i, 3) << 1);
345	345	m_pen_idx_4col[i] = pen_index;
346
	346
347	347	pen_index = (BIT(i, 7) << 0) \| (BIT(i, 3) << 1) \| (BIT(i, 5) << 2) \| (BIT(i, 1) << 3);
348	348	m_pen_idx_16col[i] = pen_index;
349	349	}
r23623	r23624
437	437	int col_index[2];
438	438	int pen_index;
439	439	UINT8 data = data_byte;
440
	440
441	441	col_index[0] = get_color_index(pen0);
442	442	col_index[1] = get_color_index(pen1);
443
	443
444	444	for (int i = 0; i < 8; i++)
445	445	{
446	446	pen_index = col_index[BIT(data, 7)];

trunk/src/mess/video/nick.h
r23623	r23624
66	66	// ======================> nick_device
67	67
68	68	class nick_device : public device_t,
69		public device_memory_interface
	69	public device_memory_interface
70	70	{
71	71	public:
72	72	// construction/destruction
r23623	r23624
132	132	UINT8 horizontal_clock;
133	133	/* current scanline within LPT */
134	134	UINT8 m_scanline_count;
135
	135
136	136	UINT8 m_FIXBIAS;
137	137	UINT8 m_BORDER;
138	138	UINT8 m_LPL;
139	139	UINT8 m_LPH;
140
	140
141	141	UINT16 m_LD1;
142	142	UINT16 m_LD2;
143
	143
144	144	LPT_ENTRY m_LPT;
145
	145
146	146	UINT32 *m_dest;
147	147	int m_dest_pos;
148	148	int m_dest_max_pos;
149
	149
150	150	UINT8 m_reg[4];
151
	151
152	152	/* first clock visible on left hand side */
153	153	int m_first_visible_clock;
154	154	/* first clock visible on right hand side */
155	155	int m_last_visible_clock;
156
	156
157	157	/* given a bit pattern, this will get the pen index */
158	158	UINT8 m_pen_idx_4col[256];
159	159	/* given a bit pattern, this will get the pen index */

trunk/src/mess/video/gf4500.c
r23623	r23624
74	74	{
75	75	m_screen_x = m_screen_y = 0;
76	76	m_screen_x_max = m_screen_y_max = m_screen_x_min = m_screen_y_min = 0;
77		}
	77	}
78	78
79	79
80	80	void gf4500_device::vram_write16( UINT16 data )
r23623	r23624
180	180	}
181	181	}
182	182	}
183

trunk/src/mess/video/gf4500.h
r23623	r23624
15	15	public:
16	16	gf4500_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
17	17	~gf4500_device() {}
18
19
	18
	19
20	20	DECLARE_READ32_MEMBER( read );
21	21	DECLARE_WRITE32_MEMBER( write );
22	22
r23623	r23624
27	27	virtual void device_config_complete();
28	28	virtual void device_start();
29	29	virtual void device_reset();
30
31		private:
	30
	31	private:
32	32	// internal state
33	33
34	34	void vram_write16(UINT16 data);
35
	35
36	36	UINT32 *m_data;
37	37	int m_screen_x;
38	38	int m_screen_y;

trunk/src/mess/video/newport.c
r23623	r23624
102	102	void newport_video_device::device_start()
103	103	{
104	104	m_base = auto_alloc_array_clear(machine(), UINT32, (1280+64) * (1024+64));
105
	105
106	106	save_pointer(NAME(m_base), (1280+64) * (1024+64));
107	107	save_item(NAME(m_VC2.nRegister));
108	108	save_item(NAME(m_VC2.nRAM));
r23623	r23624
203	203	m_REX3.nDrawMode0 = 0x00000000;
204	204	m_REX3.nDrawMode1 = 0x3002f001;
205	205	m_REX3.nDCBMode = 0x00000780;
206		m_REX3.nKludge_SkipLine = 0;
207		}
	206	m_REX3.nKludge_SkipLine = 0;
	207	}
208	208
209	209
210	210	UINT32 newport_video_device::screen_update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect)
r23623	r23624
214	214	{
215	215	UINT32 src = &m_base[1344 y];
216	216	UINT32 *dest = &bitmap.pix32(y, cliprect.min_x);
217
	217
218	218	/* loop over columns */
219	219	for (int x = cliprect.min_x; x < cliprect.max_x; x++)
220	220	{

trunk/src/mess/includes/sg1000.h
r23623	r23624
29	29	#define UPD9255_1_TAG "upd9255_1"
30	30	#define CENTRONICS_TAG "centronics"
31	31	#define TMS9918A_TAG "tms9918a"
32		#define RS232_TAG "rs232"
33		#define CARTSLOT_TAG "slot"
	32	#define RS232_TAG "rs232"
	33	#define CARTSLOT_TAG "slot"
34	34
35	35
36	36	INPUT_PORTS_EXTERN( sk1100 );

trunk/src/mess/includes/victor9k.h
r23623	r23624
43	43	#define M6522_4_TAG "1f"
44	44	#define M6522_5_TAG "1k"
45	45	#define M6522_6_TAG "1h"
46		#define DAC0808_0_TAG "5b"
47		#define DAC0808_1_TAG "5c"
	46	#define DAC0808_0_TAG "5b"
	47	#define DAC0808_1_TAG "5c"
48	48	#define CENTRONICS_TAG "centronics"
49	49	#define RS232_A_TAG "rs232a"
50	50	#define RS232_B_TAG "rs232b"
r23623	r23624
203	203	int m_rdy1;
204	204	int m_ds0;
205	205	int m_ds1;
206		UINT8 m_lms; /* motor speed */
	206	UINT8 m_lms; /* motor speed */
207	207	int m_st[2]; /* stepper phase */
208	208	int m_stp[2]; /* stepper enable */
209	209	int m_drive; /* selected drive */

trunk/src/mess/includes/tandy2k.h
r23623	r23624
35	35	#define WD1010_TAG "u18"
36	36	#define WD1100_11_TAG "u12"
37	37	#define CENTRONICS_TAG "centronics"
38		#define RS232_TAG "rs232"
	38	#define RS232_TAG "rs232"
39	39
40	40	class tandy2k_state : public driver_device
41	41	{

trunk/src/mess/includes/gba.h
r23623	r23624
265	265
266	266	inline void update_mask(UINT8* mask, int mode, int submode, UINT32* obj_win, UINT8 inwin0, UINT8 inwin1, UINT8 in0_mask, UINT8 in1_mask, UINT8 out_mask);
267	267	void draw_modes(int mode, int submode, int y, UINT32* line0, UINT32* line1, UINT32* line2, UINT32* line3, UINT32* lineOBJ, UINT32* lineOBJWin, UINT32* lineMix, int bpp);
268
	268
269	269	protected:
270	270	required_memory_region m_region_maincpu;
271	271	required_ioport m_io_in0;

trunk/src/mess/includes/superslave.h
r23623	r23624
13	13	#include "machine/z80dart.h"
14	14	#include "machine/z80pio.h"
15	15
16		#define Z80_TAG "u45"
17		#define Z80DART_0_TAG "u14"
18		#define Z80DART_1_TAG "u30"
19		#define Z80PIO_TAG "u43"
20		#define AM9519_TAG "u13"
21		#define BR1941_TAG "u12"
	16	#define Z80_TAG "u45"
	17	#define Z80DART_0_TAG "u14"
	18	#define Z80DART_1_TAG "u30"
	19	#define Z80PIO_TAG "u43"
	20	#define AM9519_TAG "u13"
	21	#define BR1941_TAG "u12"
22	22	#define RS232_A_TAG "rs232a"
23	23	#define RS232_B_TAG "rs232b"
24	24	#define RS232_C_TAG "rs232c"
r23623	r23624
29	29	public:
30	30	superslave_state(const machine_config &mconfig, device_type type, const char *tag)
31	31	: driver_device(mconfig, type, tag),
32		m_maincpu(*this, Z80_TAG),
33		m_dart0(*this, Z80DART_0_TAG),
34		m_dart1(*this, Z80DART_1_TAG),
35		m_dbrg(*this, BR1941_TAG),
36		m_ram(*this, RAM_TAG),
37		m_rs232a(*this, RS232_A_TAG),
38		m_rs232b(*this, RS232_B_TAG),
39		m_rs232c(*this, RS232_C_TAG),
40		m_rs232d(*this, RS232_D_TAG),
41		m_rom(*this, Z80_TAG),
42		m_memctrl(0x01),
43		m_cmd(0x01)
	32	m_maincpu(*this, Z80_TAG),
	33	m_dart0(*this, Z80DART_0_TAG),
	34	m_dart1(*this, Z80DART_1_TAG),
	35	m_dbrg(*this, BR1941_TAG),
	36	m_ram(*this, RAM_TAG),
	37	m_rs232a(*this, RS232_A_TAG),
	38	m_rs232b(*this, RS232_B_TAG),
	39	m_rs232c(*this, RS232_C_TAG),
	40	m_rs232d(*this, RS232_D_TAG),
	41	m_rom(*this, Z80_TAG),
	42	m_memctrl(0x01),
	43	m_cmd(0x01)
44	44	{ }
45	45
46	46	required_device<cpu_device> m_maincpu;

trunk/src/mess/includes/vixen.h
r23623	r23624
20	20	#define P8251A_TAG "c3"
21	21	#define DISCRETE_TAG "discrete"
22	22	#define SCREEN_TAG "screen"
23		#define RS232_TAG "rs232"
	23	#define RS232_TAG "rs232"
24	24
25	25	class vixen_state : public driver_device
26	26	{

trunk/src/mess/includes/mac.h
r23623	r23624
152	152	public:
153	153	mac_sound_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
154	154	~mac_sound_device() {}
155
	155
156	156	void enable_sound(int on);
157	157	void set_sound_buffer(int buffer);
158	158	void set_volume(int volume);
r23623	r23624
167	167	virtual void sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples);
168	168	private:
169	169	// internal state
170
	170
171	171	ram_device *m_ram;
172	172	model_t m_mac_model;
173	173

trunk/src/mess/includes/wangpc.h
r23623	r23624
36	36	#define SCN2661_TAG "scn2661"
37	37	#define UPD765_TAG "upd765"
38	38	#define CENTRONICS_TAG "centronics"
39		#define RS232_TAG "rs232"
	39	#define RS232_TAG "rs232"
40	40
41	41	class wangpc_state : public driver_device
42	42	{

trunk/src/mess/includes/ep64.h
r23623	r23624
24	24	#include "video/nick.h"
25	25
26	26	#define Z80_TAG "u1"
27		#define DAVE_TAG "u3"
28		#define NICK_TAG "u4"
29		#define CENTRONICS_TAG "centronics"
30		#define RS232_TAG "rs232"
31		#define CASSETTE1_TAG "cassette1"
32		#define CASSETTE2_TAG "cassette2"
33		#define SCREEN_TAG "screen"
	27	#define DAVE_TAG "u3"
	28	#define NICK_TAG "u4"
	29	#define CENTRONICS_TAG "centronics"
	30	#define RS232_TAG "rs232"
	31	#define CASSETTE1_TAG "cassette1"
	32	#define CASSETTE2_TAG "cassette2"
	33	#define SCREEN_TAG "screen"
34	34
35	35	class ep64_state : public driver_device
36	36	{
37	37	public:
38	38	ep64_state(const machine_config &mconfig, device_type type, const char *tag)
39	39	: driver_device(mconfig, type, tag),
40		m_maincpu(*this, Z80_TAG),
41		m_dave(*this, DAVE_TAG),
42		m_nick(*this, NICK_TAG),
43		m_centronics(*this, CENTRONICS_TAG),
44		m_rs232(*this, RS232_TAG),
45		m_cassette1(*this, CASSETTE1_TAG),
46		m_cassette2(*this, CASSETTE2_TAG),
47		m_ram(*this, RAM_TAG),
48		m_rom(*this, Z80_TAG),
49		m_y0(*this, "Y0"),
50		m_y1(*this, "Y1"),
51		m_y2(*this, "Y2"),
52		m_y3(*this, "Y3"),
53		m_y4(*this, "Y4"),
54		m_y5(*this, "Y5"),
55		m_y6(*this, "Y6"),
56		m_y7(*this, "Y7"),
57		m_y8(*this, "Y8"),
58		m_y9(*this, "Y9")
	40	m_maincpu(*this, Z80_TAG),
	41	m_dave(*this, DAVE_TAG),
	42	m_nick(*this, NICK_TAG),
	43	m_centronics(*this, CENTRONICS_TAG),
	44	m_rs232(*this, RS232_TAG),
	45	m_cassette1(*this, CASSETTE1_TAG),
	46	m_cassette2(*this, CASSETTE2_TAG),
	47	m_ram(*this, RAM_TAG),
	48	m_rom(*this, Z80_TAG),
	49	m_y0(*this, "Y0"),
	50	m_y1(*this, "Y1"),
	51	m_y2(*this, "Y2"),
	52	m_y3(*this, "Y3"),
	53	m_y4(*this, "Y4"),
	54	m_y5(*this, "Y5"),
	55	m_y6(*this, "Y6"),
	56	m_y7(*this, "Y7"),
	57	m_y8(*this, "Y8"),
	58	m_y9(*this, "Y9")
59	59	{ }
60	60
61	61	required_device<cpu_device> m_maincpu;
r23623	r23624
80	80
81	81	virtual void machine_start();
82	82	virtual void machine_reset();
83
	83
84	84	DECLARE_READ8_MEMBER( rd0_r );
85	85	DECLARE_WRITE8_MEMBER( wr0_w );
86	86	DECLARE_READ8_MEMBER( rd1_r );

trunk/src/mess/includes/v1050.h
r23623	r23624
43	43	#define TIMER_ACK_TAG "timer_ack"
44	44	#define TIMER_RST_TAG "timer_rst"
45	45	#define SASIBUS_TAG "sasi"
46		#define RS232_TAG "rs232"
	46	#define RS232_TAG "rs232"
47	47
48	48	#define V1050_VIDEORAM_SIZE 0x8000
49	49	#define V1050_VIDEORAM_MASK 0x7fff

trunk/src/mess/includes/bw12.h
r23623	r23624
28	28	#define AY3600PRO002_TAG "ic74"
29	29	#define CENTRONICS_TAG "centronics"
30	30	#define FLOPPY_TIMER_TAG "motor_off"
31		#define RS232_A_TAG "rs232a"
32		#define RS232_B_TAG "rs232b"
	31	#define RS232_A_TAG "rs232a"
	32	#define RS232_B_TAG "rs232b"
33	33
34	34	#define BW12_VIDEORAM_MASK 0x7ff
35	35	#define BW12_CHARROM_MASK 0xfff

trunk/src/mess/includes/pc1512.h
r23623	r23624
36	36	#define SPEAKER_TAG "speaker"
37	37	#define ISA_BUS_TAG "isa"
38	38	#define SCREEN_TAG "screen"
39		#define RS232_TAG "rs232"
	39	#define RS232_TAG "rs232"
40	40
41	41	class pc1512_state : public driver_device
42	42	{

trunk/src/mess/includes/sms.h
r23623	r23624
102	102	device_t *m_left_lcd;
103	103	device_t *m_right_lcd;
104	104	address_space *m_space;
105
	105
106	106	UINT8 m_bios_page_count;
107	107	UINT8 m_fm_detect;
108	108	UINT8 m_ctrl_reg;
r23623	r23624
113	113	UINT8 m_input_port0;
114	114	UINT8 m_input_port1;
115	115	UINT8 m_gg_sio[5];
116
	116
117	117	// [0] for 0x400-0x3fff, [1] for 0x4000-0x7fff, [2] for 0x8000-0xffff, [3] for 0x0000-0x0400
118	118	int m_bank_enabled[4];
119	119	UINT8 m_bios_page[4];
120
	120
121	121	// for gamegear LCD persistence hack
122	122	bitmap_rgb32 m_prev_bitmap;
123	123
r23623	r23624
168	168	UINT8 m_frame_sscope_state;
169	169
170	170	// these are only used by the Store Display unit, but we keep them here temporarily to avoid the need of separate start/reset
171		UINT8 m_store_control;
	171	UINT8 m_store_control;
172	172	int m_current_cartridge;
173	173	sega8_cart_slot_device *m_slots[16];
174	174	sega8_card_slot_device *m_cards[16];
r23623	r23624
241	241	: sms_state(mconfig, type, tag),
242	242	m_control_cpu(*this, "control")
243	243	{ }
244
	244
245	245	required_device<cpu_device> m_control_cpu;
246	246
247	247	DECLARE_READ8_MEMBER(sms_store_cart_select_r);
r23623	r23624
251	251	DECLARE_READ8_MEMBER(sms_store_control_r);
252	252	DECLARE_WRITE8_MEMBER(sms_store_control_w);
253	253	DECLARE_DRIVER_INIT(smssdisp);
254
	254
255	255	DECLARE_READ8_MEMBER(store_read_0000);
256	256	DECLARE_READ8_MEMBER(store_read_4000);
257	257	DECLARE_READ8_MEMBER(store_read_8000);
258	258	DECLARE_READ8_MEMBER(store_cart_peek);
259	259	DECLARE_WRITE8_MEMBER(store_write_cart);
260
	260
261	261	DECLARE_WRITE_LINE_MEMBER(sms_store_int_callback);
262	262	};
263	263

trunk/src/mess/includes/hx20.h
r23623	r23624
14	14	#include "sound/speaker.h"
15	15	#include "rendlay.h"
16	16
17		#define HD6301V1_MAIN_TAG "8g"
18		#define HD6301V1_SLAVE_TAG "6d"
19		#define MC146818_TAG "6g"
20		#define UPD7227_0_TAG "lcdc0"
21		#define UPD7227_1_TAG "lcdc1"
22		#define UPD7227_2_TAG "lcdc2"
23		#define UPD7227_3_TAG "lcdc3"
24		#define UPD7227_4_TAG "lcdc4"
25		#define UPD7227_5_TAG "lcdc5"
26		#define SPEAKER_TAG "speaker"
27		#define CASSETTE_TAG "cassette"
28		#define RS232_TAG "rs232"
29		#define SCREEN_TAG "screen"
	17	#define HD6301V1_MAIN_TAG "8g"
	18	#define HD6301V1_SLAVE_TAG "6d"
	19	#define MC146818_TAG "6g"
	20	#define UPD7227_0_TAG "lcdc0"
	21	#define UPD7227_1_TAG "lcdc1"
	22	#define UPD7227_2_TAG "lcdc2"
	23	#define UPD7227_3_TAG "lcdc3"
	24	#define UPD7227_4_TAG "lcdc4"
	25	#define UPD7227_5_TAG "lcdc5"
	26	#define SPEAKER_TAG "speaker"
	27	#define CASSETTE_TAG "cassette"
	28	#define RS232_TAG "rs232"
	29	#define SCREEN_TAG "screen"
30	30
31	31	class hx20_state : public driver_device
32	32	{
33	33	public:
34	34	hx20_state(const machine_config &mconfig, device_type type, const char *tag)
35	35	: driver_device(mconfig, type, tag),
36		m_maincpu(*this, HD6301V1_MAIN_TAG),
37		m_subcpu(*this, HD6301V1_SLAVE_TAG),
38		m_rtc(*this, MC146818_TAG),
39		m_lcdc0(*this, UPD7227_0_TAG),
40		m_lcdc1(*this, UPD7227_1_TAG),
41		m_lcdc2(*this, UPD7227_2_TAG),
42		m_lcdc3(*this, UPD7227_3_TAG),
43		m_lcdc4(*this, UPD7227_4_TAG),
44		m_lcdc5(*this, UPD7227_5_TAG),
45		m_speaker(*this, SPEAKER_TAG),
46		m_cassette(*this, CASSETTE_TAG),
47		m_rs232(*this, RS232_TAG),
48		m_sio(*this, "sio"),
49		m_ksc0(*this, "KSC0"),
50		m_ksc1(*this, "KSC1"),
51		m_ksc2(*this, "KSC2"),
52		m_ksc3(*this, "KSC3"),
53		m_ksc4(*this, "KSC4"),
54		m_ksc5(*this, "KSC5"),
55		m_ksc6(*this, "KSC6"),
56		m_ksc7(*this, "KSC7"),
57		m_sw6(*this, "SW6"),
58		m_slave_rx(1),
59		m_slave_tx(1),
60		m_slave_flag(1),
61		m_rtc_irq(CLEAR_LINE),
62		m_kbrequest(1)
	36	m_maincpu(*this, HD6301V1_MAIN_TAG),
	37	m_subcpu(*this, HD6301V1_SLAVE_TAG),
	38	m_rtc(*this, MC146818_TAG),
	39	m_lcdc0(*this, UPD7227_0_TAG),
	40	m_lcdc1(*this, UPD7227_1_TAG),
	41	m_lcdc2(*this, UPD7227_2_TAG),
	42	m_lcdc3(*this, UPD7227_3_TAG),
	43	m_lcdc4(*this, UPD7227_4_TAG),
	44	m_lcdc5(*this, UPD7227_5_TAG),
	45	m_speaker(*this, SPEAKER_TAG),
	46	m_cassette(*this, CASSETTE_TAG),
	47	m_rs232(*this, RS232_TAG),
	48	m_sio(*this, "sio"),
	49	m_ksc0(*this, "KSC0"),
	50	m_ksc1(*this, "KSC1"),
	51	m_ksc2(*this, "KSC2"),
	52	m_ksc3(*this, "KSC3"),
	53	m_ksc4(*this, "KSC4"),
	54	m_ksc5(*this, "KSC5"),
	55	m_ksc6(*this, "KSC6"),
	56	m_ksc7(*this, "KSC7"),
	57	m_sw6(*this, "SW6"),
	58	m_slave_rx(1),
	59	m_slave_tx(1),
	60	m_slave_flag(1),
	61	m_rtc_irq(CLEAR_LINE),
	62	m_kbrequest(1)
63	63	{ }
64	64
65	65	required_device<cpu_device> m_maincpu;

trunk/src/mess/includes/abc1600.h
r23623	r23624
42	42	#define BUS0X_TAG "bus0x"
43	43	#define BUS1_TAG "bus1"
44	44	#define BUS2_TAG "bus2"
45		#define RS232_A_TAG "rs232a"
46		#define RS232_B_TAG "rs232b"
	45	#define RS232_A_TAG "rs232a"
	46	#define RS232_B_TAG "rs232b"
47	47
48	48
49	49

trunk/src/mame/layout/speedbal.lay
r23623	r23624
75	75	<bezel name="digit10" element="digit">
76	76	<bounds left="10" top="-20" right="20" bottom="-8" />
77	77	</bezel>
78		<bezel name="digit20" element="digit">
	78	<bezel name="digit20" element="digit">
79	79	<bounds left="20" top="-20" right="30" bottom="-8" />
80	80	</bezel>
81		<bezel name="digit30" element="digit">
	81	<bezel name="digit30" element="digit">
82	82	<bounds left="30" top="-20" right="40" bottom="-8" />
83	83	</bezel>
84	84	<bezel name="digit40" element="digit">
r23623	r23624
193	193
194	194
195	195	</view>
196
	196
197	197	</mamelayout>

trunk/src/mame/drivers/asteroid.c
r23623	r23624
392	392
393	393	static INPUT_PORTS_START( aerolitos )
394	394	PORT_INCLUDE( asteroid )
395
	395
396	396	PORT_MODIFY("DSW1") // this bootleg was for the Spanish market, so set it to Spanish by default
397	397	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:1,2")
398	398	PORT_DIPSETTING ( 0x00, DEF_STR( English ) )

trunk/src/mame/drivers/mil4000.c
r23623	r23624
502	502
503	503	Sound: 1x U6295 (U53)
504	504
505		RAM: 2x 6116.
	505	RAM: 2x 6116.
506	506	2x 6264 (prg RAM)
507	507	2x 62256 (near battery)
508	508
r23623	r23624
518	518
519	519	*/
520	520	ROM_START( top21 )
521		ROM_REGION( 0x100000, "maincpu", 0 ) // 68000 code
	521	ROM_REGION( 0x100000, "maincpu", 0 ) // 68000 code
522	522	ROM_LOAD16_BYTE( "odd_1-2.u75", 0x000001, 0x80000, CRC(ce4f2a74) SHA1(f9a9043da924ddba16f49d6856dbcfd8f066c824) )
523	523	ROM_LOAD16_BYTE( "even_1-2.u76", 0x000000, 0x80000, CRC(8d645456) SHA1(06c59816f259168f15503b276fc28c947e17cc60) )
524		ROM_COPY( "maincpu", 0x080000, 0x00000, 0x80000 ) // copying the second halves to the right offset
	524	ROM_COPY( "maincpu", 0x080000, 0x00000, 0x80000 ) // copying the second halves to the right offset
525	525
526	526	ROM_REGION( 0xa0000, "gfx1", 0 )
527	527	ROM_LOAD( "36.u36", 0x000000, 0x20000, CRC(071883f7) SHA1(16b5c251975394bb94c0d32277912ea99280c21c) )
528		ROM_LOAD( "35.u35", 0x020000, 0x20000, CRC(cdc8cc44) SHA1(ce703e7f050465b1bc07800eb84eb7f127ebbddb) ) // double size. 2nd half empty
	528	ROM_LOAD( "35.u35", 0x020000, 0x20000, CRC(cdc8cc44) SHA1(ce703e7f050465b1bc07800eb84eb7f127ebbddb) ) // double size. 2nd half empty
529	529	ROM_IGNORE( 0x20000)
530	530	ROM_LOAD( "34.u34", 0x040000, 0x20000, CRC(bdbe7360) SHA1(3038f66d57a43afea9d6c05908bfb50167a881c2) )
531	531	ROM_LOAD( "33.u33", 0x060000, 0x20000, CRC(670584b0) SHA1(23772404b5e5066828c59d9baa03b732a80db676) )
532	532	ROM_LOAD( "32.u32", 0x080000, 0x20000, CRC(c5bc3950) SHA1(aebaae91ade0c221ba14186fde78206996cdec30) )
533	533
534		ROM_REGION( 0x80000, "oki", 0 ) // 6295 samples (first half empty)
	534	ROM_REGION( 0x80000, "oki", 0 ) // 6295 samples (first half empty)
535	535	ROM_LOAD( "audio.u64", 0x00000, 0x80000, CRC(4f70a9bc) SHA1(83f0664eadf923ed45e3e18bfcefafb85163c4a0) )
536		ROM_COPY( "oki", 0x40000, 0x00000, 0x40000 ) // copying the second half to the right offset
	536	ROM_COPY( "oki", 0x40000, 0x00000, 0x40000 ) // copying the second half to the right offset
537	537
538		ROM_REGION( 0x4000, "mcu", 0 ) // MCU code
	538	ROM_REGION( 0x4000, "mcu", 0 ) // MCU code
539	539	ROM_LOAD( "pic16c65b_top21.u60", 0x0000, 0x4000, NO_DUMP )
540	540
541		ROM_REGION( 0x10000, "nvram", 0 ) // default NVRAM (2x 62256)
	541	ROM_REGION( 0x10000, "nvram", 0 ) // default NVRAM (2x 62256)
542	542	ROM_LOAD( "top21_nvram.bin", 0x00000, 0x10000, CRC(638726ce) SHA1(c55c77df5fbddfb19acf50f1b4467c63c818d5e7) )
543	543	ROM_END
544	544

trunk/src/mame/drivers/ddealer.c
r23623	r23624
1	1	/*********************************************************************************************************
2	2
3		Double Dealer (c)NMK 1991
	3	Double Dealer (c)NMK 1991
4	4
5		driver by Angelo Salese & David Haywood, based on early work by Tomasz Slanina
	5	driver by Angelo Salese & David Haywood, based on early work by Tomasz Slanina
6	6
7		Appears to be a down-grade of the nmk16 HW
	7	Appears to be a down-grade of the nmk16 HW
8	8
9		TODO:
10		-When you use the "gun card" the game gives "minus" points,but points are always added,inaccurate protection?
11		-Understand better the video emulation and convert it to tilemaps;
12		-A Double Dealer manual is needed for the coinage settings and coin/credit simulation;
13		-Decap + emulate MCU, required if the random number generation is going to be accurate;
	9	TODO:
	10	-When you use the "gun card" the game gives "minus" points,but points are always added,inaccurate protection?
	11	-Understand better the video emulation and convert it to tilemaps;
	12	-A Double Dealer manual is needed for the coinage settings and coin/credit simulation;
	13	-Decap + emulate MCU, required if the random number generation is going to be accurate;
14	14
15	15	==========================================================================================================
16		--
	16	--
17	17
18		pcb marked GD91071
	18	pcb marked GD91071
19	19
20		68000P10
21		YM2203C
22		91071-3 (Mask ROM)
23		NMK-110 8131 ( Mitsubishi M50747 MCU ?)
24		NMK 901
25		NMK 902
26		NMK 903 x2
27		82S135N ("5")
28		82S129N ("6")
29		xtals 16.000 MHz and 6.000 MHz
30		DSW x2
	20	68000P10
	21	YM2203C
	22	91071-3 (Mask ROM)
	23	NMK-110 8131 ( Mitsubishi M50747 MCU ?)
	24	NMK 901
	25	NMK 902
	26	NMK 903 x2
	27	82S135N ("5")
	28	82S129N ("6")
	29	xtals 16.000 MHz and 6.000 MHz
	30	DSW x2
31	31
32		--
	32	--
33	33
34		Few words about protection:
	34	Few words about protection:
35	35
36		- Work RAM at $fe000 - $fffff is shared with MCU . Maybe whole $f0000-$fffff is shared ...
37		- After boot, game writes random-looking data to work RAM:
	36	- Work RAM at $fe000 - $fffff is shared with MCU . Maybe whole $f0000-$fffff is shared ...
	37	- After boot, game writes random-looking data to work RAM:
38	38
39		00052C: 33FC 1234 000F E086 move.w #$1234, $fe086.l
40		000534: 33FC 5678 000F E164 move.w #$5678, $fe164.l
41		00053C: 33FC 9CA3 000F E62E move.w #$9ca3, $fe62e.l
42		000544: 33FC ABA2 000F E734 move.w #$aba2, $fe734.l
43		00054C: 33FC B891 000F E828 move.w #$b891, $fe828.l
44		000554: 33FC C760 000F E950 move.w #$c760, $fe950.l
45		00055C: 33FC D45F 000F EA7C move.w #$d45f, $fea7c.l
46		000564: 33FC E32E 000F ED4A move.w #$e32e, $fed4a.l
	39	00052C: 33FC 1234 000F E086 move.w #$1234, $fe086.l
	40	000534: 33FC 5678 000F E164 move.w #$5678, $fe164.l
	41	00053C: 33FC 9CA3 000F E62E move.w #$9ca3, $fe62e.l
	42	000544: 33FC ABA2 000F E734 move.w #$aba2, $fe734.l
	43	00054C: 33FC B891 000F E828 move.w #$b891, $fe828.l
	44	000554: 33FC C760 000F E950 move.w #$c760, $fe950.l
	45	00055C: 33FC D45F 000F EA7C move.w #$d45f, $fea7c.l
	46	000564: 33FC E32E 000F ED4A move.w #$e32e, $fed4a.l
47	47
48		Some (or maybe all ?) of above enables random generator at $fe010 - $fe017
	48	Some (or maybe all ?) of above enables random generator at $fe010 - $fe017
49	49
50		- There's also MCU response (write/read/test) test just after these writes.
51		(probably data used in the check depends on above writes). It's similar to
52		jalmah.c tests, but num of responses is different, and shared ram is
53		used to communicate with MCU
	50	- There's also MCU response (write/read/test) test just after these writes.
	51	(probably data used in the check depends on above writes). It's similar to
	52	jalmah.c tests, but num of responses is different, and shared ram is
	53	used to communicate with MCU
54	54
55		- After last check (or maybe durning tests ... no idea)
56		MCU writes $4ef900000604 (jmp $604) to $fe000 and game jumps to this address.
	55	- After last check (or maybe durning tests ... no idea)
	56	MCU writes $4ef900000604 (jmp $604) to $fe000 and game jumps to this address.
57	57
58		- code at $604 writes $20.w to $fe018 and $1.w to $fe01e.
59		As result shared ram $fe000 - $fe007 is cleared.
	58	- code at $604 writes $20.w to $fe018 and $1.w to $fe01e.
	59	As result shared ram $fe000 - $fe007 is cleared.
60	60
61		Also many, many other reads/writes from/to shared mem.
62		Few checks every interrupt:
	61	Also many, many other reads/writes from/to shared mem.
	62	Few checks every interrupt:
63	63
64	64	interrupt, lvl1
65	65

trunk/src/mame/drivers/statriv2.c
r23623	r23624
85	85	m_tms(*this, "tms"),
86	86	m_videoram(*this, "videoram"),
87	87	m_question_offset(*this, "question_offset")
88		{ }
	88	{ }
89	89
90	90	required_device<cpu_device> m_maincpu;
91	91	required_device<tms9927_device> m_tms;

trunk/src/mame/drivers/ambush.c
r23623	r23624
286	286
287	287	ROM_START( ambushh )
288	288	ROM_REGION( 0x10000, "maincpu", 0 )
289		/* displays an M ("Mal" is Bad in Spanish) next to ROM 1 during the test, why is internal checksum wrong (0x02 instead of 0x00) ?
	289	/* displays an M ("Mal" is Bad in Spanish) next to ROM 1 during the test, why is internal checksum wrong (0x02 instead of 0x00) ?
290	290	I think the ROM has been hacked(?)
291	291	*/
292	292	ROM_LOAD( "a1_hack.i7", 0x0000, 0x2000, CRC(a7cd149d) SHA1(470ebe60bc23a7908fb96caef8074d65f8c57625) )
293		// 1A6D: 0C -> 00
294		// 1A75: 18 -> 0D
295		// 1A76: D5 -> 18
296		// 1A77: 00 -> D6
	293	// 1A6D: 0C -> 00
	294	// 1A75: 18 -> 0D
	295	// 1A76: D5 -> 18
	296	// 1A77: 00 -> D6
297	297
298	298	ROM_LOAD( "a2.g7", 0x2000, 0x2000, CRC(8328d88a) SHA1(690f0af10a0550566b67ee570f849b2764448d15) )
299	299	ROM_LOAD( "a3.f7", 0x4000, 0x2000, CRC(8db57ab5) SHA1(5cc7d7ebdfc91fb8d9ed52836d70c1de68001402) )

trunk/src/mame/drivers/gaplus.c
r23623	r23624
272	272	{
273	273	if(m_main_irq_mask)
274	274	m_maincpu->set_input_line(0, ASSERT_LINE);
275
	275
276	276	if (!m_namco58xx->read_reset_line()) /* give the cpu a tiny bit of time to write the command before processing it */
277	277	timer_set(attotime::from_usec(50), TIMER_NAMCOIO_RUN, 1);
278
	278
279	279	if (!m_namco56xx->read_reset_line()) /* give the cpu a tiny bit of time to write the command before processing it */
280	280	timer_set(attotime::from_usec(50), TIMER_NAMCOIO_RUN, 0);
281	281	}
r23623	r23624
960	960	DRIVER_INIT_MEMBER(gaplus_state,gaplus)
961	961	{
962	962	UINT8 *rom;
963
	963
964	964	rom = memregion("gfx1")->base();
965	965	for (int i = 0;i < 0x2000;i++)
966	966	rom[i + 0x2000] = rom[i] >> 4;
967
	967
968	968	rom = memregion("gfx2")->base() + 0x6000;
969	969	for (int i = 0;i < 0x2000;i++)
970	970	rom[i + 0x2000] = rom[i] << 4;
971
	971
972	972	m_type = GAME_GAPLUS;
973	973	}
974	974

trunk/src/mame/drivers/maygayep.c
r23623	r23624
6604	6604
6605	6605	#define EP_TREAS_SOUND \
6606	6606	ROM_REGION( 0x100000, "ymz", 0 ) \
6607		ROM_LOAD( "treas1_6.s0", 0x000000, 0x080000, CRC(df792dc0) SHA1(96647eb579a3a60f1a4a2bea53d7a13030838437) )
	6607	ROM_LOAD( "treas1_6.s0", 0x000000, 0x080000, CRC(df792dc0) SHA1(96647eb579a3a60f1a4a2bea53d7a13030838437) )
6608	6608
6609	6609	ROM_START( ep_treas )
6610	6610	ROM_REGION( 0x080000, "maincpu", 0 )

trunk/src/mame/drivers/savquest.c
r23623	r23624
423	423	*/
424	424
425	425	if ((data8 == 0x94)
426		\|\| (data8 == 0x9e)
427		\|\| (data8 == 0xa4)
428		\|\| (data8 == 0xb2)
429		\|\| (data8 == 0xbe)
430		\|\| (data8 == 0xd0)
431		)
	426	\|\| (data8 == 0x9e)
	427	\|\| (data8 == 0xa4)
	428	\|\| (data8 == 0xb2)
	429	\|\| (data8 == 0xbe)
	430	\|\| (data8 == 0xd0)
	431	)
432	432	{
433	433	return;
434	434	}
435	435
436	436	if ((data8 == 0x8a)
437		\|\| (data8 == 0x8e)
438		\|\| (data8 == 0xca)
439		\|\| (data8 == 0xd2)
440		\|\| (data8 == 0xe2)
441		\|\| (data8 == 0xf0)
442		\|\| (data8 == 0xfc)
443		)
	437	\|\| (data8 == 0x8e)
	438	\|\| (data8 == 0xca)
	439	\|\| (data8 == 0xd2)
	440	\|\| (data8 == 0xe2)
	441	\|\| (data8 == 0xf0)
	442	\|\| (data8 == 0xfc)
	443	)
444	444	{
445	445	/* someone with access to the actual dongle could dump the true values
446	446	I've never seen it so I just determined the relevant bits instead
r23623	r23624
509	509	}
510	510
511	511	if ((m_haspstate == HASPSTATE_PASSBEG)
512		&& (data8 & 1)
513		)
	512	&& (data8 & 1)
	513	)
514	514	{
515	515	m_hasp_tmppass[m_hasp_passind] = data8;
516	516

trunk/src/mame/drivers/proconn.c
r23623	r23624
5	5	what's the difference between the platforms, sound hardware?
6	6
7	7	Some early Proconn hardware was used for Maygay stuff, so this may be a bit of a mix.
8
	8
9	9	Error codes:
10
11		ERROR 1 EPROM FAILED
12		ERROR 3 RAM CORRUPTION DETECTED (common on PC90 boards)
13		ERROR 10 RAM FAILURE
14		ERROR 20 METERS DISCONNECTED
15		ERROR 21 CASH IN METER FAIL
16		ERROR 22 CASH OUT METER FAIL
17		ERROR 25 REFILL METER FAIL
18		ERROR 30 REEL 1 FAIL
19		ERROR 31 REEL 2 FAIL
20		ERROR 32 REEL 3 FAIL
21		ERROR 99 SECURITY CARD MISSING OR FAILED, OR INCORRECT FOR PROGRAM
	10
	11	ERROR 1 EPROM FAILED
	12	ERROR 3 RAM CORRUPTION DETECTED (common on PC90 boards)
	13	ERROR 10 RAM FAILURE
	14	ERROR 20 METERS DISCONNECTED
	15	ERROR 21 CASH IN METER FAIL
	16	ERROR 22 CASH OUT METER FAIL
	17	ERROR 25 REFILL METER FAIL
	18	ERROR 30 REEL 1 FAIL
	19	ERROR 31 REEL 2 FAIL
	20	ERROR 32 REEL 3 FAIL
	21	ERROR 99 SECURITY CARD MISSING OR FAILED, OR INCORRECT FOR PROGRAM
22	22	*/
23	23
24	24

trunk/src/mame/drivers/seibuspi.c
r23623	r23624
30	30
31	31	This code is also in the main PRG ROM at offset 0x1ffffc, even on single
32	32	board games. Known regions are:
33
	33
34	34	0x01 Japan
35	35	0x10 US
36	36	0x20 Taiwan
r23623	r23624
951	951
952	952
953	953	static ADDRESS_MAP_START( base_map, AS_PROGRAM, 32, seibuspi_state )
954		// AM_RANGE(0x00000104, 0x00000107) AM_WRITENOP // ?
955		// AM_RANGE(0x00000108, 0x0000010b) AM_WRITENOP // ?
	954	// AM_RANGE(0x00000104, 0x00000107) AM_WRITENOP // ?
	955	// AM_RANGE(0x00000108, 0x0000010b) AM_WRITENOP // ?
956	956	AM_RANGE(0x00000000, 0x000003ff) AM_RAM
957	957	AM_RANGE(0x00000414, 0x00000417) AM_WRITENOP // bg gfx decryption key, see machine/seibuspi.c
958	958	AM_RANGE(0x00000418, 0x0000041b) AM_READWRITE(spi_layer_bank_r, spi_layer_bank_w)
r23623	r23624
1059	1059	m_z80_lastbank = bank;
1060	1060	membank("bank1")->set_entry(bank);
1061	1061	}
1062
	1062
1063	1063	// d3: watchdog?
1064	1064	}
1065	1065
r23623	r23624
1067	1067	{
1068	1068	coin_counter_w(machine(), 0, data & 1);
1069	1069	coin_counter_w(machine(), 1, data & 2);
1070
	1070
1071	1071	// coin latch used by single boards
1072	1072	if (data)
1073	1073	m_sb_coin_latch = 0xa0 \| data;
r23623	r23624
1903	1903	MCFG_DEVICE_REMOVE("ds2404")
1904	1904
1905	1905	MCFG_EEPROM_ADD("eeprom", eeprom_intf)
1906
	1906
1907	1907	// Z80 is Z84C0006PCS instead of Z84C0008PEC
1908	1908	// clock is unknown, possibly slower than 7.159MHz
1909	1909	MACHINE_CONFIG_END

trunk/src/mame/drivers/mazerbla.c
r23623	r23624
20	20	- four 'test button' style switches
21	21	- one 4Mhz xtal @A1
22	22	- this same board is shared with cliff hanger (clifhgr.c)
23
	23
24	24	CFB-1000 - video/subcpu board
25	25	- this board has a sub-cpu on it and four roms (six sockets for roms, two empty)
26	26	- the roms go in sockets "ROM0"@G8, "ROM2"@K8, "ROM3"@K10, "ROM4"@K11

trunk/src/mame/drivers/stuntair.c
r23623	r23624
149	149	int b = (data&0xc0)>>6;
150	150	int g = (data&0x38)>>3;
151	151	int r = (data&0x07)>>0;
152
	152
153	153	palette_set_color(machine,i,MAKE_RGB(r<<5,g<<5,b<<6));
154	154	}
155	155

trunk/src/mame/drivers/qix.c
r23623	r23624
31	31	The kram3 set used to be playable with the implementation in the MAME M6809
32	32	CPU core, encrypting only the first byte in 10 xx and 11 xx opcodes.
33	33	This should get a cleaner implementation. Until then, kram3 is broken on purpose.
34
	34
35	35	According to the QIX and Kram schematics, these games should be using 68A90Es.
36	36	The 6809E has a 'Last Instruction Cycle' pin that is likely tied in with the encryption:
37	37	"LIC is HIGH during the last cycle of every instruction and its transition from

trunk/src/mame/drivers/alpha68k.c
r23623	r23624
2751	2751
2752	2752	ROM_START( skysoldrbl )
2753	2753	ROM_REGION( 0x80000, "maincpu", 0 )
2754		ROM_LOAD16_BYTE( "g.bin", 0x00000, 0x10000, CRC(4d3273e9) SHA1(7ddaba59114180fe371d2326fc49d6274e58f5c9) ) //different from other set
2755		ROM_LOAD16_BYTE( "c.bin", 0x00001, 0x10000, CRC(86c7af62) SHA1(4092558f3c11130e917d06b8d43f8f00815e4148) ) //different from other set
	2754	ROM_LOAD16_BYTE( "g.bin", 0x00000, 0x10000, CRC(4d3273e9) SHA1(7ddaba59114180fe371d2326fc49d6274e58f5c9) ) //different from other set
	2755	ROM_LOAD16_BYTE( "c.bin", 0x00001, 0x10000, CRC(86c7af62) SHA1(4092558f3c11130e917d06b8d43f8f00815e4148) ) //different from other set
2756	2756	ROM_LOAD16_BYTE( "e.bin", 0x20000, 0x10000, CRC(03115b75) SHA1(e36f2eab0198bf6b5b419aacc593b3790b479e81) )
2757	2757	ROM_LOAD16_BYTE( "a.bin", 0x20001, 0x10000, CRC(7aa103c7) SHA1(1907b92a3769089e01af36f74e0ff30e7a8f178c) )
2758	2758	ROM_LOAD16_BYTE( "h-gtop.bin", 0x40000, 0x10000, CRC(f41dfeab) SHA1(1b4f68c0f55e89a9dcd0fae8fb26074b97b5303a) )
2759	2759	ROM_LOAD16_BYTE( "d-ctop.bin", 0x40001, 0x10000, CRC(56560a3c) SHA1(c57c33d3935c23d56ae256981e4c3dcd80fb86a2) )
2760	2760	ROM_LOAD16_BYTE( "f-etop.bin", 0x60000, 0x10000, CRC(60a52583) SHA1(975d309ba55730c87cb5ea786c4d2d82358a1b73) )
2761	2761	ROM_LOAD16_BYTE( "b-atop.bin", 0x60001, 0x10000, CRC(028fd31b) SHA1(feb18a7217c107bb5f8e5c5ec5bc4173e977286b) )
2762
	2762
2763	2763	ROM_REGION( 0x80000, "audiocpu", 0 ) /* Sound CPU */
2764	2764	ROM_LOAD( "33.ic11", 0x00000, 0x08000, CRC(b711fad4) SHA1(0a9515cb36b8d03ee5f7e0669a9948571b4ec34e) )
2765	2765	ROM_CONTINUE( 0x18000, 0x08000 )
r23623	r23624
2781	2781	ROM_LOAD( "30.ic43", 0x040000, 0x10000, CRC(9eb10d3d) SHA1(ba1445e2c166f72a67295d595990efbdd3460736) )
2782	2782	ROM_LOAD( "31.ic44", 0x050000, 0x10000, CRC(6b6c4e56) SHA1(1af79c5931be2eb1421172e6e7877a97681fdb84) )
2783	2783	ROM_LOAD( "32.ic45", 0x060000, 0x10000, CRC(fdf55eca) SHA1(0c61ab8fc60c69c4d3fa976976f42bda63c06549) )
2784		ROM_LOAD( "29.ic42", 0x070000, 0x10000, CRC(cf888369) SHA1(d1ef5b2c81bbf4e039cc6cfee8339700a1dbb4ca) ) //different from other set (is one of them bad?)
	2784	ROM_LOAD( "29.ic42", 0x070000, 0x10000, CRC(cf888369) SHA1(d1ef5b2c81bbf4e039cc6cfee8339700a1dbb4ca) ) //different from other set (is one of them bad?)
2785	2785	ROM_LOAD( "18.ica1", 0x080000, 0x10000, CRC(08419273) SHA1(0ded4b60b0ce17a922fb7170f992c4f6c75be895) )
2786	2786	ROM_LOAD( "17.ic30", 0x090000, 0x10000, CRC(6258a61b) SHA1(d56a9f1dfa02dc59935f03b86a134076e3039bf4) )
2787	2787	ROM_LOAD( "20.ica3", 0x0a0000, 0x10000, CRC(5e716c62) SHA1(9427cd1578221ee48f4a8d8a24a232cb9e9b2206) )
r23623	r23624
3377	3377	GAME( 1987, btlfieldb, timesold, btlfieldb, btlfieldb, alpha68k_state,btlfieldb,ROT90, "bootleg", "Battle Field (bootleg)", GAME_SUPPORTS_SAVE )
3378	3378
3379	3379	GAME( 1988, skysoldr, 0, alpha68k_II, skysoldr, alpha68k_state, skysoldr, ROT90, "Alpha Denshi Co. (SNK of America/Romstar license)", "Sky Soldiers (US)", GAME_SUPPORTS_SAVE )
3380		GAME( 1988, skysoldrbl,skysoldr, alpha68k_II, skysoldr, alpha68k_state, skysoldr, ROT90, "bootleg", "Sky Soldiers (bootleg)", GAME_SUPPORTS_SAVE )
	3380	GAME( 1988, skysoldrbl,skysoldr, alpha68k_II, skysoldr, alpha68k_state, skysoldr, ROT90, "bootleg", "Sky Soldiers (bootleg)", GAME_SUPPORTS_SAVE )
3381	3381
3382	3382
3383	3383	GAME( 1988, goldmedl, 0, alpha68k_II_gm, goldmedl, alpha68k_state, goldmedl, ROT0, "SNK", "Gold Medalist (set 1)", GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/galaxold.c
r23623	r23624
637	637	AM_RANGE(0x6805, 0x6805) AM_DEVWRITE_LEGACY(GAL_AUDIO, galaxian_shoot_enable_w)
638	638	AM_RANGE(0x6806, 0x6807) AM_DEVWRITE_LEGACY(GAL_AUDIO, galaxian_vol_w)
639	639	AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN2") AM_WRITE(galaxold_nmi_enable_w)
640		// AM_RANGE(0x7001, 0x7001)
	640	// AM_RANGE(0x7001, 0x7001)
641	641	AM_RANGE(0x7002, 0x7002) AM_WRITE(galaxold_coin_counter_w)
642	642	AM_RANGE(0x7003, 0x7003) AM_WRITE(scrambold_background_enable_w)
643	643	AM_RANGE(0x7004, 0x7004) AM_WRITE(galaxold_stars_enable_w)
r23623	r23624
645	645	AM_RANGE(0x7007, 0x7007) AM_WRITE(galaxold_flip_screen_y_w)
646	646	AM_RANGE(0x7800, 0x7800) AM_READ(watchdog_reset_r)
647	647	AM_RANGE(0x7800, 0x7800) AM_DEVWRITE_LEGACY(GAL_AUDIO, galaxian_pitch_w)
648		// AM_RANGE(0x8102, 0x8102) AM_READ(scramblb_protection_1_r)
	648	// AM_RANGE(0x8102, 0x8102) AM_READ(scramblb_protection_1_r)
649	649	AM_RANGE(0x8202, 0x8202) AM_READ(scrambler_protection_2_r)
650	650	ADDRESS_MAP_END
651	651
652	652	WRITE8_MEMBER( galaxold_state::guttang_rombank_w )
653	653	{
654		// printf("rombank %02x\n",data);
	654	// printf("rombank %02x\n",data);
655	655	if (data&1)
656	656	{
657	657	UINT8 *rom = memregion("maincpu")->base();
r23623	r23624
2104	2104	PORT_DIPNAME( 0x40, 0x40, "IN1:7" )
2105	2105	PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
2106	2106	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
2107		PORT_DIPNAME( 0x80, 0x80, "IN1:8" )
	2107	PORT_DIPNAME( 0x80, 0x80, "IN1:8" )
2108	2108	PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
2109	2109	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
2110	2110
r23623	r23624
2130	2130	PORT_DIPNAME( 0x40, 0x40, "IN2:7" )
2131	2131	PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
2132	2132	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
2133		PORT_DIPNAME( 0x80, 0x80, "IN2:8" )
	2133	PORT_DIPNAME( 0x80, 0x80, "IN2:8" )
2134	2134	PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
2135	2135	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
2136	2136	INPUT_PORTS_END
r23623	r23624
2368	2368	/* video hardware */
2369	2369	MCFG_PALETTE_LENGTH(32+2+64+1) /* 32 for the characters, 2 for the bullets, 64 for the stars, 1 for background */
2370	2370
2371		// MCFG_PALETTE_INIT_OVERRIDE(galaxold_state,scrambold)
	2371	// MCFG_PALETTE_INIT_OVERRIDE(galaxold_state,scrambold)
2372	2372	MCFG_VIDEO_START_OVERRIDE(galaxold_state,mooncrst)
2373	2373	MACHINE_CONFIG_END
2374	2374
r23623	r23624
3282	3282	ROM_REGION( 0x2000, "gfx1", 0 )
3283	3283	ROM_LOAD( "gg9-2732.rom", 0x0000, 0x1000, CRC(be6bf522) SHA1(23a09409b7de4bfdb970e4ff23d89a2439a0aee5) )
3284	3284	ROM_LOAD( "gg10-2732.rom", 0x1000, 0x1000, CRC(b04c34c5) SHA1(a37db70ce67d64daa5f0c41cce1136d1c9d8c175) )
3285
	3285
3286	3286	ROM_REGION( 0x0020, "proms", 0 ) // no PROM was present..
3287	3287	ROM_LOAD( "mmi6331.6l", 0x0000, 0x0020, BAD_DUMP CRC(6a0c7d87) SHA1(140335d85c67c75b65689d4e76d29863c209cf32) )
3288	3288	ROM_END

trunk/src/mame/drivers/firebeat.c
r23623	r23624
193	193
194	194	UINT8 m_extend_board_irq_enable;
195	195	UINT8 m_extend_board_irq_active;
196		// emu_timer *m_keyboard_timer;
	196	// emu_timer *m_keyboard_timer;
197	197	GCU_REGS m_gcu[2];
198	198	int m_tick;
199	199	int m_layer;
r23623	r23624
209	209	UINT8 m_temp_data[64*1024];
210	210	int m_cab_data_ptr;
211	211	const int * m_cur_cab_data;
212		// int m_keyboard_state[2];
	212	// int m_keyboard_state[2];
213	213	UINT8 m_spu_shared_ram[0x400];
214	214	IBUTTON m_ibutton;
215	215	int m_ibutton_state;
r23623	r23624
239	239	DECLARE_WRITE32_MEMBER(atapi_command_w);
240	240	DECLARE_READ32_MEMBER(atapi_control_r);
241	241	DECLARE_WRITE32_MEMBER(atapi_control_w);
242		// DECLARE_READ32_MEMBER(comm_uart_r);
243		// DECLARE_WRITE32_MEMBER(comm_uart_w);
	242	// DECLARE_READ32_MEMBER(comm_uart_r);
	243	// DECLARE_WRITE32_MEMBER(comm_uart_w);
244	244	DECLARE_READ32_MEMBER(cabinet_r);
245	245	DECLARE_READ32_MEMBER(keyboard_wheel_r);
246	246	DECLARE_READ8_MEMBER(midi_uart_r);
r23623	r23624
257	257	DECLARE_READ32_MEMBER(ppc_spu_share_r);
258	258	DECLARE_WRITE32_MEMBER(ppc_spu_share_w);
259	259	DECLARE_READ16_MEMBER(spu_unk_r);
260		// TIMER_CALLBACK_MEMBER(keyboard_timer_callback);
	260	// TIMER_CALLBACK_MEMBER(keyboard_timer_callback);
261	261	void gcu_draw_object(bitmap_ind16 &bitmap, const rectangle &cliprect, int chip, UINT32 *cmd);
262	262	void gcu_fill_rect(bitmap_ind16 &bitmap, const rectangle &cliprect, UINT32 *cmd);
263	263	void gcu_draw_character(bitmap_ind16 &bitmap, const rectangle &cliprect, int chip, UINT32 *cmd);
r23623	r23624
1404	1404	/*
1405	1405	READ32_MEMBER(firebeat_state::comm_uart_r )
1406	1406	{
1407		UINT32 r = 0;
	1407	UINT32 r = 0;
1408	1408
1409		if (ACCESSING_BITS_24_31)
1410		{
1411		r \|= pc16552d_0_r(space, (offset*4)+0) << 24;
1412		}
1413		if (ACCESSING_BITS_16_23)
1414		{
1415		r \|= pc16552d_0_r(space, (offset*4)+1) << 16;
1416		}
1417		if (ACCESSING_BITS_8_15)
1418		{
1419		r \|= pc16552d_0_r(space, (offset*4)+2) << 8;
1420		}
1421		if (ACCESSING_BITS_0_7)
1422		{
1423		r \|= pc16552d_0_r(space, (offset*4)+3) << 0;
1424		}
	1409	if (ACCESSING_BITS_24_31)
	1410	{
	1411	r \|= pc16552d_0_r(space, (offset*4)+0) << 24;
	1412	}
	1413	if (ACCESSING_BITS_16_23)
	1414	{
	1415	r \|= pc16552d_0_r(space, (offset*4)+1) << 16;
	1416	}
	1417	if (ACCESSING_BITS_8_15)
	1418	{
	1419	r \|= pc16552d_0_r(space, (offset*4)+2) << 8;
	1420	}
	1421	if (ACCESSING_BITS_0_7)
	1422	{
	1423	r \|= pc16552d_0_r(space, (offset*4)+3) << 0;
	1424	}
1425	1425
1426		return r;
	1426	return r;
1427	1427	}
1428	1428
1429	1429	WRITE32_MEMBER(firebeat_state::comm_uart_w )
1430	1430	{
1431		if (ACCESSING_BITS_24_31)
1432		{
1433		pc16552d_0_w(space, (offset*4)+0, (data >> 24) & 0xff);
1434		}
1435		if (ACCESSING_BITS_16_23)
1436		{
1437		pc16552d_0_w(space, (offset*4)+1, (data >> 16) & 0xff);
1438		}
1439		if (ACCESSING_BITS_8_15)
1440		{
1441		pc16552d_0_w(space, (offset*4)+2, (data >> 8) & 0xff);
1442		}
1443		if (ACCESSING_BITS_0_7)
1444		{
1445		pc16552d_0_w(space, (offset*4)+3, (data >> 0) & 0xff);
1446		}
	1431	if (ACCESSING_BITS_24_31)
	1432	{
	1433	pc16552d_0_w(space, (offset*4)+0, (data >> 24) & 0xff);
	1434	}
	1435	if (ACCESSING_BITS_16_23)
	1436	{
	1437	pc16552d_0_w(space, (offset*4)+1, (data >> 16) & 0xff);
	1438	}
	1439	if (ACCESSING_BITS_8_15)
	1440	{
	1441	pc16552d_0_w(space, (offset*4)+2, (data >> 8) & 0xff);
	1442	}
	1443	if (ACCESSING_BITS_0_7)
	1444	{
	1445	pc16552d_0_w(space, (offset*4)+3, (data >> 0) & 0xff);
	1446	}
1447	1447	}
1448	1448
1449	1449	static void comm_uart_irq_callback(running_machine &machine, int channel, int value)
1450	1450	{
1451		// TODO
1452		//m_maincpu->set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
	1451	// TODO
	1452	//m_maincpu->set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
1453	1453	}
1454	1454	*/
1455	1455	static const ins8250_interface firebeat_com0_interface =
r23623	r23624
1569	1569	/*
1570	1570	static const int keyboard_notes[24] =
1571	1571	{
1572		0x3c, // C1
1573		0x3d, // C1#
1574		0x3e, // D1
1575		0x3f, // D1#
1576		0x40, // E1
1577		0x41, // F1
1578		0x42, // F1#
1579		0x43, // G1
1580		0x44, // G1#
1581		0x45, // A1
1582		0x46, // A1#
1583		0x47, // B1
1584		0x48, // C2
1585		0x49, // C2#
1586		0x4a, // D2
1587		0x4b, // D2#
1588		0x4c, // E2
1589		0x4d, // F2
1590		0x4e, // F2#
1591		0x4f, // G2
1592		0x50, // G2#
1593		0x51, // A2
1594		0x52, // A2#
1595		0x53, // B2
	1572	0x3c, // C1
	1573	0x3d, // C1#
	1574	0x3e, // D1
	1575	0x3f, // D1#
	1576	0x40, // E1
	1577	0x41, // F1
	1578	0x42, // F1#
	1579	0x43, // G1
	1580	0x44, // G1#
	1581	0x45, // A1
	1582	0x46, // A1#
	1583	0x47, // B1
	1584	0x48, // C2
	1585	0x49, // C2#
	1586	0x4a, // D2
	1587	0x4b, // D2#
	1588	0x4c, // E2
	1589	0x4d, // F2
	1590	0x4e, // F2#
	1591	0x4f, // G2
	1592	0x50, // G2#
	1593	0x51, // A2
	1594	0x52, // A2#
	1595	0x53, // B2
1596	1596	};
1597	1597
1598	1598	TIMER_CALLBACK_MEMBER(firebeat_state::keyboard_timer_callback)
1599	1599	{
1600		static const int kb_uart_channel[2] = { 1, 0 };
1601		static const char *const keynames[] = { "KEYBOARD_P1", "KEYBOARD_P2" };
1602		int keyboard;
1603		int i;
	1600	static const int kb_uart_channel[2] = { 1, 0 };
	1601	static const char *const keynames[] = { "KEYBOARD_P1", "KEYBOARD_P2" };
	1602	int keyboard;
	1603	int i;
1604	1604
1605		for (keyboard=0; keyboard < 2; keyboard++)
1606		{
1607		UINT32 kbstate = ioport(keynames[keyboard])->read();
1608		int uart_channel = kb_uart_channel[keyboard];
	1605	for (keyboard=0; keyboard < 2; keyboard++)
	1606	{
	1607	UINT32 kbstate = ioport(keynames[keyboard])->read();
	1608	int uart_channel = kb_uart_channel[keyboard];
1609	1609
1610		if (kbstate != m_keyboard_state[keyboard])
1611		{
1612		for (i=0; i < 24; i++)
1613		{
1614		int kbnote = keyboard_notes[i];
	1610	if (kbstate != m_keyboard_state[keyboard])
	1611	{
	1612	for (i=0; i < 24; i++)
	1613	{
	1614	int kbnote = keyboard_notes[i];
1615	1615
1616		if ((m_keyboard_state[keyboard] & (1 << i)) != 0 && (kbstate & (1 << i)) == 0)
1617		{
1618		// key was on, now off -> send Note Off message
1619		pc16552d_rx_data(machine(), 1, uart_channel, 0x80);
1620		pc16552d_rx_data(machine(), 1, uart_channel, kbnote);
1621		pc16552d_rx_data(machine(), 1, uart_channel, 0x7f);
1622		}
1623		else if ((m_keyboard_state[keyboard] & (1 << i)) == 0 && (kbstate & (1 << i)) != 0)
1624		{
1625		// key was off, now on -> send Note On message
1626		pc16552d_rx_data(machine(), 1, uart_channel, 0x90);
1627		pc16552d_rx_data(machine(), 1, uart_channel, kbnote);
1628		pc16552d_rx_data(machine(), 1, uart_channel, 0x7f);
1629		}
1630		}
1631		}
1632		else
1633		{
1634		// no messages, send Active Sense message instead
1635		pc16552d_rx_data(machine(), 1, uart_channel, 0xfe);
1636		}
	1616	if ((m_keyboard_state[keyboard] & (1 << i)) != 0 && (kbstate & (1 << i)) == 0)
	1617	{
	1618	// key was on, now off -> send Note Off message
	1619	pc16552d_rx_data(machine(), 1, uart_channel, 0x80);
	1620	pc16552d_rx_data(machine(), 1, uart_channel, kbnote);
	1621	pc16552d_rx_data(machine(), 1, uart_channel, 0x7f);
	1622	}
	1623	else if ((m_keyboard_state[keyboard] & (1 << i)) == 0 && (kbstate & (1 << i)) != 0)
	1624	{
	1625	// key was off, now on -> send Note On message
	1626	pc16552d_rx_data(machine(), 1, uart_channel, 0x90);
	1627	pc16552d_rx_data(machine(), 1, uart_channel, kbnote);
	1628	pc16552d_rx_data(machine(), 1, uart_channel, 0x7f);
	1629	}
	1630	}
	1631	}
	1632	else
	1633	{
	1634	// no messages, send Active Sense message instead
	1635	pc16552d_rx_data(machine(), 1, uart_channel, 0xfe);
	1636	}
1637	1637
1638		m_keyboard_state[keyboard] = kbstate;
1639		}
	1638	m_keyboard_state[keyboard] = kbstate;
	1639	}
1640	1640	}
1641	1641	*/
1642	1642	// Extend board IRQs
r23623	r23624
1984	1984	PORT_BIT( 0xff, 0x80, IPT_PADDLE_V ) PORT_MINMAX(0xff, 0x00) PORT_SENSITIVITY(30) PORT_KEYDELTA(10)
1985	1985
1986	1986	/*
1987		PORT_START("KEYBOARD_P1")
1988		PORT_BIT( 0x000001, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 C1") PORT_CODE(KEYCODE_Q)
1989		PORT_BIT( 0x000002, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 C1#") PORT_CODE(KEYCODE_W)
1990		PORT_BIT( 0x000004, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 D1") PORT_CODE(KEYCODE_E)
1991		PORT_BIT( 0x000008, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 D1#") PORT_CODE(KEYCODE_R)
1992		PORT_BIT( 0x000010, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 E1") PORT_CODE(KEYCODE_T)
1993		PORT_BIT( 0x000020, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 F1") PORT_CODE(KEYCODE_Y)
1994		PORT_BIT( 0x000040, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 F1#") PORT_CODE(KEYCODE_U)
1995		PORT_BIT( 0x000080, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 G1") PORT_CODE(KEYCODE_I)
1996		PORT_BIT( 0x000100, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 G1#") PORT_CODE(KEYCODE_O)
1997		PORT_BIT( 0x000200, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 A1") PORT_CODE(KEYCODE_A)
1998		PORT_BIT( 0x000400, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 A1#") PORT_CODE(KEYCODE_S)
1999		PORT_BIT( 0x000800, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 B1") PORT_CODE(KEYCODE_D)
2000		PORT_BIT( 0x001000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 C2") PORT_CODE(KEYCODE_F)
2001		PORT_BIT( 0x002000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 C2#") PORT_CODE(KEYCODE_G)
2002		PORT_BIT( 0x004000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 D2") PORT_CODE(KEYCODE_H)
2003		PORT_BIT( 0x008000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 D2#") PORT_CODE(KEYCODE_J)
2004		PORT_BIT( 0x010000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 E2") PORT_CODE(KEYCODE_K)
2005		PORT_BIT( 0x020000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 F2") PORT_CODE(KEYCODE_L)
2006		PORT_BIT( 0x040000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 F2#") PORT_CODE(KEYCODE_Z)
2007		PORT_BIT( 0x080000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 G2") PORT_CODE(KEYCODE_X)
2008		PORT_BIT( 0x100000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 G2#") PORT_CODE(KEYCODE_C)
2009		PORT_BIT( 0x200000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 A2") PORT_CODE(KEYCODE_V)
2010		PORT_BIT( 0x400000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 A2#") PORT_CODE(KEYCODE_B)
2011		PORT_BIT( 0x800000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 B2") PORT_CODE(KEYCODE_N)
	1987	PORT_START("KEYBOARD_P1")
	1988	PORT_BIT( 0x000001, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 C1") PORT_CODE(KEYCODE_Q)
	1989	PORT_BIT( 0x000002, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 C1#") PORT_CODE(KEYCODE_W)
	1990	PORT_BIT( 0x000004, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 D1") PORT_CODE(KEYCODE_E)
	1991	PORT_BIT( 0x000008, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 D1#") PORT_CODE(KEYCODE_R)
	1992	PORT_BIT( 0x000010, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 E1") PORT_CODE(KEYCODE_T)
	1993	PORT_BIT( 0x000020, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 F1") PORT_CODE(KEYCODE_Y)
	1994	PORT_BIT( 0x000040, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 F1#") PORT_CODE(KEYCODE_U)
	1995	PORT_BIT( 0x000080, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 G1") PORT_CODE(KEYCODE_I)
	1996	PORT_BIT( 0x000100, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 G1#") PORT_CODE(KEYCODE_O)
	1997	PORT_BIT( 0x000200, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 A1") PORT_CODE(KEYCODE_A)
	1998	PORT_BIT( 0x000400, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 A1#") PORT_CODE(KEYCODE_S)
	1999	PORT_BIT( 0x000800, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 B1") PORT_CODE(KEYCODE_D)
	2000	PORT_BIT( 0x001000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 C2") PORT_CODE(KEYCODE_F)
	2001	PORT_BIT( 0x002000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 C2#") PORT_CODE(KEYCODE_G)
	2002	PORT_BIT( 0x004000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 D2") PORT_CODE(KEYCODE_H)
	2003	PORT_BIT( 0x008000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 D2#") PORT_CODE(KEYCODE_J)
	2004	PORT_BIT( 0x010000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 E2") PORT_CODE(KEYCODE_K)
	2005	PORT_BIT( 0x020000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 F2") PORT_CODE(KEYCODE_L)
	2006	PORT_BIT( 0x040000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 F2#") PORT_CODE(KEYCODE_Z)
	2007	PORT_BIT( 0x080000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 G2") PORT_CODE(KEYCODE_X)
	2008	PORT_BIT( 0x100000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 G2#") PORT_CODE(KEYCODE_C)
	2009	PORT_BIT( 0x200000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 A2") PORT_CODE(KEYCODE_V)
	2010	PORT_BIT( 0x400000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 A2#") PORT_CODE(KEYCODE_B)
	2011	PORT_BIT( 0x800000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P1 B2") PORT_CODE(KEYCODE_N)
2012	2012
2013		PORT_START("KEYBOARD_P2")
2014		PORT_BIT( 0x000001, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 C1") PORT_CODE(KEYCODE_Q)
2015		PORT_BIT( 0x000002, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 C1#") PORT_CODE(KEYCODE_W)
2016		PORT_BIT( 0x000004, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 D1") PORT_CODE(KEYCODE_E)
2017		PORT_BIT( 0x000008, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 D1#") PORT_CODE(KEYCODE_R)
2018		PORT_BIT( 0x000010, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 E1") PORT_CODE(KEYCODE_T)
2019		PORT_BIT( 0x000020, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 F1") PORT_CODE(KEYCODE_Y)
2020		PORT_BIT( 0x000040, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 F1#") PORT_CODE(KEYCODE_U)
2021		PORT_BIT( 0x000080, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 G1") PORT_CODE(KEYCODE_I)
2022		PORT_BIT( 0x000100, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 G1#") PORT_CODE(KEYCODE_O)
2023		PORT_BIT( 0x000200, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 A1") PORT_CODE(KEYCODE_A)
2024		PORT_BIT( 0x000400, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 A1#") PORT_CODE(KEYCODE_S)
2025		PORT_BIT( 0x000800, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 B1") PORT_CODE(KEYCODE_D)
2026		PORT_BIT( 0x001000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 C2") PORT_CODE(KEYCODE_F)
2027		PORT_BIT( 0x002000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 C2#") PORT_CODE(KEYCODE_G)
2028		PORT_BIT( 0x004000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 D2") PORT_CODE(KEYCODE_H)
2029		PORT_BIT( 0x008000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 D2#") PORT_CODE(KEYCODE_J)
2030		PORT_BIT( 0x010000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 E2") PORT_CODE(KEYCODE_K)
2031		PORT_BIT( 0x020000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 F2") PORT_CODE(KEYCODE_L)
2032		PORT_BIT( 0x040000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 F2#") PORT_CODE(KEYCODE_Z)
2033		PORT_BIT( 0x080000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 G2") PORT_CODE(KEYCODE_X)
2034		PORT_BIT( 0x100000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 G2#") PORT_CODE(KEYCODE_C)
2035		PORT_BIT( 0x200000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 A2") PORT_CODE(KEYCODE_V)
2036		PORT_BIT( 0x400000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 A2#") PORT_CODE(KEYCODE_B)
2037		PORT_BIT( 0x800000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 B2") PORT_CODE(KEYCODE_N)
	2013	PORT_START("KEYBOARD_P2")
	2014	PORT_BIT( 0x000001, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 C1") PORT_CODE(KEYCODE_Q)
	2015	PORT_BIT( 0x000002, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 C1#") PORT_CODE(KEYCODE_W)
	2016	PORT_BIT( 0x000004, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 D1") PORT_CODE(KEYCODE_E)
	2017	PORT_BIT( 0x000008, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 D1#") PORT_CODE(KEYCODE_R)
	2018	PORT_BIT( 0x000010, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 E1") PORT_CODE(KEYCODE_T)
	2019	PORT_BIT( 0x000020, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 F1") PORT_CODE(KEYCODE_Y)
	2020	PORT_BIT( 0x000040, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 F1#") PORT_CODE(KEYCODE_U)
	2021	PORT_BIT( 0x000080, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 G1") PORT_CODE(KEYCODE_I)
	2022	PORT_BIT( 0x000100, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 G1#") PORT_CODE(KEYCODE_O)
	2023	PORT_BIT( 0x000200, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 A1") PORT_CODE(KEYCODE_A)
	2024	PORT_BIT( 0x000400, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 A1#") PORT_CODE(KEYCODE_S)
	2025	PORT_BIT( 0x000800, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 B1") PORT_CODE(KEYCODE_D)
	2026	PORT_BIT( 0x001000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 C2") PORT_CODE(KEYCODE_F)
	2027	PORT_BIT( 0x002000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 C2#") PORT_CODE(KEYCODE_G)
	2028	PORT_BIT( 0x004000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 D2") PORT_CODE(KEYCODE_H)
	2029	PORT_BIT( 0x008000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 D2#") PORT_CODE(KEYCODE_J)
	2030	PORT_BIT( 0x010000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 E2") PORT_CODE(KEYCODE_K)
	2031	PORT_BIT( 0x020000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 F2") PORT_CODE(KEYCODE_L)
	2032	PORT_BIT( 0x040000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 F2#") PORT_CODE(KEYCODE_Z)
	2033	PORT_BIT( 0x080000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 G2") PORT_CODE(KEYCODE_X)
	2034	PORT_BIT( 0x100000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 G2#") PORT_CODE(KEYCODE_C)
	2035	PORT_BIT( 0x200000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 A2") PORT_CODE(KEYCODE_V)
	2036	PORT_BIT( 0x400000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 A2#") PORT_CODE(KEYCODE_B)
	2037	PORT_BIT( 0x800000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("P2 B2") PORT_CODE(KEYCODE_N)
2038	2038	*/
2039	2039	INPUT_PORTS_END
2040	2040
r23623	r23624
2355	2355
2356	2356	atapi_init();
2357	2357
2358		// pc16552d_init(machine(), 0, 19660800, comm_uart_irq_callback, 0); // Network UART
2359		// pc16552d_init(machine(), 1, 24000000, midi_uart_irq_callback, 0); // MIDI UART
	2358	// pc16552d_init(machine(), 0, 19660800, comm_uart_irq_callback, 0); // Network UART
	2359	// pc16552d_init(machine(), 1, 24000000, midi_uart_irq_callback, 0); // MIDI UART
2360	2360
2361	2361	m_extend_board_irq_enable = 0x3f;
2362	2362	m_extend_board_irq_active = 0x00;
r23623	r23624
2387	2387	void firebeat_state::init_keyboard()
2388	2388	{
2389	2389	// set keyboard timer
2390		// m_keyboard_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(firebeat_state::keyboard_timer_callback),this));
2391		// m_keyboard_timer->adjust(attotime::from_msec(10), 0, attotime::from_msec(10));
	2390	// m_keyboard_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(firebeat_state::keyboard_timer_callback),this));
	2391	// m_keyboard_timer->adjust(attotime::from_msec(10), 0, attotime::from_msec(10));
2392	2392	}
2393	2393
2394	2394	DRIVER_INIT_MEMBER(firebeat_state,kbm)

trunk/src/mame/drivers/jpmsru.c
r23623	r23624
182	182
183	183	GAME(198?, j_nuddup2,j_nuddup ,jpmsru_4,jpmsru, jpmsru_state,jpmsru,ROT0, "JPM","Nudge Double Up (JPM SRU, set 2)", GAME_IS_SKELETON_MECHANICAL )
184	184
185		GAME(198?, j_unk ,0 ,jpmsru_4,jpmsru, jpmsru_state,jpmsru,ROT0, "JPM?","Unknown SRU Game (JPM?)", GAME_IS_SKELETON_MECHANICAL )
	185	GAME(198?, j_unk ,0 ,jpmsru_4,jpmsru, jpmsru_state,jpmsru,ROT0, "JPM?","Unknown SRU Game (JPM?)", GAME_IS_SKELETON_MECHANICAL )
186	186
187	187	// this one is different again?
188	188	GAME(198?, j_plus2 ,0 ,jpmsru_4,jpmsru, jpmsru_state,jpmsru,ROT0, "JPM","Plus 2 (JPM)", GAME_IS_SKELETON_MECHANICAL )

trunk/src/mame/drivers/fruitpc.c
r23623	r23624
84	84
85	85	static INPUT_PORTS_START( fruitpc )
86	86	PORT_START("pc_keyboard_0")
87		// PORT_BIT ( 0x0001, 0x0000, IPT_UNUSED ) /* unused scancode 0 */
88		// AT_KEYB_HELPER( 0x0002, "Esc", KEYCODE_Q ) /* Esc 01 81 */
	87	// PORT_BIT ( 0x0001, 0x0000, IPT_UNUSED ) /* unused scancode 0 */
	88	// AT_KEYB_HELPER( 0x0002, "Esc", KEYCODE_Q ) /* Esc 01 81 */
89	89
90	90	PORT_START("pc_keyboard_1")
91		// AT_KEYB_HELPER( 0x0010, "T", KEYCODE_T ) /* T 14 94 */
92		// AT_KEYB_HELPER( 0x0020, "Y", KEYCODE_Y ) /* Y 15 95 */
93		// AT_KEYB_HELPER( 0x0100, "O", KEYCODE_O ) /* O 18 98 */
94		// AT_KEYB_HELPER( 0x1000, "Enter", KEYCODE_ENTER ) /* Enter 1C 9C */
	91	// AT_KEYB_HELPER( 0x0010, "T", KEYCODE_T ) /* T 14 94 */
	92	// AT_KEYB_HELPER( 0x0020, "Y", KEYCODE_Y ) /* Y 15 95 */
	93	// AT_KEYB_HELPER( 0x0100, "O", KEYCODE_O ) /* O 18 98 */
	94	// AT_KEYB_HELPER( 0x1000, "Enter", KEYCODE_ENTER ) /* Enter 1C 9C */
95	95
96	96	PORT_START("pc_keyboard_2")
97	97
98	98	PORT_START("pc_keyboard_3")
99		// AT_KEYB_HELPER( 0x0001, "B", KEYCODE_B ) /* B 30 B0 */
100		// AT_KEYB_HELPER( 0x0002, "N", KEYCODE_N ) /* N 31 B1 */
101		// AT_KEYB_HELPER( 0x0800, "F1", KEYCODE_S ) /* F1 3B BB */
	99	// AT_KEYB_HELPER( 0x0001, "B", KEYCODE_B ) /* B 30 B0 */
	100	// AT_KEYB_HELPER( 0x0002, "N", KEYCODE_N ) /* N 31 B1 */
	101	// AT_KEYB_HELPER( 0x0800, "F1", KEYCODE_S ) /* F1 3B BB */
102	102	// AT_KEYB_HELPER( 0x8000, "F5", KEYCODE_F5 )
103	103
104	104	PORT_START("pc_keyboard_4")
r23623	r23624
107	107	PORT_START("pc_keyboard_5")
108	108
109	109	PORT_START("pc_keyboard_6")
110		// AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up", KEYCODE_UP ) /* Up 67 e7 */
111		// AT_KEYB_HELPER( 0x0080, "(MF2)Page Up", KEYCODE_PGUP ) /* Page Up 68 e8 */
112		// AT_KEYB_HELPER( 0x0100, "(MF2)Cursor Left", KEYCODE_LEFT ) /* Left 69 e9 */
113		// AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */
114		// AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */
115		// AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */
116		// AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */
	110	// AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up", KEYCODE_UP ) /* Up 67 e7 */
	111	// AT_KEYB_HELPER( 0x0080, "(MF2)Page Up", KEYCODE_PGUP ) /* Page Up 68 e8 */
	112	// AT_KEYB_HELPER( 0x0100, "(MF2)Cursor Left", KEYCODE_LEFT ) /* Left 69 e9 */
	113	// AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */
	114	// AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */
	115	// AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */
	116	// AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */
117	117
118	118	PORT_START("pc_keyboard_7")
119	119

trunk/src/mame/drivers/mpu4.c
r23623	r23624
1885	1885	/*
1886	1886	Coinworld data
1887	1887
1888		Error Number Cause of alarm Comments
1889		11 1 GBP coin in These alarms go off when a coin is jammed in the mech, or if the Mars anti-strimming alarm is activated.
	1888	Error Number Cause of alarm Comments
	1889	11 1 GBP coin in These alarms go off when a coin is jammed in the mech, or if the Mars anti-strimming alarm is activated.
1890	1890	12 50p coin in The machine will lock up for a short amount of time, whilst sounding as alarm tone.
1891	1891	13 20p coin in Error 15 can be caused by having DIL switch 6 in the wrong position for your coin mech loom.
1892	1892	14 10p coin in
1893	1893	15 5p coin in
1894		16 2 GBP coin in
	1894	16 2 GBP coin in
1895	1895	21 Reel 1 alarm The faulty reel will flash. Nothing more will happen until the machine is reset
1896	1896	22 Reel 2 alarm
1897		23 Reel 3 alarm
1898		42 Ram Cleared The RAM is cleared when the machine is turned on for the first time, or when the price of play is changed. The alarm
	1897	23 Reel 3 alarm
	1898	42 Ram Cleared The RAM is cleared when the machine is turned on for the first time, or when the price of play is changed. The alarm
1899	1899	clears after a short time
1900		51 Checksum error The machine will lock up completely if the eprom has failed, or if the security chip is missing or has failed
	1900	51 Checksum error The machine will lock up completely if the eprom has failed, or if the security chip is missing or has failed
1901	1901	54 Security chip fail
1902	1902	61 Cash in meter failure The machine will not run if the cash in, or cash out meters are not connected properly.
1903		62 Cash out meter failure
1904		71 Datapack error If the machine is in protocol mode, and a datapack is not connected, then the machine alarms. It will reset after a
	1903	62 Cash out meter failure
	1904	71 Datapack error If the machine is in protocol mode, and a datapack is not connected, then the machine alarms. It will reset after a
1905	1905	time, and have another go at transmitting the data
1906		72 Sound card fail If the sound card is missing, or the wrong sound eprom is fitted, the machine alarms on power on. The machine will then
	1906	72 Sound card fail If the sound card is missing, or the wrong sound eprom is fitted, the machine alarms on power on. The machine will then
1907	1907	operate in silence.
1908		99 Payout tubes empty If one of the tubes runs dry, the machine will attempt to compensate by paying from the other tube. If this runs dry
	1908	99 Payout tubes empty If one of the tubes runs dry, the machine will attempt to compensate by paying from the other tube. If this runs dry
1909	1909	as well, the machine will lock up, requiring a refill before games can continue. The alarm tone is a softer, more friendly one.
1910	1910	*/
1911	1911

trunk/src/mame/drivers/mpu4hw.c
r23623	r23624
1801	1801	PORT_DIPNAME( 0x0C, 0x00, "Jackpot" ) PORT_DIPLOCATION("DIL1:03,04")
1802	1802	PORT_DIPSETTING( 0x04, "15 GBP" )
1803	1803	PORT_DIPSETTING( 0x00, "10 GBP" )
1804		PORT_DIPSETTING( 0x08, "5 GBP" )
	1804	PORT_DIPSETTING( 0x08, "5 GBP" )
1805	1805	PORT_DIPNAME( 0x10, 0x00, "Hold Mode" ) PORT_DIPLOCATION("DIL1:05")
1806	1806	PORT_DIPSETTING( 0x00, "Show Hints" )
1807	1807	PORT_DIPSETTING( 0x10, "Auto Hold" )
r23623	r23624
1813	1813	PORT_DIPSETTING( 0x40, "Fat motor" )
1814	1814	PORT_DIPNAME( 0x80, 0x00, "Payout Tube" ) PORT_DIPLOCATION("DIL1:05")
1815	1815	PORT_DIPSETTING( 0x00, "20p" )
1816		PORT_DIPSETTING( 0x80, "10p" )
	1816	PORT_DIPSETTING( 0x80, "10p" )
1817	1817
1818	1818	PORT_MODIFY("DIL2")
1819	1819	PORT_DIPNAME( 0x07, 0x00, "Stake Setting" )
1820	1820	PORT_DIPSETTING( 0x00, "Not fitted / 5p" )
1821	1821	PORT_DIPSETTING( 0x01, "10p" )
1822	1822	PORT_DIPSETTING( 0x02, "20p" )
1823		PORT_DIPSETTING( 0x03, "25p" )
	1823	PORT_DIPSETTING( 0x03, "25p" )
1824	1824	PORT_DIPSETTING( 0x04, "30p" )
1825	1825	PORT_BIT(0xE0, IP_ACTIVE_HIGH, IPT_UNUSED)
1826	1826	INPUT_PORTS_END
1827
	1827
1828	1828	INPUT_PORTS_START( mpu4jackpot8tkn )
1829	1829	PORT_INCLUDE( mpu4 )
1830	1830

trunk/src/mame/drivers/decocass.c
r23623	r23624
1657	1657	/* 11 */ GAME( 1981, clocknch, decocass, clocknch, clocknch, decocass_state, decocass, ROT270, "Data East Corporation", "Lock'n'Chase (DECO Cassette)", 0 )
1658	1658	/* 12 */ // 1981.08 Flash Boy/DECO Kid
1659	1659	/* 13 */ GAME( 1981, cprogolf, decocass, cprogolf, cprogolf, decocass_state, decocass, ROT270, "Data East Corporation", "Tournament Pro Golf (DECO Cassette)", 0 )
1660		GAME( 1981, cprogolfj, cprogolf, cprogolfj,cprogolf, decocass_state, decocass, ROT270, "Data East Corporation", "Tournament Pro Golf (DECO Cassette, Japan)", 0 )
	1660	GAME( 1981, cprogolfj, cprogolf, cprogolfj,cprogolf, decocass_state, decocass, ROT270, "Data East Corporation", "Tournament Pro Golf (DECO Cassette, Japan)", 0 )
1661	1661	/* 14 */ GAME( 1981, cdsteljn, decocass, cdsteljn, cdsteljn, decocass_state, cdsteljn, ROT270, "Data East Corporation", "DS Telejan (DECO Cassette, Japan)", 0 )
1662	1662	/* 15 */ GAME( 1981, cluckypo, decocass, cluckypo, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Lucky Poker (DECO Cassette)", 0 )
1663	1663	/* 16 */ GAME( 1981, ctisland, decocass, ctisland, decocass, decocass_state, decocrom, ROT270, "Data East Corporation", "Treasure Island (DECO Cassette, set 1)", 0 )
1664		GAME( 1981, ctisland2, ctisland, ctisland, decocass, decocass_state, decocrom, ROT270, "Data East Corporation", "Treasure Island (DECO Cassette, set 2)", 0 )
1665		GAME( 1981, ctisland3, ctisland, ctisland, decocass, decocass_state, decocrom, ROT270, "Data East Corporation", "Treasure Island (DECO Cassette, set 3)", GAME_NOT_WORKING ) /* Different Bitswap? */
	1664	GAME( 1981, ctisland2, ctisland, ctisland, decocass, decocass_state, decocrom, ROT270, "Data East Corporation", "Treasure Island (DECO Cassette, set 2)", 0 )
	1665	GAME( 1981, ctisland3, ctisland, ctisland, decocass, decocass_state, decocrom, ROT270, "Data East Corporation", "Treasure Island (DECO Cassette, set 3)", GAME_NOT_WORKING ) /* Different Bitswap? */
1666	1666	/* 17 */ // 1981.10 Bobbitto
1667	1667	/* 18 */ GAME( 1982, cexplore, decocass, cexplore, cexplore, decocass_state, decocass, ROT270, "Data East Corporation", "Explorer (DECO Cassette)", GAME_NOT_WORKING )
1668	1668	/* 19 */ GAME( 1982, cdiscon1, decocass, cdiscon1, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Disco No.1 (DECO Cassette)", 0 )
1669		GAME( 1982, csweetht, cdiscon1, cdiscon1, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Sweet Heart (DECO Cassette)", 0 )
	1669	GAME( 1982, csweetht, cdiscon1, cdiscon1, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Sweet Heart (DECO Cassette)", 0 )
1670	1670	/* 20 */ GAME( 1982, ctornado, decocass, ctornado, ctornado, decocass_state, decocass, ROT270, "Data East Corporation", "Tornado (DECO Cassette)", 0 )
1671	1671	/* 21 */ GAME( 1982, cmissnx, decocass, cmissnx, cmissnx, decocass_state, decocass, ROT270, "Data East Corporation", "Mission-X (DECO Cassette)", 0 )
1672	1672	/* 22 */ GAME( 1982, cptennis, decocass, cptennis, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Pro Tennis (DECO Cassette)", 0 )
r23623	r23624
1675	1675	/* 25 */ GAME( 1982, cadanglr, decocass, cfishing, cfishing, decocass_state, decocass, ROT270, "Data East Corporation", "Angler Dangler (DECO Cassette)", 0 )
1676	1676	/* 25 */ GAME( 1982, cfishing, cadanglr, cfishing, cfishing, decocass_state, decocass, ROT270, "Data East Corporation", "Fishing (DECO Cassette)", 0 )
1677	1677	/* 26 */ GAME( 1983, cbtime, decocass, cbtime, cbtime, decocass_state, decocass, ROT270, "Data East Corporation", "Burger Time (DECO Cassette)", 0 )
1678		GAME( 1982, chamburger,cbtime, cbtime, cbtime, decocass_state, decocass, ROT270, "Data East Corporation", "Hamburger (DECO Cassette, Japan)", 0 )
	1678	GAME( 1982, chamburger,cbtime, cbtime, cbtime, decocass_state, decocass, ROT270, "Data East Corporation", "Hamburger (DECO Cassette, Japan)", 0 )
1679	1679	/* 27 */ GAME( 1982, cburnrub, decocass, cburnrub, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Burnin' Rubber (DECO Cassette, set 1)", 0 )
1680		GAME( 1982, cburnrub2, cburnrub, cburnrub, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Burnin' Rubber (DECO Cassette, set 2)", 0 )
1681		GAME( 1982, cbnj, cburnrub, cburnrub, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Bump 'n' Jump (DECO Cassette)", 0 )
	1680	GAME( 1982, cburnrub2, cburnrub, cburnrub, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Burnin' Rubber (DECO Cassette, set 2)", 0 )
	1681	GAME( 1982, cbnj, cburnrub, cburnrub, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Bump 'n' Jump (DECO Cassette)", 0 )
1682	1682	/* 28 */ GAME( 1983, cgraplop, decocass, cgraplop, cgraplop, decocass_state, decocass, ROT270, "Data East Corporation", "Cluster Buster (DECO Cassette)", 0 )
1683		GAME( 1983, cgraplop2, cgraplop, cgraplop2,cgraplop, decocass_state, decocass, ROT270, "Data East Corporation", "Graplop (no title screen) (DECO Cassette)", 0 ) // a version with title screen exists, see reference videos
	1683	GAME( 1983, cgraplop2, cgraplop, cgraplop2,cgraplop, decocass_state, decocass, ROT270, "Data East Corporation", "Graplop (no title screen) (DECO Cassette)", 0 ) // a version with title screen exists, see reference videos
1684	1684	/* 29 / GAME( 1983, clapapa, decocass, clapapa, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Rootin' Tootin' / La-Pa-Pa (DECO Cassette)" , 0) / Displays 'La-Pa-Pa during attract */
1685		GAME( 1983, clapapa2, clapapa, clapapa, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Rootin' Tootin' (DECO Cassette)" , 0) /* Displays 'Rootin' Tootin' during attract */
	1685	GAME( 1983, clapapa2, clapapa, clapapa, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Rootin' Tootin' (DECO Cassette)" , 0) /* Displays 'Rootin' Tootin' during attract */
1686	1686	/* 30 */ GAME( 1983, cskater, decocass, cskater, cskater, decocass_state, decocass, ROT270, "Data East Corporation", "Skater (DECO Cassette, Japan)", 0 )
1687	1687	/* 31 */ GAME( 1983, cprobowl, decocass, cprobowl, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Pro Bowling (DECO Cassette)", 0 )
1688	1688	/* 32 */ GAME( 1983, cnightst, decocass, cnightst, cnightst, decocass_state, decocass, ROT270, "Data East Corporation", "Night Star (DECO Cassette, set 1)", 0 )
1689		GAME( 1983, cnightst2, cnightst, cnightst, cnightst, decocass_state, decocass, ROT270, "Data East Corporation", "Night Star (DECO Cassette, set 2)", 0 )
	1689	GAME( 1983, cnightst2, cnightst, cnightst, cnightst, decocass_state, decocass, ROT270, "Data East Corporation", "Night Star (DECO Cassette, set 2)", 0 )
1690	1690	/* 33 */ GAME( 1983, cpsoccer, decocass, cpsoccer, cpsoccer, decocass_state, decocass, ROT270, "Data East Corporation", "Pro Soccer (DECO Cassette)", 0 )
1691		GAME( 1983, cpsoccerj, cpsoccer, cpsoccer, cpsoccer, decocass_state, decocass, ROT270, "Data East Corporation", "Pro Soccer (DECO Cassette, Japan)", 0 )
	1691	GAME( 1983, cpsoccerj, cpsoccer, cpsoccer, cpsoccer, decocass_state, decocass, ROT270, "Data East Corporation", "Pro Soccer (DECO Cassette, Japan)", 0 )
1692	1692	/* 34 */ GAME( 1983, csdtenis, decocass, csdtenis, csdtenis, decocass_state, decocass, ROT270, "Data East Corporation", "Super Doubles Tennis (DECO Cassette, Japan)", GAME_WRONG_COLORS )
1693	1693	/* 35 */ GAME( 1985, cflyball, decocass, cflyball, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Flying Ball (DECO Cassette)", 0 )
1694	1694	/* 36 */ // 1984.04 Genesis/Boomer Rang'r
1695	1695	/* 37 */ GAME( 1983, czeroize, decocass, czeroize, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Zeroize (DECO Cassette)", 0 )
1696	1696	/* 38 */ GAME( 1984, cscrtry, decocass, type4, cscrtry, decocass_state, decocass, ROT270, "Data East Corporation", "Scrum Try (DECO Cassette, set 1)", 0 )
1697		GAME( 1984, cscrtry2, cscrtry, type4, cscrtry, decocass_state, decocass, ROT270, "Data East Corporation", "Scrum Try (DECO Cassette, set 2)", 0 )
	1697	GAME( 1984, cscrtry2, cscrtry, type4, cscrtry, decocass_state, decocass, ROT270, "Data East Corporation", "Scrum Try (DECO Cassette, set 2)", 0 )
1698	1698	/* 39 */ GAME( 1984, cppicf, decocass, cppicf, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Peter Pepper's Ice Cream Factory (DECO Cassette, set 1)", 0 )
1699		GAME( 1984, cppicf2, cppicf, cppicf, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Peter Pepper's Ice Cream Factory (DECO Cassette, set 2)", 0 )
	1699	GAME( 1984, cppicf2, cppicf, cppicf, decocass, decocass_state, decocass, ROT270, "Data East Corporation", "Peter Pepper's Ice Cream Factory (DECO Cassette, set 2)", 0 )
1700	1700	/* 40 */ GAME( 1984, cfghtice, decocass, cfghtice, cfghtice, decocass_state, decocass, ROT270, "Data East Corporation", "Fighting Ice Hockey (DECO Cassette)", 0 )
1701	1701	/* 41 */ GAME( 1984, coozumou, decocass, type4, cscrtry, decocass_state, decocass, ROT270, "Data East Corporation", "Oozumou - The Grand Sumo (DECO Cassette, Japan)", 0 )
1702	1702	/* 42 */ // 1984.08 Hellow Gateball // not a typo, this is official spelling

trunk/src/mame/drivers/mappy.c
r23623	r23624
578	578	void mappy_state::common_latch_w(UINT32 offset)
579	579	{
580	580	int bit = offset & 1;
581
	581
582	582	switch (offset & 0x0e)
583	583	{
584	584	case 0x00: /* INT ON 2 */
r23623	r23624
586	586	if (!bit)
587	587	m_subcpu->set_input_line(0, CLEAR_LINE);
588	588	break;
589
	589
590	590	case 0x02: /* INT ON */
591	591	m_main_irq_mask = bit;
592	592	if (!bit)
593	593	m_maincpu->set_input_line(0, CLEAR_LINE);
594	594	break;
595
	595
596	596	case 0x04: /* n.c. */
597	597	break;
598
	598
599	599	case 0x06: /* SOUND ON */
600	600	mappy_sound_enable(machine().device("namco"), bit);
601	601	break;
602
	602
603	603	case 0x0a: /* SUB RESET */
604	604	m_subcpu->set_input_line(INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
605	605	break;
606
	606
607	607	case 0x0c: /* n.c. */
608	608	break;
609
	609
610	610	case 0x0e: /* n.c. */
611	611	break;
612	612	}
r23623	r23624
638	638
639	639	default:
640	640	common_latch_w(offset);
641		break;
	641	break;
642	642	}
643	643	}
644	644
r23623	r23624
662	662	case 0x0c:
663	663	m_subcpu2->set_input_line(INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
664	664	break;
665
	665
666	666	default:
667	667	common_latch_w(offset);
668		break;
	668	break;
669	669	}
670	670	}
671	671
r23623	r23624
697	697	break;
698	698	}
699	699	break;
700
	700
701	701	default:
702	702	common_latch_w(offset);
703		break;
	703	break;
704	704	}
705	705	}
706	706
r23623	r23624
1714	1714
1715	1715	MCFG_WATCHDOG_VBLANK_INIT(8)
1716	1716	MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
1717		/* synchronization of the CPUs */
	1717	/* synchronization of the CPUs */
1718	1718
1719	1719	MCFG_MACHINE_START_OVERRIDE(mappy_state,mappy)
1720	1720	MCFG_MACHINE_RESET_OVERRIDE(mappy_state,superpac)
r23623	r23624
1792	1792
1793	1793	MCFG_WATCHDOG_VBLANK_INIT(8)
1794	1794	MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
1795		/* synchronization of the CPUs */
	1795	/* synchronization of the CPUs */
1796	1796	MCFG_MACHINE_START_OVERRIDE(mappy_state,mappy)
1797	1797	MCFG_MACHINE_RESET_OVERRIDE(mappy_state,phozon)
1798	1798
r23623	r23624
1832	1832
1833	1833	MCFG_WATCHDOG_VBLANK_INIT(8)
1834	1834	MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
1835		/* synchronization of the CPUs */
	1835	/* synchronization of the CPUs */
1836	1836	MCFG_MACHINE_START_OVERRIDE(mappy_state,mappy)
1837	1837	MCFG_MACHINE_RESET_OVERRIDE(mappy_state,mappy)
1838	1838

trunk/src/mame/drivers/taito_f3.c
r23623	r23624
1	1	/***************************************************************************
2	2
3	3	Taito F3 Package System (aka F3 Cybercore System)
4
	4
5	5	Emulation by Bryan McPhail, mish@tendril.co.uk/mish@mame.net
6	6	Thanks to Ian Schmidt and Stiletto for sound information!
7	7	Major thanks to Aaron Giles for sound info, figuring out the 68K/ES5505

trunk/src/mame/drivers/galdrvr.c
r23623	r23624
46	46
47	47	static INPUT_PORTS_START( galaxianbl )
48	48	PORT_INCLUDE(galaxian)
49
	49
50	50	PORT_MODIFY("IN2")
51	51	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Bonus_Life ) )
52	52	PORT_DIPSETTING( 0x00, DEF_STR(None) )
r23623	r23624
5075	5075	ROM_LOAD( "07.bin", 0x3000, 0x0800, CRC(8e9ac0fc) SHA1(ddc11ad20ecbd954098becf7d7a1bbe6cddeda1b) )
5076	5076	ROM_LOAD( "08.bin", 0x3800, 0x0800, CRC(020a8e2f) SHA1(b64438cb043252565d8a4f3f58f4a4f78a276ba2) )
5077	5077
5078		ROM_REGION( 0x2000, "gfx1", 0 ) // not present in this set
	5078	ROM_REGION( 0x2000, "gfx1", 0 ) // not present in this set
5079	5079	ROM_LOAD( "mcs_b", 0x0000, 0x0800, CRC(fb0f1f81) SHA1(38a6679a8b69bc1870a0e67e692131c42f9535c8) )
5080	5080	ROM_LOAD( "mcs_d", 0x0800, 0x0800, CRC(13932a15) SHA1(b8885c555c6ad7021be55c6925a0a0872c1b6abd) )
5081	5081	ROM_LOAD( "mcs_a", 0x1000, 0x0800, CRC(631ebb5a) SHA1(5bc9493afa76c55858b8c8849524cbc77dc838fc) )

trunk/src/mame/drivers/zn.c
r23623	r23624
2132	2132	AM_RANGE(0x1f000000, 0x1f7fffff) AM_ROMBANK("bankedroms")
2133	2133	AM_RANGE(0x1fb00000, 0x1fb00003) AM_WRITE16(coh1001l_latch_w, 0x0000ffff)
2134	2134	AM_RANGE(0x1fb00000, 0x1fb00003) AM_WRITE8(coh1001l_bank_w, 0x00ff0000)
2135
	2135
2136	2136	AM_IMPORT_FROM(zn_map)
2137	2137	ADDRESS_MAP_END
2138	2138
r23623	r23624
2368	2368	static ADDRESS_MAP_START(coh1002m_map, AS_PROGRAM, 32, zn_state)
2369	2369	AM_RANGE(0x1f000000, 0x1f7fffff) AM_ROMBANK("bankedroms")
2370	2370	AM_RANGE(0x1fb00004, 0x1fb00007) AM_WRITE8(coh1002m_bank_w, 0x00ff0000)
2371
	2371
2372	2372	AM_IMPORT_FROM(zn_map)
2373	2373	ADDRESS_MAP_END
2374	2374
r23623	r23624
2394	2394	AM_RANGE(0x1fb00000, 0x1fb00003) AM_DEVREAD8("cbaj_fifo2", fifo7200_device, data_byte_r, 0x000000ff)
2395	2395	AM_RANGE(0x1fb00000, 0x1fb00003) AM_DEVWRITE8("cbaj_fifo1", fifo7200_device, data_byte_w, 0x000000ff)
2396	2396	AM_RANGE(0x1fb00000, 0x1fb00003) AM_READ8(cbaj_sound_main_status_r, 0xff000000)
2397
	2397
2398	2398	AM_IMPORT_FROM(coh1002m_map)
2399	2399	ADDRESS_MAP_END
2400	2400
r23623	r23624
2426	2426	MCFG_CPU_ADD("audiocpu", Z80, XTAL_32MHz/8)
2427	2427	MCFG_CPU_PROGRAM_MAP(cbaj_z80_map)
2428	2428	MCFG_CPU_IO_MAP(cbaj_z80_port_map)
2429
	2429
2430	2430	MCFG_FIFO7200_ADD("cbaj_fifo1", 0x400) // LH540202
2431	2431	MCFG_FIFO7200_ADD("cbaj_fifo2", 0x400) // "
2432	2432

trunk/src/mame/drivers/8080bw.c
r23623	r23624
3023	3023	Attack Force, by E.G.S., Italy
3024	3024	Not much information is available for this game.
3025	3025	It may have had an amber monitor?
3026
	3026
3027	3027	XTAL 20MHz
3028
	3028
3029	3029	TODO: sound
3030	3030
3031	3031	*****************************************************/
r23623	r23624
3073	3073	UINT8 *rom = memregion("maincpu")->base();
3074	3074	UINT32 len = memregion("maincpu")->bytes();
3075	3075	UINT8 *buffer = auto_alloc_array(machine(), UINT8, len);
3076
	3076
3077	3077	// swap a8/a9
3078	3078	for (int i = 0; i < len; i++)
3079	3079	buffer[BITSWAP16(i, 15,14,13,12,11,10,8,9, 7,6,5,4,3,2,1,0)] = rom[i];
r23623	r23624
4554	4554	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
4555	4555	ROM_LOAD( "30a.bin", 0x0000, 0x0400, CRC(c12e3386) SHA1(72b1d3d67a83edf0be0b0c37ef6dcffba450f16f) )
4556	4556	ROM_LOAD( "36a.bin", 0x0400, 0x0400, CRC(6738dcb9) SHA1(e4c68553fc3f2d3db3d251b9cb325e2409d9c02a) )
4557		ROM_LOAD( "31a.bin", 0x0800, 0x0400, CRC(787a4658) SHA1(5be3143bdba6a32256603be94400034a8ea1fda6) )
	4557	ROM_LOAD( "31a.bin", 0x0800, 0x0400, CRC(787a4658) SHA1(5be3143bdba6a32256603be94400034a8ea1fda6) )
4558	4558	ROM_LOAD( "37a.bin", 0x0c00, 0x0400, CRC(ad6bfbbe) SHA1(5f5437b6c8e7dfe9649b25040862f8a51d8c43ed) )
4559	4559	ROM_LOAD( "32a.bin", 0x1000, 0x0400, CRC(cbe0a711) SHA1(6e5f4214a4b48b70464005f4263c9b1ec3cbbeb1) )
4560	4560	ROM_LOAD( "33a.bin", 0x1800, 0x0400, CRC(53147393) SHA1(57e078f1734e382e8a46be09c133daab30c75681) )

trunk/src/mame/drivers/btime.c
r23623	r23624
900	900	INPUT_PORTS_END
901	901
902	902	static INPUT_PORTS_START( caractn2 ) /* 2/3 Lives Dip changes in this set */
903		PORT_INCLUDE( bnj )
	903	PORT_INCLUDE( bnj )
904	904
905		PORT_MODIFY("DSW2")
	905	PORT_MODIFY("DSW2")
906	906	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("7D:1")
907	907	PORT_DIPSETTING( 0x01, "2" )
908	908	PORT_DIPSETTING( 0x00, "3" )

trunk/src/mame/drivers/tempest.c
r23623	r23624
288	288	tempest_state(const machine_config &mconfig, device_type type, const char *tag)
289	289	: driver_device(mconfig, type, tag),
290	290	m_maincpu(*this, "maincpu"),
291		m_mathbox(*this, "mathbox") { }
	291	m_mathbox(*this, "mathbox") { }
292	292
293	293	required_device<cpu_device> m_maincpu;
294	294	required_device<mathbox_device> m_mathbox;
295
	295
296	296	UINT8 m_player_select;
297	297	DECLARE_WRITE8_MEMBER(wdclr_w);
298	298	DECLARE_WRITE8_MEMBER(tempest_led_w);

trunk/src/mame/drivers/quakeat.c
r23623	r23624
92	92	static ADDRESS_MAP_START( quake_io, AS_IO, 32, quakeat_state )
93	93	AM_IMPORT_FROM(pcat32_io_common)
94	94	AM_RANGE(0x00e8, 0x00eb) AM_NOP
95		// AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
	95	// AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
96	96	AM_RANGE(0x0300, 0x03af) AM_NOP
97	97	AM_RANGE(0x03b0, 0x03df) AM_NOP
98	98	// AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)

trunk/src/mame/drivers/speedbal.c
r23623	r23624
80	80	{
81	81	if (!m_leds_start)
82	82	return;
83
	83
84	84	m_leds_start = false;
85	85
86	86	// Each hypothetical led block has 3 7seg leds.
r23623	r23624
362	362
363	363	for (int i=0;i<0x8000;i++)
364	364	{
365
366	365	// some bits are ^ 0x05
367	366	/*if ((i&0x30) == 0x00)
368	367	{
369		if ((( i & 0x0f ) > 0x08) && (( i & 0x0f ) < 0x0f)) MUSICBALL_XOR05
	368	if ((( i & 0x0f ) > 0x08) && (( i & 0x0f ) < 0x0f)) MUSICBALL_XOR05
370	369	}
371	370	*/
372	371

trunk/src/mame/mame.lst
r23623	r23624
173	173	zerotime // hack
174	174	starfght // hack
175	175	galaxbsf // hack
176		galaxianbl // bootleg
	176	galaxianbl // bootleg
177	177	kamakazi3 // Video Games (UK) Ltd., hack or bootleg?
178	178	tst_galx // Galaxian Test ROM
179	179	gmgalax // bootleg
r23623	r23624
186	186	gteikob2 // bootleg
187	187	galemp // (c) Taito do Brasil
188	188	asideral // bootleg
189		pajaroes // bootleg
	189	pajaroes // bootleg
190	190	spacbatt // bootleg
191	191	spacbat2 // bootleg
192	192	spacempr // bootleg
r23623	r23624
246	246	eagle3 // [1980] Centuri
247	247	spctbird // (c) Fortrek
248	248	mooncptc // bootleg (Petaco S.A.)
249		mooncrsl // bootleg (Laguna S.A.)
	249	mooncrsl // bootleg (Laguna S.A.)
250	250	fantastc // (c) Taito (Brazil) - rewrite of Galaga
251	251	timefgtr // (c) Taito (Brazil) - rewrite of Time Pilot
252	252	kong // (c) Taito (Brazil) - rewrite of Donkey Kong
r23623	r23624
300	300	scramblebb // bootleg?
301	301	scramblb // bootleg
302	302	scramb2 // bootleg
303		scrambler // bootleg
	303	scrambler // bootleg
304	304	explorer // bootleg
305	305	strfbomb // bootleg
306		scrambp // bootleg (Billport S.A.)
307		scrampt // bootleg (Petaco S.A.)
	306	scrambp // bootleg (Billport S.A.)
	307	scrampt // bootleg (Petaco S.A.)
308	308	atlantis // (c) 1981 Comsoft
309	309	atlantis2 // (c) 1981 Comsoft
310	310	theend // (c) 1980 Konami
r23623	r23624
412	412	ccboot // bootleg
413	413	ccboot2 // bootleg
414	414	ccbootmr // Model Racing bootleg
415		cclimbroper // Operamatic bootleg
	415	cclimbroper // Operamatic bootleg
416	416	ckong // (c) 1981 (Kyoei)
417	417	ckongo // bootleg (Orca)
418	418	ckongalc // bootleg (Alca)
r23623	r23624
680	680	griffon // bootleg (Videotron)
681	681	nextfase // bootleg
682	682	phoenixs // bootleg (Sonic)
683		avefenix //
	683	avefenix //
684	684	pleiads // (c) 1981 Tehkan
685	685	pleiadsb2 // bootleg
686	686	pleiadbl // bootleg
r23623	r23624
1493	1493	spceking // (c) 1978 Leijac Corporation (Konami)
1494	1494	spcewars // (c) 1978 Sanritsu
1495	1495	astropal // (c) 19?? Sidam
1496		attackfc // (c) 1979? E.G.S.
	1496	attackfc // (c) 1979? E.G.S.
1497	1497	cosmo // TDS & Mints
1498	1498	darthvdr // bootleg
1499	1499	ultrainv
r23623	r23624
2751	2751	mayday // bootleg
2752	2752	maydaya // bootleg
2753	2753	maydayb // bootleg
2754		batlzone // bootleg?
	2754	batlzone // bootleg?
2755	2755	colony7 // (c) 1981 Taito
2756	2756	colony7a // (c) 1981 Taito
2757	2757	jin // Falcon bootleg/hack
r23623	r23624
4086	4086	starrkr // (c) 1981 Sega
4087	4087	brdrlins // Sidam bootleg
4088	4088	brdrlinb // Karateco bootleg
4089		brdrlinet // (c) 1981 Sega
	4089	brdrlinet // (c) 1981 Sega
4090	4090	digger // 684-691 no copyright notice
4091	4091	pulsar // 790-805 (c) 1981 Sega
4092	4092	heiankyo // (c) [1979?] Denki Onkyo
r23623	r23624
5463	5463	ctornado // 20 1982.05 Tornado
5464	5464	cmissnx // 21 1982.04 Mission-X/Zoar
5465	5465	cptennis // 22 1982.06 Pro Tennis
5466		cprogolf18 // 23 1982.?? 18 Hole Pro Golf
	5466	cprogolf18 // 23 1982.?? 18 Hole Pro Golf
5467	5467	// 24 1982.07 Tsumego Kaisyou
5468	5468	cadanglr // 25 1982.10 Angler Dangler
5469	5469	cfishing // 25 1982.10 Fishing
r23623	r23624
6575	6575	asteroid2 // 035127-035145 (c) 1979
6576	6576	asteroid1 // 035127-035145 no copyright notice
6577	6577	asteroidb // (bootleg)
6578		aerolitos // Rodmar Elec. bootleg
	6578	aerolitos // Rodmar Elec. bootleg
6579	6579	asterock // Sidam bootleg (c) 1979
6580	6580	asterockv // Videotron bootleg(c) 1979
6581	6581	hyperspc // Rumiano bootleg (c) 1979
r23623	r23624
6994	6994	satansat // (c) 1981 SNK
6995	6995	satansata // (c) 1981 SNK
6996	6996	zarzon // (c) 1981 Taito, gameplay says SNK
6997		satansatind // bootleg
	6997	satansatind // bootleg
6998	6998	vanguard // (c) 1981 SNK
6999	6999	vanguardc // (c) 1981 SNK + Centuri
7000	7000	vanguardj // (c) 1981 SNK
r23623	r23624
7430	7430	btlfield // Alpha-68K96II 'BT' (c) 1987
7431	7431	btlfieldb // bootleg
7432	7432	skysoldr // Alpha-68K96II 'SS' (c) 1988 SNK (Romstar with dip switch)
7433		skysoldrbl // bootleg
	7433	skysoldrbl // bootleg
7434	7434	goldmedl // Alpha-68K96II 'GM' (c) 1988 SNK
7435	7435	goldmedla // Alpha-68K96II 'GM' (c) 1988 SNK
7436	7436	goldmedlb // Alpha-68K96II bootleg
r23623	r23624
7455	7455	ssozumo // TA-0008 (c) 1984
7456	7456	mystston // TA-0010 (c) 1984
7457	7457	myststono // TA-0010 (c) 1984
7458		myststonoi // PCB manufactured by Itisa
	7458	myststonoi // PCB manufactured by Itisa
7459	7459	dogfgt // TA-0011 (c) 1984
7460	7460	dogfgtu // TA-0011 (c) 1985 Data East USA, Inc.
7461	7461	dogfgtj // TA-0011 (c) 1984
r23623	r23624
8899	8899
8900	8900	// Tecfri games
8901	8901	ambush // (c) 1983
8902		ambushh // (c) 1983
	8902	ambushh // (c) 1983
8903	8903	ambushj // (c) 1983 Nippon Amuse license
8904	8904	ambushv // (c) 1983 Volt Electronics license
8905	8905	holeland // (c) 1984
r23623	r23624
8907	8907	crzrallya // (c) 1985
8908	8908	crzrallyg // (c) 1985
8909	8909	speedbal // (c) 1987
8910		musicbal // (c) 1987
	8910	musicbal // (c) 1987
8911	8911	sauro // (c) 1987
8912	8912	saurop // (c) 1987
8913	8913	trckydoc // (c) 1987
r23623	r23624
30632	30632
30633	30633	number1 // 1996 San Remo Games
30634	30634	gluck2 // 1992 Yung Yu / CYE
30635
30636

trunk/src/mame/audio/redbaron.h
r23623	r23624
9	9	{
10	10	public:
11	11	redbaron_sound_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
12
	12
13	13	DECLARE_WRITE8_MEMBER( sounds_w );
14
	14
15	15	protected:
16	16	// device-level overrides
17	17	virtual void device_start();

trunk/src/mame/audio/snes_snd.c
r23623	r23624
176	176	void snes_sound_device::device_start()
177	177	{
178	178	m_channel = machine().sound().stream_alloc(*this, 0, 2, 32000, this);
179
	179
180	180	m_ram = auto_alloc_array_clear(machine(), UINT8, SNES_SPCRAM_SIZE);
181
	181
182	182	/* put IPL image at the top of RAM */
183	183	memcpy(m_ipl_region, machine().root_device().memregion("sound_ipl")->base(), 64);
184
	184
185	185	/* Initialize the timers */
186	186	m_timer[0] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(snes_sound_device::spc_timer),this));
187	187	m_timer[0]->adjust(attotime::from_hz(8000), 0, attotime::from_hz(8000));
r23623	r23624
192	192	m_timer[2] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(snes_sound_device::spc_timer),this));
193	193	m_timer[2]->adjust(attotime::from_hz(64000), 2, attotime::from_hz(64000));
194	194	m_timer[2]->enable(false);
195
	195
196	196	state_register();
197	197	save_pointer(NAME(m_ram), SNES_SPCRAM_SIZE);
198	198	}
r23623	r23624
205	205	{
206	206	/* default to ROM visible */
207	207	m_ram[0xf1] = 0x80;
208
	208
209	209	/* Sort out the ports */
210	210	for (int i = 0; i < 4; i++)
211	211	{
212	212	m_port_in[i] = 0;
213	213	m_port_out[i] = 0;
214	214	}
215
	215
216	216	dsp_reset();
217	217	}
218	218
r23623	r23624
1242	1242	void snes_sound_device::sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples)
1243	1243	{
1244	1244	short mix[2];
1245
	1245
1246	1246	for (int i = 0; i < samples; i++)
1247	1247	{
1248	1248	mix[0] = mix[1] = 0;
1249	1249	dsp_update(mix);
1250
	1250
1251	1251	/* Update the buffers */
1252	1252	outputs[0][i] = (stream_sample_t)mix[0];
1253	1253	outputs[1][i] = (stream_sample_t)mix[1];

trunk/src/mame/audio/geebee.c
r23623	r23624
12	12
13	13
14	14	const device_type GEEBEE = &device_creator<geebee_sound_device>;
15
	15
16	16	geebee_sound_device::geebee_sound_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
17	17	: device_t(mconfig, GEEBEE, "Gee Bee Custom", tag, owner, clock),
18	18	device_sound_interface(mconfig, *this),
r23623	r23624
26	26	m_vcount(0)
27	27	{
28	28	}
29
	29
30	30	//-------------------------------------------------
31	31	// device_config_complete - perform any
32	32	// operations now that the configuration is
33	33	// complete
34	34	//-------------------------------------------------
35
	35
36	36	void geebee_sound_device::device_config_complete()
37	37	{
38	38	}
39
	39
40	40	//-------------------------------------------------
41	41	// device_start - device-specific startup
42	42	//-------------------------------------------------
r23623	r23624
60	60	save_item(NAME(m_noise));
61	61	save_item(NAME(m_vcount));
62	62	}
63
	63
64	64	void geebee_sound_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
65	65	{
66	66	switch (id)
r23623	r23624
69	69	if (--m_volume < 0)
70	70	m_volume = 0;
71	71	break;
72
	72
73	73	default:
74	74	assert_always(FALSE, "Unknown id in geebee_device::device_timer");
75	75	}
r23623	r23624
81	81	m_sound_latch = data;
82	82	m_volume = 0x7fff; /* set volume */
83	83	m_noise = 0x0000; /* reset noise shifter */
84		/* faster decay enabled? */
	84	/* faster decay enabled? */
85	85	if( m_sound_latch & 8 )
86		{
87		/*
88		* R24 is 10k, Rb is 0, C57 is 1uF
	86	{
	87	/*
	88	* R24 is 10k, Rb is 0, C57 is 1uF
89	89	* charge time t1 = 0.693 * (R24 + Rb) * C57 -> 0.22176s
90	90	* discharge time t2 = 0.693 * (Rb) * C57 -> 0
91	91	* Then C33 is only charged via D6 (1N914), not discharged!
r23623	r23624
114	114	//-------------------------------------------------
115	115
116	116	void geebee_sound_device::sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples)
117		{
118		stream_sample_t *buffer = outputs[0];
119
120		while (samples--)
121		{
	117	{
	118	stream_sample_t *buffer = outputs[0];
	119
	120	while (samples--)
	121	{
122	122	*buffer++ = m_sound_signal;
123		/* 1V = HSYNC = 18.432MHz / 3 / 2 / 384 = 8000Hz */
124		{
	123	/* 1V = HSYNC = 18.432MHz / 3 / 2 / 384 = 8000Hz */
	124	{
125	125	m_vcount++;
126		/* noise clocked with raising edge of 2V */
	126	/* noise clocked with raising edge of 2V */
127	127	if ((m_vcount & 3) == 2)
128		{
129		/* bit0 = bit0 ^ !bit10 */
	128	{
	129	/* bit0 = bit0 ^ !bit10 */
130	130	if ((m_noise & 1) == ((m_noise >> 10) & 1))
131	131	m_noise = ((m_noise << 1) & 0xfffe) \| 1;
132		else
	132	else
133	133	m_noise = (m_noise << 1) & 0xfffe;
134		}
	134	}
135	135	switch (m_sound_latch & 7)
136		{
137		case 0: /* 4V */
	136	{
	137	case 0: /* 4V */
138	138	m_sound_signal = (m_vcount & 0x04) ? m_decay[m_volume] : 0;
139		break;
140		case 1: /* 8V */
	139	break;
	140	case 1: /* 8V */
141	141	m_sound_signal = (m_vcount & 0x08) ? m_decay[m_volume] : 0;
142		break;
143		case 2: /* 16V */
	142	break;
	143	case 2: /* 16V */
144	144	m_sound_signal = (m_vcount & 0x10) ? m_decay[m_volume] : 0;
145		break;
146		case 3: /* 32V */
	145	break;
	146	case 3: /* 32V */
147	147	m_sound_signal = (m_vcount & 0x20) ? m_decay[m_volume] : 0;
148		break;
149		case 4: /* TONE1 */
	148	break;
	149	case 4: /* TONE1 */
150	150	m_sound_signal = !(m_vcount & 0x01) && !(m_vcount & 0x10) ? m_decay[m_volume] : 0;
151		break;
152		case 5: /* TONE2 */
	151	break;
	152	case 5: /* TONE2 */
153	153	m_sound_signal = !(m_vcount & 0x02) && !(m_vcount & 0x20) ? m_decay[m_volume] : 0;
154		break;
155		case 6: /* TONE3 */
	154	break;
	155	case 6: /* TONE3 */
156	156	m_sound_signal = !(m_vcount & 0x04) && !(m_vcount & 0x40) ? m_decay[m_volume] : 0;
157		break;
158		default: /* NOISE */
159		/* QH of 74164 #4V */
	157	break;
	158	default: /* NOISE */
	159	/* QH of 74164 #4V */
160	160	m_sound_signal = (m_noise & 0x8000) ? m_decay[m_volume] : 0;
161		}
162
163		}
164		}
165		}
		No newline at end of file
	161	}
	162
	163	}
	164	}
	165	}

trunk/src/mame/audio/snes_snd.h
r23623	r23624
73	73	DECLARE_WRITE8_MEMBER( spc_io_w );
74	74	DECLARE_WRITE8_MEMBER( spc_ram_w );
75	75	DECLARE_WRITE8_MEMBER( spc_port_in );
76
77		// UINT8 *spc_get_ram() { return m_ram; }
78	76
	77	// UINT8 *spc_get_ram() { return m_ram; }
	78
79	79	protected:
80	80	// device-level overrides
81	81	virtual void device_config_complete();
r23623	r23624
86	86	virtual void sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples);
87	87
88	88	private:
89
	89
90	90	DECLARE_READ8_MEMBER(dsp_io_r);
91	91	DECLARE_WRITE8_MEMBER(dsp_io_w);
92	92	TIMER_CALLBACK_MEMBER(spc_timer);
r23623	r23624
94	94	void dsp_update(short *sound_ptr);
95	95	int advance_envelope(int v);
96	96	void state_register();
97
	97
98	98	// internal state
99	99	UINT8 *m_ram;
100	100	sound_stream *m_channel;
101	101	UINT8 m_dsp_regs[256]; /* DSP registers */
102	102	UINT8 m_ipl_region[64]; /* SPC top 64 bytes */
103
	103
104	104	int m_keyed_on;
105	105	int m_keys; /* 8-bits for 8 voices */
106	106	voice_state_type m_voice_state[8];
107
	107
108	108	/* Noise stuff */
109	109	int m_noise_cnt;
110	110	int m_noise_lev;
111
	111
112	112	/* These are for the FIR echo filter */
113	113	#ifndef NO_ECHO
114	114	short m_fir_lbuf[8];
r23623	r23624
116	116	int m_fir_ptr;
117	117	int m_echo_ptr;
118	118	#endif
119
	119
120	120	/* timers */
121	121	emu_timer *m_timer[3];
122	122	UINT8 m_enabled[3];
123	123	UINT16 m_counter[3];
124
	124
125	125	/* IO ports */
126	126	UINT8 m_port_in[4]; /* SPC input ports */
127	127	UINT8 m_port_out[4]; /* SPC output ports */

trunk/src/mame/audio/warpwarp.c
r23623	r23624
15	15
16	16
17	17	const device_type WARPWARP = &device_creator<warpwarp_sound_device>;
18
	18
19	19	warpwarp_sound_device::warpwarp_sound_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
20	20	: device_t(mconfig, WARPWARP, "Warp Warp Custom", tag, owner, clock),
21	21	device_sound_interface(mconfig, *this),
r23623	r23624
43	43	// operations now that the configuration is
44	44	// complete
45	45	//-------------------------------------------------
46
	46
47	47	void warpwarp_sound_device::device_config_complete()
48	48	{
49	49	}
50
	50
51	51	//-------------------------------------------------
52	52	// device_start - device-specific startup
53	53	//-------------------------------------------------
r23623	r23624
77	77	save_item(NAME(m_mcarry));
78	78	save_item(NAME(m_mcount));
79	79	}
80
	80
81	81	void warpwarp_sound_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
82	82	{
83	83	switch (id)
84	84	{
85		case TIMER_SOUND_VOLUME_DECAY:
	85	case TIMER_SOUND_VOLUME_DECAY:
86	86	if (--m_sound_volume < 0)
87	87	m_sound_volume = 0;
88	88	break;
89
	89
90	90	case TIMER_MUSIC_VOLUME_DECAY:
91	91	if (--m_music_volume < 0)
92	92	m_music_volume = 0;
93	93	break;
94
	94
95	95	default:
96	96	assert_always(FALSE, "Unknown id in warpwarp_sound_device::device_timer");
97	97	}
98	98	}
99
	99
100	100	WRITE8_MEMBER( warpwarp_sound_device::sound_w )
101	101	{
102	102	m_channel->update();
103	103	m_sound_latch = data & 0x0f;
104	104	m_sound_volume = 0x7fff; /* set sound_volume */
105	105	m_noise = 0x0000; /* reset noise shifter */
106
107		/* faster decay enabled? */
	106
	107	/* faster decay enabled? */
108	108	if( m_sound_latch & 8 )
109		{
110		/*
111		* R85(?) is 10k, Rb is 0, C92 is 1uF
	109	{
	110	/*
	111	* R85(?) is 10k, Rb is 0, C92 is 1uF
112	112	* charge time t1 = 0.693 * (R24 + Rb) * C57 -> 0.22176s
113	113	* discharge time t2 = 0.693 * (Rb) * C57 -> 0
114	114	* C90(?) is only charged via D17 (1N914), no discharge!
r23623	r23624
139	139	m_channel->update();
140	140	m_music1_latch = data & 0x3f;
141	141	}
142
	142
143	143	WRITE8_MEMBER( warpwarp_sound_device::music2_w )
144	144	{
145	145	m_channel->update();
146	146	m_music2_latch = data & 0x3f;
147	147	m_music_volume = 0x7fff;
148		/* fast decay enabled? */
	148	/* fast decay enabled? */
149	149	if( m_music2_latch & 0x10 )
150		{
151		/*
152		* Ra (R83?) is 10k, Rb is 0, C92 is 1uF
	150	{
	151	/*
	152	* Ra (R83?) is 10k, Rb is 0, C92 is 1uF
153	153	* charge time t1 = 0.693 * (Ra + Rb) * C -> 0.22176s
154	154	* discharge time is (nearly) zero, because Rb is zero
155	155	* C95(?) is only charged via D17, not discharged!
r23623	r23624
180	180	//-------------------------------------------------
181	181
182	182	void warpwarp_sound_device::sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples)
183		{
184		stream_sample_t *buffer = outputs[0];
185
186		while (samples--)
187		{
	183	{
	184	stream_sample_t *buffer = outputs[0];
	185
	186	while (samples--)
	187	{
188	188	*buffer++ = (m_sound_signal + m_music_signal) / 2;
189	189
190	190	/*
r23623	r23624
198	198	* ...
199	199	* 48 = 64 steps -> 3000 Hz
200	200	* ...
201		* 63 = 4 steps -> 48 kHz
202		*/
	201	* 63 = 4 steps -> 48 kHz
	202	*/
203	203
204	204	m_mcarry -= CLOCK_16H / (4 * (64 - m_music1_latch));
205	205	while( m_mcarry < 0 )
206		{
	206	{
207	207	m_mcarry += CLOCK_16H;
208	208	m_mcount++;
209	209	m_music_signal = (m_mcount & ~m_music2_latch & 15) ? m_decay[m_music_volume] : 0;
210		/* override by noise gate? */
	210	/* override by noise gate? */
211	211	if( (m_music2_latch & 32) && (m_noise & 0x8000) )
212	212	m_music_signal = m_decay[m_music_volume];
213		}
214
215		/* clock 1V = 8kHz */
	213	}
	214
	215	/* clock 1V = 8kHz */
216	216	m_vcarry -= CLOCK_1V;
217	217	while (m_vcarry < 0)
218		{
	218	{
219	219	m_vcarry += CLOCK_16H;
220	220	m_vcount++;
221
222		/* noise is clocked with raising edge of 2V */
	221
	222	/* noise is clocked with raising edge of 2V */
223	223	if ((m_vcount & 3) == 2)
224		{
225		/* bit0 = bit0 ^ !bit10 */
	224	{
	225	/* bit0 = bit0 ^ !bit10 */
226	226	if ((m_noise & 1) == ((m_noise >> 10) & 1))
227	227	m_noise = (m_noise << 1) \| 1;
228		else
	228	else
229	229	m_noise = m_noise << 1;
230		}
231
	230	}
	231
232	232	switch (m_sound_latch & 7)
233		{
234		case 0: /* 4V */
	233	{
	234	case 0: /* 4V */
235	235	m_sound_signal = (m_vcount & 0x04) ? m_decay[m_sound_volume] : 0;
236		break;
237		case 1: /* 8V */
	236	break;
	237	case 1: /* 8V */
238	238	m_sound_signal = (m_vcount & 0x08) ? m_decay[m_sound_volume] : 0;
239		break;
240		case 2: /* 16V */
	239	break;
	240	case 2: /* 16V */
241	241	m_sound_signal = (m_vcount & 0x10) ? m_decay[m_sound_volume] : 0;
242		break;
243		case 3: /* 32V */
	242	break;
	243	case 3: /* 32V */
244	244	m_sound_signal = (m_vcount & 0x20) ? m_decay[m_sound_volume] : 0;
245		break;
246		case 4: /* TONE1 */
	245	break;
	246	case 4: /* TONE1 */
247	247	m_sound_signal = !(m_vcount & 0x01) && !(m_vcount & 0x10) ? m_decay[m_sound_volume] : 0;
248		break;
249		case 5: /* TONE2 */
	248	break;
	249	case 5: /* TONE2 */
250	250	m_sound_signal = !(m_vcount & 0x02) && !(m_vcount & 0x20) ? m_decay[m_sound_volume] : 0;
251		break;
252		case 6: /* TONE3 */
	251	break;
	252	case 6: /* TONE3 */
253	253	m_sound_signal = !(m_vcount & 0x04) && !(m_vcount & 0x40) ? m_decay[m_sound_volume] : 0;
254		break;
255		default: /* NOISE */
256		/* QH of 74164 #4V */
	254	break;
	255	default: /* NOISE */
	256	/* QH of 74164 #4V */
257	257	m_sound_signal = (m_noise & 0x8000) ? m_decay[m_sound_volume] : 0;
258		}
259
260		}
261		}
262		}
		No newline at end of file
	258	}
	259
	260	}
	261	}
	262	}

trunk/src/mame/audio/warpwarp.h
r23623	r23624
3	3	{
4	4	public:
5	5	geebee_sound_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
6
	6
7	7	enum
8	8	{
9	9	TIMER_VOLUME_DECAY
10	10	};
11
	11
12	12	DECLARE_WRITE8_MEMBER( sound_w );
13
	13
14	14	protected:
15	15	// device-level overrides
16	16	virtual void device_config_complete();
r23623	r23624
18	18
19	19	// sound stream update overrides
20	20	virtual void sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples);
21
	21
22	22	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
23
	23
24	24	private:
25	25	// internal state
26	26	UINT16 *m_decay;
r23623	r23624
49	49	TIMER_SOUND_VOLUME_DECAY,
50	50	TIMER_MUSIC_VOLUME_DECAY
51	51	};
52
53
	52
	53
54	54	DECLARE_WRITE8_MEMBER( sound_w );
55	55	DECLARE_WRITE8_MEMBER( music1_w );
56	56	DECLARE_WRITE8_MEMBER( music2_w );
r23623	r23624
59	59	// device-level overrides
60	60	virtual void device_config_complete();
61	61	virtual void device_start();
62
	62
63	63	// sound stream update overrides
64	64	virtual void sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples);
65
	65
66	66	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
67
	67
68	68	private:
69	69	// internal state
70	70	INT16 *m_decay;

trunk/src/mame/audio/flower.c
r23623	r23624
140	140	for (voice = m_channel_list; voice < m_last_channel; voice++)
141	141	voice->ecount += (voice->ecount < (1<<22));
142	142	break;
143
	143
144	144	default:
145	145	assert_always(FALSE, "Unknown id in flower_sound_device::device_timer");
146	146	}

trunk/src/mame/machine/namcoio.c
r23623	r23624
141	141	: namcoio_device(mconfig, NAMCO59XX, "Namco 59xx", tag, owner, clock, "59xx")
142	142	{
143	143	m_device_type = TYPE_NAMCO59XX;
144		}
	144	}
145	145
146	146	//-------------------------------------------------
147	147	// device_config_complete - perform any
r23623	r23624
155	155	const namcoio_interface intf = reinterpret_cast<const namcoio_interface >(static_config());
156	156	if (intf != NULL)
157	157	static_cast<namcoio_interface >(this) = *intf;
158
	158
159	159	// or initialize to defaults if none provided
160	160	else
161	161	{

trunk/src/mame/machine/namcoio.h
r23623	r23624
17	17	public:
18	18	namcoio_device(const machine_config &mconfig, device_type type, const char* name, const char tag, device_t owner, UINT32 clock, const char *shortname);
19	19
20
	20
21	21	DECLARE_READ8_MEMBER( read );
22	22	DECLARE_WRITE8_MEMBER( write );
23	23
r23623	r23624
29	29	virtual void device_config_complete();
30	30	virtual void device_start();
31	31	virtual void device_reset();
32
	32
33	33	int m_device_type;
34
	34
35	35	enum {
36	36	TYPE_NAMCO56XX,
37	37	TYPE_NAMCO58XX,
38	38	TYPE_NAMCO59XX,
39	39	};
40
	40
41	41	// internal state
42	42	UINT8 m_ram[16];
43	43
r23623	r23624
51	51	INT32 m_coins_per_cred[2];
52	52	INT32 m_creds_per_coin[2];
53	53	INT32 m_in_count;
54
	54
55	55	void handle_coins( int swap );
56	56
57	57	virtual void customio_run() {}
58
	58
59	59	private:
60	60
61	61	};

trunk/src/mame/machine/pgmprot5.c
r23623	r23624
44	44	// All tables all xored by 'warning' information at $1354ee (drgw2)
45	45	static const UINT8 drgw2_source_data[0x08][0xec] =
46	46	{
47		{ 0, }, // Region 0, not used
48		{ // Region 1, $13A886
49		0x67, 0x51, 0xF3, 0x19, 0xA0, 0x11, 0xB1, 0x11, 0xB0, 0xEE, 0xE3, 0xF6, 0xBE, 0x81, 0x35, 0xE3,
50		0xFB, 0xE6, 0xEF, 0xDF, 0x61, 0x01, 0xFA, 0x22, 0x5D, 0x43, 0x01, 0xA5, 0x3B, 0x17, 0xD4, 0x74,
51		0xF0, 0xF4, 0xF3, 0x43, 0xB5, 0x19, 0x04, 0xD5, 0x84, 0xCE, 0x87, 0xFE, 0x35, 0x3E, 0xC4, 0x3C,
52		0xC7, 0x85, 0x2A, 0x33, 0x00, 0x86, 0xD0, 0x4D, 0x65, 0x4B, 0xF9, 0xE9, 0xC0, 0xBA, 0xAA, 0x77,
53		0x9E, 0x66, 0xF6, 0x0F, 0x4F, 0x3A, 0xB6, 0xF1, 0x64, 0x9A, 0xE9, 0x25, 0x1A, 0x5F, 0x22, 0xA3,
54		0xA2, 0xBF, 0x4B, 0x77, 0x3F, 0x34, 0xC9, 0x6E, 0xDB, 0x12, 0x5C, 0x33, 0xA5, 0x8B, 0x6C, 0xB1,
55		0x74, 0xC8, 0x40, 0x4E, 0x2F, 0xE7, 0x46, 0xAE, 0x99, 0xFC, 0xB0, 0x55, 0x54, 0xDF, 0xA7, 0xA1,
56		0x0F, 0x5E, 0x49, 0xCF, 0x56, 0x3C, 0x90, 0x2B, 0xAC, 0x65, 0x6E, 0xDB, 0x58, 0x3E, 0xC9, 0x00,
57		0xAE, 0x53, 0x4D, 0x92, 0xFA, 0x40, 0xB2, 0x6B, 0x65, 0x4B, 0x90, 0x8A, 0x0C, 0xE2, 0xA5, 0x9A,
58		0xD0, 0x20, 0x29, 0x55, 0xA4, 0x44, 0xAC, 0x51, 0x87, 0x54, 0x53, 0x34, 0x24, 0x4B, 0x81, 0x67,
59		0x34, 0x4C, 0x5F, 0x31, 0x4E, 0xF2, 0xF1, 0x19, 0x18, 0x1C, 0x34, 0x38, 0xE1, 0x81, 0x17, 0xCF,
60		0x24, 0xB9, 0x9A, 0xCB, 0x34, 0x51, 0x50, 0x59, 0x44, 0xB1, 0x0B, 0x50, 0x95, 0x6C, 0x48, 0x7E,
61		0x14, 0xA4, 0xC6, 0xD9, 0xD3, 0xA5, 0xD6, 0xD0, 0xC5, 0x97, 0xF0, 0x45, 0xD0, 0x98, 0x51, 0x91,
62		0x9F, 0xA3, 0x43, 0x51, 0x05, 0x90, 0xEE, 0xCA, 0x7E, 0x5F, 0x72, 0x53, 0xB1, 0xD3, 0xAF, 0x36,
	47	{ 0, }, // Region 0, not used
	48	{ // Region 1, $13A886
	49	0x67, 0x51, 0xF3, 0x19, 0xA0, 0x11, 0xB1, 0x11, 0xB0, 0xEE, 0xE3, 0xF6, 0xBE, 0x81, 0x35, 0xE3,
	50	0xFB, 0xE6, 0xEF, 0xDF, 0x61, 0x01, 0xFA, 0x22, 0x5D, 0x43, 0x01, 0xA5, 0x3B, 0x17, 0xD4, 0x74,
	51	0xF0, 0xF4, 0xF3, 0x43, 0xB5, 0x19, 0x04, 0xD5, 0x84, 0xCE, 0x87, 0xFE, 0x35, 0x3E, 0xC4, 0x3C,
	52	0xC7, 0x85, 0x2A, 0x33, 0x00, 0x86, 0xD0, 0x4D, 0x65, 0x4B, 0xF9, 0xE9, 0xC0, 0xBA, 0xAA, 0x77,
	53	0x9E, 0x66, 0xF6, 0x0F, 0x4F, 0x3A, 0xB6, 0xF1, 0x64, 0x9A, 0xE9, 0x25, 0x1A, 0x5F, 0x22, 0xA3,
	54	0xA2, 0xBF, 0x4B, 0x77, 0x3F, 0x34, 0xC9, 0x6E, 0xDB, 0x12, 0x5C, 0x33, 0xA5, 0x8B, 0x6C, 0xB1,
	55	0x74, 0xC8, 0x40, 0x4E, 0x2F, 0xE7, 0x46, 0xAE, 0x99, 0xFC, 0xB0, 0x55, 0x54, 0xDF, 0xA7, 0xA1,
	56	0x0F, 0x5E, 0x49, 0xCF, 0x56, 0x3C, 0x90, 0x2B, 0xAC, 0x65, 0x6E, 0xDB, 0x58, 0x3E, 0xC9, 0x00,
	57	0xAE, 0x53, 0x4D, 0x92, 0xFA, 0x40, 0xB2, 0x6B, 0x65, 0x4B, 0x90, 0x8A, 0x0C, 0xE2, 0xA5, 0x9A,
	58	0xD0, 0x20, 0x29, 0x55, 0xA4, 0x44, 0xAC, 0x51, 0x87, 0x54, 0x53, 0x34, 0x24, 0x4B, 0x81, 0x67,
	59	0x34, 0x4C, 0x5F, 0x31, 0x4E, 0xF2, 0xF1, 0x19, 0x18, 0x1C, 0x34, 0x38, 0xE1, 0x81, 0x17, 0xCF,
	60	0x24, 0xB9, 0x9A, 0xCB, 0x34, 0x51, 0x50, 0x59, 0x44, 0xB1, 0x0B, 0x50, 0x95, 0x6C, 0x48, 0x7E,
	61	0x14, 0xA4, 0xC6, 0xD9, 0xD3, 0xA5, 0xD6, 0xD0, 0xC5, 0x97, 0xF0, 0x45, 0xD0, 0x98, 0x51, 0x91,
	62	0x9F, 0xA3, 0x43, 0x51, 0x05, 0x90, 0xEE, 0xCA, 0x7E, 0x5F, 0x72, 0x53, 0xB1, 0xD3, 0xAF, 0x36,
63	63	0x08, 0x75, 0xB0, 0x9B, 0xE0, 0x0D, 0x43, 0x88, 0xAA, 0x27, 0x44, 0x11
64	64	},
65		{ 0, }, // Region 2, not used
66		{ 0, }, // Region 3, not used
67		{ 0, }, // Region 4, not used
68		{ // Region 5, $13ab42 (drgw2c)
69		0x7F, 0x41, 0xF3, 0x39, 0xA0, 0x11, 0xA1, 0x11, 0xB0, 0xA2, 0x4C, 0x23, 0x13, 0xE9, 0x25, 0x3D,
70		0x0F, 0x72, 0x3A, 0x9D, 0xB5, 0x96, 0xD1, 0xDA, 0x07, 0x29, 0x41, 0x9A, 0xAD, 0x70, 0xBA, 0x46,
71		0x63, 0x2B, 0x7F, 0x3D, 0xBE, 0x40, 0xAD, 0xD4, 0x4C, 0x73, 0x27, 0x58, 0xA7, 0x65, 0xDC, 0xD6,
72		0xFD, 0xDE, 0xB5, 0x6E, 0xD6, 0x6C, 0x75, 0x1A, 0x32, 0x45, 0xD5, 0xE3, 0x6A, 0x14, 0x6D, 0x80,
73		0x84, 0x15, 0xAF, 0xCC, 0x7B, 0x61, 0x51, 0x82, 0x40, 0x53, 0x7F, 0x38, 0xA0, 0xD6, 0x8F, 0x61,
74		0x79, 0x19, 0xE5, 0x99, 0x84, 0xD8, 0x78, 0x27, 0x3F, 0x16, 0x97, 0x78, 0x4F, 0x7B, 0x0C, 0xA6,
75		0x37, 0xDB, 0xC6, 0x0C, 0x24, 0xB4, 0xC7, 0x94, 0x9D, 0x92, 0xD2, 0x3B, 0xD5, 0x11, 0x6F, 0x0A,
76		0xDB, 0x76, 0x66, 0xE7, 0xCD, 0x18, 0x2B, 0x66, 0xD8, 0x41, 0x40, 0x58, 0xA2, 0x01, 0x1E, 0x6D,
77		0x44, 0x75, 0xE7, 0x19, 0x4F, 0xB2, 0xE8, 0xC4, 0x96, 0x77, 0x62, 0x02, 0xC9, 0xDC, 0x59, 0xF3,
78		0x43, 0x8D, 0xC8, 0xFE, 0x9E, 0x2A, 0xBA, 0x32, 0x3B, 0x62, 0xE3, 0x92, 0x6E, 0xC2, 0x08, 0x4D,
79		0x51, 0xCD, 0xF9, 0x3A, 0x3E, 0xC9, 0x50, 0x27, 0x21, 0x25, 0x97, 0xD7, 0x0E, 0xF8, 0x39, 0x38,
80		0xF5, 0x86, 0x94, 0x93, 0xBF, 0xEB, 0x18, 0xA8, 0xFC, 0x24, 0xF5, 0xF9, 0x99, 0x20, 0x3D, 0xCD,
81		0x2C, 0x94, 0x25, 0x79, 0x28, 0x77, 0x8F, 0x2F, 0x10, 0x69, 0x86, 0x30, 0x43, 0x01, 0xD7, 0x9A,
82		0x17, 0xE3, 0x47, 0x37, 0xBD, 0x62, 0x75, 0x42, 0x78, 0xF4, 0x2B, 0x57, 0x4C, 0x0A, 0xDB, 0x53,
	65	{ 0, }, // Region 2, not used
	66	{ 0, }, // Region 3, not used
	67	{ 0, }, // Region 4, not used
	68	{ // Region 5, $13ab42 (drgw2c)
	69	0x7F, 0x41, 0xF3, 0x39, 0xA0, 0x11, 0xA1, 0x11, 0xB0, 0xA2, 0x4C, 0x23, 0x13, 0xE9, 0x25, 0x3D,
	70	0x0F, 0x72, 0x3A, 0x9D, 0xB5, 0x96, 0xD1, 0xDA, 0x07, 0x29, 0x41, 0x9A, 0xAD, 0x70, 0xBA, 0x46,
	71	0x63, 0x2B, 0x7F, 0x3D, 0xBE, 0x40, 0xAD, 0xD4, 0x4C, 0x73, 0x27, 0x58, 0xA7, 0x65, 0xDC, 0xD6,
	72	0xFD, 0xDE, 0xB5, 0x6E, 0xD6, 0x6C, 0x75, 0x1A, 0x32, 0x45, 0xD5, 0xE3, 0x6A, 0x14, 0x6D, 0x80,
	73	0x84, 0x15, 0xAF, 0xCC, 0x7B, 0x61, 0x51, 0x82, 0x40, 0x53, 0x7F, 0x38, 0xA0, 0xD6, 0x8F, 0x61,
	74	0x79, 0x19, 0xE5, 0x99, 0x84, 0xD8, 0x78, 0x27, 0x3F, 0x16, 0x97, 0x78, 0x4F, 0x7B, 0x0C, 0xA6,
	75	0x37, 0xDB, 0xC6, 0x0C, 0x24, 0xB4, 0xC7, 0x94, 0x9D, 0x92, 0xD2, 0x3B, 0xD5, 0x11, 0x6F, 0x0A,
	76	0xDB, 0x76, 0x66, 0xE7, 0xCD, 0x18, 0x2B, 0x66, 0xD8, 0x41, 0x40, 0x58, 0xA2, 0x01, 0x1E, 0x6D,
	77	0x44, 0x75, 0xE7, 0x19, 0x4F, 0xB2, 0xE8, 0xC4, 0x96, 0x77, 0x62, 0x02, 0xC9, 0xDC, 0x59, 0xF3,
	78	0x43, 0x8D, 0xC8, 0xFE, 0x9E, 0x2A, 0xBA, 0x32, 0x3B, 0x62, 0xE3, 0x92, 0x6E, 0xC2, 0x08, 0x4D,
	79	0x51, 0xCD, 0xF9, 0x3A, 0x3E, 0xC9, 0x50, 0x27, 0x21, 0x25, 0x97, 0xD7, 0x0E, 0xF8, 0x39, 0x38,
	80	0xF5, 0x86, 0x94, 0x93, 0xBF, 0xEB, 0x18, 0xA8, 0xFC, 0x24, 0xF5, 0xF9, 0x99, 0x20, 0x3D, 0xCD,
	81	0x2C, 0x94, 0x25, 0x79, 0x28, 0x77, 0x8F, 0x2F, 0x10, 0x69, 0x86, 0x30, 0x43, 0x01, 0xD7, 0x9A,
	82	0x17, 0xE3, 0x47, 0x37, 0xBD, 0x62, 0x75, 0x42, 0x78, 0xF4, 0x2B, 0x57, 0x4C, 0x0A, 0xDB, 0x53,
83	83	0x4D, 0xA1, 0x0A, 0xD6, 0x3A, 0x16, 0x15, 0xAA, 0x2C, 0x6C, 0x39, 0x42
84	84	},
85		{ // Region 6, $13ab42 (drgw2), $13ab2e (dw2v100x)
86		0x12, 0x09, 0xF3, 0x29, 0xA0, 0x11, 0xA0, 0x11, 0xB0, 0xD5, 0x66, 0xA1, 0x28, 0x4A, 0x21, 0xC0,
87		0xD3, 0x9B, 0x86, 0x80, 0x57, 0x6F, 0x41, 0xC2, 0xE4, 0x2F, 0x0B, 0x91, 0xBD, 0x3A, 0x7A, 0xBA,
88		0x00, 0xE5, 0x35, 0x02, 0x74, 0x7D, 0x8B, 0x21, 0x57, 0x10, 0x0F, 0xAE, 0x44, 0xBB, 0xE2, 0x37,
89		0x18, 0x7B, 0x52, 0x3D, 0x8C, 0x59, 0x9E, 0x20, 0x1F, 0x0A, 0xCC, 0x1C, 0x8E, 0x6A, 0xD7, 0x95,
90		0x2B, 0x34, 0xB0, 0x82, 0x6D, 0xFD, 0x25, 0x33, 0xAA, 0x3B, 0x2B, 0x70, 0x15, 0x87, 0x31, 0x5D,
91		0xBB, 0x29, 0x19, 0x95, 0xD5, 0x8E, 0x24, 0x28, 0x5E, 0xD0, 0x20, 0x83, 0x46, 0x4A, 0x21, 0x70,
92		0x5B, 0xCD, 0xAE, 0x7B, 0x61, 0xA1, 0xFA, 0xF4, 0x2B, 0x84, 0x15, 0x6E, 0x36, 0x5D, 0x1B, 0x24,
93		0x0F, 0x09, 0x3A, 0x61, 0x38, 0x0F, 0x18, 0x35, 0x11, 0x38, 0xB4, 0xBD, 0xEE, 0xF7, 0xEC, 0x0F,
94		0x1D, 0xB7, 0x48, 0x01, 0xAA, 0x09, 0x8F, 0x61, 0xB5, 0x0F, 0x1D, 0x26, 0x39, 0x2E, 0x8C, 0xD6,
95		0x26, 0x5C, 0x3D, 0x23, 0x63, 0xE9, 0x6B, 0x97, 0xB4, 0x9F, 0x7B, 0xB6, 0xBA, 0xA0, 0x7C, 0xC6,
96		0x25, 0xA1, 0x73, 0x36, 0x67, 0x7F, 0x74, 0x1E, 0x1D, 0xDA, 0x70, 0xBF, 0xA5, 0x63, 0x35, 0x39,
97		0x24, 0x8C, 0x9F, 0x85, 0x16, 0xD8, 0x50, 0x95, 0x71, 0xC0, 0xF6, 0x1E, 0x6D, 0x80, 0xED, 0x15,
98		0xEB, 0x63, 0xE9, 0x1B, 0xF6, 0x78, 0x31, 0xC6, 0x5C, 0xDD, 0x19, 0xBD, 0xDF, 0xA7, 0xEC, 0x50,
99		0x22, 0xAD, 0xBB, 0xF6, 0xEB, 0xD6, 0xA3, 0x20, 0xC9, 0xE6, 0x9F, 0xCB, 0xF2, 0x97, 0xB9, 0x54,
	85	{ // Region 6, $13ab42 (drgw2), $13ab2e (dw2v100x)
	86	0x12, 0x09, 0xF3, 0x29, 0xA0, 0x11, 0xA0, 0x11, 0xB0, 0xD5, 0x66, 0xA1, 0x28, 0x4A, 0x21, 0xC0,
	87	0xD3, 0x9B, 0x86, 0x80, 0x57, 0x6F, 0x41, 0xC2, 0xE4, 0x2F, 0x0B, 0x91, 0xBD, 0x3A, 0x7A, 0xBA,
	88	0x00, 0xE5, 0x35, 0x02, 0x74, 0x7D, 0x8B, 0x21, 0x57, 0x10, 0x0F, 0xAE, 0x44, 0xBB, 0xE2, 0x37,
	89	0x18, 0x7B, 0x52, 0x3D, 0x8C, 0x59, 0x9E, 0x20, 0x1F, 0x0A, 0xCC, 0x1C, 0x8E, 0x6A, 0xD7, 0x95,
	90	0x2B, 0x34, 0xB0, 0x82, 0x6D, 0xFD, 0x25, 0x33, 0xAA, 0x3B, 0x2B, 0x70, 0x15, 0x87, 0x31, 0x5D,
	91	0xBB, 0x29, 0x19, 0x95, 0xD5, 0x8E, 0x24, 0x28, 0x5E, 0xD0, 0x20, 0x83, 0x46, 0x4A, 0x21, 0x70,
	92	0x5B, 0xCD, 0xAE, 0x7B, 0x61, 0xA1, 0xFA, 0xF4, 0x2B, 0x84, 0x15, 0x6E, 0x36, 0x5D, 0x1B, 0x24,
	93	0x0F, 0x09, 0x3A, 0x61, 0x38, 0x0F, 0x18, 0x35, 0x11, 0x38, 0xB4, 0xBD, 0xEE, 0xF7, 0xEC, 0x0F,
	94	0x1D, 0xB7, 0x48, 0x01, 0xAA, 0x09, 0x8F, 0x61, 0xB5, 0x0F, 0x1D, 0x26, 0x39, 0x2E, 0x8C, 0xD6,
	95	0x26, 0x5C, 0x3D, 0x23, 0x63, 0xE9, 0x6B, 0x97, 0xB4, 0x9F, 0x7B, 0xB6, 0xBA, 0xA0, 0x7C, 0xC6,
	96	0x25, 0xA1, 0x73, 0x36, 0x67, 0x7F, 0x74, 0x1E, 0x1D, 0xDA, 0x70, 0xBF, 0xA5, 0x63, 0x35, 0x39,
	97	0x24, 0x8C, 0x9F, 0x85, 0x16, 0xD8, 0x50, 0x95, 0x71, 0xC0, 0xF6, 0x1E, 0x6D, 0x80, 0xED, 0x15,
	98	0xEB, 0x63, 0xE9, 0x1B, 0xF6, 0x78, 0x31, 0xC6, 0x5C, 0xDD, 0x19, 0xBD, 0xDF, 0xA7, 0xEC, 0x50,
	99	0x22, 0xAD, 0xBB, 0xF6, 0xEB, 0xD6, 0xA3, 0x20, 0xC9, 0xE6, 0x9F, 0xCB, 0xF2, 0x97, 0xB9, 0x54,
100	100	0x12, 0x66, 0xA6, 0xBE, 0x4A, 0x12, 0x43, 0xEC, 0x00, 0xEA, 0x49, 0x02
101	101	},
102		{ 0, } // Region 7, not used
	102	{ 0, } // Region 7, not used
103	103	};
104	104
105	105	void pgm_012_025_state::drgw2_protection_calculate_hold(int y, int z)
r23623	r23624
142	142	{
143	143	switch (m_drgw2_cmd)
144	144	{
145		case 0x05:
	145	case 0x05:
146	146	{
147	147	switch (m_drgw2_ptr)
148	148	{
r23623	r23624
169	169	drgw2_protection_calculate_hilo();
170	170	return 0;
171	171
172		// case 0x13: // Read to $80eeb8
173		// case 0x1f: // Read to $80eeb8
174		// case 0xf4: // Read to $80eeb8
175		// case 0xf6: // Read to $80eeb8
176		// case 0xf8: // Read to $80eeb8
177		// return 0;
178
179		// default:
180		// logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), m_drgw2_cmd);
	172	// case 0x13: // Read to $80eeb8
	173	// case 0x1f: // Read to $80eeb8
	174	// case 0xf4: // Read to $80eeb8
	175	// case 0xf6: // Read to $80eeb8
	176	// case 0xf8: // Read to $80eeb8
	177	// return 0;
	178
	179	// default:
	180	// logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), m_drgw2_cmd);
181	181	}
182	182
183	183	return 0;
r23623	r23624
205	205	drgw2_protection_calculate_hold(m_drgw2_cmd & 0x0f, data & 0xff);
206	206	break;
207	207
208		// case 0x08: // Used only on init..
209		// case 0x09:
210		// case 0x0a:
211		// case 0x0b:
212		// case 0x0c:
213		// break;
	208	// case 0x08: // Used only on init..
	209	// case 0x09:
	210	// case 0x0a:
	211	// case 0x0b:
	212	// case 0x0c:
	213	// break;
214	214
215		// case 0x15: // ????
216		// case 0x17:
217		// case 0xf2:
218		// break;
	215	// case 0x15: // ????
	216	// case 0x17:
	217	// case 0xf2:
	218	// break;
219	219
220		// default:
221		// logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", space.device().safe_pc(), m_drgw2_cmd, data);
	220	// default:
	221	// logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", space.device().safe_pc(), m_drgw2_cmd, data);
222	222	}
223	223	}
224	224
r23623	r23624
250	250	static ADDRESS_MAP_START( drgw2_mem, AS_PROGRAM, 16, pgm_012_025_state )
251	251	AM_IMPORT_FROM(pgm_mem)
252	252	AM_RANGE(0x100000, 0x1fffff) AM_ROMBANK("bank1") /* Game ROM */
253		AM_RANGE(0xd00000, 0xd00fff) AM_NOP // Written, but never read back? Related to the protection device?
	253	AM_RANGE(0xd00000, 0xd00fff) AM_NOP // Written, but never read back? Related to the protection device?
254	254	AM_RANGE(0xd80000, 0xd80003) AM_READWRITE(drgw2_d80000_protection_r, drgw2_d80000_protection_w)
255	255	ADDRESS_MAP_END
256	256

trunk/src/mame/machine/naomig1.c
r23623	r23624
25	25
26	26	naomi_g1_device::naomi_g1_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t *owner, UINT32 clock)
27	27	: device_t(mconfig, type, name, tag, owner, clock),
28		irq_cb(*this)
	28	irq_cb(*this)
29	29	{
30	30	}
31	31

trunk/src/mame/machine/nmk112.c
r23623	r23624
30	30
31	31	void nmk112_device::device_config_complete()
32	32	{
33
34	33	}
35	34
36	35	//-------------------------------------------------
r23623	r23624
40	39	void nmk112_device::device_start()
41	40	{
42	41	const nmk112_interface intf = (const nmk112_interface )static_config();
43
	42
44	43	if (intf->rgn0 == NULL)
45	44	{
46	45	m_rom0 = NULL;

trunk/src/mame/machine/nmk112.h
r23623	r23624
32	32	virtual void device_config_complete();
33	33	virtual void device_start();
34	34	virtual void device_reset();
35
	35
36	36	private:
37	37	void do_bankswitch( int offset, int data );
38	38	void postload_bankswitch();
39
	39
40	40	// internal state
41
	41
42	42	/* which chips have their sample address table divided into pages */
43	43	UINT8 m_page_mask;
44	44

trunk/src/mame/machine/mpeg573.c
r23623	r23624
42	42	MACHINE_CONFIG_END
43	43
44	44	mpeg573_device::mpeg573_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
45		: device_t(mconfig, MPEG573, "Konami 573 digital audio board", tag, owner, clock, "mpeg573", __FILE__),
	45	: device_t(mconfig, MPEG573, "Konami 573 digital audio board", tag, owner, clock, "mpeg573", __FILE__),
46	46	mas3507d(*this, "mpeg"),
47	47	digital_id(*this, "digital_id"),
48		output_cb(*this)
	48	output_cb(*this)
49	49	{
50	50	}
51	51
r23623	r23624
156	156	WRITE16_MEMBER(mpeg573_device::mpeg_ctrl_w)
157	157	{
158	158	logerror("FPGA MPEG control %c%c%c\n",
159		data & 0x8000 ? '#' : '.',
160		data & 0x4000 ? '#' : '.',
161		data & 0x2000 ? '#' : '.');
	159	data & 0x8000 ? '#' : '.',
	160	data & 0x4000 ? '#' : '.',
	161	data & 0x2000 ? '#' : '.');
162	162	}
163	163
164	164	WRITE16_MEMBER(mpeg573_device::ram_write_adr_high_w)

trunk/src/mame/machine/mpeg573.h
r23623	r23624
4	4	#include "sound/mas3507d.h"
5	5	#include "machine/ds2401.h"
6	6
7		#define MCFG_MPEG573_ADD(_tag, _clock, _output_cb ) \
	7	#define MCFG_MPEG573_ADD(_tag, _clock, _output_cb ) \
8	8	MCFG_DEVICE_ADD(_tag, MPEG573, _clock) \
9	9	downcast<mpeg573_device *>(device)->set_output_cb(DEVCB2_##_output_cb);
10	10
11		#define MCFG_MPEG573_OUTPUT_CALLBACK( _output_cb ) \
	11	#define MCFG_MPEG573_OUTPUT_CALLBACK( _output_cb ) \
12	12	downcast<mpeg573_device *>(device)->set_output_cb(DEVCB2_##_output_cb);
13	13
14	14	class mpeg573_device : public device_t

trunk/src/mame/machine/mathbox.h
r23623	r23624
11	11
12	12	#define MCFG_MATHBOX_ADD(_tag) \
13	13	MCFG_DEVICE_ADD(_tag, MATHBOX, 0)
14
15	14
	15
16	16	/* ----- device interface ----- */
17	17	class mathbox_device : public device_t
18	18	{
19	19	public:
20	20	mathbox_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
21
	21
22	22	DECLARE_WRITE8_MEMBER( go_w );
23	23	DECLARE_READ8_MEMBER( status_r );
24	24	DECLARE_READ8_MEMBER( lo_r );

trunk/src/mame/machine/midikbd.h
r23623	r23624
8	8	devcb = &midi_keyboard_device::static_set_tx_callback(*device, DEVCB2_##_devcb);
9	9
10	10	class midi_keyboard_device : public device_t,
11		public device_serial_interface
	11	public device_serial_interface
12	12	{
13	13	public:
14	14	midi_keyboard_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);

trunk/src/mame/machine/taitoio.c
r23623	r23624
71	71	const tc0220ioc_interface intf = reinterpret_cast<const tc0220ioc_interface >(static_config());
72	72	if (intf != NULL)
73	73	static_cast<tc0220ioc_interface >(this) = *intf;
74
	74
75	75	// or initialize to defaults if none provided
76	76	else
77	77	{
r23623	r23624
216	216	const tc0510nio_interface intf = reinterpret_cast<const tc0510nio_interface >(static_config());
217	217	if (intf != NULL)
218	218	static_cast<tc0510nio_interface >(this) = *intf;
219
	219
220	220	// or initialize to defaults if none provided
221	221	else
222	222	{
r23623	r23624
362	362	const tc0640fio_interface intf = reinterpret_cast<const tc0640fio_interface >(static_config());
363	363	if (intf != NULL)
364	364	static_cast<tc0640fio_interface >(this) = *intf;
365
	365
366	366	// or initialize to defaults if none provided
367	367	else
368	368	{

trunk/src/mame/machine/taitoio.h
r23623	r23624
48	48	public:
49	49	tc0220ioc_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
50	50	~tc0220ioc_device() {}
51
	51
52	52	DECLARE_READ8_MEMBER( read );
53	53	DECLARE_WRITE8_MEMBER( write );
54	54	DECLARE_READ8_MEMBER( port_r );
55	55	DECLARE_WRITE8_MEMBER( port_w );
56	56	DECLARE_READ8_MEMBER( portreg_r );
57	57	DECLARE_WRITE8_MEMBER( portreg_w );
58
	58
59	59	protected:
60	60	// device-level overrides
61	61	virtual void device_config_complete();
r23623	r23624
115	115	public:
116	116	tc0640fio_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
117	117	~tc0640fio_device() {}
118
	118
119	119	DECLARE_READ8_MEMBER( read );
120	120	DECLARE_WRITE8_MEMBER( write );
121	121	DECLARE_READ16_MEMBER( halfword_r );
r23623	r23624
159	159	MCFG_DEVICE_ADD(_tag, TC0640FIO, 0) \
160	160	MCFG_DEVICE_CONFIG(_interface)
161	161
162
	162
163	163	#endif /* __TAITOIO_H__ */

trunk/src/mame/includes/dkong.h
r23623	r23624
104	104	device_t m_dev_vp2; / virtual port 2 */
105	105	device_t *m_dev_6h;
106	106	optional_device<discrete_device> m_discrete;
107
	107
108	108	/* memory pointers */
109	109	required_shared_ptr<UINT8> m_video_ram;
110	110	required_shared_ptr<UINT8> m_sprite_ram;
111
	111
112	112	/* machine states */
113	113	UINT8 m_hardware_type;
114	114	UINT8 m_nmi_mask;

trunk/src/mame/includes/gaplus.h
r23623	r23624
16	16	{
17	17	TIMER_NAMCOIO_RUN
18	18	};
19
	19
20	20	enum
21	21	{
22	22	GAME_GAPLUS = 0,
23	23	GAME_GAPLUSD,
24	24	GAME_GALAGA3
25	25	};
26
	26
27	27	gaplus_state(const machine_config &mconfig, device_type type, const char *tag)
28	28	: driver_device(mconfig, type, tag),
29	29	m_maincpu(*this, "maincpu"),
r23623	r23624
33	33	m_customio_3(*this,"customio_3"),
34	34	m_videoram(*this,"videoram"),
35	35	m_spriteram(*this,"spriteram") { }
36
	36
37	37	required_device<cpu_device> m_maincpu;
38	38	required_device<cpu_device> m_subcpu;
39	39	required_device<cpu_device> m_subcpu2;
r23623	r23624
45	45	namco56xx_device *m_namco56xx;
46	46
47	47	int m_type;
48
	48
49	49	tilemap_t *m_bg_tilemap;
50	50	UINT8 m_starfield_control[4];
51	51	int m_total_stars;
r23623	r23624
86	86	void starfield_init();
87	87	void starfield_render(bitmap_ind16 &bitmap);
88	88	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect );
89
	89
90	90	protected:
91	91	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
92	92	};

trunk/src/mame/includes/vertigo.h
r23623	r23624
89	89	vertigo_state(const machine_config &mconfig, device_type type, const char *tag)
90	90	: driver_device(mconfig, type, tag),
91	91	m_maincpu(*this, "maincpu"),
92		m_audiocpu(*this, "audiocpu"),
	92	m_audiocpu(*this, "audiocpu"),
93	93	m_pit(*this, "pit8254"),
94	94	m_vectorram(*this, "vectorram")
95	95	{ }

trunk/src/mame/includes/snowbros.h
r23623	r23624
25	25	int m_sb3_music;
26	26	UINT8 m_semicom_prot_offset;
27	27	UINT8 *m_spriteram;
28
	28
29	29	DECLARE_WRITE16_MEMBER(snowbros_flipscreen_w);
30	30	DECLARE_WRITE16_MEMBER(snowbros_irq4_ack_w);
31	31	DECLARE_WRITE16_MEMBER(snowbros_irq3_ack_w);

trunk/src/mame/includes/seibuspi.h
r23623	r23624
1	1	/***************************************************************************
2	2
3	3	Seibu SPI hardware
4
	4
5	5	***************************************************************************/
6	6
7	7	#include "machine/intelfsh.h"

trunk/src/mame/includes/powerins.h
r23623	r23624
14	14	m_spriteram(*this, "spriteram")
15	15	{ }
16	16
17
	17
18	18	required_device<cpu_device> m_maincpu;
19	19	optional_device<cpu_device> m_soundcpu;
20	20	optional_device<nmk112_device> m_nmk112;

trunk/src/mame/includes/taito_b.h
r23623	r23624
28	28	m_tc0180vcu(*this, "tc0180vcu"),
29	29	m_tc0640fio(*this, "tc0640fio"),
30	30	m_tc0220ioc(*this, "tc0220ioc"),
31		m_tc0510nio(*this, "tc0510nio") { }
	31	m_tc0510nio(*this, "tc0510nio") { }
32	32
33	33	/* memory pointers */
34	34	required_shared_ptr<UINT16> m_spriteram;

trunk/src/mame/includes/vsnes.h
r23623	r23624
11	11
12	12	required_device<cpu_device> m_maincpu;
13	13	optional_device<cpu_device> m_subcpu;
14
	14
15	15	required_shared_ptr<UINT8> m_work_ram;
16	16	optional_shared_ptr<UINT8> m_work_ram_1;
17	17	int m_coin;

trunk/src/mame/includes/flower.h
r23623	r23624
78	78	{
79	79	TIMER_CLOCK_EFFECT
80	80	};
81
	81
82	82	DECLARE_WRITE8_MEMBER( sound1_w );
83	83	DECLARE_WRITE8_MEMBER( sound2_w );
84	84
r23623	r23624
87	87	virtual void device_config_complete();
88	88	virtual void device_start();
89	89	virtual void device_reset();
90
	90
91	91	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
92	92
93	93	// sound stream update overrides
r23623	r23624
96	96	private:
97	97	void make_mixer_table(int voices, int gain);
98	98	void show_soundregs();
99
	99
100	100	// internal state
101	101	emu_timer *m_effect_timer;
102	102

trunk/src/mame/includes/mappy.h
r23623	r23624
26	26	GAME_DIGDUG2,
27	27	GAME_MOTOS
28	28	};
29
	29
30	30	mappy_state(const machine_config &mconfig, device_type type, const char *tag)
31	31	: driver_device(mconfig, type, tag),
32	32	m_videoram(*this, "videoram"),
r23623	r23624
38	38
39	39	required_shared_ptr<UINT8> m_videoram;
40	40	required_shared_ptr<UINT8> m_spriteram;
41
	41
42	42	required_device<cpu_device> m_maincpu;
43	43	required_device<cpu_device> m_subcpu;
44	44	optional_device<cpu_device> m_subcpu2;
r23623	r23624
49	49	namco58xx_device *m_namco58xx_1;
50	50	namco58xx_device *m_namco58xx_2;
51	51	namco59xx_device *m_namco59xx;
52
	52
53	53	// per-game variable to distinguish between the various IO chip config
54	54	int m_type;
55	55

trunk/src/mame/includes/galaxold.h
r23623	r23624
129	129	DECLARE_WRITE8_MEMBER(rockclim_scroll_w);
130	130	DECLARE_WRITE8_MEMBER(guttang_rombank_w);
131	131
132
133	132
	133
134	134	DECLARE_READ8_MEMBER(rockclim_videoram_r);
135	135	DECLARE_WRITE8_MEMBER(dambustr_bg_split_line_w);
136	136	DECLARE_WRITE8_MEMBER(dambustr_bg_color_w);

trunk/src/mame/includes/taitoair.h
r23623	r23624
44	44	required_shared_ptr<UINT16> m_paletteram;
45	45	required_shared_ptr<UINT16> m_gradram;
46	46	required_shared_ptr<UINT16> m_backregs;
47
	47
48	48	/* video-related */
49	49	taitoair_poly m_q;
50	50

trunk/src/mame/includes/speedbal.h
r23623	r23624
16	16
17	17	bool m_leds_start;
18	18	UINT32 m_leds_shiftreg;
19
	19
20	20	tilemap_t *m_bg_tilemap;
21	21	tilemap_t *m_fg_tilemap;
22	22

trunk/src/mame/includes/toypop.h
r23623	r23624
25	25	required_shared_ptr<UINT8> m_spriteram;
26	26	required_shared_ptr<UINT8> m_m68000_sharedram;
27	27	required_shared_ptr<UINT16> m_bg_image;
28
	28
29	29	required_device<cpu_device> m_maincpu;
30	30	required_device<cpu_device> m_audiocpu;
31	31	required_device<cpu_device> m_subcpu;
32	32	required_device<namco58xx_device> m_namco58xx;
33	33	required_device<namco56xx_device> m_namco56xx_1;
34	34	required_device<namco56xx_device> m_namco56xx_2;
35
	35
36	36	tilemap_t *m_bg_tilemap;
37	37
38	38	int m_bitmapflip;

trunk/src/mame/includes/warpwarp.h
r23623	r23624
8	8	m_maincpu(*this, "maincpu"),
9	9	m_warpwarp_sound(*this, "warpwarp_custom"),
10	10	m_geebee_sound(*this, "geebee_custom"),
11		m_geebee_videoram(*this, "geebee_videoram"),
	11	m_geebee_videoram(*this, "geebee_videoram"),
12	12	m_videoram(*this, "videoram")
13	13	{ }
14
	14
15	15	required_device<cpu_device> m_maincpu;
16	16	optional_device<warpwarp_sound_device> m_warpwarp_sound;
17	17	optional_device<geebee_sound_device> m_geebee_sound;

trunk/src/mame/includes/nmk16.h
r23623	r23624
192	192	void decode_tdragonb();
193	193	void decode_ssmissin();
194	194	DECLARE_WRITE_LINE_MEMBER(ym2203_irqhandler);
195
	195
196	196	};

trunk/src/mame/includes/exidy440.h
r23623	r23624
1	1	/*************************************************************************
2	2
3		Exidy 440 hardware
	3	Exidy 440 hardware
4	4
5	5	*************************************************************************/
6	6

trunk/src/mame/includes/bzone.h
r23623	r23624
21	21	m_discrete(*this, "discrete"),
22	22	m_redbaronsound(*this, "custom")
23	23	{ }
24
	24
25	25	required_device<cpu_device> m_maincpu;
26	26	required_device<mathbox_device> m_mathbox;
27	27	optional_device<discrete_device> m_discrete;
r23623	r23624
45	45
46	46	/----------- defined in audio/bzone.c -----------/
47	47	MACHINE_CONFIG_EXTERN( bzone_audio );
48
49
50
51

trunk/src/mame/includes/pgm.h
r23623	r23624
400	400
401	401	const UINT8 (*m_drgw2_source_data)[0xec];
402	402
403		UINT16 m_drgw2_prot_hold;
404		UINT16 m_drgw2_prot_hilo;
405		UINT16 m_drgw2_prot_hilo_select;
	403	UINT16 m_drgw2_prot_hold;
	404	UINT16 m_drgw2_prot_hilo;
	405	UINT16 m_drgw2_prot_hilo_select;
406	406	int m_drgw2_cmd;
407	407	int m_drgw2_ptr;
408	408

trunk/src/mame/includes/playch10.h
r23623	r23624
21	21
22	22	required_device<cpu_device> m_maincpu;
23	23	optional_device<rp5h01_device> m_rp5h01;
24
	24
25	25	required_shared_ptr<UINT8> m_ram_8w;
26	26	required_shared_ptr<UINT8> m_videoram;
27	27	required_shared_ptr<UINT8> m_timedata;

trunk/src/mame/video/kan_pand.c
r23623	r23624
69	69	const kaneko_pandora_interface intf = reinterpret_cast<const kaneko_pandora_interface >(static_config());
70	70	if (intf != NULL)
71	71	static_cast<kaneko_pandora_interface >(this) = *intf;
72
	72
73	73	// or initialize to defaults if none provided
74	74	else
75	75	{
r23623	r23624
305	305	}
306	306
307	307	return m_spriteram[offset] \| (m_spriteram[offset] << 8);
308		}
		No newline at end of file
	308	}

trunk/src/mame/video/kan_pand.h
r23623	r23624
29	29	~kaneko_pandora_device() {}
30	30
31	31	DECLARE_WRITE8_MEMBER ( spriteram_w );
32		DECLARE_READ8_MEMBER( spriteram_r );
	32	DECLARE_READ8_MEMBER( spriteram_r );
33	33	DECLARE_WRITE16_MEMBER( spriteram_LSB_w );
34	34	DECLARE_READ16_MEMBER( spriteram_LSB_r );
35	35	void update( bitmap_ind16 &bitmap, const rectangle &cliprect );
36	36	void set_clear_bitmap( int clear );
37	37	void eof();
38	38	void set_bg_pen( int pen );
39
	39
40	40	protected:
41	41	// device-level overrides
42	42	virtual void device_config_complete();
43	43	virtual void device_start();
44	44	virtual void device_reset();
45
	45
46	46	void draw( bitmap_ind16 &bitmap, const rectangle &cliprect );
47	47
48	48	private:
49	49	// internal state
50		screen_device *m_screen;
51		UINT8 * m_spriteram;
52		bitmap_ind16 m_sprites_bitmap; / bitmap to render sprites to, Pandora seems to be frame'buffered' */
53		int m_clear_bitmap;
54		int m_bg_pen; // might work some other way..
	50	screen_device *m_screen;
	51	UINT8 * m_spriteram;
	52	bitmap_ind16 m_sprites_bitmap; / bitmap to render sprites to, Pandora seems to be frame'buffered' */
	53	int m_clear_bitmap;
	54	int m_bg_pen; // might work some other way..
55	55	};
56	56
57	57	extern const device_type KANEKO_PANDORA;

trunk/src/mame/video/powervr2.c
r23623	r23624
1665	1665	}
1666	1666
1667	1667	void powervr2_device::render_span(bitmap_rgb32 &bitmap, texinfo *ti,
1668		float y0, float y1,
1669		float xl, float xr,
1670		float ul, float ur,
1671		float vl, float vr,
1672		float wl, float wr,
1673		float dxldy, float dxrdy,
1674		float duldy, float durdy,
1675		float dvldy, float dvrdy,
1676		float dwldy, float dwrdy)
	1668	float y0, float y1,
	1669	float xl, float xr,
	1670	float ul, float ur,
	1671	float vl, float vr,
	1672	float wl, float wr,
	1673	float dxldy, float dxrdy,
	1674	float duldy, float durdy,
	1675	float dvldy, float dvrdy,
	1676	float dwldy, float dwrdy)
1677	1677	{
1678	1678	float dy;
1679	1679	int yy0, yy1;
r23623	r23624
2404	2404	}
2405	2405
2406	2406	TIMER_CALLBACK_MEMBER(powervr2_device::endofrender_tsp)
2407		{
	2407	{
2408	2408	irq_cb(EOR_TSP_IRQ); // TSP end of render
2409	2409
2410	2410	endofrender_timer_tsp->adjust(attotime::never);
r23623	r23624
2624	2624
2625	2625	powervr2_device::powervr2_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
2626	2626	: device_t(mconfig, POWERVR2, "PowerVR 2", tag, owner, clock),
2627		irq_cb(*this)
	2627	irq_cb(*this)
2628	2628	{
2629	2629	}
2630	2630

trunk/src/mame/video/powervr2.h
r23623	r23624
1	1	#ifndef __POWERVR2_H__
2	2	#define __POWERVR2_H__
3	3
4		#define MCFG_POWERVR2_ADD(_tag, _irq_cb) \
	4	#define MCFG_POWERVR2_ADD(_tag, _irq_cb) \
5	5	MCFG_DEVICE_ADD(_tag, POWERVR2, 0) \
6	6	downcast<powervr2_device *>(device)->set_irq_cb(DEVCB2_ ## _irq_cb);
7	7
r23623	r23624
107	107
108	108	UINT64 *dc_texture_ram;
109	109	UINT64 *dc_framebuffer_ram;
110
	110
111	111	UINT64 *pvr2_texture_ram;
112	112	UINT64 *pvr2_framebuffer_ram;
113	113	UINT64 *elan_ram;
r23623	r23624
277	277
278	278	void render_hline(bitmap_rgb32 &bitmap, texinfo *ti, int y, float xl, float xr, float ul, float ur, float vl, float vr, float wl, float wr);
279	279	void render_span(bitmap_rgb32 &bitmap, texinfo *ti,
280		float y0, float y1,
281		float xl, float xr,
282		float ul, float ur,
283		float vl, float vr,
284		float wl, float wr,
285		float dxldy, float dxrdy,
286		float duldy, float durdy,
287		float dvldy, float dvrdy,
288		float dwldy, float dwrdy);
	280	float y0, float y1,
	281	float xl, float xr,
	282	float ul, float ur,
	283	float vl, float vr,
	284	float wl, float wr,
	285	float dxldy, float dxrdy,
	286	float duldy, float durdy,
	287	float dvldy, float dvrdy,
	288	float dwldy, float dwrdy);
289	289	void sort_vertices(const vert v, int i0, int i1, int i2);
290	290	void render_tri_sorted(bitmap_rgb32 &bitmap, texinfo ti, const vert v0, const vert v1, const vert v2);
291	291	void render_tri(bitmap_rgb32 &bitmap, texinfo ti, const vert v);
r23623	r23624
296	296	static UINT32 dilate1(UINT32 value,int bits);
297	297	void computedilated();
298	298	void pvr_build_parameterconfig();
299		void process_ta_fifo();
	299	void process_ta_fifo();
300	300	void debug_paletteram();
301	301	};
302	302

trunk/src/mame/video/seibuspi.c
r23623	r23624
1	1	/***************************************************************************
2	2
3	3	Seibu SPI hardware
4
	4
5	5	Functions to emulate the video hardware
6	6
7	7	***************************************************************************/

trunk/hash/ep64_cart.xml
r23623	r23624
1	1	<?xml version="1.0"?>
2	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3	3	<softwarelist name="ep64_cart" description="Enterprise Sixty Four cartridges">
4
	4
5	5	<software name="basic">
6	6	<description>BASIC (v2.1)</description>
7	7	<year>198?</year>

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