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r23584 Monday 10th June, 2013 at 07:35:41 UTC by Fabio Priuli
(MESS) snes: backing up another skeleton add-on. it does nothing yet. nw.
[src/mess]mess.mak
[src/mess/drivers]snes.c
[src/mess/machine]sns_sgb.c* sns_sgb.h*

trunk/src/mess/mess.mak
r23583r23584
16781678   $(MESS_MACHINE)/sns_sa1.o   \
16791679   $(MESS_MACHINE)/sns_sdd1.o  \
16801680   $(MESS_MACHINE)/sns_sfx.o   \
1681   $(MESS_MACHINE)/sns_sgb.o   \
16811682   $(MESS_MACHINE)/sns_spc7110.o \
16821683   $(MESS_MACHINE)/sns_sufami.o\
16831684   $(MESS_MACHINE)/sns_upd.o   \
trunk/src/mess/drivers/snes.c
r23583r23584
4040#include "machine/sns_sa1.h"
4141#include "machine/sns_sdd1.h"
4242#include "machine/sns_sfx.h"
43#include "machine/sns_sgb.h"
4344#include "machine/sns_spc7110.h"
4445#include "machine/sns_sufami.h"
4546#include "machine/sns_upd.h"
r23583r23584
8788   DECLARE_WRITE8_MEMBER( snesbsx_hi_w );
8889   DECLARE_READ8_MEMBER( snesbsx_lo_r );
8990   DECLARE_WRITE8_MEMBER( snesbsx_lo_w );
91   DECLARE_READ8_MEMBER( snessgb_hi_r );
92   DECLARE_READ8_MEMBER( snessgb_lo_r );
93   DECLARE_WRITE8_MEMBER( snessgb_hi_w );
94   DECLARE_WRITE8_MEMBER( snessgb_lo_w );
9095   DECLARE_READ8_MEMBER( pfest94_hi_r );
9196   DECLARE_WRITE8_MEMBER( pfest94_hi_w );
9297   DECLARE_READ8_MEMBER( pfest94_lo_r );
r23583r23584
875880
876881
877882//---------------------------------------------------------------------------------
883// LoROM + SuperGB
884//---------------------------------------------------------------------------------
885
886READ8_MEMBER( snes_console_state::snessgb_hi_r )
887{
888   UINT16 address = offset & 0xffff;
889   
890   if (offset < 0x400000)
891   {
892      if (address < 0x2000)
893         return space.read_byte(0x7e0000 + address);
894      else if (address < 0x6000)
895         return snes_r_io(space, address);
896      else if (address < 0x8000)
897         return m_cartslot->chip_read(space, offset);
898      else
899         return m_cartslot->read_h(space, offset);
900   }
901   else if (address >= 0x8000)
902      return m_cartslot->read_h(space, offset);
903
904   return snes_open_bus_r(space, 0);
905}
906
907READ8_MEMBER( snes_console_state::snessgb_lo_r )
908{
909   return snessgb_hi_r(space, offset, 0xff);
910}
911
912WRITE8_MEMBER( snes_console_state::snessgb_hi_w )
913{
914   UINT16 address = offset & 0xffff;
915   if (offset < 0x400000)
916   {
917      if (address < 0x2000)
918         space.write_byte(0x7e0000 + address, data);
919      else if (address < 0x6000)
920         snes_w_io(space, address, data);
921      else if (address < 0x8000)
922         m_cartslot->chip_write(space, offset, data);
923   }
924}
925
926WRITE8_MEMBER( snes_console_state::snessgb_lo_w )
927{
928   snessgb_hi_w(space, offset, data, 0xff);
929}
930
931//---------------------------------------------------------------------------------
878932// Powerfest '94 event cart
879933//---------------------------------------------------------------------------------
880934
r23583r23584
15791633   SLOT_INTERFACE_INTERNAL("lorom_sa1",     SNS_LOROM_SA1) // Cart + SA1 - unsupported
15801634   SLOT_INTERFACE_INTERNAL("lorom_sdd1",    SNS_LOROM_SDD1)
15811635   SLOT_INTERFACE_INTERNAL("lorom_sfx",     SNS_LOROM_SUPERFX)
1582   SLOT_INTERFACE_INTERNAL("lorom_sgb",     SNS_LOROM) // SuperGB base cart - unsupported
1636   SLOT_INTERFACE_INTERNAL("lorom_sgb",     SNS_LOROM_SUPERGB) // SuperGB base cart - unsupported
15831637   SLOT_INTERFACE_INTERNAL("lorom_st010",   SNS_LOROM_SETA10)
15841638   SLOT_INTERFACE_INTERNAL("lorom_st011",   SNS_LOROM_SETA11)
15851639   SLOT_INTERFACE_INTERNAL("lorom_st018",   SNS_LOROM) // Cart + ST018 - unsupported
r23583r23584
16281682      case SNES_ST010:    // this requires two diff kinds of chip access, so we handle it in snes20_lo/hi_r/w
16291683      case SNES_ST011:    // this requires two diff kinds of chip access, so we handle it in snes20_lo/hi_r/w
16301684      case SNES_ST018:    // still unemulated
1631      case SNES_Z80GB:    // still unemulated
16321685         break;
1686      case SNES_Z80GB:      // skeleton support
1687         m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snessgb_lo_r),this), write8_delegate(FUNC(snes_console_state::snessgb_lo_w),this));
1688         m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snessgb_hi_r),this), write8_delegate(FUNC(snes_console_state::snessgb_hi_w),this));
1689         set_5a22_map(m_maincpu);
1690         break;
16331691      case SNES_SA1:      // skeleton support
16341692         m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snessa1_lo_r),this), write8_delegate(FUNC(snes_console_state::snessa1_lo_w),this));
16351693         m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snessa1_hi_r),this), write8_delegate(FUNC(snes_console_state::snessa1_hi_w),this));
trunk/src/mess/machine/sns_sgb.c
r0r23584
1/***********************************************************************************************************
2 
3 Super Game Boy emulation (for SNES/SFC)
4 
5 Copyright MESS Team.
6 Visit http://mamedev.org for licensing and usage restrictions.
7
8 TODO: almost everything
9 
10 ***********************************************************************************************************/
11
12
13#include "emu.h"
14#include "machine/sns_sgb.h"
15
16#include "cpu/lr35902/lr35902.h"
17
18//-------------------------------------------------
19//  sns_rom_sgb_device - constructor
20//-------------------------------------------------
21
22const device_type SNS_LOROM_SUPERGB = &device_creator<sns_rom_sgb_device>;
23
24
25sns_rom_sgb_device::sns_rom_sgb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
26               : sns_rom_device(mconfig, SNS_LOROM_SUPERGB, "SNES Super Game Boy Cart", tag, owner, clock, "sns_rom_sgb", __FILE__),
27               m_gb_cpu(*this, "supergb"),
28               m_cartslot(*this, "gb_slot")
29{
30}
31
32
33void sns_rom_sgb_device::device_start()
34{
35}
36
37void sns_rom_sgb_device::device_reset()
38{
39}
40
41
42
43// SuperGB emulation
44
45//-------------------------------------------------
46//  ADDRESS_MAP( supergb_map )
47//-------------------------------------------------
48
49READ8_MEMBER(sns_rom_sgb_device::gb_cart_r)
50{
51   return m_cartslot->read_rom(space, offset);
52}
53
54WRITE8_MEMBER(sns_rom_sgb_device::gb_bank_w)
55{
56   m_cartslot->write_bank(space, offset, data);
57}
58
59READ8_MEMBER(sns_rom_sgb_device::gb_ram_r)
60{
61   return m_cartslot->read_ram(space, offset);
62}
63
64WRITE8_MEMBER(sns_rom_sgb_device::gb_ram_w)
65{
66   m_cartslot->write_ram(space, offset, data);
67}
68
69
70static ADDRESS_MAP_START(supergb_map, AS_PROGRAM, 8, sns_rom_sgb_device )
71   ADDRESS_MAP_UNMAP_HIGH
72   AM_RANGE(0x0000, 0x7fff) AM_READWRITE(gb_cart_r, gb_bank_w)
73   AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w )   /* 8k switched RAM bank (cartridge) */
74   AM_RANGE(0xc000, 0xfdff) AM_RAM                     /* 8k low RAM, echo RAM */
75   AM_RANGE(0xff27, 0xff2f) AM_NOP                     /* unused */
76   AM_RANGE(0xff80, 0xfffe) AM_RAM                     /* High RAM */
77ADDRESS_MAP_END
78
79
80
81WRITE8_MEMBER( sns_rom_sgb_device::gb_timer_callback )
82{
83}
84
85
86static SLOT_INTERFACE_START(supergb_cart)
87SLOT_INTERFACE_END
88
89static MACHINE_CONFIG_FRAGMENT( supergb )
90   MCFG_CPU_ADD("supergb", LR35902, 4295454)   /* 4.295454 MHz */
91   MCFG_CPU_PROGRAM_MAP(supergb_map)
92   MCFG_LR35902_TIMER_CB(WRITE8(sns_rom_sgb_device, gb_timer_callback))
93   MCFG_LR35902_HALT_BUG
94
95   MCFG_GB_CARTRIDGE_ADD("gb_slot", supergb_cart, NULL)
96MACHINE_CONFIG_END
97
98
99machine_config_constructor sns_rom_sgb_device::device_mconfig_additions() const
100{
101   return MACHINE_CONFIG_NAME( supergb );
102}
103
104
105/*-------------------------------------------------
106 mapper specific handlers
107 -------------------------------------------------*/
108
109
110READ8_MEMBER(sns_rom_sgb_device::read_l)
111{
112   return read_h(space, offset);
113}
114
115READ8_MEMBER(sns_rom_sgb_device::read_h)
116{
117   int bank = offset / 0x10000;
118   return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
119}
120
121READ8_MEMBER( sns_rom_sgb_device::chip_read )
122{
123   UINT16 address = offset & 0xffff;
124
125   //LY counter
126   if (address == 0x6000)
127   {
128      m_sgb_ly = 0;// GameBoy PPU LY here
129      m_sgb_row = m_lcd_row;
130      return m_sgb_ly;
131   }
132   
133   //command ready port
134   if (address == 0x6002)
135   {
136      bool data = (m_packetsize > 0);
137      if (data)
138      {
139         for (int i = 0; i < 16; i++)
140            m_joy_pckt[i] = m_packet_data[0][i];
141         m_packetsize--;   
142
143         //hack because we still don't emulate input packets!
144         if (!m_packetsize) m_packetsize = 64;
145
146         // shift packet
147         for (int i = 0; i < m_packetsize; i++)
148            for (int j = 0; j < 16; j++)
149               m_packet_data[i][j] = m_packet_data[i + 1][j];
150      }
151      return data;
152   }
153   
154   //ICD2 revision
155   if (address == 0x600f)
156      return 0x21;
157   
158   //command port
159   if ((address & 0xfff0) == 0x7000)
160      return m_joy_pckt[address & 0x0f];
161   
162   //VRAM port
163   if (address == 0x7800)
164   {
165      UINT8 data = m_lcd_output[m_vram_offs];
166      m_vram_offs = (m_vram_offs + 1) % 320;
167      return data;
168   }
169
170   return 0x00;   // this should never happen?
171}
172
173void sns_rom_sgb_device::lcd_render(UINT32 *source)
174{
175   memset(m_lcd_output, 0x00, 320 * sizeof(UINT16));
176   
177   for (int y = 0; y < 8; y++)
178   {
179      for (int x = 0; x < 160; x++)
180      {
181         UINT32 pixel = *source++;
182         UINT16 addr = y * 2 + (x / 8 * 16);
183         m_lcd_output[addr + 0] |= ((pixel & 1) >> 0) << (7 - (x & 7));
184         m_lcd_output[addr + 1] |= ((pixel & 2) >> 1) << (7 - (x & 7));
185      }
186   }
187}
188
189WRITE8_MEMBER( sns_rom_sgb_device::chip_write )
190{
191   UINT16 address = offset & 0xffff;
192   
193   //VRAM port
194   if (address == 0x6001)
195   {
196      m_vram = data;
197      m_vram_offs = 0;
198     
199      UINT8 offset = (m_sgb_row - (4 - (m_vram - (m_sgb_ly & 3)))) & 3;
200      lcd_render(m_lcd_buffer + offset * 160 * 8);
201     
202      return;
203   }
204   
205   //control port
206   if (address == 0x6003)
207   {
208      if ((m_port & 0x80) == 0x00 && (data & 0x80) == 0x80)
209      {
210         //reset
211      }
212
213      switch (data & 3)
214      {
215         //change CPU frequency
216      }
217      m_port = data;
218      return;
219   }
220   
221   if (address == 0x6004)
222   {
223      //joypad 1
224      m_joy1 = data;
225      return;
226   }
227   if (address == 0x6005)
228   {
229      //joypad 2
230      m_joy2 = data;
231      return;
232   }
233   if (address == 0x6006)
234   {
235      //joypad 3
236      m_joy3 = data;
237      return;
238   }
239   if (address == 0x6007)
240   {
241      //joypad 4
242      m_joy4 = data;
243      return;
244   }
245   
246}
247
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trunk/src/mess/machine/sns_sgb.h
r0r23584
1#ifndef __SNS_SGB_H
2#define __SNS_SGB_H
3
4#include "machine/sns_slot.h"
5#include "machine/sns_rom.h"
6
7#include "machine/gb_slot.h"
8
9
10// ======================> sns_rom_sgb_device
11
12class sns_rom_sgb_device : public sns_rom_device
13{
14public:
15   // construction/destruction
16   sns_rom_sgb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
17   
18   // device-level overrides
19   virtual void device_start();
20   virtual void device_reset();
21   virtual machine_config_constructor device_mconfig_additions() const;
22
23   // reading and writing
24   virtual DECLARE_READ8_MEMBER(read_l);
25   virtual DECLARE_READ8_MEMBER(read_h);
26   virtual DECLARE_READ8_MEMBER(chip_read);
27   virtual DECLARE_WRITE8_MEMBER(chip_write);
28   
29   virtual DECLARE_READ8_MEMBER(gb_cart_r);
30   virtual DECLARE_WRITE8_MEMBER(gb_bank_w);
31   virtual DECLARE_READ8_MEMBER(gb_ram_r);
32   virtual DECLARE_WRITE8_MEMBER(gb_ram_w);
33   virtual DECLARE_WRITE8_MEMBER(gb_timer_callback);
34
35   required_device<cpu_device> m_gb_cpu;
36   required_device<gb_cart_slot_device> m_cartslot;
37
38   void lcd_render(UINT32 *source);
39
40   // ICD2 regs
41   UINT8 m_sgb_ly;
42   UINT8 m_sgb_row;
43   UINT8 m_vram;
44   UINT8 m_port;
45   UINT8 m_joy1, m_joy2, m_joy3, m_joy4;
46   UINT8 m_joy_pckt[16];
47   UINT16 m_vram_offs;
48   UINT8 m_mlt_req;
49
50   UINT32 m_lcd_buffer[4 * 160 * 8];
51   UINT16 m_lcd_output[320];
52   UINT16 m_lcd_row;
53
54   // input bits
55   int m_packetsize;
56   UINT8 m_packet_data[64][16];
57};
58
59
60// device type definition
61extern const device_type SNS_LOROM_SUPERGB;
62
63#endif
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