trunk/src/mame/machine/n64.c
| r23580 | r23581 | |
| 34 | 34 | void n64_periphs::reset_tick() |
| 35 | 35 | { |
| 36 | 36 | reset_timer->adjust(attotime::never); |
| 37 | | machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE); |
| 38 | | machine().device("maincpu")->reset(); |
| 39 | | machine().device("rsp")->reset(); |
| 40 | | machine().device("rcp")->reset(); |
| 41 | | machine().device("rsp")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE); |
| 37 | maincpu->reset(); |
| 38 | maincpu->execute().set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE); |
| 39 | rspcpu->reset(); |
| 40 | rspcpu->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE); |
| 41 | rspcpu->state().set_state_int(RSP_SR, rspcpu->state().state_int(RSP_SR) | RSP_STATUS_HALT); |
| 42 | 42 | reset_held = false; |
| 43 | cic_status = 0; |
| 44 | memset(pif_ram, 0, sizeof(pif_ram)); |
| 45 | switch(cic_type) |
| 46 | { |
| 47 | case 1: |
| 48 | pif_ram[0x24] = 0x00; |
| 49 | pif_ram[0x25] = 0x06; |
| 50 | pif_ram[0x26] = 0x3f; |
| 51 | pif_ram[0x27] = 0x3f; |
| 52 | break; |
| 53 | case 3: |
| 54 | pif_ram[0x24] = 0x00; |
| 55 | pif_ram[0x25] = 0x02; |
| 56 | pif_ram[0x26] = 0x78; |
| 57 | pif_ram[0x27] = 0x3f; |
| 58 | break; |
| 59 | case 5: |
| 60 | pif_ram[0x24] = 0x00; |
| 61 | pif_ram[0x25] = 0x02; |
| 62 | pif_ram[0x26] = 0x91; |
| 63 | pif_ram[0x27] = 0x3f; |
| 64 | break; |
| 65 | case 6: |
| 66 | pif_ram[0x24] = 0x00; |
| 67 | pif_ram[0x25] = 0x02; |
| 68 | pif_ram[0x26] = 0x85; |
| 69 | pif_ram[0x27] = 0x3f; |
| 70 | break; |
| 71 | case 0xd: |
| 72 | pif_ram[0x24] = 0x00; |
| 73 | pif_ram[0x25] = 0x0a; |
| 74 | pif_ram[0x26] = 0xdd; |
| 75 | pif_ram[0x27] = 0x3f; |
| 76 | break; |
| 77 | default: |
| 78 | pif_ram[0x24] = 0x00; |
| 79 | pif_ram[0x25] = 0x02; |
| 80 | pif_ram[0x26] = 0x3f; |
| 81 | pif_ram[0x27] = 0x3f; |
| 82 | break; |
| 83 | } |
| 43 | 84 | } |
| 44 | 85 | |
| 45 | 86 | void n64_periphs::poll_reset_button(bool button) |
| r23580 | r23581 | |
| 79 | 120 | mi_version = 0x01010101; |
| 80 | 121 | mi_interrupt = 0; |
| 81 | 122 | mi_intr_mask = 0; |
| 82 | | mi_mode = 0; |
| 123 | mi_mode = 0x80; // Skip RDRAM initialization |
| 83 | 124 | |
| 84 | 125 | sp_mem_addr = 0; |
| 85 | 126 | sp_dram_addr = 0; |
| r23580 | r23581 | |
| 117 | 158 | ai_status = 0; |
| 118 | 159 | |
| 119 | 160 | pi_dma_timer->adjust(attotime::never); |
| 120 | | pi_first_dma = 1; |
| 121 | 161 | pi_rd_len = 0; |
| 122 | 162 | pi_wr_len = 0; |
| 123 | 163 | pi_status = 0; |
| r23580 | r23581 | |
| 146 | 186 | |
| 147 | 187 | memset(ri_regs, 0, sizeof(ri_regs)); |
| 148 | 188 | |
| 149 | | //ri_regs[3] = 1; |
| 189 | ri_regs[0] = 0xe; // Skip RDRAM initialization |
| 190 | ri_regs[1] = 0x40; // |
| 191 | ri_regs[3] = 0x14; // |
| 192 | ri_regs[4] = 0x63634; // |
| 150 | 193 | memset(pif_ram, 0, sizeof(pif_ram)); |
| 151 | 194 | memset(pif_cmd, 0, sizeof(pif_cmd)); |
| 152 | 195 | si_dram_addr = 0; |
| r23580 | r23581 | |
| 171 | 214 | |
| 172 | 215 | // CIC-NUS-6102 (default) |
| 173 | 216 | pif_ram[0x24] = 0x00; |
| 174 | | pif_ram[0x25] = 0x02; |
| 217 | pif_ram[0x25] = 0x00; |
| 175 | 218 | pif_ram[0x26] = 0x3f; |
| 176 | 219 | pif_ram[0x27] = 0x3f; |
| 177 | 220 | dd_present = false; |
| 221 | cic_type=2; |
| 222 | mem_map->write_dword(0x00000318, 0x800000); |
| 178 | 223 | |
| 179 | 224 | if (boot_checksum == U64(0x00000000001ff230)) |
| 180 | 225 | { |
| 181 | 226 | //printf("64DD detected\n"); |
| 182 | 227 | pif_ram[0x24] = 0x00; |
| 183 | | pif_ram[0x25] = 0x0a; |
| 228 | pif_ram[0x25] = 0x08; |
| 184 | 229 | pif_ram[0x26] = 0xdd; // How utterly predictable |
| 185 | 230 | pif_ram[0x27] = 0x3f; |
| 186 | 231 | dd_present = true; |
| 232 | cic_type=0xd; |
| 187 | 233 | } |
| 188 | 234 | else if (boot_checksum == U64(0x000000cffb830843) || boot_checksum == U64(0x000000d0027fdf31)) |
| 189 | 235 | { |
| 190 | 236 | // CIC-NUS-6101 |
| 191 | 237 | //printf("CIC-NUS-6101 detected\n"); |
| 192 | 238 | pif_ram[0x24] = 0x00; |
| 193 | | pif_ram[0x25] = 0x06; |
| 239 | pif_ram[0x25] = 0x04; |
| 194 | 240 | pif_ram[0x26] = 0x3f; |
| 195 | 241 | pif_ram[0x27] = 0x3f; |
| 242 | cic_type=1; |
| 196 | 243 | } |
| 197 | 244 | else if (boot_checksum == U64(0x000000d6499e376b)) |
| 198 | 245 | { |
| 199 | 246 | // CIC-NUS-6103 |
| 200 | 247 | //printf("CIC-NUS-6103 detected\n"); |
| 201 | 248 | pif_ram[0x24] = 0x00; |
| 202 | | pif_ram[0x25] = 0x02; |
| 249 | pif_ram[0x25] = 0x00; |
| 203 | 250 | pif_ram[0x26] = 0x78; |
| 204 | 251 | pif_ram[0x27] = 0x3f; |
| 252 | cic_type=3; |
| 205 | 253 | } |
| 206 | 254 | else if (boot_checksum == U64(0x0000011a4a1604b6)) |
| 207 | 255 | { |
| 208 | 256 | // CIC-NUS-6105 |
| 209 | 257 | //printf("CIC-NUS-6105 detected\n"); |
| 210 | 258 | pif_ram[0x24] = 0x00; |
| 211 | | pif_ram[0x25] = 0x02; |
| 259 | pif_ram[0x25] = 0x00; |
| 212 | 260 | pif_ram[0x26] = 0x91; |
| 213 | 261 | pif_ram[0x27] = 0x3f; |
| 262 | cic_type=5; |
| 263 | mem_map->write_dword(0x000003f0, 0x800000); |
| 214 | 264 | } |
| 215 | 265 | else if (boot_checksum == U64(0x000000d6d5de4ba0)) |
| 216 | 266 | { |
| 217 | 267 | // CIC-NUS-6106 |
| 218 | 268 | //printf("CIC-NUS-6106 detected\n"); |
| 219 | 269 | pif_ram[0x24] = 0x00; |
| 220 | | pif_ram[0x25] = 0x02; |
| 270 | pif_ram[0x25] = 0x00; |
| 221 | 271 | pif_ram[0x26] = 0x85; |
| 222 | 272 | pif_ram[0x27] = 0x3f; |
| 273 | cic_type=6; |
| 223 | 274 | } |
| 224 | 275 | else |
| 225 | 276 | { |
| r23580 | r23581 | |
| 1580 | 1631 | //printf("want write dma in %d\n", (pi_wr_len + 1)); |
| 1581 | 1632 | pi_dma_timer->adjust(dma_period); |
| 1582 | 1633 | |
| 1583 | | if (pi_first_dma) |
| 1584 | | { |
| 1585 | | // TODO: CIC-6105 has different address... |
| 1586 | | mem_map->write_dword(0x00000318, 0x800000); |
| 1587 | | mem_map->write_dword(0x000003f0, 0x800000); |
| 1588 | | pi_first_dma = 0; |
| 1589 | | } |
| 1590 | | |
| 1591 | 1634 | //pi_dma_tick(); |
| 1592 | 1635 | break; |
| 1593 | 1636 | } |