trunk/src/mess/drivers/altos5.c
| r23562 | r23563 | |
| 4 | 4 | |
| 5 | 5 | Boots, terminal works, memory banking works. |
| 6 | 6 | |
| 7 | | Error when reading floppy disk (record not found) |
| 7 | Error when reading floppy disk (bdos error) |
| 8 | 8 | |
| 9 | 9 | ToDo: |
| 10 | | - DMA has its own memory banking, activated by BUSACK |
| 11 | 10 | - Get floppy to read the disk (only ones found are .TD0 format) |
| 12 | 11 | - Further work once the floppy is fixed |
| 13 | 12 | |
| r23562 | r23563 | |
| 34 | 33 | m_pio1(*this, "z80pio_1"), |
| 35 | 34 | m_dart(*this, "z80dart"), |
| 36 | 35 | m_sio (*this, "z80sio"), |
| 36 | m_dma (*this, "z80dma"), |
| 37 | 37 | m_ctc (*this, "z80ctc"), |
| 38 | 38 | m_fdc (*this, "fdc"), |
| 39 | 39 | m_floppy0(*this, "fdc:0"), |
| r23562 | r23563 | |
| 52 | 52 | DECLARE_DRIVER_INIT(altos5); |
| 53 | 53 | TIMER_DEVICE_CALLBACK_MEMBER(ctc_tick); |
| 54 | 54 | DECLARE_WRITE_LINE_MEMBER(ctc_z1_w); |
| 55 | DECLARE_WRITE_LINE_MEMBER(busreq_w); |
| 55 | 56 | UINT8 m_port08; |
| 56 | 57 | UINT8 m_port09; |
| 57 | 58 | UINT8 *m_p_prom; |
| 58 | 59 | bool m_ipl; |
| 60 | offs_t m_curr_bank; |
| 61 | floppy_image_device *m_floppy; |
| 59 | 62 | void fdc_intrq_w(bool state); |
| 60 | 63 | void fdc_drq_w(bool state); |
| 61 | 64 | UINT8 convert(offs_t offset, bool state); |
| 62 | | void setup_banks(); |
| 65 | void setup_banks(UINT8 source); |
| 63 | 66 | virtual void machine_reset(); |
| 64 | 67 | required_device<cpu_device> m_maincpu; |
| 65 | 68 | required_device<z80pio_device> m_pio0; |
| 66 | 69 | required_device<z80pio_device> m_pio1; |
| 67 | 70 | required_device<z80dart_device> m_dart; |
| 68 | 71 | required_device<z80sio0_device> m_sio; |
| 72 | required_device<z80dma_device> m_dma; |
| 69 | 73 | required_device<z80ctc_device> m_ctc; |
| 70 | 74 | required_device<fd1797_t> m_fdc; |
| 71 | 75 | required_device<floppy_connector> m_floppy0; |
| r23562 | r23563 | |
| 126 | 130 | return data & 0x3f; |
| 127 | 131 | } |
| 128 | 132 | |
| 129 | | void altos5_state::setup_banks() |
| 133 | void altos5_state::setup_banks(UINT8 source) |
| 130 | 134 | { |
| 131 | | // WPRT | template | cpu bank |
| 132 | | offs_t offs = ((~m_port09 & 0x20) << 3) | ((m_port09 & 0x06) << 5) | ((m_port09 & 0x18) << 1); |
| 133 | | offs_t temp = offs; |
| 135 | offs_t offs,temp; |
| 136 | // WPRT | template | dma bank / cpu bank |
| 134 | 137 | |
| 135 | | membank("bankr0")->set_entry(convert(offs++, 0)); |
| 136 | | membank("bankr1")->set_entry(convert(offs++, 0)); |
| 137 | | membank("bankr2")->set_entry(convert(offs++, 0)); |
| 138 | | membank("bankr3")->set_entry(convert(offs++, 0)); |
| 139 | | membank("bankr4")->set_entry(convert(offs++, 0)); |
| 140 | | membank("bankr5")->set_entry(convert(offs++, 0)); |
| 141 | | membank("bankr6")->set_entry(convert(offs++, 0)); |
| 142 | | membank("bankr7")->set_entry(convert(offs++, 0)); |
| 143 | | membank("bankr8")->set_entry(convert(offs++, 0)); |
| 144 | | membank("bankr9")->set_entry(convert(offs++, 0)); |
| 145 | | membank("bankra")->set_entry(convert(offs++, 0)); |
| 146 | | membank("bankrb")->set_entry(convert(offs++, 0)); |
| 147 | | membank("bankrc")->set_entry(convert(offs++, 0)); |
| 148 | | membank("bankrd")->set_entry(convert(offs++, 0)); |
| 149 | | membank("bankre")->set_entry(convert(offs++, 0)); |
| 150 | | membank("bankrf")->set_entry(convert(offs++, 0)); |
| 138 | if (source == 1) // use DMA banks only if BUSACK is asserted |
| 139 | offs = ((~m_port09 & 0x20) << 3) | ((m_port09 & 0x06) << 5) | ((m_port09 & 0xc0) >> 2); |
| 140 | else |
| 141 | offs = ((~m_port09 & 0x20) << 3) | ((m_port09 & 0x06) << 5) | ((m_port09 & 0x18) << 1); |
| 151 | 142 | |
| 152 | | membank("bankw0")->set_entry(convert(temp++, 1)); |
| 153 | | membank("bankw1")->set_entry(convert(temp++, 1)); |
| 154 | | membank("bankw2")->set_entry(convert(temp++, 1)); |
| 155 | | membank("bankw3")->set_entry(convert(temp++, 1)); |
| 156 | | membank("bankw4")->set_entry(convert(temp++, 1)); |
| 157 | | membank("bankw5")->set_entry(convert(temp++, 1)); |
| 158 | | membank("bankw6")->set_entry(convert(temp++, 1)); |
| 159 | | membank("bankw7")->set_entry(convert(temp++, 1)); |
| 160 | | membank("bankw8")->set_entry(convert(temp++, 1)); |
| 161 | | membank("bankw9")->set_entry(convert(temp++, 1)); |
| 162 | | membank("bankwa")->set_entry(convert(temp++, 1)); |
| 163 | | membank("bankwb")->set_entry(convert(temp++, 1)); |
| 164 | | membank("bankwc")->set_entry(convert(temp++, 1)); |
| 165 | | membank("bankwd")->set_entry(convert(temp++, 1)); |
| 166 | | membank("bankwe")->set_entry(convert(temp++, 1)); |
| 167 | | membank("bankwf")->set_entry(convert(temp++, 1)); |
| 143 | temp = offs; |
| 144 | if ((source == 2) || (temp != m_curr_bank)) |
| 145 | { |
| 146 | membank("bankr0")->set_entry(convert(offs++, 0)); |
| 147 | membank("bankr1")->set_entry(convert(offs++, 0)); |
| 148 | membank("bankr2")->set_entry(convert(offs++, 0)); |
| 149 | membank("bankr3")->set_entry(convert(offs++, 0)); |
| 150 | membank("bankr4")->set_entry(convert(offs++, 0)); |
| 151 | membank("bankr5")->set_entry(convert(offs++, 0)); |
| 152 | membank("bankr6")->set_entry(convert(offs++, 0)); |
| 153 | membank("bankr7")->set_entry(convert(offs++, 0)); |
| 154 | membank("bankr8")->set_entry(convert(offs++, 0)); |
| 155 | membank("bankr9")->set_entry(convert(offs++, 0)); |
| 156 | membank("bankra")->set_entry(convert(offs++, 0)); |
| 157 | membank("bankrb")->set_entry(convert(offs++, 0)); |
| 158 | membank("bankrc")->set_entry(convert(offs++, 0)); |
| 159 | membank("bankrd")->set_entry(convert(offs++, 0)); |
| 160 | membank("bankre")->set_entry(convert(offs++, 0)); |
| 161 | membank("bankrf")->set_entry(convert(offs++, 0)); |
| 162 | |
| 163 | offs = temp; |
| 164 | membank("bankw0")->set_entry(convert(offs++, 1)); |
| 165 | membank("bankw1")->set_entry(convert(offs++, 1)); |
| 166 | membank("bankw2")->set_entry(convert(offs++, 1)); |
| 167 | membank("bankw3")->set_entry(convert(offs++, 1)); |
| 168 | membank("bankw4")->set_entry(convert(offs++, 1)); |
| 169 | membank("bankw5")->set_entry(convert(offs++, 1)); |
| 170 | membank("bankw6")->set_entry(convert(offs++, 1)); |
| 171 | membank("bankw7")->set_entry(convert(offs++, 1)); |
| 172 | membank("bankw8")->set_entry(convert(offs++, 1)); |
| 173 | membank("bankw9")->set_entry(convert(offs++, 1)); |
| 174 | membank("bankwa")->set_entry(convert(offs++, 1)); |
| 175 | membank("bankwb")->set_entry(convert(offs++, 1)); |
| 176 | membank("bankwc")->set_entry(convert(offs++, 1)); |
| 177 | membank("bankwd")->set_entry(convert(offs++, 1)); |
| 178 | membank("bankwe")->set_entry(convert(offs++, 1)); |
| 179 | membank("bankwf")->set_entry(convert(offs++, 1)); |
| 180 | } |
| 181 | |
| 182 | m_curr_bank = temp; |
| 168 | 183 | } |
| 169 | 184 | |
| 170 | 185 | void altos5_state::machine_reset() |
| 171 | 186 | { |
| 187 | m_curr_bank = 0; |
| 172 | 188 | m_port08 = 0; |
| 173 | 189 | m_port09 = 0; |
| 174 | 190 | m_ipl = 1; |
| 175 | | setup_banks(); |
| 191 | setup_banks(2); |
| 176 | 192 | m_maincpu->reset(); |
| 177 | 193 | } |
| 178 | 194 | |
| r23562 | r23563 | |
| 192 | 208 | WRITE8_MEMBER( altos5_state::port14_w ) |
| 193 | 209 | { |
| 194 | 210 | m_ipl = 0; |
| 195 | | setup_banks(); |
| 211 | setup_banks(2); |
| 196 | 212 | } |
| 197 | 213 | |
| 198 | 214 | READ8_MEMBER(altos5_state::memory_read_byte) |
| r23562 | r23563 | |
| 219 | 235 | return prog_space.write_byte(offset, data); |
| 220 | 236 | } |
| 221 | 237 | |
| 238 | WRITE_LINE_MEMBER( altos5_state::busreq_w ) |
| 239 | { |
| 240 | // since our Z80 has no support for BUSACK, we assume it is granted immediately |
| 241 | m_maincpu->set_input_line(Z80_INPUT_LINE_BUSRQ, state); |
| 242 | m_maincpu->set_input_line(INPUT_LINE_HALT, state); // do we need this? |
| 243 | m_dma->bai_w(state); // tell dma that bus has been granted |
| 244 | setup_banks(state); // adjust banking for dma or cpu |
| 245 | } |
| 246 | |
| 222 | 247 | static Z80DMA_INTERFACE( dma_intf ) |
| 223 | 248 | { |
| 224 | | DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT), // actually BUSRQ |
| 249 | DEVCB_DRIVER_LINE_MEMBER(altos5_state, busreq_w), |
| 225 | 250 | DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), |
| 226 | | DEVCB_NULL, |
| 251 | DEVCB_NULL, // BAO, not used |
| 227 | 252 | DEVCB_DRIVER_MEMBER(altos5_state, memory_read_byte), |
| 228 | 253 | DEVCB_DRIVER_MEMBER(altos5_state, memory_write_byte), |
| 229 | 254 | DEVCB_DRIVER_MEMBER(altos5_state, io_read_byte), |
| r23562 | r23563 | |
| 280 | 305 | */ |
| 281 | 306 | READ8_MEMBER( altos5_state::port08_r ) |
| 282 | 307 | { |
| 283 | | return m_port08 | 0x07; |
| 308 | UINT8 data = m_port08 | 0x87; |
| 309 | if (m_floppy) |
| 310 | data |= ((UINT8)m_floppy->twosid_r() << 3); // get number of sides |
| 311 | return data; |
| 284 | 312 | } |
| 285 | 313 | |
| 286 | 314 | /* |
| r23562 | r23563 | |
| 298 | 326 | */ |
| 299 | 327 | WRITE8_MEMBER( altos5_state::port08_w ) |
| 300 | 328 | { |
| 301 | | m_port08 = data; |
| 329 | m_port08 = data & 0x70; |
| 302 | 330 | |
| 303 | | floppy_image_device *floppy = NULL; |
| 331 | m_floppy = NULL; |
| 304 | 332 | if (BIT(data, 5)) |
| 305 | | floppy = m_floppy1->get_device(); |
| 333 | m_floppy = m_floppy1->get_device(); |
| 306 | 334 | else |
| 307 | | floppy = m_floppy0->get_device(); |
| 335 | m_floppy = m_floppy0->get_device(); |
| 308 | 336 | |
| 309 | | m_fdc->set_floppy(floppy); |
| 337 | m_fdc->set_floppy(m_floppy); |
| 310 | 338 | |
| 311 | | if (floppy) |
| 339 | if (m_floppy) |
| 312 | 340 | { |
| 313 | | floppy->mon_w(0); |
| 314 | | floppy->ss_w(BIT(data, 6)); |
| 341 | m_floppy->mon_w(0); |
| 342 | m_floppy->ss_w(BIT(data, 6)); |
| 315 | 343 | m_fdc->dden_w(!BIT(data, 4)); |
| 316 | | m_port08 |= ((UINT8)floppy->twosid_r() << 3); // get number of sides |
| 317 | 344 | } |
| 318 | 345 | } |
| 319 | 346 | |
| r23562 | r23563 | |
| 326 | 353 | WRITE8_MEMBER( altos5_state::port09_w ) |
| 327 | 354 | { |
| 328 | 355 | m_port09 = data; |
| 329 | | setup_banks(); |
| 356 | setup_banks(2); |
| 330 | 357 | } |
| 331 | 358 | |
| 332 | 359 | // parallel port |
| r23562 | r23563 | |
| 379 | 406 | DEVCB_NULL, // out data |
| 380 | 407 | DEVCB_NULL, // DTR |
| 381 | 408 | DEVCB_NULL, // RTS |
| 382 | | DEVCB_NULL, // WRDY |
| 409 | DEVCB_NULL, // WRDY connects to (altos5_state, fdc_intrq_w), |
| 383 | 410 | DEVCB_NULL, // SYNC |
| 384 | 411 | |
| 385 | 412 | // console#1 |
| r23562 | r23563 | |
| 412 | 439 | |
| 413 | 440 | void altos5_state::fdc_intrq_w(bool state) |
| 414 | 441 | { |
| 415 | | m_port08 = (m_port08 & 0x7f) | ((UINT8)(state) << 7); |
| 416 | | m_pio0->port_a_write(m_port08); |
| 442 | UINT8 data = m_port08 | ((UINT8)(state) << 7); |
| 443 | m_pio0->port_a_write(data); |
| 417 | 444 | } |
| 418 | 445 | |
| 419 | 446 | void altos5_state::fdc_drq_w(bool state) |
| 420 | 447 | { |
| 421 | | // To DMA pin 25 - SDMA |
| 448 | m_dma->rdy_w(state); |
| 422 | 449 | } |
| 423 | 450 | |
| 424 | 451 | DRIVER_INIT_MEMBER( altos5_state, altos5 ) |
| 425 | 452 | { |
| 453 | m_fdc->setup_intrq_cb(fd1797_t::line_cb(FUNC(altos5_state::fdc_intrq_w), this)); |
| 454 | m_fdc->setup_drq_cb(fd1797_t::line_cb(FUNC(altos5_state::fdc_drq_w), this)); |
| 426 | 455 | |
| 427 | 456 | floppy_connector *con = machine().device<floppy_connector>("fdc:0"); |
| 428 | | floppy_image_device *floppy = con ? con->get_device() : 0; |
| 429 | | if (floppy) |
| 457 | m_floppy = con ? con->get_device() : 0; |
| 458 | if (m_floppy) |
| 430 | 459 | { |
| 431 | | m_fdc->set_floppy(floppy); |
| 432 | | m_fdc->setup_intrq_cb(fd1797_t::line_cb(FUNC(altos5_state::fdc_intrq_w), this)); |
| 433 | | m_fdc->setup_drq_cb(fd1797_t::line_cb(FUNC(altos5_state::fdc_drq_w), this)); |
| 434 | | |
| 435 | | floppy->ss_w(0); |
| 460 | m_fdc->set_floppy(m_floppy); |
| 461 | m_floppy->ss_w(0); |
| 436 | 462 | } |
| 437 | 463 | |
| 438 | 464 | |