Previous 199869 Revisions Next

r23506 Thursday 6th June, 2013 at 21:28:48 UTC by Curt Coder
(MESS) altos5: Fixed serial terminal, except for the CTC clocking. (nw)
[src/mess/drivers]altos5.c

trunk/src/mess/drivers/altos5.c
r23505r23506
1212#include "machine/z80dart.h"
1313#include "machine/z80dma.h"
1414#include "machine/serial.h"
15#include "machine/terminal.h"
1615
1716
1817class altos5_state : public driver_device
r23505r23506
2524      m_pio1(*this, "z80pio_1"),
2625      m_dart(*this, "z80dart"),
2726      m_sio (*this, "z80sio"),
28      m_ctc (*this, "z80ctc"),
29      m_terminal(*this, TERMINAL_TAG)
27      m_ctc (*this, "z80ctc")
3028   { }
3129
3230   DECLARE_READ8_MEMBER(memory_read_byte);
r23505r23506
4240   DECLARE_WRITE8_MEMBER(kbd_put);
4341   DECLARE_READ8_MEMBER(port2e_r);
4442   DECLARE_READ8_MEMBER(port2f_r);
45   UINT8 m_term_data;
43   DECLARE_WRITE_LINE_MEMBER(ctc_z1_w);
4644   UINT8 m_port08;
4745   UINT8 m_port09;
4846   bool m_ipl;
r23505r23506
5351   required_device<z80pio_device> m_pio0;
5452   required_device<z80pio_device> m_pio1;
5553   required_device<z80dart_device> m_dart;
56   optional_device<z80dart_device> m_sio;
54   required_device<z80sio0_device> m_sio;
5755   required_device<z80ctc_device> m_ctc;
58   required_device<generic_terminal_device> m_terminal;
5956};
6057
6158static ADDRESS_MAP_START(altos5_mem, AS_PROGRAM, 8, altos5_state)
r23505r23506
8885   AM_RANGE(0x14, 0x17) AM_WRITE(port14_w)
8986   AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE("z80dart", z80dart_device, ba_cd_r, ba_cd_w)
9087   //AM_RANGE(0x20, 0x23) // Hard drive
91   AM_RANGE(0x2c, 0x2d) AM_NOP
92   AM_RANGE(0x2e, 0x2e) AM_READ(port2e_r) AM_DEVWRITE(TERMINAL_TAG, generic_terminal_device, write)
93   AM_RANGE(0x2f, 0x2f) AM_READ(port2f_r) AM_WRITENOP
88   AM_RANGE(0x2c, 0x2f) AM_DEVREADWRITE("z80sio", z80sio0_device, ba_cd_r, ba_cd_w)
9489ADDRESS_MAP_END
9590
9691/* Input ports */
r23505r23506
213208};
214209
215210// baud rate generator and RTC. All inputs are 2MHz.
211WRITE_LINE_MEMBER( altos5_state::ctc_z1_w )
212{
213   m_dart->rxca_w(state);
214   m_dart->txca_w(state);
215   m_sio->rxca_w(state);
216   m_sio->txca_w(state);
217}
218
216219static Z80CTC_INTERFACE( ctc_intf )
217220{
218221   DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
219   DEVCB_NULL,         /* ZC/TO0 callback - SIO Ch B */
220   DEVCB_NULL,         /* ZC/TO1 callback - Z80DART Ch A, SIO Ch A */
221   DEVCB_NULL,         /* ZC/TO2 callback - Z80DART Ch B */
222   DEVCB_DEVICE_LINE_MEMBER("z80sio", z80dart_device, rxtxcb_w),         /* ZC/TO0 callback - SIO Ch B */
223   DEVCB_DRIVER_LINE_MEMBER(altos5_state, ctc_z1_w),         /* ZC/TO1 callback - Z80DART Ch A, SIO Ch A */
224   DEVCB_DEVICE_LINE_MEMBER("z80dart", z80dart_device, rxtxcb_w),         /* ZC/TO2 callback - Z80DART Ch B */
222225};
223226
224227// system functions
r23505r23506
273276   DEVCB_NULL
274277};
275278
279static Z80SIO_INTERFACE( sio_intf )
280{
281   9600, 9600, 153600, 153600, // rxa, txa, rxb, txb clocks (from CTC)
276282
283   // console#2
284   DEVCB_NULL, // ChA in data
285   DEVCB_NULL, // out data
286   DEVCB_NULL, // DTR
287   DEVCB_NULL, // RTS
288   DEVCB_NULL, // WRDY
289   DEVCB_NULL, // SYNC
290
291   // console#1
292   DEVCB_DEVICE_LINE_MEMBER("rs232", serial_port_device, rx),
293   DEVCB_DEVICE_LINE_MEMBER("rs232", serial_port_device, tx),
294   DEVCB_DEVICE_LINE_MEMBER("rs232", rs232_port_device, dtr_w),
295   DEVCB_DEVICE_LINE_MEMBER("rs232", rs232_port_device, rts_w),
296   DEVCB_NULL,
297   DEVCB_NULL,
298
299   DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
300   DEVCB_NULL, // unused DRQ pins
301   DEVCB_NULL,
302   DEVCB_NULL,
303   DEVCB_NULL
304};
305
306static const rs232_port_interface rs232_intf =
307{
308   DEVCB_NULL,
309   DEVCB_DEVICE_LINE_MEMBER("z80sio", z80dart_device, dcda_w),
310   DEVCB_NULL,
311   DEVCB_NULL,
312   DEVCB_DEVICE_LINE_MEMBER("z80sio", z80dart_device, ctsa_w)
313};
314
277315DRIVER_INIT_MEMBER( altos5_state, altos5 )
278316{
279317   UINT8 *RAM = memregion("maincpu")->base();
r23505r23506
311349   membank("bankwf")->configure_entries(0, 50, &RAM[0], 0x1000);
312350}
313351
314READ8_MEMBER( altos5_state::port2e_r )
315{
316   UINT8 ret = m_term_data;
317   m_term_data = 0;
318   return ret;
319}
320
321READ8_MEMBER( altos5_state::port2f_r )
322{
323   return (m_term_data) ? 13 : 12;
324}
325
326WRITE8_MEMBER( altos5_state::kbd_put )
327{
328   m_term_data = data;
329}
330
331static GENERIC_TERMINAL_INTERFACE( terminal_intf )
332{
333   DEVCB_DRIVER_MEMBER(altos5_state, kbd_put)
334};
335
336352static MACHINE_CONFIG_START( altos5, altos5_state )
337353   /* basic machine hardware */
338354   MCFG_CPU_ADD("maincpu", Z80, XTAL_8MHz / 2)
r23505r23506
340356   MCFG_CPU_IO_MAP(altos5_io)
341357   MCFG_CPU_CONFIG(daisy_chain_intf)
342358
343   /* video hardware */
344   MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
345
346359   /* Devices */
347360   MCFG_Z80DMA_ADD( "z80dma",   XTAL_8MHz / 2, dma_intf)
348361   MCFG_Z80PIO_ADD( "z80pio_0", XTAL_8MHz / 2, pio0_intf )
349362   MCFG_Z80PIO_ADD( "z80pio_1", XTAL_8MHz / 2, pio1_intf )
350363   MCFG_Z80CTC_ADD( "z80ctc",   XTAL_8MHz / 2, ctc_intf )
351364   MCFG_Z80DART_ADD("z80dart",  XTAL_8MHz / 2, dart_intf )
365   MCFG_Z80SIO0_ADD("z80sio",   XTAL_8MHz / 2, sio_intf )
366   MCFG_RS232_PORT_ADD("rs232", rs232_intf, default_rs232_devices, "serial_terminal")
352367MACHINE_CONFIG_END
353368
354369
r23505r23506
367382
368383/*   YEAR  NAME    PARENT  COMPAT   MACHINE  INPUT   CLASS           INIT    COMPANY    FULLNAME       FLAGS */
369384COMP(1982, altos5, 0,      0,       altos5,  altos5, altos5_state,  altos5, "Altos", "Altos 5-15", GAME_NOT_WORKING | GAME_NO_SOUND)
370
371
372
373
374#if 0
375/****************** UNUSED SERIAL CODE ************************/
376
377   //AM_RANGE(0x2c, 0x2f) AM_DEVREADWRITE("z80sio", z80dart_device, ba_cd_r, ba_cd_w)
378
379static Z80SIO_INTERFACE( sio_intf )
380{
381   9600, 9600, 153600, 153600, // rxa, txa, rxb, txb clocks (from CTC)
382
383   // console#2
384   DEVCB_NULL, // ChA in data
385   DEVCB_NULL, // out data
386   DEVCB_NULL, // DTR
387   DEVCB_NULL, // RTS
388   DEVCB_NULL, // WRDY
389   DEVCB_NULL, // SYNC
390
391   // console#1
392   DEVCB_DEVICE_LINE_MEMBER("rs232", serial_port_device, rx),
393   DEVCB_DEVICE_LINE_MEMBER("rs232", serial_port_device, tx),
394   DEVCB_DEVICE_LINE_MEMBER("rs232", rs232_port_device, dtr_w),
395   DEVCB_DEVICE_LINE_MEMBER("rs232", rs232_port_device, rts_w),
396   DEVCB_NULL,
397   DEVCB_NULL,
398
399   DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
400   DEVCB_NULL, // unused DRQ pins
401   DEVCB_NULL,
402   DEVCB_NULL,
403   DEVCB_NULL
404};
405
406static const rs232_port_interface rs232_intf =
407{
408   // all outputs
409   DEVCB_NULL,//DEVCB_DEVICE_LINE_MEMBER("z80sio", z80dart_device, rxcb_w), // data
410   DEVCB_NULL, // DCD
411   DEVCB_NULL, // DSR
412   DEVCB_NULL, // RI
413   DEVCB_NULL //DEVCB_DEVICE_LINE_MEMBER("z80sio", z80dart_device, ctsb_w) // CTS
414};
415
416
417   //MCFG_Z80SIO0_ADD("z80sio",   XTAL_8MHz / 2, sio_intf )
418   //MCFG_RS232_PORT_ADD("rs232", rs232_intf, default_rs232_devices, "serial_terminal")
419
420
421#endif
422

Previous 199869 Revisions Next


© 1997-2024 The MAME Team