trunk/src/mess/drivers/altos5.c
| r23490 | r23491 | |
| 37 | 37 | DECLARE_READ8_MEMBER(port09_r); |
| 38 | 38 | DECLARE_WRITE8_MEMBER(port08_w); |
| 39 | 39 | DECLARE_WRITE8_MEMBER(port09_w); |
| 40 | DECLARE_WRITE8_MEMBER(port14_w); |
| 40 | 41 | DECLARE_DRIVER_INIT(altos5); |
| 41 | 42 | DECLARE_WRITE8_MEMBER(kbd_put); |
| 42 | 43 | DECLARE_READ8_MEMBER(port2e_r); |
| r23490 | r23491 | |
| 44 | 45 | UINT8 m_term_data; |
| 45 | 46 | UINT8 m_port08; |
| 46 | 47 | UINT8 m_port09; |
| 48 | bool m_ipl; |
| 49 | bool m_wrpt; |
| 50 | void setup_banks(); |
| 47 | 51 | virtual void machine_reset(); |
| 48 | 52 | required_device<cpu_device> m_maincpu; |
| 49 | 53 | required_device<z80pio_device> m_pio0; |
| r23490 | r23491 | |
| 56 | 60 | |
| 57 | 61 | static ADDRESS_MAP_START(altos5_mem, AS_PROGRAM, 8, altos5_state) |
| 58 | 62 | ADDRESS_MAP_UNMAP_HIGH |
| 59 | | AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("bank1") |
| 60 | | AM_RANGE(0x1000, 0xffff) AM_RAM |
| 63 | AM_RANGE( 0x0000, 0x0fff ) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0") |
| 64 | AM_RANGE( 0x1000, 0x1fff ) AM_READ_BANK("bankr1") AM_WRITE_BANK("bankw1") |
| 65 | AM_RANGE( 0x2000, 0x2fff ) AM_READ_BANK("bankr2") AM_WRITE_BANK("bankw2") |
| 66 | AM_RANGE( 0x3000, 0x3fff ) AM_READ_BANK("bankr3") AM_WRITE_BANK("bankw3") |
| 67 | AM_RANGE( 0x4000, 0x4fff ) AM_READ_BANK("bankr4") AM_WRITE_BANK("bankw4") |
| 68 | AM_RANGE( 0x5000, 0x5fff ) AM_READ_BANK("bankr5") AM_WRITE_BANK("bankw5") |
| 69 | AM_RANGE( 0x6000, 0x6fff ) AM_READ_BANK("bankr6") AM_WRITE_BANK("bankw6") |
| 70 | AM_RANGE( 0x7000, 0x7fff ) AM_READ_BANK("bankr7") AM_WRITE_BANK("bankw7") |
| 71 | AM_RANGE( 0x8000, 0x8fff ) AM_READ_BANK("bankr8") AM_WRITE_BANK("bankw8") |
| 72 | AM_RANGE( 0x9000, 0x9fff ) AM_READ_BANK("bankr9") AM_WRITE_BANK("bankw9") |
| 73 | AM_RANGE( 0xa000, 0xafff ) AM_READ_BANK("bankra") AM_WRITE_BANK("bankwa") |
| 74 | AM_RANGE( 0xb000, 0xbfff ) AM_READ_BANK("bankrb") AM_WRITE_BANK("bankwb") |
| 75 | AM_RANGE( 0xc000, 0xcfff ) AM_READ_BANK("bankrc") AM_WRITE_BANK("bankwc") |
| 76 | AM_RANGE( 0xd000, 0xdfff ) AM_READ_BANK("bankrd") AM_WRITE_BANK("bankwd") |
| 77 | AM_RANGE( 0xe000, 0xefff ) AM_READ_BANK("bankre") AM_WRITE_BANK("bankwe") |
| 78 | AM_RANGE( 0xf000, 0xffff ) AM_READ_BANK("bankrf") AM_WRITE_BANK("bankwf") |
| 61 | 79 | ADDRESS_MAP_END |
| 62 | 80 | |
| 63 | 81 | static ADDRESS_MAP_START(altos5_io, AS_IO, 8, altos5_state) |
| r23490 | r23491 | |
| 67 | 85 | AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80pio_0", z80pio_device, read, write) |
| 68 | 86 | AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE("z80ctc", z80ctc_device, read, write) |
| 69 | 87 | AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("z80pio_1", z80pio_device, read, write) |
| 70 | | //AM_RANGE(0x14, 0x17) AM_WRITE(romoff_w) |
| 88 | AM_RANGE(0x14, 0x17) AM_WRITE(port14_w) |
| 71 | 89 | AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE("z80dart", z80dart_device, ba_cd_r, ba_cd_w) |
| 72 | 90 | //AM_RANGE(0x20, 0x23) // Hard drive |
| 73 | 91 | AM_RANGE(0x2c, 0x2d) AM_NOP |
| r23490 | r23491 | |
| 79 | 97 | static INPUT_PORTS_START( altos5 ) |
| 80 | 98 | INPUT_PORTS_END |
| 81 | 99 | |
| 100 | void altos5_state::setup_banks() |
| 101 | { |
| 102 | UINT8 *prom = memregion("proms")->base(); |
| 103 | UINT8 i; |
| 104 | offs_t offset = ((~m_port09 & 0x20) << 3) | (m_port09 & 0xc0) | ((m_port09 & 0x18) << 1); |
| 105 | printf("\n%X:",offset); |
| 106 | for (i = 0; i < 16; i++) |
| 107 | printf("%X ",prom[offset+i]); |
| 108 | membank("bankr0")->set_entry(49); |
| 109 | } |
| 110 | |
| 82 | 111 | void altos5_state::machine_reset() |
| 83 | 112 | { |
| 84 | | membank("bank1")->set_entry(1); |
| 113 | m_port08 = 0; |
| 114 | m_port09 = 0; |
| 115 | m_wrpt = 0; |
| 116 | m_ipl = 1; |
| 117 | setup_banks(); |
| 85 | 118 | } |
| 86 | 119 | |
| 87 | 120 | static const z80_daisy_config daisy_chain_intf[] = |
| r23490 | r23491 | |
| 134 | 167 | WRITE8_MEMBER( altos5_state::port09_w ) |
| 135 | 168 | { |
| 136 | 169 | m_port09 = data; |
| 170 | setup_banks(); |
| 137 | 171 | } |
| 138 | 172 | |
| 173 | // turns off IPL mode, removes boot rom from memory map |
| 174 | WRITE8_MEMBER( altos5_state::port14_w ) |
| 175 | { |
| 176 | m_ipl = 0; |
| 177 | setup_banks(); |
| 178 | } |
| 179 | |
| 139 | 180 | READ8_MEMBER(altos5_state::memory_read_byte) |
| 140 | 181 | { |
| 141 | 182 | address_space& prog_space = m_maincpu->space(AS_PROGRAM); |
| r23490 | r23491 | |
| 236 | 277 | DRIVER_INIT_MEMBER( altos5_state, altos5 ) |
| 237 | 278 | { |
| 238 | 279 | UINT8 *RAM = memregion("maincpu")->base(); |
| 239 | | membank("bank1")->configure_entries(0, 2, &RAM[0], 0x10000); |
| 280 | membank("bankr0")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 281 | membank("bankr1")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 282 | membank("bankr2")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 283 | membank("bankr3")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 284 | membank("bankr4")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 285 | membank("bankr5")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 286 | membank("bankr6")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 287 | membank("bankr7")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 288 | membank("bankr8")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 289 | membank("bankr9")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 290 | membank("bankra")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 291 | membank("bankrb")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 292 | membank("bankrc")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 293 | membank("bankrd")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 294 | membank("bankre")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 295 | membank("bankrf")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 296 | membank("bankw0")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 297 | membank("bankw1")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 298 | membank("bankw2")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 299 | membank("bankw3")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 300 | membank("bankw4")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 301 | membank("bankw5")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 302 | membank("bankw6")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 303 | membank("bankw7")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 304 | membank("bankw8")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 305 | membank("bankw9")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 306 | membank("bankwa")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 307 | membank("bankwb")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 308 | membank("bankwc")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 309 | membank("bankwd")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 310 | membank("bankwe")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 311 | membank("bankwf")->configure_entries(0, 50, &RAM[0], 0x1000); |
| 240 | 312 | } |
| 241 | 313 | |
| 242 | 314 | READ8_MEMBER( altos5_state::port2e_r ) |
| r23490 | r23491 | |
| 281 | 353 | |
| 282 | 354 | |
| 283 | 355 | /* ROM definition */ |
| 284 | | ROM_START( altos5 ) |
| 285 | | ROM_REGION( 0x11000, "maincpu", ROMREGION_ERASEFF ) |
| 286 | | ROM_LOAD("2732.bin", 0x10000, 0x1000, CRC(15fdc7eb) SHA1(e15bdf5d5414ad56f8c4bb84edc6f967a5f01ba9)) // bios |
| 287 | | ROM_FILL(0x10054, 2, 0) // temp until banking sorted out |
| 288 | | ROM_FILL(0x10344, 3, 0) // kill self test |
| 356 | ROM_START( altos5 ) // 00000-2FFFF = ram banks; 30000-30FFF wprt space; 31000-31FFF ROM |
| 357 | ROM_REGION( 0x32000, "maincpu", ROMREGION_ERASEFF ) |
| 358 | ROM_LOAD("2732.bin", 0x31000, 0x1000, CRC(15fdc7eb) SHA1(e15bdf5d5414ad56f8c4bb84edc6f967a5f01ba9)) // bios |
| 359 | ROM_FILL(0x31054, 2, 0) // temp until banking sorted out |
| 360 | ROM_FILL(0x31344, 3, 0) // kill self test |
| 289 | 361 | |
| 290 | 362 | ROM_REGION( 0x200, "proms", 0 ) |
| 291 | 363 | ROM_LOAD("82s141.bin", 0x0000, 0x0200, CRC(35c8078c) SHA1(dce24374bfcc5d23959e2c03485d82a119c0c3c9)) // banking control |