trunk/src/mess/drivers/applix.c
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| 31 | 31 | #include "machine/6522via.h" |
| 32 | 32 | #include "machine/wd_fdc.h" |
| 33 | 33 | #include "cpu/mcs51/mcs51.h" |
| 34 | #include "sound/dac.h" |
| 34 | 35 | |
| 35 | 36 | |
| 36 | | |
| 37 | 37 | class applix_state : public driver_device |
| 38 | 38 | { |
| 39 | 39 | public: |
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| 42 | 42 | m_maincpu(*this, "maincpu"), |
| 43 | 43 | m_crtc(*this, "crtc"), |
| 44 | 44 | m_via(*this, "via6522"), |
| 45 | | // m_fdc(*this, "wd1772"), |
| 45 | m_fdc(*this, "wd1772"), |
| 46 | m_dacl(*this, "dacl"), |
| 47 | m_dacr(*this, "dacr"), |
| 46 | 48 | m_io_dsw(*this, "DSW"), |
| 47 | 49 | m_io_fdc(*this, "FDC"), |
| 48 | 50 | m_base(*this, "base"), |
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| 77 | 79 | DECLARE_WRITE16_MEMBER(fdc_cmd_w); |
| 78 | 80 | DECLARE_WRITE_LINE_MEMBER(kbd_clock_w); |
| 79 | 81 | DECLARE_WRITE_LINE_MEMBER(kbd_data_w); |
| 80 | | // DECLARE_FLOPPY_FORMATS(floppy_formats); |
| 81 | | // void fdc_intrq_w(bool state); |
| 82 | | // void fdc_drq_w(bool state); |
| 82 | DECLARE_FLOPPY_FORMATS(floppy_formats); |
| 83 | void fdc_intrq_w(bool state); |
| 84 | void fdc_drq_w(bool state); |
| 83 | 85 | UINT8 m_pa; |
| 84 | 86 | UINT8 m_pb; |
| 85 | 87 | UINT8 m_analog_latch; |
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| 115 | 117 | required_device<cpu_device> m_maincpu; |
| 116 | 118 | required_device<mc6845_device> m_crtc; |
| 117 | 119 | required_device<via6522_device> m_via; |
| 118 | | // required_device<wd1772_t> m_fdc; |
| 120 | required_device<wd1772_t> m_fdc; |
| 121 | required_device<dac_device> m_dacl; |
| 122 | required_device<dac_device> m_dacr; |
| 119 | 123 | required_ioport m_io_dsw; |
| 120 | 124 | required_ioport m_io_fdc; |
| 121 | 125 | required_shared_ptr<UINT16> m_base; |
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| 128 | 132 | // bit 3 cassette LED, low=on |
| 129 | 133 | // bit 2,1,0 joystick |
| 130 | 134 | WRITE16_MEMBER( applix_state::dac_latch_w ) |
| 131 | | {//printf("%X ",data); |
| 135 | { |
| 132 | 136 | if (ACCESSING_BITS_0_7) |
| 137 | { |
| 138 | if ((m_analog_latch & 0x70) == 0) |
| 139 | m_dacr->write_unsigned8(data); |
| 140 | else |
| 141 | if ((m_analog_latch & 0x70) == 0x10) |
| 142 | m_dacl->write_unsigned8(data); |
| 133 | 143 | m_dac_latch = data; |
| 144 | } |
| 134 | 145 | } |
| 135 | 146 | |
| 136 | 147 | WRITE16_MEMBER( applix_state::analog_latch_w ) |
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| 760 | 771 | MCFG_SCREEN_UPDATE_DEVICE("crtc", mc6845_device, screen_update) |
| 761 | 772 | MCFG_PALETTE_LENGTH(16) |
| 762 | 773 | |
| 774 | /* sound hardware */ |
| 775 | MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") |
| 776 | MCFG_SOUND_ADD("dacl", DAC, 0) |
| 777 | MCFG_SOUND_ROUTE( ALL_OUTPUTS, "lspeaker", 0.75 ) |
| 778 | MCFG_SOUND_ADD("dacr", DAC, 0) |
| 779 | MCFG_SOUND_ROUTE( ALL_OUTPUTS, "rspeaker", 0.75 ) |
| 780 | |
| 763 | 781 | /* Devices */ |
| 764 | 782 | MCFG_MC6845_ADD("crtc", MC6845, 1875000, applix_crtc) // 6545 |
| 765 | 783 | MCFG_VIA6522_ADD("via6522", 0, applix_via) |
| 766 | 784 | MCFG_WD1772x_ADD("wd1772", XTAL_16MHz / 2) //connected to Z80H clock pin |
| 767 | | // MCFG_FLOPPY_DRIVE_ADD("wd1772:0", applix_floppies, "35dd", 0, applix_state::floppy_formats) |
| 785 | //MCFG_FLOPPY_DRIVE_ADD("wd1772:0", applix_floppies, "35dd", 0, applix_state::floppy_formats) |
| 768 | 786 | MACHINE_CONFIG_END |
| 769 | 787 | |
| 770 | 788 | /* ROM definition */ |
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| 790 | 808 | |
| 791 | 809 | DRIVER_INIT_MEMBER(applix_state, applix) |
| 792 | 810 | { |
| 793 | | #if 0 |
| 811 | |
| 794 | 812 | floppy_connector *con = machine().device<floppy_connector>("wd1772:0"); |
| 795 | 813 | floppy_image_device *floppy = con ? con->get_device() : 0; |
| 796 | 814 | if (floppy) |
| 797 | 815 | { |
| 798 | 816 | m_fdc->set_floppy(floppy); |
| 799 | | m_fdc->setup_intrq_cb(wd1772_t::line_cb(FUNC(mirage_state::fdc_intrq_w), this)); |
| 800 | | m_fdc->setup_drq_cb(wd1772_t::line_cb(FUNC(mirage_state::fdc_drq_w), this)); |
| 817 | //m_fdc->setup_intrq_cb(wd1772_t::line_cb(FUNC(applix_state::fdc_intrq_w), this)); |
| 818 | //m_fdc->setup_drq_cb(wd1772_t::line_cb(FUNC(applix_state::fdc_drq_w), this)); |
| 801 | 819 | |
| 802 | 820 | floppy->ss_w(0); |
| 803 | 821 | } |
| 804 | | #endif |
| 822 | |
| 805 | 823 | UINT8 *RAM = memregion("subcpu")->base(); |
| 806 | 824 | membank("bank1")->configure_entries(0, 2, &RAM[0x8000], 0x8000); |
| 807 | 825 | } |
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| 963 | 981 | data &= ~0x14; |
| 964 | 982 | |
| 965 | 983 | /* -INT0 signal */ |
| 966 | | data |= 4;//(clock_signal() ? 0x04 : 0x00); |
| 984 | data |= 4; |
| 967 | 985 | |
| 968 | 986 | /* T0 signal */ |
| 969 | | data |= 0;//(data_signal() ? 0x00 : 0x10); |
| 987 | data |= 0; |
| 970 | 988 | |
| 971 | 989 | return data; |
| 972 | 990 | } |