Previous 199869 Revisions Next

r22847 Thursday 16th May, 2013 at 09:23:46 UTC by smf
changed i/o to 8/16 bit & removed the flash trampolines in the driver.(nw)
[src/emu/machine]idectrl.c idectrl.h
[src/mame/drivers]taitogn.c

trunk/src/emu/machine/idectrl.c
r22846r22847
16311631}
16321632
16331633
1634READ32_DEVICE_HANDLER( ide_controller32_pcmcia_r )
1634READ32_DEVICE_HANDLER( ide_controller16_pcmcia_r )
16351635{
16361636   ide_controller_device *ide = (ide_controller_device *) device;
16371637
16381638   int size;
1639   UINT32 res = 0xffffffff;
1639   UINT32 res = 0xffff;
16401640
1641   offset *= 4;
1642   size = convert_to_offset_and_size32(&offset, mem_mask);
1641   offset *= 2;
1642   size = convert_to_offset_and_size16(&offset, mem_mask);
16431643
16441644   if (offset < 0x008)
16451645      res = ide->ide_controller_read(0, offset & 7, size);
16461646   if (offset >= 0x008 && offset < 0x010)
16471647      res = ide->ide_controller_read(1, offset & 7, size);
16481648
1649   return res << ((offset & 3) * 8);
1649   return res << ((offset & 1) * 8);
16501650}
16511651
16521652
1653WRITE32_DEVICE_HANDLER( ide_controller32_pcmcia_w )
1653WRITE32_DEVICE_HANDLER( ide_controller16_pcmcia_w )
16541654{
16551655   int size;
16561656
16571657   ide_controller_device *ide = (ide_controller_device *) device;
16581658
1659   offset *= 4;
1660   size = convert_to_offset_and_size32(&offset, mem_mask);
1661   data = data >> ((offset & 3) * 8);
1659   offset *= 2;
1660   size = convert_to_offset_and_size16(&offset, mem_mask);
1661   data = data >> ((offset & 1) * 8);
16621662
16631663   if (offset < 0x008)
16641664      ide->ide_controller_write(0, offset & 7, size, data);
trunk/src/emu/machine/idectrl.h
r22846r22847
162162
163163DECLARE_READ32_DEVICE_HANDLER( ide_controller32_r );
164164DECLARE_WRITE32_DEVICE_HANDLER( ide_controller32_w );
165DECLARE_READ32_DEVICE_HANDLER( ide_controller32_pcmcia_r );
166DECLARE_WRITE32_DEVICE_HANDLER( ide_controller32_pcmcia_w );
165DECLARE_READ32_DEVICE_HANDLER( ide_controller16_pcmcia_r );
166DECLARE_WRITE32_DEVICE_HANDLER( ide_controller16_pcmcia_w );
167167DECLARE_READ32_DEVICE_HANDLER( ide_bus_master32_r );
168168DECLARE_WRITE32_DEVICE_HANDLER( ide_bus_master32_w );
169169
trunk/src/mame/drivers/taitogn.c
r22846r22847
337337      m_znsec0(*this,"maincpu:sio0:znsec0"),
338338      m_znsec1(*this,"maincpu:sio0:znsec1"),
339339      m_zndip(*this,"maincpu:sio0:zndip"),
340      m_card(*this,"card"),
340341      m_maincpu(*this, "maincpu"),
341342      m_mn10200(*this, "mn10200") {
342343   }
r22846r22847
344345   required_device<znsec_device> m_znsec0;
345346   required_device<znsec_device> m_znsec1;
346347   required_device<zndip_device> m_zndip;
348   required_device<ide_controller_device> m_card;
347349
348350   intel_te28f160_device *m_biosflash;
349351   intel_e28f400_device *m_pgmflash;
r22846r22847
354356
355357   unsigned char m_rf5c296_reg;
356358
357   UINT32 m_control;
358   UINT32 m_control2;
359   UINT32 m_control3;
359   UINT8 m_control;
360   UINT16 m_control2;
361   UINT8 m_control3;
360362   int m_v;
361363
362   UINT32 m_n_znsecsel;
364   UINT8 m_n_znsecsel;
363365
364   UINT32 m_coin_info;
366   UINT8 m_coin_info;
365367   UINT32 m_mux_data;
366   DECLARE_WRITE32_MEMBER(rf5c296_io_w);
367   DECLARE_READ32_MEMBER(rf5c296_io_r);
368   DECLARE_READ32_MEMBER(rf5c296_mem_r);
369   DECLARE_WRITE32_MEMBER(rf5c296_mem_w);
370   DECLARE_READ32_MEMBER(flash_subbios_r);
371   DECLARE_WRITE32_MEMBER(flash_subbios_w);
372   DECLARE_READ32_MEMBER(flash_mn102_r);
373   DECLARE_WRITE32_MEMBER(flash_mn102_w);
374   DECLARE_READ32_MEMBER(flash_s1_r);
375   DECLARE_WRITE32_MEMBER(flash_s1_w);
376   DECLARE_READ32_MEMBER(flash_s2_r);
377   DECLARE_WRITE32_MEMBER(flash_s2_w);
378   DECLARE_READ32_MEMBER(flash_s3_r);
379   DECLARE_WRITE32_MEMBER(flash_s3_w);
380   DECLARE_READ32_MEMBER(control_r);
381   DECLARE_WRITE32_MEMBER(control_w);
382   DECLARE_WRITE32_MEMBER(control2_w);
383   DECLARE_READ32_MEMBER(control3_r);
384   DECLARE_WRITE32_MEMBER(control3_w);
385   DECLARE_READ32_MEMBER(gn_1fb70000_r);
386   DECLARE_WRITE32_MEMBER(gn_1fb70000_w);
387   DECLARE_READ32_MEMBER(hack1_r);
388   DECLARE_READ32_MEMBER(znsecsel_r);
389   DECLARE_WRITE32_MEMBER(znsecsel_w);
390   DECLARE_READ32_MEMBER(boardconfig_r);
391   DECLARE_WRITE32_MEMBER(coin_w);
392   DECLARE_READ32_MEMBER(coin_r);
393   DECLARE_READ32_MEMBER(gnet_mahjong_panel_r);
368   DECLARE_WRITE16_MEMBER(rf5c296_io_w);
369   DECLARE_READ16_MEMBER(rf5c296_io_r);
370   DECLARE_READ16_MEMBER(rf5c296_mem_r);
371   DECLARE_WRITE16_MEMBER(rf5c296_mem_w);
372   DECLARE_READ8_MEMBER(control_r);
373   DECLARE_WRITE8_MEMBER(control_w);
374   DECLARE_WRITE16_MEMBER(control2_w);
375   DECLARE_READ8_MEMBER(control3_r);
376   DECLARE_WRITE8_MEMBER(control3_w);
377   DECLARE_READ16_MEMBER(gn_1fb70000_r);
378   DECLARE_WRITE16_MEMBER(gn_1fb70000_w);
379   DECLARE_READ16_MEMBER(hack1_r);
380   DECLARE_READ8_MEMBER(znsecsel_r);
381   DECLARE_WRITE8_MEMBER(znsecsel_w);
382   DECLARE_READ8_MEMBER(boardconfig_r);
383   DECLARE_WRITE8_MEMBER(coin_w);
384   DECLARE_READ8_MEMBER(coin_r);
385   DECLARE_READ8_MEMBER(gnet_mahjong_panel_r);
394386   DECLARE_DRIVER_INIT(coh3002t_mp);
395387   DECLARE_DRIVER_INIT(coh3002t);
396388   DECLARE_MACHINE_RESET(coh3002t);
397389   void rf5c296_reg_w(ATTR_UNUSED UINT8 reg, UINT8 data);
398390   UINT8 rf5c296_reg_r(ATTR_UNUSED UINT8 reg);
399   UINT32 gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_mask);
400   void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
401391   void install_handlers(int mode);
402392   required_device<cpu_device> m_maincpu;
403393   required_device<cpu_device> m_mn10200;
r22846r22847
416406         // Check for card reset
417407         if (!(data & 0x40))
418408         {
419            ide_controller_device *card = (ide_controller_device *) machine().device(":card");
420
421            card->reset();
409            m_card->reset();
422410            m_locked = 0x1ff;
423            card->ide_set_gnet_readlock(1);
411            m_card->ide_set_gnet_readlock(1);
424412         }
425413      break;
426414
r22846r22847
435423   return 0x00;
436424}
437425
438WRITE32_MEMBER(taitogn_state::rf5c296_io_w)
426WRITE16_MEMBER(taitogn_state::rf5c296_io_w)
439427{
440   if(offset < 2) {
441      ide_controller32_pcmcia_w(machine().device(":card"), space, offset, data, mem_mask);
428   if(offset < 4) {
429      ide_controller16_pcmcia_w(m_card, space, offset, data, mem_mask);
442430      return;
443431   }
444432
445   if(offset == 0x3e0/4) {
433   if(offset == 0x3e0/2)
434   {
446435      if(ACCESSING_BITS_0_7)
447436         m_rf5c296_reg = data;
448437      if(ACCESSING_BITS_8_15)
r22846r22847
450439   }
451440}
452441
453READ32_MEMBER(taitogn_state::rf5c296_io_r)
442READ16_MEMBER(taitogn_state::rf5c296_io_r)
454443{
455   if(offset < 2)
456      return ide_controller32_pcmcia_r(machine().device(":card"), space, offset, mem_mask);
444   if(offset < 4)
445      return ide_controller16_pcmcia_r(m_card, space, offset, mem_mask);
457446
458   offset *= 4;
447   offset *= 2;
459448
460   if(offset == 0x3e0/4) {
461      UINT32 res = 0xffff0000;
449   if(offset == 0x3e0/2)
450   {
451      UINT32 res = 0x0000;
462452      if(ACCESSING_BITS_0_7)
463453         res |= m_rf5c296_reg;
464454      if(ACCESSING_BITS_8_15)
r22846r22847
466456      return res;
467457   }
468458
469   return 0xffffffff;
459   return 0xffff;
470460}
471461
472462// Hardcoded to reach the pcmcia CIS
473463
474READ32_MEMBER(taitogn_state::rf5c296_mem_r)
464READ16_MEMBER(taitogn_state::rf5c296_mem_r)
475465{
476   if(offset < 0x80)
477      return (m_cis[offset*2+1] << 16) | m_cis[offset*2];
466   if(offset < 0x100)
467      return m_cis[offset];
478468
479469   switch(offset) {
480   case 0x080: return 0x00800041;
481   case 0x081: return 0x0000002e;
482   case 0x100: return m_locked ? 0x00010000 : 0;
470   case 0x100: return 0x0041;
471   case 0x101: return 0x0080;
472   case 0x102: return 0x002e;
473   case 0x201: return m_locked ? 0x0001 : 0;
483474   default:
484475      return 0;
485476   }
486477}
487478
488WRITE32_MEMBER(taitogn_state::rf5c296_mem_w)
479WRITE16_MEMBER(taitogn_state::rf5c296_mem_w)
489480{
490   if(offset >= 0x140 && offset <= 0x144) {
481   if(offset >= 0x280 && offset <= 0x288) {
491482      dynamic_buffer key(get_disk_handle(machine(), ":drive_0")->hunk_bytes());
492483
493      int pos = (offset - 0x140)*2;
494      UINT8 v, k;
495      if(ACCESSING_BITS_16_23) {
496         v = data >> 16;
497         pos++;
498      } else
499         v = data;
484      int pos = offset - 0x280;
485      UINT8 v = data, k;
500486      get_disk_handle(machine(), ":drive_0")->read_metadata(HARD_DISK_KEY_METADATA_TAG, 0, key);
501487      k = pos < key.count() ? key[pos] : 0;
502488      if(v == k)
r22846r22847
505491         m_locked |= 1 << pos;
506492      if (!m_locked)
507493      {
508         ide_controller_device *card = (ide_controller_device *) machine().device(":card");
509         card->ide_set_gnet_readlock(0);
494         m_card->ide_set_gnet_readlock(0);
510495      }
511496   }
512497}
513498
514
515// Flash handling
516
517UINT32 taitogn_state::gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_mask)
518{
519   UINT32 res = 0;
520   offset *= 2;
521   if(ACCESSING_BITS_0_15)
522      res |= device->read(offset);
523   if(ACCESSING_BITS_16_31)
524      res |= device->read(offset+1) << 16;
525   return res;
526}
527
528void taitogn_state::gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask)
529{
530   offset *= 2;
531   if(ACCESSING_BITS_0_15)
532      device->write(offset, data);
533   if(ACCESSING_BITS_16_31)
534      device->write(offset+1, data >> 16);
535}
536
537
538READ32_MEMBER(taitogn_state::flash_subbios_r)
539{
540   return gen_flash_r(m_biosflash, offset, mem_mask);
541}
542
543WRITE32_MEMBER(taitogn_state::flash_subbios_w)
544{
545   gen_flash_w(m_biosflash, offset, data, mem_mask);
546}
547
548READ32_MEMBER(taitogn_state::flash_mn102_r)
549{
550   return gen_flash_r(m_pgmflash, offset, mem_mask);
551}
552
553WRITE32_MEMBER(taitogn_state::flash_mn102_w)
554{
555   gen_flash_w(m_pgmflash, offset, data, mem_mask);
556}
557
558READ32_MEMBER(taitogn_state::flash_s1_r)
559{
560   return gen_flash_r(m_sndflash[0], offset, mem_mask);
561}
562
563WRITE32_MEMBER(taitogn_state::flash_s1_w)
564{
565   gen_flash_w(m_sndflash[0], offset, data, mem_mask);
566}
567
568READ32_MEMBER(taitogn_state::flash_s2_r)
569{
570   return gen_flash_r(m_sndflash[1], offset, mem_mask);
571}
572
573WRITE32_MEMBER(taitogn_state::flash_s2_w)
574{
575   gen_flash_w(m_sndflash[1], offset, data, mem_mask);
576}
577
578READ32_MEMBER(taitogn_state::flash_s3_r)
579{
580   return gen_flash_r(m_sndflash[2], offset, mem_mask);
581}
582
583WRITE32_MEMBER(taitogn_state::flash_s3_w)
584{
585   gen_flash_w(m_sndflash[2], offset, data, mem_mask);
586}
587
588499void taitogn_state::install_handlers(int mode)
589500{
590501   address_space &a = m_maincpu->space(AS_PROGRAM);
591502   if(mode == 0) {
592503      // Mode 0 has access to the subbios, the mn102 flash and the rf5c296 mem zone
593      a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_subbios_r),this), write32_delegate(FUNC(taitogn_state::flash_subbios_w),this));
594      a.install_readwrite_handler(0x1f200000, 0x1f2fffff, read32_delegate(FUNC(taitogn_state::rf5c296_mem_r),this), write32_delegate(FUNC(taitogn_state::rf5c296_mem_w),this));
595      a.install_readwrite_handler(0x1f300000, 0x1f37ffff, read32_delegate(FUNC(taitogn_state::flash_mn102_r),this), write32_delegate(FUNC(taitogn_state::flash_mn102_w),this));
504      a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read16_delegate(FUNC(intelfsh16_device::read),m_biosflash), write16_delegate(FUNC(intel_te28f160_device::write),m_biosflash), 0xffffffff);
505      a.install_readwrite_handler(0x1f200000, 0x1f2fffff, read16_delegate(FUNC(taitogn_state::rf5c296_mem_r),this), write16_delegate(FUNC(taitogn_state::rf5c296_mem_w),this), 0xffffffff);
506      a.install_readwrite_handler(0x1f300000, 0x1f37ffff, read16_delegate(FUNC(intelfsh16_device::read),m_pgmflash), write16_delegate(FUNC(intelfsh16_device::write),m_pgmflash), 0xffffffff);
596507      a.nop_readwrite(0x1f380000, 0x1f5fffff);
597508
598509   } else {
599510      // Mode 1 has access to the 3 samples flashes
600      a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_s1_r),this), write32_delegate(FUNC(taitogn_state::flash_s1_w),this));
601      a.install_readwrite_handler(0x1f200000, 0x1f3fffff, read32_delegate(FUNC(taitogn_state::flash_s2_r),this), write32_delegate(FUNC(taitogn_state::flash_s2_w),this));
602      a.install_readwrite_handler(0x1f400000, 0x1f5fffff, read32_delegate(FUNC(taitogn_state::flash_s3_r),this), write32_delegate(FUNC(taitogn_state::flash_s3_w),this));
511      a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read16_delegate(FUNC(intelfsh16_device::read),m_sndflash[0]), write16_delegate(FUNC(intelfsh16_device::write),m_sndflash[0]), 0xffffffff);
512      a.install_readwrite_handler(0x1f200000, 0x1f3fffff, read16_delegate(FUNC(intelfsh16_device::read),m_sndflash[1]), write16_delegate(FUNC(intelfsh16_device::write),m_sndflash[1]), 0xffffffff);
513      a.install_readwrite_handler(0x1f400000, 0x1f5fffff, read16_delegate(FUNC(intelfsh16_device::read),m_sndflash[2]), write16_delegate(FUNC(intelfsh16_device::write),m_sndflash[2]), 0xffffffff);
603514   }
604515}
605516
606517// Misc. controls
607518
608READ32_MEMBER(taitogn_state::control_r)
519READ8_MEMBER(taitogn_state::control_r)
609520{
610521   //      fprintf(stderr, "gn_r %08x @ %08x (%s)\n", 0x1fb00000+4*offset, mem_mask, machine().describe_context());
611522   return m_control;
612523}
613524
614WRITE32_MEMBER(taitogn_state::control_w)
525WRITE8_MEMBER(taitogn_state::control_w)
615526{
616527   // 20 = watchdog
617528   // 04 = select bank
r22846r22847
643554      install_handlers(m_control & 4 ? 1 : 0);
644555}
645556
646WRITE32_MEMBER(taitogn_state::control2_w)
557WRITE16_MEMBER(taitogn_state::control2_w)
647558{
648559   COMBINE_DATA(&m_control2);
649560}
650561
651READ32_MEMBER(taitogn_state::control3_r)
562READ8_MEMBER(taitogn_state::control3_r)
652563{
653564   return m_control3;
654565}
655566
656WRITE32_MEMBER(taitogn_state::control3_w)
567WRITE8_MEMBER(taitogn_state::control3_w)
657568{
658569   COMBINE_DATA(&m_control3);
659570}
660571
661READ32_MEMBER(taitogn_state::gn_1fb70000_r)
572READ16_MEMBER(taitogn_state::gn_1fb70000_r)
662573{
663574   // (1328) 1348 tests mask 0002, 8 times.
664575   // Called by 1434, exit at 143c
r22846r22847
670581   return 2;
671582}
672583
673WRITE32_MEMBER(taitogn_state::gn_1fb70000_w)
584WRITE16_MEMBER(taitogn_state::gn_1fb70000_w)
674585{
675586   // Writes 0 or 1 all the time, it *may* have somthing to do with
676587   // i/o port width, but then maybe not
677588}
678589
679READ32_MEMBER(taitogn_state::hack1_r)
590READ16_MEMBER(taitogn_state::hack1_r)
680591{
681   m_v = m_v ^ 8;
682   // Probably something to do with sound
683   return m_v;
592   switch(offset)
593   {
594   case 0:
595      m_v = m_v ^ 8;
596      // Probably something to do with sound
597      return m_v;
598   }
599
600   return 0;
684601}
685602
686603
r22846r22847
690607static const UINT8 tt10[ 8 ] = { 0x80, 0x20, 0x38, 0x08, 0xf1, 0x03, 0xfe, 0xfc };
691608static const UINT8 tt16[ 8 ] = { 0xc0, 0x04, 0xf9, 0xe1, 0x60, 0x70, 0xf2, 0x02 };
692609
693READ32_MEMBER(taitogn_state::znsecsel_r)
610READ8_MEMBER(taitogn_state::znsecsel_r)
694611{
695612   return m_n_znsecsel;
696613}
697614
698WRITE32_MEMBER(taitogn_state::znsecsel_w)
615WRITE8_MEMBER(taitogn_state::znsecsel_w)
699616{
700617   COMBINE_DATA( &m_n_znsecsel );
701618
r22846r22847
704621   m_zndip->select( ( m_n_znsecsel & 0x8c ) != 0x8c );
705622}
706623
707READ32_MEMBER(taitogn_state::boardconfig_r)
624READ8_MEMBER(taitogn_state::boardconfig_r)
708625{
709626   /*
710627   ------00 mem=4M
r22846r22847
729646}
730647
731648
732WRITE32_MEMBER(taitogn_state::coin_w)
649WRITE8_MEMBER(taitogn_state::coin_w)
733650{
734651   /* 0x01=counter
735652      0x02=coin lock 1
r22846r22847
737654      0x20=coin lock 2
738655      0x80=??
739656   */
740   COMBINE_DATA (&m_coin_info);
657   m_coin_info = data;
741658}
742659
743READ32_MEMBER(taitogn_state::coin_r)
660READ8_MEMBER(taitogn_state::coin_r)
744661{
745662   return m_coin_info;
746663}
747664
748665/* mahjong panel handler (for Usagi & Mahjong Oh) */
749READ32_MEMBER(taitogn_state::gnet_mahjong_panel_r)
666READ8_MEMBER(taitogn_state::gnet_mahjong_panel_r)
750667{
751668   m_mux_data = m_coin_info;
752669   m_mux_data &= 0xcc;
r22846r22847
785702DRIVER_INIT_MEMBER(taitogn_state,coh3002t_mp)
786703{
787704   DRIVER_INIT_CALL(coh3002t);
788   m_maincpu->space(AS_PROGRAM).install_read_handler(0x1fa10100, 0x1fa10103, read32_delegate(FUNC(taitogn_state::gnet_mahjong_panel_r),this));
705   m_maincpu->space(AS_PROGRAM).install_read_handler(0x1fa10100, 0x1fa10103, read8_delegate(FUNC(taitogn_state::gnet_mahjong_panel_r),this), 0x000000ff);
789706}
790707
791708MACHINE_RESET_MEMBER(taitogn_state,coh3002t)
r22846r22847
794711   install_handlers(0);
795712   m_control = 0;
796713
797   ide_controller_device *card = (ide_controller_device *) machine().device(":card");
798   card->reset();
799   card->ide_set_gnet_readlock(1);
714   m_card->reset();
715   m_card->ide_set_gnet_readlock(1);
800716
801717   // halt sound CPU since it has no valid program at start
802718   m_mn10200->set_input_line(INPUT_LINE_RESET,ASSERT_LINE); /* MCU */
803719}
804720
805721static ADDRESS_MAP_START( taitogn_map, AS_PROGRAM, 32, taitogn_state )
806   AM_RANGE(0x1f000000, 0x1f1fffff) AM_READWRITE(flash_s1_r, flash_s1_w)
807   AM_RANGE(0x1f200000, 0x1f3fffff) AM_READWRITE(flash_s2_r, flash_s2_w)
808   AM_RANGE(0x1f400000, 0x1f5fffff) AM_READWRITE(flash_s3_r, flash_s3_w)
722//   AM_RANGE(0x1f000000, 0x1f1fffff) AM_DEVREADWRITE16("sndflash0", intelfsh16_device, read, write, 0xffffffff)
723//   AM_RANGE(0x1f200000, 0x1f3fffff) AM_DEVREADWRITE16("sndflash1", intelfsh16_device, read, write, 0xffffffff)
724//   AM_RANGE(0x1f400000, 0x1f5fffff) AM_DEVREADWRITE16("sndflash2", intelfsh16_device, read, write, 0xffffffff)
809725   AM_RANGE(0x1fa00000, 0x1fa00003) AM_READ_PORT("P1")
810726   AM_RANGE(0x1fa00100, 0x1fa00103) AM_READ_PORT("P2")
811727   AM_RANGE(0x1fa00200, 0x1fa00203) AM_READ_PORT("SERVICE")
812728   AM_RANGE(0x1fa00300, 0x1fa00303) AM_READ_PORT("SYSTEM")
813729   AM_RANGE(0x1fa10000, 0x1fa10003) AM_READ_PORT("P3")
814730   AM_RANGE(0x1fa10100, 0x1fa10103) AM_READ_PORT("P4")
815   AM_RANGE(0x1fa10200, 0x1fa10203) AM_READ(boardconfig_r)
816   AM_RANGE(0x1fa10300, 0x1fa10303) AM_READWRITE(znsecsel_r, znsecsel_w)
817   AM_RANGE(0x1fa20000, 0x1fa20003) AM_READWRITE(coin_r, coin_w)
818   AM_RANGE(0x1fa30000, 0x1fa30003) AM_READWRITE(control3_r, control3_w)
731   AM_RANGE(0x1fa10200, 0x1fa10203) AM_READ8(boardconfig_r, 0x000000ff)
732   AM_RANGE(0x1fa10300, 0x1fa10303) AM_READWRITE8(znsecsel_r, znsecsel_w, 0x000000ff)
733   AM_RANGE(0x1fa20000, 0x1fa20003) AM_READWRITE8(coin_r, coin_w, 0x000000ff)
734   AM_RANGE(0x1fa30000, 0x1fa30003) AM_READWRITE8(control3_r, control3_w, 0x000000ff)
819735   AM_RANGE(0x1fa51c00, 0x1fa51dff) AM_READNOP // systematic read at spu_address + 250000, result dropped, maybe other accesses
820   AM_RANGE(0x1fa60000, 0x1fa60003) AM_READ(hack1_r)
736   AM_RANGE(0x1fa60000, 0x1fa60003) AM_READ16(hack1_r, 0xffffffff)
821737   AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8("at28c16", at28c16_device, read, write, 0xffffffff) /* eeprom */
822   AM_RANGE(0x1fb00000, 0x1fb0ffff) AM_READWRITE(rf5c296_io_r, rf5c296_io_w)
823   AM_RANGE(0x1fb40000, 0x1fb40003) AM_READWRITE(control_r, control_w)
824   AM_RANGE(0x1fb60000, 0x1fb60003) AM_WRITE(control2_w)
825   AM_RANGE(0x1fb70000, 0x1fb70003) AM_READWRITE(gn_1fb70000_r, gn_1fb70000_w)
738   AM_RANGE(0x1fb00000, 0x1fb0ffff) AM_READWRITE16(rf5c296_io_r, rf5c296_io_w, 0xffffffff)
739   AM_RANGE(0x1fb40000, 0x1fb40003) AM_READWRITE8(control_r, control_w, 0x000000ff)
740   AM_RANGE(0x1fb60000, 0x1fb60003) AM_WRITE16(control2_w, 0x0000ffff)
741   AM_RANGE(0x1fb70000, 0x1fb70003) AM_READWRITE16(gn_1fb70000_r, gn_1fb70000_w, 0x0000ffff)
826742   AM_RANGE(0x1fbe0000, 0x1fbe01ff) AM_RAM // 256 bytes com zone with the mn102, low bytes of words only, with additional comm at 1fb80000
827743ADDRESS_MAP_END
828744

Previous 199869 Revisions Next

© 1997-2024 The MAME Team