trunk/src/emu/machine/pic8259.h
r22842 | r22843 | |
25 | 25 | #ifndef __PIC8259_H__ |
26 | 26 | #define __PIC8259_H__ |
27 | 27 | |
28 | | #include "devlegcy.h" |
29 | 28 | #include "devcb.h" |
30 | 29 | |
| 30 | |
| 31 | /*************************************************************************** |
| 32 | DEVICE CONFIGURATION MACROS |
| 33 | ***************************************************************************/ |
| 34 | |
| 35 | #define MCFG_PIC8259_ADD(_tag, _out_int, _sp_en, _read_slave_ack) \ |
| 36 | MCFG_DEVICE_ADD(_tag, PIC8259, 0) \ |
| 37 | devcb = &pic8259_device::static_set_out_int_callback( *device, DEVCB2_##_out_int ); \ |
| 38 | devcb = &pic8259_device::static_set_sp_en_callback( *device, DEVCB2_##_sp_en ); \ |
| 39 | devcb = &pic8259_device::static_set_read_slave_ack_callback( *device, DEVCB2_##_read_slave_ack ); |
| 40 | |
| 41 | |
31 | 42 | class pic8259_device : public device_t |
32 | 43 | { |
33 | 44 | public: |
34 | 45 | pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
35 | 46 | |
| 47 | template<class _Object> static devcb2_base &static_set_out_int_callback(device_t &device, _Object object) { return downcast<pic8259_device &>(device).m_out_int_func.set_callback(object); } |
| 48 | template<class _Object> static devcb2_base &static_set_sp_en_callback(device_t &device, _Object object) { return downcast<pic8259_device &>(device).m_sp_en_func.set_callback(object); } |
| 49 | template<class _Object> static devcb2_base &static_set_read_slave_ack_callback(device_t &device, _Object object) { return downcast<pic8259_device &>(device).m_read_slave_ack_func.set_callback(object); } |
| 50 | |
36 | 51 | DECLARE_READ8_MEMBER( read ); |
37 | 52 | DECLARE_WRITE8_MEMBER( write ); |
38 | 53 | UINT32 acknowledge(); |
r22842 | r22843 | |
50 | 65 | |
51 | 66 | protected: |
52 | 67 | // device-level overrides |
53 | | virtual void device_config_complete(); |
54 | 68 | virtual void device_start(); |
55 | 69 | virtual void device_reset(); |
56 | 70 | virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); |
r22842 | r22843 | |
71 | 85 | STATE_READY |
72 | 86 | }; |
73 | 87 | |
74 | | devcb_resolved_write_line m_out_int_func; |
75 | | devcb_resolved_read_line m_sp_en_func; |
76 | | devcb_resolved_read8 m_read_slave_ack_func; |
| 88 | devcb2_write_line m_out_int_func; |
| 89 | devcb2_read_line m_sp_en_func; |
| 90 | devcb2_read8 m_read_slave_ack_func; |
77 | 91 | |
78 | 92 | pic8259_state_t m_state; |
79 | 93 | |
r22842 | r22843 | |
109 | 123 | |
110 | 124 | extern const device_type PIC8259; |
111 | 125 | |
112 | | |
113 | | /*************************************************************************** |
114 | | TYPE DEFINITIONS |
115 | | ***************************************************************************/ |
116 | | |
117 | | struct pic8259_interface |
118 | | { |
119 | | /* Called when int line changes */ |
120 | | devcb_write_line out_int_func; |
121 | | /* 1 - when master, 0 - when slave */ |
122 | | devcb_read_line sp_en_func; |
123 | | /* Called when on master slave irq is trigered*/ |
124 | | devcb_read8 read_slave_ack_func; |
125 | | }; |
126 | | |
127 | | |
128 | | /*************************************************************************** |
129 | | DEVICE CONFIGURATION MACROS |
130 | | ***************************************************************************/ |
131 | | |
132 | | #define MCFG_PIC8259_ADD(_tag, _intrf) \ |
133 | | MCFG_DEVICE_ADD(_tag, PIC8259, 0) \ |
134 | | MCFG_DEVICE_CONFIG(_intrf) |
135 | | |
136 | | |
137 | 126 | #endif /* __PIC8259_H__ */ |
trunk/src/mess/drivers/cbm2.c
r22842 | r22843 | |
1688 | 1688 | return m_ext_pic->inta_r(); |
1689 | 1689 | } |
1690 | 1690 | |
1691 | | static pic8259_interface ext_pic_intf = |
1692 | | { |
1693 | | DEVCB_CPU_INPUT_LINE(EXT_I8088_TAG, INPUT_LINE_IRQ0), |
1694 | | DEVCB_LINE_VCC, |
1695 | | DEVCB_NULL |
1696 | | }; |
1697 | 1691 | |
1698 | | |
1699 | 1692 | //------------------------------------------------- |
1700 | 1693 | // tpi6525_interface ext_tpi_intf |
1701 | 1694 | //------------------------------------------------- |
r22842 | r22843 | |
2431 | 2424 | MCFG_CPU_PROGRAM_MAP(ext_mem) |
2432 | 2425 | MCFG_CPU_IO_MAP(ext_io) |
2433 | 2426 | |
2434 | | MCFG_PIC8259_ADD(EXT_I8259A_TAG, ext_pic_intf) |
| 2427 | MCFG_PIC8259_ADD(EXT_I8259A_TAG, INPUTLINE(EXT_I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL) |
2435 | 2428 | MCFG_TPI6525_ADD(EXT_MOS6525_TAG, ext_tpi_intf) |
2436 | 2429 | MCFG_MOS6526_ADD(EXT_MOS6526_TAG, XTAL_18MHz/9, 60, DEVWRITELINE(DEVICE_SELF, cbm2_state, ext_cia_irq_w)) |
2437 | 2430 | MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, cnt_w), DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, sp_w)) |
r22842 | r22843 | |
2490 | 2483 | MCFG_CPU_PROGRAM_MAP(ext_mem) |
2491 | 2484 | MCFG_CPU_IO_MAP(ext_io) |
2492 | 2485 | |
2493 | | MCFG_PIC8259_ADD(EXT_I8259A_TAG, ext_pic_intf) |
| 2486 | MCFG_PIC8259_ADD(EXT_I8259A_TAG, INPUTLINE(EXT_I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL) |
2494 | 2487 | MCFG_TPI6525_ADD(EXT_MOS6525_TAG, ext_tpi_intf) |
2495 | 2488 | MCFG_MOS6526_ADD(EXT_MOS6526_TAG, XTAL_18MHz/9, 50, DEVWRITELINE(DEVICE_SELF, cbm2_state, ext_cia_irq_w)) |
2496 | 2489 | MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, cnt_w), DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, sp_w)) |
trunk/src/mess/drivers/qx10.c
r22842 | r22843 | |
564 | 564 | return 0x00; |
565 | 565 | } |
566 | 566 | |
567 | | static const struct pic8259_interface qx10_pic8259_master_config = |
568 | | { |
569 | | DEVCB_DRIVER_LINE_MEMBER(qx10_state, qx10_pic8259_master_set_int_line), |
570 | | DEVCB_LINE_VCC, |
571 | | DEVCB_DRIVER_MEMBER(qx10_state, get_slave_ack) |
572 | | }; |
573 | 567 | |
574 | 568 | /* |
575 | 569 | Slave PIC8259 |
r22842 | r22843 | |
584 | 578 | |
585 | 579 | */ |
586 | 580 | |
587 | | static const struct pic8259_interface qx10_pic8259_slave_config = |
588 | | { |
589 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w), |
590 | | DEVCB_LINE_GND, |
591 | | DEVCB_NULL |
592 | | }; |
593 | | |
594 | 581 | IRQ_CALLBACK_MEMBER(qx10_state::irq_callback) |
595 | 582 | { |
596 | 583 | return m_pic_m->acknowledge(); |
r22842 | r22843 | |
1048 | 1035 | /* Devices */ |
1049 | 1036 | MCFG_PIT8253_ADD("pit8253_1", qx10_pit8253_1_config) |
1050 | 1037 | MCFG_PIT8253_ADD("pit8253_2", qx10_pit8253_2_config) |
1051 | | MCFG_PIC8259_ADD("pic8259_master", qx10_pic8259_master_config) |
1052 | | MCFG_PIC8259_ADD("pic8259_slave", qx10_pic8259_slave_config) |
| 1038 | MCFG_PIC8259_ADD("pic8259_master", WRITELINE(qx10_state, qx10_pic8259_master_set_int_line), VCC, READ8(qx10_state, get_slave_ack)) |
| 1039 | MCFG_PIC8259_ADD("pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL) |
1053 | 1040 | MCFG_UPD7201_ADD("upd7201", MAIN_CLK/4, qx10_upd7201_interface) |
1054 | 1041 | MCFG_I8255_ADD("i8255", qx10_i8255_interface) |
1055 | 1042 | MCFG_I8237_ADD("8237dma_1", MAIN_CLK/4, qx10_dma8237_1_interface) |
trunk/src/mess/drivers/apc.c
r22842 | r22843 | |
898 | 898 | return 0x00; |
899 | 899 | } |
900 | 900 | |
901 | | static const struct pic8259_interface pic8259_master_config = |
902 | | { |
903 | | DEVCB_DRIVER_LINE_MEMBER(apc_state, apc_master_set_int_line), |
904 | | DEVCB_LINE_VCC, |
905 | | DEVCB_DRIVER_MEMBER(apc_state,get_slave_ack) |
906 | | }; |
907 | | |
908 | | static const struct pic8259_interface pic8259_slave_config = |
909 | | { |
910 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w), //TODO: check me |
911 | | DEVCB_LINE_GND, |
912 | | DEVCB_NULL |
913 | | }; |
914 | | |
915 | 901 | /**************************************** |
916 | 902 | * |
917 | 903 | * I8237 DMA interface |
r22842 | r22843 | |
1030 | 1016 | MCFG_CPU_IO_MAP(apc_io) |
1031 | 1017 | |
1032 | 1018 | MCFG_PIT8253_ADD( "pit8253", pit8253_config ) |
1033 | | MCFG_PIC8259_ADD( "pic8259_master", pic8259_master_config ) |
1034 | | MCFG_PIC8259_ADD( "pic8259_slave", pic8259_slave_config ) |
| 1019 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(apc_state, apc_master_set_int_line), VCC, READ8(apc_state,get_slave_ack) ) |
| 1020 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: check ir7_w |
1035 | 1021 | MCFG_I8237_ADD("i8237", MAIN_CLOCK, dmac_intf) |
1036 | 1022 | |
1037 | 1023 | MCFG_NVRAM_ADD_1FILL("cmos") |
trunk/src/mess/drivers/pc9801.c
r22842 | r22843 | |
2930 | 2930 | return 0x00; |
2931 | 2931 | } |
2932 | 2932 | |
2933 | | static const struct pic8259_interface pic8259_master_config = |
2934 | | { |
2935 | | DEVCB_DRIVER_LINE_MEMBER(pc9801_state, pc9801_master_set_int_line), |
2936 | | DEVCB_LINE_VCC, |
2937 | | DEVCB_DRIVER_MEMBER(pc9801_state,get_slave_ack) |
2938 | | }; |
2939 | | |
2940 | | static const struct pic8259_interface pic8259_slave_config = |
2941 | | { |
2942 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w), //TODO: check me |
2943 | | DEVCB_LINE_GND, |
2944 | | DEVCB_NULL |
2945 | | }; |
2946 | | |
2947 | 2933 | /**************************************** |
2948 | 2934 | * |
2949 | 2935 | * I8253 PIT interface |
r22842 | r22843 | |
3571 | 3557 | |
3572 | 3558 | MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config ) |
3573 | 3559 | MCFG_I8237_ADD("i8237", 5000000, dmac_intf) // unknown clock |
3574 | | MCFG_PIC8259_ADD( "pic8259_master", pic8259_master_config ) |
3575 | | MCFG_PIC8259_ADD( "pic8259_slave", pic8259_slave_config ) |
| 3560 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) ) |
| 3561 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w |
3576 | 3562 | MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf ) |
3577 | 3563 | MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf ) |
3578 | 3564 | MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf ) |
r22842 | r22843 | |
3640 | 3626 | |
3641 | 3627 | MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config ) |
3642 | 3628 | MCFG_I8237_ADD("i8237", MAIN_CLOCK_X1*8, pc9801rs_dmac_intf) // unknown clock |
3643 | | MCFG_PIC8259_ADD( "pic8259_master", pic8259_master_config ) |
3644 | | MCFG_PIC8259_ADD( "pic8259_slave", pic8259_slave_config ) |
| 3629 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) ) |
| 3630 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w |
3645 | 3631 | MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf ) |
3646 | 3632 | MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf ) |
3647 | 3633 | MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf ) |
r22842 | r22843 | |
3706 | 3692 | |
3707 | 3693 | MCFG_PIT8253_ADD( "pit8253", pc9821_pit8253_config ) |
3708 | 3694 | MCFG_I8237_ADD("i8237", 16000000, pc9801rs_dmac_intf) // unknown clock |
3709 | | MCFG_PIC8259_ADD( "pic8259_master", pic8259_master_config ) |
3710 | | MCFG_PIC8259_ADD( "pic8259_slave", pic8259_slave_config ) |
| 3695 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) ) |
| 3696 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w |
3711 | 3697 | MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf ) |
3712 | 3698 | MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf ) |
3713 | 3699 | MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf ) |
trunk/src/mess/drivers/fmtowns.c
r22842 | r22843 | |
2691 | 2691 | } |
2692 | 2692 | return 0x00; |
2693 | 2693 | } |
2694 | | static const struct pic8259_interface towns_pic8259_master_config = |
2695 | | { |
2696 | | DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_pic_irq), |
2697 | | DEVCB_LINE_VCC, |
2698 | | DEVCB_DRIVER_MEMBER(towns_state,get_slave_ack) |
2699 | | }; |
2700 | 2694 | |
2701 | | |
2702 | | static const struct pic8259_interface towns_pic8259_slave_config = |
2703 | | { |
2704 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w), |
2705 | | DEVCB_LINE_GND, |
2706 | | DEVCB_NULL |
2707 | | }; |
2708 | | |
2709 | 2695 | static const wd17xx_interface towns_mb8877a_interface = |
2710 | 2696 | { |
2711 | 2697 | DEVCB_NULL, |
r22842 | r22843 | |
2820 | 2806 | MCFG_PIT8253_ADD("pit",towns_pit8253_config) |
2821 | 2807 | MCFG_PIT8253_ADD("pit2",towns_pit8253_config_2) |
2822 | 2808 | |
2823 | | MCFG_PIC8259_ADD( "pic8259_master", towns_pic8259_master_config ) |
| 2809 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(towns_state,towns_pic_irq), VCC, READ8(towns_state,get_slave_ack)) |
2824 | 2810 | |
2825 | | MCFG_PIC8259_ADD( "pic8259_slave", towns_pic8259_slave_config ) |
| 2811 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL) |
2826 | 2812 | |
2827 | 2813 | MCFG_MB8877_ADD("fdc",towns_mb8877a_interface) |
2828 | 2814 | MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(towns_floppy_interface) |
trunk/src/mess/drivers/tandy2k.c
r22842 | r22843 | |
568 | 568 | |
569 | 569 | */ |
570 | 570 | |
571 | | static const struct pic8259_interface pic0_intf = |
572 | | { |
573 | | DEVCB_CPU_INPUT_LINE(I80186_TAG, INPUT_LINE_INT0), |
574 | | DEVCB_LINE_VCC, |
575 | | DEVCB_NULL |
576 | | }; |
577 | | |
578 | 571 | /* |
579 | 572 | |
580 | 573 | IR0 KBDINT10 |
r22842 | r22843 | |
588 | 581 | |
589 | 582 | */ |
590 | 583 | |
591 | | static const struct pic8259_interface pic1_intf = |
592 | | { |
593 | | DEVCB_CPU_INPUT_LINE(I80186_TAG, INPUT_LINE_INT1), |
594 | | DEVCB_LINE_VCC, |
595 | | DEVCB_NULL |
596 | | }; |
597 | | |
598 | 584 | // Intel 8272 Interface |
599 | 585 | |
600 | 586 | void tandy2k_state::fdc_irq(bool state) |
r22842 | r22843 | |
715 | 701 | MCFG_I8255A_ADD(I8255A_TAG, ppi_intf) |
716 | 702 | MCFG_I8251_ADD(I8251A_TAG, usart_intf) |
717 | 703 | MCFG_PIT8253_ADD(I8253_TAG, pit_intf) |
718 | | MCFG_PIC8259_ADD(I8259A_0_TAG, pic0_intf) |
719 | | MCFG_PIC8259_ADD(I8259A_1_TAG, pic1_intf) |
| 704 | MCFG_PIC8259_ADD(I8259A_0_TAG, INPUTLINE(I80186_TAG, INPUT_LINE_INT0), VCC, NULL) |
| 705 | MCFG_PIC8259_ADD(I8259A_1_TAG, INPUTLINE(I80186_TAG, INPUT_LINE_INT1), VCC, NULL) |
720 | 706 | MCFG_I8272A_ADD(I8272A_TAG, true) |
721 | 707 | MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":0", tandy2k_floppies, "525qd", 0, floppy_image_device::default_floppy_formats) |
722 | 708 | MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":1", tandy2k_floppies, "525qd", 0, floppy_image_device::default_floppy_formats) |
trunk/src/mess/drivers/z100.c
r22842 | r22843 | |
614 | 614 | return 0; |
615 | 615 | } |
616 | 616 | |
617 | | static const struct pic8259_interface z100_pic8259_master_config = |
618 | | { |
619 | | DEVCB_DRIVER_LINE_MEMBER(z100_state, z100_pic_irq), |
620 | | DEVCB_LINE_VCC, |
621 | | DEVCB_DRIVER_MEMBER(z100_state, get_slave_ack) |
622 | | }; |
623 | | |
624 | | static const struct pic8259_interface z100_pic8259_slave_config = |
625 | | { |
626 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir3_w), |
627 | | DEVCB_LINE_GND, |
628 | | DEVCB_NULL |
629 | | }; |
630 | | |
631 | | |
632 | 617 | static MC6845_INTERFACE( mc6845_intf ) |
633 | 618 | { |
634 | 619 | "screen", /* screen we are acting on */ |
r22842 | r22843 | |
791 | 776 | /* Devices */ |
792 | 777 | MCFG_MC6845_ADD("crtc", MC6845, XTAL_14_31818MHz/8, mc6845_intf) /* unknown clock, hand tuned to get ~50/~60 fps */ |
793 | 778 | |
794 | | MCFG_PIC8259_ADD( "pic8259_master", z100_pic8259_master_config ) |
795 | | MCFG_PIC8259_ADD( "pic8259_slave", z100_pic8259_slave_config ) |
| 779 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(z100_state, z100_pic_irq), VCC, READ8(z100_state, get_slave_ack) ) |
| 780 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir3_w), GND, NULL ) |
796 | 781 | |
797 | 782 | MCFG_PIA6821_ADD("pia0", pia0_intf) |
798 | 783 | MCFG_PIA6821_ADD("pia1", pia1_intf) |
trunk/src/mess/drivers/compis.c
r22842 | r22843 | |
373 | 373 | /* Devices */ |
374 | 374 | MCFG_PIT8253_ADD( "pit8253", compis_pit8253_config ) |
375 | 375 | MCFG_PIT8254_ADD( "pit8254", compis_pit8254_config ) |
376 | | MCFG_PIC8259_ADD( "pic8259_master", compis_pic8259_master_config ) |
377 | | MCFG_PIC8259_ADD( "pic8259_slave", compis_pic8259_slave_config ) |
| 376 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(compis_state, compis_pic8259_master_set_int_line), VCC, READ8(compis_state, get_slave_ack) ) |
| 377 | MCFG_PIC8259_ADD( "pic8259_slave", WRITELINE(compis_state, compis_pic8259_slave_set_int_line), GND, NULL ) |
378 | 378 | MCFG_I8255_ADD( "ppi8255", compis_ppi_interface ) |
379 | 379 | MCFG_UPD7220_ADD("upd7220", XTAL_4_433619MHz/2, hgdc_intf, upd7220_map) //unknown clock |
380 | 380 | MCFG_CENTRONICS_PRINTER_ADD("centronics", standard_centronics) |
r22842 | r22843 | |
413 | 413 | /* Devices */ |
414 | 414 | MCFG_PIT8253_ADD( "pit8253", compis_pit8253_config ) |
415 | 415 | MCFG_PIT8254_ADD( "pit8254", compis_pit8254_config ) |
416 | | MCFG_PIC8259_ADD( "pic8259_master", compis_pic8259_master_config ) |
417 | | MCFG_PIC8259_ADD( "pic8259_slave", compis_pic8259_slave_config ) |
| 416 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(compis_state, compis_pic8259_master_set_int_line), VCC, READ8(compis_state, get_slave_ack) ) |
| 417 | MCFG_PIC8259_ADD( "pic8259_slave", WRITELINE(compis_state, compis_pic8259_slave_set_int_line), GND, NULL ) |
418 | 418 | MCFG_I8255_ADD( "ppi8255", compis_ppi_interface ) |
419 | 419 | MCFG_UPD7220_ADD("upd7220", XTAL_4_433619MHz/2, hgdc_intf, upd7220_map) //unknown clock |
420 | 420 | MCFG_CENTRONICS_PRINTER_ADD("centronics", standard_centronics) |
trunk/src/mess/drivers/pc.c
r22842 | r22843 | |
995 | 995 | |
996 | 996 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
997 | 997 | |
998 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 998 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
999 | 999 | |
1000 | 1000 | MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) |
1001 | 1001 | |
r22842 | r22843 | |
1079 | 1079 | |
1080 | 1080 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1081 | 1081 | |
1082 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1082 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1083 | 1083 | |
1084 | 1084 | MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) |
1085 | 1085 | |
r22842 | r22843 | |
1131 | 1131 | |
1132 | 1132 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1133 | 1133 | |
1134 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1134 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1135 | 1135 | |
1136 | 1136 | MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) |
1137 | 1137 | |
r22842 | r22843 | |
1185 | 1185 | |
1186 | 1186 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1187 | 1187 | |
1188 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1188 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1189 | 1189 | |
1190 | 1190 | MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) |
1191 | 1191 | |
r22842 | r22843 | |
1234 | 1234 | |
1235 | 1235 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1236 | 1236 | |
1237 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1237 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1238 | 1238 | |
1239 | 1239 | MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) |
1240 | 1240 | |
r22842 | r22843 | |
1303 | 1303 | |
1304 | 1304 | MCFG_PIT8253_ADD( "pit8253", pcjr_pit8253_config ) |
1305 | 1305 | |
1306 | | MCFG_PIC8259_ADD( "pic8259", pcjr_pic8259_config ) |
| 1306 | MCFG_PIC8259_ADD( "pic8259", WRITELINE(pc_state,pcjr_pic8259_set_int_line), VCC, NULL ) |
1307 | 1307 | |
1308 | 1308 | MCFG_I8255_ADD( "ppi8255", pcjr_ppi8255_interface ) |
1309 | 1309 | |
r22842 | r22843 | |
1392 | 1392 | |
1393 | 1393 | MCFG_PIT8253_ADD( "pit8253", mc1502_pit8253_config ) |
1394 | 1394 | |
1395 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1395 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1396 | 1396 | |
1397 | 1397 | MCFG_I8255_ADD( "ppi8255", mc1502_ppi8255_interface ) /* not complete */ |
1398 | 1398 | MCFG_I8255_ADD( "ppi8255n2", mc1502_ppi8255_interface_2 ) /* not complete */ |
r22842 | r22843 | |
1442 | 1442 | // maybe XTAL_12_288MHz |
1443 | 1443 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1444 | 1444 | |
1445 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1445 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1446 | 1446 | |
1447 | 1447 | MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) |
1448 | 1448 | |
r22842 | r22843 | |
1492 | 1492 | |
1493 | 1493 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1494 | 1494 | |
1495 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1495 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1496 | 1496 | |
1497 | 1497 | MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) |
1498 | 1498 | |
r22842 | r22843 | |
1565 | 1565 | |
1566 | 1566 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1567 | 1567 | |
1568 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1568 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1569 | 1569 | |
1570 | 1570 | MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) |
1571 | 1571 | |
r22842 | r22843 | |
1620 | 1620 | |
1621 | 1621 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1622 | 1622 | |
1623 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1623 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1624 | 1624 | |
1625 | 1625 | MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) |
1626 | 1626 | |
r22842 | r22843 | |
1675 | 1675 | |
1676 | 1676 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1677 | 1677 | |
1678 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1678 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1679 | 1679 | |
1680 | 1680 | MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) |
1681 | 1681 | |
r22842 | r22843 | |
1730 | 1730 | |
1731 | 1731 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1732 | 1732 | |
1733 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1733 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1734 | 1734 | |
1735 | 1735 | MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) |
1736 | 1736 | |
r22842 | r22843 | |
1785 | 1785 | |
1786 | 1786 | MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) |
1787 | 1787 | |
1788 | | MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) |
| 1788 | MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL ) |
1789 | 1789 | |
1790 | 1790 | MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) |
1791 | 1791 | |
trunk/src/mess/drivers/pc88va.c
r22842 | r22843 | |
1637 | 1637 | return 0x00; |
1638 | 1638 | } |
1639 | 1639 | |
1640 | | static const struct pic8259_interface pc88va_pic8259_master_config = |
1641 | | { |
1642 | | DEVCB_DRIVER_LINE_MEMBER(pc88va_state, pc88va_pic_irq), |
1643 | | DEVCB_LINE_VCC, |
1644 | | DEVCB_DRIVER_MEMBER(pc88va_state,get_slave_ack) |
1645 | | }; |
1646 | | |
1647 | | static const struct pic8259_interface pc88va_pic8259_slave_config = |
1648 | | { |
1649 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w), |
1650 | | DEVCB_LINE_GND, |
1651 | | DEVCB_NULL |
1652 | | }; |
1653 | | |
1654 | 1640 | void pc88va_state::machine_start() |
1655 | 1641 | { |
1656 | 1642 | m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pc88va_state::pc88va_irq_callback),this)); |
r22842 | r22843 | |
1856 | 1842 | |
1857 | 1843 | MCFG_I8255_ADD( "d8255_2s", slave_fdd_intf ) |
1858 | 1844 | |
1859 | | MCFG_PIC8259_ADD( "pic8259_master", pc88va_pic8259_master_config ) |
1860 | | MCFG_PIC8259_ADD( "pic8259_slave", pc88va_pic8259_slave_config ) |
| 1845 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc88va_state, pc88va_pic_irq), VCC, READ8(pc88va_state,get_slave_ack) ) |
1861 | 1846 | |
| 1847 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) |
| 1848 | |
1862 | 1849 | MCFG_UPD71071_ADD("dmac",pc88va_dma_config) |
1863 | 1850 | |
1864 | 1851 | MCFG_UPD765A_ADD("upd765", false, true) |
trunk/src/mess/drivers/pc1512.c
r22842 | r22843 | |
916 | 916 | return m_pic->inta_r(); |
917 | 917 | } |
918 | 918 | |
919 | | static const struct pic8259_interface pic_intf = |
920 | | { |
921 | | DEVCB_CPU_INPUT_LINE(I8086_TAG, INPUT_LINE_IRQ0), |
922 | | DEVCB_LINE_VCC, |
923 | | DEVCB_NULL |
924 | | }; |
925 | 919 | |
926 | | |
927 | 920 | //------------------------------------------------- |
928 | 921 | // pit8253_config pit_intf |
929 | 922 | //------------------------------------------------- |
r22842 | r22843 | |
1244 | 1237 | // devices |
1245 | 1238 | MCFG_PC1512_KEYBOARD_ADD(kb_intf) |
1246 | 1239 | MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf) |
1247 | | MCFG_PIC8259_ADD(I8259A2_TAG, pic_intf) |
| 1240 | MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL) |
1248 | 1241 | MCFG_PIT8253_ADD(I8253_TAG, pit_intf) |
1249 | 1242 | MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf) |
1250 | 1243 | MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG) |
r22842 | r22843 | |
1289 | 1282 | // devices |
1290 | 1283 | MCFG_PC1512_KEYBOARD_ADD(kb_intf) |
1291 | 1284 | MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf) |
1292 | | MCFG_PIC8259_ADD(I8259A2_TAG, pic_intf) |
| 1285 | MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL) |
1293 | 1286 | MCFG_PIT8253_ADD(I8253_TAG, pit_intf) |
1294 | 1287 | MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf) |
1295 | 1288 | MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG) |
trunk/src/mess/machine/southbridge.c
r22842 | r22843 | |
9 | 9 | #include "machine/southbridge.h" |
10 | 10 | #include "machine/pc_keyboards.h" |
11 | 11 | |
12 | | const struct pic8259_interface at_pic8259_master_config = |
13 | | { |
14 | | DEVCB_CPU_INPUT_LINE(":maincpu", 0), |
15 | | DEVCB_LINE_VCC, |
16 | | DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, get_slave_ack) |
17 | | }; |
18 | 12 | |
19 | | const struct pic8259_interface at_pic8259_slave_config = |
20 | | { |
21 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir2_w), |
22 | | DEVCB_LINE_GND, |
23 | | DEVCB_NULL |
24 | | }; |
25 | | |
26 | 13 | const struct pit8253_config at_pit8254_config = |
27 | 14 | { |
28 | 15 | { |
r22842 | r22843 | |
127 | 114 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config ) |
128 | 115 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config ) |
129 | 116 | |
130 | | MCFG_PIC8259_ADD( "pic8259_master", at_pic8259_master_config ) |
131 | | MCFG_PIC8259_ADD( "pic8259_slave", at_pic8259_slave_config ) |
| 117 | MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE(":maincpu", 0), VCC, DEVREAD8(DEVICE_SELF_OWNER, southbridge_device, get_slave_ack) ) |
| 118 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL ) |
132 | 119 | |
133 | 120 | MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keyboard_controller_intf) |
134 | 121 | MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf) |
trunk/src/mess/machine/apollo.c
r22842 | r22843 | |
689 | 689 | * pic8259 configuration |
690 | 690 | *************************************************************/ |
691 | 691 | |
692 | | static WRITE_LINE_DEVICE_HANDLER( apollo_pic8259_master_set_int_line ) { |
| 692 | WRITE_LINE_MEMBER( apollo_state::apollo_pic8259_master_set_int_line ) { |
693 | 693 | static int interrupt_line = -1; |
694 | 694 | if (state != interrupt_line) { |
| 695 | device_t *device = pic8259_master; |
695 | 696 | DLOG1(("apollo_pic8259_master_set_int_line: %x", state)); |
696 | 697 | } |
697 | 698 | interrupt_line = state; |
r22842 | r22843 | |
704 | 705 | apollo_set_cache_status_register(0x10, state ? 0x10 : 0x00); |
705 | 706 | } |
706 | 707 | |
707 | | device->machine().device(MAINCPU)->execute().set_input_line_and_vector(M68K_IRQ_6,state ? ASSERT_LINE : CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); |
| 708 | machine().device(MAINCPU)->execute().set_input_line_and_vector(M68K_IRQ_6,state ? ASSERT_LINE : CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); |
708 | 709 | } |
709 | 710 | |
710 | | static WRITE_LINE_DEVICE_HANDLER( apollo_pic8259_slave_set_int_line ) { |
| 711 | WRITE_LINE_MEMBER( apollo_state::apollo_pic8259_slave_set_int_line ) { |
711 | 712 | static int interrupt_line = -1; |
712 | 713 | if (state != interrupt_line) { |
| 714 | device_t *device = pic8259_slave; |
713 | 715 | DLOG1(("apollo_pic8259_slave_set_int_line: %x", state)); |
714 | 716 | interrupt_line = state; |
715 | 717 | apollo_pic_set_irq_line(device, 3, state); |
716 | 718 | } |
717 | 719 | } |
718 | 720 | |
719 | | static const struct pic8259_interface apollo_pic8259_master_config = { |
720 | | DEVCB_LINE(apollo_pic8259_master_set_int_line) }; |
721 | 721 | |
722 | | static const struct pic8259_interface apollo_pic8259_slave_config = { |
723 | | DEVCB_LINE(apollo_pic8259_slave_set_int_line) }; |
724 | | |
725 | 722 | //########################################################################## |
726 | 723 | // machine/apollo_ptm.c - APOLLO DS3500 Programmable Timer 6840 |
727 | 724 | //########################################################################## |
r22842 | r22843 | |
1370 | 1367 | |
1371 | 1368 | MCFG_I8237_ADD( APOLLO_DMA1_TAG, XTAL_14_31818MHz/3, apollo_dma8237_1_config ) |
1372 | 1369 | MCFG_I8237_ADD( APOLLO_DMA2_TAG, XTAL_14_31818MHz/3, apollo_dma8237_2_config ) |
1373 | | MCFG_PIC8259_ADD( APOLLO_PIC1_TAG, apollo_pic8259_master_config ) |
1374 | | MCFG_PIC8259_ADD( APOLLO_PIC2_TAG, apollo_pic8259_slave_config ) |
| 1370 | MCFG_PIC8259_ADD( APOLLO_PIC1_TAG, WRITELINE(apollo_state,apollo_pic8259_master_set_int_line), NULL, NULL ) // TODO: Doublecheck config |
| 1371 | MCFG_PIC8259_ADD( APOLLO_PIC2_TAG, WRITELINE(apollo_state,apollo_pic8259_slave_set_int_line), NULL, NULL ) // TODO: Doublecheck config |
1375 | 1372 | MCFG_PTM6840_ADD(APOLLO_PTM_TAG, apollo_ptm_config) |
1376 | 1373 | MCFG_MC146818_ADD( APOLLO_RTC_TAG, MC146818_UTC ) |
1377 | 1374 | MCFG_DUART68681_ADD( APOLLO_SIO_TAG, XTAL_3_6864MHz, apollo_sio_config ) |
trunk/src/mame/machine/pcshare.c
r22842 | r22843 | |
151 | 151 | return 0x00; |
152 | 152 | } |
153 | 153 | |
154 | | static const struct pic8259_interface pic8259_1_config = |
155 | | { |
156 | | DEVCB_CPU_INPUT_LINE("maincpu", 0), |
157 | | DEVCB_LINE_VCC, |
158 | | DEVCB_DRIVER_MEMBER(pcat_base_state, get_slave_ack) |
159 | | }; |
160 | | |
161 | | static const struct pic8259_interface pic8259_2_config = |
162 | | { |
163 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
164 | | DEVCB_LINE_GND, |
165 | | DEVCB_NULL |
166 | | }; |
167 | | |
168 | 154 | IRQ_CALLBACK_MEMBER(pcat_base_state::irq_callback) |
169 | 155 | { |
170 | 156 | return m_pic8259_1->acknowledge(); |
r22842 | r22843 | |
240 | 226 | ADDRESS_MAP_END |
241 | 227 | |
242 | 228 | MACHINE_CONFIG_FRAGMENT(pcat_common) |
243 | | MCFG_PIC8259_ADD( "pic8259_1", pic8259_1_config ) |
244 | | MCFG_PIC8259_ADD( "pic8259_2", pic8259_2_config ) |
| 229 | MCFG_PIC8259_ADD( "pic8259_1", INPUTLINE("maincpu", 0), VCC, READ8(pcat_base_state, get_slave_ack) ) |
| 230 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
245 | 231 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
246 | 232 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
247 | 233 | MCFG_PIT8254_ADD( "pit8254", at_pit8254_config ) |
trunk/src/mame/drivers/queen.c
r22842 | r22843 | |
462 | 462 | return 0x00; |
463 | 463 | } |
464 | 464 | |
465 | | static const struct pic8259_interface queen_pic8259_1_config = |
466 | | { |
467 | | DEVCB_DRIVER_LINE_MEMBER(queen_state,queen_pic8259_1_set_int_line), |
468 | | DEVCB_LINE_VCC, |
469 | | DEVCB_DRIVER_MEMBER(queen_state,get_slave_ack) |
470 | | }; |
471 | | |
472 | | static const struct pic8259_interface queen_pic8259_2_config = |
473 | | { |
474 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
475 | | DEVCB_LINE_GND, |
476 | | DEVCB_NULL |
477 | | }; |
478 | | |
479 | 465 | READ8_MEMBER(queen_state::get_out2) |
480 | 466 | { |
481 | 467 | return pit8253_get_output( m_pit8254, 2 ); |
r22842 | r22843 | |
524 | 510 | MCFG_PIT8254_ADD( "pit8254", queen_pit8254_config ) |
525 | 511 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
526 | 512 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
527 | | MCFG_PIC8259_ADD( "pic8259_1", queen_pic8259_1_config ) |
528 | | MCFG_PIC8259_ADD( "pic8259_2", queen_pic8259_2_config ) |
| 513 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(queen_state,queen_pic8259_1_set_int_line), VCC, READ8(queen_state,get_slave_ack) ) |
| 514 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
529 | 515 | |
530 | 516 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
531 | 517 | |
trunk/src/mame/drivers/savquest.c
r22842 | r22843 | |
561 | 561 | return 0x00; |
562 | 562 | } |
563 | 563 | |
564 | | static const struct pic8259_interface savquest_pic8259_1_config = |
565 | | { |
566 | | DEVCB_DRIVER_LINE_MEMBER(savquest_state,savquest_pic8259_1_set_int_line), |
567 | | DEVCB_LINE_VCC, |
568 | | DEVCB_DRIVER_MEMBER(savquest_state,get_slave_ack) |
569 | | }; |
570 | | |
571 | | static const struct pic8259_interface savquest_pic8259_2_config = |
572 | | { |
573 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
574 | | DEVCB_LINE_GND, |
575 | | DEVCB_NULL |
576 | | }; |
577 | | |
578 | 564 | READ8_MEMBER(savquest_state::get_out2) |
579 | 565 | { |
580 | 566 | return pit8253_get_output( m_pit8254, 2 ); |
r22842 | r22843 | |
627 | 613 | MCFG_PIT8254_ADD( "pit8254", savquest_pit8254_config ) |
628 | 614 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
629 | 615 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
630 | | MCFG_PIC8259_ADD( "pic8259_1", savquest_pic8259_1_config ) |
631 | | MCFG_PIC8259_ADD( "pic8259_2", savquest_pic8259_2_config ) |
| 616 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(savquest_state,savquest_pic8259_1_set_int_line), VCC, READ8(savquest_state,get_slave_ack) ) |
| 617 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
632 | 618 | |
633 | 619 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
634 | 620 | |
trunk/src/mame/drivers/photoply.c
r22842 | r22843 | |
215 | 215 | return 0x00; |
216 | 216 | } |
217 | 217 | |
218 | | static const struct pic8259_interface pic8259_1_config = |
219 | | { |
220 | | DEVCB_DRIVER_LINE_MEMBER(photoply_state,pic8259_1_set_int_line), |
221 | | DEVCB_LINE_VCC, |
222 | | DEVCB_DRIVER_MEMBER(photoply_state,get_slave_ack) |
223 | | }; |
224 | | |
225 | | static const struct pic8259_interface pic8259_2_config = |
226 | | { |
227 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
228 | | DEVCB_LINE_GND, |
229 | | DEVCB_NULL |
230 | | }; |
231 | | |
232 | 218 | IRQ_CALLBACK_MEMBER(photoply_state::irq_callback) |
233 | 219 | { |
234 | 220 | return m_pic8259_1->acknowledge(); |
r22842 | r22843 | |
388 | 374 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
389 | 375 | |
390 | 376 | // MCFG_FRAGMENT_ADD( at_kbdc8042 ) |
391 | | MCFG_PIC8259_ADD( "pic8259_1", pic8259_1_config ) |
392 | | MCFG_PIC8259_ADD( "pic8259_2", pic8259_2_config ) |
| 377 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(photoply_state,pic8259_1_set_int_line), VCC, READ8(photoply_state,get_slave_ack) ) |
| 378 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
393 | 379 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
394 | 380 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
395 | 381 | MCFG_PIT8254_ADD( "pit8254", at_pit8254_config ) |
trunk/src/mame/drivers/mediagx.c
r22842 | r22843 | |
1107 | 1107 | return 0x00; |
1108 | 1108 | } |
1109 | 1109 | |
1110 | | static const struct pic8259_interface mediagx_pic8259_1_config = |
1111 | | { |
1112 | | DEVCB_DRIVER_LINE_MEMBER(mediagx_state,mediagx_pic8259_1_set_int_line), |
1113 | | DEVCB_LINE_VCC, |
1114 | | DEVCB_DRIVER_MEMBER(mediagx_state,get_slave_ack) |
1115 | | }; |
1116 | 1110 | |
1117 | | static const struct pic8259_interface mediagx_pic8259_2_config = |
1118 | | { |
1119 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir2_w), |
1120 | | DEVCB_LINE_GND, |
1121 | | DEVCB_NULL |
1122 | | }; |
1123 | | |
1124 | | |
1125 | 1111 | /************************************************************* |
1126 | 1112 | * |
1127 | 1113 | * pit8254 configuration |
r22842 | r22843 | |
1190 | 1176 | |
1191 | 1177 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
1192 | 1178 | |
1193 | | MCFG_PIC8259_ADD( "pic8259_master", mediagx_pic8259_1_config ) |
| 1179 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(mediagx_state,mediagx_pic8259_1_set_int_line), VCC, READ8(mediagx_state,get_slave_ack) ) |
1194 | 1180 | |
1195 | | MCFG_PIC8259_ADD( "pic8259_slave", mediagx_pic8259_2_config ) |
| 1181 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL ) |
1196 | 1182 | |
1197 | 1183 | MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) |
1198 | 1184 | MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_slave", pic8259_device, ir6_w)) |
trunk/src/mame/drivers/midqslvr.c
r22842 | r22843 | |
598 | 598 | return 0x00; |
599 | 599 | } |
600 | 600 | |
601 | | static const struct pic8259_interface midqslvr_pic8259_1_config = |
602 | | { |
603 | | DEVCB_DRIVER_LINE_MEMBER(midqslvr_state,midqslvr_pic8259_1_set_int_line), |
604 | | DEVCB_LINE_VCC, |
605 | | DEVCB_DRIVER_MEMBER(midqslvr_state,get_slave_ack) |
606 | | }; |
607 | | |
608 | | static const struct pic8259_interface midqslvr_pic8259_2_config = |
609 | | { |
610 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
611 | | DEVCB_LINE_GND, |
612 | | DEVCB_NULL |
613 | | }; |
614 | | |
615 | 601 | READ8_MEMBER(midqslvr_state::get_out2) |
616 | 602 | { |
617 | 603 | return pit8253_get_output( m_pit8254, 2 ); |
r22842 | r22843 | |
669 | 655 | MCFG_PIT8254_ADD( "pit8254", midqslvr_pit8254_config ) |
670 | 656 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
671 | 657 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
672 | | MCFG_PIC8259_ADD( "pic8259_1", midqslvr_pic8259_1_config ) |
673 | | MCFG_PIC8259_ADD( "pic8259_2", midqslvr_pic8259_2_config ) |
| 658 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(midqslvr_state,midqslvr_pic8259_1_set_int_line), VCC, READ8(midqslvr_state,get_slave_ack) ) |
| 659 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
674 | 660 | |
675 | 661 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
676 | 662 | |
trunk/src/mame/drivers/calchase.c
r22842 | r22843 | |
842 | 842 | return 0x00; |
843 | 843 | } |
844 | 844 | |
845 | | static const struct pic8259_interface calchase_pic8259_1_config = |
846 | | { |
847 | | DEVCB_DRIVER_LINE_MEMBER(calchase_state,calchase_pic8259_1_set_int_line), |
848 | | DEVCB_LINE_VCC, |
849 | | DEVCB_DRIVER_MEMBER(calchase_state,get_slave_ack) |
850 | | }; |
851 | 845 | |
852 | | static const struct pic8259_interface calchase_pic8259_2_config = |
853 | | { |
854 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
855 | | DEVCB_LINE_GND, |
856 | | DEVCB_NULL |
857 | | }; |
858 | | |
859 | | |
860 | | |
861 | | |
862 | 846 | /************************************************************* |
863 | 847 | * |
864 | 848 | * pit8254 configuration |
r22842 | r22843 | |
916 | 900 | MCFG_PIT8254_ADD( "pit8254", calchase_pit8254_config ) |
917 | 901 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
918 | 902 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
919 | | MCFG_PIC8259_ADD( "pic8259_1", calchase_pic8259_1_config ) |
920 | | MCFG_PIC8259_ADD( "pic8259_2", calchase_pic8259_2_config ) |
| 903 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(calchase_state,calchase_pic8259_1_set_int_line), VCC, READ8(calchase_state,get_slave_ack) ) |
| 904 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
921 | 905 | MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) |
922 | 906 | MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) |
923 | 907 | |
trunk/src/mame/drivers/fruitpc.c
r22842 | r22843 | |
476 | 476 | return 0x00; |
477 | 477 | } |
478 | 478 | |
479 | | static const struct pic8259_interface fruitpc_pic8259_1_config = |
480 | | { |
481 | | DEVCB_DRIVER_LINE_MEMBER(fruitpc_state,fruitpc_pic8259_1_set_int_line), |
482 | | DEVCB_LINE_VCC, |
483 | | DEVCB_DRIVER_MEMBER(fruitpc_state,get_slave_ack) |
484 | | }; |
485 | 479 | |
486 | | static const struct pic8259_interface fruitpc_pic8259_2_config = |
487 | | { |
488 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
489 | | DEVCB_LINE_GND, |
490 | | DEVCB_NULL |
491 | | }; |
492 | | |
493 | | |
494 | | |
495 | | |
496 | 480 | /************************************************************* |
497 | 481 | * |
498 | 482 | * pit8254 configuration |
r22842 | r22843 | |
547 | 531 | MCFG_PIT8254_ADD( "pit8254", fruitpc_pit8254_config ) |
548 | 532 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
549 | 533 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
550 | | MCFG_PIC8259_ADD( "pic8259_1", fruitpc_pic8259_1_config ) |
551 | | MCFG_PIC8259_ADD( "pic8259_2", fruitpc_pic8259_2_config ) |
| 534 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(fruitpc_state,fruitpc_pic8259_1_set_int_line), VCC, READ8(fruitpc_state,get_slave_ack) ) |
| 535 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
552 | 536 | MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) |
553 | 537 | MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) |
554 | 538 | |
trunk/src/mame/drivers/voyager.c
r22842 | r22843 | |
678 | 678 | return 0x00; |
679 | 679 | } |
680 | 680 | |
681 | | static const struct pic8259_interface voyager_pic8259_1_config = |
682 | | { |
683 | | DEVCB_DRIVER_LINE_MEMBER(voyager_state,voyager_pic8259_1_set_int_line), |
684 | | DEVCB_LINE_VCC, |
685 | | DEVCB_DRIVER_MEMBER(voyager_state,get_slave_ack) |
686 | | }; |
687 | 681 | |
688 | | static const struct pic8259_interface voyager_pic8259_2_config = |
689 | | { |
690 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
691 | | DEVCB_LINE_GND, |
692 | | DEVCB_NULL |
693 | | }; |
694 | | |
695 | | |
696 | | |
697 | | |
698 | 682 | /************************************************************* |
699 | 683 | * |
700 | 684 | * pit8254 configuration |
r22842 | r22843 | |
752 | 736 | MCFG_PIT8254_ADD( "pit8254", voyager_pit8254_config ) |
753 | 737 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
754 | 738 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
755 | | MCFG_PIC8259_ADD( "pic8259_1", voyager_pic8259_1_config ) |
756 | | MCFG_PIC8259_ADD( "pic8259_2", voyager_pic8259_2_config ) |
| 739 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(voyager_state,voyager_pic8259_1_set_int_line), VCC, READ8(voyager_state,get_slave_ack) ) |
| 740 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
757 | 741 | MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) |
758 | 742 | MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) |
759 | 743 | |
trunk/src/mame/drivers/chihiro.c
r22842 | r22843 | |
2789 | 2789 | return 0x00; |
2790 | 2790 | } |
2791 | 2791 | |
2792 | | static const struct pic8259_interface chihiro_pic8259_1_config = |
2793 | | { |
2794 | | DEVCB_DRIVER_LINE_MEMBER(chihiro_state, chihiro_pic8259_1_set_int_line), |
2795 | | DEVCB_LINE_VCC, |
2796 | | DEVCB_DRIVER_MEMBER(chihiro_state,get_slave_ack) |
2797 | | }; |
2798 | | |
2799 | | static const struct pic8259_interface chihiro_pic8259_2_config = |
2800 | | { |
2801 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
2802 | | DEVCB_LINE_GND, |
2803 | | DEVCB_NULL |
2804 | | }; |
2805 | | |
2806 | 2792 | IRQ_CALLBACK_MEMBER(chihiro_state::irq_callback) |
2807 | 2793 | { |
2808 | 2794 | int r = 0; |
r22842 | r22843 | |
3062 | 3048 | MCFG_PCI_BUS_LEGACY_ADD("agpbus", 1) |
3063 | 3049 | MCFG_PCI_BUS_LEGACY_SIBLING("pcibus") |
3064 | 3050 | MCFG_PCI_BUS_LEGACY_DEVICE(0, "NV2A GeForce 3MX Integrated GPU/Northbridge", geforce_pci_r, geforce_pci_w) |
3065 | | MCFG_PIC8259_ADD( "pic8259_1", chihiro_pic8259_1_config ) |
3066 | | MCFG_PIC8259_ADD( "pic8259_2", chihiro_pic8259_2_config ) |
| 3051 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(chihiro_state, chihiro_pic8259_1_set_int_line), VCC, READ8(chihiro_state,get_slave_ack) ) |
| 3052 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
3067 | 3053 | MCFG_PIT8254_ADD( "pit8254", chihiro_pit8254_config ) |
3068 | 3054 | MCFG_IDE_CONTROLLER_ADD( "ide", ide_baseboard, NULL, "bb", true) |
3069 | 3055 | MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) |
trunk/src/mame/drivers/taitowlf.c
r22842 | r22843 | |
582 | 582 | return 0x00; |
583 | 583 | } |
584 | 584 | |
585 | | static const struct pic8259_interface taitowlf_pic8259_1_config = |
586 | | { |
587 | | DEVCB_DRIVER_LINE_MEMBER(taitowlf_state,taitowlf_pic8259_1_set_int_line), |
588 | | DEVCB_LINE_VCC, |
589 | | DEVCB_DRIVER_MEMBER(taitowlf_state,get_slave_ack) |
590 | | }; |
591 | 585 | |
592 | | static const struct pic8259_interface taitowlf_pic8259_2_config = |
593 | | { |
594 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
595 | | DEVCB_LINE_GND, |
596 | | DEVCB_NULL |
597 | | }; |
598 | | |
599 | | |
600 | 586 | /************************************************************* |
601 | 587 | * |
602 | 588 | * pit8254 configuration |
r22842 | r22843 | |
666 | 652 | MCFG_PIT8254_ADD( "pit8254", taitowlf_pit8254_config ) |
667 | 653 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
668 | 654 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
669 | | MCFG_PIC8259_ADD( "pic8259_1", taitowlf_pic8259_1_config ) |
670 | | MCFG_PIC8259_ADD( "pic8259_2", taitowlf_pic8259_2_config ) |
| 655 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(taitowlf_state,taitowlf_pic8259_1_set_int_line), VCC, READ8(taitowlf_state,get_slave_ack) ) |
| 656 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
671 | 657 | MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) |
672 | 658 | MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) |
673 | 659 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
trunk/src/mame/drivers/funkball.c
r22842 | r22843 | |
1045 | 1045 | return 0x00; |
1046 | 1046 | } |
1047 | 1047 | |
1048 | | static const struct pic8259_interface funkball_pic8259_1_config = |
1049 | | { |
1050 | | DEVCB_DRIVER_LINE_MEMBER(funkball_state,funkball_pic8259_1_set_int_line), |
1051 | | DEVCB_LINE_VCC, |
1052 | | DEVCB_DRIVER_MEMBER(funkball_state,get_slave_ack) |
1053 | | }; |
1054 | | |
1055 | | static const struct pic8259_interface funkball_pic8259_2_config = |
1056 | | { |
1057 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
1058 | | DEVCB_LINE_GND, |
1059 | | DEVCB_NULL |
1060 | | }; |
1061 | | |
1062 | 1048 | READ8_MEMBER(funkball_state::get_out2) |
1063 | 1049 | { |
1064 | 1050 | return pit8253_get_output( m_pit8254, 2 ); |
r22842 | r22843 | |
1131 | 1117 | MCFG_PIT8254_ADD( "pit8254", funkball_pit8254_config ) |
1132 | 1118 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
1133 | 1119 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
1134 | | MCFG_PIC8259_ADD( "pic8259_1", funkball_pic8259_1_config ) |
1135 | | MCFG_PIC8259_ADD( "pic8259_2", funkball_pic8259_2_config ) |
| 1120 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(funkball_state,funkball_pic8259_1_set_int_line), VCC, READ8(funkball_state,get_slave_ack) ) |
| 1121 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
1136 | 1122 | |
1137 | 1123 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
1138 | 1124 | |
trunk/src/mame/drivers/gamecstl.c
r22842 | r22843 | |
645 | 645 | return 0x00; |
646 | 646 | } |
647 | 647 | |
648 | | static const struct pic8259_interface gamecstl_pic8259_1_config = |
649 | | { |
650 | | DEVCB_DRIVER_LINE_MEMBER(gamecstl_state,gamecstl_pic8259_1_set_int_line), |
651 | | DEVCB_LINE_VCC, |
652 | | DEVCB_DRIVER_MEMBER(gamecstl_state,get_slave_ack) |
653 | | }; |
654 | 648 | |
655 | | static const struct pic8259_interface gamecstl_pic8259_2_config = |
656 | | { |
657 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
658 | | DEVCB_LINE_GND, |
659 | | DEVCB_NULL |
660 | | }; |
661 | | |
662 | | |
663 | 649 | /************************************************************* |
664 | 650 | * |
665 | 651 | * pit8254 configuration |
r22842 | r22843 | |
720 | 706 | |
721 | 707 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
722 | 708 | |
723 | | MCFG_PIC8259_ADD( "pic8259_1", gamecstl_pic8259_1_config ) |
| 709 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(gamecstl_state,gamecstl_pic8259_1_set_int_line), VCC, READ8(gamecstl_state,get_slave_ack) ) |
724 | 710 | |
725 | | MCFG_PIC8259_ADD( "pic8259_2", gamecstl_pic8259_2_config ) |
| 711 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
726 | 712 | |
727 | 713 | MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) |
728 | 714 | MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) |
trunk/src/mame/drivers/pinball2k.c
r22842 | r22843 | |
809 | 809 | return 0x00; |
810 | 810 | } |
811 | 811 | |
812 | | static const struct pic8259_interface mediagx_pic8259_1_config = |
813 | | { |
814 | | DEVCB_DRIVER_LINE_MEMBER(pinball2k_state,mediagx_pic8259_1_set_int_line), |
815 | | DEVCB_LINE_VCC, |
816 | | DEVCB_DRIVER_MEMBER(pinball2k_state,get_slave_ack) |
817 | | }; |
818 | 812 | |
819 | | static const struct pic8259_interface mediagx_pic8259_2_config = |
820 | | { |
821 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir2_w), |
822 | | DEVCB_LINE_GND, |
823 | | DEVCB_NULL |
824 | | }; |
825 | | |
826 | | |
827 | 813 | /************************************************************* |
828 | 814 | * |
829 | 815 | * pit8254 configuration |
r22842 | r22843 | |
892 | 878 | |
893 | 879 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
894 | 880 | |
895 | | MCFG_PIC8259_ADD( "pic8259_master", mediagx_pic8259_1_config ) |
| 881 | MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pinball2k_state,mediagx_pic8259_1_set_int_line), VCC, READ8(pinball2k_state,get_slave_ack) ) |
896 | 882 | |
897 | | MCFG_PIC8259_ADD( "pic8259_slave", mediagx_pic8259_2_config ) |
| 883 | MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL ) |
898 | 884 | |
899 | 885 | MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) |
900 | 886 | MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_slave", pic8259_device, ir6_w)) |
trunk/src/mame/drivers/gammagic.c
r22842 | r22843 | |
708 | 708 | return 0x00; |
709 | 709 | } |
710 | 710 | |
711 | | static const struct pic8259_interface gammagic_pic8259_1_config = |
712 | | { |
713 | | DEVCB_DRIVER_LINE_MEMBER(gammagic_state,gammagic_pic8259_1_set_int_line), |
714 | | DEVCB_LINE_VCC, |
715 | | DEVCB_DRIVER_MEMBER(gammagic_state,get_slave_ack) |
716 | | }; |
717 | | |
718 | | static const struct pic8259_interface gammagic_pic8259_2_config = |
719 | | { |
720 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
721 | | DEVCB_LINE_GND, |
722 | | DEVCB_NULL |
723 | | }; |
724 | | |
725 | 711 | /************************************************************* |
726 | 712 | * |
727 | 713 | * pit8254 configuration |
r22842 | r22843 | |
771 | 757 | MCFG_PIT8254_ADD( "pit8254", gammagic_pit8254_config ) |
772 | 758 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
773 | 759 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
774 | | MCFG_PIC8259_ADD( "pic8259_1", gammagic_pic8259_1_config ) |
775 | | MCFG_PIC8259_ADD( "pic8259_2", gammagic_pic8259_2_config ) |
| 760 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(gammagic_state,gammagic_pic8259_1_set_int_line), VCC, READ8(gammagic_state,get_slave_ack) ) |
| 761 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
776 | 762 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
777 | 763 | // MCFG_I82371SB_ADD("i82371sb") |
778 | 764 | // MCFG_I82439TX_ADD("i82439tx", "maincpu", "user") |
trunk/src/mame/drivers/quakeat.c
r22842 | r22843 | |
134 | 134 | return 0x00; |
135 | 135 | } |
136 | 136 | |
137 | | static const struct pic8259_interface quakeat_pic8259_1_config = |
138 | | { |
139 | | DEVCB_DRIVER_LINE_MEMBER(quakeat_state,quakeat_pic8259_1_set_int_line), |
140 | | DEVCB_LINE_VCC, |
141 | | DEVCB_DRIVER_MEMBER(quakeat_state,get_slave_ack) |
142 | | }; |
143 | | |
144 | | static const struct pic8259_interface quakeat_pic8259_2_config = |
145 | | { |
146 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
147 | | DEVCB_LINE_GND, |
148 | | DEVCB_NULL |
149 | | }; |
150 | | |
151 | 137 | /*************************************************************/ |
152 | 138 | |
153 | 139 | static INPUT_PORTS_START( quake ) |
r22842 | r22843 | |
176 | 162 | MCFG_CPU_IO_MAP(quake_io) |
177 | 163 | |
178 | 164 | |
179 | | MCFG_PIC8259_ADD( "pic8259_1", quakeat_pic8259_1_config ) |
180 | | MCFG_PIC8259_ADD( "pic8259_2", quakeat_pic8259_2_config ) |
| 165 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(quakeat_state,quakeat_pic8259_1_set_int_line), VCC, READ8(quakeat_state,get_slave_ack) ) |
| 166 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
181 | 167 | |
182 | 168 | /* video hardware */ |
183 | 169 | MCFG_SCREEN_ADD("screen", RASTER) |
trunk/src/mame/drivers/xtom3d.c
r22842 | r22843 | |
590 | 590 | return 0x00; |
591 | 591 | } |
592 | 592 | |
593 | | static const struct pic8259_interface xtom3d_pic8259_1_config = |
594 | | { |
595 | | DEVCB_DRIVER_LINE_MEMBER(xtom3d_state,xtom3d_pic8259_1_set_int_line), |
596 | | DEVCB_LINE_VCC, |
597 | | DEVCB_DRIVER_MEMBER(xtom3d_state,get_slave_ack) |
598 | | }; |
599 | | |
600 | | static const struct pic8259_interface xtom3d_pic8259_2_config = |
601 | | { |
602 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
603 | | DEVCB_LINE_GND, |
604 | | DEVCB_NULL |
605 | | }; |
606 | | |
607 | 593 | READ8_MEMBER(xtom3d_state::get_out2) |
608 | 594 | { |
609 | 595 | return pit8253_get_output( m_pit8254, 2 ); |
r22842 | r22843 | |
660 | 646 | MCFG_PIT8254_ADD( "pit8254", xtom3d_pit8254_config ) |
661 | 647 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
662 | 648 | MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) |
663 | | MCFG_PIC8259_ADD( "pic8259_1", xtom3d_pic8259_1_config ) |
664 | | MCFG_PIC8259_ADD( "pic8259_2", xtom3d_pic8259_2_config ) |
| 649 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(xtom3d_state,xtom3d_pic8259_1_set_int_line), VCC, READ8(xtom3d_state,get_slave_ack) ) |
| 650 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
665 | 651 | |
666 | 652 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
667 | 653 | |
trunk/src/mame/drivers/pcxt.c
r22842 | r22843 | |
530 | 530 | return 0x00; |
531 | 531 | } |
532 | 532 | |
533 | | static const struct pic8259_interface pic8259_1_config = |
534 | | { |
535 | | DEVCB_DRIVER_LINE_MEMBER(pcxt_state,pic8259_1_set_int_line), |
536 | | DEVCB_LINE_VCC, |
537 | | DEVCB_DRIVER_MEMBER(pcxt_state,get_slave_ack) |
538 | | }; |
539 | | |
540 | | static const struct pic8259_interface pic8259_2_config = |
541 | | { |
542 | | DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), |
543 | | DEVCB_LINE_GND, |
544 | | DEVCB_NULL |
545 | | }; |
546 | | |
547 | 533 | IRQ_CALLBACK_MEMBER(pcxt_state::irq_callback) |
548 | 534 | { |
549 | 535 | return m_pic8259_1->acknowledge(); |
r22842 | r22843 | |
738 | 724 | |
739 | 725 | MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) |
740 | 726 | |
741 | | MCFG_PIC8259_ADD( "pic8259_1", pic8259_1_config ) |
| 727 | MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(pcxt_state,pic8259_1_set_int_line), VCC, READ8(pcxt_state,get_slave_ack) ) |
742 | 728 | |
743 | | MCFG_PIC8259_ADD( "pic8259_2", pic8259_2_config ) |
| 729 | MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) |
744 | 730 | |
745 | 731 | MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) |
746 | 732 | |