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r22764 Saturday 11th May, 2013 at 10:24:25 UTC by Curt Coder
(MESS) Added skeleton driver for RCA COSMAC Microkit. [Bill Degnan, Curt Coder] cosmac: Added the original CDP1801 CPU variant and rewrote the disassembler. [Curt Coder]

[src/emu/cpu/cosmac]	cosdasm.c cosmac.c cosmac.h
[src/mame/drivers]	cidelsa.c play_1.c play_2.c play_3.c play_5.c
[src/mess]	mess.lst mess.mak
[src/mess/drivers]	comx35.c cosmicos.c elf.c eti660.c microkit.c* pecom.c studio2.c tim011.c tmc1800.c tmc2000e.c tmc600.c vip.c
[src/tools]	unidasm.c

trunk/src/mame/drivers/play_2.c

r22763	r22764
58	58
59	59	static MACHINE_CONFIG_START( play_2, play_2_state )
60	60	/* basic machine hardware */
61		MCFG_CPU_ADD("maincpu", COSMAC, 2950000)
	61	MCFG_CPU_ADD("maincpu", CDP1802, 2950000)
62	62	MCFG_CPU_PROGRAM_MAP(play_2_map)
63	63	MCFG_CPU_CONFIG(cdp1802_config)
64	64	MACHINE_CONFIG_END

trunk/src/mame/drivers/cidelsa.c

r22763	r22764
460	460
461	461	static MACHINE_CONFIG_START( destryer, cidelsa_state )
462	462	/* basic system hardware */
463		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, DESTRYER_CHR1)
	463	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, DESTRYER_CHR1)
464	464	MCFG_CPU_PROGRAM_MAP(destryer_map)
465	465	MCFG_CPU_IO_MAP(destryer_io_map)
466	466	MCFG_CPU_CONFIG(cidelsa_cdp1802_config)
r22763	r22764
472	472
473	473	static MACHINE_CONFIG_START( destryera, cidelsa_state )
474	474	/* basic system hardware */
475		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, DESTRYER_CHR1)
	475	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, DESTRYER_CHR1)
476	476	MCFG_CPU_PROGRAM_MAP(destryera_map)
477	477	MCFG_CPU_IO_MAP(destryer_io_map)
478	478	MCFG_CPU_CONFIG(cidelsa_cdp1802_config)
r22763	r22764
484	484
485	485	static MACHINE_CONFIG_START( altair, cidelsa_state )
486	486	/* basic system hardware */
487		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, ALTAIR_CHR1)
	487	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, ALTAIR_CHR1)
488	488	MCFG_CPU_PROGRAM_MAP(altair_map)
489	489	MCFG_CPU_IO_MAP(altair_io_map)
490	490	MCFG_CPU_CONFIG(cidelsa_cdp1802_config)
r22763	r22764
502	502
503	503	static MACHINE_CONFIG_START( draco, draco_state )
504	504	/* basic system hardware */
505		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, DRACO_CHR1)
	505	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, DRACO_CHR1)
506	506	MCFG_CPU_PROGRAM_MAP(draco_map)
507	507	MCFG_CPU_IO_MAP(draco_io_map)
508	508	MCFG_CPU_CONFIG(cidelsa_cdp1802_config)

trunk/src/mame/drivers/play_1.c

r22763	r22764
61	61
62	62	static MACHINE_CONFIG_START( play_1, play_1_state )
63	63	/* basic machine hardware */
64		MCFG_CPU_ADD("maincpu", COSMAC, 400000)
	64	MCFG_CPU_ADD("maincpu", CDP1802, 400000)
65	65	MCFG_CPU_PROGRAM_MAP(play_1_map)
66	66	MCFG_CPU_CONFIG(cdp1802_config)
67	67	MACHINE_CONFIG_END

trunk/src/mame/drivers/play_3.c

r22763	r22764
62	62
63	63	static MACHINE_CONFIG_START( play_3, play_3_state )
64	64	/* basic machine hardware */
65		MCFG_CPU_ADD("maincpu", COSMAC, 2950000)
	65	MCFG_CPU_ADD("maincpu", CDP1802, 2950000)
66	66	MCFG_CPU_PROGRAM_MAP(play_3_map)
67	67	MCFG_CPU_CONFIG(cdp1802_config)
68	68	MACHINE_CONFIG_END

trunk/src/mame/drivers/play_5.c

r22763	r22764
59	59
60	60	static MACHINE_CONFIG_START( play_5, play_5_state )
61	61	/* basic machine hardware */
62		MCFG_CPU_ADD("maincpu", COSMAC, 2950000)
	62	MCFG_CPU_ADD("maincpu", CDP1802, 2950000)
63	63	MCFG_CPU_PROGRAM_MAP(play_5_map)
64	64	MCFG_CPU_CONFIG(cdp1802_config)
65	65	MACHINE_CONFIG_END

trunk/src/tools/unidasm.c

r22763	r22764
98	98	CPU_DISASSEMBLE( asap );
99	99	CPU_DISASSEMBLE( avr8 );
100	100	CPU_DISASSEMBLE( ccpu );
	101	CPU_DISASSEMBLE( cdp1801 );
	102	CPU_DISASSEMBLE( cdp1802 );
101	103	CPU_DISASSEMBLE( coldfire );
102	104	CPU_DISASSEMBLE( cop410 );
103	105	CPU_DISASSEMBLE( cop420 );
104	106	CPU_DISASSEMBLE( cop444 );
105		CPU_DISASSEMBLE( cosmac );
106	107	CPU_DISASSEMBLE( cp1610 );
107	108	CPU_DISASSEMBLE( cquestlin );
108	109	CPU_DISASSEMBLE( cquestrot );
r22763	r22764
241	242	{ "asap",       _32le,  0, CPU_DISASSEMBLE_NAME(asap) },
242	243	{ "avr8",       _16le,  0, CPU_DISASSEMBLE_NAME(avr8) },
243	244	{ "ccpu",       _8bit,  0, CPU_DISASSEMBLE_NAME(ccpu) },
	245	{ "cdp1801",    _8bit,  0, CPU_DISASSEMBLE_NAME(cdp1801) },
	246	{ "cdp1802",    _8bit,  0, CPU_DISASSEMBLE_NAME(cdp1802) },
244	247	{ "coldfire",   _16be,  0, CPU_DISASSEMBLE_NAME(coldfire) },
245	248	{ "cop410",     _8bit,  0, CPU_DISASSEMBLE_NAME(cop410) },
246	249	{ "cop420",     _8bit,  0, CPU_DISASSEMBLE_NAME(cop420) },
247	250	{ "cop444",     _8bit,  0, CPU_DISASSEMBLE_NAME(cop444) },
248		{ "cosmac",     _8bit,  0, CPU_DISASSEMBLE_NAME(cosmac) },
249	251	{ "cp1610",     _16be, -1, CPU_DISASSEMBLE_NAME(cp1610) },
250	252	{ "cquestlin",  _64be, -3, CPU_DISASSEMBLE_NAME(cquestlin) },
251	253	{ "cquestrot",  _64be, -3, CPU_DISASSEMBLE_NAME(cquestrot) },

trunk/src/emu/cpu/cosmac/cosmac.c

r22763	r22764
1	1	/**********************************************************************
2	2
3		RCA "COSMAC" CPU emulation
	3	RCA COSMAC CPU emulation
4	4
5	5	Copyright MESS Team.
6	6	Visit http://mamedev.org for licensing and usage restrictions.
r22763	r22764
12	12	#include "cosmac.h"
13	13	#include "coreutil.h"
14	14
15
16		/*
17
18		TODO:
19
20		- divide clock by 8
21		- min cycles -> 2 and 3
22
23		*/
24
25	15	// permit our enums to be saved
26	16	ALLOW_SAVE_TYPE(cosmac_device::cosmac_mode);
27	17	ALLOW_SAVE_TYPE(cosmac_device::cosmac_state);
r22763	r22764
88	78	//  STATIC OPCODE TABLES
89	79	//**************************************************************************
90	80
91		const cosmac_device::ophandler cosmac_device::s_opcodetable[256] =
	81	const cosmac_device::ophandler cdp1801_device::s_opcodetable[256] =
92	82	{
93		&cosmac_device::idl,    &cosmac_device::ldn,    &cosmac_device::ldn,    &cosmac_device::ldn,
94		&cosmac_device::ldn,    &cosmac_device::ldn,    &cosmac_device::ldn,    &cosmac_device::ldn,
95		&cosmac_device::ldn,    &cosmac_device::ldn,    &cosmac_device::ldn,    &cosmac_device::ldn,
96		&cosmac_device::ldn,    &cosmac_device::ldn,    &cosmac_device::ldn,    &cosmac_device::ldn,
	83	&cdp1801_device::idl,    &cdp1801_device::ldn,    &cdp1801_device::ldn,    &cdp1801_device::ldn,
	84	&cdp1801_device::ldn,    &cdp1801_device::ldn,    &cdp1801_device::ldn,    &cdp1801_device::ldn,
	85	&cdp1801_device::ldn,    &cdp1801_device::ldn,    &cdp1801_device::ldn,    &cdp1801_device::ldn,
	86	&cdp1801_device::ldn,    &cdp1801_device::ldn,    &cdp1801_device::ldn,    &cdp1801_device::ldn,
97	87
98		&cosmac_device::inc,    &cosmac_device::inc,    &cosmac_device::inc,    &cosmac_device::inc,
99		&cosmac_device::inc,    &cosmac_device::inc,    &cosmac_device::inc,    &cosmac_device::inc,
100		&cosmac_device::inc,    &cosmac_device::inc,    &cosmac_device::inc,    &cosmac_device::inc,
101		&cosmac_device::inc,    &cosmac_device::inc,    &cosmac_device::inc,    &cosmac_device::inc,
	88	&cdp1801_device::inc,    &cdp1801_device::inc,    &cdp1801_device::inc,    &cdp1801_device::inc,
	89	&cdp1801_device::inc,    &cdp1801_device::inc,    &cdp1801_device::inc,    &cdp1801_device::inc,
	90	&cdp1801_device::inc,    &cdp1801_device::inc,    &cdp1801_device::inc,    &cdp1801_device::inc,
	91	&cdp1801_device::inc,    &cdp1801_device::inc,    &cdp1801_device::inc,    &cdp1801_device::inc,
102	92
103		&cosmac_device::dec,    &cosmac_device::dec,    &cosmac_device::dec,    &cosmac_device::dec,
104		&cosmac_device::dec,    &cosmac_device::dec,    &cosmac_device::dec,    &cosmac_device::dec,
105		&cosmac_device::dec,    &cosmac_device::dec,    &cosmac_device::dec,    &cosmac_device::dec,
106		&cosmac_device::dec,    &cosmac_device::dec,    &cosmac_device::dec,    &cosmac_device::dec,
	93	&cdp1801_device::dec,    &cdp1801_device::dec,    &cdp1801_device::dec,    &cdp1801_device::dec,
	94	&cdp1801_device::dec,    &cdp1801_device::dec,    &cdp1801_device::dec,    &cdp1801_device::dec,
	95	&cdp1801_device::dec,    &cdp1801_device::dec,    &cdp1801_device::dec,    &cdp1801_device::dec,
	96	&cdp1801_device::dec,    &cdp1801_device::dec,    &cdp1801_device::dec,    &cdp1801_device::dec,
107	97
108		&cosmac_device::br,     &cosmac_device::bq,     &cosmac_device::bz,     &cosmac_device::bdf,
109		&cosmac_device::b,      &cosmac_device::b,      &cosmac_device::b,      &cosmac_device::b,
110		&cosmac_device::nbr,    &cosmac_device::bnq,    &cosmac_device::bnz,    &cosmac_device::bnf,
111		&cosmac_device::bn,     &cosmac_device::bn,     &cosmac_device::bn,     &cosmac_device::bn,
	98	&cdp1801_device::br,     &cdp1801_device::und,    &cdp1801_device::bz,     &cdp1801_device::bdf,
	99	&cdp1801_device::b,      &cdp1801_device::b,      &cdp1801_device::b,      &cdp1801_device::b,
	100	&cdp1801_device::nbr,    &cdp1801_device::und,    &cdp1801_device::bnz,    &cdp1801_device::bnf,
	101	&cdp1801_device::bn,     &cdp1801_device::bn,     &cdp1801_device::bn,     &cdp1801_device::bn,
112	102
113		&cosmac_device::lda,    &cosmac_device::lda,    &cosmac_device::lda,    &cosmac_device::lda,
114		&cosmac_device::lda,    &cosmac_device::lda,    &cosmac_device::lda,    &cosmac_device::lda,
115		&cosmac_device::lda,    &cosmac_device::lda,    &cosmac_device::lda,    &cosmac_device::lda,
116		&cosmac_device::lda,    &cosmac_device::lda,    &cosmac_device::lda,    &cosmac_device::lda,
	103	&cdp1801_device::lda,    &cdp1801_device::lda,    &cdp1801_device::lda,    &cdp1801_device::lda,
	104	&cdp1801_device::lda,    &cdp1801_device::lda,    &cdp1801_device::lda,    &cdp1801_device::lda,
	105	&cdp1801_device::lda,    &cdp1801_device::lda,    &cdp1801_device::lda,    &cdp1801_device::lda,
	106	&cdp1801_device::lda,    &cdp1801_device::lda,    &cdp1801_device::lda,    &cdp1801_device::lda,
117	107
118		&cosmac_device::str,    &cosmac_device::str,    &cosmac_device::str,    &cosmac_device::str,
119		&cosmac_device::str,    &cosmac_device::str,    &cosmac_device::str,    &cosmac_device::str,
120		&cosmac_device::str,    &cosmac_device::str,    &cosmac_device::str,    &cosmac_device::str,
121		&cosmac_device::str,    &cosmac_device::str,    &cosmac_device::str,    &cosmac_device::str,
	108	&cdp1801_device::str,    &cdp1801_device::str,    &cdp1801_device::str,    &cdp1801_device::str,
	109	&cdp1801_device::str,    &cdp1801_device::str,    &cdp1801_device::str,    &cdp1801_device::str,
	110	&cdp1801_device::str,    &cdp1801_device::str,    &cdp1801_device::str,    &cdp1801_device::str,
	111	&cdp1801_device::str,    &cdp1801_device::str,    &cdp1801_device::str,    &cdp1801_device::str,
122	112
123		&cosmac_device::irx,    &cosmac_device::out,    &cosmac_device::out,    &cosmac_device::out,
124		&cosmac_device::out,    &cosmac_device::out,    &cosmac_device::out,    &cosmac_device::out,
125		&cosmac_device::inp,    &cosmac_device::inp,    &cosmac_device::inp,    &cosmac_device::inp,
126		&cosmac_device::inp,    &cosmac_device::inp,    &cosmac_device::inp,    &cosmac_device::inp,
	113	&cdp1801_device::und,    &cdp1801_device::out,    &cdp1801_device::out,    &cdp1801_device::out,
	114	&cdp1801_device::out,    &cdp1801_device::out,    &cdp1801_device::out,    &cdp1801_device::out,
	115	&cdp1801_device::und,    &cdp1801_device::inp,    &cdp1801_device::inp,    &cdp1801_device::inp,
	116	&cdp1801_device::inp,    &cdp1801_device::inp,    &cdp1801_device::inp,    &cdp1801_device::inp,
127	117
128		&cosmac_device::ret,    &cosmac_device::dis,    &cosmac_device::ldxa,   &cosmac_device::stxd,
129		&cosmac_device::adc,    &cosmac_device::sdb,    &cosmac_device::shrc,   &cosmac_device::smb,
130		&cosmac_device::sav,    &cosmac_device::mark,   &cosmac_device::req,    &cosmac_device::seq,
131		&cosmac_device::adci,   &cosmac_device::sdbi,   &cosmac_device::shlc,   &cosmac_device::smbi,
	118	&cdp1801_device::ret,    &cdp1801_device::dis,    &cdp1801_device::und,    &cdp1801_device::und,
	119	&cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,
	120	&cdp1801_device::sav,    &cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,
	121	&cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,
132	122
133		&cosmac_device::glo,    &cosmac_device::glo,    &cosmac_device::glo,    &cosmac_device::glo,
134		&cosmac_device::glo,    &cosmac_device::glo,    &cosmac_device::glo,    &cosmac_device::glo,
135		&cosmac_device::glo,    &cosmac_device::glo,    &cosmac_device::glo,    &cosmac_device::glo,
136		&cosmac_device::glo,    &cosmac_device::glo,    &cosmac_device::glo,    &cosmac_device::glo,
	123	&cdp1801_device::glo,    &cdp1801_device::glo,    &cdp1801_device::glo,    &cdp1801_device::glo,
	124	&cdp1801_device::glo,    &cdp1801_device::glo,    &cdp1801_device::glo,    &cdp1801_device::glo,
	125	&cdp1801_device::glo,    &cdp1801_device::glo,    &cdp1801_device::glo,    &cdp1801_device::glo,
	126	&cdp1801_device::glo,    &cdp1801_device::glo,    &cdp1801_device::glo,    &cdp1801_device::glo,
137	127
138		&cosmac_device::ghi,    &cosmac_device::ghi,    &cosmac_device::ghi,    &cosmac_device::ghi,
139		&cosmac_device::ghi,    &cosmac_device::ghi,    &cosmac_device::ghi,    &cosmac_device::ghi,
140		&cosmac_device::ghi,    &cosmac_device::ghi,    &cosmac_device::ghi,    &cosmac_device::ghi,
141		&cosmac_device::ghi,    &cosmac_device::ghi,    &cosmac_device::ghi,    &cosmac_device::ghi,
	128	&cdp1801_device::ghi,    &cdp1801_device::ghi,    &cdp1801_device::ghi,    &cdp1801_device::ghi,
	129	&cdp1801_device::ghi,    &cdp1801_device::ghi,    &cdp1801_device::ghi,    &cdp1801_device::ghi,
	130	&cdp1801_device::ghi,    &cdp1801_device::ghi,    &cdp1801_device::ghi,    &cdp1801_device::ghi,
	131	&cdp1801_device::ghi,    &cdp1801_device::ghi,    &cdp1801_device::ghi,    &cdp1801_device::ghi,
142	132
143		&cosmac_device::plo,    &cosmac_device::plo,    &cosmac_device::plo,    &cosmac_device::plo,
144		&cosmac_device::plo,    &cosmac_device::plo,    &cosmac_device::plo,    &cosmac_device::plo,
145		&cosmac_device::plo,    &cosmac_device::plo,    &cosmac_device::plo,    &cosmac_device::plo,
146		&cosmac_device::plo,    &cosmac_device::plo,    &cosmac_device::plo,    &cosmac_device::plo,
	133	&cdp1801_device::plo,    &cdp1801_device::plo,    &cdp1801_device::plo,    &cdp1801_device::plo,
	134	&cdp1801_device::plo,    &cdp1801_device::plo,    &cdp1801_device::plo,    &cdp1801_device::plo,
	135	&cdp1801_device::plo,    &cdp1801_device::plo,    &cdp1801_device::plo,    &cdp1801_device::plo,
	136	&cdp1801_device::plo,    &cdp1801_device::plo,    &cdp1801_device::plo,    &cdp1801_device::plo,
147	137
148		&cosmac_device::phi,    &cosmac_device::phi,    &cosmac_device::phi,    &cosmac_device::phi,
149		&cosmac_device::phi,    &cosmac_device::phi,    &cosmac_device::phi,    &cosmac_device::phi,
150		&cosmac_device::phi,    &cosmac_device::phi,    &cosmac_device::phi,    &cosmac_device::phi,
151		&cosmac_device::phi,    &cosmac_device::phi,    &cosmac_device::phi,    &cosmac_device::phi,
	138	&cdp1801_device::phi,    &cdp1801_device::phi,    &cdp1801_device::phi,    &cdp1801_device::phi,
	139	&cdp1801_device::phi,    &cdp1801_device::phi,    &cdp1801_device::phi,    &cdp1801_device::phi,
	140	&cdp1801_device::phi,    &cdp1801_device::phi,    &cdp1801_device::phi,    &cdp1801_device::phi,
	141	&cdp1801_device::phi,    &cdp1801_device::phi,    &cdp1801_device::phi,    &cdp1801_device::phi,
152	142
153		&cosmac_device::lbr,    &cosmac_device::lbq,    &cosmac_device::lbz,    &cosmac_device::lbdf,
154		&cosmac_device::nop,    &cosmac_device::lsnq,   &cosmac_device::lsnz,   &cosmac_device::lsnf,
155		&cosmac_device::nlbr,   &cosmac_device::lbnq,   &cosmac_device::lbnz,   &cosmac_device::lbnf,
156		&cosmac_device::lsie,   &cosmac_device::lsq,    &cosmac_device::lsz,    &cosmac_device::lsdf,
	143	&cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,
	144	&cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,
	145	&cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,
	146	&cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,    &cdp1801_device::und,
157	147
158		&cosmac_device::sep,    &cosmac_device::sep,    &cosmac_device::sep,    &cosmac_device::sep,
159		&cosmac_device::sep,    &cosmac_device::sep,    &cosmac_device::sep,    &cosmac_device::sep,
160		&cosmac_device::sep,    &cosmac_device::sep,    &cosmac_device::sep,    &cosmac_device::sep,
161		&cosmac_device::sep,    &cosmac_device::sep,    &cosmac_device::sep,    &cosmac_device::sep,
	148	&cdp1801_device::sep,    &cdp1801_device::sep,    &cdp1801_device::sep,    &cdp1801_device::sep,
	149	&cdp1801_device::sep,    &cdp1801_device::sep,    &cdp1801_device::sep,    &cdp1801_device::sep,
	150	&cdp1801_device::sep,    &cdp1801_device::sep,    &cdp1801_device::sep,    &cdp1801_device::sep,
	151	&cdp1801_device::sep,    &cdp1801_device::sep,    &cdp1801_device::sep,    &cdp1801_device::sep,
162	152
163		&cosmac_device::sex,    &cosmac_device::sex,    &cosmac_device::sex,    &cosmac_device::sex,
164		&cosmac_device::sex,    &cosmac_device::sex,    &cosmac_device::sex,    &cosmac_device::sex,
165		&cosmac_device::sex,    &cosmac_device::sex,    &cosmac_device::sex,    &cosmac_device::sex,
166		&cosmac_device::sex,    &cosmac_device::sex,    &cosmac_device::sex,    &cosmac_device::sex,
	153	&cdp1801_device::sex,    &cdp1801_device::sex,    &cdp1801_device::sex,    &cdp1801_device::sex,
	154	&cdp1801_device::sex,    &cdp1801_device::sex,    &cdp1801_device::sex,    &cdp1801_device::sex,
	155	&cdp1801_device::sex,    &cdp1801_device::sex,    &cdp1801_device::sex,    &cdp1801_device::sex,
	156	&cdp1801_device::sex,    &cdp1801_device::sex,    &cdp1801_device::sex,    &cdp1801_device::sex,
167	157
168		&cosmac_device::ldx,    &cosmac_device::_or,    &cosmac_device::_and,   &cosmac_device::_xor,
169		&cosmac_device::add,    &cosmac_device::sd,     &cosmac_device::shr,    &cosmac_device::sm,
170		&cosmac_device::ldi,    &cosmac_device::ori,    &cosmac_device::ani,    &cosmac_device::xri,
171		&cosmac_device::adi,    &cosmac_device::sdi,    &cosmac_device::shl,    &cosmac_device::smi
	158	&cdp1801_device::ldx,    &cdp1801_device::_or,    &cdp1801_device::_and,   &cdp1801_device::_xor,
	159	&cdp1801_device::add,    &cdp1801_device::sd,     &cdp1801_device::shr,    &cdp1801_device::sm,
	160	&cdp1801_device::ldi,    &cdp1801_device::ori,    &cdp1801_device::ani,    &cdp1801_device::xri,
	161	&cdp1801_device::adi,    &cdp1801_device::sdi,    &cdp1801_device::und,    &cdp1801_device::smi
172	162	};
173	163
	164	cosmac_device::ophandler cdp1801_device::get_ophandler(UINT8 opcode)
	165	{
	166	return s_opcodetable[opcode];
	167	}
174	168
	169	const cosmac_device::ophandler cdp1802_device::s_opcodetable[256] =
	170	{
	171	&cdp1802_device::idl,    &cdp1802_device::ldn,    &cdp1802_device::ldn,    &cdp1802_device::ldn,
	172	&cdp1802_device::ldn,    &cdp1802_device::ldn,    &cdp1802_device::ldn,    &cdp1802_device::ldn,
	173	&cdp1802_device::ldn,    &cdp1802_device::ldn,    &cdp1802_device::ldn,    &cdp1802_device::ldn,
	174	&cdp1802_device::ldn,    &cdp1802_device::ldn,    &cdp1802_device::ldn,    &cdp1802_device::ldn,
175	175
	176	&cdp1802_device::inc,    &cdp1802_device::inc,    &cdp1802_device::inc,    &cdp1802_device::inc,
	177	&cdp1802_device::inc,    &cdp1802_device::inc,    &cdp1802_device::inc,    &cdp1802_device::inc,
	178	&cdp1802_device::inc,    &cdp1802_device::inc,    &cdp1802_device::inc,    &cdp1802_device::inc,
	179	&cdp1802_device::inc,    &cdp1802_device::inc,    &cdp1802_device::inc,    &cdp1802_device::inc,
	180
	181	&cdp1802_device::dec,    &cdp1802_device::dec,    &cdp1802_device::dec,    &cdp1802_device::dec,
	182	&cdp1802_device::dec,    &cdp1802_device::dec,    &cdp1802_device::dec,    &cdp1802_device::dec,
	183	&cdp1802_device::dec,    &cdp1802_device::dec,    &cdp1802_device::dec,    &cdp1802_device::dec,
	184	&cdp1802_device::dec,    &cdp1802_device::dec,    &cdp1802_device::dec,    &cdp1802_device::dec,
	185
	186	&cdp1802_device::br,     &cdp1802_device::bq,     &cdp1802_device::bz,     &cdp1802_device::bdf,
	187	&cdp1802_device::b,      &cdp1802_device::b,      &cdp1802_device::b,      &cdp1802_device::b,
	188	&cdp1802_device::nbr,    &cdp1802_device::bnq,    &cdp1802_device::bnz,    &cdp1802_device::bnf,
	189	&cdp1802_device::bn,     &cdp1802_device::bn,     &cdp1802_device::bn,     &cdp1802_device::bn,
	190
	191	&cdp1802_device::lda,    &cdp1802_device::lda,    &cdp1802_device::lda,    &cdp1802_device::lda,
	192	&cdp1802_device::lda,    &cdp1802_device::lda,    &cdp1802_device::lda,    &cdp1802_device::lda,
	193	&cdp1802_device::lda,    &cdp1802_device::lda,    &cdp1802_device::lda,    &cdp1802_device::lda,
	194	&cdp1802_device::lda,    &cdp1802_device::lda,    &cdp1802_device::lda,    &cdp1802_device::lda,
	195
	196	&cdp1802_device::str,    &cdp1802_device::str,    &cdp1802_device::str,    &cdp1802_device::str,
	197	&cdp1802_device::str,    &cdp1802_device::str,    &cdp1802_device::str,    &cdp1802_device::str,
	198	&cdp1802_device::str,    &cdp1802_device::str,    &cdp1802_device::str,    &cdp1802_device::str,
	199	&cdp1802_device::str,    &cdp1802_device::str,    &cdp1802_device::str,    &cdp1802_device::str,
	200
	201	&cdp1802_device::irx,    &cdp1802_device::out,    &cdp1802_device::out,    &cdp1802_device::out,
	202	&cdp1802_device::out,    &cdp1802_device::out,    &cdp1802_device::out,    &cdp1802_device::out,
	203	&cdp1802_device::inp,    &cdp1802_device::inp,    &cdp1802_device::inp,    &cdp1802_device::inp,
	204	&cdp1802_device::inp,    &cdp1802_device::inp,    &cdp1802_device::inp,    &cdp1802_device::inp,
	205
	206	&cdp1802_device::ret,    &cdp1802_device::dis,    &cdp1802_device::ldxa,   &cdp1802_device::stxd,
	207	&cdp1802_device::adc,    &cdp1802_device::sdb,    &cdp1802_device::shrc,   &cdp1802_device::smb,
	208	&cdp1802_device::sav,    &cdp1802_device::mark,   &cdp1802_device::req,    &cdp1802_device::seq,
	209	&cdp1802_device::adci,   &cdp1802_device::sdbi,   &cdp1802_device::shlc,   &cdp1802_device::smbi,
	210
	211	&cdp1802_device::glo,    &cdp1802_device::glo,    &cdp1802_device::glo,    &cdp1802_device::glo,
	212	&cdp1802_device::glo,    &cdp1802_device::glo,    &cdp1802_device::glo,    &cdp1802_device::glo,
	213	&cdp1802_device::glo,    &cdp1802_device::glo,    &cdp1802_device::glo,    &cdp1802_device::glo,
	214	&cdp1802_device::glo,    &cdp1802_device::glo,    &cdp1802_device::glo,    &cdp1802_device::glo,
	215
	216	&cdp1802_device::ghi,    &cdp1802_device::ghi,    &cdp1802_device::ghi,    &cdp1802_device::ghi,
	217	&cdp1802_device::ghi,    &cdp1802_device::ghi,    &cdp1802_device::ghi,    &cdp1802_device::ghi,
	218	&cdp1802_device::ghi,    &cdp1802_device::ghi,    &cdp1802_device::ghi,    &cdp1802_device::ghi,
	219	&cdp1802_device::ghi,    &cdp1802_device::ghi,    &cdp1802_device::ghi,    &cdp1802_device::ghi,
	220
	221	&cdp1802_device::plo,    &cdp1802_device::plo,    &cdp1802_device::plo,    &cdp1802_device::plo,
	222	&cdp1802_device::plo,    &cdp1802_device::plo,    &cdp1802_device::plo,    &cdp1802_device::plo,
	223	&cdp1802_device::plo,    &cdp1802_device::plo,    &cdp1802_device::plo,    &cdp1802_device::plo,
	224	&cdp1802_device::plo,    &cdp1802_device::plo,    &cdp1802_device::plo,    &cdp1802_device::plo,
	225
	226	&cdp1802_device::phi,    &cdp1802_device::phi,    &cdp1802_device::phi,    &cdp1802_device::phi,
	227	&cdp1802_device::phi,    &cdp1802_device::phi,    &cdp1802_device::phi,    &cdp1802_device::phi,
	228	&cdp1802_device::phi,    &cdp1802_device::phi,    &cdp1802_device::phi,    &cdp1802_device::phi,
	229	&cdp1802_device::phi,    &cdp1802_device::phi,    &cdp1802_device::phi,    &cdp1802_device::phi,
	230
	231	&cdp1802_device::lbr,    &cdp1802_device::lbq,    &cdp1802_device::lbz,    &cdp1802_device::lbdf,
	232	&cdp1802_device::nop,    &cdp1802_device::lsnq,   &cdp1802_device::lsnz,   &cdp1802_device::lsnf,
	233	&cdp1802_device::nlbr,   &cdp1802_device::lbnq,   &cdp1802_device::lbnz,   &cdp1802_device::lbnf,
	234	&cdp1802_device::lsie,   &cdp1802_device::lsq,    &cdp1802_device::lsz,    &cdp1802_device::lsdf,
	235
	236	&cdp1802_device::sep,    &cdp1802_device::sep,    &cdp1802_device::sep,    &cdp1802_device::sep,
	237	&cdp1802_device::sep,    &cdp1802_device::sep,    &cdp1802_device::sep,    &cdp1802_device::sep,
	238	&cdp1802_device::sep,    &cdp1802_device::sep,    &cdp1802_device::sep,    &cdp1802_device::sep,
	239	&cdp1802_device::sep,    &cdp1802_device::sep,    &cdp1802_device::sep,    &cdp1802_device::sep,
	240
	241	&cdp1802_device::sex,    &cdp1802_device::sex,    &cdp1802_device::sex,    &cdp1802_device::sex,
	242	&cdp1802_device::sex,    &cdp1802_device::sex,    &cdp1802_device::sex,    &cdp1802_device::sex,
	243	&cdp1802_device::sex,    &cdp1802_device::sex,    &cdp1802_device::sex,    &cdp1802_device::sex,
	244	&cdp1802_device::sex,    &cdp1802_device::sex,    &cdp1802_device::sex,    &cdp1802_device::sex,
	245
	246	&cdp1802_device::ldx,    &cdp1802_device::_or,    &cdp1802_device::_and,   &cdp1802_device::_xor,
	247	&cdp1802_device::add,    &cdp1802_device::sd,     &cdp1802_device::shr,    &cdp1802_device::sm,
	248	&cdp1802_device::ldi,    &cdp1802_device::ori,    &cdp1802_device::ani,    &cdp1802_device::xri,
	249	&cdp1802_device::adi,    &cdp1802_device::sdi,    &cdp1802_device::shl,    &cdp1802_device::smi
	250	};
	251
	252	cosmac_device::ophandler cdp1802_device::get_ophandler(UINT8 opcode)
	253	{
	254	return s_opcodetable[opcode];
	255	}
	256
	257
	258
176	259	//**************************************************************************
177	260	//  DEVICE INTERFACE
178	261	//**************************************************************************
179	262
180	263	// device type definition
181		const device_type COSMAC = &device_creator<cosmac_device>;
	264	const device_type CDP1801 = &device_creator<cdp1801_device>;
	265	const device_type CDP1802 = &device_creator<cdp1802_device>;
182	266
183	267
184	268	//-------------------------------------------------
185	269	//  cosmac_device - constructor
186	270	//-------------------------------------------------
187	271
188		cosmac_device::cosmac_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
189		: cpu_device(mconfig, COSMAC, "COSMAC", tag, owner, clock),
	272	cosmac_device::cosmac_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
	273	: cpu_device(mconfig, type, name, tag, owner, clock),
190	274	m_program_config("program", ENDIANNESS_LITTLE, 8, 16),
191	275	m_io_config("io", ENDIANNESS_LITTLE, 8, 3),
192	276	m_op(0),
193	277	m_state(COSMAC_STATE_1_RESET),
194	278	m_mode(COSMAC_MODE_RESET),
195		m_irq(0),
196		m_dmain(0),
197		m_dmaout(0),
	279	m_irq(CLEAR_LINE),
	280	m_dmain(CLEAR_LINE),
	281	m_dmaout(CLEAR_LINE),
198	282	m_program(NULL),
199	283	m_io(NULL),
200	284	m_direct(NULL)
r22763	r22764
205	289
206	290
207	291	//-------------------------------------------------
	292	//  cdp1801_device - constructor
	293	//-------------------------------------------------
	294
	295	cdp1801_device::cdp1801_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	296	: cosmac_device(mconfig, CDP1801, "CDP1801", tag, owner, clock)
	297	{
	298	}
	299
	300
	301	//-------------------------------------------------
	302	//  cdp1802_device - constructor
	303	//-------------------------------------------------
	304
	305	cdp1802_device::cdp1802_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	306	: cosmac_device(mconfig, CDP1802, "CDP1802", tag, owner, clock)
	307	{
	308	}
	309
	310
	311	//-------------------------------------------------
208	312	//  device_config_complete - perform any
209	313	//  operations now that the configuration is
210	314	//  complete
r22763	r22764
420	524	//  helper function
421	525	//-------------------------------------------------
422	526
423		offs_t cosmac_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
	527	offs_t cdp1801_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
424	528	{
425		extern CPU_DISASSEMBLE( cosmac );
426		return CPU_DISASSEMBLE_NAME(cosmac)(this, buffer, pc, oprom, opram, options);
	529	extern CPU_DISASSEMBLE( cdp1801 );
	530	return CPU_DISASSEMBLE_NAME( cdp1801 )(this, buffer, pc, oprom, opram, options);
427	531	}
428	532
	533	offs_t cdp1802_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
	534	{
	535	extern CPU_DISASSEMBLE( cdp1802 );
	536	return CPU_DISASSEMBLE_NAME( cdp1802 )(this, buffer, pc, oprom, opram, options);
	537	}
429	538
430	539
431	540	//**************************************************************************
r22763	r22764
821	930	inline void cosmac_device::execute_instruction()
822	931	{
823	932	// parse the instruction
824		(this->*s_opcodetable[m_op])();
	933	(this->*this->get_ophandler(m_op))();
825	934
826	935	m_icount -= CLOCKS_EXECUTE;
827	936
r22763	r22764
1107	1216	// control instructions opcode handlers
1108	1217	void cosmac_device::idl()   { /* idle */ }
1109	1218	void cosmac_device::nop()   { m_icount -= CLOCKS_EXECUTE; }
	1219	void cosmac_device::und()   { /* undefined opcode in CDP1801 */ m_icount -= CLOCKS_EXECUTE; }
1110	1220	void cosmac_device::sep()   { P = N; }
1111	1221	void cosmac_device::sex()   { X = N; }
1112	1222	void cosmac_device::seq()   { set_q_flag(1); }

trunk/src/emu/cpu/cosmac/cosdasm.c

r22763	r22764
1		/*****************************************************************************
2		*
3		*   disasm.c
4		*   portable cosmac cdp1802 emulator interface
5		*
6		*   Copyright Peter Trauner, all rights reserved.
7		*
8		*   - This source code is released as freeware for non-commercial purposes.
9		*   - You are free to use and redistribute this code in modified or
10		*     unmodified form, provided you list me in the credits.
11		*   - If you modify this source code, you must add a notice to each modified
12		*     source file that it has been changed.  If you're a nice person, you
13		*     will clearly mark each change too.  :)
14		*   - If you wish to use this for commercial purposes, please contact me at
15		*     peter.trauner@jk.uni-linz.ac.at
16		*   - The author of this copywritten work reserves the right to change the
17		*     terms of its usage and license at any time, including retroactively
18		*   - This entire notice must remain in the source code.
19		*
20		*****************************************************************************/
	1	/***************************************************************************
21	2
	3	cosdasm.c
	4
	5	Simple RCA COSMAC disassembler.
	6	Written by Curt Coder
	7
	8	***************************************************************************/
	9
22	10	#include "emu.h"
23		#include "debugger.h"
24	11
25		#include "cosmac.h"
26
27		enum Adr
	12	enum
28	13	{
29		Ill,
30		Imm,
31		Imp,
32		Imp2, // lownibble contains register number
33		Imp3, // bit 0,1,2 1..7 contains n0,n1,n2 level
34		Low, // only low byte of address specified
35		Abs
	14	TYPE_1801,
	15	TYPE_1802
36	16	};
37	17
38		static const struct { const char *mnemonic; Adr adr; } table[]={
39		{ "IDL",    Imp }, { "LDN", Imp2},{ 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
40		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
	18	#define CDP1801_OPCODE(...) \
	19	sprintf(buffer, __VA_ARGS__)
41	20
42		{ "INC",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
43		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
	21	#define CDP1802_OPCODE(...) \
	22	if (variant < TYPE_1802) sprintf(buffer, "illegal"); else sprintf(buffer, __VA_ARGS__)
44	23
45		{ "DEC",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
46		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
	24	static offs_t implied(const UINT8 opcode)
	25	{
	26	return opcode & 0x0f;
	27	}
47	28
	29	static offs_t immediate(const UINT8 **opram)
	30	{
	31	return *(*opram)++;
	32	}
48	33
49		{ "BR",     Low }, { "BQ",      Low }, { "BZ",      Low }, { "BDF",     Low },
50		{ "B1",     Low }, { "B2",      Low }, { "B3",      Low }, { "B4",      Low },
51		{ "SKP",    Low }, { "BNQ",     Low }, { "BNZ",     Low }, { "BNF",     Low },
52		{ "BN1",    Low }, { "BN2",     Low }, { "BN3",     Low }, { "BN4",     Low },
	34	static offs_t short_branch(offs_t pc, const UINT8 **opram)
	35	{
	36	return (pc & 0xff00) | immediate(opram);
	37	}
53	38
54		{ "LDA",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
55		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
	39	static offs_t long_branch(const UINT8 **opram)
	40	{
	41	return (immediate(opram) << 8) | immediate(opram);
	42	}
56	43
57		{ "STR",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
58		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
	44	static offs_t short_skip(offs_t pc)
	45	{
	46	return pc + 2;
	47	}
59	48
60		{ "IRX",    Imp } ,{ "OUT", Imp3},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 },
61		{ 0 } ,{ "INP", Imp3},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 },
	49	static offs_t long_skip(offs_t pc)
	50	{
	51	return pc + 3;
	52	}
62	53
63		{ "RET",    Imp }, { "DIS",     Imp }, { "LDXA",    Imp }, { "STXD",    Imp },
64		{ "ADC",    Imp }, { "SDB",     Imp }, { "SHRC",    Imp }, { "SMB",     Imp },
65		{ "SAV",    Imp }, { "MARK",    Imp }, { "REQ",     Imp }, { "SEQ",     Imp },
66		{ "ADCI",   Imm }, { "SDBI",    Imm }, { "SHLC",    Imp }, { "SMBI",    Imm },
	54	static UINT32 disassemble(device_t *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 variant)
	55	{
	56	const UINT8 *startram = opram;
	57	UINT32 flags = 0;
67	58
	59	opram++;
	60	UINT8 opcode = *oprom++;
	61
	62	switch (opcode)
	63	{
	64	case 0x00: CDP1801_OPCODE("IDL"); break;
	65	case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
	66	case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
	67	CDP1801_OPCODE("LDN R%01X", implied(opcode)); break;
	68	case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
	69	case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
	70	CDP1801_OPCODE("INC R%01X", implied(opcode)); break;
	71	case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
	72	case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
	73	CDP1801_OPCODE("DEC R%01X", implied(opcode)); break;
	74	case 0x30: CDP1801_OPCODE("BR %04X", short_branch(pc, &opram)); break;
	75	case 0x32: CDP1801_OPCODE("BZ %04X", short_branch(pc, &opram)); break;
	76	case 0x33: CDP1801_OPCODE("BDF %04X", short_branch(pc, &opram)); break;
	77	case 0x34: CDP1801_OPCODE("B1 %04X", short_branch(pc, &opram)); break;
	78	case 0x35: CDP1801_OPCODE("B2 %04X", short_branch(pc, &opram)); break;
	79	case 0x36: CDP1801_OPCODE("B3 %04X", short_branch(pc, &opram)); break;
	80	case 0x37: CDP1801_OPCODE("B4 %04X", short_branch(pc, &opram)); break;
	81	case 0x38: CDP1801_OPCODE("SKP %04X", short_skip(pc)); break;
	82	case 0x3a: CDP1801_OPCODE("BNZ %04X", short_branch(pc, &opram)); break;
	83	case 0x3b: CDP1801_OPCODE("BNF %04X", short_branch(pc, &opram)); break;
	84	case 0x3c: CDP1801_OPCODE("BN1 %04X", short_branch(pc, &opram)); break;
	85	case 0x3d: CDP1801_OPCODE("BN2 %04X", short_branch(pc, &opram)); break;
	86	case 0x3e: CDP1801_OPCODE("BN3 %04X", short_branch(pc, &opram)); break;
	87	case 0x3f: CDP1801_OPCODE("BN4 %04X", short_branch(pc, &opram)); break;
	88	case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
	89	case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
	90	CDP1801_OPCODE("LDA R%01X", implied(opcode)); break;
	91	case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
	92	case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
	93	CDP1801_OPCODE("STR R%01X", implied(opcode)); break;
	94	case 0x61: CDP1801_OPCODE("OUT 1"); break;
	95	case 0x62: CDP1801_OPCODE("OUT 2"); break;
	96	case 0x63: CDP1801_OPCODE("OUT 3"); break;
	97	case 0x64: CDP1801_OPCODE("OUT 4"); break;
	98	case 0x65: CDP1801_OPCODE("OUT 5"); break;
	99	case 0x66: CDP1801_OPCODE("OUT 6"); break;
	100	case 0x67: CDP1801_OPCODE("OUT 7"); break;
	101	case 0x69: CDP1801_OPCODE("INP 1"); break;
	102	case 0x6a: CDP1801_OPCODE("INP 2"); break;
	103	case 0x6b: CDP1801_OPCODE("INP 3"); break;
	104	case 0x6c: CDP1801_OPCODE("INP 4"); break;
	105	case 0x6d: CDP1801_OPCODE("INP 5"); break;
	106	case 0x6e: CDP1801_OPCODE("INP 6"); break;
	107	case 0x6f: CDP1801_OPCODE("INP 7"); break;
	108	case 0x70: CDP1801_OPCODE("RET"); flags = DASMFLAG_STEP_OUT; break;
	109	case 0x71: CDP1801_OPCODE("DIS"); flags = DASMFLAG_STEP_OUT; break;
	110	case 0x78: CDP1801_OPCODE("SAV"); break;
	111	case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
	112	case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
	113	CDP1801_OPCODE("GLO R%01X", implied(opcode)); break;
	114	case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
	115	case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f:
	116	CDP1801_OPCODE("GHI R%01X", implied(opcode)); break;
	117	case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
	118	case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
	119	CDP1801_OPCODE("PLO R%01X", implied(opcode)); break;
	120	case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
	121	case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
	122	CDP1801_OPCODE("PHI R%01X", implied(opcode)); break;
	123	case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
	124	case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
	125	CDP1801_OPCODE("SEP R%01X", implied(opcode)); flags = DASMFLAG_STEP_OVER; break;
	126	case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
	127	case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef:
	128	CDP1801_OPCODE("SEX R%01X", implied(opcode)); break;
	129	case 0xf0: CDP1801_OPCODE("LDX"); break;
	130	case 0xf1: CDP1801_OPCODE("OR"); break;
	131	case 0xf2: CDP1801_OPCODE("AND"); break;
	132	case 0xf3: CDP1801_OPCODE("XOR"); break;
	133	case 0xf4: CDP1801_OPCODE("ADD"); break;
	134	case 0xf5: CDP1801_OPCODE("SD"); break;
	135	case 0xf6: CDP1801_OPCODE("SHR"); break;
	136	case 0xf7: CDP1801_OPCODE("SM"); break;
	137	case 0xf8: CDP1801_OPCODE("LDI #%02X", immediate(&opram)); break;
	138	case 0xf9: CDP1801_OPCODE("ORI #%02X", immediate(&opram)); break;
	139	case 0xfa: CDP1801_OPCODE("ANI #%02X", immediate(&opram)); break;
	140	case 0xfb: CDP1801_OPCODE("XRI #%02X", immediate(&opram)); break;
	141	case 0xfc: CDP1801_OPCODE("ADI #%02X", immediate(&opram)); break;
	142	case 0xfd: CDP1801_OPCODE("SDI #%02X", immediate(&opram)); break;
	143	case 0xff: CDP1801_OPCODE("SMI #%02X", immediate(&opram)); break;
	144	// CDP1802
	145	case 0x31: CDP1802_OPCODE("BQ %04X", short_branch(pc, &opram)); break;
	146	case 0x39: CDP1802_OPCODE("BNQ %04X", short_branch(pc, &opram)); break;
	147	case 0x60: CDP1802_OPCODE("IRX"); break;
	148	case 0x72: CDP1802_OPCODE("LDXA"); break;
	149	case 0x73: CDP1802_OPCODE("STXD"); break;
	150	case 0x74: CDP1802_OPCODE("ADC"); break;
	151	case 0x75: CDP1802_OPCODE("SDB"); break;
	152	case 0x76: CDP1802_OPCODE("SHRC"); break;
	153	case 0x77: CDP1802_OPCODE("SMB"); break;
	154	case 0x79: CDP1802_OPCODE("MARK"); break;
	155	case 0x7a: CDP1802_OPCODE("REQ"); break;
	156	case 0x7b: CDP1802_OPCODE("SEQ"); break;
	157	case 0x7c: CDP1802_OPCODE("ADCI #%02X", immediate(&opram)); break;
	158	case 0x7d: CDP1802_OPCODE("SDBI #%02X", immediate(&opram)); break;
	159	case 0x7e: CDP1802_OPCODE("SHLC"); break;
	160	case 0x7f: CDP1802_OPCODE("SMBI #%02X", immediate(&opram)); break;
	161	case 0xc0: CDP1802_OPCODE("LBR %04X", long_branch(&opram)); break;
	162	case 0xc1: CDP1802_OPCODE("LBQ %04X", long_branch(&opram)); break;
	163	case 0xc2: CDP1802_OPCODE("LBZ %04X", long_branch(&opram)); break;
	164	case 0xc3: CDP1802_OPCODE("LBDF %04X", long_branch(&opram)); break;
	165	case 0xc4: CDP1802_OPCODE("NOP"); break;
	166	case 0xc5: CDP1802_OPCODE("LSNQ %04X", long_skip(pc)); break;
	167	case 0xc6: CDP1802_OPCODE("LSNZ %04X", long_skip(pc)); break;
	168	case 0xc7: CDP1802_OPCODE("LSNF %04X", long_skip(pc)); break;
	169	case 0xc8: CDP1802_OPCODE("LSKP %04X", long_skip(pc)); break;
	170	case 0xc9: CDP1802_OPCODE("LBNQ %04X", long_skip(pc)); break;
	171	case 0xca: CDP1802_OPCODE("LBNZ %04X", long_skip(pc)); break;
	172	case 0xcb: CDP1802_OPCODE("LBNF %04X", long_skip(pc)); break;
	173	case 0xcc: CDP1802_OPCODE("LSIE %04X", long_skip(pc)); break;
	174	case 0xcd: CDP1802_OPCODE("LSQ %04X", long_skip(pc)); break;
	175	case 0xce: CDP1802_OPCODE("LSZ %04X", long_skip(pc)); break;
	176	case 0xcf: CDP1802_OPCODE("LSDF %04X", long_skip(pc)); break;
	177	case 0xfe: CDP1802_OPCODE("SHL"); break;
	178	//
	179	default:   CDP1801_OPCODE("illegal"); break;
	180	}
68	181
69		{ "GLO",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
70		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
	182	return (opram - startram) | flags | DASMFLAG_SUPPORTED;
	183	}
71	184
72		{ "GHI",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
73		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
74	185
75		{ "PLO",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
76		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
	186	CPU_DISASSEMBLE( cdp1801 )
	187	{
	188	return disassemble(device, buffer, pc, oprom, opram, TYPE_1801);
	189	}
77	190
78		{ "PHI",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
79		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
80	191
81		{ "LBR",    Abs }, { "LBQ",     Abs }, { "LBZ",     Abs }, { "LBDF",    Abs },
82		{ "NOP",    Imp }, { "LSNQ",    Imp }, { "LSNZ",    Imp }, { "LSNF",    Imp },
83		{ "LSKP",   Imp }, { "LBNQ",    Abs }, { "LBNZ",    Abs }, { "LBNF",    Abs },
84		{ "LSIE",   Imp }, { "LSQ",     Imp }, { "LSZ",     Imp }, { "LSDF",    Imp },
85
86		{ "SEP",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
87		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
88
89		{ "SEX",    Imp2},{ 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
90		{ 0 }, { 0 }, { 0 }, { 0 },  { 0 }, { 0 }, { 0 }, { 0 },
91
92		{ "LDX",    Imp }, { "OR",      Imp }, { "AND",     Imp }, { "XOR",     Imp },
93		{ "ADD",    Imp }, { "SD",      Imp }, { "SHR",     Imp }, { "SM",      Imp },
94		{ "LDI",    Imm }, { "ORI",     Imm }, { "ANI",     Imm }, { "XRI",     Imm },
95		{ "ADI",    Imm }, { "SDI",     Imm }, { "SHL",     Imp }, { "SMI",     Imm },
96
97		};
98
99		CPU_DISASSEMBLE( cosmac )
	192	CPU_DISASSEMBLE( cdp1802 )
100	193	{
101		UINT32 flags = 0;
102		int oldpc = pc;
103		int oper;
104		UINT16 absolut;
105		oldpc&=0xffff;
106		pc=oldpc;
107		oper=oprom[pc++ - oldpc];
108
109		switch(oper&0xf0) {
110		case 0:
111		if (oper==0) {
112		sprintf(buffer,"%-5s",table[oper].mnemonic);
113		} else {
114		sprintf(buffer,"%-5sR%.1x",table[(oper&0xf0)|1].mnemonic, oper&0x0f);
115		}
116		break;
117		case 0xd0:
118		flags = DASMFLAG_STEP_OVER;
119		/* fall through */
120		case 0x10:
121		case 0x20:
122		case 0x40:
123		case 0x50:
124		case 0x80:
125		case 0x90:
126		case 0xa0:
127		case 0xb0:
128		case 0xe0:
129		sprintf(buffer,"%-5sR%.1x",table[oper&0xf0].mnemonic, oper&0x0f);
130		break;
131		default:
132		switch(oper&0xf8) {
133		case 0x60:
134		if (oper==0x60) {
135		sprintf(buffer,"%-5s",table[oper].mnemonic);
136		} else {
137		sprintf(buffer,"%-5s%d",table[(oper&0xf8)|1].mnemonic, oper&0x7);
138		}
139		break;
140		case 0x68:
141		sprintf(buffer,"%-5s%d",table[(oper&0xf8)|1].mnemonic, oper&0x7);
142		break;
143		default:
144		switch (table[oper].adr) {
145		case Imp:
146		sprintf(buffer,"%-5s",table[oper].mnemonic);
147		if (oper == 0x70 || oper == 0x71)
148		flags = DASMFLAG_STEP_OUT;
149		break;
150		case Imm:
151		sprintf(buffer,"%-5s#%.2x",table[oper].mnemonic,oprom[pc++ - oldpc]);
152		break;
153		case Low:
154		absolut=oprom[pc++ - oldpc];
155		absolut|=pc&0xff00;
156		sprintf(buffer,"%-5s%.4x",table[oper].mnemonic,absolut);
157		break;
158		case Abs:
159		absolut=oprom[pc++ - oldpc]<<8;
160		absolut|=oprom[pc++ - oldpc];
161		sprintf(buffer,"%-5s%.4x",table[oper].mnemonic,absolut);
162		break;
163		default:
164		sprintf(buffer,"%-5s%.2x","ill",oper);
165		break;
166		}
167		break;
168		}
169		break;
170		}
171
172		return (pc-oldpc) | flags | DASMFLAG_SUPPORTED;
	194	return disassemble(device, buffer, pc, oprom, opram, TYPE_1802);
173	195	}

trunk/src/emu/cpu/cosmac/cosmac.h

r22763	r22764
1	1	/**********************************************************************
2	2
3		RCA "COSMAC" CPU emulation
	3	RCA COSMAC CPU emulation
4	4
5	5	Copyright MESS Team.
6	6	Visit http://mamedev.org for licensing and usage restrictions.
7	7
8	8	**********************************************************************
9	9	_____   _____
	10	Vcc   1 |*    \_/     | 40  Vdd
	11	_BUS 3   2 |             | 39  _BUS 4
	12	_BUS 2   3 |             | 38  _BUS 5
	13	_BUS 1   4 |             | 37  _BUS 6
	14	_BUS 0   5 |             | 36  _BUS 7
	15	_N0   6 |             | 35  Vss
	16	_N1   7 |             | 34  _EF1
	17	_N2   8 |             | 33  _EF2
	18	_N3   9 |             | 32  _EF3
	19	*  10 |   CDP1801U  | 31  _EF4
	20	*  11 |             | 30  _DMA OUT
	21	*  12 |             | 29  _INTERRUPT
	22	*  13 |             | 28  _DMA IN
	23	*  14 |             | 27  _CLEAR
	24	_CLOCK  15 |             | 26  _LOAD
	25	_TPB  16 |             | 25  _SC2
	26	_TPA  17 |             | 24  _SC1
	27	*  18 |             | 23  _SC0
	28	MWR  19 |             | 22  _M READ
	29	Vss  20 |_____________| 21  *
	30
	31	_____   _____
	32	Vcc   1 |*    \_/     | 28  Vdd
	33	_BUS 4   2 |             | 27  _BUS 3
	34	_BUS 5   3 |             | 26  _BUS 2
	35	_BUS 6   4 |             | 25  _BUS 1
	36	_BUS 7   5 |             | 24  _BUS 0
	37	_MA0   6 |             | 23  *
	38	_MA1   7 |   CDP1801C  | 22  _TPB
	39	_MA2   8 |             | 21  *
	40	_MA3   9 |             | 20  *
	41	_MA4  10 |             | 19  *
	42	_MA5  11 |             | 18  *
	43	_MA6  12 |             | 17  *
	44	_MA7  13 |             | 16  *
	45	Vss  14 |_____________| 15  _CLEAR
	46
	47	_____   _____
10	48	CLOCK   1 |*    \_/     | 40  Vdd
11	49	_WAIT   2 |             | 39  _XTAL
12	50	_CLEAR   3 |             | 38  _DMA IN
r22763	r22764
144	182	{
145	183	public:
146	184	// construction/destruction
147		cosmac_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	185	cosmac_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
148	186
149	187	// public interfaces
150	188	offs_t get_memory_address();
r22763	r22764
173	211	// device_disasm_interface overrides
174	212	virtual UINT32 disasm_min_opcode_bytes() const;
175	213	virtual UINT32 disasm_max_opcode_bytes() const;
176		virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
177	214
178	215	// helpers
179	216	inline UINT8 read_opcode(offs_t pc);
r22763	r22764
290	327	// control instructions opcode handlers
291	328	void idl();
292	329	void nop();
	330	void und();
293	331	void sep();
294	332	void sex();
295	333	void seq();
r22763	r22764
373	411
374	412	// opcode/condition tables
375	413	typedef void (cosmac_device::*ophandler)();
	414	virtual cosmac_device::ophandler get_ophandler(UINT8 opcode) = 0;
	415	};
376	416
	417
	418	// ======================> cdp1801_device
	419
	420	class cdp1801_device : public cosmac_device
	421	{
	422	public:
	423	// construction/destruction
	424	cdp1801_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	425
	426	protected:
	427	// device_disasm_interface overrides
	428	virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
	429
	430	virtual cosmac_device::ophandler get_ophandler(UINT8 opcode);
	431
377	432	static const ophandler s_opcodetable[256];
378	433	};
379	434
380	435
	436	// ======================> cdp1802_device
	437
	438	class cdp1802_device : public cosmac_device
	439	{
	440	public:
	441	// construction/destruction
	442	cdp1802_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	443
	444	protected:
	445	// device_disasm_interface overrides
	446	virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
	447
	448	virtual cosmac_device::ophandler get_ophandler(UINT8 opcode);
	449
	450	static const ophandler s_opcodetable[256];
	451	};
	452
	453
381	454	// device type definition
382		extern const device_type COSMAC;
	455	extern const device_type CDP1801;
	456	extern const device_type CDP1802;
383	457
384	458
385	459	#endif /* __COSMAC_H__ */

trunk/src/mess/mess.lst

r22763	r22764
148	148	astrocdw    // Bally Computer System (white case)
149	149
150	150	// RCA
	151	microkit
151	152	vip    // 1977 Cosmac VIP VP-711
152	153	vp111    // 1977 Cosmac VIP VP-111
153	154	studio2   // 1977 Studio II

trunk/src/mess/drivers/microkit.c

r0	r22764
	1	/*
	2
	3	RCA COSMAC Microkit
	4
	5	http://www.vintagecomputer.net/browse_thread.cfm?id=511
	6
	7	*/
	8
	9	#include "emu.h"
	10	#include "cpu/cosmac/cosmac.h"
	11
	12	class microkit_state : public driver_device
	13	{
	14	public:
	15	microkit_state(const machine_config &mconfig, device_type type, const char *tag)
	16	: driver_device(mconfig, type, tag)
	17	{ }
	18	};
	19
	20	static ADDRESS_MAP_START( microkit_mem, AS_PROGRAM, 8, microkit_state )
	21	AM_RANGE(0x0000, 0x01ff) AM_ROM AM_REGION("maincpu", 0)
	22	ADDRESS_MAP_END
	23
	24	static ADDRESS_MAP_START( microkit_io, AS_IO, 8, microkit_state )
	25	ADDRESS_MAP_END
	26
	27	static INPUT_PORTS_START( microkit )
	28	INPUT_PORTS_END
	29
	30	static COSMAC_INTERFACE( cosmac_intf )
	31	{
	32	DEVCB_LINE_VCC,
	33	DEVCB_NULL,
	34	DEVCB_NULL,
	35	DEVCB_NULL,
	36	DEVCB_NULL,
	37	DEVCB_NULL,
	38	DEVCB_NULL,
	39	DEVCB_NULL,
	40	DEVCB_NULL,
	41	NULL,
	42	DEVCB_NULL,
	43	DEVCB_NULL
	44	};
	45
	46	static MACHINE_CONFIG_START( microkit, microkit_state )
	47	// basic machine hardware
	48	MCFG_CPU_ADD("maincpu", CDP1801, 2000000)
	49	MCFG_CPU_PROGRAM_MAP(microkit_mem)
	50	MCFG_CPU_IO_MAP(microkit_io)
	51	MCFG_CPU_CONFIG(cosmac_intf)
	52	MACHINE_CONFIG_END
	53
	54	ROM_START( microkit )
	55	ROM_REGION( 0x200, "maincpu", ROMREGION_INVERT )
	56	ROM_LOAD( "3.2b", 0x000, 0x100, CRC(6799357e) SHA1(c46e3322b8b1b6534a7da04806be29fa265951b7) )
	57	ROM_LOAD( "4.2a", 0x100, 0x100, CRC(27267bad) SHA1(838df9be2dc175584a1a6ee1770039118e49482e) )
	58	ROM_END
	59
	60	COMP( 1975, microkit,    0,      0,      microkit,        microkit, driver_device, 0,      "RCA",  "COSMAC Microkit",  GAME_NOT_WORKING | GAME_NO_SOUND )

Property changes on: trunk/src/mess/drivers/microkit.c

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/mess/drivers/comx35.c

r22763	r22764
681	681
682	682	static MACHINE_CONFIG_START( pal, comx35_state )
683	683	// basic system hardware
684		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, CDP1869_CPU_CLK_PAL)
	684	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, CDP1869_CPU_CLK_PAL)
685	685	MCFG_CPU_PROGRAM_MAP(comx35_mem)
686	686	MCFG_CPU_IO_MAP(comx35_io)
687	687	MCFG_CPU_CONFIG(cosmac_intf)
r22763	r22764
712	712
713	713	static MACHINE_CONFIG_START( ntsc, comx35_state )
714	714	// basic system hardware
715		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, CDP1869_CPU_CLK_NTSC)
	715	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, CDP1869_CPU_CLK_NTSC)
716	716	MCFG_CPU_PROGRAM_MAP(comx35_mem)
717	717	MCFG_CPU_IO_MAP(comx35_io)
718	718	MCFG_CPU_CONFIG(cosmac_intf)

trunk/src/mess/drivers/pecom.c

r22763	r22764
177	177	static MACHINE_CONFIG_START( pecom64, pecom_state )
178	178
179	179	/* basic machine hardware */
180		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, CDP1869_DOT_CLK_PAL/3)
	180	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, CDP1869_DOT_CLK_PAL/3)
181	181	MCFG_CPU_PROGRAM_MAP(pecom64_mem)
182	182	MCFG_CPU_IO_MAP(pecom64_io)
183	183	MCFG_CPU_CONFIG(pecom64_cdp1802_config)

trunk/src/mess/drivers/elf.c

r22763	r22764
293	293
294	294	static MACHINE_CONFIG_START( elf2, elf2_state )
295	295	/* basic machine hardware */
296		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_3_579545MHz/2)
	296	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_3_579545MHz/2)
297	297	MCFG_CPU_PROGRAM_MAP(elf2_mem)
298	298	MCFG_CPU_IO_MAP(elf2_io)
299	299	MCFG_CPU_CONFIG(elf2_config)

trunk/src/mess/drivers/tim011.c

r22763	r22764
140	140	MCFG_CPU_IO_MAP(tim011_io)
141	141	MCFG_CPU_VBLANK_INT_DRIVER("screen", tim011_state, irq0_line_hold)
142	142
143		//  MCFG_CPU_ADD("keyboard",COSMAC, XTAL_1_75MHz) // CDP1802, uknown clock
	143	//  MCFG_CPU_ADD("keyboard",CDP1802, XTAL_1_75MHz) // CDP1802, uknown clock
144	144
145	145	// FDC9266 location U43 XTAL_8MHz
146	146	MCFG_UPD765A_ADD(FDC9266_TAG, true, true)

trunk/src/mess/drivers/tmc2000e.c

r22763	r22764
324	324
325	325	static MACHINE_CONFIG_START( tmc2000e, tmc2000e_state )
326	326	// basic system hardware
327		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_1_75MHz)
	327	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_1_75MHz)
328	328	MCFG_CPU_PROGRAM_MAP(tmc2000e_map)
329	329	MCFG_CPU_IO_MAP(tmc2000e_io_map)
330	330	MCFG_CPU_CONFIG(tmc2000e_config)

trunk/src/mess/drivers/eti660.c

r22763	r22764
251	251
252	252	static MACHINE_CONFIG_START( eti660, eti660_state )
253	253	/* basic machine hardware */
254		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_8_867238MHz/5)
	254	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_8_867238MHz/5)
255	255	MCFG_CPU_PROGRAM_MAP(eti660_map)
256	256	MCFG_CPU_IO_MAP(eti660_io_map)
257	257	MCFG_CPU_CONFIG(eti660_config)

trunk/src/mess/drivers/vip.c

r22763	r22764
764	764
765	765	static MACHINE_CONFIG_START( vip, vip_state )
766	766	// basic machine hardware
767		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_3_52128MHz/2)
	767	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_3_52128MHz/2)
768	768	MCFG_CPU_PROGRAM_MAP(vip_mem)
769	769	MCFG_CPU_IO_MAP(vip_io)
770	770	MCFG_CPU_CONFIG(cosmac_intf)

trunk/src/mess/drivers/studio2.c

r22763	r22764
539	539
540	540	static MACHINE_CONFIG_START( studio2, studio2_state )
541	541	/* basic machine hardware */
542		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, 1760000) /* the real clock is derived from an oscillator circuit */
	542	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, 1760000) /* the real clock is derived from an oscillator circuit */
543	543	MCFG_CPU_PROGRAM_MAP(studio2_map)
544	544	MCFG_CPU_IO_MAP(studio2_io_map)
545	545	MCFG_CPU_CONFIG(studio2_cosmac_intf)
r22763	r22764
558	558
559	559	static MACHINE_CONFIG_START( visicom, visicom_state )
560	560	/* basic machine hardware */
561		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_3_579545MHz/2)
	561	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_3_579545MHz/2)
562	562	MCFG_CPU_PROGRAM_MAP(visicom_map)
563	563	MCFG_CPU_IO_MAP(visicom_io_map)
564	564	MCFG_CPU_CONFIG(studio2_cosmac_intf)
r22763	r22764
577	577
578	578	static MACHINE_CONFIG_START( mpt02, mpt02_state )
579	579	/* basic machine hardware */
580		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, CDP1864_CLOCK)
	580	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, CDP1864_CLOCK)
581	581	MCFG_CPU_PROGRAM_MAP(mpt02_map)
582	582	MCFG_CPU_IO_MAP(mpt02_io_map)
583	583	MCFG_CPU_CONFIG(mpt02_cosmac_intf)

trunk/src/mess/drivers/tmc1800.c

r22763	r22764
783	783
784	784	static MACHINE_CONFIG_START( tmc1800, tmc1800_state )
785	785	// basic system hardware
786		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_1_75MHz)
	786	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_1_75MHz)
787	787	MCFG_CPU_PROGRAM_MAP(tmc1800_map)
788	788	MCFG_CPU_IO_MAP(tmc1800_io_map)
789	789	MCFG_CPU_CONFIG(tmc1800_config)
r22763	r22764
809	809
810	810	static MACHINE_CONFIG_START( osc1000b, osc1000b_state )
811	811	// basic system hardware
812		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_1_75MHz)
	812	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_1_75MHz)
813	813	MCFG_CPU_PROGRAM_MAP(osc1000b_map)
814	814	MCFG_CPU_IO_MAP(osc1000b_io_map)
815	815	MCFG_CPU_CONFIG(osc1000b_config)
r22763	r22764
835	835
836	836	static MACHINE_CONFIG_START( tmc2000, tmc2000_state )
837	837	// basic system hardware
838		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_1_75MHz)
	838	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_1_75MHz)
839	839	MCFG_CPU_PROGRAM_MAP(tmc2000_map)
840	840	MCFG_CPU_IO_MAP(tmc2000_io_map)
841	841	MCFG_CPU_CONFIG(tmc2000_config)
r22763	r22764
855	855
856	856	static MACHINE_CONFIG_START( nano, nano_state )
857	857	// basic system hardware
858		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_1_75MHz)
	858	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_1_75MHz)
859	859	MCFG_CPU_PROGRAM_MAP(nano_map)
860	860	MCFG_CPU_IO_MAP(nano_io_map)
861	861	MCFG_CPU_CONFIG(nano_config)

trunk/src/mess/drivers/cosmicos.c

r22763	r22764
562	562
563	563	static MACHINE_CONFIG_START( cosmicos, cosmicos_state )
564	564	/* basic machine hardware */
565		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, XTAL_1_75MHz)
	565	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, XTAL_1_75MHz)
566	566	MCFG_CPU_PROGRAM_MAP(cosmicos_mem)
567	567	MCFG_CPU_IO_MAP(cosmicos_io)
568	568	MCFG_CPU_CONFIG(cosmicos_config)

trunk/src/mess/drivers/tmc600.c

r22763	r22764
290	290
291	291	static MACHINE_CONFIG_START( tmc600, tmc600_state )
292	292	// basic system hardware
293		MCFG_CPU_ADD(CDP1802_TAG, COSMAC, 3579545)  // ???
	293	MCFG_CPU_ADD(CDP1802_TAG, CDP1802, 3579545)  // ???
294	294	MCFG_CPU_PROGRAM_MAP(tmc600_map)
295	295	MCFG_CPU_IO_MAP(tmc600_io_map)
296	296	MCFG_CPU_CONFIG(cosmac_intf)

trunk/src/mess/mess.mak

r22763	r22764
1616	1616	$(MESS_DRIVERS)/mikrosha.o  \
1617	1617
1618	1618	$(MESSOBJ)/rca.a:               \
	1619	$(MESS_DRIVERS)/microkit.o  \
1619	1620	$(MESS_DRIVERS)/studio2.o   \
1620	1621	$(MESS_DRIVERS)/vip.o       \
1621	1622	$(MESS_MACHINE)/vip_byteio.o\

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