Previous

199869 Revisions

Next

r22744 Friday 10th May, 2013 at 15:23:51 UTC by Fabio Priuli
(MESS) gameboy/gbcolor: simplified video code by reducing the number of memory pointers used, and added support for save state registration. [Fabio Priuli] I haven't added the support_save flag yet because I'd like to receive some feedback from users (I have only tested 2 dozen of games, without issues, but there are thousands...)

[src/mess/drivers]	gb.c
[src/mess/includes]	gb.h
[src/mess/machine]	gb.c
[src/mess/video]	gb.c

trunk/src/mess/drivers/gb.c

r22743	r22744
736	736	MCFG_LR35902_HALT_BUG
737	737	MCFG_LR35902_RESET_VALUES(mgb_cpu_regs)
738	738
	739	MCFG_MACHINE_START_OVERRIDE(gb_state, gbpocket)
739	740	MCFG_MACHINE_RESET_OVERRIDE(gb_state, gbpocket)
740	741	MCFG_PALETTE_INIT_OVERRIDE(gb_state,gbp)
741	742	MACHINE_CONFIG_END

trunk/src/mess/machine/gb.c

r22743	r22744
87	87	#include "audio/gb.h"
88	88	#include "includes/gb.h"
89	89
90		/* Memory bank controller types */
91		enum {
92		MBC_NONE=0,     /*  32KB ROM - No memory bank controller         */
93		MBC_MBC1,       /*  ~2MB ROM,   8KB RAM -or- 512KB ROM, 32KB RAM */
94		MBC_MBC2,       /* 256KB ROM,  32KB RAM                          */
95		MBC_MMM01,      /*    ?? ROM,    ?? RAM                          */
96		MBC_MBC3,       /*   2MB ROM,  32KB RAM, RTC                     */
97		MBC_MBC4,       /*    ?? ROM,    ?? RAM                          */
98		MBC_MBC5,       /*   8MB ROM, 128KB RAM (32KB w/ Rumble)         */
99		MBC_TAMA5,      /*    ?? ROM     ?? RAM - What is this?          */
100		MBC_HUC1,       /*    ?? ROM,    ?? RAM - Hudson Soft Controller */
101		MBC_HUC3,       /*    ?? ROM,    ?? RAM - Hudson Soft Controller */
102		MBC_MBC6,       /*    ?? ROM,  32KB SRAM                         */
103		MBC_MBC7,       /*    ?? ROM,    ?? RAM                          */
104		MBC_WISDOM,     /*    ?? ROM,    ?? RAM - Wisdom tree controller */
105		MBC_MBC1_KOR,   /*   1MB ROM,    ?? RAM - Korean MBC1 variant    */
106		MBC_YONGYONG,   /*    ?? ROM,    ?? RAM - Appears in Sonic 3D Blast 5 pirate */
107		MBC_LASAMA,     /*    ?? ROM,    ?? RAM - Appears in La Sa Ma */
108		MBC_ATVRACIN,
109		MBC_MEGADUCK,   /* MEGADUCK style banking                        */
110		MBC_UNKNOWN,    /* Unknown mapper                                */
111		};
112	90
113	91	/* RAM layout defines */
114	92	#define CGB_START_VRAM_BANKS    0x0000
r22743	r22744
134	112	/* #define V_BANK*/         /* Display bank switching debug information */
135	113	#endif
136	114
	115	//-------------------------
	116	// handle save state
	117	//-------------------------
	118
	119	void gb_state::save_gb_base()
	120	{
	121	save_item(NAME(m_gb_io));
	122	save_item(NAME(m_divcount));
	123	save_item(NAME(m_shift));
	124	save_item(NAME(m_shift_cycles));
	125	save_item(NAME(m_triggering_irq));
	126	save_item(NAME(m_reloading));
	127	save_item(NAME(m_sio_count));
	128	save_item(NAME(m_bios_disable));
	129	}
	130
	131	void gb_state::save_gbc_only()
	132	{
	133	save_item(NAME(m_gbc_rambank));
	134	}
	135
	136	void gb_state::save_sgb_only()
	137	{
	138	save_item(NAME(m_sgb_pal_data));
	139	save_item(NAME(m_sgb_pal));
	140	save_item(NAME(m_sgb_tile_map));
	141	save_item(NAME(m_sgb_window_mask));
	142	save_item(NAME(m_sgb_pal_data));
	143	save_item(NAME(m_sgb_atf_data));
	144	save_item(NAME(m_sgb_packets));
	145	save_item(NAME(m_sgb_bitcount));
	146	save_item(NAME(m_sgb_bytecount));
	147	save_item(NAME(m_sgb_start));
	148	save_item(NAME(m_sgb_rest));
	149	save_item(NAME(m_sgb_controller_no));
	150	save_item(NAME(m_sgb_controller_mode));
	151	save_item(NAME(m_sgb_data));
	152	save_item(NAME(m_sgb_atf));
	153
	154	save_pointer(NAME(m_sgb_tile_data), 0x2000);
	155	for (int i = 0; i < 20; i++)
	156	save_item(NAME(m_sgb_pal_map[i]));
	157	}
	158
	159
137	160	void gb_state::gb_init_regs()
138	161	{
139	162	/* Initialize the registers */
r22743	r22744
163	186	m_gb_serial_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gb_serial_timer_proc),this));
164	187	m_gb_serial_timer->enable( 0 );
165	188
166		MACHINE_START_CALL_MEMBER( gb_video );
	189	save_gb_base();
	190	gb_video_start(GB_VIDEO_DMG);
167	191	}
168	192
169		MACHINE_START_MEMBER(gb_state,gbc)
	193	MACHINE_START_MEMBER(gb_state,gbpocket)
170	194	{
171	195	/* Allocate the serial timer, and disable it */
172	196	m_gb_serial_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gb_serial_timer_proc),this));
173	197	m_gb_serial_timer->enable( 0 );
174
175		MACHINE_START_CALL_MEMBER( gbc_video );
	198
	199	save_gb_base();
	200	gb_video_start(GB_VIDEO_MGB);
176	201	}
177	202
178		MACHINE_RESET_MEMBER(gb_state,gb)
	203	MACHINE_START_MEMBER(gb_state,gbc)
179	204	{
180		gb_init();
	205	/* Allocate the serial timer, and disable it */
	206	m_gb_serial_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gb_serial_timer_proc),this));
	207	m_gb_serial_timer->enable( 0 );
181	208
182		gb_video_reset(GB_VIDEO_DMG);
	209	for (int i = 0; i < 8; i++)
	210	m_gbc_rammap[i] = m_ram->pointer() + CGB_START_RAM_BANKS + i * 0x1000;
183	211
184		/* Enable BIOS rom */
185		m_bios_disable = FALSE;
186
187		m_divcount = 0x0004;
	212	save_gb_base();
	213	save_gbc_only();
	214	gb_video_start(GB_VIDEO_CGB);
188	215	}
189	216
190	217
191	218	MACHINE_START_MEMBER(gb_state,sgb)
192	219	{
193	220	m_sgb_packets = -1;
194		m_sgb_tile_data = auto_alloc_array_clear(machine(), UINT8, 0x2000 );
	221	m_sgb_tile_data = auto_alloc_array_clear(machine(), UINT8, 0x2000);
195	222
196	223	/* Allocate the serial timer, and disable it */
197	224	m_gb_serial_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gb_serial_timer_proc),this));
198	225	m_gb_serial_timer->enable( 0 );
199	226
200		MACHINE_START_CALL_MEMBER( gb_video );
	227	save_gb_base();
	228	save_sgb_only();
	229	gb_video_start(GB_VIDEO_SGB);
201	230	}
202	231
203		MACHINE_RESET_MEMBER(gb_state,sgb)
	232	MACHINE_RESET_MEMBER(gb_state,gb)
204	233	{
205	234	gb_init();
206
207		gb_video_reset(GB_VIDEO_SGB);
208
209		gb_init_regs();
210
211
	235
	236	gb_video_reset(GB_VIDEO_DMG);
	237
212	238	/* Enable BIOS rom */
213		m_bios_disable = FALSE;
214
215		memset(m_sgb_tile_data, 0, 0x2000);
216
217		m_sgb_window_mask = 0;
218		memset(m_sgb_pal_map, 0, sizeof(m_sgb_pal_map));
219		memset(m_sgb_atf_data, 0, sizeof(m_sgb_atf_data));
220
	239	m_bios_disable = 0;
	240
221	241	m_divcount = 0x0004;
222	242	}
223	243
r22743	r22744
229	249
230	250	gb_init_regs();
231	251
232		m_bios_disable = TRUE;
	252	m_bios_disable = 0;
233	253
234	254	/* Initialize the Sound registers */
235	255	gb_sound_w(m_custom, generic_space(), 0x16,0x80);
r22743	r22744
241	261
242	262	MACHINE_RESET_MEMBER(gb_state,gbc)
243	263	{
244		int ii;
245
246	264	gb_init();
247	265
248	266	gb_video_reset( GB_VIDEO_CGB );
r22743	r22744
250	268	gb_init_regs();
251	269
252	270	/* Enable BIOS rom */
253		m_bios_disable = FALSE;
	271	m_bios_disable = 0;
254	272
255		/* Allocate memory for internal ram */
256		for (ii = 0; ii < 8; ii++)
257		{
258		m_GBC_RAMMap[ii] = m_ram->pointer() + CGB_START_RAM_BANKS + ii * 0x1000;
259		memset(m_GBC_RAMMap[ii], 0, 0x1000);
260		}
	273	for (int i = 0; i < 8; i++)
	274	memset(m_gbc_rammap[i], 0, 0x1000);
261	275	}
262	276
	277	MACHINE_RESET_MEMBER(gb_state,sgb)
	278	{
	279	gb_init();
	280
	281	gb_video_reset(GB_VIDEO_SGB);
	282
	283	gb_init_regs();
	284
	285
	286	/* Enable BIOS rom */
	287	m_bios_disable = 0;
	288
	289	memset(m_sgb_tile_data, 0, 0x2000);
	290
	291	m_sgb_window_mask = 0;
	292	memset(m_sgb_pal_map, 0, sizeof(m_sgb_pal_map));
	293	memset(m_sgb_atf_data, 0, sizeof(m_sgb_atf_data));
	294
	295	m_divcount = 0x0004;
	296	}
	297
	298
263	299	WRITE8_MEMBER(gb_state::gb_io_w)
264	300	{
265	301	static const UINT8 timer_shifts[4] = {10, 4, 6, 8};
r22743	r22744
281	317	case 0x00:
282	318	case 0x01:
283	319	case 0x80:              /* enabled & external clock */
284		m_SIOCount = 0;
	320	m_sio_count = 0;
285	321	break;
286	322	case 0x81:              /* enabled & internal clock */
287	323	SIODATA = 0xFF;
288		m_SIOCount = 8;
	324	m_sio_count = 8;
289	325	m_gb_serial_timer->adjust(m_maincpu->cycles_to_attotime(512), 0, m_maincpu->cycles_to_attotime(512));
290	326	m_gb_serial_timer->enable( 1 );
291	327	break;
r22743	r22744
339	375	if (offset == 0x10)
340	376	{
341	377	/* disable BIOS ROM */
342		m_bios_disable = TRUE;
	378	m_bios_disable = 1;
343	379	//printf("here again?\n");
344	380	}
345	381	else
r22743	r22744
731	767
732	768	for( I = 0; I < 2048; I++ )
733	769	{
734		col = ( m_lcd.gb_vram_ptr[ 0x0800 + (I*2) + 1 ] << 8 ) | m_lcd.gb_vram_ptr[ 0x0800 + (I*2) ];
	770	col = (m_lcd.gb_vram[0x0800 + (I*2) + 1] << 8) | m_lcd.gb_vram[0x0800 + (I*2)];
735	771	m_sgb_pal_data[I] = col;
736	772	}
737	773	}
r22743	r22744
761	797	/* Not Implemented */
762	798	break;
763	799	case 0x13:  /* CHR_TRN */
764		if( sgb_data[1] & 0x1 )
765		memcpy( m_sgb_tile_data + 4096, m_lcd.gb_vram_ptr + 0x0800, 4096 );
	800	if (sgb_data[1] & 0x1)
	801	memcpy(m_sgb_tile_data + 4096, m_lcd.gb_vram + 0x0800, 4096);
766	802	else
767		memcpy( m_sgb_tile_data, m_lcd.gb_vram_ptr + 0x0800, 4096 );
	803	memcpy(m_sgb_tile_data, m_lcd.gb_vram + 0x0800, 4096);
768	804	break;
769	805	case 0x14:  /* PCT_TRN */
770	806	{
r22743	r22744
772	808	UINT16 col;
773	809	if (m_cartslot && m_cartslot->get_sgb_hack())
774	810	{
775		memcpy( m_sgb_tile_map, m_lcd.gb_vram_ptr + 0x1000, 2048 );
	811	memcpy(m_sgb_tile_map, m_lcd.gb_vram + 0x1000, 2048);
776	812	for( I = 0; I < 64; I++ )
777	813	{
778		col = ( m_lcd.gb_vram_ptr[ 0x0800 + (I*2) + 1 ] << 8 ) | m_lcd.gb_vram_ptr[ 0x0800 + (I*2) ];
	814	col = (m_lcd.gb_vram[0x0800 + (I*2) + 1 ] << 8) | m_lcd.gb_vram[0x0800 + (I*2)];
779	815	m_sgb_pal[SGB_BORDER_PAL_OFFSET + I] = col;
780	816	}
781	817	}
782	818	else /* Do things normally */
783	819	{
784		memcpy( m_sgb_tile_map, m_lcd.gb_vram_ptr + 0x0800, 2048 );
	820	memcpy(m_sgb_tile_map, m_lcd.gb_vram + 0x0800, 2048);
785	821	for( I = 0; I < 64; I++ )
786	822	{
787		col = ( m_lcd.gb_vram_ptr[ 0x1000 + (I*2) + 1 ] << 8 ) | m_lcd.gb_vram_ptr[ 0x1000 + (I*2) ];
	823	col = (m_lcd.gb_vram[0x1000 + (I*2) + 1] << 8) | m_lcd.gb_vram[0x1000 + (I*2)];
788	824	m_sgb_pal[SGB_BORDER_PAL_OFFSET + I] = col;
789	825	}
790	826	}
791	827	}
792	828	break;
793	829	case 0x15:  /* ATTR_TRN */
794		memcpy( m_sgb_atf_data, m_lcd.gb_vram_ptr + 0x0800, 4050 );
	830	memcpy( m_sgb_atf_data, m_lcd.gb_vram + 0x0800, 4050 );
795	831	break;
796	832	case 0x16:  /* ATTR_SET */
797	833	{
r22743	r22744
923	959	/* Shift in a received bit */
924	960	SIODATA = (SIODATA << 1) | 0x01;
925	961	/* Decrement number of handled bits */
926		m_SIOCount--;
	962	m_sio_count--;
927	963	/* If all bits done, stop timer and trigger interrupt */
928		if ( ! m_SIOCount )
	964	if ( ! m_sio_count )
929	965	{
930	966	SIOCONT &= 0x7F;
931	967	m_gb_serial_timer->enable( 0 );
r22743	r22744
994	1030	m_maincpu->set_speed(data);
995	1031	return;
996	1032	case 0x10:  /* BFF - Bios disable */
997		m_bios_disable = TRUE;
	1033	m_bios_disable = 1;
998	1034	return;
999	1035	case 0x16:  /* RP - Infrared port */
1000	1036	break;
1001	1037	case 0x30:  /* SVBK - RAM bank select */
1002		m_GBC_RAMBank = data & 0x7;
1003		if (!m_GBC_RAMBank)
1004		m_GBC_RAMBank = 1;
1005		m_rambank->set_base(m_GBC_RAMMap[m_GBC_RAMBank]);
	1038	m_gbc_rambank = data & 0x7;
	1039	if (!m_gbc_rambank)
	1040	m_gbc_rambank = 1;
	1041	m_rambank->set_base(m_gbc_rammap[m_gbc_rambank]);
1006	1042	break;
1007	1043	default:
1008	1044	break;
r22743	r22744
1019	1055	case 0x16:  /* RP - Infrared port */
1020	1056	break;
1021	1057	case 0x30:  /* SVBK - RAM bank select */
1022		return m_GBC_RAMBank;
	1058	return m_gbc_rambank;
1023	1059	default:
1024	1060	break;
1025	1061	}
r22743	r22744
1037	1073	/* Allocate the serial timer, and disable it */
1038	1074	m_gb_serial_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gb_serial_timer_proc),this));
1039	1075	m_gb_serial_timer->enable( 0 );
1040
1041		MACHINE_START_CALL_MEMBER( gb_video );
	1076
	1077	save_gb_base();
	1078	gb_video_start(GB_VIDEO_DMG);
1042	1079	}
1043	1080
1044	1081	MACHINE_RESET_MEMBER(megaduck_state,megaduck)
r22743	r22744
1046	1083	/* We may have to add some more stuff here, if not then it can be merged back into gb */
1047	1084	gb_init();
1048	1085
1049		m_bios_disable = TRUE;
	1086	m_bios_disable = 1;
1050	1087
1051	1088	gb_video_reset( GB_VIDEO_DMG );
1052	1089	}

trunk/src/mess/video/gb.c

r22743	r22744
154	154	void gb_state::gb_select_sprites()
155	155	{
156	156	int i, /*yindex,*/ line, height;
157		UINT8   *oam = m_lcd.gb_oam->base() + 39 * 4;
	157	UINT8   *oam = m_lcd.gb_oam + 39 * 4;
158	158
159	159	m_lcd.sprCount = 0;
160	160
r22743	r22744
211	211	yindex = m_lcd.current_line;
212	212	line = m_lcd.current_line + 16;
213	213
214		oam = m_lcd.gb_oam->base() + 39 * 4;
215		vram = m_lcd.gb_vram->base();
	214	oam = m_lcd.gb_oam + 39 * 4;
	215	vram = m_lcd.gb_vram;
216	216	for (i = 39; i >= 0; i--)
217	217	{
218	218	/* if sprite is on current line && x-coordinate && x-coordinate is < 168 */
r22743	r22744
304	304	if ( m_lcd.layer[0].enabled )
305	305	{
306	306	m_lcd.layer[0].bgline = ( SCROLLY + m_lcd.current_line ) & 0xFF;
307		m_lcd.layer[0].bg_map = m_lcd.gb_bgdtab;
308		m_lcd.layer[0].bg_tiles = m_lcd.gb_chrgen;
	307	m_lcd.layer[0].bg_map = m_lcd.gb_vram + m_lcd.gb_bgdtab_offs;
	308	m_lcd.layer[0].bg_tiles = m_lcd.gb_vram + m_lcd.gb_chrgen_offs;
309	309	m_lcd.layer[0].xindex = SCROLLX >> 3;
310	310	m_lcd.layer[0].xshift = SCROLLX & 7;
311	311	m_lcd.layer[0].xstart = 0;
r22743	r22744
321	321	xpos = 0;
322	322
323	323	m_lcd.layer[1].bgline = m_lcd.window_lines_drawn;
324		m_lcd.layer[1].bg_map = m_lcd.gb_wndtab;
325		m_lcd.layer[1].bg_tiles = m_lcd.gb_chrgen;
	324	m_lcd.layer[1].bg_map = m_lcd.gb_vram + m_lcd.gb_wndtab_offs;
	325	m_lcd.layer[1].bg_tiles = m_lcd.gb_vram + m_lcd.gb_chrgen_offs;
326	326	m_lcd.layer[1].xindex = 0;
327	327	m_lcd.layer[1].xshift = 0;
328	328	m_lcd.layer[1].xstart = xpos;
r22743	r22744
448	448	yindex = m_lcd.current_line + SGB_YOFFSET;
449	449	line = m_lcd.current_line + 16;
450	450
451		oam = m_lcd.gb_oam->base() + 39 * 4;
452		vram = m_lcd.gb_vram->base();
	451	oam = m_lcd.gb_oam + 39 * 4;
	452	vram = m_lcd.gb_vram;
453	453	for (i = 39; i >= 0; i--)
454	454	{
455	455	/* if sprite is on current line && x-coordinate && x-coordinate is < 168 */
r22743	r22744
617	617	if ( m_lcd.layer[0].enabled )
618	618	{
619	619	m_lcd.layer[0].bgline = ( SCROLLY + m_lcd.current_line ) & 0xFF;
620		m_lcd.layer[0].bg_map = m_lcd.gb_bgdtab;
621		m_lcd.layer[0].bg_tiles = m_lcd.gb_chrgen;
	620	m_lcd.layer[0].bg_map = m_lcd.gb_vram + m_lcd.gb_bgdtab_offs;
	621	m_lcd.layer[0].bg_tiles = m_lcd.gb_vram + m_lcd.gb_chrgen_offs;
622	622	m_lcd.layer[0].xindex = SCROLLX >> 3;
623	623	m_lcd.layer[0].xshift = SCROLLX & 7;
624	624	m_lcd.layer[0].xstart = 0;
r22743	r22744
635	635	xpos = 0;
636	636
637	637	m_lcd.layer[1].bgline = m_lcd.window_lines_drawn;
638		m_lcd.layer[1].bg_map = m_lcd.gb_wndtab;
639		m_lcd.layer[1].bg_tiles = m_lcd.gb_chrgen;
	638	m_lcd.layer[1].bg_map = m_lcd.gb_vram + m_lcd.gb_wndtab_offs;
	639	m_lcd.layer[1].bg_tiles = m_lcd.gb_vram + m_lcd.gb_chrgen_offs;
640	640	m_lcd.layer[1].xindex = 0;
641	641	m_lcd.layer[1].xshift = 0;
642	642	m_lcd.layer[1].xstart = xpos;
r22743	r22744
791	791	yindex = m_lcd.current_line;
792	792	line = m_lcd.current_line + 16;
793	793
794		oam = m_lcd.gb_oam->base() + 39 * 4;
	794	oam = m_lcd.gb_oam + 39 * 4;
795	795	for (i = 39; i >= 0; i--)
796	796	{
797	797	/* if sprite is on current line && x-coordinate && x-coordinate is < 168 */
r22743	r22744
809	809	xindex = oam[1] - 8;
810	810	if (oam[3] & 0x40)         /* flip y ? */
811	811	{
812		data = *((UINT16 *) &m_lcd.gb_vram->base()[ ((oam[3] & 0x8)<<10) + (oam[2] & tilemask) * 16 + (height - 1 - line + oam[0]) * 2]);
	812	data = *((UINT16 *) &m_lcd.gb_vram[((oam[3] & 0x8)<<10) + (oam[2] & tilemask) * 16 + (height - 1 - line + oam[0]) * 2]);
813	813	}
814	814	else
815	815	{
816		data = *((UINT16 *) &m_lcd.gb_vram->base()[ ((oam[3] & 0x8)<<10) + (oam[2] & tilemask) * 16 + (line - oam[0]) * 2]);
	816	data = *((UINT16 *) &m_lcd.gb_vram[((oam[3] & 0x8)<<10) + (oam[2] & tilemask) * 16 + (line - oam[0]) * 2]);
817	817	}
818	818	#ifndef LSB_FIRST
819	819	data = (data << 8) | (data >> 8);
r22743	r22744
908	908	if ( m_lcd.layer[0].enabled )
909	909	{
910	910	m_lcd.layer[0].bgline = ( SCROLLY + m_lcd.current_line ) & 0xFF;
911		m_lcd.layer[0].bg_map = m_lcd.gb_bgdtab;
912		m_lcd.layer[0].gbc_map = m_lcd.gbc_bgdtab;
	911	m_lcd.layer[0].bg_map = m_lcd.gb_vram + m_lcd.gb_bgdtab_offs;
	912	m_lcd.layer[0].gbc_map = m_lcd.gb_vram + m_lcd.gbc_bgdtab_offs;
913	913	m_lcd.layer[0].xindex = SCROLLX >> 3;
914	914	m_lcd.layer[0].xshift = SCROLLX & 7;
915	915	m_lcd.layer[0].xstart = 0;
r22743	r22744
926	926	xpos = 0;
927	927
928	928	m_lcd.layer[1].bgline = m_lcd.window_lines_drawn;
929		m_lcd.layer[1].bg_map = m_lcd.gb_wndtab;
930		m_lcd.layer[1].gbc_map = m_lcd.gbc_wndtab;
	929	m_lcd.layer[1].bg_map = m_lcd.gb_vram + m_lcd.gb_wndtab_offs;
	930	m_lcd.layer[1].gbc_map = m_lcd.gb_vram + m_lcd.gbc_wndtab_offs;
931	931	m_lcd.layer[1].xindex = 0;
932	932	m_lcd.layer[1].xshift = 0;
933	933	m_lcd.layer[1].xstart = xpos;
r22743	r22744
959	959	}
960	960	map = m_lcd.layer[l].bg_map + ( ( m_lcd.layer[l].bgline << 2 ) & 0x3E0 );
961	961	gbcmap = m_lcd.layer[l].gbc_map + ( ( m_lcd.layer[l].bgline << 2 ) & 0x3E0 );
962		tiles = ( gbcmap[ m_lcd.layer[l].xindex ] & 0x08 ) ? m_lcd.gbc_chrgen : m_lcd.gb_chrgen;
	962	tiles = (gbcmap[m_lcd.layer[l].xindex] & 0x08) ? (m_lcd.gb_vram + m_lcd.gbc_chrgen_offs) : (m_lcd.gb_vram + m_lcd.gb_chrgen_offs);
963	963
964	964	/* Check for vertical flip */
965	965	if ( gbcmap[ m_lcd.layer[l].xindex ] & 0x40 )
r22743	r22744
1024	1024
1025	1025	m_lcd.layer[l].xindex = ( m_lcd.layer[l].xindex + 1 ) & 31;
1026	1026	m_lcd.layer[l].xshift = 0;
1027		tiles = ( gbcmap[ m_lcd.layer[l].xindex ] & 0x08 ) ? m_lcd.gbc_chrgen : m_lcd.gb_chrgen;
	1027	tiles = (gbcmap[m_lcd.layer[l].xindex] & 0x08) ? (m_lcd.gb_vram + m_lcd.gbc_chrgen_offs) : (m_lcd.gb_vram + m_lcd.gb_chrgen_offs);
1028	1028
1029	1029	/* Check for vertical flip */
1030	1030	if ( gbcmap[ m_lcd.layer[l].xindex ] & 0x40 )
r22743	r22744
1183	1183	m_maincpu->set_input_line(VBL_INT, ASSERT_LINE );
1184	1184	}
1185	1185
1186		MACHINE_START_MEMBER(gb_state,gb_video)
	1186	void gb_state::gb_videoptr_restore()
1187	1187	{
1188		m_lcd.lcd_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gb_lcd_timer_proc),this));
1189		machine().primary_screen->register_screen_bitmap(m_bitmap);
	1188	m_lcd.layer[0].bg_map = m_lcd.gb_vram + m_lcd.gb_bgdtab_offs;
	1189	m_lcd.layer[0].bg_tiles = m_lcd.gb_vram + m_lcd.gb_chrgen_offs;
	1190	m_lcd.layer[1].bg_map = m_lcd.gb_vram + m_lcd.gb_wndtab_offs;
	1191	m_lcd.layer[1].bg_tiles = m_lcd.gb_vram + m_lcd.gb_chrgen_offs;
1190	1192	}
1191	1193
1192		MACHINE_START_MEMBER(gb_state,gbc_video)
	1194	void gb_state::gbc_videoptr_restore()
1193	1195	{
1194		m_lcd.lcd_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gbc_lcd_timer_proc),this));
	1196	m_lcd.layer[0].bg_map = m_lcd.gb_vram + m_lcd.gb_bgdtab_offs;
	1197	m_lcd.layer[0].gbc_map = m_lcd.gb_vram + m_lcd.gbc_bgdtab_offs;
	1198	m_lcd.layer[1].bg_map = m_lcd.gb_vram + m_lcd.gb_wndtab_offs;
	1199	m_lcd.layer[1].gbc_map = m_lcd.gb_vram + m_lcd.gbc_wndtab_offs;
	1200	}
	1201
	1202	void gb_state::save_gb_video()
	1203	{
	1204	save_item(NAME(m_lcd.window_lines_drawn));
	1205	save_item(NAME(m_lcd.gb_vid_regs));
	1206	save_item(NAME(m_lcd.bg_zbuf));
	1207
	1208	save_item(NAME(m_lcd.cgb_bpal));
	1209	save_item(NAME(m_lcd.cgb_spal));
	1210
	1211	save_item(NAME(m_lcd.gb_bpal));
	1212	save_item(NAME(m_lcd.gb_spal0));
	1213	save_item(NAME(m_lcd.gb_spal1));
	1214
	1215	save_item(NAME(m_lcd.current_line));
	1216	save_item(NAME(m_lcd.cmp_line));
	1217	save_item(NAME(m_lcd.sprCount));
	1218	save_item(NAME(m_lcd.sprite));
	1219	save_item(NAME(m_lcd.previous_line));
	1220	save_item(NAME(m_lcd.start_x));
	1221	save_item(NAME(m_lcd.end_x));
	1222	save_item(NAME(m_lcd.mode));
	1223	save_item(NAME(m_lcd.state));
	1224	save_item(NAME(m_lcd.lcd_irq_line));
	1225	save_item(NAME(m_lcd.triggering_line_irq));
	1226	save_item(NAME(m_lcd.line_irq));
	1227	save_item(NAME(m_lcd.triggering_mode_irq));
	1228	save_item(NAME(m_lcd.mode_irq));
	1229	save_item(NAME(m_lcd.delayed_line_irq));
	1230	save_item(NAME(m_lcd.sprite_cycles));
	1231	save_item(NAME(m_lcd.scrollx_adjust));
	1232	save_item(NAME(m_lcd.oam_locked));
	1233	save_item(NAME(m_lcd.vram_locked));
	1234	save_item(NAME(m_lcd.pal_locked));
	1235	save_item(NAME(m_lcd.hdma_enabled));
	1236	save_item(NAME(m_lcd.hdma_possible));
	1237	save_item(NAME(m_lcd.gbc_mode));
	1238	save_item(NAME(m_lcd.gb_tile_no_mod));
	1239	save_item(NAME(m_lcd.gb_vram_bank));
	1240
	1241	save_item(NAME(m_lcd.gb_chrgen_offs));
	1242	save_item(NAME(m_lcd.gb_bgdtab_offs));
	1243	save_item(NAME(m_lcd.gb_wndtab_offs));
	1244	save_item(NAME(m_lcd.gbc_chrgen_offs));
	1245	save_item(NAME(m_lcd.gbc_bgdtab_offs));
	1246	save_item(NAME(m_lcd.gbc_wndtab_offs));
	1247
	1248	save_item(NAME(m_lcd.layer[0].enabled));
	1249	save_item(NAME(m_lcd.layer[0].xindex));
	1250	save_item(NAME(m_lcd.layer[0].xshift));
	1251	save_item(NAME(m_lcd.layer[0].xstart));
	1252	save_item(NAME(m_lcd.layer[0].xend));
	1253	save_item(NAME(m_lcd.layer[0].bgline));
	1254	save_item(NAME(m_lcd.layer[1].enabled));
	1255	save_item(NAME(m_lcd.layer[1].xindex));
	1256	save_item(NAME(m_lcd.layer[1].xshift));
	1257	save_item(NAME(m_lcd.layer[1].xstart));
	1258	save_item(NAME(m_lcd.layer[1].xend));
	1259	save_item(NAME(m_lcd.layer[1].bgline));
	1260	}
	1261
	1262	void gb_state::gb_video_start( int mode )
	1263	{
	1264	int vram_size = (mode == GB_VIDEO_CGB) ? 0x4000 : 0x2000;
	1265
1195	1266	machine().primary_screen->register_screen_bitmap(m_bitmap);
	1267	m_lcd.gb_vram = auto_alloc_array_clear(machine(), UINT8, vram_size);
	1268	m_lcd.gb_oam = auto_alloc_array_clear(machine(), UINT8, 0x100);
	1269
	1270	save_pointer(NAME(m_lcd.gb_vram), vram_size);
	1271	save_pointer(NAME(m_lcd.gb_oam), 0x100);
	1272	save_gb_video();
	1273
	1274	if (mode == GB_VIDEO_CGB)
	1275	{
	1276	m_lcd.lcd_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gbc_lcd_timer_proc),this));
	1277	machine().save().register_postload(save_prepost_delegate(FUNC(gb_state::gbc_videoptr_restore), this));
	1278	}
	1279	else
	1280	{
	1281	m_lcd.lcd_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gb_state::gb_lcd_timer_proc),this));
	1282	machine().save().register_postload(save_prepost_delegate(FUNC(gb_state::gb_videoptr_restore), this));
	1283	}
	1284
	1285	switch (mode)
	1286	{
	1287	case GB_VIDEO_DMG:
	1288	memcpy(m_lcd.gb_oam, dmg_oam_fingerprint, 0x100);
	1289	break;
	1290	case GB_VIDEO_MGB:
	1291	/* Initialize part of VRAM. This code must be deleted when we have added the bios dump */
	1292	for (int i = 1; i < 0x0d; i++)
	1293	{
	1294	m_lcd.gb_vram[0x1903 + i] = i;
	1295	m_lcd.gb_vram[0x1923 + i] = i + 0x0C;
	1296	}
	1297	m_lcd.gb_vram[0x1910] = 0x19;
	1298	memcpy(m_lcd.gb_oam, mgb_oam_fingerprint, 0x100);
	1299	break;
	1300	case GB_VIDEO_SGB:
	1301	break;
	1302	case GB_VIDEO_CGB:
	1303	memcpy(m_lcd.gb_oam, cgb_oam_fingerprint, 0x100);
	1304	break;
	1305	}
1196	1306	}
1197	1307
	1308
1198	1309	UINT32 gb_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
1199	1310	{
1200	1311	copybitmap(bitmap, m_bitmap, 0, 0, 0, 0, cliprect);
r22743	r22744
1203	1314
1204	1315	void gb_state::gb_video_reset( int mode )
1205	1316	{
1206		int i;
1207		int vram_size = 0x2000;
1208	1317	address_space &space = m_maincpu->space(AS_PROGRAM);
1209		emu_timer *old_timer = m_lcd.lcd_timer;
1210	1318
1211		memset( &m_lcd, 0, sizeof(m_lcd) );
1212		m_lcd.lcd_timer = old_timer;
	1319	m_lcd.window_lines_drawn = 0;
	1320
	1321	m_lcd.current_line = 0;
	1322	m_lcd.cmp_line = 0;
	1323	m_lcd.sprCount = 0;
	1324	m_lcd.previous_line = 0;
	1325	m_lcd.start_x = 0;
	1326	m_lcd.end_x = 0;
	1327	m_lcd.mode = 0;
	1328	m_lcd.state = 0;
	1329	m_lcd.lcd_irq_line = 0;
	1330	m_lcd.triggering_line_irq = 0;
	1331	m_lcd.line_irq = 0;
	1332	m_lcd.triggering_mode_irq = 0;
	1333	m_lcd.mode_irq = 0;
	1334	m_lcd.delayed_line_irq = 0;
	1335	m_lcd.sprite_cycles = 0;
	1336	m_lcd.scrollx_adjust = 0;
	1337	m_lcd.oam_locked = 0;
	1338	m_lcd.vram_locked = 0;
	1339	m_lcd.pal_locked = 0;
	1340	m_lcd.gbc_mode = 0;
	1341	m_lcd.gb_tile_no_mod = 0;
	1342	m_lcd.gb_vram_bank = 0;
	1343
	1344	m_lcd.gb_chrgen_offs = 0;
	1345	m_lcd.gb_bgdtab_offs = 0x1c00;
	1346	m_lcd.gb_wndtab_offs = 0x1c00;
	1347
	1348	memset(&m_lcd.gb_vid_regs, 0, sizeof(m_lcd.gb_vid_regs));
	1349	memset(&m_lcd.bg_zbuf, 0, sizeof(m_lcd.bg_zbuf));
	1350	memset(&m_lcd.cgb_bpal, 0, sizeof(m_lcd.cgb_bpal));
	1351	memset(&m_lcd.cgb_spal, 0, sizeof(m_lcd.cgb_spal));
	1352	memset(&m_lcd.sprite, 0, sizeof(m_lcd.sprite));
	1353	memset(&m_lcd.layer[0], 0, sizeof(m_lcd.layer[0]));
	1354	memset(&m_lcd.layer[1], 0, sizeof(m_lcd.layer[1]));
1213	1355
1214		if (mode == GB_VIDEO_CGB) vram_size = 0x4000;
	1356	// specific reg initialization
	1357	m_lcd.gb_vid_regs[0x06] = 0xff;
1215	1358
1216		/* free regions if already allocated */
1217		if (memregion("gfx1")->base())       machine().memory().region_free(":gfx1");
1218		if (memregion("gfx2")->base())       machine().memory().region_free(":gfx2");
	1359	for (int i = 0x0c; i < _NR_GB_VID_REGS; i++)
	1360	m_lcd.gb_vid_regs[i] = 0xff;
1219	1361
1220		m_lcd.gb_vram = machine().memory().region_alloc(":gfx1", vram_size, 1, ENDIANNESS_LITTLE );
1221		m_lcd.gb_oam = machine().memory().region_alloc(":gfx2", 0x100, 1, ENDIANNESS_LITTLE );
1222		memset( m_lcd.gb_vram->base(), 0, vram_size );
1223
1224		m_lcd.gb_vram_ptr = m_lcd.gb_vram->base();
1225		m_lcd.gb_chrgen = m_lcd.gb_vram->base();
1226		m_lcd.gb_bgdtab = m_lcd.gb_vram->base() + 0x1C00;
1227		m_lcd.gb_wndtab = m_lcd.gb_vram->base() + 0x1C00;
1228
1229		m_lcd.gb_vid_regs[0x06] = 0xFF;
1230		for( i = 0x0c; i < _NR_GB_VID_REGS; i++ )
1231		{
1232		m_lcd.gb_vid_regs[i] = 0xFF;
1233		}
1234
1235	1362	LCDSTAT = 0x80;
1236	1363	LCDCONT = 0x00;     /* Video hardware is turned off at boot time */
1237	1364	m_lcd.current_line = CURLINE = CMPLINE = 0x00;
r22743	r22744
1239	1366	SPR0PAL = SPR1PAL = 0xFF;
1240	1367	WNDPOSX = WNDPOSY = 0x00;
1241	1368
1242		/* Initialize palette arrays */
1243		for( i = 0; i < 4; i++ )
1244		{
	1369	// Initialize palette arrays
	1370	for (int i = 0; i < 4; i++)
1245	1371	m_lcd.gb_bpal[i] = m_lcd.gb_spal0[i] = m_lcd.gb_spal1[i] = i;
1246		}
1247	1372
1248	1373	switch( mode )
1249	1374	{
r22743	r22744
1252	1377
1253	1378	/* set the scanline update function */
1254	1379	update_scanline = &gb_state::gb_update_scanline;
	1380	break;
1255	1381
1256		memcpy( m_lcd.gb_oam->base(), dmg_oam_fingerprint, 0x100 );
1257
1258		break;
1259	1382	case GB_VIDEO_MGB:
1260	1383	/* set the scanline update function */
1261	1384	update_scanline = &gb_state::gb_update_scanline;
1262		/* Initialize part of VRAM. This code must be deleted when we have added the bios dump */
1263		for( i = 1; i < 0x0D; i++ )
1264		{
1265		m_lcd.gb_vram->base()[ 0x1903 + i ] = i;
1266		m_lcd.gb_vram->base()[ 0x1923 + i ] = i + 0x0C;
1267		}
1268		m_lcd.gb_vram->base()[ 0x1910 ] = 0x19;
1269
1270
1271		memcpy( m_lcd.gb_oam->base(), mgb_oam_fingerprint, 0x100 );
1272
1273	1385	/* Make sure the VBlank interrupt is set when the first instruction gets executed */
1274	1386	machine().scheduler().timer_set(m_maincpu->cycles_to_attotime(1), timer_expired_delegate(FUNC(gb_state::gb_video_init_vbl),this));
1275	1387
1276	1388	/* Initialize some video registers */
1277		gb_video_w( space, 0x0, 0x91 );    /* LCDCONT */
1278		gb_video_w( space, 0x7, 0xFC );    /* BGRDPAL */
1279		gb_video_w( space, 0x8, 0xFC );    /* SPR0PAL */
1280		gb_video_w( space, 0x9, 0xFC );    /* SPR1PAL */
	1389	gb_video_w(space, 0x0, 0x91);    /* LCDCONT */
	1390	gb_video_w(space, 0x7, 0xFC);    /* BGRDPAL */
	1391	gb_video_w(space, 0x8, 0xFC);    /* SPR0PAL */
	1392	gb_video_w(space, 0x9, 0xFC);    /* SPR1PAL */
1281	1393
1282	1394	CURLINE = m_lcd.current_line = 0;
1283	1395	LCDSTAT = ( LCDSTAT & 0xF8 ) | 0x05;
1284	1396	m_lcd.mode = 1;
1285	1397	m_lcd.lcd_timer->adjust(m_maincpu->cycles_to_attotime(60), GB_LCD_STATE_LY00_M0);
	1398	break;
1286	1399
1287		break;
1288	1400	case GB_VIDEO_SGB:
1289	1401	/* set the scanline update function */
1290	1402	update_scanline = &gb_state::sgb_update_scanline;
1291
1292	1403	break;
1293	1404
1294	1405	case GB_VIDEO_CGB:
1295	1406	/* set the scanline update function */
1296	1407	update_scanline = &gb_state::cgb_update_scanline;
1297	1408
1298		memcpy( m_lcd.gb_oam->base(), cgb_oam_fingerprint, 0x100 );
	1409	m_lcd.gbc_chrgen_offs = 0x2000;
	1410	m_lcd.gbc_bgdtab_offs = 0x3c00;
	1411	m_lcd.gbc_wndtab_offs = 0x3c00;
1299	1412
1300		m_lcd.gb_chrgen = m_lcd.gb_vram->base();
1301		m_lcd.gbc_chrgen = m_lcd.gb_vram->base() + 0x2000;
1302		m_lcd.gb_bgdtab = m_lcd.gb_wndtab = m_lcd.gb_vram->base() + 0x1C00;
1303		m_lcd.gbc_bgdtab = m_lcd.gbc_wndtab = m_lcd.gb_vram->base() + 0x3C00;
1304
1305	1413	/* HDMA disabled */
1306	1414	m_lcd.hdma_enabled = 0;
1307	1415	m_lcd.hdma_possible = 0;
r22743	r22744
1958	2066
1959	2067	READ8_MEMBER(gb_state::gb_vram_r)
1960	2068	{
1961		return ( m_lcd.vram_locked == LOCKED ) ? 0xFF : m_lcd.gb_vram_ptr[offset];
	2069	return (m_lcd.vram_locked == LOCKED) ? 0xff : m_lcd.gb_vram[offset + (m_lcd.gb_vram_bank * 0x2000)];
1962	2070	}
1963	2071
1964	2072	WRITE8_MEMBER(gb_state::gb_vram_w)
1965	2073	{
1966		if ( m_lcd.vram_locked == LOCKED )
1967		{
	2074	if (m_lcd.vram_locked == LOCKED)
1968	2075	return;
1969		}
1970		m_lcd.gb_vram_ptr[offset] = data;
	2076
	2077	m_lcd.gb_vram[offset + (m_lcd.gb_vram_bank * 0x2000)] = data;
1971	2078	}
1972	2079
1973	2080	READ8_MEMBER(gb_state::gb_oam_r)
1974	2081	{
1975		return ( m_lcd.oam_locked == LOCKED ) ? 0xFF : m_lcd.gb_oam->base()[offset];
	2082	return (m_lcd.oam_locked == LOCKED) ? 0xff : m_lcd.gb_oam[offset];
1976	2083	}
1977	2084
1978	2085	WRITE8_MEMBER(gb_state::gb_oam_w)
1979	2086	{
1980		if ( m_lcd.oam_locked == LOCKED || offset >= 0xa0 )
1981		{
	2087	if (m_lcd.oam_locked == LOCKED || offset >= 0xa0)
1982	2088	return;
1983		}
1984		m_lcd.gb_oam->base()[offset] = data;
	2089
	2090	m_lcd.gb_oam[offset] = data;
1985	2091	}
1986	2092
1987	2093	WRITE8_MEMBER(gb_state::gb_video_w)
r22743	r22744
1989	2095	switch (offset)
1990	2096	{
1991	2097	case 0x00:                      /* LCDC - LCD Control */
1992		m_lcd.gb_chrgen = m_lcd.gb_vram->base() + ((data & 0x10) ? 0x0000 : 0x0800);
	2098	m_lcd.gb_chrgen_offs = (data & 0x10) ? 0x0000 : 0x0800;
1993	2099	m_lcd.gb_tile_no_mod = (data & 0x10) ? 0x00 : 0x80;
1994		m_lcd.gb_bgdtab = m_lcd.gb_vram->base() + ((data & 0x08) ? 0x1C00 : 0x1800 );
1995		m_lcd.gb_wndtab = m_lcd.gb_vram->base() + ((data & 0x40) ? 0x1C00 : 0x1800 );
	2100	m_lcd.gb_bgdtab_offs = (data & 0x08) ? 0x1c00 : 0x1800;
	2101	m_lcd.gb_wndtab_offs = (data & 0x40) ? 0x1c00 : 0x1800;
1996	2102	/* if LCD controller is switched off, set STAT and LY to 00 */
1997		if ( ! ( data & 0x80 ) )
	2103	if (!(data & 0x80))
1998	2104	{
1999	2105	LCDSTAT &= ~0x03;
2000	2106	CURLINE = 0;
r22743	r22744
2002	2108	m_lcd.vram_locked = UNLOCKED;
2003	2109	}
2004	2110	/* If LCD is being switched on */
2005		if ( !( LCDCONT & 0x80 ) && ( data & 0x80 ) )
	2111	if (!(LCDCONT & 0x80) && (data & 0x80))
2006	2112	{
2007	2113	gb_lcd_switch_on();
2008	2114	}
r22743	r22744
2077	2183	break;
2078	2184	case 0x06:                      /* DMA - DMA Transfer and Start Address */
2079	2185	{
2080		UINT8 *P = m_lcd.gb_oam->base();
	2186	UINT8 *P = m_lcd.gb_oam;
2081	2187	offset = (UINT16) data << 8;
2082	2188	for (data = 0; data < 0xA0; data++)
2083	2189	*P++ = space.read_byte(offset++);
r22743	r22744
2113	2219	default:                        /* Unknown register, no change */
2114	2220	return;
2115	2221	}
2116		m_lcd.gb_vid_regs[ offset ] = data;
	2222	m_lcd.gb_vid_regs[offset] = data;
2117	2223	}
2118	2224
2119	2225	READ8_MEMBER(gb_state::gbc_video_r)
r22743	r22744
2141	2247	switch( offset )
2142	2248	{
2143	2249	case 0x00:      /* LCDC - LCD Control */
2144		m_lcd.gb_chrgen = m_lcd.gb_vram->base() + ((data & 0x10) ? 0x0000 : 0x0800);
2145		m_lcd.gbc_chrgen = m_lcd.gb_vram->base() + ((data & 0x10) ? 0x2000 : 0x2800);
	2250	m_lcd.gb_chrgen_offs = (data & 0x10) ? 0x0000 : 0x0800;
	2251	m_lcd.gbc_chrgen_offs = (data & 0x10) ? 0x2000 : 0x2800;
2146	2252	m_lcd.gb_tile_no_mod = (data & 0x10) ? 0x00 : 0x80;
2147		m_lcd.gb_bgdtab = m_lcd.gb_vram->base() + ((data & 0x08) ? 0x1C00 : 0x1800);
2148		m_lcd.gbc_bgdtab = m_lcd.gb_vram->base() + ((data & 0x08) ? 0x3C00 : 0x3800);
2149		m_lcd.gb_wndtab = m_lcd.gb_vram->base() + ((data & 0x40) ? 0x1C00 : 0x1800);
2150		m_lcd.gbc_wndtab = m_lcd.gb_vram->base() + ((data & 0x40) ? 0x3C00 : 0x3800);
	2253	m_lcd.gb_bgdtab_offs = (data & 0x08) ? 0x1c00 : 0x1800;
	2254	m_lcd.gbc_bgdtab_offs = (data & 0x08) ? 0x3c00 : 0x3800;
	2255	m_lcd.gb_wndtab_offs = (data & 0x40) ? 0x1c00 : 0x1800;
	2256	m_lcd.gbc_wndtab_offs = (data & 0x40) ? 0x3c00 : 0x3800;
2151	2257	/* if LCD controller is switched off, set STAT to 00 */
2152	2258	if ( ! ( data & 0x80 ) )
2153	2259	{
r22743	r22744
2234	2340	logerror( "Write to undocumented register: %X = %X\n", offset, data );
2235	2341	break;
2236	2342	case 0x0F:      /* VBK - VRAM bank select */
2237		m_lcd.gb_vram_ptr = m_lcd.gb_vram->base() + ( data & 0x01 ) * 0x2000;
	2343	m_lcd.gb_vram_bank = data & 0x01;
2238	2344	data |= 0xFE;
2239	2345	break;
2240	2346	case 0x11:      /* HDMA1 - HBL General DMA - Source High */

trunk/src/mess/includes/gb.h

r22743	r22744
92	92	emu_timer *lcd_timer;
93	93	int gbc_mode;
94	94
95		memory_region *gb_vram;     /* Pointer to VRAM */
96		memory_region *gb_oam;      /* Pointer to OAM memory */
97		UINT8   *gb_vram_ptr;
98		UINT8   *gb_chrgen;     /* Character generator */
99		UINT8   *gb_bgdtab;     /* Background character table */
100		UINT8   *gb_wndtab;     /* Window character table */
	95	UINT8   *gb_vram;     // Pointer to VRAM
	96	UINT8   *gb_oam;      // Pointer to OAM memory
101	97	UINT8   gb_tile_no_mod;
102		UINT8   *gbc_chrgen;    /* CGB Character generator */
103		UINT8   *gbc_bgdtab;    /* CGB Background character table */
104		UINT8   *gbc_wndtab;    /* CGB Window character table */
	98	UINT32  gb_chrgen_offs;      // GB Character generator
	99	UINT32  gb_bgdtab_offs;      // GB Background character table
	100	UINT32  gb_wndtab_offs;      // GB Window character table
	101	UINT32  gbc_chrgen_offs;   // CGB Character generator
	102	UINT32  gbc_bgdtab_offs;   // CGB Background character table
	103	UINT32  gbc_wndtab_offs;   // CGB Window character table
	104	int     gb_vram_bank;
105	105	};
106	106
107	107
r22743	r22744
138	138	UINT8       m_reloading;
139	139
140	140	/* Serial I/O related */
141		UINT32      m_SIOCount;             /* Serial I/O counter */
	141	UINT32      m_sio_count;             /* Serial I/O counter */
142	142	emu_timer   *m_gb_serial_timer;
143	143
144	144	/* SGB variables */
r22743	r22744
154	154	UINT32 m_sgb_atf;
155	155
156	156	/* CGB variables */
157		UINT8       *m_GBC_RAMMap[8];           /* (CGB) Addresses of internal RAM banks */
158		UINT8       m_GBC_RAMBank;          /* (CGB) Current CGB RAM bank */
	157	UINT8       *m_gbc_rammap[8];           /* (CGB) Addresses of internal RAM banks */
	158	UINT8       m_gbc_rambank;          /* (CGB) Current CGB RAM bank */
159	159
160	160
161	161	gb_lcd_t m_lcd;
162	162	void (gb_state::*update_scanline) ();
163		bool m_bios_disable;
	163	int m_bios_disable;
164	164
165	165	bitmap_ind16 m_bitmap;
166	166	DECLARE_WRITE8_MEMBER(gb_io_w);
r22743	r22744
185	185	DECLARE_MACHINE_START(sgb);
186	186	DECLARE_MACHINE_RESET(sgb);
187	187	DECLARE_PALETTE_INIT(sgb);
	188	DECLARE_MACHINE_START(gbpocket);
188	189	DECLARE_MACHINE_RESET(gbpocket);
189	190	DECLARE_PALETTE_INIT(gbp);
190	191	DECLARE_MACHINE_START(gbc);
191	192	DECLARE_MACHINE_RESET(gbc);
192	193	DECLARE_PALETTE_INIT(gbc);
193		DECLARE_MACHINE_START(gb_video);
194		DECLARE_MACHINE_START(gbc_video);
195	194	INTERRUPT_GEN_MEMBER(gb_scanline_interrupt);
196	195	TIMER_CALLBACK_MEMBER(gb_serial_timer_proc);
197	196	TIMER_CALLBACK_MEMBER(gb_video_init_vbl);
r22743	r22744
228	227	void sgb_update_scanline();
229	228	void cgb_update_sprites();
230	229	void cgb_update_scanline();
231		void gb_video_reset( int mode );
	230	void gb_video_reset(int mode);
	231	void gb_video_start(int mode);
232	232	void gbc_hdma(UINT16 length);
233	233	void gb_increment_scanline();
234	234	void gb_lcd_switch_on();
235	235	inline void gb_plot_pixel(bitmap_ind16 &bitmap, int x, int y, UINT32 color);
	236
	237	void save_gb_base();
	238	void save_gb_video();
	239	void save_gbc_only();
	240	void save_sgb_only();
	241	void gb_videoptr_restore();
	242	void gbc_videoptr_restore();
236	243	};
237	244
238	245

Previous

199869 Revisions

Next

---

© 1997-2024 The MAME Team