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r22738 Friday 10th May, 2013 at 15:06:32 UTC by smf
modernised YMF271 [smf]

[src/emu/sound]	ymf271.c ymf271.h
[src/mame/drivers]	ms32.c seibuspi.c zn.c

trunk/src/mame/drivers/ms32.c

r22737	r22738
1359	1359
1360	1360	static ADDRESS_MAP_START( ms32_sound_map, AS_PROGRAM, 8, ms32_state )
1361	1361	AM_RANGE(0x0000, 0x3eff) AM_ROM
1362		AM_RANGE(0x3f00, 0x3f0f) AM_DEVREADWRITE_LEGACY("ymf", ymf271_r,ymf271_w)
	1362	AM_RANGE(0x3f00, 0x3f0f) AM_DEVREADWRITE("ymf", ymf271_device, read, write)
1363	1363	AM_RANGE(0x3f10, 0x3f10) AM_READWRITE(latch_r,to_main_w)
1364	1364	AM_RANGE(0x3f20, 0x3f20) AM_READNOP /* 2nd latch ? */
1365	1365	AM_RANGE(0x3f20, 0x3f20) AM_WRITENOP /* to_main2_w  ? */

trunk/src/mame/drivers/zn.c

r22737	r22738
1619	1619	static ADDRESS_MAP_START( psarc_snd_map, AS_PROGRAM, 16, zn_state )
1620	1620	AM_RANGE(0x000000, 0x07ffff) AM_ROM
1621	1621	AM_RANGE(0x080000, 0x0fffff) AM_RAM
1622		AM_RANGE(0x100000, 0x10001f) AM_DEVREADWRITE8_LEGACY("ymf", ymf271_r, ymf271_w, 0x00ff )
	1622	AM_RANGE(0x100000, 0x10001f) AM_DEVREADWRITE8("ymf", ymf271_device, read, write, 0x00ff )
1623	1623	AM_RANGE(0x180008, 0x180009) AM_READ8(soundlatch_byte_r, 0x00ff )
1624	1624	AM_RANGE(0x000000, 0x07ffff) AM_WRITENOP
1625	1625	AM_RANGE(0x100020, 0xffffff) AM_WRITENOP

trunk/src/mame/drivers/seibuspi.c

r22737	r22738
1056	1056	AM_RANGE(0x400b, 0x400b) AM_WRITENOP            /* Unknown */
1057	1057	AM_RANGE(0x4013, 0x4013) AM_READ(z80_coin_r)
1058	1058	AM_RANGE(0x401b, 0x401b) AM_WRITE(z80_bank_w)       /* control register: bits 0-2 = bank @ 8000, bit 3 = watchdog? */
1059		AM_RANGE(0x6000, 0x600f) AM_DEVREADWRITE_LEGACY("ymf", ymf271_r, ymf271_w)
	1059	AM_RANGE(0x6000, 0x600f) AM_DEVREADWRITE("ymf", ymf271_device, read, write)
1060	1060	AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank4")
1061	1061	ADDRESS_MAP_END
1062	1062
r22737	r22738
1102	1102	m_eeprom->set_cs_line((data & 0x20) ? CLEAR_LINE : ASSERT_LINE);
1103	1103	}
1104	1104
1105		static const ymf271_interface ymf271_config =
1106		{
1107		DEVCB_DRIVER_MEMBER(seibuspi_state,flashrom_read),
1108		DEVCB_DRIVER_MEMBER(seibuspi_state,flashrom_write),
1109		DEVCB_DRIVER_LINE_MEMBER(seibuspi_state,irqhandler)
1110		};
1111
1112	1105	/********************************************************************/
1113	1106
1114	1107	static ADDRESS_MAP_START( seibu386_map, AS_PROGRAM, 32, seibuspi_state )
r22737	r22738
1870	1863	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1871	1864
1872	1865	MCFG_SOUND_ADD("ymf", YMF271, XTAL_16_9344MHz)
1873		MCFG_SOUND_CONFIG(ymf271_config)
	1866	MCFG_YMF271_IRQ_HANDLER(WRITELINE(seibuspi_state, irqhandler))
	1867	MCFG_YMF271_EXT_READ_HANDLER(READ8(seibuspi_state, flashrom_read))
	1868	MCFG_YMF271_EXT_WRITE_HANDLER(WRITE8(seibuspi_state,flashrom_write))
	1869
1874	1870	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
1875	1871	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
1876	1872	MACHINE_CONFIG_END
r22737	r22738
1947	1943	MCFG_CPU_CLOCK(XTAL_4_9152MHz)
1948	1944
1949	1945	MCFG_SOUND_REPLACE("ymf", YMF271, XTAL_16_384MHz)
1950		MCFG_SOUND_CONFIG(ymf271_config)
	1946	MCFG_YMF271_IRQ_HANDLER(WRITELINE(seibuspi_state, irqhandler))
	1947	MCFG_YMF271_EXT_READ_HANDLER(READ8(seibuspi_state, flashrom_read))
	1948	MCFG_YMF271_EXT_WRITE_HANDLER(WRITE8(seibuspi_state,flashrom_write))
1951	1949
1952	1950	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
1953	1951	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)

trunk/src/emu/sound/ymf271.c

r22737	r22738
33	33
34	34	//#define log2(n) (log((float) n)/log((float) 2))
35	35
36		struct YMF271Slot
37		{
38		INT8  extout;
39		UINT8 lfoFreq;
40		INT8  lfowave;
41		INT8  pms, ams;
42		INT8  detune;
43		INT8  multiple;
44		INT8  tl;
45		INT8  keyscale;
46		INT8  ar;
47		INT8  decay1rate, decay2rate;
48		INT8  decay1lvl;
49		INT8  relrate;
50		INT32 fns;
51		INT8  block;
52		INT8  feedback;
53		INT8  waveform;
54		INT8  accon;
55		INT8  algorithm;
56		INT8  ch0_level, ch1_level, ch2_level, ch3_level;
57
58		UINT32 startaddr;
59		UINT32 loopaddr;
60		UINT32 endaddr;
61		INT8   fs, srcnote, srcb;
62
63		INT64 step;
64		INT64 stepptr;
65
66		INT8 active;
67		INT8 bits;
68
69		// envelope generator
70		INT32 volume;
71		INT32 env_state;
72		INT32 env_attack_step;      // volume increase step in attack state
73		INT32 env_decay1_step;
74		INT32 env_decay2_step;
75		INT32 env_release_step;
76
77		INT64 feedback_modulation0;
78		INT64 feedback_modulation1;
79
80		INT32 lfo_phase, lfo_step;
81		INT32 lfo_amplitude;
82		double lfo_phasemod;
83		};
84
85		struct YMF271Group
86		{
87		INT8 sync, pfm;
88		};
89
90		struct YMF271Chip
91		{
92		YMF271Slot slots[48];
93		YMF271Group groups[12];
94
95		INT32 timerA, timerB;
96		INT32 timerAVal, timerBVal;
97		INT32 irqstate;
98		INT8  status;
99		INT8  enable;
100
101		emu_timer *timA, *timB;
102
103		INT8  reg0, reg1, reg2, reg3, pcmreg, timerreg;
104		UINT32 ext_address;
105		UINT8 ext_read;
106
107		const UINT8 *rom;
108		devcb_resolved_read8 ext_mem_read;
109		devcb_resolved_write8 ext_mem_write;
110		devcb_resolved_write_line irq_callback;
111
112		UINT32 clock;
113		sound_stream * stream;
114		device_t *device;
115		};
116
117	36	// slot mapping assists
118	37	static const int fm_tab[] = { 0, 1, 2, -1, 3, 4, 5, -1, 6, 7, 8, -1, 9, 10, 11, -1 };
119	38	static const int pcm_tab[] = { 0, 4, 8, -1, 12, 16, 20, -1, 24, 28, 32, -1, 36, 40, 44, -1 };
r22737	r22738
271	190	static int total_level[128];
272	191	static int env_volume_table[256];
273	192
274		INLINE YMF271Chip *get_safe_token(device_t *device)
275		{
276		assert(device != NULL);
277		assert(device->type() == YMF271);
278		return (YMF271Chip *)downcast<ymf271_device *>(device)->token();
279		}
280	193
281
282	194	INLINE int GET_KEYSCALED_RATE(int rate, int keycode, int keyscale)
283	195	{
284	196	int newrate = rate + RKS_Table[keycode][keyscale];
r22737	r22738
347	259
348	260	static const double fs_frequency[4] = { 1.0/1.0, 1.0/2.0, 1.0/4.0, 1.0/8.0 };
349	261
350		INLINE void calculate_step(YMF271Slot *slot)
	262	void ymf271_device::calculate_step(YMF271Slot *slot)
351	263	{
352	264	double st;
353	265
r22737	r22738
377	289	}
378	290	}
379	291
380		static void update_envelope(YMF271Slot *slot)
	292	void ymf271_device::update_envelope(YMF271Slot *slot)
381	293	{
382	294	switch (slot->env_state)
383	295	{
r22737	r22738
430	342	}
431	343	}
432	344
433		static void init_envelope(YMF271Slot *slot)
	345	void ymf271_device::init_envelope(YMF271Slot *slot)
434	346	{
435	347	int keycode, rate;
436	348	int attack_length, decay1_length, decay2_length, release_length;
r22737	r22738
479	391	slot->env_state = ENV_ATTACK;
480	392	}
481	393
482		static void init_lfo(YMF271Slot *slot)
	394	void ymf271_device::init_lfo(YMF271Slot *slot)
483	395	{
484	396	slot->lfo_phase = 0;
485	397	slot->lfo_amplitude = 0;
r22737	r22738
488	400	slot->lfo_step = (int)((((double)LFO_LENGTH * LFO_frequency_table[slot->lfoFreq]) / 44100.0) * 256.0);
489	401	}
490	402
491		INLINE void update_lfo(YMF271Slot *slot)
	403	void ymf271_device::update_lfo(YMF271Slot *slot)
492	404	{
493	405	slot->lfo_phase += slot->lfo_step;
494	406
r22737	r22738
498	410	calculate_step(slot);
499	411	}
500	412
501		INLINE int calculate_slot_volume(YMF271Slot *slot)
	413	int ymf271_device::calculate_slot_volume(YMF271Slot *slot)
502	414	{
503	415	UINT64 volume;
504	416	UINT64 env_volume;
r22737	r22738
519	431	return volume;
520	432	}
521	433
522		static void update_pcm(YMF271Chip *chip, int slotnum, INT32 *mixp, int length)
	434	void ymf271_device::update_pcm(int slotnum, INT32 *mixp, int length)
523	435	{
524	436	int i;
525	437	int final_volume;
526	438	INT16 sample;
527	439	INT64 ch0_vol, ch1_vol; //, ch2_vol, ch3_vol;
528		const UINT8 *rombase;
529	440
530		YMF271Slot *slot = &chip->slots[slotnum];
531		rombase = chip->rom;
	441	YMF271Slot *slot = &m_slots[slotnum];
532	442
533	443	if (!slot->active)
534	444	{
r22737	r22738
545	455	if (slot->bits == 8)
546	456	{
547	457	// 8bit
548		sample = rombase[slot->startaddr + (slot->stepptr>>16)]<<8;
	458	sample = m_rom[slot->startaddr + (slot->stepptr>>16)]<<8;
549	459	}
550	460	else
551	461	{
552	462	// 12bit
553	463	if (slot->stepptr & 0x10000)
554		sample = rombase[slot->startaddr + (slot->stepptr>>17)*3 + 2]<<8 | ((rombase[slot->startaddr + (slot->stepptr>>17)*3 + 1] << 4) & 0xf0);
	464	sample = m_rom[slot->startaddr + (slot->stepptr>>17)*3 + 2]<<8 | ((m_rom[slot->startaddr + (slot->stepptr>>17)*3 + 1] << 4) & 0xf0);
555	465	else
556		sample = rombase[slot->startaddr + (slot->stepptr>>17)*3]<<8 | (rombase[slot->startaddr + (slot->stepptr>>17)*3 + 1] & 0xf0);
	466	sample = m_rom[slot->startaddr + (slot->stepptr>>17)*3]<<8 | (m_rom[slot->startaddr + (slot->stepptr>>17)*3 + 1] & 0xf0);
557	467	}
558	468
559	469	update_envelope(slot);
r22737	r22738
585	495	// calculates 2 operator FM using algorithm 0
586	496	// <--------|
587	497	// +--[S1]--+--[S3]-->
588		INLINE INT32 calculate_2op_fm_0(YMF271Chip *chip, int slotnum1, int slotnum2)
	498	INT32 ymf271_device::calculate_2op_fm_0(int slotnum1, int slotnum2)
589	499	{
590		YMF271Slot *slot1 = &chip->slots[slotnum1];
591		YMF271Slot *slot2 = &chip->slots[slotnum2];
	500	YMF271Slot *slot1 = &m_slots[slotnum1];
	501	YMF271Slot *slot2 = &m_slots[slotnum2];
592	502	INT64 env1, env2;
593	503	INT64 slot1_output, slot2_output;
594	504	INT64 phase_mod;
r22737	r22738
622	532	// calculates 2 operator FM using algorithm 1
623	533	// <-----------------|
624	534	// +--[S1]--+--[S3]--|-->
625		INLINE INT32 calculate_2op_fm_1(YMF271Chip *chip, int slotnum1, int slotnum2)
	535	INT32 ymf271_device::calculate_2op_fm_1(int slotnum1, int slotnum2)
626	536	{
627		YMF271Slot *slot1 = &chip->slots[slotnum1];
628		YMF271Slot *slot2 = &chip->slots[slotnum2];
	537	YMF271Slot *slot1 = &m_slots[slotnum1];
	538	YMF271Slot *slot2 = &m_slots[slotnum2];
629	539	INT64 env1, env2;
630	540	INT64 slot1_output, slot2_output;
631	541	INT64 phase_mod;
r22737	r22738
657	567	}
658	568
659	569	// calculates the output of one FM operator
660		INLINE INT32 calculate_1op_fm_0(YMF271Chip *chip, int slotnum, int phase_modulation)
	570	INT32 ymf271_device::calculate_1op_fm_0(int slotnum, int phase_modulation)
661	571	{
662		YMF271Slot *slot = &chip->slots[slotnum];
	572	YMF271Slot *slot = &m_slots[slotnum];
663	573	INT64 env;
664	574	INT64 slot_output;
665	575	INT64 phase_mod = phase_modulation;
r22737	r22738
681	591	// calculates the output of one FM operator with feedback modulation
682	592	// <--------|
683	593	// +--[S1]--|
684		INLINE INT32 calculate_1op_fm_1(YMF271Chip *chip, int slotnum)
	594	INT32 ymf271_device::calculate_1op_fm_1(int slotnum)
685	595	{
686		YMF271Slot *slot = &chip->slots[slotnum];
	596	YMF271Slot *slot = &m_slots[slotnum];
687	597	INT64 env;
688	598	INT64 slot_output;
689	599	INT64 feedback;
r22737	r22738
704	614	return slot_output;
705	615	}
706	616
707		static STREAM_UPDATE( ymf271_update )
	617	//-------------------------------------------------
	618	//  sound_stream_update - handle a stream update
	619	//-------------------------------------------------
	620
	621	void ymf271_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
708	622	{
709	623	int i, j;
710	624	int op;
711	625	INT32 *mixp;
712	626	INT32 mix[48000*2];
713		YMF271Chip *chip = (YMF271Chip *)param;
714	627
715	628	memset(mix, 0, sizeof(mix[0])*samples*2);
716	629
717	630	for (j = 0; j < 12; j++)
718	631	{
719		YMF271Group *slot_group = &chip->groups[j];
	632	YMF271Group *slot_group = &m_groups[j];
720	633	mixp = &mix[0];
721	634
722	635	if (slot_group->pfm && slot_group->sync != 3)
723	636	{
724	637	mame_printf_debug("Group %d: PFM, Sync = %d, Waveform Slot1 = %d, Slot2 = %d, Slot3 = %d, Slot4 = %d\n",
725		j, slot_group->sync, chip->slots[j+0].waveform, chip->slots[j+12].waveform, chip->slots[j+24].waveform, chip->slots[j+36].waveform);
	638	j, slot_group->sync, m_slots[j+0].waveform, m_slots[j+12].waveform, m_slots[j+24].waveform, m_slots[j+36].waveform);
726	639	}
727	640
728	641	switch (slot_group->sync)
r22737	r22738
735	648	int slot4 = j + (3*12);
736	649	mixp = &mix[0];
737	650
738		if (chip->slots[slot1].active)
	651	if (m_slots[slot1].active)
739	652	{
740	653	for (i = 0; i < samples; i++)
741	654	{
742	655	INT64 output1 = 0, output2 = 0, output3 = 0, output4 = 0, phase_mod1 = 0, phase_mod2 = 0;
743		switch (chip->slots[slot1].algorithm)
	656	switch (m_slots[slot1].algorithm)
744	657	{
745	658	// <--------|
746	659	// +--[S1]--+--[S3]--+--[S2]--+--[S4]-->
747	660	case 0:
748		phase_mod1 = calculate_2op_fm_0(chip, slot1, slot3);
749		phase_mod2 = calculate_1op_fm_0(chip, slot2, phase_mod1);
750		output4 = calculate_1op_fm_0(chip, slot4, phase_mod2);
	661	phase_mod1 = calculate_2op_fm_0(slot1, slot3);
	662	phase_mod2 = calculate_1op_fm_0(slot2, phase_mod1);
	663	output4 = calculate_1op_fm_0(slot4, phase_mod2);
751	664	break;
752	665
753	666	// <-----------------|
754	667	// +--[S1]--+--[S3]--+--[S2]--+--[S4]-->
755	668	case 1:
756		phase_mod1 = calculate_2op_fm_1(chip, slot1, slot3);
757		phase_mod2 = calculate_1op_fm_0(chip, slot2, phase_mod1);
758		output4 = calculate_1op_fm_0(chip, slot4, phase_mod2);
	669	phase_mod1 = calculate_2op_fm_1(slot1, slot3);
	670	phase_mod2 = calculate_1op_fm_0(slot2, phase_mod1);
	671	output4 = calculate_1op_fm_0(slot4, phase_mod2);
759	672	break;
760	673
761	674	// <--------|
762	675	// +--[S1]--|
763	676	// ---[S3]--+--[S2]--+--[S4]-->
764	677	case 2:
765		phase_mod1 = (calculate_1op_fm_1(chip, slot1) + calculate_1op_fm_0(chip, slot3, 0)) / 2;
766		phase_mod2 = calculate_1op_fm_0(chip, slot2, phase_mod1);
767		output4 = calculate_1op_fm_0(chip, slot4, phase_mod2);
	678	phase_mod1 = (calculate_1op_fm_1(slot1) + calculate_1op_fm_0(slot3, 0)) / 2;
	679	phase_mod2 = calculate_1op_fm_0(slot2, phase_mod1);
	680	output4 = calculate_1op_fm_0(slot4, phase_mod2);
768	681	break;
769	682
770	683	//          <--------|
771	684	//          +--[S1]--|
772	685	// ---[S3]--+--[S2]--+--[S4]-->
773	686	case 3:
774		phase_mod1 = calculate_1op_fm_0(chip, slot3, 0);
775		phase_mod2 = (calculate_1op_fm_0(chip, slot2, phase_mod1) + calculate_1op_fm_1(chip, slot1)) / 2;
776		output4 = calculate_1op_fm_0(chip, slot4, phase_mod2);
	687	phase_mod1 = calculate_1op_fm_0(slot3, 0);
	688	phase_mod2 = (calculate_1op_fm_0(slot2, phase_mod1) + calculate_1op_fm_1(slot1)) / 2;
	689	output4 = calculate_1op_fm_0(slot4, phase_mod2);
777	690	break;
778	691
779	692	// <--------|  --[S2]--|
780	693	// ---[S1]--|-+--[S3]--+--[S4]-->
781	694	case 4:
782		phase_mod1 = (calculate_2op_fm_0(chip, slot1, slot3) + calculate_1op_fm_0(chip, slot2, 0)) / 2;
783		output4 = calculate_1op_fm_0(chip, slot4, phase_mod1);
	695	phase_mod1 = (calculate_2op_fm_0(slot1, slot3) + calculate_1op_fm_0(slot2, 0)) / 2;
	696	output4 = calculate_1op_fm_0(slot4, phase_mod1);
784	697	break;
785	698
786	699	//           --[S2]-----|
787	700	// <-----------------|  |
788	701	// ---[S1]--+--[S3]--|--+--[S4]-->
789	702	case 5:
790		phase_mod1 = (calculate_2op_fm_1(chip, slot1, slot3) + calculate_1op_fm_0(chip, slot2, 0)) / 2;
791		output4 = calculate_1op_fm_0(chip, slot4, phase_mod1);
	703	phase_mod1 = (calculate_2op_fm_1(slot1, slot3) + calculate_1op_fm_0(slot2, 0)) / 2;
	704	output4 = calculate_1op_fm_0(slot4, phase_mod1);
792	705	break;
793	706
794	707	// ---[S2]-----+--[S4]--|
r22737	r22738
796	709	// <--------|           |
797	710	// +--[S1]--|--+--[S3]--+-->
798	711	case 6:
799		output3 = calculate_2op_fm_0(chip, slot1, slot3);
800		phase_mod1 = calculate_1op_fm_0(chip, slot2, 0);
801		output4 = calculate_1op_fm_0(chip, slot4, phase_mod1);
	712	output3 = calculate_2op_fm_0(slot1, slot3);
	713	phase_mod1 = calculate_1op_fm_0(slot2, 0);
	714	output4 = calculate_1op_fm_0(slot4, phase_mod1);
802	715	break;
803	716
804	717	// ---[S2]--+--[S4]-----|
r22737	r22738
806	719	// <-----------------|  |
807	720	// +--[S1]--+--[S3]--|--+-->
808	721	case 7:
809		output3 = calculate_2op_fm_1(chip, slot1, slot3);
810		phase_mod1 = calculate_1op_fm_0(chip, slot2, 0);
811		output4 = calculate_1op_fm_0(chip, slot4, phase_mod1);
	722	output3 = calculate_2op_fm_1(slot1, slot3);
	723	phase_mod1 = calculate_1op_fm_0(slot2, 0);
	724	output4 = calculate_1op_fm_0(slot4, phase_mod1);
812	725	break;
813	726
814	727	// ---[S3]--+--[S2]--+--[S4]--|
r22737	r22738
816	729	// <--------|                 |
817	730	// +--[S1]--|-----------------+-->
818	731	case 8:
819		output1 = calculate_1op_fm_1(chip, slot1);
820		phase_mod1 = calculate_1op_fm_0(chip, slot3, 0);
821		phase_mod2 = calculate_1op_fm_0(chip, slot2, phase_mod1);
822		output4 = calculate_1op_fm_0(chip, slot4, phase_mod2);
	732	output1 = calculate_1op_fm_1(slot1);
	733	phase_mod1 = calculate_1op_fm_0(slot3, 0);
	734	phase_mod2 = calculate_1op_fm_0(slot2, phase_mod1);
	735	output4 = calculate_1op_fm_0(slot4, phase_mod2);
823	736	break;
824	737
825	738	//         <--------|
r22737	r22738
828	741	// --[S3]--|        |
829	742	// --[S2]--+--[S4]--+-->
830	743	case 9:
831		phase_mod1 = (calculate_1op_fm_0(chip, slot2, 0) + calculate_1op_fm_0(chip, slot3, 0)) / 2;
832		output4 = calculate_1op_fm_0(chip, slot4, phase_mod1);
833		output1 = calculate_1op_fm_1(chip, slot1);
	744	phase_mod1 = (calculate_1op_fm_0(slot2, 0) + calculate_1op_fm_0(slot3, 0)) / 2;
	745	output4 = calculate_1op_fm_0(slot4, phase_mod1);
	746	output1 = calculate_1op_fm_1(slot1);
834	747	break;
835	748
836	749	//           --[S4]--|
r22737	r22738
838	751	// <--------|        |
839	752	// +--[S1]--+--[S3]--+-->
840	753	case 10:
841		output3 = calculate_2op_fm_0(chip, slot1, slot3);
842		output2 = calculate_1op_fm_0(chip, slot2, 0);
843		output4 = calculate_1op_fm_0(chip, slot4, 0);
	754	output3 = calculate_2op_fm_0(slot1, slot3);
	755	output2 = calculate_1op_fm_0(slot2, 0);
	756	output4 = calculate_1op_fm_0(slot4, 0);
844	757	break;
845	758
846	759	//           --[S4]-----|
r22737	r22738
848	761	// <-----------------|  |
849	762	// +--[S1]--+--[S3]--|--+-->
850	763	case 11:
851		output3 = calculate_2op_fm_1(chip, slot1, slot3);
852		output2 = calculate_1op_fm_0(chip, slot2, 0);
853		output4 = calculate_1op_fm_0(chip, slot4, 0);
	764	output3 = calculate_2op_fm_1(slot1, slot3);
	765	output2 = calculate_1op_fm_0(slot2, 0);
	766	output4 = calculate_1op_fm_0(slot4, 0);
854	767	break;
855	768
856	769	//            |--+--[S4]--+
857	770	// <--------| |--+--[S3]--+
858	771	// +--[S1]--+-|--+--[S2]--+-->
859	772	case 12:
860		phase_mod1 = calculate_1op_fm_1(chip, slot1);
861		output2 = calculate_1op_fm_0(chip, slot2, phase_mod1);
862		output3 = calculate_1op_fm_0(chip, slot3, phase_mod1);
863		output4 = calculate_1op_fm_0(chip, slot4, phase_mod1);
	773	phase_mod1 = calculate_1op_fm_1(slot1);
	774	output2 = calculate_1op_fm_0(slot2, phase_mod1);
	775	output3 = calculate_1op_fm_0(slot3, phase_mod1);
	776	output4 = calculate_1op_fm_0(slot4, phase_mod1);
864	777	break;
865	778
866	779	// ---[S3]--+--[S2]--+
r22737	r22738
869	782	// <--------|        |
870	783	// +--[S1]--|--------+-->
871	784	case 13:
872		output1 = calculate_1op_fm_1(chip, slot1);
873		phase_mod1 = calculate_1op_fm_0(chip, slot3, 0);
874		output2 = calculate_1op_fm_0(chip, slot2, phase_mod1);
875		output4 = calculate_1op_fm_0(chip, slot4, 0);
	785	output1 = calculate_1op_fm_1(slot1);
	786	phase_mod1 = calculate_1op_fm_0(slot3, 0);
	787	output2 = calculate_1op_fm_0(slot2, phase_mod1);
	788	output4 = calculate_1op_fm_0(slot4, 0);
876	789	break;
877	790
878	791	// ---[S2]----+--[S4]--+
r22737	r22738
880	793	// <--------| +--[S3]--|
881	794	// +--[S1]--+-|--------+-->
882	795	case 14:
883		output1 = calculate_1op_fm_1(chip, slot1);
	796	output1 = calculate_1op_fm_1(slot1);
884	797	phase_mod1 = output1;
885		output3 = calculate_1op_fm_0(chip, slot3, phase_mod1);
886		phase_mod2 = calculate_1op_fm_0(chip, slot2, 0);
887		output4 = calculate_1op_fm_0(chip, slot4, phase_mod2);
	798	output3 = calculate_1op_fm_0(slot3, phase_mod1);
	799	phase_mod2 = calculate_1op_fm_0(slot2, 0);
	800	output4 = calculate_1op_fm_0(slot4, phase_mod2);
888	801	break;
889	802
890	803	//  --[S4]-----+
r22737	r22738
893	806	// <--------|  |
894	807	// +--[S1]--|--+-->
895	808	case 15:
896		output1 = calculate_1op_fm_1(chip, slot1);
897		output2 = calculate_1op_fm_0(chip, slot2, 0);
898		output3 = calculate_1op_fm_0(chip, slot3, 0);
899		output4 = calculate_1op_fm_0(chip, slot4, 0);
	809	output1 = calculate_1op_fm_1(slot1);
	810	output2 = calculate_1op_fm_0(slot2, 0);
	811	output3 = calculate_1op_fm_0(slot3, 0);
	812	output4 = calculate_1op_fm_0(slot4, 0);
900	813	break;
901	814	}
902	815
903		*mixp++ += ((output1 * channel_attenuation[chip->slots[slot1].ch0_level]) +
904		(output2 * channel_attenuation[chip->slots[slot2].ch0_level]) +
905		(output3 * channel_attenuation[chip->slots[slot3].ch0_level]) +
906		(output4 * channel_attenuation[chip->slots[slot4].ch0_level])) >> 16;
907		*mixp++ += ((output1 * channel_attenuation[chip->slots[slot1].ch1_level]) +
908		(output2 * channel_attenuation[chip->slots[slot2].ch1_level]) +
909		(output3 * channel_attenuation[chip->slots[slot3].ch1_level]) +
910		(output4 * channel_attenuation[chip->slots[slot4].ch1_level])) >> 16;
	816	*mixp++ += ((output1 * channel_attenuation[m_slots[slot1].ch0_level]) +
	817	(output2 * channel_attenuation[m_slots[slot2].ch0_level]) +
	818	(output3 * channel_attenuation[m_slots[slot3].ch0_level]) +
	819	(output4 * channel_attenuation[m_slots[slot4].ch0_level])) >> 16;
	820	*mixp++ += ((output1 * channel_attenuation[m_slots[slot1].ch1_level]) +
	821	(output2 * channel_attenuation[m_slots[slot2].ch1_level]) +
	822	(output3 * channel_attenuation[m_slots[slot3].ch1_level]) +
	823	(output4 * channel_attenuation[m_slots[slot4].ch1_level])) >> 16;
911	824	}
912	825	}
913	826	break;
r22737	r22738
921	834	int slot2 = j + ((op + 2) * 12);
922	835
923	836	mixp = &mix[0];
924		if (chip->slots[slot1].active)
	837	if (m_slots[slot1].active)
925	838	{
926	839	for (i = 0; i < samples; i++)
927	840	{
928	841	INT64 output1 = 0, output2 = 0, phase_mod = 0;
929		switch (chip->slots[slot1].algorithm & 3)
	842	switch (m_slots[slot1].algorithm & 3)
930	843	{
931	844	// <--------|
932	845	// +--[S1]--+--[S3]-->
933	846	case 0:
934		output2 = calculate_2op_fm_0(chip, slot1, slot2);
	847	output2 = calculate_2op_fm_0(slot1, slot2);
935	848	break;
936	849
937	850	// <-----------------|
938	851	// +--[S1]--+--[S3]--|-->
939	852	case 1:
940		output2 = calculate_2op_fm_1(chip, slot1, slot2);
	853	output2 = calculate_2op_fm_1(slot1, slot2);
941	854	break;
942	855
943	856	// ---[S3]-----|
944	857	// <--------|  |
945	858	// +--[S1]--|--+-->
946	859	case 2:
947		output1 = calculate_1op_fm_1(chip, slot1);
948		output2 = calculate_1op_fm_0(chip, slot2, 0);
	860	output1 = calculate_1op_fm_1(slot1);
	861	output2 = calculate_1op_fm_0(slot2, 0);
949	862	break;
950	863	//
951	864	// <--------| +--[S3]--|
952	865	// +--[S1]--|-|--------+-->
953	866	case 3:
954		output1 = calculate_1op_fm_1(chip, slot1);
	867	output1 = calculate_1op_fm_1(slot1);
955	868	phase_mod = output1;
956		output2 = calculate_1op_fm_0(chip, slot2, phase_mod);
	869	output2 = calculate_1op_fm_0(slot2, phase_mod);
957	870	break;
958	871	}
959	872
960		*mixp++ += ((output1 * channel_attenuation[chip->slots[slot1].ch0_level]) +
961		(output2 * channel_attenuation[chip->slots[slot2].ch0_level])) >> 16;
962		*mixp++ += ((output1 * channel_attenuation[chip->slots[slot1].ch1_level]) +
963		(output2 * channel_attenuation[chip->slots[slot2].ch1_level])) >> 16;
	873	*mixp++ += ((output1 * channel_attenuation[m_slots[slot1].ch0_level]) +
	874	(output2 * channel_attenuation[m_slots[slot2].ch0_level])) >> 16;
	875	*mixp++ += ((output1 * channel_attenuation[m_slots[slot1].ch1_level]) +
	876	(output2 * channel_attenuation[m_slots[slot2].ch1_level])) >> 16;
964	877	}
965	878	}
966	879	}
r22737	r22738
974	887	int slot3 = j + (2*12);
975	888	mixp = &mix[0];
976	889
977		if (chip->slots[slot1].active)
	890	if (m_slots[slot1].active)
978	891	{
979	892	for (i = 0; i < samples; i++)
980	893	{
981	894	INT64 output1 = 0, output2 = 0, output3 = 0, phase_mod = 0;
982		switch (chip->slots[slot1].algorithm & 7)
	895	switch (m_slots[slot1].algorithm & 7)
983	896	{
984	897	// <--------|
985	898	// +--[S1]--+--[S3]--+--[S2]-->
986	899	case 0:
987		phase_mod = calculate_2op_fm_0(chip, slot1, slot3);
988		output2 = calculate_1op_fm_0(chip, slot2, phase_mod);
	900	phase_mod = calculate_2op_fm_0(slot1, slot3);
	901	output2 = calculate_1op_fm_0(slot2, phase_mod);
989	902	break;
990	903
991	904	// <-----------------|
992	905	// +--[S1]--+--[S3]--+--[S2]-->
993	906	case 1:
994		phase_mod = calculate_2op_fm_1(chip, slot1, slot3);
995		output2 = calculate_1op_fm_0(chip, slot2, phase_mod);
	907	phase_mod = calculate_2op_fm_1(slot1, slot3);
	908	output2 = calculate_1op_fm_0(slot2, phase_mod);
996	909	break;
997	910
998	911	// ---[S3]-----|
999	912	// <--------|  |
1000	913	// +--[S1]--+--+--[S2]-->
1001	914	case 2:
1002		phase_mod = (calculate_1op_fm_1(chip, slot1) + calculate_1op_fm_0(chip, slot3, 0)) / 2;
1003		output2 = calculate_1op_fm_0(chip, slot2, phase_mod);
	915	phase_mod = (calculate_1op_fm_1(slot1) + calculate_1op_fm_0(slot3, 0)) / 2;
	916	output2 = calculate_1op_fm_0(slot2, phase_mod);
1004	917	break;
1005	918
1006	919	// ---[S3]--+--[S2]--|
1007	920	// <--------|        |
1008	921	// +--[S1]--|--------+-->
1009	922	case 3:
1010		phase_mod = calculate_1op_fm_0(chip, slot3, 0);
1011		output2 = calculate_1op_fm_0(chip, slot2, phase_mod);
1012		output1 = calculate_1op_fm_1(chip, slot1);
	923	phase_mod = calculate_1op_fm_0(slot3, 0);
	924	output2 = calculate_1op_fm_0(slot2, phase_mod);
	925	output1 = calculate_1op_fm_1(slot1);
1013	926	break;
1014	927
1015	928	// ------------[S2]--|
1016	929	// <--------|        |
1017	930	// +--[S1]--+--[S3]--+-->
1018	931	case 4:
1019		output3 = calculate_2op_fm_0(chip, slot1, slot3);
1020		output2 = calculate_1op_fm_0(chip, slot2, 0);
	932	output3 = calculate_2op_fm_0(slot1, slot3);
	933	output2 = calculate_1op_fm_0(slot2, 0);
1021	934	break;
1022	935
1023	936	// ------------[S2]--|
1024	937	// <-----------------|
1025	938	// +--[S1]--+--[S3]--+-->
1026	939	case 5:
1027		output3 = calculate_2op_fm_1(chip, slot1, slot3);
1028		output2 = calculate_1op_fm_0(chip, slot2, 0);
	940	output3 = calculate_2op_fm_1(slot1, slot3);
	941	output2 = calculate_1op_fm_0(slot2, 0);
1029	942	break;
1030	943
1031	944	// ---[S2]-----|
r22737	r22738
1033	946	// <--------|  |
1034	947	// +--[S1]--+--+-->
1035	948	case 6:
1036		output1 = calculate_1op_fm_1(chip, slot1);
1037		output3 = calculate_1op_fm_0(chip, slot3, 0);
1038		output2 = calculate_1op_fm_0(chip, slot2, 0);
	949	output1 = calculate_1op_fm_1(slot1);
	950	output3 = calculate_1op_fm_0(slot3, 0);
	951	output2 = calculate_1op_fm_0(slot2, 0);
1039	952	break;
1040	953
1041	954	// --------------[S2]--+
1042	955	// <--------| +--[S3]--|
1043	956	// +--[S1]--+-|--------+-->
1044	957	case 7:
1045		output1 = calculate_1op_fm_1(chip, slot1);
	958	output1 = calculate_1op_fm_1(slot1);
1046	959	phase_mod = output1;
1047		output3 = calculate_1op_fm_0(chip, slot3, phase_mod);
1048		output2 = calculate_1op_fm_0(chip, slot2, 0);
	960	output3 = calculate_1op_fm_0(slot3, phase_mod);
	961	output2 = calculate_1op_fm_0(slot2, 0);
1049	962	break;
1050	963	}
1051	964
1052		*mixp++ += ((output1 * channel_attenuation[chip->slots[slot1].ch0_level]) +
1053		(output2 * channel_attenuation[chip->slots[slot2].ch0_level]) +
1054		(output3 * channel_attenuation[chip->slots[slot3].ch0_level])) >> 16;
1055		*mixp++ += ((output1 * channel_attenuation[chip->slots[slot1].ch1_level]) +
1056		(output2 * channel_attenuation[chip->slots[slot2].ch1_level]) +
1057		(output3 * channel_attenuation[chip->slots[slot3].ch1_level])) >> 16;
	965	*mixp++ += ((output1 * channel_attenuation[m_slots[slot1].ch0_level]) +
	966	(output2 * channel_attenuation[m_slots[slot2].ch0_level]) +
	967	(output3 * channel_attenuation[m_slots[slot3].ch0_level])) >> 16;
	968	*mixp++ += ((output1 * channel_attenuation[m_slots[slot1].ch1_level]) +
	969	(output2 * channel_attenuation[m_slots[slot2].ch1_level]) +
	970	(output3 * channel_attenuation[m_slots[slot3].ch1_level])) >> 16;
1058	971	}
1059	972	}
1060	973
1061		update_pcm(chip, j + (3*12), mixp, samples);
	974	update_pcm(j + (3*12), mixp, samples);
1062	975	break;
1063	976	}
1064	977
1065	978	case 3:     // PCM
1066	979	{
1067		update_pcm(chip, j + (0*12), mixp, samples);
1068		update_pcm(chip, j + (1*12), mixp, samples);
1069		update_pcm(chip, j + (2*12), mixp, samples);
1070		update_pcm(chip, j + (3*12), mixp, samples);
	980	update_pcm(j + (0*12), mixp, samples);
	981	update_pcm(j + (1*12), mixp, samples);
	982	update_pcm(j + (2*12), mixp, samples);
	983	update_pcm(j + (3*12), mixp, samples);
1071	984	break;
1072	985	}
1073	986
r22737	r22738
1083	996	}
1084	997	}
1085	998
1086		static void write_register(YMF271Chip *chip, int slotnum, int reg, int data)
	999	void ymf271_device::write_register(int slotnum, int reg, int data)
1087	1000	{
1088		YMF271Slot *slot = &chip->slots[slotnum];
	1001	YMF271Slot *slot = &m_slots[slotnum];
1089	1002
1090	1003	switch (reg)
1091	1004	{
r22737	r22738
1218	1131	}
1219	1132	}
1220	1133
1221		static void ymf271_write_fm(YMF271Chip *chip, int grp, int adr, int data)
	1134	void ymf271_device::ymf271_write_fm(int grp, int adr, int data)
1222	1135	{
1223	1136	int reg;
1224	1137	//int slotnum;
r22737	r22738
1228	1141
1229	1142	//slotnum = 12*grp;
1230	1143	//slotnum += fm_tab[adr & 0xf];
1231		//slot = &chip->slots[slotnum];
	1144	//slot = &m_slots[slotnum];
1232	1145	slot_group = fm_tab[adr & 0xf];
1233	1146
1234	1147	reg = (adr >> 4) & 0xf;
r22737	r22738
1252	1165
1253	1166	// check if the slot is key on slot for synchronizing
1254	1167	sync_mode = 0;
1255		switch (chip->groups[slot_group].sync)
	1168	switch (m_groups[slot_group].sync)
1256	1169	{
1257	1170	case 0:     // 4 slot mode
1258	1171	{
r22737	r22738
1279	1192
1280	1193	if (sync_mode && sync_reg)      // key-on slot & synced register
1281	1194	{
1282		switch (chip->groups[slot_group].sync)
	1195	switch (m_groups[slot_group].sync)
1283	1196	{
1284	1197	case 0:     // 4 slot mode
1285	1198	{
1286		write_register(chip, (12 * 0) + slot_group, reg, data);
1287		write_register(chip, (12 * 1) + slot_group, reg, data);
1288		write_register(chip, (12 * 2) + slot_group, reg, data);
1289		write_register(chip, (12 * 3) + slot_group, reg, data);
	1199	write_register((12 * 0) + slot_group, reg, data);
	1200	write_register((12 * 1) + slot_group, reg, data);
	1201	write_register((12 * 2) + slot_group, reg, data);
	1202	write_register((12 * 3) + slot_group, reg, data);
1290	1203	break;
1291	1204	}
1292	1205	case 1:     // 2x 2 slot mode
1293	1206	{
1294	1207	if (grp == 0)       // Slot 1 - Slot 3
1295	1208	{
1296		write_register(chip, (12 * 0) + slot_group, reg, data);
1297		write_register(chip, (12 * 2) + slot_group, reg, data);
	1209	write_register((12 * 0) + slot_group, reg, data);
	1210	write_register((12 * 2) + slot_group, reg, data);
1298	1211	}
1299	1212	else                // Slot 2 - Slot 4
1300	1213	{
1301		write_register(chip, (12 * 1) + slot_group, reg, data);
1302		write_register(chip, (12 * 3) + slot_group, reg, data);
	1214	write_register((12 * 1) + slot_group, reg, data);
	1215	write_register((12 * 3) + slot_group, reg, data);
1303	1216	}
1304	1217	break;
1305	1218	}
1306	1219	case 2:     // 3 slot + 1 slot mode
1307	1220	{
1308	1221	// 1 slot is handled normally
1309		write_register(chip, (12 * 0) + slot_group, reg, data);
1310		write_register(chip, (12 * 1) + slot_group, reg, data);
1311		write_register(chip, (12 * 2) + slot_group, reg, data);
	1222	write_register((12 * 0) + slot_group, reg, data);
	1223	write_register((12 * 1) + slot_group, reg, data);
	1224	write_register((12 * 2) + slot_group, reg, data);
1312	1225	break;
1313	1226	}
1314	1227	default:
r22737	r22738
1317	1230	}
1318	1231	else        // write register normally
1319	1232	{
1320		write_register(chip, (12 * grp) + slot_group, reg, data);
	1233	write_register((12 * grp) + slot_group, reg, data);
1321	1234	}
1322	1235	}
1323	1236
1324		static void ymf271_write_pcm(YMF271Chip *chip, int data)
	1237	void ymf271_device::ymf271_write_pcm(int data)
1325	1238	{
1326	1239	int slotnum;
1327	1240	YMF271Slot *slot;
1328	1241
1329		slotnum = pcm_tab[chip->pcmreg&0xf];
1330		slot = &chip->slots[slotnum];
	1242	slotnum = pcm_tab[m_pcmreg&0xf];
	1243	slot = &m_slots[slotnum];
1331	1244
1332		switch ((chip->pcmreg>>4)&0xf)
	1245	switch ((m_pcmreg>>4)&0xf)
1333	1246	{
1334	1247	case 0:
1335	1248	slot->startaddr &= ~0xff;
r22737	r22738
1376	1289	}
1377	1290	}
1378	1291
1379		static TIMER_CALLBACK( ymf271_timer_a_tick )
	1292	void ymf271_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
1380	1293	{
1381		YMF271Chip *chip = (YMF271Chip *)ptr;
1382
1383		chip->status |= 1;
1384
1385		if (chip->enable & 4)
	1294	switch(id)
1386	1295	{
1387		chip->irqstate |= 1;
1388		if (!chip->irq_callback.isnull()) chip->irq_callback(1);
1389		}
1390		}
	1296	case 0:
	1297	m_status |= 1;
1391	1298
1392		static TIMER_CALLBACK( ymf271_timer_b_tick )
1393		{
1394		YMF271Chip *chip = (YMF271Chip *)ptr;
	1299	if (m_enable & 4)
	1300	{
	1301	m_irqstate |= 1;
	1302	if (!m_irq_handler.isnull()) m_irq_handler(1);
	1303	}
	1304	break;
1395	1305
1396		chip->status |= 2;
	1306	case 1:
	1307	m_status |= 2;
1397	1308
1398		if (chip->enable & 8)
1399		{
1400		chip->irqstate |= 2;
1401		if (!chip->irq_callback.isnull()) chip->irq_callback(1);
	1309	if (m_enable & 8)
	1310	{
	1311	m_irqstate |= 2;
	1312	if (!m_irq_handler.isnull()) m_irq_handler(1);
	1313	}
	1314	break;
1402	1315	}
1403	1316	}
1404	1317
1405		static UINT8 ymf271_read_ext_memory(YMF271Chip *chip, UINT32 address)
	1318	UINT8 ymf271_device::ymf271_read_ext_memory(UINT32 address)
1406	1319	{
1407		if( !chip->ext_mem_read.isnull() )
	1320	if( !m_ext_read_handler.isnull() )
1408	1321	{
1409		return chip->ext_mem_read(address);
	1322	return m_ext_read_handler(address);
1410	1323	}
1411	1324	else
1412	1325	{
1413	1326	if( address < 0x800000)
1414		return chip->rom[address];
	1327	return m_rom[address];
1415	1328	}
1416	1329	return 0xff;
1417	1330	}
1418	1331
1419		static void ymf271_write_ext_memory(YMF271Chip *chip, UINT32 address, UINT8 data)
	1332	void ymf271_device::ymf271_write_ext_memory(UINT32 address, UINT8 data)
1420	1333	{
1421		chip->ext_mem_write(address, data);
	1334	if( !m_ext_write_handler.isnull() )
	1335	{
	1336	m_ext_write_handler(address, data);
	1337	}
1422	1338	}
1423	1339
1424		static void ymf271_write_timer(YMF271Chip *chip, int data)
	1340	void ymf271_device::ymf271_write_timer(int data)
1425	1341	{
1426	1342	int slotnum;
1427	1343	YMF271Group *group;
1428	1344	attotime period;
1429	1345
1430		slotnum = fm_tab[chip->timerreg & 0xf];
1431		group = &chip->groups[slotnum];
	1346	slotnum = fm_tab[m_timerreg & 0xf];
	1347	group = &m_groups[slotnum];
1432	1348
1433		if ((chip->timerreg & 0xf0) == 0)
	1349	if ((m_timerreg & 0xf0) == 0)
1434	1350	{
1435	1351	group->sync = data & 0x3;
1436	1352	group->pfm = data >> 7;
1437	1353	}
1438	1354	else
1439	1355	{
1440		switch (chip->timerreg)
	1356	switch (m_timerreg)
1441	1357	{
1442	1358	case 0x10:
1443		chip->timerA &= ~0xff;
1444		chip->timerA |= data;
	1359	m_timerA &= ~0xff;
	1360	m_timerA |= data;
1445	1361	break;
1446	1362
1447	1363	case 0x11:
1448	1364	if (!(data & 0xfc))
1449	1365	{
1450		chip->timerA &= 0x00ff;
	1366	m_timerA &= 0x00ff;
1451	1367	if ((data & 0x3) != 0x3)
1452	1368	{
1453		chip->timerA |= (data & 0xff)<<8;
	1369	m_timerA |= (data & 0xff)<<8;
1454	1370	}
1455	1371	}
1456	1372	break;
1457	1373
1458	1374	case 0x12:
1459		chip->timerB = data;
	1375	m_timerB = data;
1460	1376	break;
1461	1377
1462	1378	case 0x13:
1463	1379	if (data & 1)
1464	1380	{   // timer A load
1465		chip->timerAVal = chip->timerA;
	1381	m_timerAVal = m_timerA;
1466	1382	}
1467	1383	if (data & 2)
1468	1384	{   // timer B load
1469		chip->timerBVal = chip->timerB;
	1385	m_timerBVal = m_timerB;
1470	1386	}
1471	1387	if (data & 4)
1472	1388	{
1473	1389	// timer A IRQ enable
1474		chip->enable |= 4;
	1390	m_enable |= 4;
1475	1391	}
1476	1392	if (data & 8)
1477	1393	{
1478	1394	// timer B IRQ enable
1479		chip->enable |= 8;
	1395	m_enable |= 8;
1480	1396	}
1481	1397	if (data & 0x10)
1482	1398	{   // timer A reset
1483		chip->irqstate &= ~1;
1484		chip->status &= ~1;
1485		chip->timerAVal |= 0x300;
	1399	m_irqstate &= ~1;
	1400	m_status &= ~1;
	1401	m_timerAVal |= 0x300;
1486	1402
1487		if (!chip->irq_callback.isnull()) chip->irq_callback(0);
	1403	if (!m_irq_handler.isnull()) m_irq_handler(0);
1488	1404
1489		period = attotime::from_hz(chip->clock) * (384 * 4 * (1024 - chip->timerAVal));
	1405	period = attotime::from_hz(m_clock) * (384 * 4 * (1024 - m_timerAVal));
1490	1406
1491		chip->timA->adjust(period, 0, period);
	1407	m_timA->adjust(period, 0, period);
1492	1408	}
1493	1409	if (data & 0x20)
1494	1410	{   // timer B reset
1495		chip->irqstate &= ~2;
1496		chip->status &= ~2;
	1411	m_irqstate &= ~2;
	1412	m_status &= ~2;
1497	1413
1498		if (!chip->irq_callback.isnull()) chip->irq_callback(0);
	1414	if (!m_irq_handler.isnull()) m_irq_handler(0);
1499	1415
1500		period = attotime::from_hz(chip->clock) * (384 * 16 * (256 - chip->timerBVal));
	1416	period = attotime::from_hz(m_clock) * (384 * 16 * (256 - m_timerBVal));
1501	1417
1502		chip->timB->adjust(period, 0, period);
	1418	m_timB->adjust(period, 0, period);
1503	1419	}
1504	1420
1505	1421	break;
1506	1422
1507	1423	case 0x14:
1508		chip->ext_address &= ~0xff;
1509		chip->ext_address |= data;
	1424	m_ext_address &= ~0xff;
	1425	m_ext_address |= data;
1510	1426	break;
1511	1427	case 0x15:
1512		chip->ext_address &= ~0xff00;
1513		chip->ext_address |= data << 8;
	1428	m_ext_address &= ~0xff00;
	1429	m_ext_address |= data << 8;
1514	1430	break;
1515	1431	case 0x16:
1516		chip->ext_address &= ~0xff0000;
1517		chip->ext_address |= (data & 0x7f) << 16;
1518		chip->ext_read = (data & 0x80) ? 1 : 0;
1519		if( !chip->ext_read )
1520		chip->ext_address = (chip->ext_address + 1) & 0x7fffff;
	1432	m_ext_address &= ~0xff0000;
	1433	m_ext_address |= (data & 0x7f) << 16;
	1434	m_ext_read = (data & 0x80) ? 1 : 0;
	1435	if( !m_ext_read )
	1436	m_ext_address = (m_ext_address + 1) & 0x7fffff;
1521	1437	break;
1522	1438	case 0x17:
1523		ymf271_write_ext_memory( chip, chip->ext_address, data );
1524		chip->ext_address = (chip->ext_address + 1) & 0x7fffff;
	1439	ymf271_write_ext_memory( m_ext_address, data );
	1440	m_ext_address = (m_ext_address + 1) & 0x7fffff;
1525	1441	break;
1526	1442	}
1527	1443	}
1528	1444	}
1529	1445
1530		WRITE8_DEVICE_HANDLER( ymf271_w )
	1446	WRITE8_MEMBER( ymf271_device::write )
1531	1447	{
1532		YMF271Chip *chip = get_safe_token(device);
1533
1534	1448	switch (offset)
1535	1449	{
1536	1450	case 0:
1537		chip->reg0 = data;
	1451	m_reg0 = data;
1538	1452	break;
1539	1453	case 1:
1540		ymf271_write_fm(chip, 0, chip->reg0, data);
	1454	ymf271_write_fm(0, m_reg0, data);
1541	1455	break;
1542	1456	case 2:
1543		chip->reg1 = data;
	1457	m_reg1 = data;
1544	1458	break;
1545	1459	case 3:
1546		ymf271_write_fm(chip, 1, chip->reg1, data);
	1460	ymf271_write_fm(1, m_reg1, data);
1547	1461	break;
1548	1462	case 4:
1549		chip->reg2 = data;
	1463	m_reg2 = data;
1550	1464	break;
1551	1465	case 5:
1552		ymf271_write_fm(chip, 2, chip->reg2, data);
	1466	ymf271_write_fm(2, m_reg2, data);
1553	1467	break;
1554	1468	case 6:
1555		chip->reg3 = data;
	1469	m_reg3 = data;
1556	1470	break;
1557	1471	case 7:
1558		ymf271_write_fm(chip, 3, chip->reg3, data);
	1472	ymf271_write_fm(3, m_reg3, data);
1559	1473	break;
1560	1474	case 8:
1561		chip->pcmreg = data;
	1475	m_pcmreg = data;
1562	1476	break;
1563	1477	case 9:
1564		ymf271_write_pcm(chip, data);
	1478	ymf271_write_pcm(data);
1565	1479	break;
1566	1480	case 0xc:
1567		chip->timerreg = data;
	1481	m_timerreg = data;
1568	1482	break;
1569	1483	case 0xd:
1570		ymf271_write_timer(chip, data);
	1484	ymf271_write_timer(data);
1571	1485	break;
1572	1486	}
1573	1487	}
1574	1488
1575		READ8_DEVICE_HANDLER( ymf271_r )
	1489	READ8_MEMBER( ymf271_device::read )
1576	1490	{
1577	1491	UINT8 value;
1578		YMF271Chip *chip = get_safe_token(device);
1579	1492
1580	1493	switch(offset)
1581	1494	{
1582	1495	case 0:
1583		return chip->status;
	1496	return m_status;
1584	1497
1585	1498	case 2:
1586		value = ymf271_read_ext_memory( chip, chip->ext_address );
1587		chip->ext_address = (chip->ext_address + 1) & 0x7fffff;
	1499	value = ymf271_read_ext_memory( m_ext_address );
	1500	m_ext_address = (m_ext_address + 1) & 0x7fffff;
1588	1501	return value;
1589	1502	}
1590	1503
r22737	r22738
1677	1590	}
1678	1591	}
1679	1592
1680		static void init_state(YMF271Chip *chip, device_t *device)
	1593	void ymf271_device::init_state()
1681	1594	{
1682	1595	int i;
1683	1596
1684		for (i = 0; i < ARRAY_LENGTH(chip->slots); i++)
	1597	for (i = 0; i < ARRAY_LENGTH(m_slots); i++)
1685	1598	{
1686		device->save_item(NAME(chip->slots[i].extout), i);
1687		device->save_item(NAME(chip->slots[i].lfoFreq), i);
1688		device->save_item(NAME(chip->slots[i].pms), i);
1689		device->save_item(NAME(chip->slots[i].ams), i);
1690		device->save_item(NAME(chip->slots[i].detune), i);
1691		device->save_item(NAME(chip->slots[i].multiple), i);
1692		device->save_item(NAME(chip->slots[i].tl), i);
1693		device->save_item(NAME(chip->slots[i].keyscale), i);
1694		device->save_item(NAME(chip->slots[i].ar), i);
1695		device->save_item(NAME(chip->slots[i].decay1rate), i);
1696		device->save_item(NAME(chip->slots[i].decay2rate), i);
1697		device->save_item(NAME(chip->slots[i].decay1lvl), i);
1698		device->save_item(NAME(chip->slots[i].relrate), i);
1699		device->save_item(NAME(chip->slots[i].fns), i);
1700		device->save_item(NAME(chip->slots[i].block), i);
1701		device->save_item(NAME(chip->slots[i].feedback), i);
1702		device->save_item(NAME(chip->slots[i].waveform), i);
1703		device->save_item(NAME(chip->slots[i].accon), i);
1704		device->save_item(NAME(chip->slots[i].algorithm), i);
1705		device->save_item(NAME(chip->slots[i].ch0_level), i);
1706		device->save_item(NAME(chip->slots[i].ch1_level), i);
1707		device->save_item(NAME(chip->slots[i].ch2_level), i);
1708		device->save_item(NAME(chip->slots[i].ch3_level), i);
1709		device->save_item(NAME(chip->slots[i].startaddr), i);
1710		device->save_item(NAME(chip->slots[i].loopaddr), i);
1711		device->save_item(NAME(chip->slots[i].endaddr), i);
1712		device->save_item(NAME(chip->slots[i].fs), i);
1713		device->save_item(NAME(chip->slots[i].srcnote), i);
1714		device->save_item(NAME(chip->slots[i].srcb), i);
1715		device->save_item(NAME(chip->slots[i].step), i);
1716		device->save_item(NAME(chip->slots[i].stepptr), i);
1717		device->save_item(NAME(chip->slots[i].active), i);
1718		device->save_item(NAME(chip->slots[i].bits), i);
1719		device->save_item(NAME(chip->slots[i].volume), i);
1720		device->save_item(NAME(chip->slots[i].env_state), i);
1721		device->save_item(NAME(chip->slots[i].env_attack_step), i);
1722		device->save_item(NAME(chip->slots[i].env_decay1_step), i);
1723		device->save_item(NAME(chip->slots[i].env_decay2_step), i);
1724		device->save_item(NAME(chip->slots[i].env_release_step), i);
1725		device->save_item(NAME(chip->slots[i].feedback_modulation0), i);
1726		device->save_item(NAME(chip->slots[i].feedback_modulation1), i);
1727		device->save_item(NAME(chip->slots[i].lfo_phase), i);
1728		device->save_item(NAME(chip->slots[i].lfo_step), i);
1729		device->save_item(NAME(chip->slots[i].lfo_amplitude), i);
	1599	save_item(NAME(m_slots[i].extout), i);
	1600	save_item(NAME(m_slots[i].lfoFreq), i);
	1601	save_item(NAME(m_slots[i].pms), i);
	1602	save_item(NAME(m_slots[i].ams), i);
	1603	save_item(NAME(m_slots[i].detune), i);
	1604	save_item(NAME(m_slots[i].multiple), i);
	1605	save_item(NAME(m_slots[i].tl), i);
	1606	save_item(NAME(m_slots[i].keyscale), i);
	1607	save_item(NAME(m_slots[i].ar), i);
	1608	save_item(NAME(m_slots[i].decay1rate), i);
	1609	save_item(NAME(m_slots[i].decay2rate), i);
	1610	save_item(NAME(m_slots[i].decay1lvl), i);
	1611	save_item(NAME(m_slots[i].relrate), i);
	1612	save_item(NAME(m_slots[i].fns), i);
	1613	save_item(NAME(m_slots[i].block), i);
	1614	save_item(NAME(m_slots[i].feedback), i);
	1615	save_item(NAME(m_slots[i].waveform), i);
	1616	save_item(NAME(m_slots[i].accon), i);
	1617	save_item(NAME(m_slots[i].algorithm), i);
	1618	save_item(NAME(m_slots[i].ch0_level), i);
	1619	save_item(NAME(m_slots[i].ch1_level), i);
	1620	save_item(NAME(m_slots[i].ch2_level), i);
	1621	save_item(NAME(m_slots[i].ch3_level), i);
	1622	save_item(NAME(m_slots[i].startaddr), i);
	1623	save_item(NAME(m_slots[i].loopaddr), i);
	1624	save_item(NAME(m_slots[i].endaddr), i);
	1625	save_item(NAME(m_slots[i].fs), i);
	1626	save_item(NAME(m_slots[i].srcnote), i);
	1627	save_item(NAME(m_slots[i].srcb), i);
	1628	save_item(NAME(m_slots[i].step), i);
	1629	save_item(NAME(m_slots[i].stepptr), i);
	1630	save_item(NAME(m_slots[i].active), i);
	1631	save_item(NAME(m_slots[i].bits), i);
	1632	save_item(NAME(m_slots[i].volume), i);
	1633	save_item(NAME(m_slots[i].env_state), i);
	1634	save_item(NAME(m_slots[i].env_attack_step), i);
	1635	save_item(NAME(m_slots[i].env_decay1_step), i);
	1636	save_item(NAME(m_slots[i].env_decay2_step), i);
	1637	save_item(NAME(m_slots[i].env_release_step), i);
	1638	save_item(NAME(m_slots[i].feedback_modulation0), i);
	1639	save_item(NAME(m_slots[i].feedback_modulation1), i);
	1640	save_item(NAME(m_slots[i].lfo_phase), i);
	1641	save_item(NAME(m_slots[i].lfo_step), i);
	1642	save_item(NAME(m_slots[i].lfo_amplitude), i);
1730	1643	}
1731	1644
1732		for (i = 0; i < sizeof(chip->groups) / sizeof(chip->groups[0]); i++)
	1645	for (i = 0; i < sizeof(m_groups) / sizeof(m_groups[0]); i++)
1733	1646	{
1734		device->save_item(NAME(chip->groups[i].sync), i);
1735		device->save_item(NAME(chip->groups[i].pfm), i);
	1647	save_item(NAME(m_groups[i].sync), i);
	1648	save_item(NAME(m_groups[i].pfm), i);
1736	1649	}
1737	1650
1738		device->save_item(NAME(chip->timerA));
1739		device->save_item(NAME(chip->timerB));
1740		device->save_item(NAME(chip->timerAVal));
1741		device->save_item(NAME(chip->timerBVal));
1742		device->save_item(NAME(chip->irqstate));
1743		device->save_item(NAME(chip->status));
1744		device->save_item(NAME(chip->enable));
1745		device->save_item(NAME(chip->reg0));
1746		device->save_item(NAME(chip->reg1));
1747		device->save_item(NAME(chip->reg2));
1748		device->save_item(NAME(chip->reg3));
1749		device->save_item(NAME(chip->pcmreg));
1750		device->save_item(NAME(chip->timerreg));
1751		device->save_item(NAME(chip->ext_address));
1752		device->save_item(NAME(chip->ext_read));
	1651	save_item(NAME(m_timerA));
	1652	save_item(NAME(m_timerB));
	1653	save_item(NAME(m_timerAVal));
	1654	save_item(NAME(m_timerBVal));
	1655	save_item(NAME(m_irqstate));
	1656	save_item(NAME(m_status));
	1657	save_item(NAME(m_enable));
	1658	save_item(NAME(m_reg0));
	1659	save_item(NAME(m_reg1));
	1660	save_item(NAME(m_reg2));
	1661	save_item(NAME(m_reg3));
	1662	save_item(NAME(m_pcmreg));
	1663	save_item(NAME(m_timerreg));
	1664	save_item(NAME(m_ext_address));
	1665	save_item(NAME(m_ext_read));
1753	1666	}
1754	1667
1755		static void ymf271_init(device_t *device, YMF271Chip *chip, UINT8 *rom, const devcb_write_line *cb, const devcb_read8 *ext_read, const devcb_write8 *ext_write)
	1668	//-------------------------------------------------
	1669	//  device_start - device-specific startup
	1670	//-------------------------------------------------
	1671
	1672	void ymf271_device::device_start()
1756	1673	{
1757		chip->timA = device->machine().scheduler().timer_alloc(FUNC(ymf271_timer_a_tick), chip);
1758		chip->timB = device->machine().scheduler().timer_alloc(FUNC(ymf271_timer_b_tick), chip);
	1674	int i;
1759	1675
1760		chip->rom = rom;
1761		chip->irq_callback.resolve(*cb, *device);
	1676	m_clock = clock();
1762	1677
1763		chip->ext_mem_read.resolve(*ext_read, *device);
1764		chip->ext_mem_write.resolve(*ext_write, *device);
	1678	m_timA = timer_alloc(0);
	1679	m_timB = timer_alloc(1);
1765	1680
1766		init_tables(device->machine());
1767		init_state(chip, device);
1768		}
	1681	m_rom = *region();
	1682	m_irq_handler.resolve();
1769	1683
1770		static DEVICE_START( ymf271 )
1771		{
1772		static const ymf271_interface defintrf = { DEVCB_NULL };
1773		const ymf271_interface *intf;
1774		int i;
1775		YMF271Chip *chip = get_safe_token(device);
	1684	m_ext_read_handler.resolve();
	1685	m_ext_write_handler.resolve();
1776	1686
1777		chip->device = device;
1778		chip->clock = device->clock();
	1687	init_tables(machine());
	1688	init_state();
1779	1689
1780		intf = (device->static_config() != NULL) ? (const ymf271_interface *)device->static_config() : &defintrf;
	1690	m_stream = machine().sound().stream_alloc(*this, 0, 2, clock()/384);
1781	1691
1782		ymf271_init(device, chip, *device->region(), &intf->irq_callback, &intf->ext_read, &intf->ext_write);
1783		chip->stream = device->machine().sound().stream_alloc(*device, 0, 2, device->clock()/384, chip, ymf271_update);
1784
1785	1692	for (i = 0; i < 256; i++)
1786	1693	{
1787	1694	env_volume_table[i] = (int)(65536.0 / pow(10.0, ((double)i / (256.0 / 96.0)) / 20.0));
r22737	r22738
1798	1705	}
1799	1706	}
1800	1707
1801		static DEVICE_RESET( ymf271 )
	1708	//-------------------------------------------------
	1709	//  device_reset - device-specific reset
	1710	//-------------------------------------------------
	1711
	1712	void ymf271_device::device_reset()
1802	1713	{
1803	1714	int i;
1804		YMF271Chip *chip = get_safe_token(device);
1805	1715
1806	1716	for (i = 0; i < 48; i++)
1807	1717	{
1808		chip->slots[i].active = 0;
1809		chip->slots[i].volume = 0;
	1718	m_slots[i].active = 0;
	1719	m_slots[i].volume = 0;
1810	1720	}
1811	1721	}
1812	1722
r22737	r22738
1814	1724
1815	1725	ymf271_device::ymf271_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
1816	1726	: device_t(mconfig, YMF271, "YMF271", tag, owner, clock),
1817		device_sound_interface(mconfig, *this)
	1727	device_sound_interface(mconfig, *this),
	1728	m_irq_handler(*this),
	1729	m_ext_read_handler(*this),
	1730	m_ext_write_handler(*this)
1818	1731	{
1819		m_token = global_alloc_clear(YMF271Chip);
1820	1732	}
1821	1733
1822	1734	//-------------------------------------------------
r22737	r22738
1828	1740	void ymf271_device::device_config_complete()
1829	1741	{
1830	1742	}
1831
1832		//-------------------------------------------------
1833		//  device_start - device-specific startup
1834		//-------------------------------------------------
1835
1836		void ymf271_device::device_start()
1837		{
1838		DEVICE_START_NAME( ymf271 )(this);
1839		}
1840
1841		//-------------------------------------------------
1842		//  device_reset - device-specific reset
1843		//-------------------------------------------------
1844
1845		void ymf271_device::device_reset()
1846		{
1847		DEVICE_RESET_NAME( ymf271 )(this);
1848		}
1849
1850		//-------------------------------------------------
1851		//  sound_stream_update - handle a stream update
1852		//-------------------------------------------------
1853
1854		void ymf271_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
1855		{
1856		// should never get here
1857		fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
1858		}

trunk/src/emu/sound/ymf271.h

r22737	r22738
3	3	#ifndef __YMF271_H__
4	4	#define __YMF271_H__
5	5
6		#include "devlegcy.h"
	6	#include "emu.h"
7	7
	8	#define MCFG_YMF271_IRQ_HANDLER(_devcb) \
	9	devcb = &ymf271_device::set_irq_handler(*device, DEVCB2_##_devcb);
8	10
9		struct ymf271_interface
10		{
11		devcb_read8 ext_read;       /* external memory read */
12		devcb_write8 ext_write; /* external memory write */
13		devcb_write_line irq_callback;  /* irq callback */
14		};
	11	#define MCFG_YMF271_EXT_READ_HANDLER(_devcb) \
	12	devcb = &ymf271_device::set_ext_read_handler(*device, DEVCB2_##_devcb);
15	13
16		DECLARE_READ8_DEVICE_HANDLER( ymf271_r );
17		DECLARE_WRITE8_DEVICE_HANDLER( ymf271_w );
	14	#define MCFG_YMF271_EXT_WRITE_HANDLER(_devcb) \
	15	devcb = &ymf271_device::set_ext_write_handler(*device, DEVCB2_##_devcb);
18	16
19	17	class ymf271_device : public device_t,
20	18	public device_sound_interface
21	19	{
22	20	public:
23	21	ymf271_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
24		~ymf271_device() { global_free(m_token); }
25	22
26		// access to legacy token
27		void *token() const { assert(m_token != NULL); return m_token; }
	23	// static configuration helpers
	24	template<class _Object> static devcb2_base &set_irq_handler(device_t &device, _Object object) { return downcast<ymf271_device &>(device).m_irq_handler.set_callback(object); }
	25	template<class _Object> static devcb2_base &set_ext_read_handler(device_t &device, _Object object) { return downcast<ymf271_device &>(device).m_ext_read_handler.set_callback(object); }
	26	template<class _Object> static devcb2_base &set_ext_write_handler(device_t &device, _Object object) { return downcast<ymf271_device &>(device).m_ext_write_handler.set_callback(object); }
	27
	28	DECLARE_READ8_MEMBER( read );
	29	DECLARE_WRITE8_MEMBER( write );
	30
28	31	protected:
29	32	// device-level overrides
30	33	virtual void device_config_complete();
31	34	virtual void device_start();
32	35	virtual void device_reset();
	36	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
33	37
34	38	// sound stream update overrides
35	39	virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
36	40	private:
	41	struct YMF271Slot
	42	{
	43	INT8  extout;
	44	UINT8 lfoFreq;
	45	INT8  lfowave;
	46	INT8  pms, ams;
	47	INT8  detune;
	48	INT8  multiple;
	49	INT8  tl;
	50	INT8  keyscale;
	51	INT8  ar;
	52	INT8  decay1rate, decay2rate;
	53	INT8  decay1lvl;
	54	INT8  relrate;
	55	INT32 fns;
	56	INT8  block;
	57	INT8  feedback;
	58	INT8  waveform;
	59	INT8  accon;
	60	INT8  algorithm;
	61	INT8  ch0_level, ch1_level, ch2_level, ch3_level;
	62
	63	UINT32 startaddr;
	64	UINT32 loopaddr;
	65	UINT32 endaddr;
	66	INT8   fs, srcnote, srcb;
	67
	68	INT64 step;
	69	INT64 stepptr;
	70
	71	INT8 active;
	72	INT8 bits;
	73
	74	// envelope generator
	75	INT32 volume;
	76	INT32 env_state;
	77	INT32 env_attack_step;      // volume increase step in attack state
	78	INT32 env_decay1_step;
	79	INT32 env_decay2_step;
	80	INT32 env_release_step;
	81
	82	INT64 feedback_modulation0;
	83	INT64 feedback_modulation1;
	84
	85	INT32 lfo_phase, lfo_step;
	86	INT32 lfo_amplitude;
	87	double lfo_phasemod;
	88	};
	89
	90	struct YMF271Group
	91	{
	92	INT8 sync, pfm;
	93	};
	94
	95	void init_state();
	96	void calculate_step(YMF271Slot *slot);
	97	void update_envelope(YMF271Slot *slot);
	98	void init_envelope(YMF271Slot *slot);
	99	void init_lfo(YMF271Slot *slot);
	100	void update_lfo(YMF271Slot *slot);
	101	int calculate_slot_volume(YMF271Slot *slot);
	102	void update_pcm(int slotnum, INT32 *mixp, int length);
	103	INT32 calculate_2op_fm_0(int slotnum1, int slotnum2);
	104	INT32 calculate_2op_fm_1(int slotnum1, int slotnum2);
	105	INT32 calculate_1op_fm_0(int slotnum, int phase_modulation);
	106	INT32 calculate_1op_fm_1(int slotnum);
	107	void write_register(int slotnum, int reg, int data);
	108	void ymf271_write_fm(int grp, int adr, int data);
	109	void ymf271_write_pcm(int data);
	110	UINT8 ymf271_read_ext_memory(UINT32 address);
	111	void ymf271_write_ext_memory(UINT32 address, UINT8 data);
	112	void ymf271_write_timer(int data);
	113
37	114	// internal state
38		void *m_token;
	115	YMF271Slot m_slots[48];
	116	YMF271Group m_groups[12];
	117
	118	INT32 m_timerA, m_timerB;
	119	INT32 m_timerAVal, m_timerBVal;
	120	INT32 m_irqstate;
	121	INT8  m_status;
	122	INT8  m_enable;
	123
	124	emu_timer *m_timA, *m_timB;
	125
	126	INT8  m_reg0, m_reg1, m_reg2, m_reg3, m_pcmreg, m_timerreg;
	127	UINT32 m_ext_address;
	128	UINT8 m_ext_read;
	129
	130	const UINT8 *m_rom;
	131	devcb2_write_line m_irq_handler;
	132	devcb2_read8 m_ext_read_handler;
	133	devcb2_write8 m_ext_write_handler;
	134
	135	UINT32 m_clock;
	136	sound_stream * m_stream;
39	137	};
40	138
41	139	extern const device_type YMF271;

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