trunk/src/mame/drivers/gluck2.c
| r0 | r22571 | |
|---|
| 1 | /****************************************************************************** |
| 2 | |
| 3 | Good Luck II |
| 4 | Yung Yu / CYE, 1992. |
| 5 | |
| 6 | |
| 7 | Driver by Roberto Fresca. |
| 8 | |
| 9 | |
| 10 | Hardware based on Golden Poker / Cal Omega, but with a lot of improvements... |
| 11 | |
| 12 | |
| 13 | ******************************************************************************* |
| 14 | |
| 15 | |
| 16 | *** Hardware notes *** |
| 17 | |
| 18 | - CPU: 1x 6502 (U8). Empty socket. |
| 19 | |
| 20 | - CRTC: 1x HD6845SP (U13) |
| 21 | |
| 22 | - RAM: 2x 6116. 2K*8 SRAM. (U6, U17). Empty sockets. |
| 23 | |
| 24 | - ROMs: 1x ST27C512 (U7) |
| 25 | 3x M27C256 (U31, U32, U33) |
| 26 | |
| 27 | - PROMs: 3x Bipolar PROMs (U25, U26, U27) |
| 28 | |
| 29 | - CLK: 1x crystal @ 10.000 MHz. (for CPU clock) |
| 30 | 1x crystal @ 3.5795 MHz. (for sound circuitry) |
| 31 | |
| 32 | - SOUND: 1x AY-3-8910 (U38) |
| 33 | 1x UM3567 (clone of Yamaha YM2413) (U36) |
| 34 | 1x 2904D JRC (Dual Operational Amplifier) (U40) |
| 35 | |
| 36 | |
| 37 | Other components: |
| 38 | |
| 39 | - 1x battery (not present) |
| 40 | - 1x switch (S1) |
| 41 | - 3x 8 DIP switches banks (DIP1, DIP2, DIP3) |
| 42 | - 1x 10x2 edge connector. |
| 43 | - 1x 22x2 edge connector. |
| 44 | |
| 45 | PCB silkscreened: "YUNGYU" "920210" "Made in Taiwan" |
| 46 | also has a chinese copyright string silkscreened backwards... |
| 47 | |
| 48 | Original stickers from CYE (Chang Yu Electronic Company) in PCB and ROMs. |
| 49 | |
| 50 | |
| 51 | PCB Layout: |
| 52 | |
| 53 | .----------------------------------------------------------------------------------------------. |
| 54 | | U12 U8 U2 BT1 | |
| 55 | | .-------------------------. .-------------------------. .----------. .-------. | |
| 56 | | | | | | | ???? | | | | |
| 57 | | | HD6845SP | | 6502 (empty socket) | '----------' |BATTERY| .---' |
| 58 | | | | | | X1 | | | |
| 59 | | '-------------------------' '-------------------------'.------. '-------' | |
| 60 | | U18 U14 U7 |10MHz.| .-----. | |
| 61 | | .------------. .----------. .------------------. '------' | | | |
| 62 | | | 74LS245B | |HD74LS157P| |4CYE | | SW1 ===O '---. |
| 63 | | '------------' '----------' | ST27C512 | | | ---| |
| 64 | | U17 | | '-----' ---| |
| 65 | | .----------------. '------------------' ---| |
| 66 | | | 6116 | U15 U6 U3 ---| |
| 67 | ! | (empty socket) | .----------. .----------------. .----------. ---| |
| 68 | | | | |HD74LS157P| | 6116 | | 74HC04AP | ---| |
| 69 | | '----------------' '----------' | (empty socket) | '----------' ---| |
| 70 | | U16 | | U46 ---| |
| 71 | | .----------. '----------------' .----------. ---| |
| 72 | | |HD74LS157P| | 74LS08? | .---' |
| 73 | | '----------' '----------' | |
| 74 | | U21 U9 U5 U45 | |
| 75 | | .------------. .----------. .----------------. .----------. | |
| 76 | | | SN74S86N | |HD74LS08P | | GAL22V16? | |SN74LS273N| | |
| 77 | | '------------' '----------' '----------------' '----------' | |
| 78 | | U20 U10 U4 U44 | |
| 79 | | .------------. .----------. .--------------. .----------. '---. |
| 80 | | | ??? | |HD74LS32P | | ???? | |HD74LS244P| ---| |
| 81 | | '------------' '----------' '--------------' '----------' ---| |
| 82 | | U1 U22 U11 U43 ---| |
| 83 | | .------------. .----------. .------------. .----------. ---| |
| 84 | | | ??? | |HD74LS04P | | BU74HC00 | |T74LS245B1| ---| |
| 85 | | '------------' '----------' '------------' '----------' ---| |
| 86 | | U24 U47 U35 U42 ---| |
| 87 | | .------------. .----------. .------------. .----------. ---| |
| 88 | | | GD74LS174 | | HD74LS02 | | GD74LS174 | |T74LS245B1| ---| |
| 89 | | '------------' '----------' '------------' '----------' ---| |
| 90 | | U12 U25 U34 U41 ---| |
| 91 | | .------------. .----------. .------------. .----------. ---| |
| 92 | | | SN74LS273N | | BP? | | GD74LS174 | |T74LS245B1| ---| |
| 93 | | '------------' '----------' '------------' '----------' ---| |
| 94 | | U26 U36 ---| |
| 95 | | .----------. .---------------. ---| |
| 96 | | U33 | BP? | | UM3567 | ---| |
| 97 | | .----------------. '----------' | | ---| |
| 98 | | |3 | U27 | (YM2413) | ---| |
| 99 | | | M27256 | .----------. '---------------' ---| |
| 100 | | | | | BP? | U37 X2 ---| |
| 101 | | '----------------' '----------' .----------. .------. .---' |
| 102 | | U32 U30 |T74LS245B1| |3.5795| | |
| 103 | | .----------------. .----------. '----------' | MHz. | U40 | |
| 104 | | |2 | |GD74LS166 | '------' .-----. | |
| 105 | | | M27256 | '----------' U38 |2904D| | |
| 106 | | | | U29 .-------------------------. | JRC | '---. |
| 107 | | '----------------' .----------. | | '-----' | |
| 108 | | U31 |GD74LS166 | | AY-3-8910 (empty socket)| | |
| 109 | | .----------------. '----------' | | | |
| 110 | | |1 | U28 '-------------------------' | |
| 111 | | | M27256 | .----------. DIP3 DIP2 DIP1 | |
| 112 | | | | | ??? | .--------. .--------. .--------. .-||||||||-. | |
| 113 | | '----------------' '----------' |oooooooo| |oooooooo| |oooooooo| .---. | NEC | | |
| 114 | | '--------' '--------' '--------' |VR1| | | | |
| 115 | | '---' '----------' | |
| 116 | '----------------------------------------------------------------------------------------------' |
| 117 | |
| 118 | Need ID: |
| 119 | |
| 120 | U2 - U4 - U5 - U20 - U25 - U26 - U27 - U28 - U43 - U46 - NEC (bottom right) |
| 121 | |
| 122 | |
| 123 | ******************************************************************************* |
| 124 | |
| 125 | |
| 126 | Memory Map |
| 127 | ---------- |
| 128 | |
| 129 | $0000 - $00FF RAM ; Zero page (pointers and registers) (NVRAM). |
| 130 | $0100 - $01FF RAM ; 6502 Stack Pointer. |
| 131 | $0200 - $07FF RAM ; General purpose RAM. |
| 132 | |
| 133 | $0800 - $0801 MC6845 ; MC6845 use $0800 for register addressing and $0801 for register values. |
| 134 | |
| 135 | $0844 - $0847 PIA leftover. ; Code access these offsets like if a PIA 6821 exist there... |
| 136 | $0848 - $084B PIA leftover. ; Code access these offsets like if a PIA 6821 exist there... |
| 137 | |
| 138 | $1000 - $13FF Video RAM. |
| 139 | $1800 - $1BFF Color RAM. |
| 140 | |
| 141 | $2000 - $2000 DIP switches bank #1. |
| 142 | |
| 143 | $2D00 - $2D00 YM2413 Address. |
| 144 | $2D01 - $2D01 YM2413 Register. |
| 145 | |
| 146 | $3400 - $3400 Input Port #1. \ |
| 147 | $3500 - $3500 Input Port #2. | General input system. |
| 148 | $3600 - $3600 Input Port #3. / |
| 149 | |
| 150 | $3700 - $3700 Output Port #1 (coin/note counters). |
| 151 | |
| 152 | $3D00 - $3D00 AY-3-8910 Address. |
| 153 | $3D01 - $3D01 AY-3-8910 Register. |
| 154 | $3D01 - $3D01 AY-3-8910 Read (Ports A & B for DIP switches banks #2 & #3). |
| 155 | |
| 156 | $4000 - $FFFF ROM space. ; Program ROMs. |
| 157 | |
| 158 | |
| 159 | ******************************************************************************* |
| 160 | |
| 161 | Technical Notes... |
| 162 | |
| 163 | The graphics system is composed of 8 graphics banks of 256 tiles each. |
| 164 | Tiles are 3bpp, and the color information is given by 3 bipolar PROMs |
| 165 | (one for each RGB channel). |
| 166 | |
| 167 | There is a AY-3-8910, but only for input port purposes (ports A & B for |
| 168 | DIP switches banks #3 and #2). Is not used as sound device, at least for |
| 169 | Good Luck II. |
| 170 | |
| 171 | There are pieces of code that initialize 2x PIA 6821, that are not included |
| 172 | in the PCB. Seems a leftover. Also the program try to handle a suppossed lamps |
| 173 | system through these 'phantom' PIAs... |
| 174 | |
| 175 | The sound system is through a YM2413, and sound a lot nicer than the former |
| 176 | games from these series, improving the ingame sounds with cool nice short tunes. |
| 177 | |
| 178 | |
| 179 | ******************************************************************************* |
| 180 | |
| 181 | |
| 182 | TODO: |
| 183 | |
| 184 | - Figure out the remaining DIP switches. |
| 185 | - Nothing at all... :) |
| 186 | |
| 187 | |
| 188 | *******************************************************************************/ |
| 189 | |
| 190 | |
| 191 | #define MASTER_CLOCK XTAL_10MHz |
| 192 | #define SND_CLOCK XTAL_3_579545MHz |
| 193 | |
| 194 | #include "emu.h" |
| 195 | #include "cpu/m6502/m6502.h" |
| 196 | #include "sound/ay8910.h" |
| 197 | #include "sound/2413intf.h" |
| 198 | #include "video/mc6845.h" |
| 199 | #include "machine/nvram.h" |
| 200 | |
| 201 | |
| 202 | class gluck2_state : public driver_device |
| 203 | { |
| 204 | public: |
| 205 | gluck2_state(const machine_config &mconfig, device_type type, const char *tag) |
| 206 | : driver_device(mconfig, type, tag) , |
| 207 | m_videoram(*this, "videoram"), |
| 208 | m_colorram(*this, "colorram"), |
| 209 | m_maincpu(*this, "maincpu"){ } |
| 210 | |
| 211 | required_shared_ptr<UINT8> m_videoram; |
| 212 | required_shared_ptr<UINT8> m_colorram; |
| 213 | tilemap_t *m_bg_tilemap; |
| 214 | DECLARE_WRITE8_MEMBER(gluck2_videoram_w); |
| 215 | DECLARE_WRITE8_MEMBER(gluck2_colorram_w); |
| 216 | DECLARE_WRITE8_MEMBER(counters_w); |
| 217 | TILE_GET_INFO_MEMBER(get_gluck2_tile_info); |
| 218 | virtual void video_start(); |
| 219 | DECLARE_PALETTE_INIT(gluck2); |
| 220 | UINT32 screen_update_gluck2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 221 | required_device<cpu_device> m_maincpu; |
| 222 | }; |
| 223 | |
| 224 | |
| 225 | /********************************************* |
| 226 | * Video Hardware * |
| 227 | *********************************************/ |
| 228 | |
| 229 | |
| 230 | WRITE8_MEMBER(gluck2_state::gluck2_videoram_w) |
| 231 | { |
| 232 | m_videoram[offset] = data; |
| 233 | m_bg_tilemap->mark_tile_dirty(offset); |
| 234 | } |
| 235 | |
| 236 | WRITE8_MEMBER(gluck2_state::gluck2_colorram_w) |
| 237 | { |
| 238 | m_colorram[offset] = data; |
| 239 | m_bg_tilemap->mark_tile_dirty(offset); |
| 240 | } |
| 241 | |
| 242 | |
| 243 | TILE_GET_INFO_MEMBER(gluck2_state::get_gluck2_tile_info) |
| 244 | { |
| 245 | /* - bits - |
| 246 | 7654 3210 |
| 247 | --xx xx-- tiles color. |
| 248 | xx-- --x- tiles bank. |
| 249 | ---- ---x seems unused. |
| 250 | */ |
| 251 | int attr = m_colorram[tile_index]; |
| 252 | int code = m_videoram[tile_index]; |
| 253 | int bank = ((attr & 0xc0) >> 5 ) + ((attr & 0x02) >> 1 ); /* bits 1-6-7 handle the gfx banks */ |
| 254 | int color = (attr & 0x3c) >> 2; /* bits 2-3-4-5 handle the color */ |
| 255 | |
| 256 | SET_TILE_INFO_MEMBER(bank, code, color, 0); |
| 257 | } |
| 258 | |
| 259 | |
| 260 | void gluck2_state::video_start() |
| 261 | { |
| 262 | m_bg_tilemap = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(gluck2_state::get_gluck2_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); |
| 263 | } |
| 264 | |
| 265 | |
| 266 | UINT32 gluck2_state::screen_update_gluck2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 267 | { |
| 268 | m_bg_tilemap->draw(bitmap, cliprect, 0, 0); |
| 269 | return 0; |
| 270 | } |
| 271 | |
| 272 | |
| 273 | PALETTE_INIT_MEMBER(gluck2_state, gluck2) |
| 274 | { |
| 275 | const UINT8 *color_prom = memregion("proms")->base(); |
| 276 | int i; |
| 277 | |
| 278 | for (i = 0; i < 0x100; i++) |
| 279 | { |
| 280 | int bit0, bit1, bit2, bit3; |
| 281 | int r, g, b; |
| 282 | |
| 283 | /* red component */ |
| 284 | bit0 = (color_prom[i + 0x000] >> 0) & 0x01; |
| 285 | bit1 = (color_prom[i + 0x000] >> 1) & 0x01; |
| 286 | bit2 = (color_prom[i + 0x000] >> 2) & 0x01; |
| 287 | bit3 = (color_prom[i + 0x000] >> 3) & 0x01; |
| 288 | r = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3; |
| 289 | |
| 290 | /* green component */ |
| 291 | bit0 = (color_prom[i + 0x100] >> 0) & 0x01; |
| 292 | bit1 = (color_prom[i + 0x100] >> 1) & 0x01; |
| 293 | bit2 = (color_prom[i + 0x100] >> 2) & 0x01; |
| 294 | bit3 = (color_prom[i + 0x100] >> 3) & 0x01; |
| 295 | g = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3; |
| 296 | |
| 297 | /* blue component */ |
| 298 | bit0 = (color_prom[i + 0x200] >> 0) & 0x01; |
| 299 | bit1 = (color_prom[i + 0x200] >> 1) & 0x01; |
| 300 | bit2 = (color_prom[i + 0x200] >> 2) & 0x01; |
| 301 | bit3 = (color_prom[i + 0x200] >> 3) & 0x01; |
| 302 | b = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3; |
| 303 | |
| 304 | palette_set_color(machine(), i, MAKE_RGB(r, g, b)); |
| 305 | |
| 306 | } |
| 307 | } |
| 308 | |
| 309 | |
| 310 | /********************************************** |
| 311 | * R/W Handlers * |
| 312 | **********************************************/ |
| 313 | |
| 314 | WRITE8_MEMBER(gluck2_state::counters_w) |
| 315 | { |
| 316 | /* - bits - |
| 317 | 7654 3210 |
| 318 | ---- --x- notes. |
| 319 | ---- -x-- payout. |
| 320 | ---x ---- coins. |
| 321 | xxx- x--x seems unused... |
| 322 | |
| 323 | */ |
| 324 | data = data ^ 0xff; // inverted |
| 325 | |
| 326 | coin_counter_w(machine(), 0, data & 0x10); /* coins */ |
| 327 | coin_counter_w(machine(), 1, data & 0x02); /* notes */ |
| 328 | coin_counter_w(machine(), 2, data & 0x04); /* payout */ |
| 329 | } |
| 330 | |
| 331 | |
| 332 | /********************************************* |
| 333 | * Memory map information * |
| 334 | *********************************************/ |
| 335 | |
| 336 | static ADDRESS_MAP_START( gluck2_map, AS_PROGRAM, 8, gluck2_state ) |
| 337 | AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram") |
| 338 | AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("crtc", mc6845_device, address_w) |
| 339 | AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w) |
| 340 | AM_RANGE(0x0844, 0x084b) AM_NOP /* see below */ |
| 341 | AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(gluck2_videoram_w) AM_SHARE("videoram") /* 6116 #1 (2K x 8) RAM (only 1st half used) */ |
| 342 | AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(gluck2_colorram_w) AM_SHARE("colorram") /* 6116 #2 (2K x 8) RAM (only 1st half used) */ |
| 343 | AM_RANGE(0x2000, 0x2000) AM_READ_PORT("SW1") |
| 344 | AM_RANGE(0x2d00, 0x2d01) AM_DEVWRITE_LEGACY("ymsnd", ym2413_w ) |
| 345 | AM_RANGE(0x3400, 0x3400) AM_READ_PORT("IN0") |
| 346 | AM_RANGE(0x3500, 0x3500) AM_READ_PORT("IN1") |
| 347 | AM_RANGE(0x3600, 0x3600) AM_READ_PORT("IN2") |
| 348 | AM_RANGE(0x3700, 0x3700) AM_WRITE(counters_w ) |
| 349 | AM_RANGE(0x3d00, 0x3d01) AM_DEVREADWRITE_LEGACY("ay8910", ay8910_r, ay8910_address_data_w) |
| 350 | AM_RANGE(0x4000, 0xffff) AM_ROM |
| 351 | ADDRESS_MAP_END |
| 352 | |
| 353 | /* |
| 354 | 0844-0847 PIA0 leftover??? |
| 355 | 0848-084b PIA1 leftover??? |
| 356 | |
| 357 | */ |
| 358 | |
| 359 | /********************************************* |
| 360 | * Input ports * |
| 361 | *********************************************/ |
| 362 | |
| 363 | static INPUT_PORTS_START( gluck2 ) |
| 364 | PORT_START("IN0") |
| 365 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) |
| 366 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) |
| 367 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) |
| 368 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) |
| 369 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) |
| 370 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Note In") |
| 371 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) |
| 372 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) |
| 373 | |
| 374 | PORT_START("IN1") |
| 375 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 376 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 377 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) |
| 378 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 379 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 380 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service") |
| 381 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 382 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 383 | |
| 384 | PORT_START("IN2") |
| 385 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) |
| 386 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) |
| 387 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) |
| 388 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) |
| 389 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) |
| 390 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 391 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset") |
| 392 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 393 | |
| 394 | PORT_START("SW1") // 2000 |
| 395 | PORT_DIPNAME( 0x01, 0x01, "Paytable" ) PORT_DIPLOCATION("SW1:1") |
| 396 | PORT_DIPSETTING( 0x01, "Strings and Numbers" ) |
| 397 | PORT_DIPSETTING( 0x00, "Only Numbers" ) |
| 398 | PORT_DIPNAME( 0x02, 0x02, "SW1:2" ) PORT_DIPLOCATION("SW1:2") |
| 399 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 400 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 401 | PORT_DIPNAME( 0x04, 0x04, "SW1:3" ) PORT_DIPLOCATION("SW1:3") |
| 402 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 403 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 404 | PORT_DIPNAME( 0x08, 0x08, "SW1:4" ) PORT_DIPLOCATION("SW1:4") |
| 405 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 406 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 407 | PORT_DIPNAME( 0x10, 0x10, "SW1:5" ) PORT_DIPLOCATION("SW1:5") |
| 408 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 409 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 410 | PORT_DIPNAME( 0x20, 0x20, "SW1:6" ) PORT_DIPLOCATION("SW1:6") |
| 411 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 412 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 413 | PORT_DIPNAME( 0x40, 0x40, "SW1:7" ) PORT_DIPLOCATION("SW1:7") |
| 414 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 415 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 416 | PORT_DIPNAME( 0x80, 0x80, "SW1:8" ) PORT_DIPLOCATION("SW1:8") |
| 417 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 418 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 419 | |
| 420 | PORT_START("SW2") // 3D01: AY8910 port B |
| 421 | PORT_DIPNAME( 0x01, 0x01, "SW2:8" ) PORT_DIPLOCATION("SW2:8") |
| 422 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 423 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 424 | PORT_DIPNAME( 0x06, 0x02, "Bet Max" ) PORT_DIPLOCATION("SW2:7, 6") |
| 425 | PORT_DIPSETTING( 0x00, "10" ) |
| 426 | PORT_DIPSETTING( 0x02, "20" ) |
| 427 | PORT_DIPSETTING( 0x04, "30" ) |
| 428 | PORT_DIPSETTING( 0x06, "40" ) |
| 429 | PORT_DIPNAME( 0x08, 0x08, "SW2:5" ) PORT_DIPLOCATION("SW2:5") |
| 430 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 431 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 432 | PORT_DIPNAME( 0x10, 0x10, "SW2:4" ) PORT_DIPLOCATION("SW2:4") |
| 433 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 434 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 435 | PORT_DIPNAME( 0x20, 0x20, "SW2:3" ) PORT_DIPLOCATION("SW2:3") |
| 436 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 437 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 438 | PORT_DIPNAME( 0xc0, 0xc0, "Note In" ) PORT_DIPLOCATION("SW2:2, 1") |
| 439 | PORT_DIPSETTING( 0x00, "10" ) |
| 440 | PORT_DIPSETTING( 0x40, "20" ) |
| 441 | PORT_DIPSETTING( 0x80, "50" ) |
| 442 | PORT_DIPSETTING( 0xc0, "100" ) |
| 443 | |
| 444 | PORT_START("SW3") // 3D01: AY8910 port A |
| 445 | PORT_DIPNAME( 0x01, 0x01, "SW3:1" ) PORT_DIPLOCATION("SW3:1") |
| 446 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 447 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 448 | PORT_DIPNAME( 0x02, 0x02, "SW3:8" ) PORT_DIPLOCATION("SW3:8") |
| 449 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 450 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 451 | PORT_DIPNAME( 0x04, 0x04, "Graphics" ) PORT_DIPLOCATION("SW3:7") |
| 452 | PORT_DIPSETTING( 0x04, "Turtles" ) |
| 453 | PORT_DIPSETTING( 0x00, "Cards" ) |
| 454 | PORT_DIPNAME( 0x18, 0x18, "Coin In" ) PORT_DIPLOCATION("SW3:6, 5") |
| 455 | PORT_DIPSETTING( 0x00, "1" ) |
| 456 | PORT_DIPSETTING( 0x08, "2" ) |
| 457 | PORT_DIPSETTING( 0x10, "5" ) |
| 458 | PORT_DIPSETTING( 0x18, "10" ) |
| 459 | PORT_DIPNAME( 0x20, 0x20, "SW3:4" ) PORT_DIPLOCATION("SW3:4") |
| 460 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 461 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 462 | PORT_DIPNAME( 0x40, 0x40, "SW3:3" ) PORT_DIPLOCATION("SW3:3") |
| 463 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 464 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 465 | PORT_DIPNAME( 0x80, 0x80, "SW3:2" ) PORT_DIPLOCATION("SW3:2") |
| 466 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 467 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 468 | |
| 469 | INPUT_PORTS_END |
| 470 | |
| 471 | |
| 472 | /********************************************* |
| 473 | * Graphics Layouts * |
| 474 | *********************************************/ |
| 475 | |
| 476 | static const gfx_layout tilelayout = |
| 477 | { |
| 478 | 8, 8, |
| 479 | 256, // 0x100 tiles per bank. |
| 480 | 3, |
| 481 | { 0, RGN_FRAC(1,3), RGN_FRAC(2,3) }, |
| 482 | { 0, 1, 2, 3, 4, 5, 6, 7 }, |
| 483 | { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, |
| 484 | 8*8 |
| 485 | }; |
| 486 | |
| 487 | |
| 488 | /************************************************** |
| 489 | * Graphics Decode Information * |
| 490 | **************************************************/ |
| 491 | |
| 492 | static GFXDECODE_START( gluck2 ) |
| 493 | GFXDECODE_ENTRY( "gfx", 0x0000, tilelayout, 0, 16 ) |
| 494 | GFXDECODE_ENTRY( "gfx", 0x0800, tilelayout, 0, 16 ) |
| 495 | GFXDECODE_ENTRY( "gfx", 0x1000, tilelayout, 0, 16 ) |
| 496 | GFXDECODE_ENTRY( "gfx", 0x1800, tilelayout, 0, 16 ) |
| 497 | GFXDECODE_ENTRY( "gfx", 0x2000, tilelayout, 0, 16 ) |
| 498 | GFXDECODE_ENTRY( "gfx", 0x2800, tilelayout, 0, 16 ) |
| 499 | GFXDECODE_ENTRY( "gfx", 0x3000, tilelayout, 0, 16 ) |
| 500 | GFXDECODE_ENTRY( "gfx", 0x3800, tilelayout, 0, 16 ) |
| 501 | GFXDECODE_END |
| 502 | |
| 503 | |
| 504 | /******************************************** |
| 505 | * CRTC Interface * |
| 506 | ********************************************/ |
| 507 | |
| 508 | static MC6845_INTERFACE( mc6845_intf ) |
| 509 | { |
| 510 | "screen", /* screen we are acting on */ |
| 511 | false, /* show border area */ |
| 512 | 8, /* number of pixels per video memory address */ |
| 513 | NULL, /* before pixel update callback */ |
| 514 | NULL, /* row update callback */ |
| 515 | NULL, /* after pixel update callback */ |
| 516 | DEVCB_NULL, /* callback for display state changes */ |
| 517 | DEVCB_NULL, /* callback for cursor state changes */ |
| 518 | DEVCB_NULL, /* HSYNC callback */ |
| 519 | DEVCB_NULL, /* VSYNC callback */ |
| 520 | NULL /* update address callback */ |
| 521 | }; |
| 522 | |
| 523 | |
| 524 | /************************************************* |
| 525 | * Sound Interfaces * |
| 526 | *************************************************/ |
| 527 | |
| 528 | static const ay8910_interface ay8910_intf = |
| 529 | { |
| 530 | AY8910_LEGACY_OUTPUT, |
| 531 | AY8910_DEFAULT_LOADS, |
| 532 | DEVCB_INPUT_PORT("SW3"), |
| 533 | DEVCB_INPUT_PORT("SW2"), |
| 534 | |
| 535 | /* Output ports have a minimal activity during init. |
| 536 | They seems unused (at least for Good Luck II) |
| 537 | */ |
| 538 | DEVCB_NULL, |
| 539 | DEVCB_NULL |
| 540 | }; |
| 541 | |
| 542 | |
| 543 | /********************************************* |
| 544 | * Machine Drivers * |
| 545 | *********************************************/ |
| 546 | |
| 547 | static MACHINE_CONFIG_START( gluck2, gluck2_state ) |
| 548 | |
| 549 | /* basic machine hardware */ |
| 550 | MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK/16) /* guess */ |
| 551 | MCFG_CPU_PROGRAM_MAP(gluck2_map) |
| 552 | MCFG_CPU_VBLANK_INT_DRIVER("screen", gluck2_state, nmi_line_pulse) |
| 553 | |
| 554 | MCFG_NVRAM_ADD_0FILL("nvram") |
| 555 | |
| 556 | /* video hardware */ |
| 557 | MCFG_SCREEN_ADD("screen", RASTER) |
| 558 | MCFG_SCREEN_REFRESH_RATE(60) |
| 559 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) |
| 560 | |
| 561 | /* CRTC Register: 00 01 02 03 04 05 06 |
| 562 | CRTC Value : 0x27 0x20 0x23 0x03 0x26 0x00 0x20 |
| 563 | */ |
| 564 | MCFG_SCREEN_SIZE((39+1)*8, (38+1)*8) /* from MC6845 init, registers 00 & 04. (value - 1) */ |
| 565 | MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1) /* from MC6845 init, registers 01 & 06. */ |
| 566 | MCFG_SCREEN_UPDATE_DRIVER(gluck2_state, screen_update_gluck2) |
| 567 | |
| 568 | MCFG_GFXDECODE(gluck2) |
| 569 | MCFG_PALETTE_LENGTH(0x100) |
| 570 | MCFG_PALETTE_INIT_OVERRIDE(gluck2_state, gluck2) |
| 571 | |
| 572 | MCFG_MC6845_ADD("crtc", MC6845, MASTER_CLOCK/16, mc6845_intf) /* guess */ |
| 573 | |
| 574 | /* sound hardware */ |
| 575 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 576 | |
| 577 | MCFG_SOUND_ADD("ay8910", AY8910, MASTER_CLOCK/8) /* guess */ |
| 578 | MCFG_SOUND_CONFIG(ay8910_intf) |
| 579 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) |
| 580 | |
| 581 | MCFG_SOUND_ADD("ymsnd", YM2413, SND_CLOCK) |
| 582 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) |
| 583 | |
| 584 | MACHINE_CONFIG_END |
| 585 | |
| 586 | |
| 587 | /********************************************* |
| 588 | * Rom Load * |
| 589 | *********************************************/ |
| 590 | |
| 591 | ROM_START( gluck2 ) |
| 592 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 593 | ROM_LOAD( "4.u7", 0x00000, 0x10000, CRC(09e7a220) SHA1(1be7ba3eb864da097f9e45a80f2db61ff0e9bc0b) ) |
| 594 | |
| 595 | ROM_REGION( 0x18000, "gfx", 0 ) |
| 596 | ROM_LOAD( "3.u33", 0x00000, 0x8000, CRC(f752f0b2) SHA1(7bec624282c74d6f88815cc28cf5a58f6e3ce2dd) ) |
| 597 | ROM_LOAD( "2.u32", 0x08000, 0x8000, CRC(6a621a98) SHA1(9c83eab9f0858735e0176e5335651dd2dc620229) ) |
| 598 | ROM_LOAD( "1.u31", 0x10000, 0x8000, CRC(ea33db1a) SHA1(69c67944f5e8bd060335b5e14628c0e0828271a4) ) |
| 599 | |
| 600 | ROM_REGION( 0x0300, "proms", 0 ) // RGB |
| 601 | ROM_LOAD( "v1.u27", 0x0000, 0x0100, CRC(1aa5479f) SHA1(246cc99e7b351d5546060807b8a0b8acfe2f8e39) ) |
| 602 | ROM_LOAD( "v2.u26", 0x0100, 0x0100, CRC(8da53489) SHA1(b90f5dd4bc5b64009e8bfad8f79f23d4020e537b) ) |
| 603 | ROM_LOAD( "v3.u25", 0x0200, 0x0100, CRC(a4d2c9c3) SHA1(a799875b8b92391696419081244da2e56216e024) ) |
| 604 | ROM_END |
| 605 | |
| 606 | |
| 607 | /********************************************* |
| 608 | * Game Drivers * |
| 609 | *********************************************/ |
| 610 | |
| 611 | /* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS... */ |
| 612 | GAME( 1992, gluck2, 0, gluck2, gluck2, driver_device, 0, ROT0, "Yung Yu / CYE", "Good Luck II", 0 ) |