trunk/src/mess/audio/upd1771.c
| r22060 | r22061 | |
| 80 | 80 | L -> selector of left or right half of the ram word |
| 81 | 81 | ?bits: |
| 82 | 82 | D (having to do with the DAC) |
| 83 | | N (having to do with the pseudorandom noise interrupt, namely setting the clock divider ratio for the PRNG clock vs cpu clock) |
| 84 | | MODE (enabling/disabling/acking the noise interrupt, and the tone interrupts (there are four!)) |
| 83 | N (3 bits? having to do with the pseudorandom noise interrupt, namely setting the clock divider ratio for the PRNG clock vs cpu clock) |
| 84 | MODE (5 or more bits? enabling/disabling/acking the noise interrupt, and the tone interrupts (there are four!)) |
| 85 | 85 | SP (the stack pointer, probably 5 bits, points to the stack ram; may encompass H and L as above!) |
| 86 | 86 | FLO: unsure. quite possibly 'flag overflow' used for branching. there likely exists other flags as well... |
| 87 | 87 | ODF: 'output data flag?', selects which half of a selected ram word is output to the dac not really sure of this? |
| r22060 | r22061 | |
| 145 | 145 | |
| 146 | 146 | (NOTE: the photomicrograph in the bristow book makes it fairly clear due to |
| 147 | 147 | pad thicknessess that the real VCC is pin 8 and the real GND is pin 14. |
| 148 | | Pins 16 and 17 are some sort of ?mode? inputs but could be the /EXTINT pin too? |
| 149 | | Pin 15 MIGHT be the reset pin or could be a TEST pin. RESET could also be pin 7.) |
| 148 | The function of pin 7 is unknown. |
| 150 | 149 | |
| 151 | 150 | Pins 11 and 13 go to a special circuit, which according to kevtris's analysis |
| 152 | 151 | of my schematics, consist of a balanced output (not unlike XLR cables), |