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r22052 Saturday 23rd March, 2013 at 20:02:27 UTC by Angelo Salese
FDC check-point
[src/mess/drivers]mz3500.c

trunk/src/mess/drivers/mz3500.c
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1111#include "cpu/z80/z80.h"
1212//#include "sound/ay8910.h"
1313#include "video/upd7220.h"
14#include "machine/upd765.h"
1415
1516#define MAIN_CLOCK XTAL_8MHz
1617
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2324         m_slave(*this, "slave"),
2425         m_hgdc1(*this, "upd7220_chr"),
2526         m_hgdc2(*this, "upd7220_gfx"),
27         m_fdc(*this, "upd765a"),
2628         m_video_ram(*this, "video_ram")
2729   { }
2830
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3133   required_device<cpu_device> m_slave;
3234   required_device<upd7220_device> m_hgdc1;
3335   required_device<upd7220_device> m_hgdc2;
36   required_device<upd765a_device> m_fdc;
3437   required_shared_ptr<UINT8> m_video_ram;
3538   UINT8 *m_ipl_rom;
3639   UINT8 *m_basic_rom;
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5255   DECLARE_READ8_MEMBER(mz3500_io_r);
5356   DECLARE_WRITE8_MEMBER(mz3500_io_w);
5457   DECLARE_WRITE8_MEMBER(mz3500_crtc_w);
58   DECLARE_READ8_MEMBER(mz3500_fdc_r);
59   DECLARE_WRITE8_MEMBER(mz3500_fdc_w);
5560
5661   // screen updates
5762   UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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254259            case 0x1: return mz3500_basic_r(space,(offset & 0x1fff) | 0x4000);
255260            case 0x2: return mz3500_basic_r(space,(offset & 0x1fff) | 0x6000);
256261         }
257
258         printf("Error: read with unmapped memory bank offset %04x MS %02x MO %02x\n",offset,m_ms,m_mo);
259262      }
260263      if((offset & 0xc000) == 0x4000) { return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x4000); }
261264      if((offset & 0xc000) == 0x8000) { return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x8000); }
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281284         }
282285      }
283286
284      printf("Error: read with unmapped memory bank offset %04x MS %02x MA %02x\n",offset,m_ms,m_ma);
287      printf("Error: read with unmapped memory bank offset %04x MS %02x MA %02x MO %02x\n",offset,m_ms,m_ma,m_mo);
285288   }
286289
287290   return 0xff;
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414417      m_crtc[offset] = data;
415418}
416419
420READ8_MEMBER(mz3500_state::mz3500_fdc_r)
421{
422   /*
423   ---- -x-- Motor
424   ---- --x- Index
425   ---- ---x Drq
426   */
427   floppy_image_device *floppy;
428   floppy = machine().device<floppy_connector>(":upd765a:0")->get_device();
429
430   return floppy->idx_r() << 1;
431}
432
433WRITE8_MEMBER(mz3500_state::mz3500_fdc_w)
434{
435   /*
436   x--- ---- FDC int enable
437   -x-- ---- FDD select signal
438   --x- ---- FDC TC
439   ---x ---- motor on signal
440   ---- xxxx Select FDD 0-3 (bit-wise)
441   */
442}
443
417444static ADDRESS_MAP_START( mz3500_master_map, AS_PROGRAM, 8, mz3500_state )
418445   AM_RANGE(0x0000, 0xffff) AM_READWRITE(mz3500_master_mem_r,mz3500_master_mem_w)
419446ADDRESS_MAP_END
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423450//  AM_RANGE(0xe4, 0xe7) SFD upd765
424451//   AM_RANGE(0xe8, 0xeb) SFD I/O port and DMAC chip select
425452//   AM_RANGE(0xec, 0xef) irq signal from slave to master CPU
426//   AM_RANGE(0xf4, 0xf7) MFD upd765
453   AM_RANGE(0xf4, 0xf5) AM_DEVICE("upd765a", upd765a_device, map) // MFD upd765
427454//   AM_RANGE(0xf8, 0xfb) MFD I/O port
428   AM_RANGE(0xf8, 0xf8) AM_READNOP // TODO
455   AM_RANGE(0xf8, 0xf8) AM_READWRITE(mz3500_fdc_r,mz3500_fdc_w)
429456   AM_RANGE(0xfc, 0xff) AM_READWRITE(mz3500_io_r,mz3500_io_w) // memory mapper
430457ADDRESS_MAP_END
431458
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572599   AM_RANGE(0x00000, 0x3ffff) AM_RAM // AM_SHARE("video_ram_2")
573600ADDRESS_MAP_END
574601
602static SLOT_INTERFACE_START( mz3500_floppies )
603   SLOT_INTERFACE( "525hd", FLOPPY_525_HD )
604SLOT_INTERFACE_END
605
575606/* TODO: clocks */
576607static MACHINE_CONFIG_START( mz3500, mz3500_state )
577608
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584615   MCFG_CPU_PROGRAM_MAP(mz3500_slave_map)
585616   MCFG_CPU_IO_MAP(mz3500_slave_io)
586617
618   MCFG_UPD765A_ADD("upd765a", true, true)
619   MCFG_FLOPPY_DRIVE_ADD("upd765a:0", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
620   MCFG_FLOPPY_DRIVE_ADD("upd765a:1", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
621   MCFG_FLOPPY_DRIVE_ADD("upd765a:2", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
622   MCFG_FLOPPY_DRIVE_ADD("upd765a:3", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
623
587624   MCFG_UPD7220_ADD("upd7220_chr", MAIN_CLOCK/5, hgdc_1_intf, upd7220_1_map)
588625   MCFG_UPD7220_ADD("upd7220_gfx", MAIN_CLOCK/5, hgdc_2_intf, upd7220_2_map)
589626

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