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r22036 Saturday 23rd March, 2013 at 11:53:31 UTC by Fabio Priuli
(MESS) megadriv.c: removed drivers gensvp, mdsvp and mdsvpj: Virtua Racing can
now be loaded directly in genesis, megadriv and megadrij [Fabio Priuli]
[hash]megadriv.xml
[src/mess]mess.lst mess.mak
[src/mess/drivers]megadriv.c
[src/mess/machine]megasvp.c

trunk/hash/megadriv.xml
r22035r22036
74747474
74757475
74767476
7477
74787477<!-- Old scrambled/interleaved dumps -->
74797478
74807479   <software name="13mahjan">
r22035r22036
2993729936      <sharedfeat name="compatibility" value="PAL" />
2993829937      <sharedfeat name="addon" value="SVP" />
2993929938      <part name="cart" interface="megadriv_cart">
29940         <feature name="slot" value="rom" />
29939         <feature name="slot" value="rom_svp" />
2994129940         <dataarea name="rom" size="2097152">
2994229941            <rom name="mpr-16420.bin" size="2097152" crc="9624d4ef" sha1="2c3812f8a010571e51269a33a989598787d27c2d" offset="000000" loadflag="load16_word_swap" />
2994329942         </dataarea>
r22035r22036
2995529954      <sharedfeat name="compatibility" value="EUR-JPN" />
2995629955      <sharedfeat name="addon" value="SVP" />
2995729956      <part name="cart" interface="megadriv_cart">
29958         <feature name="slot" value="rom" />
29957         <feature name="slot" value="rom_svp" />
2995929958         <dataarea name="rom" size="2097152">
2996029959            <rom name="mpr-16389.bin" size="2097152" crc="53a293b5" sha1="0ad38a3ab1cc99edac72184f8ae420e13df5cac6" offset="000000" loadflag="load16_word_swap" />
2996129960         </dataarea>
r22035r22036
2997029969      <sharedfeat name="compatibility" value="NTSC-U" />
2997129970      <sharedfeat name="addon" value="SVP" />
2997229971      <part name="cart" interface="megadriv_cart">
29973         <feature name="slot" value="rom" />
29972         <feature name="slot" value="rom_svp" />
2997429973         <dataarea name="rom" size="2097152">
2997529974            <rom name="virtua racing (usa).bin" size="2097152" crc="7e1a324a" sha1="ff969ae53120cc4e7cb1a8a7e47458f2eb8a2165" offset="000000" loadflag="load16_word_swap" />
2997629975         </dataarea>
trunk/src/mess/mess.mak
r22035r22036
16301630   $(MESS_MACHINE)/md_jcart.o  \
16311631   $(MESS_MACHINE)/md_stm95.o  \
16321632   $(MESS_MACHINE)/md_svp.o    \
1633   $(MESS_MACHINE)/megasvp.o   \
16341633   $(MESS_DRIVERS)/megadriv.o  \
16351634   $(MESS_DRIVERS)/dccons.o    \
16361635   $(MAME_MACHINE)/gdrom.o     \
trunk/src/mess/drivers/megadriv.c
r22035r22036
298298   md_cons_state *state = machine.driver_data<md_cons_state>();
299299
300300   mess_init_6buttons_pad(machine);
301   
302   // small hack, until SVP is converted to be a slot device
303   if (machine.device<cpu_device>("svp") != NULL)
304      svp_init(machine);
305   else
306   {     
307      vdp_get_word_from_68k_mem = vdp_get_word_from_68k_mem_console;
308      machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7fffff, read16_delegate(FUNC(base_md_cart_slot_device::read),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write),(base_md_cart_slot_device*)state->m_slotcart));
309      machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xa13000, 0xa130ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a13),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write_a13),(base_md_cart_slot_device*)state->m_slotcart));
310      machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xa15000, 0xa150ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a15),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write_a15),(base_md_cart_slot_device*)state->m_slotcart));
311      machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0xa14000, 0xa14003, write16_delegate(FUNC(base_md_cart_slot_device::write_tmss_bank),(base_md_cart_slot_device*)state->m_slotcart));
312   }
301
302   vdp_get_word_from_68k_mem = vdp_get_word_from_68k_mem_console;
303
304   machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7fffff, read16_delegate(FUNC(base_md_cart_slot_device::read),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write),(base_md_cart_slot_device*)state->m_slotcart));
305   machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xa13000, 0xa130ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a13),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write_a13),(base_md_cart_slot_device*)state->m_slotcart));
306   machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xa15000, 0xa150ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a15),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write_a15),(base_md_cart_slot_device*)state->m_slotcart));
307   machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0xa14000, 0xa14003, write16_delegate(FUNC(base_md_cart_slot_device::write_tmss_bank),(base_md_cart_slot_device*)state->m_slotcart));
313308}
314309
315310static MACHINE_RESET( ms_megadriv )
r22035r22036
319314
320315static SLOT_INTERFACE_START(md_cart)
321316   SLOT_INTERFACE_INTERNAL("rom",  MD_STD_ROM)
322   SLOT_INTERFACE_INTERNAL("rom_svp",  MD_ROM_SVP) // in progress...
317   SLOT_INTERFACE_INTERNAL("rom_svp",  MD_ROM_SVP)
323318   SLOT_INTERFACE_INTERNAL("rom_sk",  MD_ROM_SK)
324319// NVRAM handling
325320   SLOT_INTERFACE_INTERNAL("rom_sram",  MD_ROM_SRAM)
r22035r22036
423418ROM_END
424419
425420
426ROM_START(gensvp)
427   ROM_REGION(MD_CPU_REGION_SIZE, "maincpu", ROMREGION_ERASEFF)
428   ROM_REGION( 0x10000, "soundcpu", ROMREGION_ERASEFF)
429ROM_END
430
431ROM_START(mdsvp)
432   ROM_REGION(MD_CPU_REGION_SIZE, "maincpu", ROMREGION_ERASEFF)
433   ROM_REGION( 0x10000, "soundcpu", ROMREGION_ERASEFF)
434ROM_END
435
436ROM_START(mdsvpj)
437   ROM_REGION(MD_CPU_REGION_SIZE, "maincpu", ROMREGION_ERASEFF)
438   ROM_REGION( 0x10000, "soundcpu", ROMREGION_ERASEFF)
439ROM_END
440
441421/*************************************
442422 *
443423 *  Driver initialization
r22035r22036
821801   ROM_LOAD( "32x_s_bios.bin", 0x000000,  0x000400, CRC(bfda1fe5) SHA1(4103668c1bbd66c5e24558e73d4f3f92061a109a) )
822802ROM_END
823803
824/****************************************** SVP emulation *****************************************/
825804
826INPUT_PORTS_START( megdsvp )
827   PORT_INCLUDE( megadriv )
828
829   PORT_START("MEMORY_TEST") /* special memtest mode */
830   /* Region setting for Console */
831   PORT_DIPNAME( 0x01, 0x00, DEF_STR( Test ) )
832   PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
833   PORT_DIPSETTING( 0x01, DEF_STR( On ) )
834INPUT_PORTS_END
835
836
837static MACHINE_CONFIG_START( megdsvp, mdsvp_state )
838   MCFG_FRAGMENT_ADD( md_ntsc )
839
840   MCFG_CPU_ADD("svp", SSP1601, MASTER_CLOCK_NTSC / 7 * 3) /* ~23 MHz (guessed) */
841   MCFG_CPU_PROGRAM_MAP(svp_ssp_map)
842   MCFG_CPU_IO_MAP(svp_ext_map)
843   /* IRQs are not used by this CPU */
844
845   MCFG_MACHINE_START( ms_megadriv )
846   MCFG_MACHINE_RESET( ms_megadriv )
847
848   MCFG_MD_CARTRIDGE_ADD("mdslot", md_cart, NULL, NULL)
849   MCFG_SOFTWARE_LIST_ADD("cart_list","megadriv")
850MACHINE_CONFIG_END
851
852static MACHINE_CONFIG_START( megdsvp_pal, mdsvp_state )
853   MCFG_FRAGMENT_ADD( md_pal )
854
855   MCFG_CPU_ADD("svp", SSP1601, MASTER_CLOCK_PAL / 7 * 3) /* ~23 MHz (guessed) */
856   MCFG_CPU_PROGRAM_MAP(svp_ssp_map)
857   MCFG_CPU_IO_MAP(svp_ext_map)
858   /* IRQs are not used by this CPU */
859
860   MCFG_MACHINE_START( ms_megadriv )
861   MCFG_MACHINE_RESET( ms_megadriv )
862
863   MCFG_MD_CARTRIDGE_ADD("mdslot", md_cart, NULL, NULL)
864   MCFG_SOFTWARE_LIST_ADD("cart_list","megadriv")
865MACHINE_CONFIG_END
866
867
868805/****************************************** PICO emulation ****************************************/
869806
870807/*
r22035r22036
11251062CONS( 1990, megadriv,   genesis,   0,      ms_megadpal,     md, md_cons_state,     md_eur,    "Sega",   "Mega Drive (Europe, PAL)", 0)
11261063CONS( 1988, megadrij,   genesis,   0,      ms_megadriv,     md, md_cons_state,     md_jpn,    "Sega",   "Mega Drive (Japan, NTSC)", 0)
11271064
1128// these should not exist, the SVP hardware is in the cart and should be installed dynamically when selected from the Software List
1129// this however involves installing entire CPUs at run/load time and I don't think we can do that.
1130CONS( 1993, gensvp,     genesis,   0,      megdsvp,         md, md_cons_state,     genesis,   "Sega",   "Genesis (USA, NTSC, for SVP cart)", 0)
1131CONS( 1990, mdsvp,      genesis,   0,      megdsvp_pal,     md, md_cons_state,     md_eur,    "Sega",   "Mega Drive (Europe, PAL, for SVP cart)", 0)
1132CONS( 1988, mdsvpj,     genesis,   0,      megdsvp,         md, md_cons_state,     md_jpn,    "Sega",   "Mega Drive (Japan, NTSC, for SVP cart)", 0)
1133
11341065// the 32X plugged in the cart slot, games plugged into the 32x.  Maybe it should be handled as an expansion device?
11351066CONS( 1994, 32x,        0,         0,      genesis_32x,     md, md_cons_state,     genesis,   "Sega",   "Genesis with 32X (USA, NTSC)", GAME_NOT_WORKING )
11361067CONS( 1994, 32xe,       32x,       0,      md_32x,          md, md_cons_state,     md_eur,    "Sega",   "Mega Drive with 32X (Europe, PAL)", GAME_NOT_WORKING )
trunk/src/mess/machine/megasvp.c
r22035r22036
1/* Megadrive SVP emulation (Virtua Racing) */
2
3#include "includes/md.h"
4
5
6/****************************************** SVP related *****************************************/
7
8/*
9 * Emulator of memory controller in SVP chip
10 *
11 * Copyright 2008, Grazvydas Ignotas
12 * based on RE work by Tasco Deluxe
13 *
14 * SSP1601 EXT registers are mapped as I/O ports due to their function
15 * (they are interfaced through external bus), and are named as follows
16 * (these are unofficial names, official ones are unknown):
17 *   EXT0: PM0 - programmable register 0
18 *   EXT1: PM1 - ... 1
19 *   EXT2: PM2 - ... 2
20 *   EXT3: XST - external status. Can also act as PM.
21 *   EXT4: PM4 - ... 4
22 *   EXT5: (unused)
23 *   EXT6: PMC - programmable memory register control (PMAC).
24 *   EXT7: AL  - although internal to SSP1601, it still causes bus access
25 *
26 * Depending on GPO bits in status register, PM0, PM1, PM2 and XST can act as
27 * external status registers, os as programmable memory registers. PM4 always
28 * acts as PM register (independent on GPO bits).
29 */
30
31
32#define SSP_PMC_HAVE_ADDR  1  // address written to PMAC, waiting for mode
33#define SSP_PMC_SET        2  // PMAC is set, PMx can be programmed
34
35static int get_inc(int mode)
36{
37   int inc = (mode >> 11) & 7;
38   if (inc != 0) {
39      if (inc != 7) inc--;
40      inc = 1 << inc; // 0 1 2 4 8 16 32 128
41      if (mode & 0x8000) inc = -inc; // decrement mode
42   }
43   return inc;
44}
45
46INLINE void overwrite_write(UINT16 *dst, UINT16 d)
47{
48   if (d & 0xf000) { *dst &= ~0xf000; *dst |= d & 0xf000; }
49   if (d & 0x0f00) { *dst &= ~0x0f00; *dst |= d & 0x0f00; }
50   if (d & 0x00f0) { *dst &= ~0x00f0; *dst |= d & 0x00f0; }
51   if (d & 0x000f) { *dst &= ~0x000f; *dst |= d & 0x000f; }
52}
53
54static UINT32 pm_io(address_space &space, int reg, int write, UINT32 d)
55{
56   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
57   if (state->m_emu_status & SSP_PMC_SET)
58   {
59      if (write)
60         state->m_pmac_write[reg] = state->m_pmc.d;
61      else
62         state->m_pmac_read[reg] = state->m_pmc.d;
63      state->m_emu_status &= ~SSP_PMC_SET;
64      return 0;
65   }
66
67   // just in case
68   if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
69      state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
70   }
71
72   if (reg == 4 || (space.device().state().state_int(SSP_ST) & 0x60))
73   {
74#define CADDR ((((mode<<16)&0x7f0000)|addr)<<1)
75      UINT16 *dram = (UINT16 *)state->m_dram;
76      if (write)
77      {
78         int mode = state->m_pmac_write[reg]>>16;
79         int addr = state->m_pmac_write[reg]&0xffff;
80         if      ((mode & 0x43ff) == 0x0018) // DRAM
81         {
82            int inc = get_inc(mode);
83            if (mode & 0x0400) {
84               overwrite_write(&dram[addr], d);
85            } else dram[addr] = d;
86            state->m_pmac_write[reg] += inc;
87         }
88         else if ((mode & 0xfbff) == 0x4018) // DRAM, cell inc
89         {
90            if (mode & 0x0400) {
91               overwrite_write(&dram[addr], d);
92            } else dram[addr] = d;
93            state->m_pmac_write[reg] += (addr&1) ? 31 : 1;
94         }
95         else if ((mode & 0x47ff) == 0x001c) // IRAM
96         {
97            int inc = get_inc(mode);
98            ((UINT16 *)state->m_iram)[addr&0x3ff] = d;
99            state->m_pmac_write[reg] += inc;
100         }
101         else
102         {
103            logerror("ssp FIXME: PM%i unhandled write mode %04x, [%06x] %04x\n",
104                     reg, mode, CADDR, d);
105         }
106      }
107      else
108      {
109         int mode = state->m_pmac_read[reg]>>16;
110         int addr = state->m_pmac_read[reg]&0xffff;
111         if      ((mode & 0xfff0) == 0x0800) // ROM, inc 1, verified to be correct
112         {
113            UINT16 *ROM = (UINT16 *) space.machine().root_device().memregion("maincpu")->base();
114            state->m_pmac_read[reg] += 1;
115            d = ROM[addr|((mode&0xf)<<16)];
116         }
117         else if ((mode & 0x47ff) == 0x0018) // DRAM
118         {
119            int inc = get_inc(mode);
120            d = dram[addr];
121            state->m_pmac_read[reg] += inc;
122         }
123         else
124         {
125            logerror("ssp FIXME: PM%i unhandled read  mode %04x, [%06x]\n",
126                     reg, mode, CADDR);
127            d = 0;
128         }
129      }
130
131      // PMC value corresponds to last PMR accessed (not sure).
132      if (write)
133         state->m_pmc.d = state->m_pmac_write[reg];
134      else
135         state->m_pmc.d = state->m_pmac_read[reg];
136
137      return d;
138   }
139
140   return (UINT32)-1;
141}
142
143static READ16_HANDLER( read_PM0 )
144{
145   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
146   UINT32 d = pm_io(space, 0, 0, 0);
147   if (d != (UINT32)-1) return d;
148   d = state->m_XST2;
149   state->m_XST2 &= ~2; // ?
150   return d;
151}
152
153static WRITE16_HANDLER( write_PM0 )
154{
155   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
156   UINT32 r = pm_io(space, 0, 1, data);
157   if (r != (UINT32)-1) return;
158   state->m_XST2 = data; // ?
159}
160
161static READ16_HANDLER( read_PM1 )
162{
163   UINT32 r = pm_io(space, 1, 0, 0);
164   if (r != (UINT32)-1) return r;
165   logerror("svp: PM1 acces in non PM mode?\n");
166   return 0;
167}
168
169static WRITE16_HANDLER( write_PM1 )
170{
171   UINT32 r = pm_io(space, 1, 1, data);
172   if (r != (UINT32)-1) return;
173   logerror("svp: PM1 acces in non PM mode?\n");
174}
175
176static READ16_HANDLER( read_PM2 )
177{
178   UINT32 r = pm_io(space, 2, 0, 0);
179   if (r != (UINT32)-1) return r;
180   logerror("svp: PM2 acces in non PM mode?\n");
181   return 0;
182}
183
184static WRITE16_HANDLER( write_PM2 )
185{
186   UINT32 r = pm_io(space, 2, 1, data);
187   if (r != (UINT32)-1) return;
188   logerror("svp: PM2 acces in non PM mode?\n");
189}
190
191static READ16_HANDLER( read_XST )
192{
193   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
194   UINT32 d = pm_io(space, 3, 0, 0);
195   if (d != (UINT32)-1) return d;
196
197   return state->m_XST;
198}
199
200static WRITE16_HANDLER( write_XST )
201{
202   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
203   UINT32 r = pm_io(space, 3, 1, data);
204   if (r != (UINT32)-1) return;
205
206   state->m_XST2 |= 1;
207   state->m_XST = data;
208}
209
210static READ16_HANDLER( read_PM4 )
211{
212   return pm_io(space, 4, 0, 0);
213}
214
215static WRITE16_HANDLER( write_PM4 )
216{
217   pm_io(space, 4, 1, data);
218}
219
220static READ16_HANDLER( read_PMC )
221{
222   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
223   if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
224      state->m_emu_status |= SSP_PMC_SET;
225      state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
226      return ((state->m_pmc.w.l << 4) & 0xfff0) | ((state->m_pmc.w.l >> 4) & 0xf);
227   } else {
228      state->m_emu_status |= SSP_PMC_HAVE_ADDR;
229      return state->m_pmc.w.l;
230   }
231}
232
233static WRITE16_HANDLER( write_PMC )
234{
235   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
236   if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
237      state->m_emu_status |= SSP_PMC_SET;
238      state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
239      state->m_pmc.w.h = data;
240   } else {
241      state->m_emu_status |= SSP_PMC_HAVE_ADDR;
242      state->m_pmc.w.l = data;
243   }
244}
245
246static READ16_HANDLER( read_AL )
247{
248   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
249   state->m_emu_status &= ~(SSP_PMC_SET|SSP_PMC_HAVE_ADDR);
250   return 0;
251}
252
253static WRITE16_HANDLER( write_AL )
254{
255}
256
257
258
259static READ16_HANDLER( svp_68k_io_r )
260{
261   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
262   UINT32 d;
263   switch (offset)
264   {
265         // 0xa15000, 0xa15002
266      case 0:
267      case 1:  return state->m_XST;
268         // 0xa15004
269      case 2:  d = state->m_XST2; state->m_XST2 &= ~1; return d;
270      default: logerror("unhandled SVP reg read @ %x\n", offset<<1);
271   }
272   return 0;
273}
274
275static WRITE16_HANDLER( svp_68k_io_w )
276{
277   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
278   switch (offset)
279   {
280         // 0xa15000, 0xa15002
281      case 0:
282      case 1:  state->m_XST = data; state->m_XST2 |= 2; break;
283         // 0xa15006
284      case 3:  break; // possibly halts SSP1601
285      default: logerror("unhandled SVP reg write %04x @ %x\n", data, offset<<1);
286   }
287}
288
289static READ16_HANDLER( svp_68k_cell1_r )
290{
291   // this is rewritten 68k test code
292   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
293   UINT32 a1 = offset;
294   a1 = (a1 & 0x7001) | ((a1 & 0x3e) << 6) | ((a1 & 0xfc0) >> 5);
295   return ((UINT16 *)state->m_dram)[a1];
296}
297
298static READ16_HANDLER( svp_68k_cell2_r )
299{
300   // this is rewritten 68k test code
301   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
302   UINT32 a1 = offset;
303   a1 = (a1 & 0x7801) | ((a1 & 0x1e) << 6) | ((a1 & 0x7e0) >> 4);
304   return ((UINT16 *)state->m_dram)[a1];
305}
306
307ADDRESS_MAP_START( svp_ssp_map, AS_PROGRAM, 16, driver_device )
308   AM_RANGE(0x0000, 0x03ff) AM_ROMBANK("bank3")
309   AM_RANGE(0x0400, 0xffff) AM_ROMBANK("bank4")
310ADDRESS_MAP_END
311
312ADDRESS_MAP_START( svp_ext_map, AS_IO, 16, driver_device )
313   ADDRESS_MAP_GLOBAL_MASK(0xf)
314   AM_RANGE(0*2, 0*2+1) AM_READWRITE_LEGACY(read_PM0, write_PM0)
315   AM_RANGE(1*2, 1*2+1) AM_READWRITE_LEGACY(read_PM1, write_PM1)
316   AM_RANGE(2*2, 2*2+1) AM_READWRITE_LEGACY(read_PM2, write_PM2)
317   AM_RANGE(3*2, 3*2+1) AM_READWRITE_LEGACY(read_XST, write_XST)
318   AM_RANGE(4*2, 4*2+1) AM_READWRITE_LEGACY(read_PM4, write_PM4)
319   AM_RANGE(6*2, 6*2+1) AM_READWRITE_LEGACY(read_PMC, write_PMC)
320   AM_RANGE(7*2, 7*2+1) AM_READWRITE_LEGACY(read_AL, write_AL)
321ADDRESS_MAP_END
322
323
324static READ16_HANDLER( svp_speedup_r )
325{
326   space.device().execute().spin_until_time(attotime::from_usec(100));
327   return 0x0425;
328}
329
330
331void svp_init(running_machine &machine)
332{
333   mdsvp_state *state = machine.driver_data<mdsvp_state>();
334   UINT8 *ROM = state->memregion("maincpu")->base();
335
336   memset(state->m_pmac_read, 0, ARRAY_LENGTH(state->m_pmac_read));
337   memset(state->m_pmac_write, 0, ARRAY_LENGTH(state->m_pmac_write));
338   state->m_pmc.d = 0;
339   state->m_pmc.w.l = 0;
340   state->m_pmc.w.h = 0;
341   state->m_emu_status = 0;
342   state->m_XST = 0;
343   state->m_XST2 = 0;
344
345   /* SVP stuff */
346   state->m_dram = auto_alloc_array(machine, UINT8, 0x20000);
347   machine.device("maincpu")->memory().space(AS_PROGRAM).install_ram(0x300000, 0x31ffff, state->m_dram);
348   machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa15000, 0xa150ff, FUNC(svp_68k_io_r), FUNC(svp_68k_io_w));
349   // "cell arrange" 1 and 2
350   machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x390000, 0x39ffff, FUNC(svp_68k_cell1_r));
351   machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x3a0000, 0x3affff, FUNC(svp_68k_cell2_r));
352
353   machine.device("svp")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x438, 0x438, FUNC(svp_speedup_r));
354
355   if (state->m_slotcart->m_cart->get_rom_base() != NULL)
356      memcpy(ROM, state->m_slotcart->m_cart->get_rom_base(), state->m_slotcart->m_cart->get_rom_size());
357
358   state->m_iram = auto_alloc_array(machine, UINT8, 0x800);
359   memset(state->m_iram, 0, sizeof(UINT8) * 0x800);
360   state->membank("bank3")->set_base(state->m_iram);
361   /* SVP ROM just shares m68k region.. */
362   state->membank("bank4")->set_base(ROM + 0x800);
363}
trunk/src/mess/mess.lst
r22035r22036
9898
9999megadrij  // 1988 Sega Mega Drive (Japan)
100100genesis   // 1989 Sega Genesis (USA)
101gensvp  // 1993 Sega Genesis (USA w/SVP chip)
102mdsvp
103mdsvpj
104101megadriv  // 1990 Sega Mega Drive (Europe)
105102pico      // 1994 Sega Pico (Europe)
106103picou    // 1994 Sega Pico (USA)

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