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r21944 Monday 18th March, 2013 at 14:30:38 UTC by David Haywood
deco_mlc - split up some handlers for unknown reads/writes
[src/mame/drivers]deco_mlc.c
[src/mame/includes]deco_mlc.h
[src/mame/video]deco_mlc.c

trunk/src/mame/drivers/deco_mlc.c
r21943r21944
8888        it is barely used by the game (only checked at startup).  See decoprot.c
8989
9090    Driver todo:
91        stadhr96 seems to require raster IRQ video update support.
91        stadhr96 - protection? issues (or 156 co-processor? or timing?)
92      avengrgs - doesn't generate enough line interrupts?
9293        ddream95 seems to have a dual screen mode(??)
94      hoops** - crash entering test mode (regression from 0.113 era?)
9395
9496    Driver by Bryan McPhail, bmcphail@tendril.co.uk, thank you to Avedis and The Guru.
9597
r21943r21944
115117   return machine().rand(); //0xffffffff;
116118}
117119
118READ32_MEMBER(deco_mlc_state::test3_r)
120READ32_MEMBER(deco_mlc_state::mlc_440000_r)
119121{
122   return 0xffffffff;
123}
124
125READ32_MEMBER(deco_mlc_state::mlc_440004_r)
126{
127   return 0xffffffff;
128}
129
130
131READ32_MEMBER(deco_mlc_state::mlc_440008_r)
132{
133   return 0xffffffff;
134}
135
136READ32_MEMBER(deco_mlc_state::mlc_44001c_r)
137{
120138/*
121139    test3 7 - vbl loop on 0x10 0000 at end of IRQ
122
140   avengrgs tests other bits too
123141*/
124142//if (offset==0)
125143//  return machine().rand()|(machine().rand()<<16);
126144//  logerror("%08x:  Test3_r %d\n",space.device().safe_pc(),offset);
145//   return 0x00100000;
127146   return 0xffffffff;
128147}
129148
149WRITE32_MEMBER(deco_mlc_state::mlc_44001c_w)
150{
151
152}
153
154READ32_MEMBER(deco_mlc_state::mlc_200070_r)
155{
156   m_vbl_i ^=0xffffffff;
157//logerror("vbl r %08x\n", space.device().safe_pc());
158   // Todo: Vblank probably in $10
159   return m_vbl_i;
160}
161
162READ32_MEMBER(deco_mlc_state::mlc_200000_r)
163{
164   return 0xffffffff;
165}
166
167READ32_MEMBER(deco_mlc_state::mlc_200004_r)
168{
169   return 0xffffffff;
170}
171
172READ32_MEMBER(deco_mlc_state::mlc_20007c_r)
173{
174   return 0xffffffff;
175}
176
177READ32_MEMBER(deco_mlc_state::mlc_scanline_r)
178{
179//  logerror("read scanline counter (%d)\n", machine().primary_screen->vpos());
180   return machine().primary_screen->vpos();
181}
182
183
130184WRITE32_MEMBER(deco_mlc_state::avengrs_eprom_w)
131185{
132186   device_t *device = machine().device("eeprom");
r21943r21944
153207   palette_set_color_rgb(machine(),offset,pal5bit(m_generic_paletteram_32[offset] >> 0),pal5bit(m_generic_paletteram_32[offset] >> 5),pal5bit(m_generic_paletteram_32[offset] >> 10));
154208}
155209
156READ32_MEMBER(deco_mlc_state::decomlc_vbl_r)
157{
158   m_vbl_i ^=0xffffffff;
159//logerror("vbl r %08x\n", space.device().safe_pc());
160   // Todo: Vblank probably in $10
161   return m_vbl_i;
162}
163210
164READ32_MEMBER(deco_mlc_state::mlc_scanline_r)
165{
166//  logerror("read scanline counter (%d)\n", machine().primary_screen->vpos());
167   return machine().primary_screen->vpos();
168}
169
170211TIMER_DEVICE_CALLBACK_MEMBER(deco_mlc_state::interrupt_gen)
171212{
172213//  logerror("hit scanline IRQ %d (%08x)\n", machine.primary_screen->vpos(), info.i);
r21943r21944
271312static ADDRESS_MAP_START( decomlc_map, AS_PROGRAM, 32, deco_mlc_state )
272313   AM_RANGE(0x0000000, 0x00fffff) AM_ROM AM_MIRROR(0xff000000)
273314   AM_RANGE(0x0100000, 0x011ffff) AM_RAM AM_SHARE("mlc_ram") AM_MIRROR(0xff000000)
274   AM_RANGE(0x0200000, 0x020000f) AM_READNOP AM_MIRROR(0xff000000)/* IRQ control? */
275   AM_RANGE(0x0200070, 0x0200073) AM_READ(decomlc_vbl_r) AM_MIRROR(0xff000000)
315   AM_RANGE(0x0200000, 0x0200003) AM_READ(mlc_200000_r) AM_MIRROR(0xff000000)
316   AM_RANGE(0x0200004, 0x0200007) AM_READ(mlc_200004_r) AM_MIRROR(0xff000000)
317   AM_RANGE(0x0200070, 0x0200073) AM_READ(mlc_200070_r) AM_MIRROR(0xff000000)
276318   AM_RANGE(0x0200074, 0x0200077) AM_READ(mlc_scanline_r) AM_MIRROR(0xff000000)
277   AM_RANGE(0x0200078, 0x020007f) AM_READ(test2_r) AM_MIRROR(0xff000000)
319   AM_RANGE(0x020007c, 0x020007f) AM_READ(mlc_20007c_r) AM_MIRROR(0xff000000)
278320   AM_RANGE(0x0200000, 0x020007f) AM_WRITE(mlc_irq_w) AM_SHARE("irq_ram") AM_MIRROR(0xff000000)
279321   AM_RANGE(0x0200080, 0x02000ff) AM_RAM AM_SHARE("mlc_clip_ram") AM_MIRROR(0xff000000)
280322   AM_RANGE(0x0204000, 0x0206fff) AM_READWRITE( mlc_spriteram_r, mlc_spriteram_w ) AM_MIRROR(0xff000000)
281323   AM_RANGE(0x0280000, 0x029ffff) AM_RAM AM_SHARE("mlc_vram") AM_MIRROR(0xff000000)
282324   AM_RANGE(0x0300000, 0x0307fff) AM_RAM_WRITE(avengrs_palette_w) AM_SHARE("paletteram") AM_MIRROR(0xff000000)
283325   AM_RANGE(0x0400000, 0x0400003) AM_READ_PORT("INPUTS") AM_MIRROR(0xff000000)
284   AM_RANGE(0x0440000, 0x044001f) AM_READ(test3_r) AM_MIRROR(0xff000000)
285   AM_RANGE(0x044001c, 0x044001f) AM_WRITENOP AM_MIRROR(0xff000000)
326   AM_RANGE(0x0440000, 0x0440003) AM_READ(mlc_440000_r) AM_MIRROR(0xff000000)
327   AM_RANGE(0x0440004, 0x0440007) AM_READ(mlc_440004_r) AM_MIRROR(0xff000000)
328   AM_RANGE(0x0440008, 0x044000b) AM_READ(mlc_440008_r) AM_MIRROR(0xff000000)
329   AM_RANGE(0x044001c, 0x044001f) AM_READWRITE(mlc_44001c_r, mlc_44001c_w) AM_MIRROR(0xff000000)
286330   AM_RANGE(0x0500000, 0x0500003) AM_WRITE(avengrs_eprom_w) AM_MIRROR(0xff000000)
287331   AM_RANGE(0x0600000, 0x0600007) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0xff000000) AM_MIRROR(0xff000000)
288332   AM_RANGE(0x070f000, 0x070ffff) AM_READWRITE(stadhr96_prot_146_r, stadhr96_prot_146_w) AM_MIRROR(0xff000000)
trunk/src/mame/includes/deco_mlc.h
r21943r21944
2727   UINT16 *m_mlc_spriteram_spare;
2828   UINT16 *m_mlc_buffered_spriteram;
2929   DECLARE_READ32_MEMBER(test2_r);
30   DECLARE_READ32_MEMBER(test3_r);
30   DECLARE_READ32_MEMBER(mlc_440000_r);
31   DECLARE_READ32_MEMBER(mlc_440004_r);
32   DECLARE_READ32_MEMBER(mlc_440008_r);
33   DECLARE_READ32_MEMBER(mlc_44001c_r);
34   DECLARE_WRITE32_MEMBER(mlc_44001c_w);
35
3136   DECLARE_WRITE32_MEMBER(avengrs_palette_w);
32   DECLARE_READ32_MEMBER(decomlc_vbl_r);
37   DECLARE_READ32_MEMBER(mlc_200000_r);
38   DECLARE_READ32_MEMBER(mlc_200004_r);
39   DECLARE_READ32_MEMBER(mlc_200070_r);
40   DECLARE_READ32_MEMBER(mlc_20007c_r);
3341   DECLARE_READ32_MEMBER(mlc_scanline_r);
3442   DECLARE_WRITE32_MEMBER(mlc_irq_w);
3543   DECLARE_READ32_MEMBER(mlc_vram_r);
trunk/src/mame/video/deco_mlc.c
r21943r21944
2121      m_colour_mask=0x3f;
2222   else
2323      m_colour_mask=0x1f;
24
24   
2525//  temp_bitmap = auto_bitmap_rgb32_alloc( machine(), 512, 512 );
2626   m_mlc_buffered_spriteram = auto_alloc_array(machine(), UINT16, 0x3000/2);
2727   m_mlc_spriteram_spare = auto_alloc_array(machine(), UINT16, 0x3000/2);

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