trunk/src/mess/drivers/clcd.c
| r21909 | r21910 | |
|---|
| 59 | 59 | return 0; |
| 60 | 60 | } |
| 61 | 61 | |
| 62 | | DECLARE_WRITE8_MEMBER(rambank_w) |
| 62 | DECLARE_WRITE8_MEMBER(ramwrite_w) |
| 63 | 63 | { |
| 64 | | // printf( "ram bank:%02x %02x\n", offset, data ); |
| 64 | // this area might be shared between rom & ram or it might be ram only |
| 65 | // printf( "ram write:%04x %02x\n", offset, data ); |
| 65 | 66 | } |
| 66 | 67 | |
| 68 | // these seem to control what appears in the memory space at various addresses. |
| 69 | // whether they just affect data access or instruction fetching as well is unknown. |
| 70 | |
| 71 | DECLARE_WRITE8_MEMBER(fa00_w) |
| 72 | { |
| 73 | // printf( "fa00\n" ); |
| 74 | } |
| 75 | |
| 76 | DECLARE_WRITE8_MEMBER(fa80_w) |
| 77 | { |
| 78 | // printf( "fa80\n" ); |
| 79 | } |
| 80 | |
| 81 | DECLARE_WRITE8_MEMBER(fb00_w) |
| 82 | { |
| 83 | // printf( "fb00\n" ); |
| 84 | } |
| 85 | |
| 86 | DECLARE_WRITE8_MEMBER(fb80_w) |
| 87 | { |
| 88 | // printf( "fb80\n" ); |
| 89 | } |
| 90 | |
| 91 | DECLARE_WRITE8_MEMBER(fc00_w) |
| 92 | { |
| 93 | // printf( "fc00\n" ); |
| 94 | } |
| 95 | |
| 96 | DECLARE_WRITE8_MEMBER(fc80_w) |
| 97 | { |
| 98 | // printf( "fc80\n" ); |
| 99 | } |
| 100 | |
| 101 | DECLARE_WRITE8_MEMBER(fd00_w) |
| 102 | { |
| 103 | // printf( "fd00\n" ); |
| 104 | } |
| 105 | |
| 106 | DECLARE_WRITE8_MEMBER(fd80_w) |
| 107 | { |
| 108 | // printf( "fd80\n" ); |
| 109 | } |
| 110 | |
| 111 | DECLARE_WRITE8_MEMBER(fe00_w) |
| 112 | { |
| 113 | // printf( "fe00\n" ); |
| 114 | } |
| 115 | |
| 116 | DECLARE_WRITE8_MEMBER(fe80_w) |
| 117 | { |
| 118 | // printf( "fe80\n" ); |
| 119 | } |
| 120 | |
| 67 | 121 | DECLARE_WRITE8_MEMBER(rombank_w) |
| 68 | 122 | { |
| 69 | | // printf( "rom bank %02x\n", data); |
| 123 | // printf( "rom bank %02x\n", data); |
| 124 | // this might be for ram banking |
| 70 | 125 | membank("bankedroms")->set_entry(0); |
| 71 | 126 | } |
| 72 | 127 | |
| 128 | DECLARE_WRITE8_MEMBER(ff80_w) |
| 129 | { |
| 130 | // printf( "ff80:%02x %02x\n", offset, data ); |
| 131 | } |
| 132 | |
| 73 | 133 | WRITE8_MEMBER( via0_pa_w ) |
| 74 | 134 | { |
| 75 | 135 | keyColumnSelect = data; |
| r21909 | r21910 | |
|---|
| 179 | 239 | AM_RANGE(0xf800, 0xf80f) AM_DEVREADWRITE("via0", via6522_device, read, write) |
| 180 | 240 | AM_RANGE(0xf880, 0xf88f) AM_DEVREADWRITE("via1", via6522_device, read, write) |
| 181 | 241 | AM_RANGE(0xf980, 0xf981) AM_DEVREADWRITE("acia", mos6551_device, read, write) |
| 242 | AM_RANGE(0xfa00, 0xfa00) AM_WRITE(fa00_w) |
| 243 | AM_RANGE(0xfa80, 0xfa80) AM_WRITE(fa80_w) |
| 244 | AM_RANGE(0xfb00, 0xfb00) AM_WRITE(fb00_w) |
| 245 | AM_RANGE(0xfb80, 0xfb80) AM_WRITE(fb80_w) |
| 246 | AM_RANGE(0xfc00, 0xfc00) AM_WRITE(fc00_w) |
| 247 | AM_RANGE(0xfc80, 0xfc80) AM_WRITE(fc80_w) |
| 248 | AM_RANGE(0xfd00, 0xfd00) AM_WRITE(fd00_w) |
| 249 | AM_RANGE(0xfd80, 0xfd80) AM_WRITE(fd80_w) |
| 250 | AM_RANGE(0xfe00, 0xfe00) AM_WRITE(fe00_w) |
| 251 | AM_RANGE(0xfe80, 0xfe80) AM_WRITE(fe80_w) |
| 182 | 252 | AM_RANGE(0xff00, 0xff00) AM_WRITE(rombank_w) |
| 183 | | AM_RANGE(0xff80, 0xff83) AM_WRITE(rambank_w) |
| 253 | AM_RANGE(0xff80, 0xff83) AM_WRITE(ff80_w) |
| 184 | 254 | AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("ram") |
| 185 | | AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bankedroms") |
| 255 | AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bankedroms") AM_WRITE(ramwrite_w) |
| 186 | 256 | AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("maincpu", 0) |
| 187 | 257 | ADDRESS_MAP_END |
| 188 | 258 | |