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r21777 Sunday 10th March, 2013 at 09:43:17 UTC by Fabio Priuli
(MESS) misc slot cleanups. nw.

[src/mess/machine]

gb_mbc.c gb_mbc.h gb_rom.c gb_rom.h gb_slot.c gb_slot.h md_eeprom.c md_eeprom.h md_jcart.c md_jcart.h md_rom.c md_rom.h md_slot.c md_slot.h md_stm95.c md_stm95.h sns_bsx.c sns_bsx.h sns_rom.c sns_rom.h sns_rom21.c sns_rom21.h sns_sdd1.c sns_sdd1.h sns_sfx.c sns_sfx.h sns_slot.h sns_spc7110.c sns_spc7110.h

trunk/src/mess/machine/md_slot.c

r21776	r21777
141	141	}
142	142
143	143	//-------------------------------------------------
144		//
145		//
	144	// get_padded_size
146	145	//-------------------------------------------------
147	146
148	147	UINT32 device_md_cart_interface::get_padded_size(UINT32 size)

trunk/src/mess/machine/md_slot.h

r21776	r21777
109	109	virtual UINT32 get_rom_size() { return m_rom_size; };
110	110	virtual UINT32 get_nvram_size() { return m_nvram_size; };
111	111
112		virtual void rom_map_setup(UINT32 size);
113		virtual UINT32 get_padded_size(UINT32 size);
	112	void rom_map_setup(UINT32 size);
	113	UINT32 get_padded_size(UINT32 size);
114	114
115	115	int m_nvram_start, m_nvram_end;
116	116	int m_nvram_active, m_nvram_readonly;
r21776	r21777
121	121	int m_nvram_handlers_installed;
122	122
123	123	// internal state
124		UINT16      *m_rom;
125		UINT16      *m_nvram;
	124	UINT16 *m_rom;
	125	UINT16 *m_nvram;
126	126	UINT32 m_rom_size;
127	127	UINT32 m_nvram_size;
128	128
r21776	r21777
151	151	virtual void call_unload();
152	152	virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry);
153	153
154		virtual int load_list();
155		virtual int load_nonlist();
156		virtual int get_cart_type(UINT8 *ROM, UINT32 len);
157
158
159		virtual void setup_custom_mappers();
160		virtual void setup_nvram();
161
162	154	virtual iodevice_t image_type() const { return IO_CARTSLOT; }
163	155	virtual bool is_readable()  const { return 1; }
164	156	virtual bool is_writeable() const { return 0; }
r21776	r21777
169	161
170	162	// slot interface overrides
171	163	virtual const char * get_default_card_software(const machine_config &config, emu_options &options);
172
	164
	165	int load_list();
	166	int load_nonlist();
	167	int get_cart_type(UINT8 *ROM, UINT32 len);
	168
	169	void setup_custom_mappers();
	170	void setup_nvram();
	171
173	172	// reading and writing
174	173	virtual DECLARE_READ16_MEMBER(read);
175	174	virtual DECLARE_WRITE16_MEMBER(write);

trunk/src/mess/machine/gb_slot.c

r21776	r21777
130	130	ram_bank_map[i] = i & mask;
131	131	}
132	132
	133
133	134	//**************************************************************************
134	135	//  LIVE DEVICE
135	136	//**************************************************************************
r21776	r21777
219	220	{ GB_MBC_DIGIMON, "rom_digimon" },
220	221	{ GB_MBC_ROCKMAN8, "rom_rock8" },
221	222	{ GB_MBC_SM3SP, "rom_sm3sp" },
	223	{ GB_MBC_UNK01, "rom_unk01" },
	224	{ GB_MBC_DKONG5, "rom_dkong5" },
222	225	{ GB_MBC_CAMERA, "rom_camera" }
223	226	};
224	227

trunk/src/mess/machine/gb_slot.h

r21776	r21777
32	32	GB_MBC_DIGIMON,
33	33	GB_MBC_ROCKMAN8,
34	34	GB_MBC_SM3SP,
	35	GB_MBC_DKONG5,
	36	GB_MBC_UNK01,
35	37	GB_MBC_MEGADUCK,     /* MEGADUCK style banking                        */
36	38	GB_MBC_UNKNOWN       /* Unknown mapper                                */
37	39	};
r21776	r21777
59	61	virtual DECLARE_READ8_MEMBER(read_ram) { return 0xff; }
60	62	virtual DECLARE_WRITE8_MEMBER(write_ram) {}
61	63
62		virtual void rom_alloc(running_machine &machine, UINT32 size);
63		virtual void ram_alloc(running_machine &machine, UINT32 size);
64		virtual UINT8* get_rom_base() { return m_rom; }
65		virtual UINT8* get_ram_base() { return m_ram; }
66		virtual UINT32 get_rom_size() { return m_rom_size; }
67		virtual UINT32 get_ram_size() { return m_ram_size; }
	64	void rom_alloc(running_machine &machine, UINT32 size);
	65	void ram_alloc(running_machine &machine, UINT32 size);
	66	UINT8* get_rom_base() { return m_rom; }
	67	UINT8* get_ram_base() { return m_ram; }
	68	UINT32 get_rom_size() { return m_rom_size; }
	69	UINT32 get_ram_size() { return m_ram_size; }
68	70
69		virtual void rom_map_setup(UINT32 size);
70		virtual void ram_map_setup(UINT8 banks);
	71	void rom_map_setup(UINT32 size);
	72	void ram_map_setup(UINT8 banks);
71	73
72		virtual void set_has_timer(bool val) { has_timer = val; }
73		virtual void set_has_rumble(bool val) { has_rumble = val; }
74		virtual void set_has_battery(bool val) { has_battery = val; }
75		virtual bool get_has_battery() { return has_battery; }
	74	void set_has_timer(bool val) { has_timer = val; }
	75	void set_has_rumble(bool val) { has_rumble = val; }
	76	void set_has_battery(bool val) { has_battery = val; }
	77	bool get_has_battery() { return has_battery; }
76	78
77	79	// internal state
78		UINT8      *m_rom;
79		UINT8      *m_ram;
	80	UINT8  *m_rom;
	81	UINT8  *m_ram;
80	82	UINT32 m_rom_size;
81	83	UINT32 m_ram_size;
82	84
r21776	r21777
117	119	virtual void call_unload();
118	120	virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry);
119	121
120		virtual int get_type() { return m_type; }
121		virtual int get_cart_type(UINT8 *ROM, UINT32 len);
122		virtual bool get_mmm01_candidate(UINT8 *ROM, UINT32 len);
	122	int get_type() { return m_type; }
	123	int get_cart_type(UINT8 *ROM, UINT32 len);
	124	bool get_mmm01_candidate(UINT8 *ROM, UINT32 len);
123	125
124		virtual void setup_ram(UINT8 banks);
125		virtual void internal_header_logging(UINT8 *ROM, UINT32 len);
	126	void setup_ram(UINT8 banks);
	127	void internal_header_logging(UINT8 *ROM, UINT32 len);
126	128
127	129	virtual iodevice_t image_type() const { return IO_CARTSLOT; }
128	130	virtual bool is_readable()  const { return 1; }

trunk/src/mess/machine/gb_rom.c

r21776	r21777
78	78	}
79	79
80	80
81		void gb_rom_device::device_start()
	81	//-------------------------------------------------
	82	//  shared_start
	83	//-------------------------------------------------
	84
	85	void gb_rom_device::shared_start()
82	86	{
83		// these actually never change for base carts, so no need to save them
84		m_latch_bank = 0;
85		m_ram_bank = 0;
	87	save_item(NAME(m_latch_bank));
	88	save_item(NAME(m_latch_bank2));
	89	save_item(NAME(m_ram_bank));
86	90	}
87	91
88		void megaduck_rom_device::device_start()
	92	//-------------------------------------------------
	93	//  shared_reset
	94	//-------------------------------------------------
	95
	96	void gb_rom_device::shared_reset()
89	97	{
	98	m_ram_bank = 0;
90	99	m_latch_bank = 0;
91	100	m_latch_bank2 = 1;
92		save_item(NAME(m_latch_bank));
93		save_item(NAME(m_latch_bank2));
	101
	102	has_rumble = FALSE;
	103	has_timer = FALSE;
	104	has_battery = FALSE;
94	105	}
95	106
	107	//-------------------------------------------------
	108	//  mapper specific start/reset
	109	//-------------------------------------------------
	110
96	111	void gb_rom_tama5_device::device_start()
97	112	{
98		m_tama5_data = 0;
99		m_tama5_addr= 0;
100		m_tama5_cmd = 0;
101		memset(m_regs, 0xff, sizeof(m_regs));
102		m_rtc_reg = 0xff;
103		m_ram_bank = 0;
	113	shared_start();
104	114	save_item(NAME(m_tama5_data));
105	115	save_item(NAME(m_tama5_addr));
106	116	save_item(NAME(m_tama5_cmd));
107	117	save_item(NAME(m_regs));
108	118	save_item(NAME(m_rtc_reg));
109		save_item(NAME(m_ram_bank));
110	119	}
111	120
112		void gb_rom_wisdom_device::device_start()
	121	void gb_rom_tama5_device::device_reset()
113	122	{
114		m_latch_bank = 0;
115		m_ram_bank = 0;
116		save_item(NAME(m_latch_bank));
117		save_item(NAME(m_ram_bank));
	123	shared_reset();
	124	m_tama5_data = 0;
	125	m_tama5_addr= 0;
	126	m_tama5_cmd = 0;
	127	memset(m_regs, 0xff, sizeof(m_regs));
	128	m_rtc_reg = 0xff;
118	129	}
119	130
120		void gb_rom_yong_device::device_start()
	131
	132	// these are identical to shared ones above, but megaduck cart class is not derived from gb cart class...
	133	void megaduck_rom_device::device_start()
121	134	{
122		m_latch_bank = 0;
123		m_latch_bank2 = 1;
124		m_ram_bank = 0;
125	135	save_item(NAME(m_latch_bank));
126	136	save_item(NAME(m_latch_bank2));
127	137	save_item(NAME(m_ram_bank));
128	138	}
129	139
130		void gb_rom_atvrac_device::device_start()
	140	void megaduck_rom_device::device_reset()
131	141	{
132		m_latch_bank = 0;
133		m_latch_bank2 = 1;
134	142	m_ram_bank = 0;
135		save_item(NAME(m_latch_bank));
136		save_item(NAME(m_latch_bank2));
137		save_item(NAME(m_ram_bank));
138		}
139
140		void gb_rom_lasama_device::device_start()
141		{
142	143	m_latch_bank = 0;
143	144	m_latch_bank2 = 1;
144		m_ram_bank = 0;
145		save_item(NAME(m_latch_bank));
146		save_item(NAME(m_latch_bank2));
147		save_item(NAME(m_ram_bank));
	145
	146	has_rumble = FALSE;
	147	has_timer = FALSE;
	148	has_battery = FALSE;
148	149	}
149	150
	151
150	152	/*-------------------------------------------------
151	153	mapper specific handlers
152	154	-------------------------------------------------*/

trunk/src/mess/machine/gb_rom.h

r21776	r21777
15	15	gb_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
16	16
17	17	// device-level overrides
18		virtual void device_start();
	18	virtual void device_start() { shared_start(); };
	19	virtual void device_reset() { shared_reset(); };
19	20	virtual void device_config_complete() { m_shortname = "gb_rom"; }
20
	21
	22	void shared_start();
	23	void shared_reset();
	24
21	25	// reading and writing
22	26	virtual DECLARE_READ8_MEMBER(read_rom);
23	27	virtual DECLARE_READ8_MEMBER(read_ram);
r21776	r21777
33	37
34	38	// device-level overrides
35	39	virtual void device_start();
	40	virtual void device_reset();
36	41	virtual void device_config_complete() { m_shortname = "gb_rom_tama5"; }
37	42
38	43	// reading and writing
r21776	r21777
52	57	gb_rom_wisdom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
53	58
54	59	// device-level overrides
55		virtual void device_start();
	60	virtual void device_start() { shared_start(); };
	61	virtual void device_reset() { shared_reset(); };
56	62	virtual void device_config_complete() { m_shortname = "gb_rom_wisdom"; }
57	63
58	64	// reading and writing
r21776	r21777
68	74	gb_rom_yong_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
69	75
70	76	// device-level overrides
71		virtual void device_start();
	77	virtual void device_start() { shared_start(); };
	78	virtual void device_reset() { shared_reset(); };
72	79	virtual void device_config_complete() { m_shortname = "gb_rom_yong"; }
73	80
74	81	// reading and writing
r21776	r21777
84	91	gb_rom_atvrac_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
85	92
86	93	// device-level overrides
87		virtual void device_start();
	94	virtual void device_start() { shared_start(); };
	95	virtual void device_reset() { shared_reset(); };
88	96	virtual void device_config_complete() { m_shortname = "gb_rom_atvrac"; }
89	97
90	98	// reading and writing
r21776	r21777
100	108	gb_rom_lasama_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
101	109
102	110	// device-level overrides
103		virtual void device_start();
	111	virtual void device_start() { shared_start(); };
	112	virtual void device_reset() { shared_reset(); };
104	113	virtual void device_config_complete() { m_shortname = "gb_rom_lasama"; }
105	114
106	115	// reading and writing
r21776	r21777
109	118	};
110	119
111	120
112
113
114	121	// ======================> megaduck_rom_device
115	122	class megaduck_rom_device :public device_t,
116	123	public device_gb_cart_interface
r21776	r21777
122	129
123	130	// device-level overrides
124	131	virtual void device_start();
	132	virtual void device_reset();
125	133	virtual void device_config_complete() { m_shortname = "megaduck_rom"; }
126
	134
127	135	// reading and writing
128	136	virtual DECLARE_READ8_MEMBER(read_rom);
129	137	virtual DECLARE_WRITE8_MEMBER(write_bank);

trunk/src/mess/machine/md_stm95.c

r21776	r21777
176	176
177	177	void md_eeprom_stm95_device::device_start()
178	178	{
	179	nvram_alloc(machine(), M95320_SIZE);
	180	m_stm95.eeprom_data = (UINT8*)get_nvram_base();
	181
	182	save_item(NAME(m_rdcnt));
	183	save_item(NAME(m_bank));
	184	//TODO: save and restore the m_stm95...
	185	}
	186
	187	void md_eeprom_stm95_device::device_reset()
	188	{
179	189	m_rdcnt = 0;
180	190	m_bank[0] = 0;
181	191	m_bank[1] = 0;
182	192	m_bank[2] = 0;
183		nvram_alloc(machine(), M95320_SIZE);
184		m_stm95.eeprom_data = (UINT8*)get_nvram_base();
185	193	}
186	194
187	195	/*-------------------------------------------------

trunk/src/mess/machine/md_stm95.h

r21776	r21777
63	63
64	64	// device-level overrides
65	65	virtual void device_start();
	66	virtual void device_reset();
66	67	virtual void device_config_complete() { m_shortname = "md_eeprom_stm95"; }
67	68
68	69	// reading and writing

trunk/src/mess/machine/sns_rom21.c

r21776	r21777
40	40
41	41	void sns_rom21_device::device_start()
42	42	{
43		memset(rom_bank_map, 0, sizeof(rom_bank_map));
44	43	}
45	44
	45	void sns_rom21_device::device_reset()
	46	{
	47	}
	48
46	49	void sns_rom21_srtc_device::device_start()
47	50	{
48		memset(rom_bank_map, 0, sizeof(rom_bank_map));
	51	save_item(NAME(m_mode));
	52	save_item(NAME(m_index));
	53	save_item(NAME(m_rtc_ram));
	54	}
49	55
	56	void sns_rom21_srtc_device::device_reset()
	57	{
50	58	m_mode = RTCM_Read;
51	59	m_index = -1;
52
	60	memset(m_rtc_ram, 0, sizeof(m_rtc_ram));
	61
53	62	// at this stage, rtc_ram is not yet allocated. this will be fixed when converting RTC to be a separate device.
54	63	//  update_time();
55
56		save_item(NAME(m_mode));
57		save_item(NAME(m_index));
58	64	}
59	65
60	66	/*-------------------------------------------------

trunk/src/mess/machine/sns_rom21.h

r21776	r21777
16	16
17	17	// device-level overrides
18	18	virtual void device_start();
	19	virtual void device_reset();
19	20	virtual void device_config_complete() { m_shortname = "sns_rom21"; }
20	21
21	22	// reading and writing
r21776	r21777
33	34
34	35	// device-level overrides
35	36	virtual void device_start();
	37	virtual void device_reset();
36	38	virtual void device_config_complete() { m_shortname = "sns_rom21_srtc"; }
37	39
38	40	// reading and writing

trunk/src/mess/machine/sns_spc7110.c

r21776	r21777
46	46
47	47	void sns_rom_spc7110_device::spc7110_start()
48	48	{
49		memset(m_ram, 0, sizeof(m_ram));
50		m_r4801 = 0x00;
51		m_r4802 = 0x00;
52		m_r4803 = 0x00;
53		m_r4804 = 0x00;
54		m_r4805 = 0x00;
55		m_r4806 = 0x00;
56		m_r4807 = 0x00;
57		m_r4808 = 0x00;
58		m_r4809 = 0x00;
59		m_r480a = 0x00;
60		m_r480b = 0x00;
61		m_r480c = 0x00;
62
63		m_r4811 = 0x00;
64		m_r4812 = 0x00;
65		m_r4813 = 0x00;
66		m_r4814 = 0x00;
67		m_r4815 = 0x00;
68		m_r4816 = 0x00;
69		m_r4817 = 0x00;
70		m_r4818 = 0x00;
71
72		m_r481x = 0x00;
73		m_r4814_latch = 0;
74		m_r4815_latch = 0;
75
76		m_r4820 = 0x00;
77		m_r4821 = 0x00;
78		m_r4822 = 0x00;
79		m_r4823 = 0x00;
80		m_r4824 = 0x00;
81		m_r4825 = 0x00;
82		m_r4826 = 0x00;
83		m_r4827 = 0x00;
84		m_r4828 = 0x00;
85		m_r4829 = 0x00;
86		m_r482a = 0x00;
87		m_r482b = 0x00;
88		m_r482c = 0x00;
89		m_r482d = 0x00;
90		m_r482e = 0x00;
91		m_r482f = 0x00;
92
93		m_r4830 = 0x00;
94		m_r4831 = 0;
95		m_dx_offset = spc7110_datarom_addr(0 * 0x100000, 0x200000); // we would need the rom length here...
96		m_r4832 = 1;
97		m_ex_offset = spc7110_datarom_addr(1 * 0x100000, 0x200000); // we would need the rom length here...
98		m_r4833 = 2;
99		m_fx_offset = spc7110_datarom_addr(2 * 0x100000, 0x200000); // we would need the rom length here...
100		m_r4834 = 0x00;
101
102		m_r4840 = 0x00;
103		m_r4841 = 0x00;
104		m_r4842 = 0x00;
105
106	49	m_decomp = auto_alloc(machine(), SPC7110_Decomp(machine()));
107	50
108	51	save_item(NAME(m_ram));
r21776	r21777
159	102	// TODO: save decomp-related items and fix their restore...
160	103	}
161	104
	105	void sns_rom_spc7110_device::spc7110_reset()
	106	{
	107	memset(m_ram, 0, sizeof(m_ram));
	108	m_r4801 = 0x00;
	109	m_r4802 = 0x00;
	110	m_r4803 = 0x00;
	111	m_r4804 = 0x00;
	112	m_r4805 = 0x00;
	113	m_r4806 = 0x00;
	114	m_r4807 = 0x00;
	115	m_r4808 = 0x00;
	116	m_r4809 = 0x00;
	117	m_r480a = 0x00;
	118	m_r480b = 0x00;
	119	m_r480c = 0x00;
	120
	121	m_r4811 = 0x00;
	122	m_r4812 = 0x00;
	123	m_r4813 = 0x00;
	124	m_r4814 = 0x00;
	125	m_r4815 = 0x00;
	126	m_r4816 = 0x00;
	127	m_r4817 = 0x00;
	128	m_r4818 = 0x00;
	129
	130	m_r481x = 0x00;
	131	m_r4814_latch = 0;
	132	m_r4815_latch = 0;
	133
	134	m_r4820 = 0x00;
	135	m_r4821 = 0x00;
	136	m_r4822 = 0x00;
	137	m_r4823 = 0x00;
	138	m_r4824 = 0x00;
	139	m_r4825 = 0x00;
	140	m_r4826 = 0x00;
	141	m_r4827 = 0x00;
	142	m_r4828 = 0x00;
	143	m_r4829 = 0x00;
	144	m_r482a = 0x00;
	145	m_r482b = 0x00;
	146	m_r482c = 0x00;
	147	m_r482d = 0x00;
	148	m_r482e = 0x00;
	149	m_r482f = 0x00;
	150
	151	m_r4830 = 0x00;
	152	m_r4831 = 0;
	153	m_dx_offset = spc7110_datarom_addr(0 * 0x100000, 0x200000); // we would need the rom length here...
	154	m_r4832 = 1;
	155	m_ex_offset = spc7110_datarom_addr(1 * 0x100000, 0x200000); // we would need the rom length here...
	156	m_r4833 = 2;
	157	m_fx_offset = spc7110_datarom_addr(2 * 0x100000, 0x200000); // we would need the rom length here...
	158	m_r4834 = 0x00;
	159
	160	m_r4840 = 0x00;
	161	m_r4841 = 0x00;
	162	m_r4842 = 0x00;
	163	}
	164
162	165	void sns_rom_spc7110_device::device_start()
163	166	{
164		memset(rom_bank_map, 0, sizeof(rom_bank_map));
165
166	167	spc7110_start();
167	168	}
168	169
	170	void sns_rom_spc7110_device::device_reset()
	171	{
	172	spc7110_reset();
	173	}
	174
169	175	void sns_rom_spc7110rtc_device::device_start()
170	176	{
171		memset(rom_bank_map, 0, sizeof(rom_bank_map));
172
173	177	spc7110_start();
174	178
	179	save_item(NAME(m_rtc_state));
	180	save_item(NAME(m_rtc_mode));
	181	save_item(NAME(m_rtc_index));
	182	save_item(NAME(m_rtc_offset));
	183	}
	184
	185	void sns_rom_spc7110rtc_device::device_reset()
	186	{
	187	spc7110_reset();
	188
175	189	// RTC
176	190	m_rtc_state = RTCS_Inactive;
177	191	m_rtc_mode  = RTCM_Linear;
178	192	m_rtc_index = 0;
179	193	m_rtc_offset = 0;
180
181		// at this stage, rtc_ram is not yet allocated. this will be fixed when converting RTC to be a separate device.
	194
	195	// at this stage, rtc_ram is not yet allocated. this will be fixed when converting RTC to be a separate device.
182	196	//  spc7110_update_time(0);
183
184		save_item(NAME(m_rtc_state));
185		save_item(NAME(m_rtc_mode));
186		save_item(NAME(m_rtc_index));
187		save_item(NAME(m_rtc_offset));
188	197	}
189	198
190	199

trunk/src/mess/machine/sns_spc7110.h

r21776	r21777
77	77
78	78	// device-level overrides
79	79	virtual void device_start();
	80	virtual void device_reset();
80	81	virtual void device_config_complete() { m_shortname = "sns_rom_spc7110"; }
81	82
82	83	// reading and writing
r21776	r21777
89	90	virtual DECLARE_WRITE8_MEMBER(chip_write);
90	91
91	92	void spc7110_start();
	93	void spc7110_reset();
92	94	UINT32 spc7110_datarom_addr(UINT32 addr, UINT32 len);
93	95	UINT32 spc7110_data_pointer();
94	96	UINT32 spc7110_data_adjust();
r21776	r21777
192	194
193	195	// device-level overrides
194	196	virtual void device_start();
	197	virtual void device_reset();
195	198	virtual void device_config_complete() { m_shortname = "sns_rom_spc7110rtc"; }
196	199
197	200	// reading and writing

trunk/src/mess/machine/sns_sdd1.c

r21776	r21777
427	427
428	428	void sns_rom_sdd1_device::device_start()
429	429	{
430		UINT8 i;
	430	m_sdd1emu = auto_alloc(machine(), SDD1__emu(machine()));
431	431
	432	m_buffer.data = (UINT8*)auto_alloc_array(machine(), UINT8, 0x10000);
	433	m_buffer.ready = 0;
	434
	435	save_item(NAME(m_sdd1_enable));
	436	save_item(NAME(m_xfer_enable));
	437	save_item(NAME(m_mmc));
	438	// TODO: save decomp-related and dma-related items and fix their restore...
	439	}
	440
	441	void sns_rom_sdd1_device::device_reset()
	442	{
432	443	m_sdd1_enable = 0x00;
433	444	m_xfer_enable = 0x00;
434
	445
435	446	m_mmc[0] = 0 << 20;
436	447	m_mmc[1] = 1 << 20;
437	448	m_mmc[2] = 2 << 20;
438	449	m_mmc[3] = 3 << 20;
439
440		for(i = 0; i < 8; i++)
	450
	451	for(int i = 0; i < 8; i++)
441	452	{
442	453	m_dma[i].addr = 0;
443	454	m_dma[i].size = 0;
444		}
445
446		m_sdd1emu = auto_alloc(machine(), SDD1__emu(machine()));
447
448		m_buffer.data = (UINT8*)auto_alloc_array(machine(), UINT8, 0x10000);
449		m_buffer.ready = 0;
450
451		save_item(NAME(m_sdd1_enable));
452		save_item(NAME(m_xfer_enable));
453		save_item(NAME(m_mmc));
454		// TODO: save decomp-related and dma-related items and fix their restore...
	455	}
455	456	}
456	457
457	458	/*-------------------------------------------------

trunk/src/mess/machine/sns_sdd1.h

r21776	r21777
145	145
146	146	// device-level overrides
147	147	virtual void device_start();
	148	virtual void device_reset();
148	149	virtual void device_config_complete() { m_shortname = "sns_rom_sdd1"; }
149	150
150	151	// reading and writing

trunk/src/mess/machine/sns_sfx.c

r21776	r21777
30	30	save_item(NAME(sfx_ram));
31	31	}
32	32
	33	void sns_rom_superfx_device::device_reset()
	34	{
	35	memset(sfx_ram, 0x00, sizeof(sfx_ram));
	36	}
	37
33	38	/*-------------------------------------------------
34	39	mapper specific handlers
35	40	-------------------------------------------------*/

trunk/src/mess/machine/sns_sfx.h

r21776	r21777
16	16
17	17	// device-level overrides
18	18	virtual void device_start();
	19	virtual void device_reset();
19	20	virtual void device_config_complete() { m_shortname = "sns_rom_superfx"; }
20	21	virtual machine_config_constructor device_mconfig_additions() const;
21	22

trunk/src/mess/machine/sns_rom.c

r21776	r21777
47	47
48	48	void sns_rom_device::device_start()
49	49	{
50		memset(rom_bank_map, 0, sizeof(rom_bank_map));
51	50	}
52	51
53	52	void sns_rom_pokemon_device::device_start()
54	53	{
55		m_latch = 0;
56	54	save_item(NAME(m_latch));
57	55	}
58	56
	57	void sns_rom_pokemon_device::device_reset()
	58	{
	59	m_latch = 0;
	60	}
	61
59	62	void sns_rom_obc1_device::device_start()
60	63	{
	64	save_item(NAME(m_ram));
	65	save_item(NAME(m_address));
	66	save_item(NAME(m_offset));
	67	save_item(NAME(m_shift));
	68	}
	69
	70	void sns_rom_obc1_device::device_reset()
	71	{
61	72	memset(m_ram, 0xff, sizeof(m_ram));
62	73	// or from rom?
63	74	m_offset  = (m_ram[0x1ff5] & 0x01) ? 0x1800 : 0x1c00;
64	75	m_address = (m_ram[0x1ff6] & 0x7f);
65	76	m_shift   = (m_ram[0x1ff6] & 0x03) << 1;
66
67		save_item(NAME(m_ram));
68		save_item(NAME(m_address));
69		save_item(NAME(m_offset));
70		save_item(NAME(m_shift));
71	77	}
72	78
73	79

trunk/src/mess/machine/sns_rom.h

r21776	r21777
33	33
34	34	// device-level overrides
35	35	virtual void device_start();
	36	virtual void device_reset();
36	37	virtual void device_config_complete() { m_shortname = "sns_rom_pokemon"; }
37	38
38	39	// reading and writing
r21776	r21777
51	52
52	53	// device-level overrides
53	54	virtual void device_start();
	55	virtual void device_reset();
54	56	virtual void device_config_complete() { m_shortname = "sns_rom_obc1"; }
55	57
56	58	// additional reading and writing

trunk/src/mess/machine/gb_mbc.c

r21776	r21777
108	108	}
109	109
110	110
111		void gb_rom_mbc_device::device_start()
112		{
113		has_timer = FALSE;
114		has_rumble = FALSE;
	111	//-------------------------------------------------
	112	//  shared_start
	113	//-------------------------------------------------
115	114
116		m_latch_bank = 0;
117		m_latch_bank2 = 1;
118		m_ram_enable = 0;
119		m_ram_bank = 0;
120		m_mode = 0;
121		save_item(NAME(m_latch_bank));
122		save_item(NAME(m_latch_bank2));
123		save_item(NAME(m_ram_bank));
124		save_item(NAME(m_ram_enable));
125		save_item(NAME(m_mode));
126		}
127
128		void gb_rom_mbc1_device::device_start()
	115	void gb_rom_mbc_device::shared_start()
129	116	{
130		has_timer = FALSE;
131		has_rumble = FALSE;
132
133		m_latch_bank = 0;
134		m_latch_bank2 = 1;
135		m_ram_bank = 0;
136		m_ram_enable = 0;
137		m_mode = 0;
138	117	save_item(NAME(m_latch_bank));
139	118	save_item(NAME(m_latch_bank2));
140	119	save_item(NAME(m_ram_bank));
r21776	r21777
142	121	save_item(NAME(m_mode));
143	122	}
144	123
145		void gb_rom_mbc1col_device::device_start()
146		{
147		has_timer = FALSE;
148		has_rumble = FALSE;
	124	//-------------------------------------------------
	125	//  shared_reset
	126	//-------------------------------------------------
149	127
150		m_latch_bank = 0;
151		m_latch_bank2 = 1;
152		m_ram_bank = 0;
153		m_ram_enable = 0;
154		m_mode = 0;
155		save_item(NAME(m_latch_bank));
156		save_item(NAME(m_latch_bank2));
157		save_item(NAME(m_ram_bank));
158		save_item(NAME(m_ram_enable));
159		save_item(NAME(m_mode));
160		}
161
162		void gb_rom_mbc2_device::device_start()
	128	void gb_rom_mbc_device::shared_reset()
163	129	{
164		has_timer = FALSE;
165		has_rumble = FALSE;
166
167	130	m_latch_bank = 0;
168	131	m_latch_bank2 = 1;
169	132	m_ram_bank = 0;
170	133	m_ram_enable = 0;
171	134	m_mode = 0;
172		save_item(NAME(m_latch_bank));
173		save_item(NAME(m_latch_bank2));
174		save_item(NAME(m_ram_bank));
175		save_item(NAME(m_ram_enable));
176		save_item(NAME(m_mode));
	135
	136	has_rumble = FALSE;
	137	has_timer = FALSE;
	138	has_battery = FALSE;
177	139	}
178	140
	141	//-------------------------------------------------
	142	//  mapper specific start/reset
	143	//-------------------------------------------------
	144
179	145	void gb_rom_mbc3_device::device_start()
180	146	{
181		has_timer = FALSE;
182		has_rumble = FALSE;
183
184		m_latch_bank = 0;
185		m_latch_bank2 = 1;
186		m_ram_bank = 0;
187		m_ram_enable = 0;
188		m_mode = 0;
189		memset(m_rtc_map, 0, sizeof(m_rtc_map));
190		save_item(NAME(m_latch_bank));
191		save_item(NAME(m_latch_bank2));
192		save_item(NAME(m_ram_bank));
193		save_item(NAME(m_ram_enable));
194		save_item(NAME(m_mode));
	147	shared_start();
195	148	save_item(NAME(m_rtc_map));
196	149	}
197	150
198		void gb_rom_mbc5_device::device_start()
	151	void gb_rom_mbc3_device::device_reset()
199	152	{
200		has_timer = FALSE;
201		has_rumble = FALSE;
	153	shared_reset();
	154	memset(m_rtc_map, 0, sizeof(m_rtc_map));
	155	}
202	156
203		m_latch_bank = 0;
204		m_latch_bank2 = 1;
205		m_ram_bank = 0;
206		m_ram_enable = 0;
207		m_mode = 0;
	157	void gb_rom_mbc6_device::device_start()
	158	{
	159	save_item(NAME(m_bank_4000));
	160	save_item(NAME(m_bank_6000));
	161	save_item(NAME(m_latch1));
	162	save_item(NAME(m_latch2));
208	163	save_item(NAME(m_latch_bank));
209	164	save_item(NAME(m_latch_bank2));
210	165	save_item(NAME(m_ram_bank));
r21776	r21777
212	167	save_item(NAME(m_mode));
213	168	}
214	169
215		void gb_rom_mbc6_device::device_start()
	170	void gb_rom_mbc6_device::device_reset()
216	171	{
217		has_timer = FALSE;
218		has_rumble = FALSE;
219
220	172	m_bank_4000 = 2;    // correct default?
221	173	m_bank_6000 = 3;    // correct default?
222	174	m_latch1 = 0;   // correct default?
223	175	m_latch2 = 0;   // correct default?
224
	176
225	177	m_latch_bank = 2;   // correct default?
226	178	m_latch_bank2 = 3;  // correct default?
227	179	m_ram_bank = 0;
228	180	m_ram_enable = 0;
229	181	m_mode = 0;
230
231		save_item(NAME(m_bank_4000));
232		save_item(NAME(m_bank_6000));
233		save_item(NAME(m_latch1));
234		save_item(NAME(m_latch2));
235		save_item(NAME(m_latch_bank));
236		save_item(NAME(m_latch_bank2));
237		save_item(NAME(m_ram_bank));
238		save_item(NAME(m_ram_enable));
239		save_item(NAME(m_mode));
240	182	}
241	183
242		void gb_rom_mbc7_device::device_start()
	184	void gb_rom_mmm01_device::device_start()
243	185	{
244		has_timer = FALSE;
245		has_rumble = TRUE;
246
247		m_latch_bank = 0;
248		m_latch_bank2 = 1;
249		m_ram_bank = 0;
250		m_ram_enable = 0;
251		save_item(NAME(m_latch_bank));
252		save_item(NAME(m_latch_bank2));
253		save_item(NAME(m_ram_bank));
254		save_item(NAME(m_ram_enable));
	186	shared_start();
	187	save_item(NAME(m_bank_mask));
	188	save_item(NAME(m_bank));
	189	save_item(NAME(m_reg));
255	190	}
256	191
257		void gb_rom_mmm01_device::device_start()
	192	void gb_rom_mmm01_device::device_reset()
258	193	{
259		has_timer = FALSE;
260		has_rumble = TRUE;
261
262	194	m_latch_bank = 0x200 - 2;
263	195	m_latch_bank2 = 0x200 - 1;
264	196	m_ram_bank = 0;
265	197	m_bank_mask = 0xff;
266	198	m_bank = 0;
267	199	m_reg = 0;
268		save_item(NAME(m_latch_bank));
269		save_item(NAME(m_latch_bank2));
270		save_item(NAME(m_ram_bank));
271		save_item(NAME(m_bank_mask));
272		save_item(NAME(m_bank));
273		save_item(NAME(m_reg));
274	200	}
275	201
276	202	void gb_rom_sintax_device::device_start()
277	203	{
278		has_timer = FALSE;
279		has_rumble = FALSE;
280
281		m_latch_bank = 0;
282		m_latch_bank2 = 1;
283		m_ram_bank = 0;
284		m_ram_enable = 0;
285		m_mode = 0;
	204	shared_start();
	205	save_item(NAME(m_sintax_mode));
	206	save_item(NAME(m_currentxor));
	207	save_item(NAME(m_xor2));
	208	save_item(NAME(m_xor3));
	209	save_item(NAME(m_xor4));
	210	save_item(NAME(m_xor5));
	211	}
286	212
	213	void gb_rom_sintax_device::device_reset()
	214	{
	215	shared_reset();
287	216	m_sintax_mode = 0;
288	217	m_currentxor = 0;
289	218	m_xor2 = 0;
290	219	m_xor3 = 0;
291	220	m_xor4 = 0;
292	221	m_xor5 = 0;
293
294		save_item(NAME(m_latch_bank));
295		save_item(NAME(m_latch_bank2));
296		save_item(NAME(m_ram_bank));
297		save_item(NAME(m_ram_enable));
298		save_item(NAME(m_mode));
299		save_item(NAME(m_sintax_mode));
300		save_item(NAME(m_currentxor));
301		save_item(NAME(m_xor2));
302		save_item(NAME(m_xor3));
303		save_item(NAME(m_xor4));
304		save_item(NAME(m_xor5));
305	222	}
306	223
307	224	void gb_rom_chongwu_device::device_start()
308	225	{
309		has_timer = FALSE;
310		has_rumble = FALSE;
311
312		m_latch_bank = 0;
313		m_latch_bank2 = 1;
314		m_ram_bank = 0;
315		m_ram_enable = 0;
316		m_mode = 0;
317		m_protection_checked = 0;
318		save_item(NAME(m_latch_bank));
319		save_item(NAME(m_latch_bank2));
320		save_item(NAME(m_ram_bank));
321		save_item(NAME(m_ram_enable));
322		save_item(NAME(m_mode));
	226	shared_start();
323	227	save_item(NAME(m_protection_checked));
324	228	}
325	229
326		void gb_rom_digimon_device::device_start()
	230	void gb_rom_chongwu_device::device_reset()
327	231	{
328		has_timer = FALSE;
329		has_rumble = FALSE;
330
331		m_latch_bank = 0;
332		m_latch_bank2 = 1;
333		m_ram_bank = 0;
334		m_ram_enable = 0;
335		m_mode = 0;
336		save_item(NAME(m_latch_bank));
337		save_item(NAME(m_latch_bank2));
338		save_item(NAME(m_ram_bank));
339		save_item(NAME(m_ram_enable));
340		save_item(NAME(m_mode));
	232	shared_reset();
	233	m_protection_checked = 0;
341	234	}
342	235
343		void gb_rom_rockman8_device::device_start()
344		{
345		has_timer = FALSE;
346		has_rumble = FALSE;
347
348		m_latch_bank = 0;
349		m_latch_bank2 = 1;
350		m_ram_bank = 0;
351		m_ram_enable = 0;
352		m_mode = 0;
353		save_item(NAME(m_latch_bank));
354		save_item(NAME(m_latch_bank2));
355		save_item(NAME(m_ram_bank));
356		save_item(NAME(m_ram_enable));
357		save_item(NAME(m_mode));
358		}
359	236
360		void gb_rom_sm3sp_device::device_start()
361		{
362		has_timer = FALSE;
363		has_rumble = FALSE;
364
365		m_latch_bank = 0;
366		m_latch_bank2 = 1;
367		m_ram_bank = 0;
368		m_ram_enable = 0;
369		m_mode = 0;
370		save_item(NAME(m_latch_bank));
371		save_item(NAME(m_latch_bank2));
372		save_item(NAME(m_ram_bank));
373		save_item(NAME(m_ram_enable));
374		save_item(NAME(m_mode));
375		}
376
377
378	237	/*-------------------------------------------------
379	238	mapper specific handlers
380	239	-------------------------------------------------*/
r21776	r21777
1160	1019	}
1161	1020	else if (offset < 0x5000)
1162	1021	{
1163		//      printf("write $5 %x\n", data);
	1022	//      printf("write $5 %X at %X\n", data, offset);
1164	1023	//maybe rumble??
1165	1024	}
1166	1025	else if (offset < 0x6000)

trunk/src/mess/machine/gb_mbc.h

r21776	r21777
14	14	gb_rom_mbc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
15	15
16	16	// device-level overrides
17		virtual void device_start();
	17	virtual void device_start() { shared_start(); };
	18	virtual void device_reset() { shared_reset(); };
18	19	virtual void device_config_complete() { m_shortname = "gb_rom_mbc_base"; }
19
	20
	21	void shared_start();
	22	void shared_reset();
	23
20	24	// reading and writing
21	25	virtual DECLARE_READ8_MEMBER(read_rom);
22	26	virtual DECLARE_READ8_MEMBER(read_ram);
r21776	r21777
35	39	gb_rom_mbc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
36	40
37	41	// device-level overrides
38		virtual void device_start();
	42	virtual void device_start() { shared_start(); };
	43	virtual void device_reset() { shared_reset(); };
39	44	virtual void device_config_complete() { m_shortname = "gb_rom_mbc1"; }
40	45
41	46	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
53	58	gb_rom_mbc1col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
54	59
55	60	// device-level overrides
56		virtual void device_start();
	61	virtual void device_start() { shared_start(); };
	62	virtual void device_reset() { shared_reset(); };
57	63	virtual void device_config_complete() { m_shortname = "gb_rom_mbc1col"; }
58	64
59	65	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
71	77	gb_rom_mbc2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
72	78
73	79	// device-level overrides
74		virtual void device_start();
	80	virtual void device_start() { shared_start(); };
	81	virtual void device_reset() { shared_reset(); };
75	82	virtual void device_config_complete() { m_shortname = "gb_rom_mbc2"; }
76	83
77	84	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
90	97
91	98	// device-level overrides
92	99	virtual void device_start();
	100	virtual void device_reset();
93	101	virtual void device_config_complete() { m_shortname = "gb_rom_mbc3"; }
94	102
95	103	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
109	117	gb_rom_mbc5_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
110	118
111	119	// device-level overrides
112		virtual void device_start();
	120	virtual void device_start() { shared_start(); };
	121	virtual void device_reset() { shared_reset(); };
113	122	virtual void device_config_complete() { m_shortname = "gb_rom_mbc5"; }
114	123
115	124	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
128	137
129	138	// device-level overrides
130	139	virtual void device_start();
	140	virtual void device_reset();
131	141	virtual void device_config_complete() { m_shortname = "gb_rom_mbc6"; }
132	142
133	143	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
147	157	gb_rom_mbc7_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
148	158
149	159	// device-level overrides
150		virtual void device_start();
	160	virtual void device_start() { shared_start(); };
	161	virtual void device_reset() { shared_reset(); };
151	162	virtual void device_config_complete() { m_shortname = "gb_rom_mbc7"; }
152	163
153	164	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
165	176
166	177	// device-level overrides
167	178	virtual void device_start();
	179	virtual void device_reset();
168	180	virtual void device_config_complete() { m_shortname = "gb_rom_mmm01"; }
169	181
170	182	// reading and writing
r21776	r21777
173	185	UINT8 m_bank_mask, m_bank, m_reg;
174	186	};
175	187
	188	// ======================> gb_rom_sintax_device
	189	class gb_rom_sintax_device : public gb_rom_mbc_device
	190	{
	191	public:
	192	// construction/destruction
	193	gb_rom_sintax_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	194
	195	// device-level overrides
	196	virtual void device_start();
	197	virtual void device_reset();
	198	virtual void device_config_complete() { m_shortname = "gb_rom_sintax"; }
	199	void set_xor_for_bank(UINT8 bank);
	200
	201	// reading and writing
	202	virtual DECLARE_READ8_MEMBER(read_rom);
	203	virtual DECLARE_WRITE8_MEMBER(write_bank);
	204	virtual DECLARE_READ8_MEMBER(read_ram);
	205	virtual DECLARE_WRITE8_MEMBER(write_ram);
	206	UINT8 m_bank_mask, m_bank, m_reg;
	207
	208	UINT8 m_currentxor, m_xor2, m_xor3, m_xor4, m_xor5, m_sintax_mode;
	209	};
	210
176	211	// ======================> gb_rom_chongwu_device
177	212
178	213	class gb_rom_chongwu_device : public gb_rom_mbc5_device
r21776	r21777
183	218
184	219	// device-level overrides
185	220	virtual void device_start();
	221	virtual void device_reset();
186	222	virtual void device_config_complete() { m_shortname = "gb_rom_chongwu"; }
187	223
188	224	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
198	234	gb_rom_digimon_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
199	235
200	236	// device-level overrides
201		virtual void device_start();
	237	virtual void device_start() { shared_start(); };
	238	virtual void device_reset() { shared_reset(); };
202	239	virtual void device_config_complete() { m_shortname = "gb_rom_digimon"; }
203	240
204	241	virtual DECLARE_READ8_MEMBER(read_rom);
r21776	r21777
207	244	virtual DECLARE_WRITE8_MEMBER(write_ram);
208	245	};
209	246
210		// ======================> gb_rom_sintax_device
211		class gb_rom_sintax_device : public gb_rom_mbc_device
212		{
213		public:
214		// construction/destruction
215		gb_rom_sintax_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
216
217		// device-level overrides
218		virtual void device_start();
219		virtual void device_config_complete() { m_shortname = "gb_rom_sintax"; }
220		void set_xor_for_bank(UINT8 bank);
221
222		// reading and writing
223		virtual DECLARE_READ8_MEMBER(read_rom);
224		virtual DECLARE_WRITE8_MEMBER(write_bank);
225		virtual DECLARE_READ8_MEMBER(read_ram);
226		virtual DECLARE_WRITE8_MEMBER(write_ram);
227		UINT8 m_bank_mask, m_bank, m_reg;
228
229		UINT8 m_currentxor, m_xor2, m_xor3, m_xor4, m_xor5, m_sintax_mode;
230		};
231
232	247	// ======================> gb_rom_rockman8_device
233	248	class gb_rom_rockman8_device : public gb_rom_mbc_device
234	249	{
r21776	r21777
237	252	gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
238	253
239	254	// device-level overrides
240		virtual void device_start();
	255	virtual void device_start() { shared_start(); };
	256	virtual void device_reset() { shared_reset(); };
241	257	virtual void device_config_complete() { m_shortname = "gb_rom_rockman8"; }
242	258
243	259	// reading and writing
r21776	r21777
256	272	gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
257	273
258	274	// device-level overrides
259		virtual void device_start();
	275	virtual void device_start() { shared_start(); };
	276	virtual void device_reset() { shared_reset(); };
260	277	virtual void device_config_complete() { m_shortname = "gb_rom_sm3sp"; }
261	278
262	279	// reading and writing

trunk/src/mess/machine/sns_bsx.c

r21776	r21777
58	58	void sns_rom_bsx_device::device_start()
59	59	{
60	60	m_base_unit = auto_alloc(machine(), BSX_base(machine()));
	61	m_base_unit->init();
	62
61	63	memset(m_cart_regs, 0x00, sizeof(m_cart_regs));
62	64	m_cart_regs[7] = 0x80;
63	65	m_cart_regs[8] = 0x80;
64	66	access_update();
65
66		memset(m_pram, 0xff, sizeof(m_pram));
67
	67
68	68	save_item(NAME(m_cart_regs));
69	69	save_item(NAME(access_00_1f));
70	70	save_item(NAME(access_80_9f));
r21776	r21777
76	76	// TODO: save unit-related items and fix their restore...
77	77	}
78	78
	79	void sns_rom_bsx_device::device_reset()
	80	{
	81	memset(m_pram, 0xff, sizeof(m_pram));
	82	}
	83
79	84	void sns_rom_bsxlo_device::device_start()
80	85	{
81	86	}
r21776	r21777
86	91
87	92	void sns_rom_bsmempak_device::device_start()
88	93	{
89		m_command = 0;
90		m_write_old = 0;
91		m_write_new = 0;
92
93		m_flash_enable = 0;
94		m_read_enable = 0;
95		m_write_enable = 0;
96
97	94	save_item(NAME(m_command));
98	95	save_item(NAME(m_write_old));
99	96	save_item(NAME(m_write_new));
r21776	r21777
102	99	save_item(NAME(m_write_enable));
103	100	}
104	101
	102	void sns_rom_bsmempak_device::device_reset()
	103	{
	104	m_command = 0;
	105	m_write_old = 0;
	106	m_write_new = 0;
	107
	108	m_flash_enable = 0;
	109	m_read_enable = 0;
	110	m_write_enable = 0;
	111	}
105	112
106	113
	114
107	115	// BS-X Base Unit emulation, to be device-fied ?
108	116
109	117	BSX_base::BSX_base(running_machine &machine)

trunk/src/mess/machine/sns_bsx.h

r21776	r21777
37	37
38	38	// device-level overrides
39	39	virtual void device_start();
	40	virtual void device_reset();
40	41	virtual void device_config_complete() { m_shortname = "sns_rom_bsx"; }
41	42	virtual machine_config_constructor device_mconfig_additions() const;
42	43
r21776	r21777
121	122
122	123	// device-level overrides
123	124	virtual void device_start();
	125	virtual void device_reset();
124	126	virtual void device_config_complete() { m_shortname = "sns_bsmempak"; }
125	127
126	128	// additional reading and writing

trunk/src/mess/machine/md_jcart.c

r21776	r21777
144	144
145	145	void md_jcart_device::device_start()
146	146	{
	147	save_item(NAME(m_jcart_io_data));
	148	}
	149
	150	void md_jcart_device::device_reset()
	151	{
147	152	m_jcart_io_data[0] = 0;
148	153	m_jcart_io_data[1] = 0;
149		save_item(NAME(m_jcart_io_data));
150	154	}
151	155
152	156	void md_seprom_codemast_device::device_start()
153	157	{
	158	save_item(NAME(m_i2c_mem));
	159	save_item(NAME(m_i2c_clk));
	160	save_item(NAME(m_jcart_io_data));
	161	}
	162
	163	void md_seprom_codemast_device::device_reset()
	164	{
154	165	m_i2c_mem = 0;
155	166	m_i2c_clk = 0;
156	167	m_jcart_io_data[0] = 0;
157	168	m_jcart_io_data[1] = 0;
158		save_item(NAME(m_i2c_mem));
159		save_item(NAME(m_i2c_clk));
160		save_item(NAME(m_jcart_io_data));
161	169	}
162	170
163	171

trunk/src/mess/machine/md_jcart.h

r21776	r21777
21	21
22	22	// device-level overrides
23	23	virtual void device_start();
	24	virtual void device_reset();
24	25	virtual void device_config_complete() { m_shortname = "md_jcart"; }
25	26	virtual ioport_constructor device_input_ports() const;
26	27
r21776	r21777
46	47
47	48	// device-level overrides
48	49	virtual void device_start();
	50	virtual void device_reset();
49	51	virtual void device_config_complete() { m_shortname = "md_seprom_codemast"; }
50	52	virtual machine_config_constructor device_mconfig_additions() const;
51	53

trunk/src/mess/machine/md_eeprom.c

r21776	r21777
195	195
196	196	void md_std_eeprom_device::device_start()
197	197	{
198		m_i2c_mem = 0;
199		m_i2c_clk = 0;
200	198	save_item(NAME(m_i2c_mem));
201	199	save_item(NAME(m_i2c_clk));
202	200	}
203	201
	202	void md_std_eeprom_device::device_reset()
	203	{
	204	m_i2c_mem = 0;
	205	m_i2c_clk = 0;
	206	}
	207
204	208	/*-------------------------------------------------
205	209	mapper specific handlers
206	210	-------------------------------------------------*/

trunk/src/mess/machine/md_eeprom.h

r21776	r21777
21	21
22	22	// device-level overrides
23	23	virtual void device_start();
	24	virtual void device_reset();
24	25	virtual void device_config_complete() { m_shortname = "md_std_eeprom"; }
25	26	virtual machine_config_constructor device_mconfig_additions() const;
26	27

trunk/src/mess/machine/md_rom.c

r21776	r21777
216	216
217	217	void md_rom_ssf2_device::device_start()
218	218	{
	219	save_item(NAME(m_bank));
	220	save_item(NAME(m_lastoff));
	221	save_item(NAME(m_lastdata));
	222	}
	223
	224	void md_rom_ssf2_device::device_reset()
	225	{
219	226	for (int i = 0; i < 7; i++)
220	227	m_bank[i] = i;
221	228	m_lastoff = -1;
222	229	m_lastdata = -1;
223		save_item(NAME(m_bank));
224		save_item(NAME(m_lastoff));
225		save_item(NAME(m_lastdata));
226	230	}
227	231
228	232	void md_rom_mcpirate_device::device_start()
229	233	{
230		m_bank = 0;
231	234	save_item(NAME(m_bank));
232	235	}
233	236
	237	void md_rom_mcpirate_device::device_reset()
	238	{
	239	m_bank = 0;
	240	}
	241
234	242	void md_rom_chinf3_device::device_start()
235	243	{
236		m_bank = 0;
237	244	save_item(NAME(m_bank));
238	245	}
239	246
	247	void md_rom_chinf3_device::device_reset()
	248	{
	249	m_bank = 0;
	250	}
	251
240	252	void md_rom_lion2_device::device_start()
241	253	{
242		m_prot1_data = 0;
243		m_prot2_data = 0;
244	254	save_item(NAME(m_prot1_data));
245	255	save_item(NAME(m_prot2_data));
246	256	}
247	257
	258	void md_rom_lion2_device::device_reset()
	259	{
	260	m_prot1_data = 0;
	261	m_prot2_data = 0;
	262	}
	263
248	264	void md_rom_lion3_device::device_start()
249	265	{
	266	save_item(NAME(m_reg));
	267	save_item(NAME(m_bank));
	268	}
	269
	270	void md_rom_lion3_device::device_reset()
	271	{
250	272	m_reg[0] = 0;
251	273	m_reg[1] = 0;
252	274	m_reg[2] = 0;
253	275	m_bank = 0;
254		save_item(NAME(m_reg));
255		save_item(NAME(m_bank));
256	276	}
257	277
258	278	void md_rom_pokestad_device::device_start()
259	279	{
260		m_bank = 0;
261	280	save_item(NAME(m_bank));
262	281	}
263	282
	283	void md_rom_pokestad_device::device_reset()
	284	{
	285	m_bank = 0;
	286	}
	287
264	288	void md_rom_realtec_device::device_start()
265	289	{
266		m_bank_addr = 0;
267		m_bank_size = 0;
268		m_old_bank_addr = -1;
269	290	save_item(NAME(m_bank_addr));
270	291	save_item(NAME(m_bank_size));
271	292	save_item(NAME(m_old_bank_addr));
272	293	}
273	294
	295	void md_rom_realtec_device::device_reset()
	296	{
	297	m_bank_addr = 0;
	298	m_bank_size = 0;
	299	m_old_bank_addr = -1;
	300	}
	301
274	302	void md_rom_squir_device::device_start()
275	303	{
276		m_latch = 0;
277	304	save_item(NAME(m_latch));
278	305	}
279	306
	307	void md_rom_squir_device::device_reset()
	308	{
	309	m_latch = 0;
	310	}
	311
280	312	void md_rom_smw64_device::device_start()
281	313	{
282		m_latch0 = 0xf;
283		m_latch1 = 0xf;
284		memset(m_reg, 0, sizeof(m_reg));
285		memset(m_ctrl, 0, sizeof(m_ctrl));
286
287	314	save_item(NAME(m_latch0));
288	315	save_item(NAME(m_latch1));
289	316	save_item(NAME(m_reg));
290	317	save_item(NAME(m_ctrl));
291	318	}
292	319
	320	void md_rom_smw64_device::device_reset()
	321	{
	322	m_latch0 = 0xf;
	323	m_latch1 = 0xf;
	324	memset(m_reg, 0, sizeof(m_reg));
	325	memset(m_ctrl, 0, sizeof(m_ctrl));
	326	}
	327
293	328	void md_rom_topf_device::device_start()
294	329	{
295		m_latch = 0;
296		m_bank[0] = m_bank[1] = m_bank[2] = 0;
297	330	save_item(NAME(m_latch));
298	331	save_item(NAME(m_bank));
299	332	}
300	333
	334	void md_rom_topf_device::device_reset()
	335	{
	336	m_latch = 0;
	337	m_bank[0] = m_bank[1] = m_bank[2] = 0;
	338	}
	339
301	340	void md_rom_radica_device::device_start()
302	341	{
303		m_bank = 0;
304	342	save_item(NAME(m_bank));
305	343	}
306	344
	345	void md_rom_radica_device::device_reset()
	346	{
	347	m_bank = 0;
	348	}
	349
307	350	void md_rom_beggarp_device::device_start()
308	351	{
309		m_mode = 0;
310		m_lock = 0;
311	352	save_item(NAME(m_mode));
312	353	save_item(NAME(m_lock));
313	354	}
314	355
	356	void md_rom_beggarp_device::device_reset()
	357	{
	358	m_mode = 0;
	359	m_lock = 0;
	360	}
	361
315	362	void md_rom_wukong_device::device_start()
316	363	{
317		m_mode = 0;
318	364	save_item(NAME(m_mode));
319	365	}
320	366
	367	void md_rom_wukong_device::device_reset()
	368	{
	369	m_mode = 0;
	370	}
	371
321	372	/*-------------------------------------------------
322	373	mapper specific handlers
323	374	-------------------------------------------------*/
r21776	r21777
946	997	return data;
947	998	}
948	999	}
949
950	1000	return 0xffff;
951	1001	}
952	1002
r21776	r21777
1107	1157	return m_mode ? m_rom[offset + 0x380000/2] : m_rom[offset];
1108	1158	else if (offset < 0x400000/2)
1109	1159	return m_rom[offset & 0x1fffff];
1110
	1160
1111	1161	return 0xffff;
1112	1162	}
1113	1163

trunk/src/mess/machine/md_rom.h

r21776	r21777
71	71
72	72	// device-level overrides
73	73	virtual void device_start();
	74	virtual void device_reset();
74	75	virtual void device_config_complete() { m_shortname = "md_rom_ssf2"; }
75	76
76	77	// reading and writing
r21776	r21777
92	93
93	94	// device-level overrides
94	95	virtual void device_start();
	96	virtual void device_reset();
95	97	virtual void device_config_complete() { m_shortname = "md_rom_mcpirate"; }
96	98
97	99	// reading and writing
r21776	r21777
128	130
129	131	// device-level overrides
130	132	virtual void device_start();
	133	virtual void device_reset();
131	134	virtual void device_config_complete() { m_shortname = "md_rom_chinf3"; }
132	135
133	136	// reading and writing
r21776	r21777
208	211
209	212	// device-level overrides
210	213	virtual void device_start();
	214	virtual void device_reset();
211	215	virtual void device_config_complete() { m_shortname = "md_rom_lion2"; }
212	216
213	217	// reading and writing
r21776	r21777
228	232
229	233	// device-level overrides
230	234	virtual void device_start();
	235	virtual void device_reset();
231	236	virtual void device_config_complete() { m_shortname = "md_rom_lion3"; }
232	237
233	238	// reading and writing
r21776	r21777
279	284
280	285	// device-level overrides
281	286	virtual void device_start();
	287	virtual void device_reset();
282	288	virtual void device_config_complete() { m_shortname = "md_rom_pokestad"; }
283	289
284	290	// reading and writing
r21776	r21777
299	305
300	306	// device-level overrides
301	307	virtual void device_start();
	308	virtual void device_reset();
302	309	virtual void device_config_complete() { m_shortname = "md_rom_realtec"; }
303	310
304	311	// reading and writing
r21776	r21777
394	401
395	402	// device-level overrides
396	403	virtual void device_start();
	404	virtual void device_reset();
397	405	virtual void device_config_complete() { m_shortname = "md_rom_smw64"; }
398	406
399	407	// reading and writing
r21776	r21777
447	455
448	456	// device-level overrides
449	457	virtual void device_start();
	458	virtual void device_reset();
450	459	virtual void device_config_complete() { m_shortname = "md_rom_squir"; }
451	460
452	461	// reading and writing
r21776	r21777
467	476
468	477	// device-level overrides
469	478	virtual void device_start();
	479	virtual void device_reset();
470	480	virtual void device_config_complete() { m_shortname = "md_rom_topf"; }
471	481
472	482	// reading and writing
r21776	r21777
488	498
489	499	// device-level overrides
490	500	virtual void device_start();
	501	virtual void device_reset();
491	502	virtual void device_config_complete() { m_shortname = "md_rom_radica"; }
492	503
493	504	// reading and writing
r21776	r21777
508	519
509	520	// device-level overrides
510	521	virtual void device_start();
	522	virtual void device_reset();
511	523	virtual void device_config_complete() { m_shortname = "md_rom_beggarp"; }
512	524
513	525	// reading and writing
r21776	r21777
515	527	virtual DECLARE_WRITE16_MEMBER(write);
516	528	virtual DECLARE_WRITE16_MEMBER(write_a13);
517	529
	530	private:
518	531	UINT8 m_mode, m_lock;
519	532	};
520	533
r21776	r21777
528	541
529	542	// device-level overrides
530	543	virtual void device_start();
	544	virtual void device_reset();
531	545	virtual void device_config_complete() { m_shortname = "md_rom_wukong"; }
532	546
533	547	// reading and writing
r21776	r21777
535	549	virtual DECLARE_WRITE16_MEMBER(write);
536	550	virtual DECLARE_WRITE16_MEMBER(write_a13);
537	551
	552	private:
538	553	UINT8 m_mode;
539	554	};
540	555

trunk/src/mess/machine/sns_slot.h

r21776	r21777
67	67	virtual DECLARE_READ8_MEMBER(chip_read) { return 0xff; }
68	68	virtual DECLARE_WRITE8_MEMBER(chip_write) {}
69	69
70		virtual void rom_alloc(running_machine &machine, UINT32 size);
71		virtual void nvram_alloc(running_machine &machine, UINT32 size);
72		virtual void rtc_ram_alloc(running_machine &machine, UINT32 size);
73		virtual void addon_bios_alloc(running_machine &machine, UINT32 size);
74		virtual UINT8* get_rom_base() { return m_rom; };
75		virtual UINT8* get_nvram_base() { return m_nvram; };
76		virtual UINT8* get_addon_bios_base() { return m_bios; };
77		virtual UINT8* get_rtc_ram_base() { return m_rtc_ram; };
78		virtual UINT32 get_rom_size() { return m_rom_size; };
79		virtual UINT32 get_nvram_size() { return m_nvram_size; };
80		virtual UINT32 get_addon_bios_size() { return m_bios_size; };
81		virtual UINT32 get_rtc_ram_size() { return m_rtc_ram_size; };
	70	void rom_alloc(running_machine &machine, UINT32 size);
	71	void nvram_alloc(running_machine &machine, UINT32 size);
	72	void rtc_ram_alloc(running_machine &machine, UINT32 size);
	73	void addon_bios_alloc(running_machine &machine, UINT32 size);
	74	UINT8* get_rom_base() { return m_rom; };
	75	UINT8* get_nvram_base() { return m_nvram; };
	76	UINT8* get_addon_bios_base() { return m_bios; };
	77	UINT8* get_rtc_ram_base() { return m_rtc_ram; };
	78	UINT32 get_rom_size() { return m_rom_size; };
	79	UINT32 get_nvram_size() { return m_nvram_size; };
	80	UINT32 get_addon_bios_size() { return m_bios_size; };
	81	UINT32 get_rtc_ram_size() { return m_rtc_ram_size; };
82	82
83		virtual void rom_map_setup(UINT32 size);
	83	void rom_map_setup(UINT32 size);
84	84
85	85	// internal state
86		UINT8      *m_rom;
87		UINT8      *m_nvram;
88		UINT8      *m_bios;
89		UINT8      *m_rtc_ram;  // temp pointer to save RTC ram to nvram (will disappear when RTCs become devices)
	86	UINT8  *m_rom;
	87	UINT8  *m_nvram;
	88	UINT8  *m_bios;
	89	UINT8  *m_rtc_ram;  // temp pointer to save RTC ram to nvram (will disappear when RTCs become devices)
90	90	UINT32 m_rom_size;
91	91	UINT32 m_nvram_size;
92	92	UINT32 m_bios_size;
r21776	r21777
117	117	virtual void call_unload();
118	118	virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry);
119	119
120		virtual int get_cart_type(UINT8 *ROM, UINT32 len);
121		virtual UINT32 snes_skip_header(UINT8 *ROM, UINT32 snes_rom_size);
122		virtual int get_type() { return m_type; }
	120	int get_cart_type(UINT8 *ROM, UINT32 len);
	121	UINT32 snes_skip_header(UINT8 *ROM, UINT32 snes_rom_size);
	122	int get_type() { return m_type; }
123	123
124		virtual void setup_custom_mappers();
125		virtual void setup_nvram();
	124	void setup_custom_mappers();
	125	void setup_nvram();
	126	void internal_header_logging(UINT8 *ROM, UINT32 len);
126	127
127	128	virtual iodevice_t image_type() const { return IO_CARTSLOT; }
128	129	virtual bool is_readable()  const { return 1; }
r21776	r21777
134	135
135	136	// slot interface overrides
136	137	virtual const char * get_default_card_software(const machine_config &config, emu_options &options);
137		virtual void internal_header_logging(UINT8 *ROM, UINT32 len);
138	138
139	139	// reading and writing
140	140	virtual DECLARE_READ8_MEMBER(read_l);
r21776	r21777
191	191	};
192	192
193	193
194
195
196	194	// device type definition
197	195	extern const device_type SNS_CART_SLOT;
198	196	extern const device_type SNS_SUFAMI_CART_SLOT;

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