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r21684 Thursday 7th March, 2013 at 11:09:57 UTC by Fabio Priuli
split ROM/RAM accesses to cart in SNES slot implementation in order to simplify the code. nw.
[src/mess/drivers]snes.c
[src/mess/machine]sns_bsx.c sns_bsx.h sns_rom.c sns_rom.h sns_rom21.c sns_rom21.h sns_sdd1.c sns_sdd1.h sns_sfx.c sns_sfx.h sns_slot.c sns_slot.h sns_spc7110.c sns_spc7110.h sns_sufami.c sns_sufami.h

trunk/src/mess/machine/sns_sfx.c
r21683r21684
107107   superfx_mmio_write(m_superfx, offset, data);
108108}
109109
110
110111READ8_MEMBER( sns_rom_superfx_device::read_l )
111112{
112   UINT16 address = offset & 0xffff;
113
114   if (offset < 0x400000)
115   {
116      if (address >= 0x6000 && address < 0x8000)
117      {
118         if (superfx_access_ram(m_superfx))
119            return  sfx_ram[offset & 0x1fff];
120      }
121      if (address >= 0x8000)
122         return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
123   }
124   else if (offset < 0x600000)
125   {
126      if (superfx_access_rom(m_superfx))
127      {
128         return m_rom[rom_bank_map[(offset - 0x400000) / 0x8000] * 0x8000 + (offset & 0x7fff)];
129      }
130      else
131      {
132         static const UINT8 sfx_data[16] = {
133            0x00, 0x01, 0x00, 0x01, 0x04, 0x01, 0x00, 0x01,
134            0x00, 0x01, 0x08, 0x01, 0x00, 0x01, 0x0c, 0x01,
135         };
136         return sfx_data[offset & 0x0f];
137      }
138   }
139   else
140   {
141      if (superfx_access_ram(m_superfx))
142         return  sfx_ram[offset & 0xfffff];
143   }
144
145   return 0xff;    // should be open bus...
113   return read_h(space, offset);
146114}
147115
148
149WRITE8_MEMBER( sns_rom_superfx_device::write_l )
150{
151   UINT16 address = offset & 0xffff;
152   if (offset < 0x400000)
153   {
154      if (address >= 0x6000 && address < 0x8000)
155      {
156         if (superfx_access_ram(m_superfx))
157            sfx_ram[offset & 0x1fff] = data;
158      }
159   }
160   else if (offset >= 0x600000)
161   {
162      if (superfx_access_ram(m_superfx))
163         sfx_ram[offset & 0xfffff] = data;
164   }
165}
166
167116READ8_MEMBER(sns_rom_superfx_device::read_h)
168117{
169   UINT16 address = offset & 0xffff;
170
171118   if (offset < 0x400000)
172   {
173      if (address >= 0x6000 && address < 0x8000)
174      {
175         if (superfx_access_ram(m_superfx))
176            return  sfx_ram[offset & 0x1fff];
177      }
178      if (address >= 0x8000)
179         return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
180   }
119      return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
181120   else if (offset < 0x600000)
182121   {
183122      if (superfx_access_rom(m_superfx))
r21683r21684
193132         return sfx_data[offset & 0x0f];
194133      }
195134   }
196   else
197   {
198      if (superfx_access_ram(m_superfx))
199         return  sfx_ram[offset & 0xfffff];
200   }
135   return 0xff;    // this handler should never be called for [60-7f]/[e0-ff] ranges
136}
201137
138READ8_MEMBER( sns_rom_superfx_device::read_ram )
139{
140   if (superfx_access_ram(m_superfx))
141      return sfx_ram[offset & 0xfffff];
202142   return 0xff;    // should be open bus...
203143}
204144
205WRITE8_MEMBER( sns_rom_superfx_device::write_h )
145WRITE8_MEMBER( sns_rom_superfx_device::write_ram )
206146{
207   UINT16 address = offset & 0xffff;
208   if (offset < 0x400000)
209   {
210      if (address >= 0x6000 && address < 0x8000)
211      {
212         if (superfx_access_ram(m_superfx))
213            sfx_ram[offset & 0x1fff] = data;
214      }
215   }
216   else if (offset >= 0x600000)
217   {
218      if (superfx_access_ram(m_superfx))
219         sfx_ram[offset & 0xfffff] = data;
220   }
147   if (superfx_access_ram(m_superfx))
148      sfx_ram[offset & 0xfffff] = data;
221149}
150
trunk/src/mess/machine/sns_sfx.h
r21683r21684
2323
2424   // additional reading and writing
2525   virtual DECLARE_READ8_MEMBER(read_l);
26   virtual DECLARE_WRITE8_MEMBER(write_l);
2726   virtual DECLARE_READ8_MEMBER(read_h);
28   virtual DECLARE_WRITE8_MEMBER(write_h);
27   virtual DECLARE_READ8_MEMBER(read_ram);
28   virtual DECLARE_WRITE8_MEMBER(write_ram);
2929   virtual DECLARE_READ8_MEMBER(chip_read);
3030   virtual DECLARE_WRITE8_MEMBER(chip_write);
3131
trunk/src/mess/machine/sns_rom.c
r21683r21684
8282
8383READ8_MEMBER(sns_rom_device::read_h)
8484{
85   UINT8 value = 0xff;
86   UINT16 address = offset & 0xffff;
87
88   if (offset < 0x700000)
89   {
90      int bank = offset / 0x10000;
91      value = m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
92   }
93   else
94   {
95      if (address < 0x8000)
96      {
97         if (m_nvram_size > 0x8000)
98         {
99            // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc.
100            int mask = m_nvram_size - 1;
101            offset = ((offset - 0x700000) / 0x10000) * 0x8000 + (offset & 0x7fff);
102            value = m_nvram[offset & mask];
103         }
104         else if (m_nvram_size > 0)
105         {
106            int mask = m_nvram_size - 1;   /* Limit SRAM size to what's actually present */
107            value = m_nvram[offset & mask];
108         }
109         else
110            value = 0xff;   // this should never happened...
111      }
112      else
113      {
114         int bank = offset / 0x10000;
115         value = m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
116      }
117   }
118   return value;
85   int bank = offset / 0x10000;
86   return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
11987}
12088
121WRITE8_MEMBER(sns_rom_device::write_l)
122{
123   write_h(space, offset, data);
124}
12589
126WRITE8_MEMBER(sns_rom_device::write_h)
127{
128   if (offset >= 0x700000) // SRAM
129   {
130      if (m_nvram_size > 0x8000)
131      {
132         // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc.
133         int mask = m_nvram_size - 1;
134         offset = ((offset - 0x700000) / 0x10000) * 0x8000 + (offset & 0x7fff);
135         m_nvram[offset & mask] = data;
136      }
137      else if (m_nvram_size > 0)
138      {
139         int mask = m_nvram_size - 1;   /* Limit SRAM size to what's actually present */
140         m_nvram[offset & mask] = data;
141      }
142   }
143}
14490
145
146
14791// Lo-ROM + Protection device
14892
14993READ8_MEMBER( sns_rom_pokemon_device::chip_read )
trunk/src/mess/machine/sns_rom.h
r21683r21684
2121   // reading and writing
2222   virtual DECLARE_READ8_MEMBER(read_l);
2323   virtual DECLARE_READ8_MEMBER(read_h);
24   virtual DECLARE_WRITE8_MEMBER(write_l);
25   virtual DECLARE_WRITE8_MEMBER(write_h);
2624};
2725
2826// ======================> sns_rom_pokemon_device
trunk/src/mess/machine/sns_bsx.c
r21683r21684
451451      int bank = offset / 0x10000;
452452      return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
453453   }
454   if (offset >= 0x700000 && (offset & 0xffff) < 0x8000)
455   {
456      if (m_nvram_size > 0x8000)
457      {
458         // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc.
459         int mask = (m_nvram_size << 1) - 1;
460         mask &= ~0x8000;
461         return m_nvram[offset & mask];
462      }
463      else if (m_nvram_size > 0)
464      {
465         int mask = m_nvram_size - 1;   /* Limit SRAM size to what's actually present */
466         return m_nvram[offset & mask];
467      }
468   }
454   // nothing [40-6f]
455   // RAM [70-7f]
469456   return 0x00;
470457}
471458
r21683r21684
483470      if (m_slot->m_cart && m_slot->m_cart->get_rom_size())
484471         return m_slot->m_cart->read_h(space, offset);
485472   }
486
487   if (offset >= 0x700000 && (offset & 0xffff) < 0x8000)
488   {
489      if (m_nvram_size > 0x8000)
490      {
491         // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc.
492         int mask = (m_nvram_size << 1) - 1;
493         mask &= ~0x8000;
494         return m_nvram[offset & mask];
495      }
496      else if (m_nvram_size > 0)
497      {
498         int mask = m_nvram_size - 1;   /* Limit SRAM size to what's actually present */
499         return m_nvram[offset & mask];
500      }
501   }
473   // RAM [70-7f]
502474   return 0x00;
503475}
504476
r21683r21684
519491   }
520492   if (offset >= 0x200000 && offset < 0x400000)
521493   {
522      if ((offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000 && m_nvram_size > 0)
523      {
524         int mask = (m_nvram_size - 1) & 0x7fff;
525         return m_nvram[(offset - 0x6000) & mask];
526      }
527494      if ((offset & 0xffff) >= 0x8000 && m_slot->m_cart && m_slot->m_cart->get_rom_size())
528495         return m_slot->m_cart->read_h(space, offset);
529496   }
r21683r21684
541508   return 0xff;
542509}
543510
544WRITE8_MEMBER(sns_rom_bsxhi_device::write_l)
545{
546   write_h(space, offset, data);
547}
548
549WRITE8_MEMBER(sns_rom_bsxhi_device::write_h)
550{
551   if (offset >= 0x200000 && offset < 0x400000)
552   {
553      if ((offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000 && m_nvram_size > 0)
554      {
555         int mask = (m_nvram_size - 1) & 0x7fff;
556         m_nvram[(offset - 0x6000) & mask] = data;
557      }
558   }
559}
560
561
562511/*-------------------------------------------------
563512 BS-X Memory Packs
564513 -------------------------------------------------*/
trunk/src/mess/machine/sns_bsx.h
r21683r21684
8484   // additional reading and writing
8585   virtual DECLARE_READ8_MEMBER(read_l);
8686   virtual DECLARE_READ8_MEMBER(read_h);
87//  virtual DECLARE_WRITE8_MEMBER(write_l);
88//  virtual DECLARE_WRITE8_MEMBER(write_h);
89//  virtual DECLARE_READ8_MEMBER(chip_read);
90//  virtual DECLARE_WRITE8_MEMBER(chip_write);
9187
9288private:
9389   required_device<sns_bsx_cart_slot_device> m_slot;
r21683r21684
109105   // additional reading and writing
110106   virtual DECLARE_READ8_MEMBER(read_l);
111107   virtual DECLARE_READ8_MEMBER(read_h);
112   virtual DECLARE_WRITE8_MEMBER(write_l);
113   virtual DECLARE_WRITE8_MEMBER(write_h);
114   //  virtual DECLARE_READ8_MEMBER(chip_read);
115   //  virtual DECLARE_WRITE8_MEMBER(chip_write);
116108
117109private:
118110   required_device<sns_bsx_cart_slot_device> m_slot;
trunk/src/mess/machine/sns_sdd1.c
r21683r21684
581581{
582582   if (offset < 0x400000)
583583      return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
584   else if (offset >= 0x700000 && (offset & 0xffff) < 0x8000 && m_nvram_size > 0)
585      return m_nvram[offset & 0x1fff];
586584   else
587585      return m_rom[rom_bank_map[(offset - 0x400000) / 0x8000] * 0x8000 + (offset & 0x7fff)];
588586}
r21683r21684
595593      return read_l(space, offset);
596594}
597595
598WRITE8_MEMBER(sns_rom_sdd1_device::write_l)
596
597READ8_MEMBER( sns_rom_sdd1_device::read_ram )
599598{
600   if (offset >= 0x700000 && (offset & 0xffff) < 0x8000 && m_nvram_size > 0)   // SRAM
601      m_nvram[offset & 0x1fff] = data;
599   return m_nvram[offset & 0x1fff];
602600}
601
602WRITE8_MEMBER( sns_rom_sdd1_device::write_ram )
603{
604   m_nvram[offset & 0x1fff] = data;
605}
606
trunk/src/mess/machine/sns_spc7110.c
r21683r21684
10081008   }
10091009}
10101010
1011READ8_MEMBER(sns_rom_spc7110_device::read_l)
1012{
1013   UINT16 address = offset & 0xffff;
1014   if (offset < 0x400000)
1015   {
1016      if (address >= 0x6000 && address < 0x8000)
1017      {
1018         if (offset < 0x10000)
1019            return m_ram[offset & 0x1fff];
1020         if (offset >= 0x300000 && offset < 0x310000)
1021            return m_ram[offset & 0x1fff];
1022      }
1023      if (address >= 0x8000)
1024         return m_rom[rom_bank_map[offset / 0x8000] * 0x8000 + (offset & 0x7fff)];
1025   }
1026
1027   return 0xff;
1028}
1029
1030READ8_MEMBER(sns_rom_spc7110_device::read_h)
1031{
1032   UINT16 address = offset & 0xfffff;
1033
1034   if (offset < 0x400000)
1035   {
1036      if (address >= 0x6000 && address < 0x8000)
1037      {
1038         if (offset < 0x10000)
1039            return m_ram[offset & 0x1fff];
1040         if (offset >= 0x300000 && offset < 0x310000)
1041            return m_ram[offset & 0x1fff];
1042      }
1043      if (address >= 0x8000)
1044         return m_rom[rom_bank_map[offset / 0x8000] * 0x8000 + (offset & 0x7fff)];
1045   }
1046   else
1047   {
1048      switch (offset & 0x300000)
1049      {
1050         case 0x000000:
1051            return m_rom[rom_bank_map[(offset - 0x400000) / 0x8000] * 0x8000 + (offset & 0x7fff)];
1052         case 0x100000:
1053            return m_rom[m_dx_offset + address];
1054         case 0x200000:
1055            return m_rom[m_ex_offset + address];
1056         case 0x300000:
1057            return m_rom[m_fx_offset + address];
1058         default:
1059            break;
1060      }
1061   }
1062
1063   return 0xff;
1064}
1065
1066WRITE8_MEMBER(sns_rom_spc7110_device::write_l)
1067{
1068   m_ram[offset & 0x1fff] = data;
1069}
1070
1071
10721011READ8_MEMBER(sns_rom_spc7110_device::chip_read)
10731012{
10741013   UINT8 *ROM = get_rom_base();
r21683r21684
16401579         break;
16411580   }
16421581}
1582
1583READ8_MEMBER(sns_rom_spc7110_device::read_l)
1584{
1585   if (offset < 0x400000)
1586      return m_rom[rom_bank_map[offset / 0x8000] * 0x8000 + (offset & 0x7fff)];
1587   
1588   return 0xff;
1589}
1590
1591READ8_MEMBER(sns_rom_spc7110_device::read_h)
1592{
1593   UINT16 address = offset & 0xfffff;
1594   
1595   if (offset < 0x400000)
1596      return m_rom[rom_bank_map[offset / 0x8000] * 0x8000 + (offset & 0x7fff)];
1597   else
1598   {
1599      switch (offset & 0x300000)
1600      {
1601         case 0x000000:
1602            return m_rom[rom_bank_map[(offset - 0x400000) / 0x8000] * 0x8000 + (offset & 0x7fff)];
1603         case 0x100000:
1604            return m_rom[m_dx_offset + address];
1605         case 0x200000:
1606            return m_rom[m_ex_offset + address];
1607         case 0x300000:
1608            return m_rom[m_fx_offset + address];
1609         default:
1610            break;
1611      }
1612   }
1613   
1614   return 0xff;
1615}
1616
1617
1618READ8_MEMBER( sns_rom_spc7110_device::read_ram )
1619{
1620   return m_ram[offset & 0x1fff];
1621}
1622
1623WRITE8_MEMBER( sns_rom_spc7110_device::write_ram )
1624{
1625   m_ram[offset & 0x1fff] = data;
1626}
1627
trunk/src/mess/machine/sns_sdd1.h
r21683r21684
150150   // reading and writing
151151   virtual DECLARE_READ8_MEMBER(read_l);
152152   virtual DECLARE_READ8_MEMBER(read_h);
153   virtual DECLARE_WRITE8_MEMBER(write_l);
153   virtual DECLARE_READ8_MEMBER(read_ram);
154   virtual DECLARE_WRITE8_MEMBER(write_ram);
154155   virtual DECLARE_READ8_MEMBER(chip_read);
155156   virtual DECLARE_WRITE8_MEMBER(chip_write);
156157
trunk/src/mess/machine/sns_spc7110.h
r21683r21684
8282   // reading and writing
8383   virtual DECLARE_READ8_MEMBER(read_l);
8484   virtual DECLARE_READ8_MEMBER(read_h);
85   virtual DECLARE_WRITE8_MEMBER(write_l);
85   virtual DECLARE_READ8_MEMBER(read_ram);
86   virtual DECLARE_WRITE8_MEMBER(write_ram);
8687
8788   virtual DECLARE_READ8_MEMBER(chip_read);
8889   virtual DECLARE_WRITE8_MEMBER(chip_write);
r21683r21684
198199// we just use the spc7110 ones for the moment, pending the split of regs 0x4840-0x4842 (RTC) from the base add-on
199200//  virtual DECLARE_READ8_MEMBER(read_l);
200201//  virtual DECLARE_READ8_MEMBER(read_h);
201//  virtual DECLARE_WRITE8_MEMBER(write_l);
202202
203203//  virtual DECLARE_READ8_MEMBER(chip_read);
204204//  virtual DECLARE_WRITE8_MEMBER(chip_write);
trunk/src/mess/machine/sns_sufami.c
r21683r21684
8181
8282READ8_MEMBER(sns_rom_sufami_device::read_h)
8383{
84   int bank;
85
8486   if (offset < 0x200000)      // SUFAMI TURBO ROM
8587   {
86      int bank = offset / 0x10000;
88      bank = offset / 0x10000;
8789      return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
8890   }
8991   if (offset >= 0x200000 && offset < 0x400000)    // SLOT1 STROM
r21683r21684
98100   }
99101   if (offset >= 0x600000 && offset < 0x640000)    // SLOT1 RAM
100102   {
101      if (m_slot1->m_cart && (offset & 0xffff) > 0x8000)
102         return m_slot1->m_cart->read_h(space, offset - 0x600000);
103      if (m_slot1->m_cart && (offset & 0xffff) >= 0x8000)
104      {
105         offset -= 0x600000;
106         bank = offset / 0x10000;
107         return m_slot1->m_cart->read_ram(space, bank * 0x8000 + (offset & 0x7fff));
108      }
103109   }
104110   if (offset >= 0x700000 && offset < 0x740000)    // SLOT2 RAM
105111   {
106      if (m_slot2->m_cart && (offset & 0xffff) > 0x8000)
107         return m_slot2->m_cart->read_h(space, offset - 0x700000);
112      if (m_slot2->m_cart && (offset & 0xffff) >= 0x8000)
113      {
114         offset -= 0x700000;
115         bank = offset / 0x10000;
116         return m_slot2->m_cart->read_ram(space, bank * 0x8000 + (offset & 0x7fff));
117      }
108118   }
109119
110120   return 0xff;
r21683r21684
117127
118128WRITE8_MEMBER(sns_rom_sufami_device::write_h)
119129{
130   int bank;
120131   if (offset >= 0x600000 && offset < 0x640000)    // SLOT1 RAM
121132   {
122      if (m_slot1->m_cart && (offset & 0xffff) > 0x8000)
123         return m_slot1->m_cart->write_h(space, offset - 0x600000, data);
133      if (m_slot1->m_cart && (offset & 0xffff) >= 0x8000)
134      {
135         offset -= 0x600000;
136         bank = offset / 0x10000;
137         m_slot1->m_cart->write_ram(space, bank * 0x8000 + (offset & 0x7fff), data);
138      }
124139   }
125140
126141   if (offset >= 0x700000 && offset < 0x740000)    // SLOT2 RAM
127142   {
128      if (m_slot2->m_cart && (offset & 0xffff) > 0x8000)
129         return m_slot2->m_cart->write_h(space, offset - 0x700000, data);
143      if (m_slot2->m_cart && (offset & 0xffff) >= 0x8000)
144      {
145         offset -= 0x700000;
146         bank = offset / 0x10000;
147         m_slot2->m_cart->write_ram(space, bank * 0x8000 + (offset & 0x7fff), data);
148      }
130149   }
131150
132151}
r21683r21684
135154 Sufami Turbo 'minicart' emulation
136155 -------------------------------------------------*/
137156
138// Here we're cheating a bit, for the moment, to avoid the need of ST carts as a completely different device
139// which would require separate loading routines
140// Hence, we use low r/w handlers for ROM access and hi r/w handlers for RAM access...
141// Eventually, it might be better to create a separate device for these, with rom_r and ram_r/ram_w handlers
142
143157READ8_MEMBER(sns_rom_strom_device::read_l)
144158{
145159   if (offset < 0x200000)
r21683r21684
149163   }
150164   return 0xff;
151165}
152
153READ8_MEMBER(sns_rom_strom_device::read_h)
154{
155   if (offset < 0x40000)
156   {
157      int bank = offset / 0x10000;
158      return m_nvram[bank * 0x8000 + (offset & 0x7fff)];
159   }
160   return 0xff;
161}
162
163WRITE8_MEMBER(sns_rom_strom_device::write_l)
164{
165}
166
167WRITE8_MEMBER(sns_rom_strom_device::write_h)
168{
169   if (offset < 0x40000)
170   {
171      int bank = offset / 0x10000;
172      m_nvram[bank * 0x8000 + (offset & 0x7fff)] = data;
173   }
174}
trunk/src/mess/machine/sns_sufami.h
r21683r21684
4242   virtual void device_config_complete() { m_shortname = "sns_strom"; }
4343
4444   // additional reading and writing
45   virtual DECLARE_READ8_MEMBER(read_l);   // used for ROM
46   virtual DECLARE_READ8_MEMBER(read_h);   // used for ROM
47   virtual DECLARE_WRITE8_MEMBER(write_l); // used for RAM
48   virtual DECLARE_WRITE8_MEMBER(write_h); // used for RAM
45   virtual DECLARE_READ8_MEMBER(read_l);
4946};
5047
5148
trunk/src/mess/machine/sns_rom21.c
r21683r21684
6565
6666READ8_MEMBER(sns_rom21_device::read_l)
6767{
68   UINT16 address = offset & 0xffff;
69
70   if (offset >= 0x300000 && offset < 0x400000 && address < 0x8000)
71   {
72      if (m_nvram_size > 0)
73      {
74         /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */
75         /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */
76         int mask = (m_nvram_size - 1) & 0x7fff; /* Limit SRAM size to what's actually present */
77         return m_nvram[(offset - 0x6000) & mask];
78      }
79   }
80
8168   // here ROM banks from 128 to 255, mirrored twice
8269   int bank = (offset & 0x3fffff) / 0x8000;
8370   return m_rom[rom_bank_map[bank + 0x80] * 0x8000 + (offset & 0x7fff)];
r21683r21684
8572
8673READ8_MEMBER(sns_rom21_device::read_h)
8774{
88   UINT16 address = offset & 0xffff;
89
90   if (offset >= 0x300000 && offset < 0x400000 && address < 0x8000)
91   {
92      if (m_nvram_size > 0)
93      {
94         /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */
95         /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */
96         int mask = (m_nvram_size - 1) & 0x7fff; /* Limit SRAM size to what's actually present */
97         return m_nvram[(offset - 0x6000) & mask];
98      }
99   }
100
10175   // here ROM banks from 0 to 127, mirrored twice
10276   int bank = (offset & 0x3fffff) / 0x8000;
10377   return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
10478}
10579
106WRITE8_MEMBER(sns_rom21_device::write_l)
107{
108   write_h(space, offset, data);
109}
11080
111WRITE8_MEMBER(sns_rom21_device::write_h)
112{
113   UINT16 address = offset & 0xffff;
114
115   if (offset >= 0x300000 && offset < 0x400000 && address < 0x8000)
116   {
117      if (m_nvram_size > 0)
118      {
119         /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */
120         /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */
121         int mask = (m_nvram_size - 1) & 0x7fff; /* Limit SRAM size to what's actually present */
122         m_nvram[(offset - 0x6000) & mask] = data;
123      }
124   }
125}
126
12781// Hi-ROM + S-RTC (used by Daikaijuu Monogatari II)
12882// same as above but additional read/write handling for the RTC
12983/***************************************************************************
trunk/src/mess/machine/sns_rom21.h
r21683r21684
2121   // reading and writing
2222   virtual DECLARE_READ8_MEMBER(read_l);
2323   virtual DECLARE_READ8_MEMBER(read_h);
24   virtual DECLARE_WRITE8_MEMBER(write_l);
25   virtual DECLARE_WRITE8_MEMBER(write_h);
2624};
2725
2826// ======================> sns_rom21_srtc_device
trunk/src/mess/machine/sns_slot.c
r21683r21684
55    (through slot devices)
66
77
8    Carts can be mapped in memory in several different ways and accesses to carts depend
9    on the presence of add-on chips (which map their I/O to diff memory areas)
810
11    Hence, carts can interface with the main system through the following handlers
12    * read_l : typically used to read ROM from memory range [00-7f][0000-ffff]
13    * read_h : typically used to read ROM from memory range [80-ff][0000-ffff]
14    * read_ram : used to read (NV)RAM at the appropriate offset (masks has to be applied
15                 *before* calling it, if dealing with >32K RAM)
16    * write_ram : used to write (NV)RAM at the appropriate offset
17    * read_chip : used to read add-on chip registers
18    * write_chip : used to write to add-on chip registers
19
20    Also, we define two additional ROM access handlers, write_l & write_h for carts with
21    subslots (e.g. BS-X compatible ones), that need to write to subslot (NV)RAM independently
22    to accesses to their own (NV)RAM.
23
924 ***********************************************************************************************************/
1025
1126
r21683r21684
843858      return 0xff;
844859}
845860
861READ8_MEMBER(base_sns_cart_slot_device::read_ram)
862{
863   if (m_cart)
864      return m_cart->read_ram(space, offset);
865   else
866      return 0xff;
867}
868
846869READ8_MEMBER(base_sns_cart_slot_device::chip_read)
847870{
848871   if (m_cart)
r21683r21684
867890      m_cart->write_h(space, offset, data);
868891}
869892
893WRITE8_MEMBER(base_sns_cart_slot_device::write_ram)
894{
895   if (m_cart)
896      m_cart->write_ram(space, offset, data);
897}
898
870899WRITE8_MEMBER(base_sns_cart_slot_device::chip_write)
871900{
872901   if (m_cart)
trunk/src/mess/machine/sns_slot.h
r21683r21684
5858   virtual ~device_sns_cart_interface();
5959
6060   // reading and writing
61   virtual DECLARE_READ8_MEMBER(read_l) { return 0xff; }
62   virtual DECLARE_READ8_MEMBER(read_h) { return 0xff; }
63   virtual DECLARE_WRITE8_MEMBER(write_l) {}
64   virtual DECLARE_WRITE8_MEMBER(write_h) {}
61   virtual DECLARE_READ8_MEMBER(read_l) { return 0xff; }   // ROM access in range [00-7f]
62   virtual DECLARE_READ8_MEMBER(read_h) { return 0xff; }   // ROM access in range [80-ff]
63   virtual DECLARE_READ8_MEMBER(read_ram) { UINT32 mask = m_nvram_size - 1; return m_nvram[offset & mask]; }   // NVRAM access
64   virtual DECLARE_WRITE8_MEMBER(write_l) {}   // used by carts with subslots
65   virtual DECLARE_WRITE8_MEMBER(write_h) {}   // used by carts with subslots
66   virtual DECLARE_WRITE8_MEMBER(write_ram) { UINT32 mask = m_nvram_size - 1; m_nvram[offset & mask] = data; return; }   // NVRAM access
6567   virtual DECLARE_READ8_MEMBER(chip_read) { return 0xff; }
6668   virtual DECLARE_WRITE8_MEMBER(chip_write) {}
6769
r21683r21684
137139   // reading and writing
138140   virtual DECLARE_READ8_MEMBER(read_l);
139141   virtual DECLARE_READ8_MEMBER(read_h);
142   virtual DECLARE_READ8_MEMBER(read_ram);
140143   virtual DECLARE_WRITE8_MEMBER(write_l);
141144   virtual DECLARE_WRITE8_MEMBER(write_h);
145   virtual DECLARE_WRITE8_MEMBER(write_ram);
142146   virtual DECLARE_READ8_MEMBER(chip_read);
143147   virtual DECLARE_WRITE8_MEMBER(chip_write);
144148
trunk/src/mess/drivers/snes.c
r21683r21684
15131513   {
15141514      if (address < 0x2000)
15151515         return space.read_byte(0x7e0000 + address);
1516      if (address >= 0x2000 && address < 0x6000)
1516      else if (address < 0x6000)
15171517         return snes_r_io(space, address);
1518      if (address >= 0x6000 && address < 0x8000)
1518      else if (address < 0x8000)
15191519         return snes_open_bus_r(space, 0);
1520      if (address >= 0x8000)
1520      else
15211521         return m_slotcart->m_cart->read_h(space, offset);
15221522   }
15231523   else if (offset < 0x700000)
r21683r21684
15271527      else
15281528         return m_slotcart->m_cart->read_h(space, offset);
15291529   }
1530   else
1531   {
1532      if (m_type == SNES_SUFAMITURBO && address >= 0x8000 && offset < 0x740000)
1533         return m_slotcart->m_cart->read_h(space, offset);
15301534
1531   // ROM & NVRAM access
1532   return m_slotcart->m_cart->read_h(space, offset);
1535      // here usually there is SRAM mirrored in the whole range, but if ROM is very large then arrives here too (see tokimeki and wizardg4)
1536      if (m_slotcart->m_cart->get_rom_size() > 0x200000 && address >= 0x8000)
1537         return m_slotcart->m_cart->read_h(space, offset);
1538      else
1539      {
1540         if (m_slotcart->m_cart->get_nvram_size() > 0x8000)
1541         {
1542            // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc.
1543            offset = ((offset - 0x700000) / 0x10000) * 0x8000 + (offset & 0x7fff);
1544            return m_slotcart->m_cart->read_ram(space, offset);
1545         }
1546         else if (m_slotcart->m_cart->get_nvram_size() > 0)
1547            return m_slotcart->m_cart->read_ram(space, offset);
1548         else
1549            return snes_open_bus_r(space, 0);
1550      }
1551   }
15331552}
15341553
15351554WRITE8_MEMBER( snsnew_state::snes20_hi_w )
15361555{
15371556   UINT16 address = offset & 0xffff;
1557
1558   if (m_type == SNES_SUFAMITURBO && address >= 0x8000 && ((offset >= 0x600000 && offset < 0x640000) || (offset >= 0x700000 && offset < 0x740000)))
1559   { m_slotcart->m_cart->write_h(space, offset, data); return; }
1560   
15381561   if (offset < 0x400000)
15391562   {
15401563      if (address < 0x2000)
15411564         space.write_byte(0x7e0000 + address, data);
1542      if (address >= 0x2000 && address < 0x6000)
1565      else if (address < 0x6000)
15431566         snes_w_io(space, address, data);
15441567   }
1545   else if (offset >= 0x700000)    // NVRAM access
1568   else if (offset >= 0x700000 && (m_slotcart->m_cart->get_rom_size() <= 0x200000 || address < 0x8000))    // NVRAM access
15461569   {
1547      m_slotcart->m_cart->write_h(space, offset, data);
1570      if (m_slotcart->m_cart->get_nvram_size() > 0x8000)
1571      {
1572         // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc.
1573         offset = ((offset - 0x700000) / 0x10000) * 0x8000 + (offset & 0x7fff);
1574         m_slotcart->m_cart->write_ram(space, offset, data);
1575      }
1576      else if (m_slotcart->m_cart->get_nvram_size() > 0)
1577         m_slotcart->m_cart->write_ram(space, offset, data);
15481578   }
15491579}
15501580
r21683r21684
15561586   {
15571587      if (address < 0x2000)
15581588         return space.read_byte(0x7e0000 + address);
1559      if (address >= 0x2000 && address < 0x6000)
1589      else if (address < 0x6000)
15601590         return snes_r_io(space, address);
1561      if (address >= 0x6000 && address < 0x8000)
1591      else if (address < 0x8000)
15621592         return snes_open_bus_r(space, 0);
1563      if (address >= 0x8000)
1593      else
15641594         return m_slotcart->m_cart->read_l(space, offset);
15651595   }
15661596   else if (offset < 0x700000)
r21683r21684
15701600      else
15711601         return m_slotcart->m_cart->read_l(space, offset);
15721602   }
1573
1574   // ROM & NVRAM access
1575   return m_slotcart->m_cart->read_l(space, offset);
1603   else
1604   {
1605      if (m_type == SNES_SUFAMITURBO && address >= 0x8000 && offset < 0x740000)
1606         return m_slotcart->m_cart->read_l(space, offset);
1607     
1608      // here usually there is SRAM mirrored in the whole range, but if ROM is very large then arrives here too (see tokimeki and wizardg4)
1609      if (m_slotcart->m_cart->get_rom_size() > 0x200000 && address >= 0x8000)
1610         return m_slotcart->m_cart->read_l(space, offset);
1611      else
1612      {
1613         if (m_slotcart->m_cart->get_nvram_size() > 0x8000)
1614         {
1615            // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc.
1616            offset = ((offset - 0x700000) / 0x10000) * 0x8000 + (offset & 0x7fff);
1617            return m_slotcart->m_cart->read_ram(space, offset);
1618         }
1619         else if (m_slotcart->m_cart->get_nvram_size() > 0)
1620            return m_slotcart->m_cart->read_ram(space, offset);
1621         else
1622            return snes_open_bus_r(space, 0);
1623      }
1624   }
15761625}
15771626
15781627WRITE8_MEMBER( snsnew_state::snes20_lo_w )
15791628{
1629   if (m_type == SNES_SUFAMITURBO && (offset & 0xffff) >= 0x8000 && ((offset >= 0x600000 && offset < 0x640000) || (offset >= 0x700000 && offset < 0x740000)))
1630   { m_slotcart->m_cart->write_l(space, offset, data); return; }
1631
15801632   snes20_hi_w(space, offset, data, 0xff);
15811633}
15821634
r21683r21684
15871639{
15881640   UINT16 address = offset & 0xffff;
15891641
1590   if (offset < 0x400000)
1642   if (offset < 0x400000 && address < 0x8000)
15911643   {
15921644      if (address < 0x2000)
15931645         return space.read_byte(0x7e0000 + address);
1594      if (address >= 0x2000 && address < 0x6000)
1646      else if (address < 0x6000)
15951647         return snes_r_io(space, address);
1596      if (address >= 0x6000 && address < 0x8000)
1648      else if (address < 0x8000)
15971649      {
1598         if (m_slotcart->m_cart->get_nvram_size())
1650         if (m_type == SNES_BSXHI && m_slotcart->m_cart->get_nvram_size() && offset >= 0x200000)
15991651         {
1600            // read NVRAM, instead
1601            if (offset >= 0x300000)
1602               return m_slotcart->m_cart->read_l(space, offset);
1652            int mask = (m_slotcart->m_cart->get_nvram_size() - 1) & 0x7fff;
1653            return m_slotcart->m_cart->read_ram(space, (offset - 0x6000) & mask);
16031654         }
1604         return snes_open_bus_r(space, 0);
1655
1656         if (m_slotcart->m_cart->get_nvram_size() && offset >= 0x300000)
1657         {
1658            /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */
1659            /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */
1660            int mask = (m_slotcart->m_cart->get_nvram_size() - 1) & 0x7fff; /* Limit SRAM size to what's actually present */
1661            return m_slotcart->m_cart->read_ram(space, (offset - 0x6000) & mask);
1662         }
1663         else
1664            return snes_open_bus_r(space, 0);
16051665      }
1606      if (address >= 0x8000)
1607         return m_slotcart->m_cart->read_l(space, offset);
16081666   }
16091667
1610   // ROM & NVRAM access
1668   // ROM access
16111669   return m_slotcart->m_cart->read_l(space, offset);
16121670}
16131671
16141672WRITE8_MEMBER( snsnew_state::snes21_lo_w )
16151673{
16161674   UINT16 address = offset & 0xffff;
1617   if (offset < 0x400000)
1675   if (offset < 0x400000 && address < 0x8000)
16181676   {
16191677      if (address < 0x2000)
16201678         space.write_byte(0x7e0000 + address, data);
1621      if (address >= 0x2000 && address < 0x6000)
1679      else if (address < 0x6000)
16221680         snes_w_io(space, address, data);
1623      if (address >= 0x6000 && address < 0x8000)
1681      else if (address < 0x8000)
16241682      {
1625         if (m_slotcart->m_cart->get_nvram_size())
1683         if (m_type == SNES_BSXHI && m_slotcart->m_cart->get_nvram_size() && offset >= 0x200000)
16261684         {
1627            // write to NVRAM, in this case
1628            if (offset >= 0x300000)
1629               m_slotcart->m_cart->write_l(space, offset, data);
1685            int mask = (m_slotcart->m_cart->get_nvram_size() - 1) & 0x7fff;
1686            m_slotcart->m_cart->write_ram(space, (offset - 0x6000) & mask, data);
1687            return;
16301688         }
1689         if (m_slotcart->m_cart->get_nvram_size() && offset >= 0x300000)
1690         {
1691            /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */
1692            /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */
1693            int mask = (m_slotcart->m_cart->get_nvram_size() - 1) & 0x7fff; /* Limit SRAM size to what's actually present */
1694            m_slotcart->m_cart->write_ram(space, (offset - 0x6000) & mask, data);
1695         }
16311696      }
16321697   }
1633   else if (offset >= 0x700000)    // NVRAM access
1634      m_slotcart->m_cart->write_l(space, offset, data);
16351698}
16361699
16371700READ8_MEMBER( snsnew_state::snes21_hi_r )
16381701{
16391702   UINT16 address = offset & 0xffff;
16401703
1641   if (offset < 0x400000)
1704   if (offset < 0x400000 && address < 0x8000)
16421705   {
16431706      if (address < 0x2000)
16441707         return space.read_byte(0x7e0000 + address);
1645      if (address >= 0x2000 && address < 0x6000)
1708      else if (address < 0x6000)
16461709         return snes_r_io(space, address);
1647      if (address >= 0x6000 && address < 0x8000)
1710      else if (address < 0x8000)
16481711      {
1649         if (m_slotcart->m_cart->get_nvram_size())
1712         if (m_type == SNES_BSXHI && m_slotcart->m_cart->get_nvram_size() && offset >= 0x200000)
16501713         {
1651            // read NVRAM, instead
1652            if (offset >= 0x300000)
1653               return  m_slotcart->m_cart->read_h(space, offset);
1714            int mask = (m_slotcart->m_cart->get_nvram_size() - 1) & 0x7fff;
1715            return m_slotcart->m_cart->read_ram(space, (offset - 0x6000) & mask);
16541716         }
1655         return snes_open_bus_r(space, 0);
1717         
1718         if (m_slotcart->m_cart->get_nvram_size() && offset >= 0x300000)
1719         {
1720            /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */
1721            /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */
1722            int mask = (m_slotcart->m_cart->get_nvram_size() - 1) & 0x7fff; /* Limit SRAM size to what's actually present */
1723            return m_slotcart->m_cart->read_ram(space, (offset - 0x6000) & mask);
1724         }
1725         else
1726            return snes_open_bus_r(space, 0);
16561727      }
1657      if (address >= 0x8000)
1658         return m_slotcart->m_cart->read_h(space, offset);
16591728   }
16601729
1661   // ROM & NVRAM access
1730   // ROM access
16621731   return m_slotcart->m_cart->read_h(space, offset);
16631732}
16641733
16651734WRITE8_MEMBER( snsnew_state::snes21_hi_w )
16661735{
16671736   UINT16 address = offset & 0xffff;
1668   if (offset < 0x400000)
1737   if (offset < 0x400000 && address < 0x8000)
16691738   {
16701739      if (address < 0x2000)
16711740         space.write_byte(0x7e0000 + address, data);
1672      if (address >= 0x2000 && address < 0x6000)
1741      else if (address < 0x6000)
16731742         snes_w_io(space, address, data);
1674      if (address >= 0x6000 && address < 0x8000)
1743      else if (address < 0x8000)
16751744      {
1676         if (m_slotcart->m_cart->get_nvram_size())
1745         if (m_type == SNES_BSXHI && m_slotcart->m_cart->get_nvram_size() && offset >= 0x200000)
16771746         {
1678            // write to NVRAM, in this case
1679            if (offset >= 0x300000)
1680               m_slotcart->m_cart->write_h(space, offset, data);
1747            int mask = (m_slotcart->m_cart->get_nvram_size() - 1) & 0x7fff;
1748            m_slotcart->m_cart->write_ram(space, (offset - 0x6000) & mask, data);
1749            return;
16811750         }
1751         if (m_slotcart->m_cart->get_nvram_size() && offset >= 0x300000)
1752         {
1753            /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */
1754            /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */
1755            int mask = (m_slotcart->m_cart->get_nvram_size() - 1) & 0x7fff; /* Limit SRAM size to what's actually present */
1756            m_slotcart->m_cart->write_ram(space, (offset - 0x6000) & mask, data);
1757         }
16821758      }
16831759   }
1684   else if (offset >= 0x700000)    // NVRAM access
1685      m_slotcart->m_cart->write_h(space, offset, data);
16861760}
16871761
16881762// SuperFX / GSU
r21683r21684
16951769   {
16961770      if (address < 0x2000)
16971771         return space.read_byte(0x7e0000 + address);
1698      if (address >= 0x2000 && address < 0x6000)
1772      else if (address < 0x6000)
16991773      {
17001774         if (address >= 0x3000 && address < 0x3300)
17011775            return m_slotcart->m_cart->chip_read(space, offset);
17021776         else
17031777            return snes_r_io(space, address);
17041778      }
1705      if (address >= 0x6000 && address < 0x8000)
1706      {
1707         return m_slotcart->m_cart->read_h(space, offset);   //RAM
1708      }
1709      if (address >= 0x8000)
1710         return m_slotcart->m_cart->read_h(space, offset);   //ROM
1779      else if (address < 0x8000)
1780         return m_slotcart->m_cart->read_ram(space, offset & 0x1fff);
1781      else
1782         return m_slotcart->m_cart->read_h(space, offset);
17111783   }
17121784   else if (offset < 0x600000)
1713      return m_slotcart->m_cart->read_h(space, offset);   //ROM
1714
1715   return m_slotcart->m_cart->read_h(space, offset);   //RAM
1785      return m_slotcart->m_cart->read_h(space, offset);
1786   else
1787      return m_slotcart->m_cart->read_ram(space, offset);
17161788}
17171789
17181790READ8_MEMBER( snsnew_state::snesfx_lo_r )
r21683r21684
17231795   {
17241796      if (address < 0x2000)
17251797         return space.read_byte(0x7e0000 + address);
1726      if (address >= 0x2000 && address < 0x6000)
1798      else if (address < 0x6000)
17271799      {
17281800         if (address >= 0x3000 && address < 0x3300)
17291801            return m_slotcart->m_cart->chip_read(space, offset);
17301802         else
17311803            return snes_r_io(space, address);
17321804      }
1733      if (address >= 0x6000 && address < 0x8000)
1734      {
1735         return m_slotcart->m_cart->read_l(space, offset);   //RAM
1736      }
1737      if (address >= 0x8000)
1738         return m_slotcart->m_cart->read_l(space, offset);   //ROM
1805      else if (address < 0x8000)
1806         return m_slotcart->m_cart->read_ram(space, offset & 0x1fff);
1807      else
1808         return m_slotcart->m_cart->read_l(space, offset);
17391809   }
17401810   else if (offset < 0x600000)
1741      return m_slotcart->m_cart->read_l(space, offset);   //ROM
1742
1743   return m_slotcart->m_cart->read_l(space, offset);   //RAM
1811      return m_slotcart->m_cart->read_l(space, offset);
1812   else
1813      return m_slotcart->m_cart->read_ram(space, offset);
17441814}
17451815
17461816WRITE8_MEMBER( snsnew_state::snesfx_hi_w )
r21683r21684
17501820   {
17511821      if (address < 0x2000)
17521822         space.write_byte(0x7e0000 + address, data);
1753      if (address >= 0x2000 && address < 0x6000)
1823      else if (address < 0x6000)
17541824      {
17551825         if (address >= 0x3000 && address < 0x3300)
17561826            m_slotcart->m_cart->chip_write(space, offset, data);
17571827         else
17581828            snes_w_io(space, address, data);
17591829      }
1760      if (address >= 0x6000 && address < 0x8000)
1761         m_slotcart->m_cart->write_h(space, offset, data);
1830      else if (address < 0x8000)
1831         m_slotcart->m_cart->write_ram(space, offset & 0x1fff, data);
17621832   }
1763   else
1764      m_slotcart->m_cart->write_h(space, offset, data);
1833   else if (offset >= 0x600000)
1834      m_slotcart->m_cart->write_ram(space, offset, data);
17651835}
17661836
17671837WRITE8_MEMBER( snsnew_state::snesfx_lo_w )
17681838{
1769   UINT16 address = offset & 0xffff;
1770   if (offset < 0x400000)
1771   {
1772      if (address < 0x2000)
1773         space.write_byte(0x7e0000 + address, data);
1774      if (address >= 0x2000 && address < 0x6000)
1775      {
1776         if (address >= 0x3000 && address < 0x3300)
1777            m_slotcart->m_cart->chip_write(space, offset, data);
1778         else
1779            snes_w_io(space, address, data);
1780      }
1781      if (address >= 0x6000 && address < 0x8000)
1782         m_slotcart->m_cart->write_l(space, offset, data);
1783   }
1784   else
1785      m_slotcart->m_cart->write_l(space, offset, data);
1839   snesfx_hi_w(space, offset, data, 0xff);
17861840}
17871841
17881842// SPC-7110
r21683r21684
17951849   {
17961850      if (address < 0x2000)
17971851         return space.read_byte(0x7e0000 + address);
1798      if (address >= 0x2000 && address < 0x6000)
1852      else if (address < 0x6000)
17991853      {
18001854         UINT16 limit = (m_slotcart->get_type() == SNES_SPC7110_RTC) ? 0x4843 : 0x4840;
18011855         if (address >= 0x4800 && address < limit)
r21683r21684
18031857
18041858         return snes_r_io(space, address);
18051859      }
1806      if (address >= 0x6000 && address < 0x8000)
1860      else if (address < 0x8000)
18071861      {
18081862         if (offset < 0x10000)
1809            return m_slotcart->m_cart->read_h(space, offset);
1863            return m_slotcart->m_cart->read_ram(space, offset);
18101864         if (offset >= 0x300000 && offset < 0x310000)
1811            return m_slotcart->m_cart->read_h(space, offset);
1865            return m_slotcart->m_cart->read_ram(space, offset);
18121866      }
1813      if (address >= 0x8000)
1867      else
18141868         return m_slotcart->m_cart->read_h(space, offset);
18151869   }
18161870   return m_slotcart->m_cart->read_h(space, offset);
r21683r21684
18241878   {
18251879      if (address < 0x2000)
18261880         return space.read_byte(0x7e0000 + address);
1827      if (address >= 0x2000 && address < 0x6000)
1881      else if (address < 0x6000)
18281882      {
18291883         UINT16 limit = (m_slotcart->get_type() == SNES_SPC7110_RTC) ? 0x4843 : 0x4840;
18301884         if (address >= 0x4800 && address < limit)
r21683r21684
18321886
18331887         return snes_r_io(space, address);
18341888      }
1835      if (address >= 0x6000 && address < 0x8000)
1889      else if (address < 0x8000)
18361890      {
18371891         if (offset < 0x10000)
1838            return m_slotcart->m_cart->read_l(space, offset);
1892            return m_slotcart->m_cart->read_ram(space, offset);
18391893         if (offset >= 0x300000 && offset < 0x310000)
1840            return m_slotcart->m_cart->read_l(space, offset);
1894            return m_slotcart->m_cart->read_ram(space, offset);
18411895      }
1842      if (address >= 0x8000)
1896      else
18431897         return m_slotcart->m_cart->read_l(space, offset);
18441898   }
18451899   if (offset >= 0x500000 && offset < 0x510000)
r21683r21684
18501904
18511905WRITE8_MEMBER( snsnew_state::snespc7110_hi_w )
18521906{
1853   UINT16 address = offset & 0xffff;
1854   if (offset < 0x400000)
1855   {
1856      if (address < 0x2000)
1857         space.write_byte(0x7e0000 + address, data);
1858      if (address >= 0x2000 && address < 0x6000)
1859      {
1860         UINT16 limit = (m_slotcart->get_type() == SNES_SPC7110_RTC) ? 0x4843 : 0x4840;
1861         if (address >= 0x4800 && address < limit)
1862         {
1863            m_slotcart->m_cart->chip_write(space, address, data);
1864            return;
1865         }
1866         snes_w_io(space, address, data);
1867      }
1868      if (address >= 0x6000 && address < 0x8000)
1869      {
1870         if (offset < 0x10000)
1871            m_slotcart->m_cart->write_l(space, offset, data);
1872         if (offset >= 0x300000 && offset < 0x310000)
1873            m_slotcart->m_cart->write_l(space, offset, data);
1874      }
1875   }
1907   snespc7110_lo_w(space, offset, data, 0xff);
18761908}
18771909
18781910WRITE8_MEMBER( snsnew_state::snespc7110_lo_w )
r21683r21684
18821914   {
18831915      if (address < 0x2000)
18841916         space.write_byte(0x7e0000 + address, data);
1885      if (address >= 0x2000 && address < 0x6000)
1917      else if (address < 0x6000)
18861918      {
18871919         UINT16 limit = (m_slotcart->get_type() == SNES_SPC7110_RTC) ? 0x4843 : 0x4840;
18881920         if (address >= 0x4800 && address < limit)
r21683r21684
18921924         }
18931925         snes_w_io(space, address, data);
18941926      }
1895      if (address >= 0x6000 && address < 0x8000)
1927      else if (address < 0x8000)
18961928      {
18971929         if (offset < 0x10000)
1898            m_slotcart->m_cart->write_l(space, offset, data);
1930            m_slotcart->m_cart->write_ram(space, offset, data);
18991931         if (offset >= 0x300000 && offset < 0x310000)
1900            m_slotcart->m_cart->write_l(space, offset, data);
1932            m_slotcart->m_cart->write_ram(space, offset, data);
19011933      }
19021934   }
19031935}
r21683r21684
19131945   {
19141946      if (address < 0x2000)
19151947         return space.read_byte(0x7e0000 + address);
1916      if (address >= 0x2000 && address < 0x6000)
1948      else if (address < 0x6000)
19171949      {
19181950         if (address >= 0x4800 && address < 0x4808)
19191951            return m_slotcart->m_cart->chip_read(space, address);
19201952
19211953         return snes_r_io(space, address);
19221954      }
1923      if (address >= 0x6000 && address < 0x8000)
1955      else if (address < 0x8000)
19241956         return snes_open_bus_r(space, 0);
1925      if (address >= 0x8000)
1957      else
19261958         return m_slotcart->m_cart->read_l(space, offset);
19271959   }
1960   else if (offset >= 0x700000 && address < 0x8000 && m_slotcart->m_cart->get_nvram_size())    // NVRAM access
1961      return m_slotcart->m_cart->read_ram(space, offset);
1962   else   // ROM access
1963      return m_slotcart->m_cart->read_l(space, offset);
1964}
19281965
1929   // ROM & NVRAM access
1930   return m_slotcart->m_cart->read_l(space, offset);
1966READ8_MEMBER( snsnew_state::snesdd1_hi_r )
1967{
1968   if (offset >= 0x400000)
1969      return m_slotcart->m_cart->read_h(space, offset);
1970   else
1971      return snesdd1_lo_r(space, offset, 0xff);
19311972}
19321973
19331974WRITE8_MEMBER( snsnew_state::snesdd1_lo_w )
19341975{
1976   snesdd1_hi_w(space, offset, data, 0xff);
1977}
1978
1979WRITE8_MEMBER( snsnew_state::snesdd1_hi_w )
1980{
19351981   UINT16 address = offset & 0xffff;
19361982   if (offset < 0x400000)
19371983   {
19381984      if (address < 0x2000)
19391985         space.write_byte(0x7e0000 + address, data);
1940      if (address >= 0x2000 && address < 0x6000)
1986      else if (address < 0x6000)
19411987      {
19421988         if (address >= 0x4300 && address < 0x4380)
19431989         {
r21683r21684
19531999      }
19542000   }
19552001   if (offset >= 0x700000 && address < 0x8000 && m_slotcart->m_cart->get_nvram_size())
1956      return m_slotcart->m_cart->write_l(space, offset, data);
2002      return m_slotcart->m_cart->write_ram(space, offset, data);
19572003}
19582004
1959READ8_MEMBER( snsnew_state::snesdd1_hi_r )
1960{
1961   if (offset >= 0x400000)
1962      return m_slotcart->m_cart->read_h(space, offset);
1963   else
1964      return snesdd1_lo_r(space, offset, 0xff);
1965}
19662005
1967WRITE8_MEMBER( snsnew_state::snesdd1_hi_w )
1968{
1969   snesdd1_lo_w(space, offset, data, 0xff);
1970}
2006// BS-X (Base unit)
19712007
1972
1973// BS-X
1974
19752008READ8_MEMBER( snsnew_state::snesbsx_hi_r )
19762009{
19772010   UINT16 address = offset & 0xffff;
r21683r21684
19802013   {
19812014      if (address < 0x2000)
19822015         return space.read_byte(0x7e0000 + address);
1983      if (address >= 0x2000 && address < 0x6000)
2016      else if (address < 0x6000)
19842017      {
19852018         if (address >= 0x2188 && address < 0x21a0)
19862019            return m_slotcart->m_cart->chip_read(space, offset);
r21683r21684
19882021            return m_slotcart->m_cart->chip_read(space, offset);
19892022         return snes_r_io(space, address);
19902023      }
1991      if (address >= 0x6000 && address < 0x8000)
2024      else if (address < 0x8000)
19922025      {
19932026         if (offset >= 0x200000)
1994            return m_slotcart->m_cart->read_l(space, offset);
2027            return m_slotcart->m_cart->read_h(space, offset);
19952028         else
19962029            return snes_open_bus_r(space, 0);
19972030      }
1998      if (address >= 0x8000)
1999         return m_slotcart->m_cart->read_l(space, offset);
2031      else
2032         return m_slotcart->m_cart->read_h(space, offset);
20002033   }
2001   return m_slotcart->m_cart->read_l(space, offset);
2034   return m_slotcart->m_cart->read_h(space, offset);
20022035}
20032036
20042037WRITE8_MEMBER( snsnew_state::snesbsx_hi_w )
r21683r21684
20082041   {
20092042      if (address < 0x2000)
20102043         space.write_byte(0x7e0000 + address, data);
2011      if (address >= 0x2000 && address < 0x6000)
2044      else if (address < 0x6000)
20122045      {
20132046         if (address >= 0x2188 && address < 0x21a0)
20142047         {
r21683r21684
20222055         }
20232056         snes_w_io(space, address, data);
20242057      }
2025      if (address >= 0x6000 && address < 0x8000)
2058      else if (address < 0x8000)
20262059      {
20272060         if (offset >= 0x200000)
20282061            return m_slotcart->m_cart->write_l(space, offset, data);
20292062      }
2030      if (address >= 0x8000)
2063      else
20312064         return m_slotcart->m_cart->write_l(space, offset, data);
20322065   }
20332066   return m_slotcart->m_cart->write_l(space, offset, data);
r21683r21684
20352068
20362069READ8_MEMBER( snsnew_state::snesbsx_lo_r )
20372070{
2038   return snesbsx_hi_r(space, offset, 0xff);
2071   UINT16 address = offset & 0xffff;
2072   
2073   if (offset < 0x400000)
2074   {
2075      if (address < 0x2000)
2076         return space.read_byte(0x7e0000 + address);
2077      else if (address < 0x6000)
2078      {
2079         if (address >= 0x2188 && address < 0x21a0)
2080            return m_slotcart->m_cart->chip_read(space, offset);
2081         if (address >= 0x5000)
2082            return m_slotcart->m_cart->chip_read(space, offset);
2083         return snes_r_io(space, address);
2084      }
2085      else if (address < 0x8000)
2086      {
2087         if (offset >= 0x200000)
2088            return m_slotcart->m_cart->read_l(space, offset);
2089         else
2090            return snes_open_bus_r(space, 0);
2091      }
2092      else
2093         return m_slotcart->m_cart->read_l(space, offset);
2094   }
2095   return m_slotcart->m_cart->read_l(space, offset);
20392096}
20402097
20412098WRITE8_MEMBER( snsnew_state::snesbsx_lo_w )

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