MAME SVN History

199869 Revisions

r21605 Tuesday 5th March, 2013 at 19:54:55 UTC by Curt Coder
m6809: Fixed compile on older OS X tools. (nw)

[src/emu/cpu/m6809]

hd6309.h konami.ops m6809.h

trunk/src/emu/cpu/m6809/m6809.h
r21604	r21605
79	79	virtual void state_string_export(const device_state_entry &entry, astring &string);
80	80
81	81	// addressing modes
82		static const int ADDRESSING_MODE_IMMEDIATE = 0;
83		static const int ADDRESSING_MODE_EA = 1;
84		static const int ADDRESSING_MODE_REGISTER_A = 2;
85		static const int ADDRESSING_MODE_REGISTER_B = 3;
86		static const int ADDRESSING_MODE_REGISTER_D = 4;
	82	enum
	83	{
	84	ADDRESSING_MODE_IMMEDIATE = 0,
	85	ADDRESSING_MODE_EA = 1,
	86	ADDRESSING_MODE_REGISTER_A = 2,
	87	ADDRESSING_MODE_REGISTER_B = 3,
	88	ADDRESSING_MODE_REGISTER_D = 4
	89	};
87	90
88	91	// register transfer
89	92	struct exgtfr_register
r21604	r21605
93	96	};
94	97
95	98	// flag bits in the cc register
96		static const UINT8 CC_C = 0x01; // Carry
97		static const UINT8 CC_V = 0x02; // Overflow
98		static const UINT8 CC_Z = 0x04; // Zero
99		static const UINT8 CC_N = 0x08; // Negative
100		static const UINT8 CC_I = 0x10; // Inhibit IRQ
101		static const UINT8 CC_H = 0x20; // Half (auxiliary) carry
102		static const UINT8 CC_F = 0x40; // Inhibit FIRQ
103		static const UINT8 CC_E = 0x80; // Entire state pushed
	99	enum
	100	{
	101	CC_C = 0x01, // Carry
	102	CC_V = 0x02, // Overflow
	103	CC_Z = 0x04, // Zero
	104	CC_N = 0x08, // Negative
	105	CC_I = 0x10, // Inhibit IRQ
	106	CC_H = 0x20, // Half (auxiliary) carry
	107	CC_F = 0x40, // Inhibit FIRQ
	108	CC_E = 0x80 // Entire state pushed
	109	};
104	110
105	111	// flag combinations
106		static const UINT8 CC_VC = CC_V \| CC_C;
107		static const UINT8 CC_ZC = CC_Z \| CC_C;
108		static const UINT8 CC_NZ = CC_N \| CC_Z;
109		static const UINT8 CC_NZC = CC_N \| CC_Z \| CC_C;
110		static const UINT8 CC_NZV = CC_N \| CC_Z \| CC_V;
111		static const UINT8 CC_NZVC = CC_N \| CC_Z \| CC_V \| CC_C;
112		static const UINT8 CC_HNZVC = CC_H \| CC_N \| CC_Z \| CC_V \| CC_C;
	112	enum
	113	{
	114	CC_VC = CC_V \| CC_C,
	115	CC_ZC = CC_Z \| CC_C,
	116	CC_NZ = CC_N \| CC_Z,
	117	CC_NZC = CC_N \| CC_Z \| CC_C,
	118	CC_NZV = CC_N \| CC_Z \| CC_V,
	119	CC_NZVC = CC_N \| CC_Z \| CC_V \| CC_C,
	120	CC_HNZVC = CC_H \| CC_N \| CC_Z \| CC_V \| CC_C
	121	};
113	122
114	123	// interrupt vectors
115		static const UINT16 VECTOR_SWI3 = 0xFFF2;
116		static const UINT16 VECTOR_SWI2 = 0xFFF4;
117		static const UINT16 VECTOR_FIRQ = 0xFFF6;
118		static const UINT16 VECTOR_IRQ = 0xFFF8;
119		static const UINT16 VECTOR_SWI = 0xFFFA;
120		static const UINT16 VECTOR_NMI = 0xFFFC;
121		static const UINT16 VECTOR_RESET_FFFE = 0xFFFE;
	124	enum
	125	{
	126	VECTOR_SWI3 = 0xFFF2,
	127	VECTOR_SWI2 = 0xFFF4,
	128	VECTOR_FIRQ = 0xFFF6,
	129	VECTOR_IRQ = 0xFFF8,
	130	VECTOR_SWI = 0xFFFA,
	131	VECTOR_NMI = 0xFFFC,
	132	VECTOR_RESET_FFFE = 0xFFFE
	133	};
122	134
123	135	// CPU registers
124	136	PAIR16 m_pc; // program counter

trunk/src/emu/cpu/m6809/konami.ops
r21604	r21605
517	517	else
518	518	m_cc &= ~CC_C;
519	519
520		m_d.w = set_flags<UINT16>(CC_NZ, safe_shift_right<UINT16>(m_d.w, m_temp.b.l));
	520	m_d.w = set_flags<UINT16>(CC_NZ, safe_shift_right<INT16>(m_d.w, m_temp.b.l));
521	521	}
522	522	eat(1);
523	523	return;

trunk/src/emu/cpu/m6809/hd6309.h
r21604	r21605
46	46	typedef m6809_base_device super;
47	47
48	48	// addressing modes
49		static const int ADDRESSING_MODE_REGISTER_E = 5;
50		static const int ADDRESSING_MODE_REGISTER_F = 6;
51		static const int ADDRESSING_MODE_REGISTER_W = 7;
52		static const int ADDRESSING_MODE_REGISTER_X = 8;
53		static const int ADDRESSING_MODE_REGISTER_Y = 9;
54		static const int ADDRESSING_MODE_REGISTER_U = 10;
55		static const int ADDRESSING_MODE_REGISTER_S = 11;
56		static const int ADDRESSING_MODE_REGISTER_CC = 12;
57		static const int ADDRESSING_MODE_REGISTER_DP = 13;
58		static const int ADDRESSING_MODE_REGISTER_PC = 14;
59		static const int ADDRESSING_MODE_REGISTER_V = 15;
60		static const int ADDRESSING_MODE_ZERO = 16;
	49	enum
	50	{
	51	ADDRESSING_MODE_REGISTER_E = 5,
	52	ADDRESSING_MODE_REGISTER_F = 6,
	53	ADDRESSING_MODE_REGISTER_W = 7,
	54	ADDRESSING_MODE_REGISTER_X = 8,
	55	ADDRESSING_MODE_REGISTER_Y = 9,
	56	ADDRESSING_MODE_REGISTER_U = 10,
	57	ADDRESSING_MODE_REGISTER_S = 11,
	58	ADDRESSING_MODE_REGISTER_CC = 12,
	59	ADDRESSING_MODE_REGISTER_DP = 13,
	60	ADDRESSING_MODE_REGISTER_PC = 14,
	61	ADDRESSING_MODE_REGISTER_V = 15,
	62	ADDRESSING_MODE_ZERO = 16
	63	};
61	64
62	65	// interrupt vectors
63		static const UINT16 VECTOR_ILLEGAL = 0xFFF0;
64
	66	enum
	67	{
	68	VECTOR_ILLEGAL = 0xFFF0
	69	};
	70
65	71	// CPU registers
66	72	PAIR16 m_w;
67	73	PAIR16 m_v;

199869 Revisions