trunk/src/mess/drivers/snes.c
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| 69 | 69 | DECLARE_WRITE8_MEMBER(snes_input_read); |
| 70 | 70 | DECLARE_READ8_MEMBER(snes_oldjoy1_read); |
| 71 | 71 | DECLARE_READ8_MEMBER(snes_oldjoy2_read); |
| 72 | |
| 73 | UINT8 m_sfx_ram[0x200000]; // or 0x100000? |
| 72 | 74 | }; |
| 73 | 75 | |
| 74 | 76 | /************************************* |
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| 194 | 196 | { |
| 195 | 197 | if (address >= 0x3000 && address < 0x3300) |
| 196 | 198 | return superfx_mmio_read(m_superfx, address); |
| 197 | | if (address >= 0x6000 && address < 0x8000) // here it should be snes_ram[0xe00000+...] but there are mirroring issues |
| 198 | | return superfx_access_ram(m_superfx) ? snes_ram[0xf00000 + (offset & 0x1fff)] : snes_open_bus_r(space, 0); |
| 199 | if (address >= 0x6000 && address < 0x8000) |
| 200 | return superfx_access_ram(m_superfx) ? m_sfx_ram[offset & 0x1fff] : snes_open_bus_r(space, 0); |
| 199 | 201 | } |
| 200 | 202 | if (m_has_addon_chip == HAS_SUPERFX && m_superfx != NULL |
| 201 | 203 | && offset >= 0x400000 && offset < 0x600000) |
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| 213 | 215 | } |
| 214 | 216 | if (m_has_addon_chip == HAS_SUPERFX && m_superfx != NULL |
| 215 | 217 | && offset >= 0x600000) |
| 216 | | return superfx_access_ram(m_superfx) ? snes_ram[0x800000 + offset] : snes_open_bus_r(space, 0); |
| 218 | return superfx_access_ram(m_superfx) ? m_sfx_ram[offset & 0xfffff] : snes_open_bus_r(space, 0); |
| 217 | 219 | |
| 218 | 220 | // base cart access |
| 219 | 221 | if (offset < 0x300000) |
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| 366 | 368 | { |
| 367 | 369 | if (address >= 0x3000 && address < 0x3300) |
| 368 | 370 | { superfx_mmio_write(m_superfx, address, data); return; } |
| 369 | | if (address >= 0x6000 && address < 0x8000) // here it should be snes_ram[0xe00000+...] but there are mirroring issues |
| 370 | | { snes_ram[0xf00000 + (offset & 0x1fff)] = data; return; } |
| 371 | if (address >= 0x6000 && address < 0x8000) |
| 372 | { m_sfx_ram[offset & 0x1fff] = data; return; } |
| 371 | 373 | } |
| 372 | 374 | if (m_has_addon_chip == HAS_SUPERFX && m_superfx != NULL |
| 373 | 375 | && offset >= 0x600000) |
| 374 | | { snes_ram[0x800000 + offset] = data; return; } |
| 376 | { m_sfx_ram[offset & 0xfffff] = data; return; } |
| 375 | 377 | |
| 376 | 378 | // base cart access |
| 377 | 379 | if (offset < 0x300000) |
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| 476 | 478 | READ8_MEMBER( snes_console_state::superfx_r_bank3 ) |
| 477 | 479 | { |
| 478 | 480 | /* IMPORTANT: SFX RAM sits in 0x600000-0x7fffff, and it's mirrored in 0xe00000-0xffffff. However, SNES |
| 479 | | has only access to 0x600000-0x7dffff (because there is WRAM after that), hence we directly use the mirror |
| 480 | | as the place where to write & read SFX RAM. SNES handlers have been setup accordingly. */ |
| 481 | has only access to 0x600000-0x7dffff (because there is WRAM after that). */ |
| 481 | 482 | //printf("superfx_r_bank3: %08x = %02x\n", offset, snes_ram[0xe00000 + offset]); |
| 482 | | return snes_ram[0xe00000 + offset]; |
| 483 | return m_sfx_ram[offset & 0xfffff]; |
| 483 | 484 | } |
| 484 | 485 | |
| 485 | 486 | WRITE8_MEMBER( snes_console_state::superfx_w_bank3 ) |
| 486 | 487 | { |
| 487 | 488 | /* IMPORTANT: SFX RAM sits in 0x600000-0x7fffff, and it's mirrored in 0xe00000-0xffffff. However, SNES |
| 488 | | has only access to 0x600000-0x7dffff (because there is WRAM after that), hence we directly use the mirror |
| 489 | | as the place where to write & read SFX RAM. SNES handlers have been setup accordingly. */ |
| 489 | has only access to 0x600000-0x7dffff (because there is WRAM after that). */ |
| 490 | 490 | //printf("superfx_w_bank3: %08x = %02x\n", offset, data); |
| 491 | | snes_ram[0xe00000 + offset] = data; |
| 491 | m_sfx_ram[offset & 0xfffff] = data; |
| 492 | 492 | } |
| 493 | 493 | |
| 494 | 494 | /************************************* |