trunk/hash/gbcolor.xml
| r21510 | r21511 | |
| 23280 | 23280 | </part> |
| 23281 | 23281 | </software> |
| 23282 | 23282 | |
| 23283 | <software name="3gokum2a" cloneof="3gokum2"> |
| 23284 | <description>Zhen San Guo Wu Shuang 2 - Shin Sangokumusou 2 (Chi, Pirate)</description> |
| 23285 | <year>200?</year> |
| 23286 | <publisher><pirate></publisher> |
| 23287 | <info name="alt_title" value="真三國無雙2"/> |
| 23288 | <part name="cart" interface="gameboy_cart"> |
| 23289 | <feature name="slot" value="rom_mbc5" /> |
| 23290 | <!-- cartridge ram --> |
| 23291 | <dataarea name="rom" size="2097152"> |
| 23292 | <rom name="shin san guo shi 2 (unl).bin" size="2097152" crc="33f56c90" sha1="a5111c11cf70c65341b373f484650caae3c4d29f" offset="000000" /> |
| 23293 | </dataarea> |
| 23294 | <dataarea name="nvram" size="8192"> |
| 23295 | </dataarea> |
| 23296 | </part> |
| 23297 | </software> |
| 23298 | |
| 23283 | 23299 | <software name="zzx3"> |
| 23284 | 23300 | <!-- 4MB rom with crc 66442e7d is taizou's cracked version running on base MBC5 --> |
| 23285 | 23301 | <description>Zhi Zhu Xia III (Chi)</description> |
| r21510 | r21511 | |
| 23931 | 23947 | </part> |
| 23932 | 23948 | </software> |
| 23933 | 23949 | |
| 23934 | | <software name="sqsd" supported="no"> |
| 23950 | <!-- works on gbpocket --> |
| 23951 | <software name="sqsd"> |
| 23935 | 23952 | <!-- Alt. Title: 石器時代 精靈王誕生 (Stone Age - Birth of the Goblin King) --> |
| 23936 | 23953 | <description>Shi Qi Shi Dai - Jing Ling Wang Dan Sheng (Chi)</description> |
| 23937 | 23954 | <year>20??</year> |
| 23938 | 23955 | <publisher>GOWIN</publisher> |
| 23939 | 23956 | <part name="cart" interface="gameboy_cart"> |
| 23940 | | <feature name="slot" value="rom_mbc5" /> |
| 23957 | <feature name="slot" value="rom_yong" /> |
| 23941 | 23958 | <!-- cartridge ram --> |
| 23942 | 23959 | <dataarea name="rom" size="4194304"> |
| 23943 | 23960 | <rom name="stone age (unl).bin" size="4194304" crc="e7d9d377" sha1="f88f605960c1573aa8bc5fafab19014b0d987729" offset="000000" /> |
| r21510 | r21511 | |
| 23947 | 23964 | </part> |
| 23948 | 23965 | </software> |
| 23949 | 23966 | |
| 23950 | | <software name="sqsdh" cloneof="sqsd" supported="partial"> |
| 23967 | <!-- works on gbpocket --> |
| 23968 | <software name="sqsdh" cloneof="sqsd"> |
| 23951 | 23969 | <!-- Alt. Title: 石器時代 精靈王誕生 (Stone Age - Birth of the Goblin King) --> |
| 23952 | 23970 | <description>Shi Qi Shi Dai - Jing Ling Wang Dan Sheng (Chi, Hacked?)</description> |
| 23953 | 23971 | <year>20??</year> |
| 23954 | 23972 | <publisher>GOWIN</publisher> |
| 23955 | 23973 | <part name="cart" interface="gameboy_cart"> |
| 23956 | | <feature name="slot" value="rom_mbc5" /> |
| 23974 | <feature name="slot" value="rom_yong" /> |
| 23957 | 23975 | <!-- cartridge ram --> |
| 23958 | 23976 | <dataarea name="rom" size="4194304"> |
| 23959 | 23977 | <rom name="stone age (unl)(hacked).bin" size="4194304" crc="2ffe697c" sha1="b992f280b5dd2095c8f430282c5dba69c6a10eb4" offset="000000" /> |
| r21510 | r21511 | |
| 23963 | 23981 | </part> |
| 23964 | 23982 | </software> |
| 23965 | 23983 | |
| 23966 | | <software name="ssangws2"> |
| 23967 | | <description>Shin Sangoku Musou 2 - Zhen San Guo Wu Shuang 2 (Chi)</description> |
| 23968 | | <year>20??</year> |
| 23969 | | <publisher><unknown></publisher> |
| 23970 | | <info name="alt_title" value="真三國無雙2"/> |
| 23971 | | <part name="cart" interface="gameboy_cart"> |
| 23972 | | <feature name="slot" value="rom_mbc5" /> |
| 23973 | | <!-- cartridge ram --> |
| 23974 | | <dataarea name="rom" size="2097152"> |
| 23975 | | <rom name="shin san guo shi 2 (unl).bin" size="2097152" crc="33f56c90" sha1="a5111c11cf70c65341b373f484650caae3c4d29f" offset="000000" /> |
| 23976 | | </dataarea> |
| 23977 | | <dataarea name="nvram" size="8192"> |
| 23978 | | </dataarea> |
| 23979 | | </part> |
| 23980 | | </software> |
| 23981 | | |
| 23982 | 23984 | <software name="dquest4"> |
| 23983 | 23985 | <description>Dragon Quest 4 - Yongzhe Dou E Long 4 (Chi)</description> |
| 23984 | 23986 | <year>20??</year> |
| r21510 | r21511 | |
| 24094 | 24096 | </part> |
| 24095 | 24097 | </software> |
| 24096 | 24098 | |
| 24099 | <!-- |
| 24100 | There are various dumps of this: |
| 24101 | 2MB version (CRC 18fd445d) which contains 4 copies of the rom used here |
| 24102 | 256KB version (CRC 791f8c86) which contains the first half of the rom used here |
| 24103 | |
| 24104 | taizou dumped the game also from a multicart and got a 1MB dump containing the rom |
| 24105 | used here repeated twice. we need to redump the standalone cart to confirm the size |
| 24106 | but the 256KB version is definitely underdumped and misses sprite data |
| 24107 | --> |
| 24097 | 24108 | <software name="sm3sp" supported="no"> |
| 24098 | | <description>Super Mario 3 Special (Chi, Bad? Protected?)</description> |
| 24099 | | <year>200?</year> |
| 24109 | <description>Super Mario 3 Special (Chi)</description> |
| 24110 | <year>2000</year> |
| 24100 | 24111 | <publisher>Yong Yong</publisher> |
| 24101 | 24112 | <part name="cart" interface="gameboy_cart"> |
| 24102 | | <feature name="slot" value="rom_mbc1" /> |
| 24103 | | <dataarea name="rom" size="262144"> |
| 24104 | | <rom name="super mario 3 special (unl).bin" size="262144" crc="791f8c86" sha1="c5632ea968398d3a342f2639aad7e11122d561ef" offset="000000" /> |
| 24113 | <feature name="slot" value="rom_sm3sp" /> |
| 24114 | <dataarea name="rom" size="524288"> |
| 24115 | <rom name="super mario 3 special (unl).bin" size="524288" crc="5e4266a7" sha1="f493da9f707ad84c4d720687ec1ca3f635dc35c6" offset="000000" /> |
| 24105 | 24116 | </dataarea> |
| 24106 | 24117 | </part> |
| 24107 | 24118 | </software> |
| r21510 | r21511 | |
| 24112 | 24123 | <year>20??</year> |
| 24113 | 24124 | <publisher>Yong Yong</publisher> |
| 24114 | 24125 | <part name="cart" interface="gameboy_cart"> |
| 24115 | | <feature name="slot" value="rom_mbc5" /> |
| 24126 | <feature name="slot" value="rom_digimon" /> |
| 24116 | 24127 | <dataarea name="rom" size="1048576"> |
| 24117 | 24128 | <rom name="digimon 2 (unl).bin" size="1048576" crc="aabbec08" sha1="b88393318c35fcd63b9bbe8ccd0ce89d971b6163" offset="000000" /> |
| 24118 | 24129 | </dataarea> |
| r21510 | r21511 | |
| 24157 | 24168 | <year>20??</year> |
| 24158 | 24169 | <publisher>Yong Yong</publisher> |
| 24159 | 24170 | <part name="cart" interface="gameboy_cart"> |
| 24160 | | <feature name="slot" value="rom_mbc5" /> |
| 24171 | <feature name="slot" value="rom_digimon" /> |
| 24161 | 24172 | <dataarea name="rom" size="1048576"> |
| 24162 | 24173 | <rom name="digimon 4 (unl).bin" size="1048576" crc="2ee18ab2" sha1="839f0880749735ba2113e437f8efede171b7474d" offset="000000" /> |
| 24163 | 24174 | </dataarea> |
trunk/src/mess/drivers/gb.c
| r21510 | r21511 | |
| 522 | 522 | m_cartslot->m_cart->write_ram(space, offset, data); |
| 523 | 523 | } |
| 524 | 524 | |
| 525 | READ8_MEMBER(gb_state::gb_echo_r) |
| 526 | { |
| 527 | return space.read_byte(0xc000 + offset); |
| 528 | } |
| 529 | |
| 530 | WRITE8_MEMBER(gb_state::gb_echo_w) |
| 531 | { |
| 532 | return space.write_byte(0xc000 + offset, data); |
| 533 | } |
| 534 | |
| 525 | 535 | READ8_MEMBER(megaduck_state::cart_r) |
| 526 | 536 | { |
| 527 | 537 | if (m_cartslot && m_cartslot->m_cart) |
| r21510 | r21511 | |
| 546 | 556 | static ADDRESS_MAP_START(gameboy_map, AS_PROGRAM, 8, gb_state ) |
| 547 | 557 | ADDRESS_MAP_UNMAP_HIGH |
| 548 | 558 | AM_RANGE(0x0000, 0x7fff) AM_READWRITE(gb_cart_r, gb_bank_w) |
| 549 | | AM_RANGE(0x8000, 0x9fff) AM_READWRITE(gb_vram_r, gb_vram_w ) /* 8k VRAM */ |
| 550 | | AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */ |
| 551 | | AM_RANGE(0xc000, 0xfdff) AM_RAM /* 8k low RAM, echo RAM */ |
| 552 | | AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */ |
| 553 | | AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, gb_io_w ) /* I/O */ |
| 559 | AM_RANGE(0x8000, 0x9fff) AM_READWRITE(gb_vram_r, gb_vram_w ) /* 8k VRAM */ |
| 560 | AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */ |
| 561 | AM_RANGE(0xc000, 0xdfff) AM_RAM /* 8k low RAM */ |
| 562 | AM_RANGE(0xe000, 0xfdff) AM_READWRITE(gb_echo_r, gb_echo_w ) /* echo RAM */ |
| 563 | AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */ |
| 564 | AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, gb_io_w ) /* I/O */ |
| 554 | 565 | AM_RANGE(0xff10, 0xff26) AM_DEVREADWRITE_LEGACY("custom", gb_sound_r, gb_sound_w ) /* sound registers */ |
| 555 | 566 | AM_RANGE(0xff27, 0xff2f) AM_NOP /* unused */ |
| 556 | 567 | AM_RANGE(0xff30, 0xff3f) AM_DEVREADWRITE_LEGACY("custom", gb_wave_r, gb_wave_w ) /* Wave ram */ |
| r21510 | r21511 | |
| 562 | 573 | static ADDRESS_MAP_START(sgb_map, AS_PROGRAM, 8, gb_state ) |
| 563 | 574 | ADDRESS_MAP_UNMAP_HIGH |
| 564 | 575 | AM_RANGE(0x0000, 0x7fff) AM_READWRITE(gb_cart_r, gb_bank_w) |
| 565 | | AM_RANGE(0x8000, 0x9fff) AM_READWRITE(gb_vram_r, gb_vram_w ) /* 8k VRAM */ |
| 566 | | AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */ |
| 567 | | AM_RANGE(0xc000, 0xfdff) AM_RAM /* 8k low RAM, echo RAM */ |
| 568 | | AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */ |
| 569 | | AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, sgb_io_w ) /* I/O */ |
| 576 | AM_RANGE(0x8000, 0x9fff) AM_READWRITE(gb_vram_r, gb_vram_w ) /* 8k VRAM */ |
| 577 | AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */ |
| 578 | AM_RANGE(0xc000, 0xdfff) AM_RAM /* 8k low RAM */ |
| 579 | AM_RANGE(0xe000, 0xfdff) AM_READWRITE(gb_echo_r, gb_echo_w ) /* echo RAM */ |
| 580 | AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */ |
| 581 | AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, sgb_io_w ) /* I/O */ |
| 570 | 582 | AM_RANGE(0xff10, 0xff26) AM_DEVREADWRITE_LEGACY("custom", gb_sound_r, gb_sound_w ) /* sound registers */ |
| 571 | 583 | AM_RANGE(0xff27, 0xff2f) AM_NOP /* unused */ |
| 572 | 584 | AM_RANGE(0xff30, 0xff3f) AM_DEVREADWRITE_LEGACY("custom", gb_wave_r, gb_wave_w ) /* Wave RAM */ |
| r21510 | r21511 | |
| 582 | 594 | AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */ |
| 583 | 595 | AM_RANGE(0xc000, 0xcfff) AM_RAM /* 4k fixed RAM bank */ |
| 584 | 596 | AM_RANGE(0xd000, 0xdfff) AM_RAMBANK("cgb_ram") /* 4k switched RAM bank */ |
| 585 | | AM_RANGE(0xe000, 0xfdff) AM_RAM /* echo RAM */ |
| 597 | AM_RANGE(0xe000, 0xfdff) AM_READWRITE(gb_echo_r, gb_echo_w ) /* echo RAM */ |
| 586 | 598 | AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */ |
| 587 | 599 | AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, gb_io_w ) /* I/O */ |
| 588 | 600 | AM_RANGE(0xff10, 0xff26) AM_DEVREADWRITE_LEGACY("custom", gb_sound_r, gb_sound_w ) /* sound controller */ |
| r21510 | r21511 | |
| 647 | 659 | SLOT_INTERFACE_INTERNAL("rom_camera", GB_STD_ROM) |
| 648 | 660 | SLOT_INTERFACE_INTERNAL("rom_sintax", GB_ROM_SINTAX) |
| 649 | 661 | SLOT_INTERFACE_INTERNAL("rom_chong", GB_ROM_CHONGWU) |
| 662 | SLOT_INTERFACE_INTERNAL("rom_digimon", GB_ROM_DIGIMON) |
| 663 | SLOT_INTERFACE_INTERNAL("rom_rock8", GB_ROM_ROCKMAN8) |
| 664 | SLOT_INTERFACE_INTERNAL("rom_sm3sp", GB_ROM_SM3SP) |
| 650 | 665 | SLOT_INTERFACE_END |
| 651 | 666 | |
| 652 | 667 | static SLOT_INTERFACE_START(megaduck_cart) |
trunk/src/mess/machine/gb_mbc.c
| r21510 | r21511 | |
| 26 | 26 | const device_type GB_ROM_MMM01 = &device_creator<gb_rom_mmm01_device>; |
| 27 | 27 | const device_type GB_ROM_SINTAX = &device_creator<gb_rom_sintax_device>; |
| 28 | 28 | const device_type GB_ROM_CHONGWU = &device_creator<gb_rom_chongwu_device>; |
| 29 | const device_type GB_ROM_DIGIMON = &device_creator<gb_rom_digimon_device>; |
| 30 | const device_type GB_ROM_ROCKMAN8 = &device_creator<gb_rom_rockman8_device>; |
| 31 | const device_type GB_ROM_SM3SP = &device_creator<gb_rom_sm3sp_device>; |
| 29 | 32 | |
| 30 | 33 | |
| 31 | 34 | gb_rom_mbc_device::gb_rom_mbc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) |
| r21510 | r21511 | |
| 89 | 92 | { |
| 90 | 93 | } |
| 91 | 94 | |
| 95 | gb_rom_digimon_device::gb_rom_digimon_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 96 | : gb_rom_mbc5_device(mconfig, GB_ROM_DIGIMON, "GB Digimon", tag, owner, clock) |
| 97 | { |
| 98 | } |
| 92 | 99 | |
| 100 | gb_rom_rockman8_device::gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 101 | : gb_rom_mbc_device(mconfig, GB_ROM_ROCKMAN8, "GB MBC1 Rockman 8", tag, owner, clock) |
| 102 | { |
| 103 | } |
| 104 | |
| 105 | gb_rom_sm3sp_device::gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 106 | : gb_rom_mbc_device(mconfig, GB_ROM_SM3SP, "GB MBC1 Super Mario 3 Special", tag, owner, clock) |
| 107 | { |
| 108 | } |
| 109 | |
| 110 | |
| 93 | 111 | void gb_rom_mbc_device::device_start() |
| 94 | 112 | { |
| 95 | 113 | has_timer = FALSE; |
| r21510 | r21511 | |
| 305 | 323 | save_item(NAME(m_protection_checked)); |
| 306 | 324 | } |
| 307 | 325 | |
| 326 | void gb_rom_digimon_device::device_start() |
| 327 | { |
| 328 | has_timer = FALSE; |
| 329 | has_rumble = FALSE; |
| 330 | |
| 331 | m_latch_bank = 0; |
| 332 | m_latch_bank2 = 1; |
| 333 | m_ram_bank = 0; |
| 334 | m_ram_enable = 0; |
| 335 | m_mode = 0; |
| 336 | save_item(NAME(m_latch_bank)); |
| 337 | save_item(NAME(m_latch_bank2)); |
| 338 | save_item(NAME(m_ram_bank)); |
| 339 | save_item(NAME(m_ram_enable)); |
| 340 | save_item(NAME(m_mode)); |
| 341 | } |
| 308 | 342 | |
| 343 | void gb_rom_rockman8_device::device_start() |
| 344 | { |
| 345 | has_timer = FALSE; |
| 346 | has_rumble = FALSE; |
| 347 | |
| 348 | m_latch_bank = 0; |
| 349 | m_latch_bank2 = 1; |
| 350 | m_ram_bank = 0; |
| 351 | m_ram_enable = 0; |
| 352 | m_mode = 0; |
| 353 | save_item(NAME(m_latch_bank)); |
| 354 | save_item(NAME(m_latch_bank2)); |
| 355 | save_item(NAME(m_ram_bank)); |
| 356 | save_item(NAME(m_ram_enable)); |
| 357 | save_item(NAME(m_mode)); |
| 358 | } |
| 359 | |
| 360 | void gb_rom_sm3sp_device::device_start() |
| 361 | { |
| 362 | has_timer = FALSE; |
| 363 | has_rumble = FALSE; |
| 364 | |
| 365 | m_latch_bank = 0; |
| 366 | m_latch_bank2 = 1; |
| 367 | m_ram_bank = 0; |
| 368 | m_ram_enable = 0; |
| 369 | m_mode = 0; |
| 370 | save_item(NAME(m_latch_bank)); |
| 371 | save_item(NAME(m_latch_bank2)); |
| 372 | save_item(NAME(m_ram_bank)); |
| 373 | save_item(NAME(m_ram_enable)); |
| 374 | save_item(NAME(m_mode)); |
| 375 | } |
| 376 | |
| 377 | |
| 309 | 378 | /*------------------------------------------------- |
| 310 | 379 | mapper specific handlers |
| 311 | 380 | -------------------------------------------------*/ |
| r21510 | r21511 | |
| 573 | 642 | { |
| 574 | 643 | if (offset < 0x2000) |
| 575 | 644 | m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; |
| 645 | else if (offset < 0x3000) |
| 646 | { |
| 647 | // MBC5 has a 9 bit bank select |
| 648 | // Writing into 2000-2fff sets the lower 8 bits |
| 649 | m_latch_bank2 = (m_latch_bank2 & 0x100) | data; |
| 650 | } |
| 576 | 651 | else if (offset < 0x4000) |
| 577 | 652 | { |
| 578 | 653 | // MBC5 has a 9 bit bank select |
| 579 | | // Writing into 2000-2fff sets the lower 8 bits |
| 580 | 654 | // Writing into 3000-3fff sets the 9th bit |
| 581 | | if (offset & 0x1000) |
| 582 | | m_latch_bank2 = (m_latch_bank2 & 0xff) | ((data & 0x01) << 8); |
| 583 | | else |
| 584 | | m_latch_bank2 = (m_latch_bank2 & 0x100) | data; |
| 655 | m_latch_bank2 = (m_latch_bank2 & 0xff) | ((data & 0x01) << 8); |
| 585 | 656 | } |
| 586 | 657 | else if (offset < 0x6000) |
| 587 | 658 | { |
| r21510 | r21511 | |
| 897 | 968 | m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data; |
| 898 | 969 | } |
| 899 | 970 | |
| 971 | /* |
| 972 | |
| 973 | Further MBC5 variants to emulate: |
| 974 | |
| 975 | Digimon 2 & Digimon 4 (Yong Yong) |
| 976 | |
| 977 | Digimon 2 writes at $2000 to select latch2 (data must be divided by 2, and 0 becomes 1), |
| 978 | then writes to $2400 a series of values that the patched version does not write... |
| 979 | Digimon 4 seems to share part of the $2000 behavior, but does not write to $2400... |
| 980 | |
| 981 | */ |
| 982 | |
| 983 | // MBC5 variant used by Digimon 2 (and maybe 4?) |
| 984 | |
| 985 | READ8_MEMBER(gb_rom_digimon_device::read_rom) |
| 986 | { |
| 987 | if (offset < 0x4000) |
| 988 | return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; |
| 989 | else |
| 990 | return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; |
| 991 | } |
| 992 | |
| 993 | WRITE8_MEMBER(gb_rom_digimon_device::write_bank) |
| 994 | { |
| 995 | if (offset < 0x2000) |
| 996 | m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; |
| 997 | else if (offset == 0x2000) |
| 998 | { |
| 999 | // printf("written $02 %X at %X\n", data, offset); |
| 1000 | if (!data) |
| 1001 | data++; |
| 1002 | m_latch_bank2 = data/2; |
| 1003 | } |
| 1004 | else if (offset < 0x3000) |
| 1005 | { |
| 1006 | // printf("written $03 %X at %X\n", data, offset); |
| 1007 | } |
| 1008 | else if (offset < 0x4000) |
| 1009 | { |
| 1010 | // printf("written $04 %X at %X\n", data, offset); |
| 1011 | } |
| 1012 | else if (offset < 0x6000) |
| 1013 | { |
| 1014 | // printf("written $05-$06 %X at %X\n", data, offset); |
| 1015 | data &= 0x0f; |
| 1016 | if (has_rumble) |
| 1017 | data &= 0x7; |
| 1018 | m_ram_bank = data; |
| 1019 | } |
| 1020 | // else |
| 1021 | // printf("written $07 %X at %X\n", data, offset); |
| 1022 | } |
| 1023 | |
| 1024 | READ8_MEMBER(gb_rom_digimon_device::read_ram) |
| 1025 | { |
| 1026 | if (m_ram && m_ram_enable) |
| 1027 | return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)]; |
| 1028 | else |
| 1029 | return 0xff; |
| 1030 | } |
| 1031 | |
| 1032 | WRITE8_MEMBER(gb_rom_digimon_device::write_ram) |
| 1033 | { |
| 1034 | if (m_ram && m_ram_enable) |
| 1035 | m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data; |
| 1036 | } |
| 1037 | |
| 1038 | |
| 1039 | // MBC1 variant used by Yong Yong for Rockman 8 |
| 1040 | |
| 1041 | READ8_MEMBER(gb_rom_rockman8_device::read_rom) |
| 1042 | { |
| 1043 | if (offset < 0x4000) |
| 1044 | return m_rom[m_latch_bank * 0x4000 + (offset & 0x3fff)]; |
| 1045 | else |
| 1046 | return m_rom[m_latch_bank2 * 0x4000 + (offset & 0x3fff)]; |
| 1047 | } |
| 1048 | |
| 1049 | WRITE8_MEMBER(gb_rom_rockman8_device::write_bank) |
| 1050 | { |
| 1051 | if (offset < 0x2000) |
| 1052 | return; |
| 1053 | else if (offset < 0x4000) |
| 1054 | { |
| 1055 | // 5bits only |
| 1056 | data &= 0x1f; |
| 1057 | if (data == 0) |
| 1058 | data = 1; |
| 1059 | if (data > 0xf) |
| 1060 | data -= 8; |
| 1061 | |
| 1062 | m_latch_bank2 = data; |
| 1063 | } |
| 1064 | } |
| 1065 | |
| 1066 | READ8_MEMBER(gb_rom_rockman8_device::read_ram) |
| 1067 | { |
| 1068 | if (m_ram) |
| 1069 | return m_ram[offset]; |
| 1070 | else |
| 1071 | return 0xff; |
| 1072 | } |
| 1073 | |
| 1074 | WRITE8_MEMBER(gb_rom_rockman8_device::write_ram) |
| 1075 | { |
| 1076 | if (m_ram) |
| 1077 | m_ram[offset] = data; |
| 1078 | } |
| 1079 | |
| 1080 | // MBC1 variant used by Yong Yong for Super Mario 3 Special |
| 1081 | |
| 1082 | // Mario special seems to be 512k image (mirrored up to 1m or 2m [redump needed to establish this]) |
| 1083 | // it consists of 13 unique 16k chunks layed out as follows |
| 1084 | // unique chunk --> bank in bin |
| 1085 | // 1st to 7th --> 0x00 to 0x06 |
| 1086 | // 8th --> 0x08 |
| 1087 | // 9th --> 0x0b |
| 1088 | // 10th --> 0x0c |
| 1089 | // 11th --> 0x0d |
| 1090 | // 12th --> 0x0f |
| 1091 | // 13th --> 0x13 |
| 1092 | |
| 1093 | // writing data to 0x2000-0x2fff switches bank according to the table below |
| 1094 | // (the value values corresponding to table[0x0f] is not confirmed, choices |
| 1095 | // 0,1,2,3,8,c,f freeze the game, while 4,5,6,7,b,d,0x13 work with glitches) |
| 1096 | static UINT8 smb3_table1[0x20] = |
| 1097 | { |
| 1098 | 0x00,0x04,0x01,0x05, 0x02,0x06,0x03,0x05, 0x08,0x0c,0x03,0x0d, 0x03,0x0b,0x0b,0x08 /* original doc here put 0x0f (i.e. 11th unique bank) */, |
| 1099 | 0x05,0x06,0x0b,0x0d, 0x08,0x06,0x13,0x0b, 0x08,0x05,0x05,0x08, 0x0b,0x0d,0x06,0x05 |
| 1100 | }; |
| 1101 | |
| 1102 | // according to old doc from Brian Provinciano, writing bit5 in 0x5000-0x5fff should |
| 1103 | // change the bank layout, in the sense that writing to bankswitch acts like if |
| 1104 | // the original rom has a different layout (as if unique chunks were under permutations |
| 1105 | // (24), (365) and (8a9) with 0,1,7,b,c fixed) and the same table above is used |
| 1106 | // however, no such a write ever happen (only bit4 is written, but changing mode with |
| 1107 | // bit4 breaks the gfx...) |
| 1108 | |
| 1109 | READ8_MEMBER(gb_rom_sm3sp_device::read_rom) |
| 1110 | { |
| 1111 | if (offset < 0x4000) |
| 1112 | return m_rom[rom_bank_map[0] * 0x4000 + (offset & 0x3fff)]; |
| 1113 | else |
| 1114 | return m_rom[m_latch_bank2 * 0x4000 + (offset & 0x3fff)]; |
| 1115 | } |
| 1116 | |
| 1117 | WRITE8_MEMBER(gb_rom_sm3sp_device::write_bank) |
| 1118 | { |
| 1119 | // printf("write 0x%x at %x\n", data, offset); |
| 1120 | if (offset < 0x2000) |
| 1121 | return; |
| 1122 | else if (offset < 0x3000) |
| 1123 | { |
| 1124 | // Table 1 confirmed... |
| 1125 | // 0->0, 4->2, 6->3 |
| 1126 | // 1e -> 6 (level 1 bg gfx) |
| 1127 | // 19 -> 5 (level 2 bg gfx) |
| 1128 | // 1b -> 8 (level 3 bg gfx) |
| 1129 | // 1d -> D (level 4 bg gfx) |
| 1130 | // 1c -> B (bonus house bg gfx) |
| 1131 | // 1 (9 maybe, or 3)? f (5 maybe)? 2->1? |
| 1132 | // 16 -> 4-8? b? |
| 1133 | |
| 1134 | // 5bits only |
| 1135 | data &= 0x1f; |
| 1136 | |
| 1137 | m_latch_bank2 = smb3_table1[data]; |
| 1138 | if (m_mode) |
| 1139 | { |
| 1140 | switch (m_latch_bank2) |
| 1141 | { |
| 1142 | case 0x02: m_latch_bank2 = 4; break; |
| 1143 | case 0x03: m_latch_bank2 = 6; break; |
| 1144 | case 0x04: m_latch_bank2 = 2; break; |
| 1145 | case 0x05: m_latch_bank2 = 3; break; |
| 1146 | case 0x06: m_latch_bank2 = 5; break; |
| 1147 | case 0x0b: m_latch_bank2 = 0xd; break; |
| 1148 | case 0x0c: m_latch_bank2 = 0xb; break; |
| 1149 | case 0x0d: m_latch_bank2 = 0xc; break; |
| 1150 | |
| 1151 | case 0x00: |
| 1152 | case 0x01: |
| 1153 | case 0x08: |
| 1154 | case 0x0f: |
| 1155 | case 0x13: |
| 1156 | default: |
| 1157 | break; |
| 1158 | } |
| 1159 | } |
| 1160 | } |
| 1161 | else if (offset < 0x5000) |
| 1162 | { |
| 1163 | // printf("write $5 %x\n", data); |
| 1164 | //maybe rumble?? |
| 1165 | } |
| 1166 | else if (offset < 0x6000) |
| 1167 | { |
| 1168 | // printf("write mode %x\n", data); |
| 1169 | m_mode = BIT(data, 5); |
| 1170 | // write_bank(space, 0x2000, 1); |
| 1171 | } |
| 1172 | } |
| 1173 | |
| 1174 | READ8_MEMBER(gb_rom_sm3sp_device::read_ram) |
| 1175 | { |
| 1176 | if (m_ram) |
| 1177 | return m_ram[offset]; |
| 1178 | else |
| 1179 | return 0xff; |
| 1180 | } |
| 1181 | |
| 1182 | WRITE8_MEMBER(gb_rom_sm3sp_device::write_ram) |
| 1183 | { |
| 1184 | if (m_ram) |
| 1185 | m_ram[offset] = data; |
| 1186 | } |
trunk/src/mess/machine/gb_mbc.h
| r21510 | r21511 | |
| 189 | 189 | UINT8 m_protection_checked; |
| 190 | 190 | }; |
| 191 | 191 | |
| 192 | // ======================> gb_rom_digimon_device |
| 193 | |
| 194 | class gb_rom_digimon_device : public gb_rom_mbc5_device |
| 195 | { |
| 196 | public: |
| 197 | // construction/destruction |
| 198 | gb_rom_digimon_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 199 | |
| 200 | // device-level overrides |
| 201 | virtual void device_start(); |
| 202 | virtual void device_config_complete() { m_shortname = "gb_rom_digimon"; } |
| 203 | |
| 204 | virtual DECLARE_READ8_MEMBER(read_rom); |
| 205 | virtual DECLARE_WRITE8_MEMBER(write_bank); |
| 206 | virtual DECLARE_READ8_MEMBER(read_ram); |
| 207 | virtual DECLARE_WRITE8_MEMBER(write_ram); |
| 208 | }; |
| 209 | |
| 192 | 210 | // ======================> gb_rom_sintax_device |
| 193 | 211 | class gb_rom_sintax_device : public gb_rom_mbc_device |
| 194 | 212 | { |
| r21510 | r21511 | |
| 211 | 229 | UINT8 m_currentxor, m_xor2, m_xor3, m_xor4, m_xor5, m_sintax_mode; |
| 212 | 230 | }; |
| 213 | 231 | |
| 232 | // ======================> gb_rom_rockman8_device |
| 233 | class gb_rom_rockman8_device : public gb_rom_mbc_device |
| 234 | { |
| 235 | public: |
| 236 | // construction/destruction |
| 237 | gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 238 | |
| 239 | // device-level overrides |
| 240 | virtual void device_start(); |
| 241 | virtual void device_config_complete() { m_shortname = "gb_rom_rockman8"; } |
| 242 | |
| 243 | // reading and writing |
| 244 | virtual DECLARE_READ8_MEMBER(read_rom); |
| 245 | virtual DECLARE_WRITE8_MEMBER(write_bank); |
| 246 | virtual DECLARE_READ8_MEMBER(read_ram); |
| 247 | virtual DECLARE_WRITE8_MEMBER(write_ram); |
| 248 | UINT8 m_bank_mask, m_bank, m_reg; |
| 249 | }; |
| 214 | 250 | |
| 251 | // ======================> gb_rom_sm3sp_device |
| 252 | class gb_rom_sm3sp_device : public gb_rom_mbc_device |
| 253 | { |
| 254 | public: |
| 255 | // construction/destruction |
| 256 | gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 257 | |
| 258 | // device-level overrides |
| 259 | virtual void device_start(); |
| 260 | virtual void device_config_complete() { m_shortname = "gb_rom_sm3sp"; } |
| 261 | |
| 262 | // reading and writing |
| 263 | virtual DECLARE_READ8_MEMBER(read_rom); |
| 264 | virtual DECLARE_WRITE8_MEMBER(write_bank); |
| 265 | virtual DECLARE_READ8_MEMBER(read_ram); |
| 266 | virtual DECLARE_WRITE8_MEMBER(write_ram); |
| 267 | UINT8 m_bank_mask, m_bank, m_reg; |
| 268 | }; |
| 215 | 269 | |
| 270 | |
| 271 | |
| 216 | 272 | // device type definition |
| 217 | 273 | extern const device_type GB_ROM_MBC1; |
| 218 | 274 | extern const device_type GB_ROM_MBC1_COL; |
| r21510 | r21511 | |
| 225 | 281 | extern const device_type GB_ROM_MMM01; |
| 226 | 282 | extern const device_type GB_ROM_SINTAX; |
| 227 | 283 | extern const device_type GB_ROM_CHONGWU; |
| 284 | extern const device_type GB_ROM_DIGIMON; |
| 285 | extern const device_type GB_ROM_ROCKMAN8; |
| 286 | extern const device_type GB_ROM_SM3SP; |
| 228 | 287 | |
| 229 | 288 | #endif |