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r21459 Wednesday 27th February, 2013 at 08:02:06 UTC by Fabio Priuli
and this fixes sram access, courtesy of Eke's info. nw.
[src/mess/machine]md_rom.c md_slot.c

trunk/src/mess/machine/md_rom.c
r21458r21459
10721072/*-------------------------------------------------
10731073 BEGGAR PRINCE
10741074 This game uses cart which is the same as SEGA_SRAM
1075 + bankswitch mechanism to remap some 256K chunk of
1076 ROM and to enable/disable SRAM (not yet fully
1077 emulated)
1075 + bankswitch mechanism for first 256KB of the image:
1076 depending on bit7 of the value written at 0xe00/2,
1077 accesses to 0x00000-0x3ffff go to the first 256KB
1078 of ROM, or to the second to last 256KB chunk (usually
1079 mapped to 0x380000-0x3bffff). SRAM is mapped at
1080 the end of ROM.
10781081 -------------------------------------------------*/
10791082
10801083READ16_MEMBER(md_rom_beggarp_device::read)
10811084{
1082   if (m_mode & 2)
1083   {
1084      //000000-03ffff = ROM bank 15 x 256k
1085      //040000-3bffff = ROM banks 2 to 15 x256k
1086      //3c0000-3fffff = ?? SRAM ?? (32k?)
1087      if (offset < 0x040000/2)
1088         return m_rom[offset + 0x380000/2];
1089      else if (offset >= m_nvram_start/2 && offset <= m_nvram_end/2 && m_nvram_active)
1090         return m_nvram[offset & 0x3fff];
1091      else if (offset < 0x400000/2)
1092         return m_rom[offset & 0x1fffff];
1093   }
1094   else
1095   {
1096      // currently not supported
1097      //      if (m_mode & 1)   //00-40 = unmapped (open bus?)
1098     
1099       //00-40 = ROM banks 1 to 16 x256k
1100      if (offset < 0x400000/2)
1101         return m_rom[offset & 0x1fffff];
1102   }
1085   if (offset >= m_nvram_start/2 && offset <= m_nvram_end/2 && m_nvram_active)
1086      return m_nvram[offset & 0x3fff];
1087
1088   if (offset < 0x040000/2)
1089      return m_mode ? m_rom[offset + 0x380000/2] : m_rom[offset];
1090   else if (offset < 0x400000/2)
1091      return m_rom[offset & 0x1fffff];
11031092   
11041093   return 0xffff;
11051094}
11061095
11071096WRITE16_MEMBER(md_rom_beggarp_device::write)
11081097{
1109   if (offset >= 0x0e00/2 && offset < 0x0f00/2)   // it actually writes to 0xe00/2
1110   {
1111      if (!m_lock)
1112         m_mode = (data & 0xc0) >> 6;
1113     
1114      m_lock = BIT(data, 5); // lock bankswitch hardware when set, until hard reset
1115   }
1116   
1117   // SRAM is only accessible in mode 2
1118   if (offset >= m_nvram_start/2 && offset <= m_nvram_end/2 && m_nvram_active && !m_nvram_readonly && m_mode == 2)
1098   if (offset >= 0x0e00/2 && offset < 0x0f00/2)
1099      m_mode = BIT(data, 7);   
1100
1101   if (offset >= m_nvram_start/2 && offset <= m_nvram_end/2 && m_nvram_active && !m_nvram_readonly)
11191102      m_nvram[offset & 0x3fff] = data;
11201103}
11211104
r21458r21459
11371120/*-------------------------------------------------
11381121 LEGEND OF WUKONG
11391122 This game uses cart which is the same as SEGA_SRAM
1140 + bankswitch mechanism for last 128k of the image:
1123 + bankswitch mechanism for last 128KB of the image:
11411124 first 2MB of ROM is loaded in 0-0x200000 and
11421125 mirrored in 0x200000-0x400000, but depending on
11431126 bit7 of the value written at 0xe00/2 accesses to
trunk/src/mess/machine/md_slot.c
r21458r21459
642642         m_cart->m_nvram_handlers_installed = 1;
643643         break;
644644      case BEGGARP:
645         m_cart->m_nvram_start = 0x3c0000;
645         m_cart->m_nvram_start = 0x400000;
646646         m_cart->m_nvram_end = m_cart->m_nvram_start + 0xffff;
647647         m_cart->nvram_alloc(machine(), 0x8000);   // 32K mirrored
648648         m_cart->m_nvram_active = 1;

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