MAME SVN History

199869 Revisions

r21354 Friday 22nd February, 2013 at 22:39:22 UTC by Jonathan Gevaryahu
cat.c: (Canon Cat) Fixed a mistake in the memory map mirroring due to an error during testing; added proper readback of the floppy control register, and corrected the floppy status readback so it thinks that no floppy is inserted. [Lord Nightmare]

[src/mess/drivers]

cat.c

trunk/src/mess/drivers/cat.c
r21353	r21354
76	76
77	77	If ever in forth mode you can return to the editor with the forth word (without quotes) "re"
78	78
	79	Canon cat gate array ASIC markings:
	80	GA1 (prototype): D65013CW276 [same as final]
	81	GA1 (final): NH4-5001 276 [schematic: upD65013CW-276]
	82	GA2 (prototype): D65013CW208 [DIFFERENT FROM FINAL! larger asic used here, shrank for final?]
	83	GA2 (final): NH4-5002 191 [schematic: upD65012CW-191]
	84	GA3 (prototype): D65013CW141 [same as final? typo 65013 vs 65012?]
	85	GA3 (final): NH4-5003 141 [schematic: upD65012CW-141]
79	86
80	87	Canon cat credits easter egg:
81	88	* hold either leap key, then simultaneously hold shift, then type Q W E R A S D F Z X C V and release all the keys
r21353	r21354
83	90
84	91	Canon Cat credits details: (WIP)
85	92	Scott Kim - responsible for fonts on swyft and cat
	93	Ralph Voorhees - Model construction and mockups (swyft 'flat cat')
86	94
	95	Cat HLSL stuff:
	96	*scanlines:
	97	the cat has somewhat visible and fairly close scanlines with very little fuzziness
	98	try hlsl options:
	99	hlsl_prescale_x 4
	100	hlsl_prescale_y 4
	101	scanline_alpha 0.3
	102	scanline_size 1.0
	103	scanline_height 0.7
	104	scanline_bright_scale 1.0
	105	scanline_bright_offset 0.6
	106	*phosphor persistence of the original cat CRT is VERY LONG and fades to a greenish-yellow color, though the main color itself is white
	107	try hlsl option:
	108	phosphor_life 0.93,0.95,0.87
	109	which is fairly close but may actually be too SHORT compared to the real thing.
87	110
	111
88	112	Swyft versions:
89	113	There are at least 4 variants of machines called 'swyft':
90	114	* The earliest desktop units which use plexi or rubber-tooled case and an
91	115	angled monitor; about a dozen were made and at least two of clear plexi.
92		These are sometimes called "wrinkled" swyfts. 5.25" drive, may be able to
93		read Apple2 Swyftware and Swyftcard-created disks.
94		It is possible no prototypes of this type got beyond the 'runs forth console only' stage.
	116	These are sometimes called "wrinkled" swyfts. 5.25" drive, they may be able
	117	to read Apple2 Swyftware/Swyftdisk and Swyftcard-created disks.
	118	It is possible no prototypes of this type got beyond the 'runs forth console only' stage.
95	119	http://archive.computerhistory.org/resources/access/physical-object/2011/09/102746929.01.01.lg.JPG
96	120	http://www.digibarn.com/collections/systems/swyft/Swyft-No2-05-1271.jpg
97	121	http://www.digibarn.com/friends/jef-raskin/slides/iai/A%20-687%20SWYFTPRO.JPG
r21353	r21354
99	123	case and just a keyboard. Model SP0001
100	124	http://www.digibarn.com/collections/systems/swyft/Image82.jpg
101	125	* The later "ur-cat" desktop units which use a machine tooled case and look
102		more or less like the canon cat. about 100-200 were made. 3.5" drive.
103		These have a fully functional EDDE editor as the cat does, and can even compile forth programs.
	126	more or less like the canon cat. Around 100-200 were made. 3.5" drive.
	127	These have a fully functional EDDE editor as the cat does, and can even compile
	128	forth programs.
104	129	(the 'swyft' driver is based on one of these)
105	130	* The very late portable LCD units with a dark grey case and a row of hotkey
106		buttons below the screen.
	131	buttons below the screen. Not dumped yet. At least one functional prototype exists.
	132	At least one plastic mockup exists with no innards.
107	133	http://www.digibarn.com/collections/systems/swyft/swyft.jpg
108	134
109	135	Canon Cat versions:
r21353	r21354
115	141	As for prototypes/dev cat machines, a few minor variants exist:
116	142	* Prototype cat motherboards used 16k4bit drams instead of 64k4bit as the
117	143	final system did and hence max out at 128k of dram instead of 512k.
	144	One of the gate arrays is also different, and the motherboard is arranged
	145	differently. The IC9 "buserr" PAL is not used, even on the prototype.
118	146	The final system included 256k of dram and can be upgraded to 512k.
119	147	* At least some developer units were modified to have an external BNC
120	148	connector, ostensibly to display the internal screen's video externally.
r21353	r21354
302	330	UINT8 m_video_invert;
303	331	UINT16 m_pr_cont;
304	332	UINT8 m_keyboard_line;
	333	UINT8 m_floppy_control;
305	334
306	335	TIMER_CALLBACK_MEMBER(keyboard_callback);
307	336	TIMER_CALLBACK_MEMBER(counter_6ms_callback);
r21353	r21354
371	400	}
372	401
373	402	// Floppy control register (called fd.cont in the cat source code)
374		/* FEDCBA98 (76543210 is ignored)
375		* \|\|\|\|\|\|\|\-- ?always low? (may be some sort of 'reset' or debug bit? the cat code explicitly clears this bit but never sets it)
	403	/* FEDCBA98 (76543210 is open bus)
	404	* \|\|\|\|\|\|\|\-- unknown[1] (may be some sort of 'reset' or debug bit? the cat code explicitly clears this bit but never sets it)
376	405	* \|\|\|\|\|\|\--- WRITE GATE: 0 = write head disabled, 1 = write head enabled (verified from cat source code)
377		* \|\|\|\|\|\---- ~~?al~~w~~ays high?~~ (leftover debug bit? unused by cat code)
	406	* \|\|\|\|\|\---- unknown[2] (leftover debug bit? unused by cat code)
378	407	* \|\|\|\|\----- /DIRECTION: 1 = in, 0 = out (verified from forth cmd)
379	408	* \|\|\|\------ /SIDESEL: 1 = side1, 0 = side0 (verified from forth cmd)
380	409	* \|\|\------- STEP: 1 = STEP active, 0 = STEP inactive (verified from cat source code)
381	410	* \|\-------- MOTOR ON: 1 = on, 0 = off (verified)
382	411	* \--------- /DRIVESELECT: 1 = drive 0, 0 = drive 1 (verified from forth cmd)
	412	* all 8 bits 'stick' on write and are readable at this register as well
	413	* [1] writing this bit as high seems to 'freeze' floppy acquisition so
	414	* the value at the floppy_data_r register is held rather than updated
	415	* with new data from the shifter/mfm clock/data separator
	416	* [2] this bit's function is unknown. it could possibly be an FM vs MFM selector bit, where high = MFM, low = FM ? or MFM vs GCR?
383	417	*/
384	418	// 0x800000-0x800001 read
385	419	READ16_MEMBER( cat_state::cat_floppy_control_r )
r21353	r21354
387	421	#ifdef DEBUG_FLOPPY_CONTROL_R
388	422	fprintf(stderr,"Read from Floppy Status address %06X\n", 0x800000+(offset<<1));
389	423	#endif
390		return 0x0480;
	424	return (m_floppy_control << 8)\|0x80; // LOW 8 BITS ARE OPEN BUS
391	425	}
392	426	// 0x800000-0x800001 write
393	427	WRITE16_MEMBER( cat_state::cat_floppy_control_w )
r21353	r21354
395	429	#ifdef DEBUG_FLOPPY_CONTROL_W
396	430	fprintf(stderr,"Write to Floppy Control address %06X, data %04X\n", 0x800000+(offset<<1), data);
397	431	#endif
	432	m_floppy_control = (data >> 8)&0xFF;
398	433	}
399	434
400	435	// 0x800002-0x800003 read = 0x0080, see open bus
r21353	r21354
427	462	}
428	463
429	464	// 0x800008-0x800009: Floppy status register (called fd.status in the cat source code)
430		/* FEDCBA98 (76543210 is ~~ign~~ored)
	465	/* FEDCBA98 (76543210 is open bus)
431	466	* \|\|\|\|\|\|\|\-- ? always low
432	467	* \|\|\|\|\|\|\--- ? always low
433	468	* \|\|\|\|\|\---- READY: 1 = ready, 0 = not ready (verified from cat source code)
r21353	r21354
443	478	#ifdef DEBUG_FLOPPY_STATUS_R
444	479	fprintf(stderr,"Read from Floppy Status address %06X\n", 0x800008+(offset<<1));
445	480	#endif
446		return 0x0080;
	481	return 0x2480;
447	482	}
448	483
449	484	// 0x80000a-0x80000b
r21353	r21354
488	523	{
489	524	/*
490	525	* FEDCBA98 (76543210 is ignored)
491		* \|\|\|\|\|\|\|\-- CC line enable (verified from cat source code)
492		* \|\|\|\|\|\|\--- LEDE line enable (verified from cat source code)
493		* \|\|\|\|\|\---- ?
	526	* \|\|\|\|\|\|\|\-- CC line enable (pin 34) (verified from cat source code)
	527	* \|\|\|\|\|\|\--- LEDE line enable (pin 33) (verified from cat source code)
	528	* \|\|\|\|\|\---- ? May control pin 32?
494	529	* \|\|\|\|\----- ? always seems to be written as high?
495	530	* \|\|\|\------ ?
496	531	* \|\|\------- ?
r21353	r21354
585	620	68k address map:
586	621	a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 (a0 via UDS/LDS)
587	622	i i * x x * * * x x x x x x x x x x x x x x x x GATE ARRAY 2 DECODES THESE LINES TO ENABLE THIS AREA (a23 and a22 are indirectly decoded via the /RAMROMCS and /IOCS lines from gate array 1)
588		0 0 0 0 x 0 a * * * * * * * * * * * * * * * * b R ROM (ab: 00=ic4 01=ic2 10=ic5 11=ic3) (EPROM 27C512 x 4) [controlled via GA2 /ROMCS]
589		0 0 0 0 x 1 0 0 x x * * * * * * * * * * * * * 0 RW SVRAM ic11 d4364 (battery backed) [controlled via GA2 /RAMCS]
590		0 0 0 0 x 1 x 1 x x x x x x x x x x x x x x x 0 O OPEN BUS (reads as 0x2e) [may be controlled via GA2 /RAMCS?]
591		0 0 0 0 x 1 1 0 x x x x x x x x x x x x x x x 0 O OPEN BUS (reads as 0x2e) [may be controlled via GA2 /RAMCS?]
592		0 0 0 0 x 1 x x x x x x x x x x x x x x x x x 1 O OPEN BUS (reads as 0x80) [may be controlled via GA2 /RAMCS?]
593		0 0 0 1 x x x x x x x x x x x x x x x x x x x x O BUS CONFLICT (reads as random garbage, corrupted copy based on when a20 is 0, some sort of bus collision? note GA2 can't see a20 so /ROMCS and /RAMCS lines are probably active here as above)
	623	0 0 0 x x 0 a * * * * * * * * * * * * * * * * b R ROM (ab: 00=ic4 01=ic2 10=ic5 11=ic3) (EPROM 27C512 x 4) [controlled via GA2 /ROMCS]
	624	0 0 0 x x 1 0 0 x x * * * * * * * * * * * * * 0 RW SVRAM ic11 d4364 (battery backed) [controlled via GA2 /RAMCS]
	625	0 0 0 x x 1 x 1 x x x x x x x x x x x x x x x 0 O OPEN BUS (reads as 0x2e) [may be controlled via GA2 /RAMCS?]
	626	0 0 0 x x 1 1 0 x x x x x x x x x x x x x x x 0 O OPEN BUS (reads as 0x2e) [may be controlled via GA2 /RAMCS?]
	627	0 0 0 x x 1 x x x x x x x x x x x x x x x x x 1 O OPEN BUS (reads as 0x80) [may be controlled via GA2 /RAMCS?]
594	628	0 0 1 x x 0 * * * * * * * * * * * * * * * * * 0 R SVROM 2 ic7 (not present on cat as sold, open bus reads as 0x2e) [controlled via GA2 /SVCS0]
595	629	0 0 1 x x 0 * * * * * * * * * * * * * * * * * 1 R SVROM 0 ic6 (MASK ROM tc531000) [controlled via GA2 /SVCS0]
596	630	0 0 1 x x 1 * * * * * * * * * * * * * * * * * 0 O OPEN BUS (reads as 0x2e) [controlled via GA2 /SVCS1] SEE BELOW
r21353	r21354
627	661
628	662	static ADDRESS_MAP_START(cat_mem, AS_PROGRAM, 16, cat_state)
629	663	ADDRESS_MAP_UNMAP_HIGH
630		AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_MIRROR(0x080000) // 256 KB ROM
631		AM_RANGE(0x040000, 0x043fff) AM_RAM AM_SHARE("svram") AM_MIRROR(0x08C000)// SRAM powered by battery
	664	AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_MIRROR(0x180000) // 256 KB ROM
	665	AM_RANGE(0x040000, 0x043fff) AM_RAM AM_SHARE("svram") AM_MIRROR(0x18C000)// SRAM powered by battery
632	666	AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("svrom",0x0000) AM_MIRROR(0x180000) // SV ROM
633	667	AM_RANGE(0x400000, 0x47ffff) AM_RAM AM_SHARE("p_videoram") AM_MIRROR(0x180000) // 512 KB RAM
634	668	AM_RANGE(0x600000, 0x67ffff) AM_READWRITE(cat_2e80_r,cat_video_control_w) AM_MIRROR(0x180000) // Gate Array #1: Video
r21353	r21354
805	839	MACHINE_RESET_MEMBER(cat_state,cat)
806	840	{
807	841	machine().device("maincpu")->execute().set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(cat_state::cat_int_ack),this));
	842	m_duart_inp = 0;
808	843	m_6ms_counter = 0;
	844	m_floppy_control = 0;
809	845	m_keyboard_timer->adjust(attotime::zero, 0, attotime::from_hz(120));
810	846	m_6ms_timer->adjust(attotime::zero, 0, attotime::from_hz((XTAL_19_968MHz/2)/65536));
811	847	}
r21353	r21354
1043	1079	/* Romspace here is a little strange: there are 3 rom sockets on the board:
1044	1080	* svrom-0 maps to 200000-21ffff every ODD byte (d8-d0)
1045	1081	* svrom-1 maps to 200000-21ffff every EVEN byte (d15-d7)
1046		* (since no rom is in the socket; it reads as open bus 0x2E)
	1082	* (since no rom is in the socket; it reads as open bus, sometimes 0x2E)
1047	1083	* svrom-2 maps to 240000-25ffff every ODD byte (d8-d0)
1048		* (since no rom is in the socket; it reads as open bus 0x80)
	1084	* (since no rom is in the socket; it reads as open bus, sometimes 0x80)
1049	1085	* there is no svrom-3; 240000-25ffff EVEN always reads as 0x2E
1050	1086	* since ROM_FILL16BE(0x0, 0x80000, 0x2e80) doesn't exist, the
1051	1087	* even bytes and latter chunk of the svrom space need to be filled in
r21353	r21354
1060	1096	*/
1061	1097	ROMX_LOAD( "uv1__nh7-0684__hn62301apc11__7h1.ic6", 0x00000, 0x20000, CRC(229ca210) SHA1(564b57647a34acdd82159993a3990a412233da14), ROM_SKIP(1)) // this is a 28pin tc531000 mask rom, 128KB long; "US" SVROM
1062	1098
	1099	/* There is an unpopulated PAL16L8 at IC9 whose original purpose (based
	1100	* on the schematics) was probably to cause a 68k bus error when
	1101	* memory in certain ranges when accessed (likely so 'forth gone insane'
	1102	* won't destroy the contents of ram and svram).
	1103	* Its connections are (where Ix = inp on pin x, Ox = out on pin x):
	1104	* I1 = A23, I2 = A22, I3 = A2, I4 = R/W, I5 = A5, I6 = FC2, I7 = gnd,
	1105	* I8 = A1, I9 = gnd, I11 = gnd, O16 = /BERR,
	1106	* I14 = REMAP (connects to emulator 'shadow rom' board or to gnd when unused)
	1107	* Based on the inputs and outputs of this pal, almost if not the entire
	1108	* open bus and mirrored areas of the cat address space could be made
	1109	* to cause bus errors. REMAP was probably used to 'open up' the A00000-A7ffff
	1110	* shadow rom/ram area and make it writable without erroring.
	1111	*/
1063	1112	ROM_END
1064	1113
1065	1114	/* Driver */

199869 Revisions