trunk/src/mame/drivers/saturn.c
| r21290 | r21291 | |
|---|
| 191 | 191 | #define DRUP(_lv_) (m_scu_regs[5+(_lv_*8)] & 0x00010000) |
| 192 | 192 | #define DWUP(_lv_) (m_scu_regs[5+(_lv_*8)] & 0x00000100) |
| 193 | 193 | |
| 194 | | #define DMA_STATUS (m_scu_regs[31]) |
| 195 | 194 | /*These macros sets the various DMA status flags.*/ |
| 196 | | #define DnMV_1(_ch_) DMA_STATUS|=(0x10 << 4 * _ch_) |
| 197 | | #define DnMV_0(_ch_) DMA_STATUS&=~(0x10 << 4 * _ch_) |
| 195 | #define DnMV_1(_ch_) m_scu.status|=(0x10 << 4 * _ch_) |
| 196 | #define DnMV_0(_ch_) m_scu.status&=~(0x10 << 4 * _ch_) |
| 198 | 197 | |
| 199 | 198 | /*For area checking*/ |
| 200 | 199 | #define BIOS_BUS(var) (var & 0x07000000) == 0 |
| r21290 | r21291 | |
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| 258 | 257 | case 0x5c/4: |
| 259 | 258 | // Super Major League and Shin Megami Tensei - Akuma Zensho reads from there (undocumented), DMA status mirror? |
| 260 | 259 | if(LOG_SCU && !space.debugger_access()) logerror("(PC=%08x) DMA status reg read\n",space.device().safe_pc()); |
| 261 | | res = m_scu_regs[0x7c/4]; |
| 260 | res = m_scu.status; |
| 262 | 261 | break; |
| 263 | 262 | case 0x7c/4: |
| 264 | 263 | if(LOG_SCU && !space.debugger_access()) logerror("(PC=%08x) DMA status reg read\n",space.device().safe_pc()); |
| 265 | | res = m_scu_regs[offset]; |
| 264 | res = m_scu.status; |
| 266 | 265 | break; |
| 267 | 266 | case 0x80/4: |
| 268 | 267 | res = dsp_prg_ctrl_r(space); |
| r21290 | r21291 | |
|---|
| 366 | 365 | m_scu.ist &= m_scu_regs[offset]; |
| 367 | 366 | scu_test_pending_irq(); |
| 368 | 367 | break; |
| 369 | | case 0xa8/4: if(LOG_SCU) logerror("A-Bus IRQ ACK %08x\n",m_scu_regs[42]); break; |
| 368 | case 0xa8/4: |
| 369 | /* This sends an irq signal to the extra devices connected to the A-Bus, not really needed for now. */ |
| 370 | //if(LOG_SCU) logerror("A-Bus IRQ ACK %08x\n",m_scu_regs[42]); |
| 371 | break; |
| 370 | 372 | case 0xc4/4: if(LOG_SCU) logerror("SCU SDRAM set: %02x\n",m_scu_regs[49]); break; |
| 371 | 373 | default: if(LOG_SCU) logerror("Warning: unused SCU reg set %d = %08x\n",offset,data); |
| 372 | 374 | } |
| r21290 | r21291 | |
|---|
| 1663 | 1665 | m_cart_backupram[offset*2+1] = (data & 0x000000ff) >> 0; |
| 1664 | 1666 | } |
| 1665 | 1667 | |
| 1668 | void saturn_state::scu_reset(void) |
| 1669 | { |
| 1670 | m_scu.ism = 0xbfff; |
| 1671 | m_scu.ist = 0; |
| 1672 | m_scu.start_factor[0] = 7; |
| 1673 | m_scu.start_factor[1] = 7; |
| 1674 | m_scu.start_factor[2] = 7; |
| 1675 | m_scu.status = 0; |
| 1676 | } |
| 1677 | |
| 1666 | 1678 | MACHINE_RESET_MEMBER(saturn_state,saturn) |
| 1667 | 1679 | { |
| 1668 | 1680 | m_scsp_last_line = 0; |
| r21290 | r21291 | |
|---|
| 1673 | 1685 | |
| 1674 | 1686 | m_smpc.SR = 0x40; // this bit is always on according to docs |
| 1675 | 1687 | |
| 1688 | scu_reset(); |
| 1689 | |
| 1676 | 1690 | m_en_68k = 0; |
| 1677 | 1691 | m_NMI_reset = 0; |
| 1678 | 1692 | m_smpc.slave_on = 0; |
| 1679 | 1693 | |
| 1680 | | m_scu_regs[31] = 0; //DMA_STATUS = 0; |
| 1681 | 1694 | |
| 1682 | 1695 | //memset(stv_m_workram_l, 0, 0x100000); |
| 1683 | 1696 | //memset(stv_m_workram_h, 0, 0x100000); |
| r21290 | r21291 | |
|---|
| 1732 | 1745 | machine().device("slave")->memory().space(AS_PROGRAM).install_readwrite_handler(0x04000000, 0x04000000 | mask, read32_delegate(FUNC(saturn_state::saturn_cs1_r),this), write32_delegate(FUNC(saturn_state::saturn_cs1_w),this)); |
| 1733 | 1746 | } |
| 1734 | 1747 | |
| 1735 | | |
| 1736 | | /* TODO: default value is probably 7 */ |
| 1737 | | m_scu.start_factor[0] = -1; |
| 1738 | | m_scu.start_factor[1] = -1; |
| 1739 | | m_scu.start_factor[2] = -1; |
| 1740 | | |
| 1741 | 1748 | m_vdp2.old_crmd = -1; |
| 1742 | 1749 | m_vdp2.old_tvmd = -1; |
| 1743 | 1750 | |
| r21290 | r21291 | |
|---|
| 1766 | 1773 | m_stv_rtc_timer->adjust(attotime::zero, 0, attotime::from_seconds(1)); |
| 1767 | 1774 | m_prev_bankswitch = 0xff; |
| 1768 | 1775 | |
| 1769 | | /* TODO: default value is probably 7 */ |
| 1770 | | m_scu.start_factor[0] = -1; |
| 1771 | | m_scu.start_factor[1] = -1; |
| 1772 | | m_scu.start_factor[2] = -1; |
| 1776 | scu_reset(); |
| 1773 | 1777 | |
| 1774 | 1778 | m_vdp2.old_crmd = -1; |
| 1775 | 1779 | m_vdp2.old_tvmd = -1; |
| r21290 | r21291 | |
|---|
| 1913 | 1917 | m_minit_boost_timeslice = attotime::zero; |
| 1914 | 1918 | m_sinit_boost_timeslice = attotime::zero; |
| 1915 | 1919 | |
| 1916 | | m_scu_regs = auto_alloc_array(machine(), UINT32, 0x100/4); |
| 1917 | | m_scsp_regs = auto_alloc_array(machine(), UINT16, 0x1000/2); |
| 1918 | | m_cart_dram = auto_alloc_array(machine(), UINT32, 0x400000/4); |
| 1919 | | m_backupram = auto_alloc_array(machine(), UINT8, 0x8000); |
| 1920 | | m_cart_backupram = auto_alloc_array(machine(), UINT8, 0x400000); |
| 1920 | m_scu_regs = auto_alloc_array_clear(machine(), UINT32, 0x100/4); |
| 1921 | m_scsp_regs = auto_alloc_array_clear(machine(), UINT16, 0x1000/2); |
| 1922 | m_cart_dram = auto_alloc_array_clear(machine(), UINT32, 0x400000/4); |
| 1923 | m_backupram = auto_alloc_array_clear(machine(), UINT8, 0x8000); |
| 1924 | m_cart_backupram = auto_alloc_array_clear(machine(), UINT8, 0x400000); |
| 1921 | 1925 | } |
| 1922 | 1926 | |
| 1923 | 1927 | DRIVER_INIT_MEMBER(saturn_state,saturnus) |