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r21061 Thursday 14th February, 2013 at 12:13:54 UTC by Miodrag Milanović
pgm modernization (nw)

[src/mame/drivers]	pgm.c
[src/mame/includes]	pgm.h
[src/mame/machine]	pgmprot.c pgmprot1.c pgmprot2.c pgmprot3.c pgmprot4.c pgmprot5.c pgmprot6.c
[src/mame/video]	pgm.c

trunk/src/mame/drivers/pgm.c

r21060	r21061
3700	3700	/* This function expands the 32x32 5-bit data into a format which is easier to
3701	3701	decode in MAME */
3702	3702
3703		static void expand_32x32x5bpp(running_machine &machine)
	3703	void pgm_state::expand_32x32x5bpp()
3704	3704	{
3705		UINT8 *src = machine.root_device().memregion( "tiles" )->base();
	3705	UINT8 *src = memregion( "tiles" )->base();
3706	3706	gfx_layout glcopy;
3707	3707	glcopy = *(&pgm32_charlayout);
3708	3708
3709		size_t  srcsize = machine.root_device().memregion( "tiles" )->bytes();
	3709	size_t  srcsize = memregion( "tiles" )->bytes();
3710	3710	int cnt, pix;
3711	3711	size_t gfx2_size_needed = ((srcsize/5)*8)+0x1000;
3712		UINT8 *dst = auto_alloc_array(machine, UINT8, gfx2_size_needed);
	3712	UINT8 *dst = auto_alloc_array(machine(), UINT8, gfx2_size_needed);
3713	3713
3714	3714
3715	3715	for (cnt = 0; cnt < srcsize/5 ; cnt ++)
r21060	r21061
3734	3734
3735	3735	glcopy.total = (gfx2_size_needed / glcopy.charincrement)*8;
3736	3736
3737		machine.gfx[1] = auto_alloc(machine, gfx_element(machine, glcopy, (UINT8 *)dst, 32, 0x400));
	3737	machine().gfx[1] = auto_alloc(machine(), gfx_element(machine(), glcopy, (UINT8 *)dst, 32, 0x400));
3738	3738
3739	3739
3740	3740	}
r21060	r21061
3742	3742	/* This function expands the sprite colour data (in the A Roms) from 3 pixels
3743	3743	in each word to a byte per pixel making it easier to use */
3744	3744
3745		static void expand_colourdata( running_machine &machine )
	3745	void pgm_state::expand_colourdata(  )
3746	3746	{
3747		pgm_state *state = machine.driver_data<pgm_state>();
3748		UINT8 *src = state->memregion( "sprcol" )->base();
3749		size_t srcsize = state->memregion( "sprcol" )->bytes();
	3747	UINT8 *src = memregion( "sprcol" )->base();
	3748	size_t srcsize = memregion( "sprcol" )->bytes();
3750	3749	int cnt;
3751	3750	size_t needed = srcsize / 2 * 3;
3752	3751
3753	3752	/* work out how much ram we need to allocate to expand the sprites into
3754	3753	and be able to mask the offset */
3755		state->m_sprite_a_region_size = 1;
3756		while (state->m_sprite_a_region_size < needed)
3757		state->m_sprite_a_region_size <<= 1;
	3754	m_sprite_a_region_size = 1;
	3755	while (m_sprite_a_region_size < needed)
	3756	m_sprite_a_region_size <<= 1;
3758	3757
3759		state->m_sprite_a_region = auto_alloc_array(machine, UINT8, state->m_sprite_a_region_size);
	3758	m_sprite_a_region = auto_alloc_array(machine(), UINT8, m_sprite_a_region_size);
3760	3759
3761	3760	for (cnt = 0 ; cnt < srcsize / 2 ; cnt++)
3762	3761	{
3763	3762	UINT16 colpack;
3764	3763
3765	3764	colpack = ((src[cnt * 2]) | (src[cnt * 2 + 1] << 8));
3766		state->m_sprite_a_region[cnt * 3 + 0] = (colpack >> 0 ) & 0x1f;
3767		state->m_sprite_a_region[cnt * 3 + 1] = (colpack >> 5 ) & 0x1f;
3768		state->m_sprite_a_region[cnt * 3 + 2] = (colpack >> 10) & 0x1f;
	3765	m_sprite_a_region[cnt * 3 + 0] = (colpack >> 0 ) & 0x1f;
	3766	m_sprite_a_region[cnt * 3 + 1] = (colpack >> 5 ) & 0x1f;
	3767	m_sprite_a_region[cnt * 3 + 2] = (colpack >> 10) & 0x1f;
3769	3768	}
3770	3769	}
3771	3770
3772		void pgm_basic_init( running_machine &machine, bool set_bank)
	3771	void pgm_state::pgm_basic_init( bool set_bank)
3773	3772	{
3774		pgm_state *state = machine.driver_data<pgm_state>();
	3773	UINT8 *ROM = memregion("maincpu")->base();
	3774	if (set_bank) membank("bank1")->set_base(&ROM[0x100000]);
3775	3775
3776		UINT8 *ROM = state->memregion("maincpu")->base();
3777		if (set_bank) state->membank("bank1")->set_base(&ROM[0x100000]);
	3776	expand_32x32x5bpp();
	3777	expand_colourdata();
3778	3778
3779		expand_32x32x5bpp(machine);
3780		expand_colourdata(machine);
3781
3782		state->m_bg_videoram = &state->m_videoram[0];
3783		state->m_tx_videoram = &state->m_videoram[0x4000/2];
3784		state->m_rowscrollram = &state->m_videoram[0x7000/2];
	3779	m_bg_videoram = &m_videoram[0];
	3780	m_tx_videoram = &m_videoram[0x4000/2];
	3781	m_rowscrollram = &m_videoram[0x7000/2];
3785	3782	}
3786	3783
3787	3784	DRIVER_INIT_MEMBER(pgm_state,pgm)
3788	3785	{
3789		pgm_basic_init(machine());
	3786	pgm_basic_init();
3790	3787	}
3791	3788
3792	3789

trunk/src/mame/machine/pgmprot1.c

r21060	r21061
56	56	/**************************** EMULATION *******************************/
57	57	/* used by photoy2k, kovsh */
58	58
59		static READ32_HANDLER( pgm_arm7_type1_protlatch_r )
	59	READ32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_protlatch_r )
60	60	{
61		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
	61	machine().scheduler().synchronize(); // force resync
62	62
63		space.machine().scheduler().synchronize(); // force resync
64
65		return (state->m_pgm_arm_type1_highlatch_68k_w << 16) | (state->m_pgm_arm_type1_lowlatch_68k_w);
	63	return (m_pgm_arm_type1_highlatch_68k_w << 16) | (m_pgm_arm_type1_lowlatch_68k_w);
66	64	}
67	65
68		static WRITE32_HANDLER( pgm_arm7_type1_protlatch_w )
69		{
70		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
	66	WRITE32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_protlatch_w )
	67	{
	68	machine().scheduler().synchronize(); // force resync
71	69
72		space.machine().scheduler().synchronize(); // force resync
73
74	70	if (ACCESSING_BITS_16_31)
75	71	{
76		state->m_pgm_arm_type1_highlatch_arm_w = data >> 16;
77		state->m_pgm_arm_type1_highlatch_68k_w = 0;
	72	m_pgm_arm_type1_highlatch_arm_w = data >> 16;
	73	m_pgm_arm_type1_highlatch_68k_w = 0;
78	74	}
79	75	if (ACCESSING_BITS_0_15)
80	76	{
81		state->m_pgm_arm_type1_lowlatch_arm_w = data;
82		state->m_pgm_arm_type1_lowlatch_68k_w = 0;
	77	m_pgm_arm_type1_lowlatch_arm_w = data;
	78	m_pgm_arm_type1_lowlatch_68k_w = 0;
83	79	}
84	80	}
85	81
86		static READ16_HANDLER( pgm_arm7_type1_68k_protlatch_r )
87		{
88		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
	82	READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_68k_protlatch_r )
	83	{
	84	machine().scheduler().synchronize(); // force resync
89	85
90		space.machine().scheduler().synchronize(); // force resync
91
92	86	switch (offset)
93	87	{
94		case 1: return state->m_pgm_arm_type1_highlatch_arm_w;
95		case 0: return state->m_pgm_arm_type1_lowlatch_arm_w;
	88	case 1: return m_pgm_arm_type1_highlatch_arm_w;
	89	case 0: return m_pgm_arm_type1_lowlatch_arm_w;
96	90	}
97	91	return -1;
98	92	}
99	93
100		static WRITE16_HANDLER( pgm_arm7_type1_68k_protlatch_w )
	94	WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_68k_protlatch_w )
101	95	{
102		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
	96	machine().scheduler().synchronize(); // force resync
103	97
104		space.machine().scheduler().synchronize(); // force resync
105
106	98	switch (offset)
107	99	{
108	100	case 1:
109		state->m_pgm_arm_type1_highlatch_68k_w = data;
	101	m_pgm_arm_type1_highlatch_68k_w = data;
110	102	break;
111	103
112	104	case 0:
113		state->m_pgm_arm_type1_lowlatch_68k_w = data;
	105	m_pgm_arm_type1_lowlatch_68k_w = data;
114	106	break;
115	107	}
116	108	}
117	109
118		static READ16_HANDLER( pgm_arm7_type1_ram_r )
	110	READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_ram_r )
119	111	{
120		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
121		UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
	112	UINT16 *share16 = reinterpret_cast<UINT16 *>(m_arm7_shareram.target());
122	113
123	114	if (PGMARM7LOGERROR)
124	115	logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, space.device().safe_pc());
125	116	return share16[BYTE_XOR_LE(offset << 1)];
126	117	}
127	118
128		static WRITE16_HANDLER( pgm_arm7_type1_ram_w )
	119	WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_ram_w )
129	120	{
130		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
131		UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
	121	UINT16 *share16 = reinterpret_cast<UINT16 *>(m_arm7_shareram.target());
132	122
133	123	if (PGMARM7LOGERROR)
134	124	logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, space.device().safe_pc());
r21060	r21061
138	128
139	129
140	130
141		static READ32_HANDLER( pgm_arm7_type1_unk_r )
	131	READ32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_unk_r )
142	132	{
143		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
144		return state->m_pgm_arm_type1_counter++;
	133	return m_pgm_arm_type1_counter++;
145	134	}
146	135
147		static READ32_HANDLER( pgm_arm7_type1_exrom_r )
	136	READ32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_exrom_r )
148	137	{
149	138	return 0x00000000;
150	139	}
151	140
152		static READ32_HANDLER( pgm_arm7_type1_shareram_r )
	141	READ32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_shareram_r )
153	142	{
154		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
155
156	143	if (PGMARM7LOGERROR)
157		logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, space.device().safe_pc());
158		return state->m_arm7_shareram[offset];
	144	logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, m_arm7_shareram[offset], mem_mask, space.device().safe_pc());
	145	return m_arm7_shareram[offset];
159	146	}
160	147
161		static WRITE32_HANDLER( pgm_arm7_type1_shareram_w )
	148	WRITE32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_shareram_w )
162	149	{
163		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
164
165	150	if (PGMARM7LOGERROR)
166	151	logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, space.device().safe_pc());
167		COMBINE_DATA(&state->m_arm7_shareram[offset]);
	152	COMBINE_DATA(&m_arm7_shareram[offset]);
168	153	}
169	154
170	155	/* 55857E? */
r21060	r21061
173	158	static ADDRESS_MAP_START( kov_map, AS_PROGRAM, 16, pgm_arm_type1_state )
174	159	AM_IMPORT_FROM(pgm_mem)
175	160	AM_RANGE(0x100000, 0x4effff) AM_ROMBANK("bank1") /* Game ROM */
176		AM_RANGE(0x4f0000, 0x4f003f) AM_READWRITE_LEGACY(pgm_arm7_type1_ram_r, pgm_arm7_type1_ram_w) /* ARM7 Shared RAM */
177		AM_RANGE(0x500000, 0x500005) AM_READWRITE_LEGACY(pgm_arm7_type1_68k_protlatch_r, pgm_arm7_type1_68k_protlatch_w) /* ARM7 Latch */
	161	AM_RANGE(0x4f0000, 0x4f003f) AM_READWRITE(pgm_arm7_type1_ram_r, pgm_arm7_type1_ram_w) /* ARM7 Shared RAM */
	162	AM_RANGE(0x500000, 0x500005) AM_READWRITE(pgm_arm7_type1_68k_protlatch_r, pgm_arm7_type1_68k_protlatch_w) /* ARM7 Latch */
178	163	ADDRESS_MAP_END
179	164
180	165	static ADDRESS_MAP_START( 55857E_arm7_map, AS_PROGRAM, 32, pgm_arm_type1_state )
181	166	AM_RANGE(0x00000000, 0x00003fff) AM_ROM
182		AM_RANGE(0x08100000, 0x083fffff) AM_READ_LEGACY(pgm_arm7_type1_exrom_r) // unpopulated, returns 0 to keep checksum happy
	167	AM_RANGE(0x08100000, 0x083fffff) AM_READ(pgm_arm7_type1_exrom_r) // unpopulated, returns 0 to keep checksum happy
183	168	AM_RANGE(0x10000000, 0x100003ff) AM_RAM // internal ram for asic
184		AM_RANGE(0x40000000, 0x40000003) AM_READWRITE_LEGACY(pgm_arm7_type1_protlatch_r, pgm_arm7_type1_protlatch_w)
	169	AM_RANGE(0x40000000, 0x40000003) AM_READWRITE(pgm_arm7_type1_protlatch_r, pgm_arm7_type1_protlatch_w)
185	170	AM_RANGE(0x40000008, 0x4000000b) AM_WRITENOP // ?
186		AM_RANGE(0x4000000c, 0x4000000f) AM_READ_LEGACY(pgm_arm7_type1_unk_r)
187		AM_RANGE(0x50800000, 0x5080003f) AM_READWRITE_LEGACY(pgm_arm7_type1_shareram_r, pgm_arm7_type1_shareram_w) AM_SHARE("arm7_shareram")
	171	AM_RANGE(0x4000000c, 0x4000000f) AM_READ(pgm_arm7_type1_unk_r)
	172	AM_RANGE(0x50800000, 0x5080003f) AM_READWRITE(pgm_arm7_type1_shareram_r, pgm_arm7_type1_shareram_w) AM_SHARE("arm7_shareram")
188	173	AM_RANGE(0x50000000, 0x500003ff) AM_RAM // uploads xor table to decrypt 68k rom here
189	174	ADDRESS_MAP_END
190	175
r21060	r21061
252	237	MCFG_CPU_PROGRAM_MAP(55857E_arm7_map)
253	238	MACHINE_CONFIG_END
254	239
255		void pgm_arm7_type1_latch_init( running_machine &machine )
	240	void pgm_arm_type1_state::pgm_arm7_type1_latch_init()
256	241	{
257		pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
	242	m_pgm_arm_type1_highlatch_arm_w = 0;
	243	m_pgm_arm_type1_lowlatch_arm_w = 0;
	244	m_pgm_arm_type1_highlatch_68k_w = 0;
	245	m_pgm_arm_type1_lowlatch_68k_w = 0;
	246	m_pgm_arm_type1_counter = 1;
258	247
259		state->m_pgm_arm_type1_highlatch_arm_w = 0;
260		state->m_pgm_arm_type1_lowlatch_arm_w = 0;
261		state->m_pgm_arm_type1_highlatch_68k_w = 0;
262		state->m_pgm_arm_type1_lowlatch_68k_w = 0;
263		state->m_pgm_arm_type1_counter = 1;
264
265		state->save_item(NAME(state->m_pgm_arm_type1_highlatch_arm_w));
266		state->save_item(NAME(state->m_pgm_arm_type1_lowlatch_arm_w));
267		state->save_item(NAME(state->m_pgm_arm_type1_highlatch_68k_w));
268		state->save_item(NAME(state->m_pgm_arm_type1_lowlatch_68k_w));
269		state->save_item(NAME(state->m_pgm_arm_type1_counter));
	248	save_item(NAME(m_pgm_arm_type1_highlatch_arm_w));
	249	save_item(NAME(m_pgm_arm_type1_lowlatch_arm_w));
	250	save_item(NAME(m_pgm_arm_type1_highlatch_68k_w));
	251	save_item(NAME(m_pgm_arm_type1_lowlatch_68k_w));
	252	save_item(NAME(m_pgm_arm_type1_counter));
270	253	}
271	254
272		static READ16_HANDLER( kovsh_fake_region_r )
	255	READ16_MEMBER(pgm_arm_type1_state::kovsh_fake_region_r )
273	256	{
274		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
275		int regionhack = state->ioport("RegionHack")->read();
	257	int regionhack = ioport("RegionHack")->read();
276	258	if (regionhack != 0xff) return regionhack;
277	259
278	260	offset = 0x4;
279		UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
	261	UINT16 *share16 = reinterpret_cast<UINT16 *>(m_arm7_shareram.target());
280	262	return share16[BYTE_XOR_LE(offset << 1)];
281	263	}
282	264
283	265	DRIVER_INIT_MEMBER(pgm_arm_type1_state,photoy2k)
284	266	{
285		pgm_basic_init(machine());
	267	pgm_basic_init();
286	268	pgm_photoy2k_decrypt(machine());
287		pgm_arm7_type1_latch_init(machine());
	269	pgm_arm7_type1_latch_init();
288	270	/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
289		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
	271	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
290	272	}
291	273
292	274	DRIVER_INIT_MEMBER(pgm_arm_type1_state,kovsh)
293	275	{
294		pgm_basic_init(machine());
	276	pgm_basic_init();
295	277	pgm_kovsh_decrypt(machine());
296		pgm_arm7_type1_latch_init(machine());
	278	pgm_arm7_type1_latch_init();
297	279	/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
298		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
	280	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
299	281	}
300	282
301	283	/* Fake remapping of ASIC commands to the ones used by KOVSH due to the lack of the real ARM rom for this set */
302		WRITE16_HANDLER( kovshp_asic27a_write_word )
	284	WRITE16_MEMBER(pgm_arm_type1_state::kovshp_asic27a_write_word )
303	285	{
304		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
305
306	286	switch (offset)
307	287	{
308	288	case 0:
309		state->m_pgm_arm_type1_lowlatch_68k_w = data;
	289	m_pgm_arm_type1_lowlatch_68k_w = data;
310	290	return;
311	291
312	292	case 1:
r21060	r21061
353	333	case 0xf8: asic_cmd = 0xf3; break;
354	334	}
355	335
356		state->m_pgm_arm_type1_highlatch_68k_w = asic_cmd ^ (asic_key | (asic_key << 8));
	336	m_pgm_arm_type1_highlatch_68k_w = asic_cmd ^ (asic_key | (asic_key << 8));
357	337	}
358	338	return;
359	339	}
r21060	r21061
362	342
363	343	DRIVER_INIT_MEMBER(pgm_arm_type1_state,kovshp)
364	344	{
365		pgm_basic_init(machine());
	345	pgm_basic_init();
366	346	pgm_kovshp_decrypt(machine());
367		pgm_arm7_type1_latch_init(machine());
368		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
369		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x500000, 0x500005, FUNC(kovshp_asic27a_write_word));
	347	pgm_arm7_type1_latch_init();
	348	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
	349	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
370	350	}
371	351
372	352
r21060	r21061
375	355
376	356	DRIVER_INIT_MEMBER(pgm_arm_type1_state,kovshxas)
377	357	{
378		pgm_basic_init(machine());
	358	pgm_basic_init();
379	359	//  pgm_kovshp_decrypt(machine());
380		pgm_arm7_type1_latch_init(machine());
381		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
382		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x500000, 0x500005, FUNC(kovshp_asic27a_write_word));
	360	pgm_arm7_type1_latch_init();
	361	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
	362	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
383	363	}
384	364
385		static void pgm_decode_kovlsqh2_tiles( running_machine &machine )
	365	void pgm_arm_type1_state::pgm_decode_kovlsqh2_tiles()
386	366	{
387	367	int i, j;
388		UINT16 *src = (UINT16 *)(machine.root_device().memregion("tiles")->base() + 0x180000);
389		UINT16 *dst = auto_alloc_array(machine, UINT16, 0x800000);
	368	UINT16 *src = (UINT16 *)(memregion("tiles")->base() + 0x180000);
	369	UINT16 *dst = auto_alloc_array(machine(), UINT16, 0x800000);
390	370
391	371	for (i = 0; i < 0x800000 / 2; i++)
392	372	{
r21060	r21061
397	377
398	378	memcpy( src, dst, 0x800000 );
399	379
400		auto_free( machine, dst );
	380	auto_free( machine(), dst );
401	381	}
402	382
403		static void pgm_decode_kovlsqh2_sprites( running_machine &machine, UINT8 *src )
	383	void pgm_arm_type1_state::pgm_decode_kovlsqh2_sprites( UINT8 *src )
404	384	{
405	385	int i, j;
406		UINT8 *dst = auto_alloc_array(machine, UINT8, 0x800000);
	386	UINT8 *dst = auto_alloc_array(machine(), UINT8, 0x800000);
407	387
408	388	for (i = 0; i < 0x800000; i++)
409	389	{
r21060	r21061
414	394
415	395	memcpy( src, dst, 0x800000 );
416	396
417		auto_free( machine, dst );
	397	auto_free( machine(), dst );
418	398	}
419	399
420		static void pgm_decode_kovlsqh2_samples( running_machine &machine )
	400	void pgm_arm_type1_state::pgm_decode_kovlsqh2_samples()
421	401	{
422	402	int i;
423		UINT8 *src = (UINT8 *)(machine.root_device().memregion("ics")->base() + 0x400000);
	403	UINT8 *src = (UINT8 *)(memregion("ics")->base() + 0x400000);
424	404
425	405	for (i = 0; i < 0x400000; i+=2) {
426	406	src[i + 0x000001] = src[i + 0x400001];
r21060	r21061
429	409	memcpy( src + 0x400000, src, 0x400000 );
430	410	}
431	411
432		static void pgm_decode_kovqhsgs_program( running_machine &machine )
	412	void pgm_arm_type1_state::pgm_decode_kovqhsgs_program()
433	413	{
434	414	int i;
435		UINT16 *src = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
436		UINT16 *dst = auto_alloc_array(machine, UINT16, 0x400000);
	415	UINT16 *src = (UINT16 *)(memregion("maincpu")->base() + 0x100000);
	416	UINT16 *dst = auto_alloc_array(machine(), UINT16, 0x400000);
437	417
438	418	for (i = 0; i < 0x400000 / 2; i++)
439	419	{
r21060	r21061
444	424
445	425	memcpy( src, dst, 0x400000 );
446	426
447		auto_free( machine, dst );
	427	auto_free( machine(), dst );
448	428	}
449	429
450		static void pgm_decode_kovqhsgs2_program( running_machine &machine )
	430	void pgm_arm_type1_state::pgm_decode_kovqhsgs2_program()
451	431	{
452	432	int i;
453		UINT16 *src = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
454		UINT16 *dst = auto_alloc_array(machine, UINT16, 0x400000);
	433	UINT16 *src = (UINT16 *)(memregion("maincpu")->base() + 0x100000);
	434	UINT16 *dst = auto_alloc_array(machine(), UINT16, 0x400000);
455	435
456	436	for (i = 0; i < 0x400000 / 2; i++)
457	437	{
r21060	r21061
462	442
463	443	memcpy( src, dst, 0x400000 );
464	444
465		auto_free( machine, dst );
	445	auto_free( machine(), dst );
466	446	}
467	447
468	448
469	449	DRIVER_INIT_MEMBER(pgm_arm_type1_state,kovlsqh2)
470	450	{
471		pgm_decode_kovqhsgs2_program(machine());
472		pgm_decode_kovlsqh2_tiles(machine());
	451	pgm_decode_kovqhsgs2_program();
	452	pgm_decode_kovlsqh2_tiles();
473	453
474		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x0000000);
475		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x0800000);
476		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x1000000);
477		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x1800000);
478		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x2000000);
479		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x2800000);
480		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprmask")->base() + 0x0000000);
481		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprmask")->base() + 0x0800000);
	454	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x0000000);
	455	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x0800000);
	456	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x1000000);
	457	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x1800000);
	458	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x2000000);
	459	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x2800000);
	460	pgm_decode_kovlsqh2_sprites(memregion("sprmask")->base() + 0x0000000);
	461	pgm_decode_kovlsqh2_sprites(memregion("sprmask")->base() + 0x0800000);
482	462
483		pgm_decode_kovlsqh2_samples(machine());
484		pgm_basic_init(machine());
485		pgm_arm7_type1_latch_init(machine());
486		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
487		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x500000, 0x500005, FUNC(kovshp_asic27a_write_word));
	463	pgm_decode_kovlsqh2_samples();
	464	pgm_basic_init();
	465	pgm_arm7_type1_latch_init();
	466	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
	467	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
488	468	}
489	469
490	470	DRIVER_INIT_MEMBER(pgm_arm_type1_state,kovqhsgs)
491	471	{
492		pgm_decode_kovqhsgs_program(machine());
493		pgm_decode_kovlsqh2_tiles(machine());
	472	pgm_decode_kovqhsgs_program();
	473	pgm_decode_kovlsqh2_tiles();
494	474
495		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x0000000);
496		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x0800000);
497		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x1000000);
498		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x1800000);
499		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x2000000);
500		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprcol")->base() + 0x2800000);
501		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprmask")->base() + 0x0000000);
502		pgm_decode_kovlsqh2_sprites(machine(), machine().root_device().memregion("sprmask")->base() + 0x0800000);
	475	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x0000000);
	476	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x0800000);
	477	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x1000000);
	478	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x1800000);
	479	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x2000000);
	480	pgm_decode_kovlsqh2_sprites(memregion("sprcol")->base() + 0x2800000);
	481	pgm_decode_kovlsqh2_sprites(memregion("sprmask")->base() + 0x0000000);
	482	pgm_decode_kovlsqh2_sprites(memregion("sprmask")->base() + 0x0800000);
503	483
504		pgm_decode_kovlsqh2_samples(machine());
505		pgm_basic_init(machine());
506		pgm_arm7_type1_latch_init(machine());
	484	pgm_decode_kovlsqh2_samples();
	485	pgm_basic_init();
	486	pgm_arm7_type1_latch_init();
507	487	/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
508		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
	488	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
509	489	}
510	490
511	491	/*
r21060	r21061
517	497	bp A71A0,1,{d0=0x12;g}
518	498	*/
519	499
520		static READ16_HANDLER( pgm_arm7_type1_sim_r )
	500	READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_r )
521	501	{
522		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
523
524	502	if (offset == 0)
525	503	{
526		UINT16 d = state->m_valueresponse & 0xffff;
527		UINT16 realkey = state->m_valuekey >> 8;
528		realkey |= state->m_valuekey;
	504	UINT16 d = m_valueresponse & 0xffff;
	505	UINT16 realkey = m_valuekey >> 8;
	506	realkey |= m_valuekey;
529	507	d ^= realkey;
530	508
531	509	return d;
r21060	r21061
533	511	}
534	512	else if (offset == 1)
535	513	{
536		UINT16 d = state->m_valueresponse >> 16;
537		UINT16 realkey = state->m_valuekey >> 8;
538		realkey |= state->m_valuekey;
	514	UINT16 d = m_valueresponse >> 16;
	515	UINT16 realkey = m_valuekey >> 8;
	516	realkey |= m_valuekey;
539	517	d ^= realkey;
540	518	return d;
541	519
r21060	r21061
544	522	}
545	523
546	524	/* working */
547		void command_handler_ddp3(pgm_arm_type1_state *state, int pc)
	525	void pgm_arm_type1_state::command_handler_ddp3(int pc)
548	526	{
549		switch (state->m_ddp3lastcommand)
	527	switch (m_ddp3lastcommand)
550	528	{
551	529	default:
552		printf("%06x command %02x | %04x\n", pc, state->m_ddp3lastcommand, state->m_value0);
553		state->m_valueresponse = 0x880000;
	530	printf("%06x command %02x | %04x\n", pc, m_ddp3lastcommand, m_value0);
	531	m_valueresponse = 0x880000;
554	532	break;
555	533
556	534	case 0x40:
557		state->m_valueresponse = 0x880000;
558		state->m_slots[(state->m_value0>>10)&0x1F]=
559		(state->m_slots[(state->m_value0>>5)&0x1F]+
560		state->m_slots[(state->m_value0>>0)&0x1F])&0xffffff;
	535	m_valueresponse = 0x880000;
	536	m_slots[(m_value0>>10)&0x1F]=
	537	(m_slots[(m_value0>>5)&0x1F]+
	538	m_slots[(m_value0>>0)&0x1F])&0xffffff;
561	539	break;
562	540
563	541	case 0x67: // set high bits
564		//      printf("%06x command %02x | %04x\n", space.device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
565		state->m_valueresponse = 0x880000;
566		state->m_curslots = (state->m_value0 & 0xff00)>>8;
567		state->m_slots[state->m_curslots] = (state->m_value0 & 0x00ff) << 16;
	542	//      printf("%06x command %02x | %04x\n", space.device().safe_pc(), m_ddp3lastcommand, m_value0);
	543	m_valueresponse = 0x880000;
	544	m_curslots = (m_value0 & 0xff00)>>8;
	545	m_slots[m_curslots] = (m_value0 & 0x00ff) << 16;
568	546	break;
569	547
570	548	case 0xe5: // set low bits for operation?
571		//  printf("%06x command %02x | %04x\n", space.device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
572		state->m_valueresponse = 0x880000;
573		state->m_slots[state->m_curslots] |= (state->m_value0 & 0xffff);
	549	//  printf("%06x command %02x | %04x\n", space.device().safe_pc(), m_ddp3lastcommand, m_value0);
	550	m_valueresponse = 0x880000;
	551	m_slots[m_curslots] |= (m_value0 & 0xffff);
574	552	break;
575	553
576	554
577	555	case 0x8e: // read back result of operations
578		//      printf("%06x command %02x | %04x\n", space.device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
579		state->m_valueresponse = state->m_slots[state->m_value0&0xff];
	556	//      printf("%06x command %02x | %04x\n", space.device().safe_pc(), m_ddp3lastcommand, m_value0);
	557	m_valueresponse = m_slots[m_value0&0xff];
580	558	break;
581	559
582	560
583	561	case 0x99: // reset?
584		state->m_valuekey = 0x100;
585		state->m_valueresponse = 0x00880000;
	562	m_valuekey = 0x100;
	563	m_valueresponse = 0x00880000;
586	564	break;
587	565
588	566	}
r21060	r21061
590	568
591	569	/* preliminary */
592	570
593		void command_handler_puzzli2(pgm_arm_type1_state *state, int pc)
	571	void pgm_arm_type1_state::command_handler_puzzli2(int pc)
594	572	{
595		printf("%08x: %02x %04x\n",pc, state->m_ddp3lastcommand, state->m_value0);
	573	printf("%08x: %02x %04x\n",pc, m_ddp3lastcommand, m_value0);
596	574
597		switch (state->m_ddp3lastcommand)
	575	switch (m_ddp3lastcommand)
598	576	{
599	577	case 0x13: // ASIC status?
600		state->m_valueresponse = 0x74<<16; // 2d or 74! (based on?)
	578	m_valueresponse = 0x74<<16; // 2d or 74! (based on?)
601	579	break;
602	580
603	581	case 0x31:
r21060	r21061
605	583	// how is this selected? command 54?
606	584
607	585	// just a wild guess
608		if (state->m_puzzli_54_trigger) {
	586	if (m_puzzli_54_trigger) {
609	587	// pc == 1387de
610		state->m_valueresponse = 0x63<<16; // ?
	588	m_valueresponse = 0x63<<16; // ?
611	589	} else {
612	590	// pc == 14cf58
613		state->m_valueresponse = 0xd2<<16;
	591	m_valueresponse = 0xd2<<16;
614	592	}
615	593
616		state->m_puzzli_54_trigger = 0;
	594	m_puzzli_54_trigger = 0;
617	595	}
618	596	break;
619	597
620	598	case 0x38: // Reset
621		state->m_valueresponse = 0x78<<16;
622		state->m_valuekey = 0x100;
623		state->m_puzzli_54_trigger = 0;
	599	m_valueresponse = 0x78<<16;
	600	m_valuekey = 0x100;
	601	m_puzzli_54_trigger = 0;
624	602	break;
625	603
626	604	case 0x41: // ASIC status?
627		state->m_valueresponse = 0x74<<16;
	605	m_valueresponse = 0x74<<16;
628	606	break;
629	607
630	608	case 0x47: // ASIC status?
631		state->m_valueresponse = 0x74<<16;
	609	m_valueresponse = 0x74<<16;
632	610	break;
633	611
634	612	case 0x52: // ASIC status?
635	613	{
636	614	// how is this selected?
637	615
638		//if (state->m_value0 == 6) {
639		state->m_valueresponse = (0x74<<16)|1; // |1?
	616	//if (m_value0 == 6) {
	617	m_valueresponse = (0x74<<16)|1; // |1?
640	618	//} else {
641		//  state->m_valueresponse = 0x74<<16;
	619	//  m_valueresponse = 0x74<<16;
642	620	//}
643	621	}
644	622	break;
645	623
646	624	case 0x54: // ??
647		state->m_puzzli_54_trigger = 1;
648		state->m_valueresponse = 0x36<<16;
	625	m_puzzli_54_trigger = 1;
	626	m_valueresponse = 0x36<<16;
649	627	break;
650	628
651	629	case 0x61: // ??
652		state->m_valueresponse = 0x36<<16;
	630	m_valueresponse = 0x36<<16;
653	631	break;
654	632
655	633	case 0x63: // used as a read address by the 68k code (related to previous uploaded values like cave?) should point at a table of ~0x80 in size? seems to use values as further pointers?
656		state->m_valueresponse = 0x00600000;
	634	m_valueresponse = 0x00600000;
657	635	break;
658	636
659	637	case 0x67: // used as a read address by the 68k code (related to previous uploaded values like cave?) directly reads ~0xDBE from the address..
660		state->m_valueresponse = 0x00400000;
	638	m_valueresponse = 0x00400000;
661	639	break;
662	640
663	641	default:
664		state->m_valueresponse = 0x74<<16;
	642	m_valueresponse = 0x74<<16;
665	643	break;
666	644	}
667	645	}
668	646
669	647	/* preliminary */
670		void command_handler_py2k2(pgm_arm_type1_state *state, int pc)
	648	void pgm_arm_type1_state::command_handler_py2k2(int pc)
671	649	{
672		switch (state->m_ddp3lastcommand)
	650	switch (m_ddp3lastcommand)
673	651	{
674	652	default:
675		printf("%06x command %02x | %04x\n", pc, state->m_ddp3lastcommand, state->m_value0);
676		state->m_valueresponse = 0x880000;
	653	printf("%06x command %02x | %04x\n", pc, m_ddp3lastcommand, m_value0);
	654	m_valueresponse = 0x880000;
677	655	break;
678	656
679	657	case 0xc0:
680		printf("%06x command %02x | %04x\n", pc, state->m_ddp3lastcommand, state->m_value0);
681		state->m_valueresponse = 0x880000;
	658	printf("%06x command %02x | %04x\n", pc, m_ddp3lastcommand, m_value0);
	659	m_valueresponse = 0x880000;
682	660	break;
683	661
684	662	case 0xcb: // Background layer 'x' select (pgm3in1, same as kov)
685		state->m_valueresponse = 0x880000;
686		state->m_kov_cb_value = state->m_value0;
	663	m_valueresponse = 0x880000;
	664	m_kov_cb_value = m_value0;
687	665	break;
688	666
689	667	case 0xcc: // Background layer offset (pgm3in1, same as kov)
690	668	{
691		int y = state->m_value0;
	669	int y = m_value0;
692	670	if (y & 0x400) y = -(0x400 - (y & 0x3ff));
693		state->m_valueresponse = 0x900000 + ((state->m_kov_cb_value + (y * 0x40)) * 4);
	671	m_valueresponse = 0x900000 + ((m_kov_cb_value + (y * 0x40)) * 4);
694	672	}
695	673	break;
696	674
697	675	case 0x99: // reset?
698		state->m_valuekey = 0x100;
699		state->m_valueresponse = 0x00880000;
	676	m_valuekey = 0x100;
	677	m_valueresponse = 0x00880000;
700	678	break;
701	679	}
702	680	}
r21060	r21061
799	777	0x00,0x00,0x00
800	778	};
801	779
802		void command_handler_pstars(pgm_arm_type1_state *state, int pc)
	780	void pgm_arm_type1_state::command_handler_pstars(int pc)
803	781	{
804		switch (state->m_ddp3lastcommand)
	782	switch (m_ddp3lastcommand)
805	783	{
806	784	case 0x99:
807		state->m_valuekey = 0x100;
808		state->m_valueresponse = 0x880000;
	785	m_valuekey = 0x100;
	786	m_valueresponse = 0x880000;
809	787	break;
810	788
811	789	case 0xe0:
812		state->m_valueresponse = 0xa00000 + (state->m_value0 << 6);
	790	m_valueresponse = 0xa00000 + (m_value0 << 6);
813	791	break;
814	792
815	793	case 0xdc:
816		state->m_valueresponse = 0xa00800 + (state->m_value0 << 6);
	794	m_valueresponse = 0xa00800 + (m_value0 << 6);
817	795	break;
818	796
819	797	case 0xd0:
820		state->m_valueresponse = 0xa01000 + (state->m_value0 << 5);
	798	m_valueresponse = 0xa01000 + (m_value0 << 5);
821	799	break;
822	800
823	801	case 0xb1:
824		state->m_pstar_b1_value = state->m_value0;
825		state->m_valueresponse = 0x890000;
	802	m_pstar_b1_value = m_value0;
	803	m_valueresponse = 0x890000;
826	804	break;
827	805
828	806	case 0xbf:
829		state->m_valueresponse = state->m_pstar_b1_value * state->m_value0;
	807	m_valueresponse = m_pstar_b1_value * m_value0;
830	808	break;
831	809
832	810	case 0xc1: //TODO:TIMER  0,1,2,FIX TO 0 should be OK?
833		state->m_valueresponse = 0;
	811	m_valueresponse = 0;
834	812	break;
835	813
836	814	case 0xce: //TODO:TIMER  0,1,2
837		state->m_pstar_ce_value = state->m_value0;
838		state->m_valueresponse=0x890000;
	815	m_pstar_ce_value = m_value0;
	816	m_valueresponse=0x890000;
839	817	break;
840	818
841	819	case 0xcf: //TODO:TIMER  0,1,2
842		state->m_extra_ram[state->m_pstar_ce_value] = state->m_value0;
843		state->m_valueresponse = 0x890000;
	820	m_extra_ram[m_pstar_ce_value] = m_value0;
	821	m_valueresponse = 0x890000;
844	822	break;
845	823
846	824	case 0xe7:
847		state->m_pstar_e7_value = (state->m_value0 >> 12) & 0xf;
848		state->m_slots[state->m_pstar_e7_value] &= 0xffff;
849		state->m_slots[state->m_pstar_e7_value] |= (state->m_value0 & 0xff) << 16;
850		state->m_valueresponse = 0x890000;
	825	m_pstar_e7_value = (m_value0 >> 12) & 0xf;
	826	m_slots[m_pstar_e7_value] &= 0xffff;
	827	m_slots[m_pstar_e7_value] |= (m_value0 & 0xff) << 16;
	828	m_valueresponse = 0x890000;
851	829	break;
852	830
853	831	case 0xe5:
854		state->m_slots[state->m_pstar_e7_value] &= 0xff0000;
855		state->m_slots[state->m_pstar_e7_value] |= state->m_value0;
856		state->m_valueresponse = 0x890000;
	832	m_slots[m_pstar_e7_value] &= 0xff0000;
	833	m_slots[m_pstar_e7_value] |= m_value0;
	834	m_valueresponse = 0x890000;
857	835	break;
858	836
859	837	case 0xf8: //@73C
860		state->m_valueresponse = state->m_slots[state->m_value0 & 0xf] & 0xffffff;
	838	m_valueresponse = m_slots[m_value0 & 0xf] & 0xffffff;
861	839	break;
862	840
863	841	case 0xba:
864		state->m_valueresponse = pstar_ba[state->m_value0];
	842	m_valueresponse = pstar_ba[m_value0];
865	843	break;
866	844
867	845	case 0xb0:
868		state->m_valueresponse = pstar_b0[state->m_value0];
	846	m_valueresponse = pstar_b0[m_value0];
869	847	break;
870	848
871	849	case 0xae:
872		state->m_valueresponse = pstar_ae[state->m_value0];
	850	m_valueresponse = pstar_ae[m_value0];
873	851	break;
874	852
875	853	case 0xa0:
876		state->m_valueresponse = pstar_a0[state->m_value0];
	854	m_valueresponse = pstar_a0[m_value0];
877	855	break;
878	856
879	857	case 0x9d:
880		state->m_valueresponse = pstar_9d[state->m_value0];
	858	m_valueresponse = pstar_9d[m_value0];
881	859	break;
882	860
883	861	case 0x90:
884		state->m_valueresponse = pstar_90[state->m_value0];
	862	m_valueresponse = pstar_90[m_value0];
885	863	break;
886	864
887	865	case 0x8c:
888		state->m_valueresponse = pstar_8c[state->m_value0];
	866	m_valueresponse = pstar_8c[m_value0];
889	867	break;
890	868
891	869	case 0x80:
892		state->m_valueresponse = pstar_80[state->m_value0];
	870	m_valueresponse = pstar_80[m_value0];
893	871	break;
894	872
895	873	default:
896		state->m_valueresponse = 0x890000;
897		logerror("PSTARS PC(%06x) UNKNOWN %4X %4X\n", pc, state->m_value1, state->m_value0);
	874	m_valueresponse = 0x890000;
	875	logerror("PSTARS PC(%06x) UNKNOWN %4X %4X\n", pc, m_value1, m_value0);
898	876	}
899	877	}
900	878
r21060	r21061
909	887	static const UINT8 kov_B0TABLE[16] = { 2, 0, 1, 4, 3 }; // Maps char portraits to tables
910	888
911	889
912		void command_handler_kov(pgm_arm_type1_state *state, int pc)
	890	void pgm_arm_type1_state::command_handler_kov(int pc)
913	891	{
914		switch (state->m_ddp3lastcommand)
	892	switch (m_ddp3lastcommand)
915	893	{
916	894	case 0x67: // unknown or status check?
917	895	case 0x8e:
r21060	r21061
919	897	case 0x33: // kovsgqyz (a3)
920	898	case 0x3a: // kovplus
921	899	case 0xc5: // kovplus
922		state->m_valueresponse = 0x880000;
	900	m_valueresponse = 0x880000;
923	901	break;
924	902
925	903	case 0x99: // Reset
926		state->m_valueresponse = 0x880000;
927		state->m_valuekey = 0x100;
	904	m_valueresponse = 0x880000;
	905	m_valuekey = 0x100;
928	906	break;
929	907
930	908	case 0x9d: // Sprite palette offset
931		state->m_valueresponse = 0xa00000 + ((state->m_value0 & 0x1f) * 0x40);
	909	m_valueresponse = 0xa00000 + ((m_value0 & 0x1f) * 0x40);
932	910	break;
933	911
934	912	case 0xb0: // Read from data table
935		state->m_valueresponse = kov_B0TABLE[state->m_value0 & 0x0f];
	913	m_valueresponse = kov_B0TABLE[m_value0 & 0x0f];
936	914	break;
937	915
938	916	case 0xb4: // Copy slot 'a' to slot 'b'
939	917	case 0xb7: // kovsgqyz (b4)
940	918	{
941		state->m_valueresponse = 0x880000;
	919	m_valueresponse = 0x880000;
942	920
943		if (state->m_value0 == 0x0102) state->m_value0 = 0x0100; // why?
	921	if (m_value0 == 0x0102) m_value0 = 0x0100; // why?
944	922
945		state->m_slots[(state->m_value0 >> 8) & 0x0f] = state->m_slots[(state->m_value0 >> 0) & 0x0f];
	923	m_slots[(m_value0 >> 8) & 0x0f] = m_slots[(m_value0 >> 0) & 0x0f];
946	924	}
947	925	break;
948	926
949	927	case 0xba: // Read from data table
950		state->m_valueresponse = kov_BATABLE[state->m_value0 & 0x3f];
	928	m_valueresponse = kov_BATABLE[m_value0 & 0x3f];
951	929	break;
952	930
953	931	case 0xc0: // Text layer 'x' select
954		state->m_valueresponse = 0x880000;
955		state->m_kov_c0_value = state->m_value0;
	932	m_valueresponse = 0x880000;
	933	m_kov_c0_value = m_value0;
956	934	break;
957	935
958	936	case 0xc3: // Text layer offset
959		state->m_valueresponse = 0x904000 + ((state->m_kov_c0_value + (state->m_value0 * 0x40)) * 4);
	937	m_valueresponse = 0x904000 + ((m_kov_c0_value + (m_value0 * 0x40)) * 4);
960	938	break;
961	939
962	940	case 0xcb: // Background layer 'x' select
963		state->m_valueresponse = 0x880000;
964		state->m_kov_cb_value = state->m_value0;
	941	m_valueresponse = 0x880000;
	942	m_kov_cb_value = m_value0;
965	943	break;
966	944
967	945	case 0xcc: // Background layer offset
968	946	{
969		int y = state->m_value0;
	947	int y = m_value0;
970	948	if (y & 0x400) y = -(0x400 - (y & 0x3ff));
971		state->m_valueresponse = 0x900000 + ((state->m_kov_cb_value + (y * 0x40)) * 4);
	949	m_valueresponse = 0x900000 + ((m_kov_cb_value + (y * 0x40)) * 4);
972	950	}
973	951	break;
974	952
975	953	case 0xd0: // Text palette offset
976	954	case 0xcd: // kovsgqyz (d0)
977		state->m_valueresponse = 0xa01000 + (state->m_value0 * 0x20);
	955	m_valueresponse = 0xa01000 + (m_value0 * 0x20);
978	956	break;
979	957
980	958	case 0xd6: // Copy slot to slot 0
981		state->m_valueresponse = 0x880000;
982		state->m_slots[0] = state->m_slots[state->m_value0 & 0x0f];
	959	m_valueresponse = 0x880000;
	960	m_slots[0] = m_slots[m_value0 & 0x0f];
983	961	break;
984	962
985	963	case 0xdc: // Background palette offset
986	964	case 0x11: // kovsgqyz (dc)
987		state->m_valueresponse = 0xa00800 + (state->m_value0 * 0x40);
	965	m_valueresponse = 0xa00800 + (m_value0 * 0x40);
988	966	break;
989	967
990	968	case 0xe0: // Sprite palette offset
991	969	case 0x9e: // kovsgqyz (e0)
992		state->m_valueresponse = 0xa00000 + ((state->m_value0 & 0x1f) * 0x40);
	970	m_valueresponse = 0xa00000 + ((m_value0 & 0x1f) * 0x40);
993	971	break;
994	972
995	973	case 0xe5: // Write slot (low)
996	974	{
997		state->m_valueresponse = 0x880000;
	975	m_valueresponse = 0x880000;
998	976
999		INT32 sel = (state->m_curslots >> 12) & 0x0f;
1000		state->m_slots[sel] = (state->m_slots[sel] & 0x00ff0000) | ((state->m_value0 & 0xffff) <<  0);
	977	INT32 sel = (m_curslots >> 12) & 0x0f;
	978	m_slots[sel] = (m_slots[sel] & 0x00ff0000) | ((m_value0 & 0xffff) <<  0);
1001	979	}
1002	980	break;
1003	981
1004	982	case 0xe7: // Write slot (and slot select) (high)
1005	983	{
1006		state->m_valueresponse = 0x880000;
1007		state->m_curslots = state->m_value0;
	984	m_valueresponse = 0x880000;
	985	m_curslots = m_value0;
1008	986
1009		INT32 sel = (state->m_curslots >> 12) & 0x0f;
1010		state->m_slots[sel] = (state->m_slots[sel] & 0x0000ffff) | ((state->m_value0 & 0x00ff) << 16);
	987	INT32 sel = (m_curslots >> 12) & 0x0f;
	988	m_slots[sel] = (m_slots[sel] & 0x0000ffff) | ((m_value0 & 0x00ff) << 16);
1011	989	}
1012	990	break;
1013	991
1014	992	case 0xf0: // Some sort of status read?
1015		state->m_valueresponse = 0x00c000;
	993	m_valueresponse = 0x00c000;
1016	994	break;
1017	995
1018	996	case 0xf8: // Read slot
1019	997	case 0xab: // kovsgqyz (f8)
1020		state->m_valueresponse = state->m_slots[state->m_value0 & 0x0f] & 0x00ffffff;
	998	m_valueresponse = m_slots[m_value0 & 0x0f] & 0x00ffffff;
1021	999	break;
1022	1000
1023	1001	case 0xfc: // Adjust damage level to char experience level
1024		state->m_valueresponse = (state->m_value0 * state->m_kov_fe_value) >> 6;
	1002	m_valueresponse = (m_value0 * m_kov_fe_value) >> 6;
1025	1003	break;
1026	1004
1027	1005	case 0xfe: // Damage level adjust
1028		state->m_valueresponse = 0x880000;
1029		state->m_kov_fe_value = state->m_value0;
	1006	m_valueresponse = 0x880000;
	1007	m_kov_fe_value = m_value0;
1030	1008	break;
1031	1009
1032	1010	default:
1033		state->m_valueresponse = 0x880000;
1034		//                  logerror("Unknown ASIC27 command: %2.2x data: %4.4x\n", (data ^ state->m_valuekey) & 0xff, state->m_value0);
	1011	m_valueresponse = 0x880000;
	1012	//                  logerror("Unknown ASIC27 command: %2.2x data: %4.4x\n", (data ^ m_valuekey) & 0xff, m_value0);
1035	1013	break;
1036	1014	}
1037	1015	}
r21060	r21061
1192	1170	};
1193	1171
1194	1172
1195		void command_handler_oldsplus(pgm_arm_type1_state *state, int pc)
	1173	void pgm_arm_type1_state::command_handler_oldsplus(int pc)
1196	1174	{
1197		switch (state->m_ddp3lastcommand)
	1175	switch (m_ddp3lastcommand)
1198	1176	{
1199	1177	case 0x88:
1200		state->m_valuekey = 0x100;
1201		state->m_valueresponse = 0x990000;
	1178	m_valuekey = 0x100;
	1179	m_valueresponse = 0x990000;
1202	1180	break;
1203	1181
1204	1182	case 0xd0:
1205		state->m_valueresponse = 0xa01000 + (state->m_value0 << 5);
	1183	m_valueresponse = 0xa01000 + (m_value0 << 5);
1206	1184	break;
1207	1185
1208	1186	case 0xc0:
1209		state->m_valueresponse = 0xa00000 + (state->m_value0 << 6);
	1187	m_valueresponse = 0xa00000 + (m_value0 << 6);
1210	1188	break;
1211	1189
1212	1190	case 0xc3:
1213		state->m_valueresponse = 0xa00800 + (state->m_value0 << 6);
	1191	m_valueresponse = 0xa00800 + (m_value0 << 6);
1214	1192	break;
1215	1193
1216	1194	case 0x36:
1217		state->m_extra_ram[0x36] = state->m_value0;
1218		state->m_valueresponse = 0x990000;
	1195	m_extra_ram[0x36] = m_value0;
	1196	m_valueresponse = 0x990000;
1219	1197	break;
1220	1198
1221	1199	case 0x33:
1222		state->m_extra_ram[0x33] = state->m_value0;
1223		state->m_valueresponse = 0x990000;
	1200	m_extra_ram[0x33] = m_value0;
	1201	m_valueresponse = 0x990000;
1224	1202	break;
1225	1203
1226	1204	case 0x35:
1227		state->m_extra_ram[0x36] += state->m_value0;
1228		state->m_valueresponse = 0x990000;
	1205	m_extra_ram[0x36] += m_value0;
	1206	m_valueresponse = 0x990000;
1229	1207	break;
1230	1208
1231	1209	case 0x37:
1232		state->m_extra_ram[0x33] += state->m_value0;
1233		state->m_valueresponse = 0x990000;
	1210	m_extra_ram[0x33] += m_value0;
	1211	m_valueresponse = 0x990000;
1234	1212	break;
1235	1213
1236	1214	case 0x34:
1237		state->m_valueresponse = state->m_extra_ram[0x36];
	1215	m_valueresponse = m_extra_ram[0x36];
1238	1216	break;
1239	1217
1240	1218	case 0x38:
1241		state->m_valueresponse = state->m_extra_ram[0x33];
	1219	m_valueresponse = m_extra_ram[0x33];
1242	1220	break;
1243	1221
1244	1222	case 0x80:
1245		state->m_valueresponse = oldsplus_80[state->m_value0];
	1223	m_valueresponse = oldsplus_80[m_value0];
1246	1224	break;
1247	1225
1248	1226	case 0xe7:
1249		state->m_extra_ram[0xe7] = state->m_value0;
1250		state->m_valueresponse = 0x990000;
	1227	m_extra_ram[0xe7] = m_value0;
	1228	m_valueresponse = 0x990000;
1251	1229	break;
1252	1230
1253	1231	case 0xe5:
1254		switch (state->m_extra_ram[0xe7])
	1232	switch (m_extra_ram[0xe7])
1255	1233	{
1256	1234	case 0xb000:
1257		state->m_slots[0xb] = state->m_value0;
1258		state->m_slots[0xc] = 0;
	1235	m_slots[0xb] = m_value0;
	1236	m_slots[0xc] = 0;
1259	1237	break;
1260	1238
1261	1239	case 0xc000:
1262		state->m_slots[0xc] = state->m_value0;
	1240	m_slots[0xc] = m_value0;
1263	1241	break;
1264	1242
1265	1243	case 0xd000:
1266		state->m_slots[0xd] = state->m_value0;
	1244	m_slots[0xd] = m_value0;
1267	1245	break;
1268	1246
1269	1247	case 0xf000:
1270		state->m_slots[0xf] = state->m_value0;
	1248	m_slots[0xf] = m_value0;
1271	1249	break;
1272	1250	}
1273		state->m_valueresponse = 0x990000;
	1251	m_valueresponse = 0x990000;
1274	1252	break;
1275	1253
1276	1254	case 0xf8:
1277		state->m_valueresponse = state->m_slots[state->m_value0];
	1255	m_valueresponse = m_slots[m_value0];
1278	1256	break;
1279	1257
1280	1258	case 0xfc:
1281		state->m_valueresponse = oldsplus_fc[state->m_value0];
	1259	m_valueresponse = oldsplus_fc[m_value0];
1282	1260	break;
1283	1261
1284	1262	case 0xc5:
1285		state->m_slots[0xd] --;
1286		state->m_valueresponse = 0x990000;
	1263	m_slots[0xd] --;
	1264	m_valueresponse = 0x990000;
1287	1265	break;
1288	1266
1289	1267	case 0xd6:
1290		state->m_slots[0xb] ++;
1291		state->m_valueresponse = 0x990000;
	1268	m_slots[0xb] ++;
	1269	m_valueresponse = 0x990000;
1292	1270	break;
1293	1271
1294	1272	case 0x3a:
1295		state->m_slots[0xf] = 0;
1296		state->m_valueresponse = 0x990000;
	1273	m_slots[0xf] = 0;
	1274	m_valueresponse = 0x990000;
1297	1275	break;
1298	1276
1299	1277	case 0xf0:
1300		state->m_extra_ram[0xf0] = state->m_value0;
1301		state->m_valueresponse = 0x990000;
	1278	m_extra_ram[0xf0] = m_value0;
	1279	m_valueresponse = 0x990000;
1302	1280	break;
1303	1281
1304	1282	case 0xed:
1305		state->m_valueresponse = state->m_value0 << 0x6;
1306		state->m_valueresponse += state->m_extra_ram[0xf0];
1307		state->m_valueresponse = state->m_valueresponse << 0x2;
1308		state->m_valueresponse += 0x900000;
	1283	m_valueresponse = m_value0 << 0x6;
	1284	m_valueresponse += m_extra_ram[0xf0];
	1285	m_valueresponse = m_valueresponse << 0x2;
	1286	m_valueresponse += 0x900000;
1309	1287	break;
1310	1288
1311	1289	case 0xe0:
1312		state->m_extra_ram[0xe0] = state->m_value0;
1313		state->m_valueresponse = 0x990000;
	1290	m_extra_ram[0xe0] = m_value0;
	1291	m_valueresponse = 0x990000;
1314	1292	break;
1315	1293
1316	1294	case 0xdc:
1317		state->m_valueresponse = state->m_value0 << 0x6;
1318		state->m_valueresponse += state->m_extra_ram[0xe0];
1319		state->m_valueresponse = state->m_valueresponse << 0x2;
1320		state->m_valueresponse += 0x904000;
	1295	m_valueresponse = m_value0 << 0x6;
	1296	m_valueresponse += m_extra_ram[0xe0];
	1297	m_valueresponse = m_valueresponse << 0x2;
	1298	m_valueresponse += 0x904000;
1321	1299	break;
1322	1300
1323	1301	case 0xcb:
1324		state->m_valueresponse =  0xc000;
	1302	m_valueresponse =  0xc000;
1325	1303	break;
1326	1304
1327	1305	case 0xa0:
1328		state->m_valueresponse = oldsplus_a0[state->m_value0];
	1306	m_valueresponse = oldsplus_a0[m_value0];
1329	1307	break;
1330	1308
1331	1309	case 0xba:
1332		state->m_valueresponse = oldsplus_ba[state->m_value0];
	1310	m_valueresponse = oldsplus_ba[m_value0];
1333	1311	break;
1334	1312
1335	1313	case 0x5e:
1336		state->m_valueresponse = oldsplus_5e[state->m_value0];
	1314	m_valueresponse = oldsplus_5e[m_value0];
1337	1315	break;
1338	1316
1339	1317	case 0xb0:
1340		state->m_valueresponse = oldsplus_b0[state->m_value0];
	1318	m_valueresponse = oldsplus_b0[m_value0];
1341	1319	break;
1342	1320
1343	1321	case 0xae:
1344		state->m_valueresponse = oldsplus_ae[state->m_value0];
	1322	m_valueresponse = oldsplus_ae[m_value0];
1345	1323	break;
1346	1324
1347	1325	case 0x9d:
1348		state->m_valueresponse = oldsplus_9d[state->m_value0];
	1326	m_valueresponse = oldsplus_9d[m_value0];
1349	1327	break;
1350	1328
1351	1329	case 0x90:
1352		state->m_valueresponse = oldsplus_90[state->m_value0];
	1330	m_valueresponse = oldsplus_90[m_value0];
1353	1331	break;
1354	1332
1355	1333	case 0x8c:
1356		state->m_valueresponse = oldsplus_8c[state->m_value0];
	1334	m_valueresponse = oldsplus_8c[m_value0];
1357	1335	break;
1358	1336
1359	1337	default:
1360		state->m_valueresponse = 0x990000;
1361		printf("%06X: oldsplus_UNKNOWN W CMD %X  VAL %X\n", pc,state->m_value1,state->m_value0);
	1338	m_valueresponse = 0x990000;
	1339	printf("%06X: oldsplus_UNKNOWN W CMD %X  VAL %X\n", pc,m_value1,m_value0);
1362	1340	break;
1363	1341	}
1364	1342	}
1365	1343
1366		static WRITE16_HANDLER( pgm_arm7_type1_sim_w )
1367		{
1368		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
	1344	WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_w )
	1345	{
1369	1346	int pc = space.device().safe_pc();
1370	1347
1371	1348	if (offset == 0)
1372	1349	{
1373		state->m_value0 = data;
	1350	m_value0 = data;
1374	1351	return;
1375	1352	}
1376	1353	else if (offset == 1)
1377	1354	{
1378	1355	UINT16 realkey;
1379	1356	if ((data >> 8) == 0xff)
1380		state->m_valuekey = 0xff00;
1381		realkey = state->m_valuekey >> 8;
1382		realkey |= state->m_valuekey;
	1357	m_valuekey = 0xff00;
	1358	realkey = m_valuekey >> 8;
	1359	realkey |= m_valuekey;
1383	1360	{
1384		state->m_valuekey += 0x0100;
1385		state->m_valuekey &= 0xff00;
1386		if (state->m_valuekey == 0xff00)
1387		state->m_valuekey =  0x0100;
	1361	m_valuekey += 0x0100;
	1362	m_valuekey &= 0xff00;
	1363	if (m_valuekey == 0xff00)
	1364	m_valuekey =  0x0100;
1388	1365	}
1389	1366	data ^= realkey;
1390		state->m_value1 = data;
1391		state->m_value0 ^= realkey;
	1367	m_value1 = data;
	1368	m_value0 ^= realkey;
1392	1369
1393		state->m_ddp3lastcommand = state->m_value1 & 0xff;
	1370	m_ddp3lastcommand = m_value1 & 0xff;
1394	1371
1395		state->arm_sim_handler(state, pc);
	1372	(this->*arm_sim_handler)(pc);
1396	1373	}
1397	1374	else if (offset==2)
1398	1375	{
1399	1376	}
1400	1377	}
1401	1378
1402		static READ16_HANDLER( pgm_arm7_type1_sim_protram_r )
	1379	READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r )
1403	1380	{
1404	1381	if (offset == 4)
1405		return space.machine().root_device().ioport("Region")->read();
	1382	return ioport("Region")->read();
1406	1383
1407	1384	return 0x0000;
1408	1385	}
1409	1386
1410		static READ16_HANDLER( pstars_arm7_type1_sim_protram_r )
	1387	READ16_MEMBER(pgm_arm_type1_state::pstars_arm7_type1_sim_protram_r )
1411	1388	{
1412		pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
1413
1414	1389	if (offset == 4)        //region
1415		return state->ioport("Region")->read();
	1390	return ioport("Region")->read();
1416	1391	else if (offset >= 0x10)  //timer
1417	1392	{
1418		logerror("PSTARS ACCESS COUNTER %6X\n", state->m_extra_ram[offset - 0x10]);
1419		return state->m_extra_ram[offset - 0x10]--;
	1393	logerror("PSTARS ACCESS COUNTER %6X\n", m_extra_ram[offset - 0x10]);
	1394	return m_extra_ram[offset - 0x10]--;
1420	1395	}
1421	1396	return 0x0000;
1422	1397	}
r21060	r21061
1424	1399
1425	1400	DRIVER_INIT_MEMBER(pgm_arm_type1_state,ddp3)
1426	1401	{
1427		pgm_basic_init(machine(), false);
	1402	pgm_basic_init(false);
1428	1403	pgm_py2k2_decrypt(machine()); // yes, it's the same as photo y2k2
1429		arm_sim_handler = command_handler_ddp3;
1430		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
	1404	arm_sim_handler = &pgm_arm_type1_state::command_handler_ddp3;
	1405	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
1431	1406	}
1432	1407
1433	1408	DRIVER_INIT_MEMBER(pgm_arm_type1_state,ket)
1434	1409	{
1435		pgm_basic_init(machine(), false);
	1410	pgm_basic_init(false);
1436	1411	pgm_ket_decrypt(machine());
1437		arm_sim_handler = command_handler_ddp3;
1438		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x400000, 0x400005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
	1412	arm_sim_handler = &pgm_arm_type1_state::command_handler_ddp3;
	1413	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x400000, 0x400005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
1439	1414	}
1440	1415
1441	1416	DRIVER_INIT_MEMBER(pgm_arm_type1_state,espgal)
1442	1417	{
1443		pgm_basic_init(machine(), false);
	1418	pgm_basic_init(false);
1444	1419	pgm_espgal_decrypt(machine());
1445		arm_sim_handler = command_handler_ddp3;
1446		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x400000, 0x400005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
	1420	arm_sim_handler = &pgm_arm_type1_state::command_handler_ddp3;
	1421	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x400000, 0x400005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
1447	1422	}
1448	1423
1449	1424	DRIVER_INIT_MEMBER(pgm_arm_type1_state,puzzli2)
1450	1425	{
1451		pgm_basic_init(machine());
	1426	pgm_basic_init();
1452	1427	pgm_puzzli2_decrypt(machine());
1453		arm_sim_handler = command_handler_puzzli2;
1454		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
1455		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
	1428	arm_sim_handler = &pgm_arm_type1_state::command_handler_puzzli2;
	1429	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
	1430	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
1456	1431	m_irq4_disabled = 1; // // doesn't like this irq??
1457	1432	}
1458	1433
1459	1434	DRIVER_INIT_MEMBER(pgm_arm_type1_state,py2k2)
1460	1435	{
1461		pgm_basic_init(machine());
	1436	pgm_basic_init();
1462	1437	pgm_py2k2_decrypt(machine());
1463		arm_sim_handler = command_handler_py2k2;
1464		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
1465		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
	1438	arm_sim_handler = &pgm_arm_type1_state::command_handler_py2k2;
	1439	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
	1440	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
1466	1441	}
1467	1442
1468	1443	DRIVER_INIT_MEMBER(pgm_arm_type1_state,pgm3in1)
1469	1444	{
1470		pgm_basic_init(machine());
	1445	pgm_basic_init();
1471	1446	pgm_decrypt_pgm3in1(machine());
1472		arm_sim_handler = command_handler_py2k2;
1473		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
1474		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
	1447	arm_sim_handler = &pgm_arm_type1_state::command_handler_py2k2;
	1448	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005,read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
	1449	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
1475	1450	m_irq4_disabled = 1; // // doesn't like this irq??
1476	1451	}
1477	1452
1478	1453	DRIVER_INIT_MEMBER(pgm_arm_type1_state,pstar)
1479	1454	{
1480		pgm_basic_init(machine());
	1455	pgm_basic_init();
1481	1456	pgm_pstar_decrypt(machine());
1482		pgm_arm7_type1_latch_init(machine());
	1457	pgm_arm7_type1_latch_init();
1483	1458
1484	1459	m_pstar_e7_value = 0;
1485	1460	m_pstar_b1_value = 0;
r21060	r21061
1489	1464	m_extra_ram[2] = 0;
1490	1465	memset(m_slots, 0, 16 * sizeof(UINT32));
1491	1466
1492		arm_sim_handler = command_handler_pstars;
1493		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
1494		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pstars_arm7_type1_sim_protram_r));
	1467	arm_sim_handler = &pgm_arm_type1_state::command_handler_pstars;
	1468	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
	1469	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pstars_arm7_type1_sim_protram_r),this));
1495	1470
1496	1471	save_item(NAME(m_pstar_e7_value));
1497	1472	save_item(NAME(m_pstar_b1_value));
r21060	r21061
1501	1476
1502	1477	DRIVER_INIT_MEMBER(pgm_arm_type1_state,kov)
1503	1478	{
1504		pgm_basic_init(machine());
	1479	pgm_basic_init();
1505	1480	pgm_kov_decrypt(machine());
1506		pgm_arm7_type1_latch_init(machine());
	1481	pgm_arm7_type1_latch_init();
1507	1482	m_curslots = 0;
1508	1483	m_kov_c0_value = 0;
1509	1484	m_kov_cb_value = 0;
1510	1485	m_kov_fe_value = 0;
1511		arm_sim_handler = command_handler_kov;
1512		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
1513		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
	1486	arm_sim_handler = &pgm_arm_type1_state::command_handler_kov;
	1487	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
	1488	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
1514	1489	}
1515	1490
1516	1491	DRIVER_INIT_MEMBER(pgm_arm_type1_state,kovboot)
1517	1492	{
1518		pgm_basic_init(machine());
	1493	pgm_basic_init();
1519	1494	//  pgm_kov_decrypt(machine());
1520		pgm_arm7_type1_latch_init(machine());
	1495	pgm_arm7_type1_latch_init();
1521	1496	m_curslots = 0;
1522	1497	m_kov_c0_value = 0;
1523	1498	m_kov_cb_value = 0;
1524	1499	m_kov_fe_value = 0;
1525		arm_sim_handler = command_handler_kov;
1526		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
1527		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
	1500	arm_sim_handler = &pgm_arm_type1_state::command_handler_kov;
	1501	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
	1502	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
1528	1503
1529	1504	}
1530	1505
1531	1506	DRIVER_INIT_MEMBER(pgm_arm_type1_state,oldsplus)
1532	1507	{
1533		pgm_basic_init(machine());
	1508	pgm_basic_init();
1534	1509	pgm_oldsplus_decrypt(machine());
1535		pgm_arm7_type1_latch_init(machine());
	1510	pgm_arm7_type1_latch_init();
1536	1511	memset(m_extra_ram, 0, 0x100 * sizeof(UINT16));
1537	1512	memset(m_slots, 0, 0x100 * sizeof(UINT32));
1538		arm_sim_handler = command_handler_oldsplus;
1539		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
1540		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
	1513	arm_sim_handler = &pgm_arm_type1_state::command_handler_oldsplus;
	1514	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
	1515	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
1541	1516	state_save_register_global_array(machine(), m_extra_ram);
1542	1517	state_save_register_global_array(machine(), m_slots);
1543	1518	}

trunk/src/mame/machine/pgmprot2.c

r21060	r21061
33	33	#include "includes/pgm.h"
34	34
35	35
36		static READ32_HANDLER( arm7_latch_arm_r )
	36	READ32_MEMBER(pgm_arm_type2_state::arm7_latch_arm_r )
37	37	{
38		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
	38	m_prot->set_input_line(ARM7_FIRQ_LINE, CLEAR_LINE ); // guess
39	39
40		state->m_prot->set_input_line(ARM7_FIRQ_LINE, CLEAR_LINE ); // guess
41
42	40	if (PGMARM7LOGERROR)
43		logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_kov2_latchdata_68k_w, mem_mask, space.device().safe_pc());
44		return state->m_kov2_latchdata_68k_w;
	41	logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", m_kov2_latchdata_68k_w, mem_mask, space.device().safe_pc());
	42	return m_kov2_latchdata_68k_w;
45	43	}
46	44
47		static WRITE32_HANDLER( arm7_latch_arm_w )
	45	WRITE32_MEMBER(pgm_arm_type2_state::arm7_latch_arm_w )
48	46	{
49		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
50
51	47	if (PGMARM7LOGERROR)
52	48	logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, space.device().safe_pc());
53	49
54		COMBINE_DATA(&state->m_kov2_latchdata_arm_w);
	50	COMBINE_DATA(&m_kov2_latchdata_arm_w);
55	51	}
56	52
57		static READ32_HANDLER( arm7_shareram_r )
	53	READ32_MEMBER(pgm_arm_type2_state::arm7_shareram_r )
58	54	{
59		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
60
61	55	if (PGMARM7LOGERROR)
62		logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, space.device().safe_pc());
63		return state->m_arm7_shareram[offset];
	56	logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, m_arm7_shareram[offset], mem_mask, space.device().safe_pc());
	57	return m_arm7_shareram[offset];
64	58	}
65	59
66		static WRITE32_HANDLER( arm7_shareram_w )
	60	WRITE32_MEMBER(pgm_arm_type2_state::arm7_shareram_w )
67	61	{
68		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
69
70	62	if (PGMARM7LOGERROR)
71	63	logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, space.device().safe_pc());
72		COMBINE_DATA(&state->m_arm7_shareram[offset]);
	64	COMBINE_DATA(&m_arm7_shareram[offset]);
73	65	}
74	66
75		static READ16_HANDLER( arm7_latch_68k_r )
	67	READ16_MEMBER(pgm_arm_type2_state::arm7_latch_68k_r )
76	68	{
77		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
78
79	69	if (PGMARM7LOGERROR)
80		logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask, space.device().safe_pc());
81		return state->m_kov2_latchdata_arm_w;
	70	logerror("M68K: Latch read: %04x (%04x) (%06x)\n", m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask, space.device().safe_pc());
	71	return m_kov2_latchdata_arm_w;
82	72	}
83	73
84		static WRITE16_HANDLER( arm7_latch_68k_w )
	74	WRITE16_MEMBER(pgm_arm_type2_state::arm7_latch_68k_w )
85	75	{
86		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
87
88	76	if (PGMARM7LOGERROR)
89	77	logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, space.device().safe_pc());
90		COMBINE_DATA(&state->m_kov2_latchdata_68k_w);
	78	COMBINE_DATA(&m_kov2_latchdata_68k_w);
91	79
92		state->m_prot->set_input_line(ARM7_FIRQ_LINE, ASSERT_LINE ); // guess
	80	m_prot->set_input_line(ARM7_FIRQ_LINE, ASSERT_LINE ); // guess
93	81	}
94	82
95		static READ16_HANDLER( arm7_ram_r )
	83	READ16_MEMBER(pgm_arm_type2_state::arm7_ram_r )
96	84	{
97		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
98		UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
	85	UINT16 *share16 = reinterpret_cast<UINT16 *>(m_arm7_shareram.target());
99	86
100	87	if (PGMARM7LOGERROR)
101	88	logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, space.device().safe_pc());
102	89	return share16[BYTE_XOR_LE(offset)];
103	90	}
104	91
105		static WRITE16_HANDLER( arm7_ram_w )
	92	WRITE16_MEMBER(pgm_arm_type2_state::arm7_ram_w )
106	93	{
107		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
108		UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
	94	UINT16 *share16 = reinterpret_cast<UINT16 *>(m_arm7_shareram.target());
109	95
110	96	if (PGMARM7LOGERROR)
111	97	logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, space.device().safe_pc());
r21060	r21061
118	104	static ADDRESS_MAP_START( kov2_mem, AS_PROGRAM, 16, pgm_arm_type2_state )
119	105	AM_IMPORT_FROM(pgm_mem)
120	106	AM_RANGE(0x100000, 0x5fffff) AM_ROMBANK("bank1") /* Game ROM */
121		AM_RANGE(0xd00000, 0xd0ffff) AM_READWRITE_LEGACY(arm7_ram_r, arm7_ram_w) /* ARM7 Shared RAM */
122		AM_RANGE(0xd10000, 0xd10001) AM_READWRITE_LEGACY(arm7_latch_68k_r, arm7_latch_68k_w) /* ARM7 Latch */
	107	AM_RANGE(0xd00000, 0xd0ffff) AM_READWRITE(arm7_ram_r, arm7_ram_w) /* ARM7 Shared RAM */
	108	AM_RANGE(0xd10000, 0xd10001) AM_READWRITE(arm7_latch_68k_r, arm7_latch_68k_w) /* ARM7 Latch */
123	109	ADDRESS_MAP_END
124	110
125	111
r21060	r21061
128	114	AM_RANGE(0x08000000, 0x083fffff) AM_ROM AM_REGION("user1", 0)
129	115	AM_RANGE(0x10000000, 0x100003ff) AM_RAM
130	116	AM_RANGE(0x18000000, 0x1800ffff) AM_RAM AM_SHARE("arm_ram")
131		AM_RANGE(0x38000000, 0x38000003) AM_READWRITE_LEGACY(arm7_latch_arm_r, arm7_latch_arm_w) /* 68k Latch */
132		AM_RANGE(0x48000000, 0x4800ffff) AM_READWRITE_LEGACY(arm7_shareram_r, arm7_shareram_w) AM_SHARE("arm7_shareram")
	117	AM_RANGE(0x38000000, 0x38000003) AM_READWRITE(arm7_latch_arm_r, arm7_latch_arm_w) /* 68k Latch */
	118	AM_RANGE(0x48000000, 0x4800ffff) AM_READWRITE(arm7_shareram_r, arm7_shareram_w) AM_SHARE("arm7_shareram")
133	119	AM_RANGE(0x50000000, 0x500003ff) AM_RAM
134	120	ADDRESS_MAP_END
135	121
r21060	r21061
161	147
162	148
163	149
164		static void kov2_latch_init( running_machine &machine )
	150	void pgm_arm_type2_state::kov2_latch_init()
165	151	{
166		pgm_arm_type2_state *state = machine.driver_data<pgm_arm_type2_state>();
	152	m_kov2_latchdata_68k_w = 0;
	153	m_kov2_latchdata_arm_w = 0;
167	154
168		state->m_kov2_latchdata_68k_w = 0;
169		state->m_kov2_latchdata_arm_w = 0;
170
171		state->save_item(NAME(state->m_kov2_latchdata_68k_w));
172		state->save_item(NAME(state->m_kov2_latchdata_arm_w));
	155	save_item(NAME(m_kov2_latchdata_68k_w));
	156	save_item(NAME(m_kov2_latchdata_arm_w));
173	157	}
174	158
175		static WRITE32_HANDLER( kov2_arm_region_w )
	159	WRITE32_MEMBER(pgm_arm_type2_state::kov2_arm_region_w )
176	160	{
177		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
178	161	int pc = space.device().safe_pc();
179		int regionhack = state->ioport("RegionHack")->read();
	162	int regionhack = ioport("RegionHack")->read();
180	163	if (pc==0x190 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
181		COMBINE_DATA(&state->m_arm7_shareram[0x138/4]);
	164	COMBINE_DATA(&m_arm7_shareram[0x138/4]);
182	165	}
183	166
184	167	DRIVER_INIT_MEMBER(pgm_arm_type2_state,kov2)
185	168	{
186		pgm_basic_init(machine());
	169	pgm_basic_init();
187	170	pgm_kov2_decrypt(machine());
188		kov2_latch_init(machine());
	171	kov2_latch_init();
189	172
190	173	// we only have a HK internal ROM dumped for now, allow us to override that for debugging purposes.
191		machine().device("prot")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x48000138, 0x4800013b, FUNC(kov2_arm_region_w));
	174	machine().device("prot")->memory().space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32_delegate(FUNC(pgm_arm_type2_state::kov2_arm_region_w),this));
192	175	}
193	176
194	177
r21060	r21061
197	180	// this hacks the identification of the kov2 rom to return the string required for kov2p
198	181	// this isn't guaranteed to work properly (and definitely wouldn't on real hardware due to the internal
199	182	// ROM uploading the encryption table)  The internal ROM should be dumped properly.
200		pgm_basic_init(machine());
	183	pgm_basic_init();
201	184	pgm_kov2p_decrypt(machine());
202		kov2_latch_init(machine());
	185	kov2_latch_init();
203	186
204		UINT8 *mem8 = (UINT8 *)machine().root_device().memregion("user1")->base();
	187	UINT8 *mem8 = (UINT8 *)memregion("user1")->base();
205	188	mem8[0xDE] = 0xC0;
206	189	mem8[0xDF] = 0x46;
207	190	mem8[0x4ED8] = 0xA8;// B0
r21060	r21061
222	205	mem8[0x1FFFFD] = 0x99;
223	206
224	207	// we only have a HK internal ROM dumped for now, allow us to override that for debugging purposes.
225		machine().device("prot")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x48000138, 0x4800013b, FUNC(kov2_arm_region_w));
	208	machine().device("prot")->memory().space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32_delegate(FUNC(pgm_arm_type2_state::kov2_arm_region_w),this));
226	209	}
227	210
228		static WRITE32_HANDLER( martmast_arm_region_w )
	211	WRITE32_MEMBER(pgm_arm_type2_state::martmast_arm_region_w )
229	212	{
230		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
231	213	int pc = space.device().safe_pc();
232		int regionhack = state->ioport("RegionHack")->read();
	214	int regionhack = ioport("RegionHack")->read();
233	215	if (pc==0x170 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
234		COMBINE_DATA(&state->m_arm7_shareram[0x138/4]);
	216	COMBINE_DATA(&m_arm7_shareram[0x138/4]);
235	217	}
236	218
237	219
238	220	DRIVER_INIT_MEMBER(pgm_arm_type2_state,martmast)
239	221	{
240		pgm_basic_init(machine());
	222	pgm_basic_init();
241	223	pgm_mm_decrypt(machine());
242		kov2_latch_init(machine());
	224	kov2_latch_init();
243	225
244	226	// we only have a USA / CHINA internal ROMs dumped for now, allow us to override that for debugging purposes.
245		machine().device("prot")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x48000138, 0x4800013b, FUNC(martmast_arm_region_w));
	227	machine().device("prot")->memory().space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32_delegate(FUNC(pgm_arm_type2_state::martmast_arm_region_w),this));
246	228	}
247	229
248	230
249		static WRITE32_HANDLER( ddp2_arm_region_w )
	231	WRITE32_MEMBER(pgm_arm_type2_state::ddp2_arm_region_w )
250	232	{
251		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
252	233	int pc = space.device().safe_pc();
253		int regionhack = state->ioport("RegionHack")->read();
	234	int regionhack = ioport("RegionHack")->read();
254	235	if (pc==0x0174 && regionhack != 0xff) data = (data & 0x0000ffff) | (regionhack << 16);
255		COMBINE_DATA(&state->m_arm7_shareram[0x0]);
	236	COMBINE_DATA(&m_arm7_shareram[0x0]);
256	237	}
257	238
258		static READ32_HANDLER( ddp2_speedup_r )
	239	READ32_MEMBER(pgm_arm_type2_state::ddp2_speedup_r )
259	240	{
260		pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
261	241	int pc = space.device().safe_pc();
262		UINT32 data = state->m_arm_ram[0x300c/4];
	242	UINT32 data = m_arm_ram[0x300c/4];
263	243
264	244	if (pc==0x080109b4)
265	245	{
r21060	r21061
269	249
270	250	if (r4==0x18002f9e)
271	251	{
272		UINT32 data2 =  state->m_arm_ram[0x2F9C/4]&0xffff0000;
	252	UINT32 data2 =  m_arm_ram[0x2F9C/4]&0xffff0000;
273	253	if ((data==0x00000000) && (data2==0x00000000)) space.device().execute().spin_until_interrupt();
274	254	}
275	255	}
r21060	r21061
277	257	return data;
278	258	}
279	259
280		static READ16_HANDLER( ddp2_main_speedup_r )
	260	READ16_MEMBER(pgm_arm_type2_state::ddp2_main_speedup_r )
281	261	{
282		pgm_state *state = space.machine().driver_data<pgm_state>();
283		UINT16 data = state->m_mainram[0x0ee54/2];
	262	UINT16 data = m_mainram[0x0ee54/2];
284	263	int pc = space.device().safe_pc();
285	264
286	265	if (pc == 0x149dce) space.device().execute().spin_until_interrupt();
r21060	r21061
292	271
293	272	DRIVER_INIT_MEMBER(pgm_arm_type2_state,ddp2)
294	273	{
295		pgm_basic_init(machine());
	274	pgm_basic_init();
296	275	pgm_ddp2_decrypt(machine());
297		kov2_latch_init(machine());
	276	kov2_latch_init();
298	277
299	278	// we only have a Japan internal ROM dumped for now, allow us to override that for debugging purposes.
300		machine().device("prot")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x48000000, 0x48000003, FUNC(ddp2_arm_region_w));
	279	machine().device("prot")->memory().space(AS_PROGRAM).install_write_handler(0x48000000, 0x48000003, write32_delegate(FUNC(pgm_arm_type2_state::ddp2_arm_region_w),this));
301	280
302		machine().device("prot")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x1800300c, 0x1800300f, FUNC(ddp2_speedup_r));
303		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x80ee54, 0x80ee55, FUNC(ddp2_main_speedup_r));
	281	machine().device("prot")->memory().space(AS_PROGRAM).install_read_handler(0x1800300c, 0x1800300f, read32_delegate(FUNC(pgm_arm_type2_state::ddp2_speedup_r),this));
	282	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x80ee54, 0x80ee55, read16_delegate(FUNC(pgm_arm_type2_state::ddp2_main_speedup_r),this));
304	283	}
305	284
306	285
307	286	DRIVER_INIT_MEMBER(pgm_arm_type2_state,dw2001)
308	287	{
309		pgm_basic_init(machine());
310		kov2_latch_init(machine());
	288	pgm_basic_init();
	289	kov2_latch_init();
311	290	pgm_mm_decrypt(machine()); // encryption is the same as martial masters
312	291	}
313	292
314	293	DRIVER_INIT_MEMBER(pgm_arm_type2_state,dwpc)
315	294	{
316		pgm_basic_init(machine());
317		kov2_latch_init(machine());
	295	pgm_basic_init();
	296	kov2_latch_init();
318	297	pgm_mm_decrypt(machine()); // encryption is the same as martial masters
319	298	}
320	299

trunk/src/mame/machine/pgmprot.c

r21060	r21061
15	15
16	16	/*** ASIC 3 (oriental legends protection) ****************************************/
17	17
18		static void asic3_compute_hold(running_machine &machine)
	18	void pgm_asic3_state::asic3_compute_hold()
19	19	{
20		pgm_asic3_state *state = machine.driver_data<pgm_asic3_state>();
21
22	20	// The mode is dependent on the region
23	21	static const int modes[4] = { 1, 1, 3, 2 };
24		int mode = modes[machine.root_device().ioport("Region")->read() & 3];
	22	int mode = modes[ioport("Region")->read() & 3];
25	23
26	24	switch (mode)
27	25	{
28	26	case 1:
29		state->m_asic3_hold =
30		(state->m_asic3_hold << 1)
	27	m_asic3_hold =
	28	(m_asic3_hold << 1)
31	29	^ 0x2bad
32		^ BIT(state->m_asic3_hold, 15) ^ BIT(state->m_asic3_hold, 10) ^ BIT(state->m_asic3_hold, 8) ^ BIT(state->m_asic3_hold, 5)
33		^ BIT(state->m_asic3_z, state->m_asic3_y)
34		^ (BIT(state->m_asic3_x, 0) << 1) ^ (BIT(state->m_asic3_x, 1) << 6) ^ (BIT(state->m_asic3_x, 2) << 10) ^ (BIT(state->m_asic3_x, 3) << 14);
	30	^ BIT(m_asic3_hold, 15) ^ BIT(m_asic3_hold, 10) ^ BIT(m_asic3_hold, 8) ^ BIT(m_asic3_hold, 5)
	31	^ BIT(m_asic3_z, m_asic3_y)
	32	^ (BIT(m_asic3_x, 0) << 1) ^ (BIT(m_asic3_x, 1) << 6) ^ (BIT(m_asic3_x, 2) << 10) ^ (BIT(m_asic3_x, 3) << 14);
35	33	break;
36	34	case 2:
37		state->m_asic3_hold =
38		(state->m_asic3_hold << 1)
	35	m_asic3_hold =
	36	(m_asic3_hold << 1)
39	37	^ 0x2bad
40		^ BIT(state->m_asic3_hold, 15) ^ BIT(state->m_asic3_hold, 7) ^ BIT(state->m_asic3_hold, 6) ^ BIT(state->m_asic3_hold, 5)
41		^ BIT(state->m_asic3_z, state->m_asic3_y)
42		^ (BIT(state->m_asic3_x, 0) << 4) ^ (BIT(state->m_asic3_x, 1) << 6) ^ (BIT(state->m_asic3_x, 2) << 10) ^ (BIT(state->m_asic3_x, 3) << 12);
	38	^ BIT(m_asic3_hold, 15) ^ BIT(m_asic3_hold, 7) ^ BIT(m_asic3_hold, 6) ^ BIT(m_asic3_hold, 5)
	39	^ BIT(m_asic3_z, m_asic3_y)
	40	^ (BIT(m_asic3_x, 0) << 4) ^ (BIT(m_asic3_x, 1) << 6) ^ (BIT(m_asic3_x, 2) << 10) ^ (BIT(m_asic3_x, 3) << 12);
43	41	break;
44	42	case 3:
45		state->m_asic3_hold =
46		(state->m_asic3_hold << 1)
	43	m_asic3_hold =
	44	(m_asic3_hold << 1)
47	45	^ 0x2bad
48		^ BIT(state->m_asic3_hold, 15) ^ BIT(state->m_asic3_hold, 10) ^ BIT(state->m_asic3_hold, 8) ^ BIT(state->m_asic3_hold, 5)
49		^ BIT(state->m_asic3_z, state->m_asic3_y)
50		^ (BIT(state->m_asic3_x, 0) << 4) ^ (BIT(state->m_asic3_x, 1) << 6) ^ (BIT(state->m_asic3_x, 2) << 10) ^ (BIT(state->m_asic3_x, 3) << 12);
	46	^ BIT(m_asic3_hold, 15) ^ BIT(m_asic3_hold, 10) ^ BIT(m_asic3_hold, 8) ^ BIT(m_asic3_hold, 5)
	47	^ BIT(m_asic3_z, m_asic3_y)
	48	^ (BIT(m_asic3_x, 0) << 4) ^ (BIT(m_asic3_x, 1) << 6) ^ (BIT(m_asic3_x, 2) << 10) ^ (BIT(m_asic3_x, 3) << 12);
51	49	break;
52	50	}
53	51	}
54	52
55		READ16_HANDLER( pgm_asic3_r )
	53	READ16_MEMBER(pgm_asic3_state::pgm_asic3_r )
56	54	{
57		pgm_asic3_state *state = space.machine().driver_data<pgm_asic3_state>();
58	55	UINT8 res = 0;
59	56	/* region is supplied by the protection device */
60	57
61		switch (state->m_asic3_reg)
	58	switch (m_asic3_reg)
62	59	{
63		case 0x00: res = (state->m_asic3_latch[0] & 0xf7) | ((state->ioport("Region")->read() << 3) & 0x08); break;
64		case 0x01: res = state->m_asic3_latch[1]; break;
65		case 0x02: res = (state->m_asic3_latch[2] & 0x7f) | ((state->ioport("Region")->read() << 6) & 0x80); break;
	60	case 0x00: res = (m_asic3_latch[0] & 0xf7) | ((ioport("Region")->read() << 3) & 0x08); break;
	61	case 0x01: res = m_asic3_latch[1]; break;
	62	case 0x02: res = (m_asic3_latch[2] & 0x7f) | ((ioport("Region")->read() << 6) & 0x80); break;
66	63	case 0x03:
67		res = (BIT(state->m_asic3_hold, 15) << 0)
68		| (BIT(state->m_asic3_hold, 12) << 1)
69		| (BIT(state->m_asic3_hold, 13) << 2)
70		| (BIT(state->m_asic3_hold, 10) << 3)
71		| (BIT(state->m_asic3_hold, 7) << 4)
72		| (BIT(state->m_asic3_hold, 9) << 5)
73		| (BIT(state->m_asic3_hold, 2) << 6)
74		| (BIT(state->m_asic3_hold, 5) << 7);
	64	res = (BIT(m_asic3_hold, 15) << 0)
	65	| (BIT(m_asic3_hold, 12) << 1)
	66	| (BIT(m_asic3_hold, 13) << 2)
	67	| (BIT(m_asic3_hold, 10) << 3)
	68	| (BIT(m_asic3_hold, 7) << 4)
	69	| (BIT(m_asic3_hold, 9) << 5)
	70	| (BIT(m_asic3_hold, 2) << 6)
	71	| (BIT(m_asic3_hold, 5) << 7);
75	72	break;
76	73	case 0x20: res = 0x49; break;
77	74	case 0x21: res = 0x47; break;
r21060	r21061
96	93	return res;
97	94	}
98	95
99		WRITE16_HANDLER( pgm_asic3_w )
	96	WRITE16_MEMBER(pgm_asic3_state::pgm_asic3_w )
100	97	{
101		pgm_asic3_state *state = space.machine().driver_data<pgm_asic3_state>();
102
103	98	if(ACCESSING_BITS_0_7)
104	99	{
105		if (state->m_asic3_reg < 3)
106		state->m_asic3_latch[state->m_asic3_reg] = data << 1;
107		else if (state->m_asic3_reg == 0xa0)
108		state->m_asic3_hold = 0;
109		else if (state->m_asic3_reg == 0x40)
	100	if (m_asic3_reg < 3)
	101	m_asic3_latch[m_asic3_reg] = data << 1;
	102	else if (m_asic3_reg == 0xa0)
	103	m_asic3_hold = 0;
	104	else if (m_asic3_reg == 0x40)
110	105	{
111		state->m_asic3_h2 = state->m_asic3_h1;
112		state->m_asic3_h1 = data;
	106	m_asic3_h2 = m_asic3_h1;
	107	m_asic3_h1 = data;
113	108	}
114		else if (state->m_asic3_reg == 0x48)
	109	else if (m_asic3_reg == 0x48)
115	110	{
116		state->m_asic3_x = 0;
117		if (!(state->m_asic3_h2 & 0x0a))
118		state->m_asic3_x |= 8;
119		if (!(state->m_asic3_h2 & 0x90))
120		state->m_asic3_x |= 4;
121		if (!(state->m_asic3_h1 & 0x06))
122		state->m_asic3_x |= 2;
123		if (!(state->m_asic3_h1 & 0x90))
124		state->m_asic3_x |= 1;
	111	m_asic3_x = 0;
	112	if (!(m_asic3_h2 & 0x0a))
	113	m_asic3_x |= 8;
	114	if (!(m_asic3_h2 & 0x90))
	115	m_asic3_x |= 4;
	116	if (!(m_asic3_h1 & 0x06))
	117	m_asic3_x |= 2;
	118	if (!(m_asic3_h1 & 0x90))
	119	m_asic3_x |= 1;
125	120	}
126		else if(state->m_asic3_reg >= 0x80 && state->m_asic3_reg <= 0x87)
	121	else if(m_asic3_reg >= 0x80 && m_asic3_reg <= 0x87)
127	122	{
128		state->m_asic3_y = state->m_asic3_reg & 7;
129		state->m_asic3_z = data;
130		asic3_compute_hold(space.machine());
	123	m_asic3_y = m_asic3_reg & 7;
	124	m_asic3_z = data;
	125	asic3_compute_hold();
131	126	}
132	127	}
133	128	}
134	129
135		WRITE16_HANDLER( pgm_asic3_reg_w )
	130	WRITE16_MEMBER(pgm_asic3_state::pgm_asic3_reg_w )
136	131	{
137		pgm_asic3_state *state = space.machine().driver_data<pgm_asic3_state>();
138
139	132	if(ACCESSING_BITS_0_7)
140		state->m_asic3_reg = data & 0xff;
	133	m_asic3_reg = data & 0xff;
141	134	}
142	135
143	136
r21060	r21061
148	141
149	142	DRIVER_INIT_MEMBER(pgm_asic3_state,orlegend)
150	143	{
151		pgm_basic_init(machine());
	144	pgm_basic_init();
152	145
153		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xC0400e, 0xC0400f, FUNC(pgm_asic3_r), FUNC(pgm_asic3_w));
154		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0xC04000, 0xC04001, FUNC(pgm_asic3_reg_w));
	146	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xC0400e, 0xC0400f, read16_delegate(FUNC(pgm_asic3_state::pgm_asic3_r),this), write16_delegate(FUNC(pgm_asic3_state::pgm_asic3_w),this));
	147	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0xC04000, 0xC04001, write16_delegate(FUNC(pgm_asic3_state::pgm_asic3_reg_w),this));
155	148
156	149	m_asic3_reg = 0;
157	150	m_asic3_latch[0] = 0;

trunk/src/mame/machine/pgmprot3.c

r21060	r21061
40	40	#include "emu.h"
41	41	#include "includes/pgm.h"
42	42
43		static WRITE32_HANDLER( svg_arm7_ram_sel_w )
	43	WRITE32_MEMBER(pgm_arm_type3_state::svg_arm7_ram_sel_w )
44	44	{
45	45	//  printf("svg_arm7_ram_sel_w %08x\n", data);
46		space.machine().scheduler().synchronize(); // force resync
47
48		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
49		state->m_svg_ram_sel = data & 1;
	46	machine().scheduler().synchronize(); // force resync
	47	m_svg_ram_sel = data & 1;
50	48	}
51	49
52		static READ32_HANDLER( svg_arm7_shareram_r )
	50	READ32_MEMBER(pgm_arm_type3_state::svg_arm7_shareram_r )
53	51	{
54		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
55		return state->m_svg_shareram[state->m_svg_ram_sel & 1][offset];
	52	return m_svg_shareram[m_svg_ram_sel & 1][offset];
56	53	}
57	54
58		static WRITE32_HANDLER( svg_arm7_shareram_w )
	55	WRITE32_MEMBER(pgm_arm_type3_state::svg_arm7_shareram_w )
59	56	{
60		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
61		COMBINE_DATA(&state->m_svg_shareram[state->m_svg_ram_sel & 1][offset]);
	57	COMBINE_DATA(&m_svg_shareram[m_svg_ram_sel & 1][offset]);
62	58	}
63	59
64		static READ16_HANDLER( svg_m68k_ram_r )
	60	READ16_MEMBER(pgm_arm_type3_state::svg_m68k_ram_r )
65	61	{
66		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
67		int ram_sel = (state->m_svg_ram_sel & 1) ^ 1;
68		UINT16 *share16 = (UINT16 *)(state->m_svg_shareram[ram_sel & 1]);
	62	int ram_sel = (m_svg_ram_sel & 1) ^ 1;
	63	UINT16 *share16 = (UINT16 *)(m_svg_shareram[ram_sel & 1]);
69	64
70	65	return share16[BYTE_XOR_LE(offset)];
71	66	}
72	67
73		static WRITE16_HANDLER( svg_m68k_ram_w )
	68	WRITE16_MEMBER(pgm_arm_type3_state::svg_m68k_ram_w )
74	69	{
75		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
76		int ram_sel = (state->m_svg_ram_sel & 1) ^ 1;
77		UINT16 *share16 = (UINT16 *)(state->m_svg_shareram[ram_sel & 1]);
	70	int ram_sel = (m_svg_ram_sel & 1) ^ 1;
	71	UINT16 *share16 = (UINT16 *)(m_svg_shareram[ram_sel & 1]);
78	72
79	73	COMBINE_DATA(&share16[BYTE_XOR_LE(offset)]);
80	74	}
81	75
82		static READ16_HANDLER( svg_68k_nmi_r )
	76	READ16_MEMBER(pgm_arm_type3_state::svg_68k_nmi_r )
83	77	{
84	78	return 0;
85	79	}
86	80
87		static WRITE16_HANDLER( svg_68k_nmi_w )
	81	WRITE16_MEMBER(pgm_arm_type3_state::svg_68k_nmi_w )
88	82	{
89		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
90		generic_pulse_irq_line(state->m_prot, ARM7_FIRQ_LINE, 1);
	83	generic_pulse_irq_line(*m_prot, ARM7_FIRQ_LINE, 1);
91	84	}
92	85
93		static WRITE16_HANDLER( svg_latch_68k_w )
	86	WRITE16_MEMBER(pgm_arm_type3_state::svg_latch_68k_w )
94	87	{
95		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
96	88	if (PGMARM7LOGERROR)
97	89	logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, space.device().safe_pc());
98		COMBINE_DATA(&state->m_svg_latchdata_68k_w);
	90	COMBINE_DATA(&m_svg_latchdata_68k_w);
99	91	}
100	92
101	93
102		static READ16_HANDLER( svg_latch_68k_r )
	94	READ16_MEMBER(pgm_arm_type3_state::svg_latch_68k_r )
103	95	{
104		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
105
106	96	if (PGMARM7LOGERROR)
107		logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, space.device().safe_pc());
108		return state->m_svg_latchdata_arm_w;
	97	logerror("M68K: Latch read: %04x (%04x) (%06x)\n", m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, space.device().safe_pc());
	98	return m_svg_latchdata_arm_w;
109	99	}
110	100
111	101
112	102
113		static READ32_HANDLER( svg_latch_arm_r )
	103	READ32_MEMBER(pgm_arm_type3_state::svg_latch_arm_r )
114	104	{
115		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
116
117	105	if (PGMARM7LOGERROR)
118		logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_svg_latchdata_68k_w, mem_mask, space.device().safe_pc());
119		return state->m_svg_latchdata_68k_w;
	106	logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", m_svg_latchdata_68k_w, mem_mask, space.device().safe_pc());
	107	return m_svg_latchdata_68k_w;
120	108	}
121	109
122		static WRITE32_HANDLER( svg_latch_arm_w )
	110	WRITE32_MEMBER(pgm_arm_type3_state::svg_latch_arm_w )
123	111	{
124		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
125
126	112	if (PGMARM7LOGERROR)
127	113	logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, space.device().safe_pc());
128	114
129		COMBINE_DATA(&state->m_svg_latchdata_arm_w);
	115	COMBINE_DATA(&m_svg_latchdata_arm_w);
130	116	}
131	117
132	118	/* 55857G? */
r21060	r21061
136	122	AM_IMPORT_FROM(pgm_mem)
137	123	AM_RANGE(0x100000, 0x1fffff) AM_ROMBANK("bank1")  /* Game ROM */
138	124
139		AM_RANGE(0x500000, 0x51ffff) AM_READWRITE_LEGACY(svg_m68k_ram_r, svg_m68k_ram_w)    /* ARM7 Shared RAM */
140		AM_RANGE(0x5c0000, 0x5c0001) AM_READWRITE_LEGACY(svg_68k_nmi_r, svg_68k_nmi_w)      /* ARM7 FIQ */
141		AM_RANGE(0x5c0300, 0x5c0301) AM_READWRITE_LEGACY(svg_latch_68k_r, svg_latch_68k_w) /* ARM7 Latch */
	125	AM_RANGE(0x500000, 0x51ffff) AM_READWRITE(svg_m68k_ram_r, svg_m68k_ram_w)    /* ARM7 Shared RAM */
	126	AM_RANGE(0x5c0000, 0x5c0001) AM_READWRITE(svg_68k_nmi_r, svg_68k_nmi_w)      /* ARM7 FIQ */
	127	AM_RANGE(0x5c0300, 0x5c0301) AM_READWRITE(svg_latch_68k_r, svg_latch_68k_w) /* ARM7 Latch */
142	128	ADDRESS_MAP_END
143	129
144	130
r21060	r21061
147	133	AM_RANGE(0x08000000, 0x087fffff) AM_ROM AM_REGION("user1", 0)
148	134	AM_RANGE(0x10000000, 0x100003ff) AM_RAM
149	135	AM_RANGE(0x18000000, 0x1803ffff) AM_RAM AM_SHARE("arm_ram")
150		AM_RANGE(0x38000000, 0x3801ffff) AM_READWRITE_LEGACY(svg_arm7_shareram_r, svg_arm7_shareram_w)
151		AM_RANGE(0x48000000, 0x48000003) AM_READWRITE_LEGACY(svg_latch_arm_r, svg_latch_arm_w) /* 68k Latch */
152		AM_RANGE(0x40000018, 0x4000001b) AM_WRITE_LEGACY(svg_arm7_ram_sel_w) /* RAM SEL */
	136	AM_RANGE(0x38000000, 0x3801ffff) AM_READWRITE(svg_arm7_shareram_r, svg_arm7_shareram_w)
	137	AM_RANGE(0x48000000, 0x48000003) AM_READWRITE(svg_latch_arm_r, svg_latch_arm_w) /* 68k Latch */
	138	AM_RANGE(0x40000018, 0x4000001b) AM_WRITE(svg_arm7_ram_sel_w) /* RAM SEL */
153	139	AM_RANGE(0x50000000, 0x500003ff) AM_RAM
154	140	ADDRESS_MAP_END
155	141
r21060	r21061
182	168
183	169
184	170
185		static void svg_basic_init(running_machine &machine)
	171	void pgm_arm_type3_state::svg_basic_init()
186	172	{
187		pgm_arm_type3_state *state = machine.driver_data<pgm_arm_type3_state>();
	173	pgm_basic_init();
	174	m_svg_shareram[0] = auto_alloc_array(machine(), UINT32, 0x10000 / 4);
	175	m_svg_shareram[1] = auto_alloc_array(machine(), UINT32, 0x10000 / 4);
	176	m_svg_ram_sel = 0;
188	177
189		pgm_basic_init(machine);
190		state->m_svg_shareram[0] = auto_alloc_array(machine, UINT32, 0x10000 / 4);
191		state->m_svg_shareram[1] = auto_alloc_array(machine, UINT32, 0x10000 / 4);
192		state->m_svg_ram_sel = 0;
193
194		state->save_pointer(NAME(state->m_svg_shareram[0]), 0x10000 / 4);
195		state->save_pointer(NAME(state->m_svg_shareram[1]), 0x10000 / 4);
196		state->save_item(NAME(state->m_svg_ram_sel));
	178	save_pointer(NAME(m_svg_shareram[0]), 0x10000 / 4);
	179	save_pointer(NAME(m_svg_shareram[1]), 0x10000 / 4);
	180	save_item(NAME(m_svg_ram_sel));
197	181	}
198	182
199		static void pgm_create_dummy_internal_arm_region(running_machine &machine)
	183	void pgm_arm_type3_state::pgm_create_dummy_internal_arm_region()
200	184	{
201		UINT16 *temp16 = (UINT16 *)machine.root_device().memregion("prot")->base();
	185	UINT16 *temp16 = (UINT16 *)memregion("prot")->base();
202	186
203	187	// fill with RX 14
204	188	int i;
r21060	r21061
222	206
223	207
224	208
225		static void svg_latch_init( running_machine &machine )
	209	void pgm_arm_type3_state::svg_latch_init()
226	210	{
227		pgm_arm_type3_state *state = machine.driver_data<pgm_arm_type3_state>();
	211	m_svg_latchdata_68k_w = 0;
	212	m_svg_latchdata_arm_w = 0;
228	213
229		state->m_svg_latchdata_68k_w = 0;
230		state->m_svg_latchdata_arm_w = 0;
231
232		state->save_item(NAME(state->m_svg_latchdata_68k_w));
233		state->save_item(NAME(state->m_svg_latchdata_arm_w));
	214	save_item(NAME(m_svg_latchdata_68k_w));
	215	save_item(NAME(m_svg_latchdata_arm_w));
234	216	}
235	217
236	218
237	219	DRIVER_INIT_MEMBER(pgm_arm_type3_state,theglad)
238	220	{
239		svg_basic_init(machine());
	221	svg_basic_init();
240	222	pgm_theglad_decrypt(machine());
241		svg_latch_init(machine());
242		pgm_create_dummy_internal_arm_region(machine());
	223	svg_latch_init();
	224	pgm_create_dummy_internal_arm_region();
243	225	}
244	226
245	227	DRIVER_INIT_MEMBER(pgm_arm_type3_state,svg)
246	228	{
247		svg_basic_init(machine());
	229	svg_basic_init();
248	230	pgm_svg_decrypt(machine());
249		svg_latch_init(machine());
250		pgm_create_dummy_internal_arm_region(machine());
	231	svg_latch_init();
	232	pgm_create_dummy_internal_arm_region();
251	233	}
252	234
253	235	DRIVER_INIT_MEMBER(pgm_arm_type3_state,svgpcb)
254	236	{
255		svg_basic_init(machine());
	237	svg_basic_init();
256	238	pgm_svgpcb_decrypt(machine());
257		svg_latch_init(machine());
258		pgm_create_dummy_internal_arm_region(machine());
	239	svg_latch_init();
	240	pgm_create_dummy_internal_arm_region();
259	241	}
260	242
261	243	DRIVER_INIT_MEMBER(pgm_arm_type3_state,killbldp)
262	244	{
263		svg_basic_init(machine());
	245	svg_basic_init();
264	246	pgm_killbldp_decrypt(machine());
265		svg_latch_init(machine());
	247	svg_latch_init();
266	248	}
267	249
268		static READ32_HANDLER( dmnfrnt_speedup_r )
269		{
270		pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
	250	READ32_MEMBER(pgm_arm_type3_state::dmnfrnt_speedup_r )
	251	{
271	252	int pc = space.device().safe_pc();
272	253	if (pc == 0x8000fea) space.device().execute().eat_cycles(500);
273	254	//  else printf("dmn_speedup_r %08x\n", pc);
274		return state->m_arm_ram[0x000444/4];
	255	return m_arm_ram[0x000444/4];
275	256	}
276	257
277		static READ16_HANDLER( dmnfrnt_main_speedup_r )
278		{
279		pgm_state *state = space.machine().driver_data<pgm_state>();
280		UINT16 data = state->m_mainram[0xa03c/2];
	258	READ16_MEMBER(pgm_arm_type3_state::dmnfrnt_main_speedup_r )
	259	{
	260	UINT16 data = m_mainram[0xa03c/2];
281	261	int pc = space.device().safe_pc();
282	262	if (pc == 0x10193a) space.device().execute().spin_until_interrupt();
283	263	else if (pc == 0x1019a4) space.device().execute().spin_until_interrupt();
r21060	r21061
286	266
287	267	DRIVER_INIT_MEMBER(pgm_arm_type3_state,dmnfrnt)
288	268	{
289		svg_basic_init(machine());
	269	svg_basic_init();
290	270	pgm_dfront_decrypt(machine());
291		svg_latch_init(machine());
	271	svg_latch_init();
292	272
293	273	/* put some fake code for the ARM here ... */
294		pgm_create_dummy_internal_arm_region(machine());
	274	pgm_create_dummy_internal_arm_region();
295	275
296		machine().device("prot")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x18000444, 0x18000447, FUNC(dmnfrnt_speedup_r));
297		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x80a03c, 0x80a03d, FUNC(dmnfrnt_main_speedup_r));
	276	machine().device("prot")->memory().space(AS_PROGRAM).install_read_handler(0x18000444, 0x18000447, read32_delegate(FUNC(pgm_arm_type3_state::dmnfrnt_speedup_r),this));
	277	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x80a03c, 0x80a03d, read16_delegate(FUNC(pgm_arm_type3_state::dmnfrnt_main_speedup_r),this));
298	278
299	279	m_svg_ram_sel = 1;
300	280
r21060	r21061
310	290
311	291	DRIVER_INIT_MEMBER(pgm_arm_type3_state,happy6)
312	292	{
313		svg_basic_init(machine());
	293	svg_basic_init();
314	294	pgm_happy6_decrypt(machine());
315		svg_latch_init(machine());
316		pgm_create_dummy_internal_arm_region(machine());
	295	svg_latch_init();
	296	pgm_create_dummy_internal_arm_region();
317	297	}

trunk/src/mame/machine/pgmprot4.c

r21060	r21061
33	33	*/
34	34
35	35
36		void pgm_dw3_decrypt(running_machine &machine)
	36	void pgm_022_025_state::pgm_dw3_decrypt()
37	37	{
38	38	//  int i;
39	39	//  UINT16 *src=(UINT16 *) (OP_ROM+0x100000);
40	40
41	41	int i;
42		UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
	42	UINT16 *src = (UINT16 *) (memregion("maincpu")->base()+0x100000);
43	43
44	44	int rom_size = 0x100000;
45	45
r21060	r21061
64	64	}
65	65	}
66	66
67		void pgm_killbld_decrypt(running_machine &machine)
	67	void pgm_022_025_state::pgm_killbld_decrypt()
68	68	{
69	69	//  int i;
70	70	//  UINT16 *src=(UINT16 *) (OP_ROM+0x100000);
71	71
72	72	int i;
73		UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
	73	UINT16 *src = (UINT16 *) (memregion("maincpu")->base()+0x100000);
74	74
75	75	int rom_size = 0x200000;
76	76
r21060	r21061
88	88
89	89
90	90
91		static void IGS022_do_dma(running_machine& machine, UINT16 src, UINT16 dst, UINT16 size, UINT16 mode)
	91	void pgm_022_025_state::IGS022_do_dma(UINT16 src, UINT16 dst, UINT16 size, UINT16 mode)
92	92	{
93		pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
94	93	UINT16 param;
95	94	/*
96	95	P_SRC =0x300290 (offset from prot rom base)
r21060	r21061
162	161	};
163	162	*/
164	163	int x;
165		UINT16 *PROTROM = (UINT16*)machine.root_device().memregion("igs022data")->base();
	164	UINT16 *PROTROM = (UINT16*)memregion("igs022data")->base();
166	165
167	166	for (x = 0; x < size; x++)
168	167	{
169		//UINT16 *RAMDUMP = (UINT16*)space.machine().root_device().memregion("user2")->base();
	168	//UINT16 *RAMDUMP = (UINT16*)memregion("user2")->base();
170	169	//UINT16 dat = RAMDUMP[dst + x];
171	170
172	171	UINT16 dat2 = PROTROM[src + x];
173	172
174	173	UINT8 extraoffset = param&0xfe; // the lowest bit changed the table addressing in tests, see 'rawDataOdd' table instead.. it's still related to the main one, not identical
175		UINT8* dectable = (UINT8*)machine.root_device().memregion("igs022data")->base();//rawDataEven; // the basic decryption table is at the start of the mcu data rom! at least in killbld
	174	UINT8* dectable = (UINT8*)memregion("igs022data")->base();//rawDataEven; // the basic decryption table is at the start of the mcu data rom! at least in killbld
176	175	UINT16 extraxor = ((dectable[((x*2)+0+extraoffset)&0xff]) << 8) | (dectable[((x*2)+1+extraoffset)&0xff] << 0);
177	176
178	177	dat2 = ((dat2 & 0x00ff)<<8) | ((dat2 & 0xff00)>>8);
r21060	r21061
185	184	//if (dat!=dat2)
186	185	//  printf("Mode %04x Param %04x Mismatch %04x %04x\n", mode, param, dat, dat2);
187	186
188		state->m_sharedprotram[dst + x] = dat2;
	187	m_sharedprotram[dst + x] = dat2;
189	188	}
190	189
191	190	/* Killing Blade: hack, patches out some additional security checks... we need to emulate them instead! */
192	191	// different region IGS025 devices supply different sequences - we currently only have the china sequence for Killing Blade
193		//if ((mode==3) && (param==0x54) && (src*2==0x2120) && (dst*2==0x2600)) state->m_sharedprotram[0x2600 / 2] = 0x4e75;
	192	//if ((mode==3) && (param==0x54) && (src*2==0x2120) && (dst*2==0x2600)) m_sharedprotram[0x2600 / 2] = 0x4e75;
194	193
195	194	}
196	195	if (mode == 4)
r21060	r21061
203	202	{
204	203	/* mode 5 seems to be a straight copy */
205	204	int x;
206		UINT16 *PROTROM = (UINT16*)machine.root_device().memregion("igs022data")->base();
	205	UINT16 *PROTROM = (UINT16*)memregion("igs022data")->base();
207	206	for (x = 0; x < size; x++)
208	207	{
209	208	UINT16 dat = PROTROM[src + x];
210	209
211	210
212		state->m_sharedprotram[dst + x] = dat;
	211	m_sharedprotram[dst + x] = dat;
213	212	}
214	213	}
215	214	else if (mode == 6)
216	215	{
217	216	/* mode 6 seems to swap bytes and nibbles */
218	217	int x;
219		UINT16 *PROTROM = (UINT16*)machine.root_device().memregion("igs022data")->base();
	218	UINT16 *PROTROM = (UINT16*)memregion("igs022data")->base();
220	219	for (x = 0; x < size; x++)
221	220	{
222	221	UINT16 dat = PROTROM[src + x];
r21060	r21061
226	225	((dat & 0x00f0) << 4)|
227	226	((dat & 0x000f) << 12);
228	227
229		state->m_sharedprotram[dst + x] = dat;
	228	m_sharedprotram[dst + x] = dat;
230	229	}
231	230	}
232	231	else if (mode == 7)
r21060	r21061
246	245
247	246	// the internal MCU boot code automatically does this DMA
248	247	// and puts the version # of the data rom in ram
249		static void IGS022_reset(running_machine& machine)
	248	void pgm_022_025_state::IGS022_reset()
250	249	{
251	250	int i;
252		UINT16 *PROTROM = (UINT16*)machine.root_device().memregion("igs022data")->base();
253		pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
	251	UINT16 *PROTROM = (UINT16*)memregion("igs022data")->base();
254	252	UINT16 tmp;
255	253
256	254	// fill ram with A5 patern
257	255	for (i = 0; i < 0x4000/2; i++)
258		state->m_sharedprotram[i] = 0xa55a;
	256	m_sharedprotram[i] = 0xa55a;
259	257
260	258	// the auto-dma
261	259	UINT16 src = PROTROM[0x100 / 2];
r21060	r21061
272	270
273	271	printf("Auto-DMA %04x %04x %04x %04x\n",src,dst,size,mode);
274	272
275		IGS022_do_dma(machine,src,dst,size,mode);
	273	IGS022_do_dma(src,dst,size,mode);
276	274
277	275	// there is also a version ID? (or is it some kind of checksum) that is stored in the data rom, and gets copied..
278	276	// Dragon World 3 checks it
279	277	tmp = PROTROM[0x114/2];
280	278	tmp = ((tmp & 0xff00) >> 8) | ((tmp & 0x00ff) << 8);
281		state->m_sharedprotram[0x2a2/2] = tmp;
	279	m_sharedprotram[0x2a2/2] = tmp;
282	280	}
283	281
284		static void IGS022_handle_command(running_machine& machine)
	282	void pgm_022_025_state::IGS022_handle_command()
285	283	{
286		pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
287		UINT16 cmd = state->m_sharedprotram[0x200/2];
	284	UINT16 cmd = m_sharedprotram[0x200/2];
288	285	//mame_printf_debug("command %04x\n", cmd);
289	286	if (cmd == 0x6d)    //Store values to asic ram
290	287	{
291		UINT32 p1 = (state->m_sharedprotram[0x298/2] << 16) | state->m_sharedprotram[0x29a/2];
292		UINT32 p2 = (state->m_sharedprotram[0x29c/2] << 16) | state->m_sharedprotram[0x29e/2];
	288	UINT32 p1 = (m_sharedprotram[0x298/2] << 16) | m_sharedprotram[0x29a/2];
	289	UINT32 p2 = (m_sharedprotram[0x29c/2] << 16) | m_sharedprotram[0x29e/2];
293	290
294	291	if ((p2 & 0xffff) == 0x9)   //Set value
295	292	{
296	293	int reg = (p2 >> 16) & 0xffff;
297	294	if (reg & 0x200)
298		state->m_kb_regs[reg & 0xff] = p1;
	295	m_kb_regs[reg & 0xff] = p1;
299	296	}
300	297	if ((p2 & 0xffff) == 0x6)   //Add value
301	298	{
302	299	int src1 = (p1 >> 16) & 0xff;
303	300	int src2 = (p1 >> 0) & 0xff;
304	301	int dst = (p2 >> 16) & 0xff;
305		state->m_kb_regs[dst] = state->m_kb_regs[src2] - state->m_kb_regs[src1];
	302	m_kb_regs[dst] = m_kb_regs[src2] - m_kb_regs[src1];
306	303	}
307	304	if ((p2 & 0xffff) == 0x1)   //Add Imm?
308	305	{
309	306	int reg = (p2 >> 16) & 0xff;
310	307	int imm = (p1 >> 0) & 0xffff;
311		state->m_kb_regs[reg] += imm;
	308	m_kb_regs[reg] += imm;
312	309	}
313	310	if ((p2 & 0xffff) == 0xa)   //Get value
314	311	{
315	312	int reg = (p1 >> 16) & 0xFF;
316		state->m_sharedprotram[0x29c/2] = (state->m_kb_regs[reg] >> 16) & 0xffff;
317		state->m_sharedprotram[0x29e/2] = state->m_kb_regs[reg] & 0xffff;
	313	m_sharedprotram[0x29c/2] = (m_kb_regs[reg] >> 16) & 0xffff;
	314	m_sharedprotram[0x29e/2] = m_kb_regs[reg] & 0xffff;
318	315	}
319	316	}
320	317	if(cmd == 0x4f) //memcpy with encryption / scrambling
321	318	{
322		UINT16 src = state->m_sharedprotram[0x290 / 2] >> 1; // ?
323		UINT32 dst = state->m_sharedprotram[0x292 / 2];
324		UINT16 size = state->m_sharedprotram[0x294 / 2];
325		UINT16 mode = state->m_sharedprotram[0x296 / 2];
	319	UINT16 src = m_sharedprotram[0x290 / 2] >> 1; // ?
	320	UINT32 dst = m_sharedprotram[0x292 / 2];
	321	UINT16 size = m_sharedprotram[0x294 / 2];
	322	UINT16 mode = m_sharedprotram[0x296 / 2];
326	323
327		IGS022_do_dma(machine, src,dst,size,mode);
	324	IGS022_do_dma(src,dst,size,mode);
328	325	}
329	326
330	327	}
331	328
332	329
333		static WRITE16_HANDLER( killbld_igs025_prot_w )
	330	WRITE16_MEMBER(pgm_022_025_state::killbld_igs025_prot_w )
334	331	{
335	332	//  mame_printf_debug("killbrd prot r\n");
336		//  return 0;
337		pgm_022_025_state *state = space.machine().driver_data<pgm_022_025_state>();
	333	//  return 0;
338	334	offset &= 0xf;
339	335
340	336	if (offset == 0)
341		state->m_kb_cmd = data;
	337	m_kb_cmd = data;
342	338	else //offset==2
343	339	{
344		logerror("%06X: ASIC25 W CMD %X  VAL %X\n", space.device().safe_pc(), state->m_kb_cmd, data);
345		if (state->m_kb_cmd == 0)
346		state->m_kb_reg = data;
347		else if (state->m_kb_cmd == 2)
	340	logerror("%06X: ASIC25 W CMD %X  VAL %X\n", space.device().safe_pc(), m_kb_cmd, data);
	341	if (m_kb_cmd == 0)
	342	m_kb_reg = data;
	343	else if (m_kb_cmd == 2)
348	344	{
349	345	if (data == 1)  //Execute cmd
350	346	{
351		IGS022_handle_command(space.machine());
352		state->m_kb_reg++;
	347	IGS022_handle_command();
	348	m_kb_reg++;
353	349	}
354	350	}
355		else if (state->m_kb_cmd == 4)
356		state->m_kb_ptr = data;
357		else if (state->m_kb_cmd == 0x20)
358		state->m_kb_ptr++;
	351	else if (m_kb_cmd == 4)
	352	m_kb_ptr = data;
	353	else if (m_kb_cmd == 0x20)
	354	m_kb_ptr++;
359	355	}
360	356	}
361	357
362		static READ16_HANDLER( killbld_igs025_prot_r )
	358	READ16_MEMBER(pgm_022_025_state::killbld_igs025_prot_r )
363	359	{
364	360	//  mame_printf_debug("killbld prot w\n");
365		pgm_022_025_state *state = space.machine().driver_data<pgm_022_025_state>();
366	361	UINT16 res ;
367	362
368	363	offset &= 0xf;
r21060	r21061
370	365
371	366	if (offset == 1)
372	367	{
373		if (state->m_kb_cmd == 1)
	368	if (m_kb_cmd == 1)
374	369	{
375		res = state->m_kb_reg & 0x7f;
	370	res = m_kb_reg & 0x7f;
376	371	}
377		else if (state->m_kb_cmd == 5)
	372	else if (m_kb_cmd == 5)
378	373	{
379	374	UINT8 kb_region_sequence[11] = {0x17, 0x14, 0x91, 0x89, 0x21, 0xD5, 0x7C, 0x65, 0x8F, 0x8E, 0xE1};
380	375	UINT8 ret;
381	376
382	377	// this isn't properly understood.. should be some kind of bitswap / xor / shift..based on values written to 0x22/0x23 etc.?
383	378	// return hardcoded china sequence results for now, avoids rom patch
384		if (state->m_kb_region_sequence_position < 11)
	379	if (m_kb_region_sequence_position < 11)
385	380	{
386		ret = kb_region_sequence[state->m_kb_region_sequence_position];
387		state->m_kb_region_sequence_position++;
	381	ret = kb_region_sequence[m_kb_region_sequence_position];
	382	m_kb_region_sequence_position++;
388	383	}
389	384	else
390	385	{
391		UINT32 protvalue = 0x89911400 | space.machine().root_device().ioport("Region")->read();
392		ret = (protvalue >> (8 * (state->m_kb_ptr - 1))) & 0xff;
	386	UINT32 protvalue = 0x89911400 | ioport("Region")->read();
	387	ret = (protvalue >> (8 * (m_kb_ptr - 1))) & 0xff;
393	388	}
394	389
395	390	res = 0x3f00 | ret;  // always 0x3fxx in logged behavior...
396	391
397	392	}
398	393	}
399		logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space.device().safe_pc(), state->m_kb_cmd, res);
	394	logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space.device().safe_pc(), m_kb_cmd, res);
400	395	return res;
401	396	}
402	397
r21060	r21061
407	402	{
408	403	MACHINE_RESET_CALL_MEMBER(pgm);
409	404	/* fill the protection ram with a5 + auto dma */
410		IGS022_reset(machine());
	405	IGS022_reset();
411	406
412	407	// Reset IGS025 stuff
413	408	m_kb_cmd = 0;
r21060	r21061
423	418
424	419	DRIVER_INIT_MEMBER(pgm_022_025_state,killbld)
425	420	{
426		pgm_basic_init(machine());
427		pgm_killbld_decrypt(machine());
	421	pgm_basic_init();
	422	pgm_killbld_decrypt();
428	423
429		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xd40000, 0xd40003, FUNC(killbld_igs025_prot_r), FUNC(killbld_igs025_prot_w));
	424	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xd40000, 0xd40003, read16_delegate(FUNC(pgm_022_025_state::killbld_igs025_prot_r),this), write16_delegate(FUNC(pgm_022_025_state::killbld_igs025_prot_w),this));
430	425
431	426	m_kb_cmd = 0;
432	427	m_kb_reg = 0;
r21060	r21061
445	440	{
446	441	MACHINE_RESET_CALL_MEMBER(pgm);
447	442	/* fill the protection ram with a5 + auto dma */
448		IGS022_reset(machine());
	443	IGS022_reset();
449	444
450	445	/* game won't boot unless various values are in protection RAM
451	446	- these should almost certainly end up there as the result of executing the protection
r21060	r21061
495	490
496	491
497	492
498		static int reg;
499		static int ptr=0;
500
501	493	#define DW3BITSWAP(s,d,bs,bd)  d=((d&(~(1<<bd)))|(((s>>bs)&1)<<bd))
502		static UINT8 dw3_swap;
503		static WRITE16_HANDLER( drgw3_igs025_prot_w )
504		{
505		pgm_022_025_state *state = space.machine().driver_data<pgm_022_025_state>();
506	494
	495	WRITE16_MEMBER(pgm_022_025_state::drgw3_igs025_prot_w )
	496	{
507	497	offset&=0xf;
508	498
509	499	if(offset==0)
510		state->m_kb_cmd=data;
	500	m_kb_cmd=data;
511	501	else //offset==2
512	502	{
513		printf("%06X: ASIC25 W CMD %X  VAL %X\n",space.device().safe_pc(),state->m_kb_cmd,data);
514		if(state->m_kb_cmd==0)
	503	printf("%06X: ASIC25 W CMD %X  VAL %X\n",space.device().safe_pc(),m_kb_cmd,data);
	504	if(m_kb_cmd==0)
515	505	reg=data;
516		else if(state->m_kb_cmd==3) //??????????
	506	else if(m_kb_cmd==3) //??????????
517	507	{
518	508	dw3_swap = data;
519	509
r21060	r21061
521	511	}
522	512	//else if(kb_cmd==4)
523	513	//  ptr=data;
524		else if(state->m_kb_cmd==0x20)
	514	else if(m_kb_cmd==0x20)
525	515	ptr++;
526	516	}
527	517	}
528	518
529		static READ16_HANDLER( drgw3_igs025_prot_r )
	519	READ16_MEMBER(pgm_022_025_state::drgw3_igs025_prot_r )
530	520	{
531		//  mame_printf_debug("killbld prot w\n");
532		pgm_022_025_state *state = space.machine().driver_data<pgm_022_025_state>();
533
	521	//  mame_printf_debug("killbld prot w\n");
534	522	UINT16 res ;
535	523
536	524	offset&=0xf;
r21060	r21061
538	526
539	527	if(offset==1)
540	528	{
541		if(state->m_kb_cmd==0)  //swap
	529	if(m_kb_cmd==0)  //swap
542	530	{
543	531	UINT8 v1=(dw3_swap+1)&0x7F;
544	532	UINT8 v2=0;
r21060	r21061
554	542	res=v2;
555	543
556	544	}
557		else if(state->m_kb_cmd==1)
	545	else if(m_kb_cmd==1)
558	546	{
559	547	res=reg&0x7f;
560	548	}
561		else if(state->m_kb_cmd==5)
	549	else if(m_kb_cmd==5)
562	550	{
563	551	UINT32 protvalue;
564		protvalue = 0x60000|space.machine().root_device().ioport("Region")->read();
	552	protvalue = 0x60000|ioport("Region")->read();
565	553	res=(protvalue>>(8*(ptr-1)))&0xff;
566	554
567	555
568	556	}
569	557	}
570		logerror("%06X: ASIC25 R CMD %X  VAL %X\n",space.device().safe_pc(),state->m_kb_cmd,res);
	558	logerror("%06X: ASIC25 R CMD %X  VAL %X\n",space.device().safe_pc(),m_kb_cmd,res);
571	559	return res;
572	560	}
573	561
574	562
575	563	DRIVER_INIT_MEMBER(pgm_022_025_state,drgw3)
576	564	{
577		pgm_basic_init(machine());
578
	565	pgm_basic_init();
	566	ptr = 0;
579	567	/*
580	568	{
581	569	int x;
r21060	r21061
587	575	}
588	576	}
589	577	*/
590		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xDA5610, 0xDA5613, FUNC(drgw3_igs025_prot_r), FUNC(drgw3_igs025_prot_w));
	578	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xDA5610, 0xDA5613, read16_delegate(FUNC(pgm_022_025_state::drgw3_igs025_prot_r),this), write16_delegate(FUNC(pgm_022_025_state::drgw3_igs025_prot_w),this));
591	579
592		pgm_dw3_decrypt(machine());
	580	pgm_dw3_decrypt();
593	581	}
594	582
595	583

trunk/src/mame/machine/pgmprot5.c

r21060	r21061
26	26
27	27	/* Dragon World 2 */
28	28
29		static int protection_address;
30
31		static UINT16 dw2_asic_reg[2];
32		static UINT8 dw2_asic_z;
33		static UINT8 dw2_asic_y;
34		static UINT16 dw2_asic_hold;
35
36		READ16_HANDLER( dw2_d80000_r )
	29	READ16_MEMBER(pgm_state::dw2_d80000_r )
37	30	{
38		//  pgm_state *state = space.machine().driver_data<pgm_state>();
39	31	UINT16 ret;
40	32	/*  UINT16 test;
41	33
r21060	r21061
54	46	logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), dw2_asic_reg[0]);
55	47	}
56	48
57		test = BITSWAP16(state->m_mainram[protection_address], 14,11,8,6,4,3,1,0, 5,2,9,7,10,13,12,15) & 0xff; // original hack
	49	test = BITSWAP16(m_mainram[protection_address], 14,11,8,6,4,3,1,0, 5,2,9,7,10,13,12,15) & 0xff; // original hack
58	50	*/
59	51	// This bitswap seems to also be common to a few IGS protection devices (igs011.c, Oriental Legend)
60	52	ret = BITSWAP16(dw2_asic_hold, 14,11,8,6,4,3,1,0, 5,2,9,7,10,13,12,15) & 0xff;
61	53	/*
62		if ((ret != test) || (dw2_asic_hold != state->m_mainram[protection_address])) {
63		logerror ("Protection calculation error: SIMRET: %2.2x, HACKRET: %2.2x, SIMHOLD: %4.4x, REALHOLD: %4.4x\n", ret, test, dw2_asic_hold, state->m_mainram[protection_address]);
	54	if ((ret != test) || (dw2_asic_hold != m_mainram[protection_address])) {
	55	logerror ("Protection calculation error: SIMRET: %2.2x, HACKRET: %2.2x, SIMHOLD: %4.4x, REALHOLD: %4.4x\n", ret, test, dw2_asic_hold, m_mainram[protection_address]);
64	56	}
65	57	*/
66	58	return ret;
67	59	}
68	60
69		WRITE16_HANDLER( dw2_d80000_w )
	61	WRITE16_MEMBER(pgm_state::dw2_d80000_w )
70	62	{
71		pgm_state *state = space.machine().driver_data<pgm_state>();
72
73	63	COMBINE_DATA(&dw2_asic_reg[offset]);
74	64
75	65	if (offset == 0)
r21060	r21061
82	72	// initialized. Ok to use as reset??
83	73	// The last "hold" value used is stored in NVRAM. Otherwise we either
84	74	// need to set the "hold" value as non-volatile or wipe NVRAM.
85		dw2_asic_hold = state->m_mainram[protection_address]; // hack
	75	dw2_asic_hold = m_mainram[protection_address]; // hack
86	76	break;
87	77
88	78	case 0x09: // Used only on init...
r21060	r21061
155	145	}
156	146
157	147	// What purpose to writes to this region serve? Written, but never read back? Must be related to the protection device?
158		WRITE16_HANDLER(dw2_unk_w)
	148	WRITE16_MEMBER(pgm_state::dw2_unk_w)
159	149	{
160	150	//  logerror("%06x: warning, writing to address %6.6x = %4.4x\n", space.device().safe_pc(), 0xd00000+(offset*2), data);
161	151	}
162	152
163		static void pgm_dw2_decrypt(running_machine &machine)
	153	void pgm_state::pgm_dw2_decrypt()
164	154	{
165	155	int i;
166		UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
	156	UINT16 *src = (UINT16 *) (memregion("maincpu")->base()+0x100000);
167	157
168	158	int rom_size = 0x80000;
169	159
r21060	r21061
180	170	}
181	171	}
182	172
183		static void drgwld2_common_init(running_machine &machine)
	173	void pgm_state::drgwld2_common_init()
184	174	{
185		pgm_basic_init(machine);
186		pgm_dw2_decrypt(machine);
	175	pgm_basic_init();
	176	pgm_dw2_decrypt();
187	177
188		machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0xd80000, 0xd80003, FUNC(dw2_d80000_r));
189		machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0xd80000, 0xd80003, FUNC(dw2_d80000_w));
190		machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0xd00000, 0xd00fff, FUNC(dw2_unk_w));
	178	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0xd80000, 0xd80003, read16_delegate(FUNC(pgm_state::dw2_d80000_r),this));
	179	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0xd80000, 0xd80003, write16_delegate(FUNC(pgm_state::dw2_d80000_w),this));
	180	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0xd00000, 0xd00fff, write16_delegate(FUNC(pgm_state::dw2_unk_w),this));
191	181	}
192	182
193	183	DRIVER_INIT_MEMBER(pgm_state,drgw2)
194	184	{
195	185	/* incomplete? */
196		UINT16 *mem16 = (UINT16 *)machine().root_device().memregion("maincpu")->base();
	186	UINT16 *mem16 = (UINT16 *)memregion("maincpu")->base();
197	187
198		drgwld2_common_init(machine());
	188	drgwld2_common_init();
199	189
200	190	protection_address = 0xcb7e/2; // $80cb7e;
201	191
r21060	r21061
209	199
210	200	DRIVER_INIT_MEMBER(pgm_state,dw2v100x)
211	201	{
212		UINT16 *mem16 = (UINT16 *)machine().root_device().memregion("maincpu")->base();
	202	UINT16 *mem16 = (UINT16 *)memregion("maincpu")->base();
213	203
214		drgwld2_common_init(machine());
	204	drgwld2_common_init();
215	205
216	206	protection_address = 0xcb7e/2; // $80cb7e;
217	207
r21060	r21061
225	215
226	216	DRIVER_INIT_MEMBER(pgm_state,drgw2c)
227	217	{
228		UINT16 *mem16 = (UINT16 *)machine().root_device().memregion("maincpu")->base();
	218	UINT16 *mem16 = (UINT16 *)memregion("maincpu")->base();
229	219
230		drgwld2_common_init(machine());
	220	drgwld2_common_init();
231	221
232	222	protection_address = 0xeece/2; // $80eece;
233	223
r21060	r21061
241	231
242	232	DRIVER_INIT_MEMBER(pgm_state,drgw2j)
243	233	{
244		UINT16 *mem16 = (UINT16 *)machine().root_device().memregion("maincpu")->base();
	234	UINT16 *mem16 = (UINT16 *)memregion("maincpu")->base();
245	235
246		drgwld2_common_init(machine());
	236	drgwld2_common_init();
247	237
248	238	protection_address = 0x91cc/2; // $8091cc;
249	239

trunk/src/mame/machine/pgmprot6.c

r21060	r21061
20	20	#include "emu.h"
21	21	#include "includes/pgm.h"
22	22
23		static UINT32 olds_prot_addr( UINT16 addr )
	23	UINT32 pgm_028_025_state::olds_prot_addr( UINT16 addr )
24	24	{
25	25	UINT32 mode = addr & 0xff;
26	26	UINT32 offset = addr >> 8;
r21060	r21061
69	69	return realaddr;
70	70	}
71	71
72		static UINT32 olds_read_reg( running_machine &machine, UINT16 addr )
	72	UINT32 pgm_028_025_state::olds_read_reg(UINT16 addr )
73	73	{
74		pgm_028_025_state *state = machine.driver_data<pgm_028_025_state>();
75	74	UINT32 protaddr = (olds_prot_addr(addr) - 0x400000) / 2;
76		return state->m_sharedprotram[protaddr] << 16 | state->m_sharedprotram[protaddr + 1];
	75	return m_sharedprotram[protaddr] << 16 | m_sharedprotram[protaddr + 1];
77	76	}
78	77
79		static void olds_write_reg( running_machine &machine, UINT16 addr, UINT32 val )
	78	void pgm_028_025_state::olds_write_reg( UINT16 addr, UINT32 val )
80	79	{
81		pgm_028_025_state *state = machine.driver_data<pgm_028_025_state>();
82		state->m_sharedprotram[(olds_prot_addr(addr) - 0x400000) / 2]     = val >> 16;
83		state->m_sharedprotram[(olds_prot_addr(addr) - 0x400000) / 2 + 1] = val & 0xffff;
	80	m_sharedprotram[(olds_prot_addr(addr) - 0x400000) / 2]     = val >> 16;
	81	m_sharedprotram[(olds_prot_addr(addr) - 0x400000) / 2 + 1] = val & 0xffff;
84	82	}
85	83
86	84	MACHINE_RESET_MEMBER(pgm_028_025_state,olds)
r21060	r21061
104	102	}
105	103	}
106	104
107		static READ16_HANDLER( olds_r )
	105	READ16_MEMBER(pgm_028_025_state::olds_r )
108	106	{
109		pgm_028_025_state *state = space.machine().driver_data<pgm_028_025_state>();
110	107	UINT16 res = 0;
111	108
112	109	if (offset == 1)
113	110	{
114		if (state->m_kb_cmd == 1)
115		res = state->m_kb_reg & 0x7f;
116		if (state->m_kb_cmd == 2)
117		res = state->m_olds_bs | 0x80;
118		if (state->m_kb_cmd == 3)
119		res = state->m_olds_cmd3;
120		else if (state->m_kb_cmd == 5)
	111	if (m_kb_cmd == 1)
	112	res = m_kb_reg & 0x7f;
	113	if (m_kb_cmd == 2)
	114	res = m_olds_bs | 0x80;
	115	if (m_kb_cmd == 3)
	116	res = m_olds_cmd3;
	117	else if (m_kb_cmd == 5)
121	118	{
122		UINT32 protvalue = 0x900000 | state->ioport("Region")->read(); // region from protection device.
123		res = (protvalue >> (8 * (state->m_kb_ptr - 1))) & 0xff; // includes region 1 = taiwan , 2 = china, 3 = japan (title = orlegend special), 4 = korea, 5 = hongkong, 6 = world
	119	UINT32 protvalue = 0x900000 | ioport("Region")->read(); // region from protection device.
	120	res = (protvalue >> (8 * (m_kb_ptr - 1))) & 0xff; // includes region 1 = taiwan , 2 = china, 3 = japan (title = orlegend special), 4 = korea, 5 = hongkong, 6 = world
124	121
125	122	}
126	123	}
127		logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space.device().safe_pc(), state->m_kb_cmd, res);
	124	logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space.device().safe_pc(), m_kb_cmd, res);
128	125	return res;
129	126	}
130	127
131		static WRITE16_HANDLER( olds_w )
	128	WRITE16_MEMBER(pgm_028_025_state::olds_w )
132	129	{
133		pgm_028_025_state *state = space.machine().driver_data<pgm_028_025_state>();
134	130	if (offset == 0)
135		state->m_kb_cmd = data;
	131	m_kb_cmd = data;
136	132	else //offset==2
137	133	{
138		logerror("%06X: ASIC25 W CMD %X  VAL %X\n",space.device().safe_pc(), state->m_kb_cmd, data);
139		if (state->m_kb_cmd == 0)
140		state->m_kb_reg = data;
141		else if(state->m_kb_cmd == 2)   //a bitswap=
	134	logerror("%06X: ASIC25 W CMD %X  VAL %X\n",space.device().safe_pc(), m_kb_cmd, data);
	135	if (m_kb_cmd == 0)
	136	m_kb_reg = data;
	137	else if(m_kb_cmd == 2)   //a bitswap=
142	138	{
143	139	int reg = 0;
144	140	if (data & 0x01)
r21060	r21061
149	145	reg |= 0x20;
150	146	if (data & 0x08)
151	147	reg |= 0x10;
152		state->m_olds_bs = reg;
	148	m_olds_bs = reg;
153	149	}
154		else if (state->m_kb_cmd == 3)
	150	else if (m_kb_cmd == 3)
155	151	{
156		UINT16 cmd = state->m_sharedprotram[0x3026 / 2];
	152	UINT16 cmd = m_sharedprotram[0x3026 / 2];
157	153	switch (cmd)
158	154	{
159	155	case 0x11:
r21060	r21061
161	157	break;
162	158	case 0x64:
163	159	{
164		UINT16 cmd0 = state->m_sharedprotram[0x3082 / 2];
165		UINT16 val0 = state->m_sharedprotram[0x3050 / 2];   //CMD_FORMAT
	160	UINT16 cmd0 = m_sharedprotram[0x3082 / 2];
	161	UINT16 val0 = m_sharedprotram[0x3050 / 2];   //CMD_FORMAT
166	162	{
167	163	if ((cmd0 & 0xff) == 0x2)
168		olds_write_reg(space.machine(), val0, olds_read_reg(space.machine(), val0) + 0x10000);
	164	olds_write_reg(val0, olds_read_reg(val0) + 0x10000);
169	165	}
170	166	break;
171	167	}
r21060	r21061
173	169	default:
174	170	break;
175	171	}
176		state->m_olds_cmd3 = ((data >> 4) + 1) & 0x3;
	172	m_olds_cmd3 = ((data >> 4) + 1) & 0x3;
177	173	}
178		else if (state->m_kb_cmd == 4)
179		state->m_kb_ptr = data;
180		else if(state->m_kb_cmd == 0x20)
181		state->m_kb_ptr++;
	174	else if (m_kb_cmd == 4)
	175	m_kb_ptr = data;
	176	else if(m_kb_cmd == 0x20)
	177	m_kb_ptr++;
182	178	}
183	179	}
184	180
185		static READ16_HANDLER( olds_prot_swap_r )
	181	READ16_MEMBER(pgm_028_025_state::olds_prot_swap_r )
186	182	{
187		pgm_state *state = space.machine().driver_data<pgm_state>();
188	183	if (space.device().safe_pc() < 0x100000)        //bios
189		return state->m_mainram[0x178f4 / 2];
	184	return m_mainram[0x178f4 / 2];
190	185	else                        //game
191		return state->m_mainram[0x178d8 / 2];
	186	return m_mainram[0x178d8 / 2];
192	187
193	188	}
194	189
195	190	DRIVER_INIT_MEMBER(pgm_028_025_state,olds)
196	191	{
197		pgm_basic_init(machine());
	192	pgm_basic_init();
198	193
199		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xdcb400, 0xdcb403, FUNC(olds_r), FUNC(olds_w));
200		machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x8178f4, 0x8178f5, FUNC(olds_prot_swap_r));
	194	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xdcb400, 0xdcb403, read16_delegate(FUNC(pgm_028_025_state::olds_r),this), write16_delegate(FUNC(pgm_028_025_state::olds_w),this));
	195	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x8178f4, 0x8178f5, read16_delegate(FUNC(pgm_028_025_state::olds_prot_swap_r),this));
201	196
202	197	m_kb_cmd = 0;
203	198	m_kb_reg = 0;

trunk/src/mame/includes/pgm.h

r21060	r21061
119	119	UINT32 screen_update_pgm(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
120	120	void screen_eof_pgm(screen_device &screen, bool state);
121	121	TIMER_DEVICE_CALLBACK_MEMBER(pgm_interrupt);
	122
	123	// from pgmprot5.c
	124	int protection_address;
	125
	126	UINT16 dw2_asic_reg[2];
	127	UINT8 dw2_asic_z;
	128	UINT8 dw2_asic_y;
	129	UINT16 dw2_asic_hold;
	130
	131	DECLARE_READ16_MEMBER( dw2_d80000_r );
	132	DECLARE_WRITE16_MEMBER( dw2_d80000_w );
	133	DECLARE_WRITE16_MEMBER(dw2_unk_w);
	134	void pgm_dw2_decrypt();
	135	void drgwld2_common_init();
	136	inline void pgm_draw_pix( int xdrawpos, int pri, UINT16* dest, UINT8* destpri, UINT16 srcdat);
	137	inline void pgm_draw_pix_nopri( int xdrawpos, UINT16* dest, UINT8* destpri, UINT16 srcdat);
	138	inline void pgm_draw_pix_pri( int xdrawpos, UINT16* dest, UINT8* destpri, UINT16 srcdat);
	139	void draw_sprite_line( int wide, UINT16* dest, UINT8* destpri, int xzoom, int xgrow, int flip, int xpos, int pri, int realxsize, int palt, int draw );
	140	void draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, UINT32 xzoom, int xgrow, UINT32 yzoom, int ygrow, int pri );
	141	void draw_sprite_line_basic( int wide, UINT16* dest, UINT8* destpri, int flip, int xpos, int pri, int realxsize, int palt, int draw );
	142	void draw_sprite_new_basic( int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, int pri );
	143	void draw_sprites( bitmap_ind16& spritebitmap, UINT16 *sprite_source, bitmap_ind8& priority_bitmap );
	144	void expand_32x32x5bpp();
	145	void expand_colourdata(  );
	146	void pgm_basic_init( bool set_bank = true);
122	147	};
123	148
124	149
r21060	r21061
141	166	UINT16        m_asic3_hold;
142	167
143	168	DECLARE_DRIVER_INIT(orlegend);
	169	void asic3_compute_hold();
	170	DECLARE_READ16_MEMBER( pgm_asic3_r );
	171	DECLARE_WRITE16_MEMBER( pgm_asic3_w );
	172	DECLARE_WRITE16_MEMBER( pgm_asic3_reg_w );
144	173	};
145	174
146	175
r21060	r21061
175	204	// puzzli2
176	205	INT32 m_puzzli_54_trigger;
177	206
178		typedef void (*pgm_arm_sim_command_handler)(pgm_arm_type1_state *state, int pc);
	207	typedef void (pgm_arm_type1_state::*pgm_arm_sim_command_handler)(int pc);
179	208
180	209	pgm_arm_sim_command_handler arm_sim_handler;
181	210
r21060	r21061
206	235	DECLARE_DRIVER_INIT(kovboot);
207	236	DECLARE_DRIVER_INIT(oldsplus);
208	237	DECLARE_MACHINE_START(pgm_arm_type1);
	238
	239	DECLARE_READ32_MEMBER( pgm_arm7_type1_protlatch_r );
	240	DECLARE_WRITE32_MEMBER( pgm_arm7_type1_protlatch_w );
	241	DECLARE_READ16_MEMBER( pgm_arm7_type1_68k_protlatch_r );
	242	DECLARE_WRITE16_MEMBER( pgm_arm7_type1_68k_protlatch_w );
	243	DECLARE_READ16_MEMBER( pgm_arm7_type1_ram_r );
	244	DECLARE_WRITE16_MEMBER( pgm_arm7_type1_ram_w );
	245	DECLARE_READ32_MEMBER( pgm_arm7_type1_unk_r );
	246	DECLARE_READ32_MEMBER( pgm_arm7_type1_exrom_r );
	247	DECLARE_READ32_MEMBER( pgm_arm7_type1_shareram_r );
	248	DECLARE_WRITE32_MEMBER( pgm_arm7_type1_shareram_w );
	249	void pgm_arm7_type1_latch_init();
	250	DECLARE_READ16_MEMBER( kovsh_fake_region_r );
	251	DECLARE_WRITE16_MEMBER( kovshp_asic27a_write_word );
	252	void pgm_decode_kovlsqh2_tiles();
	253	void pgm_decode_kovlsqh2_sprites(UINT8 *src );
	254	void pgm_decode_kovlsqh2_samples();
	255	void pgm_decode_kovqhsgs_program();
	256	void pgm_decode_kovqhsgs2_program();
	257	DECLARE_READ16_MEMBER( pgm_arm7_type1_sim_r );
	258	void command_handler_ddp3(int pc);
	259	void command_handler_puzzli2(int pc);
	260	void command_handler_py2k2(int pc);
	261	void command_handler_pstars(int pc);
	262	void command_handler_kov(int pc);
	263	void command_handler_oldsplus(int pc);
	264	DECLARE_WRITE16_MEMBER( pgm_arm7_type1_sim_w );
	265	DECLARE_READ16_MEMBER( pgm_arm7_type1_sim_protram_r );
	266	DECLARE_READ16_MEMBER( pstars_arm7_type1_sim_protram_r );
209	267	};
210	268
211	269	/* for machine/pgmprot2.c type games */
r21060	r21061
233	291	DECLARE_DRIVER_INIT(dw2001);
234	292	DECLARE_DRIVER_INIT(dwpc);
235	293	DECLARE_MACHINE_START(pgm_arm_type2);
	294	DECLARE_READ32_MEMBER( arm7_latch_arm_r );
	295	DECLARE_WRITE32_MEMBER( arm7_latch_arm_w );
	296	DECLARE_READ32_MEMBER( arm7_shareram_r );
	297	DECLARE_WRITE32_MEMBER( arm7_shareram_w );
	298	DECLARE_READ16_MEMBER( arm7_latch_68k_r );
	299	DECLARE_WRITE16_MEMBER( arm7_latch_68k_w );
	300	DECLARE_READ16_MEMBER( arm7_ram_r );
	301	DECLARE_WRITE16_MEMBER( arm7_ram_w );
	302	void kov2_latch_init();
	303	DECLARE_WRITE32_MEMBER( martmast_arm_region_w );
	304	DECLARE_WRITE32_MEMBER( kov2_arm_region_w );
	305	DECLARE_WRITE32_MEMBER( ddp2_arm_region_w );
	306	DECLARE_READ32_MEMBER( ddp2_speedup_r );
	307	DECLARE_READ16_MEMBER( ddp2_main_speedup_r );
236	308	};
237	309
238	310
r21060	r21061
262	334	DECLARE_DRIVER_INIT(dmnfrnt);
263	335	DECLARE_DRIVER_INIT(happy6);
264	336	DECLARE_MACHINE_START(pgm_arm_type3);
	337	DECLARE_WRITE32_MEMBER( svg_arm7_ram_sel_w );
	338	DECLARE_READ32_MEMBER( svg_arm7_shareram_r );
	339	DECLARE_WRITE32_MEMBER( svg_arm7_shareram_w );
	340	DECLARE_READ16_MEMBER( svg_m68k_ram_r );
	341	DECLARE_WRITE16_MEMBER( svg_m68k_ram_w );
	342	DECLARE_READ16_MEMBER( svg_68k_nmi_r );
	343	DECLARE_WRITE16_MEMBER( svg_68k_nmi_w );
	344	DECLARE_WRITE16_MEMBER( svg_latch_68k_w );
	345	DECLARE_READ16_MEMBER( svg_latch_68k_r );
	346	DECLARE_READ32_MEMBER( svg_latch_arm_r );
	347	DECLARE_WRITE32_MEMBER( svg_latch_arm_w );
	348	void svg_basic_init();
	349	void pgm_create_dummy_internal_arm_region();
	350	void svg_latch_init();
	351	DECLARE_READ32_MEMBER( dmnfrnt_speedup_r );
	352	DECLARE_READ16_MEMBER( dmnfrnt_main_speedup_r );
265	353	};
266	354
267	355
r21060	r21061
278	366	int           m_kb_ptr;
279	367	int           m_kb_region_sequence_position;
280	368	UINT32        m_kb_regs[0x10];
	369	int         reg;
	370	int         ptr;
	371	UINT8         dw3_swap;
281	372	required_shared_ptr<UINT16> m_sharedprotram;
282	373
283	374	DECLARE_DRIVER_INIT(killbld);
284	375	DECLARE_DRIVER_INIT(drgw3);
285	376	DECLARE_MACHINE_RESET(killbld);
286	377	DECLARE_MACHINE_RESET(dw3);
	378	void pgm_dw3_decrypt();
	379	void pgm_killbld_decrypt();
	380	void IGS022_do_dma(UINT16 src, UINT16 dst, UINT16 size, UINT16 mode);
	381	void IGS022_reset();
	382	void IGS022_handle_command();
	383	DECLARE_WRITE16_MEMBER( killbld_igs025_prot_w );
	384	DECLARE_READ16_MEMBER( killbld_igs025_prot_r );
	385	DECLARE_WRITE16_MEMBER( drgw3_igs025_prot_w );
	386	DECLARE_READ16_MEMBER( drgw3_igs025_prot_r );
287	387	};
288	388
289	389	/* for machine/pgmprot6.c type games */
r21060	r21061
304	404
305	405	DECLARE_DRIVER_INIT(olds);
306	406	DECLARE_MACHINE_RESET(olds);
	407
	408	UINT32 olds_prot_addr( UINT16 addr );
	409	UINT32 olds_read_reg( UINT16 addr );
	410	void olds_write_reg( UINT16 addr, UINT32 val );
	411	DECLARE_READ16_MEMBER( olds_r );
	412	DECLARE_WRITE16_MEMBER( olds_w );
	413	DECLARE_READ16_MEMBER( olds_prot_swap_r );
307	414	};
308	415
309	416
r21060	r21061
311	418
312	419	/*----------- defined in drivers/pgm.c -----------*/
313	420
314		void pgm_basic_init( running_machine &machine, bool set_bank  = true );
315
316	421	INPUT_PORTS_EXTERN( pgm );
317	422
318	423	GFXDECODE_EXTERN( pgm );

trunk/src/mame/video/pgm.c

r21060	r21061
16	16	// bg pri is 2
17	17	// sprite already here is 1 / 3
18	18
19		INLINE void pgm_draw_pix( int xdrawpos, int pri, UINT16* dest, UINT8* destpri, UINT16 srcdat)
	19	inline void pgm_state::pgm_draw_pix( int xdrawpos, int pri, UINT16* dest, UINT8* destpri, UINT16 srcdat)
20	20	{
21	21	if ((xdrawpos >= 0) && (xdrawpos < 448))
22	22	{
r21060	r21061
39	39	}
40	40	}
41	41
42		INLINE void pgm_draw_pix_nopri( int xdrawpos, UINT16* dest, UINT8* destpri, UINT16 srcdat)
	42	inline void pgm_state::pgm_draw_pix_nopri( int xdrawpos, UINT16* dest, UINT8* destpri, UINT16 srcdat)
43	43	{
44	44	if ((xdrawpos >= 0) && (xdrawpos < 448))
45	45	{
r21060	r21061
51	51	}
52	52	}
53	53
54		INLINE void pgm_draw_pix_pri( int xdrawpos, UINT16* dest, UINT8* destpri, UINT16 srcdat)
	54	inline void pgm_state::pgm_draw_pix_pri( int xdrawpos, UINT16* dest, UINT8* destpri, UINT16 srcdat)
55	55	{
56	56	if ((xdrawpos >= 0) && (xdrawpos < 448))
57	57	{
r21060	r21061
71	71	for complex zoomed cases
72	72	*************************************************************************/
73	73
74		static void draw_sprite_line( running_machine &machine, int wide, UINT16* dest, UINT8* destpri, int xzoom, int xgrow, int flip, int xpos, int pri, int realxsize, int palt, int draw )
	74	void pgm_state::draw_sprite_line( int wide, UINT16* dest, UINT8* destpri, int xzoom, int xgrow, int flip, int xpos, int pri, int realxsize, int palt, int draw )
75	75	{
76		pgm_state *state = machine.driver_data<pgm_state>();
77	76	int xcnt,xcntdraw;
78	77	int xzoombit;
79	78	int xoffset = 0;
80	79	int xdrawpos = 0;
81	80
82		UINT8 *adata = state->m_sprite_a_region;
83		size_t  adatasize = state->m_sprite_a_region_size - 1;
	81	UINT8 *adata = m_sprite_a_region;
	82	size_t  adatasize = m_sprite_a_region_size - 1;
84	83
85	84	UINT16 msk;
86	85	UINT16 srcdat;
r21060	r21061
92	91	{
93	92	int x;
94	93
95		msk = ((state->m_bdata[(state->m_boffset + 1) & state->m_bdatasize] << 8) |( state->m_bdata[(state->m_boffset + 0) & state->m_bdatasize] << 0));
	94	msk = ((m_bdata[(m_boffset + 1) & m_bdatasize] << 8) |( m_bdata[(m_boffset + 0) & m_bdatasize] << 0));
96	95
97	96	for (x = 0; x < 16; x++)
98	97	{
99	98	if (!(msk & 0x0001))
100	99	{
101		srcdat = adata[state->m_aoffset & adatasize] + palt * 32;
102		state->m_aoffset++;
	100	srcdat = adata[m_aoffset & adatasize] + palt * 32;
	101	m_aoffset++;
103	102
104	103	if (draw)
105	104	{
r21060	r21061
159	158
160	159	}
161	160
162		state->m_boffset += 2;
	161	m_boffset += 2;
163	162	}
164	163	}
165	164
166		static void draw_sprite_new_zoomed( pgm_state *state, running_machine &machine, int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, UINT32 xzoom, int xgrow, UINT32 yzoom, int ygrow, int pri )
	165	void pgm_state::draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, UINT32 xzoom, int xgrow, UINT32 yzoom, int ygrow, int pri )
167	166	{
168	167	int ycnt;
169	168	int ydrawpos;
r21060	r21061
175	174	int xcnt = 0;
176	175
177	176
178		state->m_aoffset = (state->m_bdata[(state->m_boffset + 3) & state->m_bdatasize] << 24) | (state->m_bdata[(state->m_boffset + 2) & state->m_bdatasize] << 16) |
179		(state->m_bdata[(state->m_boffset + 1) & state->m_bdatasize] << 8) | (state->m_bdata[(state->m_boffset + 0) & state->m_bdatasize] << 0);
180		state->m_aoffset = state->m_aoffset >> 2; state->m_aoffset *= 3;
	177	m_aoffset = (m_bdata[(m_boffset + 3) & m_bdatasize] << 24) | (m_bdata[(m_boffset + 2) & m_bdatasize] << 16) |
	178	(m_bdata[(m_boffset + 1) & m_bdatasize] << 8) | (m_bdata[(m_boffset + 0) & m_bdatasize] << 0);
	179	m_aoffset = m_aoffset >> 2; m_aoffset *= 3;
181	180
182		state->m_boffset+=4;
	181	m_boffset+=4;
183	182
184	183	/* precalculate where drawing will end, for flipped zoomed cases. */
185	184	/* if we're to avoid pre-decoding the data for each sprite each time we draw then we have to draw the sprite data
r21060	r21061
224	223
225	224	if (yzoombit == 1 && ygrow == 1) // double this line
226	225	{
227		int temp_aoffset = state->m_aoffset;
228		int temp_boffset = state->m_boffset;
	226	int temp_aoffset = m_aoffset;
	227	int temp_boffset = m_boffset;
229	228
230	229	if (!(flip & 0x02))
231	230	ydrawpos = ypos + ycntdraw;
r21060	r21061
236	235	{
237	236	dest = &bitmap.pix16(ydrawpos);
238	237	destpri = &priority_bitmap.pix8(ydrawpos);
239		draw_sprite_line(machine, wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
	238	draw_sprite_line(wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
240	239	}
241	240	else
242	241	{
243		draw_sprite_line(machine, wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
	242	draw_sprite_line(wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
244	243	}
245	244
246	245	ycntdraw++;
247	246
248	247	// we need to draw this line again, so restore our pointers to previous values
249		state->m_aoffset = temp_aoffset;
250		state->m_boffset = temp_boffset;
	248	m_aoffset = temp_aoffset;
	249	m_boffset = temp_boffset;
251	250
252	251	if (!(flip & 0x02))
253	252	ydrawpos = ypos + ycntdraw;
r21060	r21061
258	257	{
259	258	dest = &bitmap.pix16(ydrawpos);
260	259	destpri = &priority_bitmap.pix8(ydrawpos);
261		draw_sprite_line(machine, wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
	260	draw_sprite_line(wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
262	261	}
263	262	else
264	263	{
265		draw_sprite_line(machine, wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
	264	draw_sprite_line(wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
266	265
267	266	if (!(flip & 0x02))
268	267	{
r21060	r21061
282	281	else if (yzoombit == 1 && ygrow == 0)
283	282	{
284	283	/* skip this line */
285		draw_sprite_line(machine, wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
	284	draw_sprite_line(wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
286	285	}
287	286	else /* normal line */
288	287	{
r21060	r21061
295	294	{
296	295	dest = &bitmap.pix16(ydrawpos);
297	296	destpri = &priority_bitmap.pix8(ydrawpos);
298		draw_sprite_line(machine, wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
	297	draw_sprite_line(wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
299	298	}
300	299	else
301	300	{
302		draw_sprite_line(machine, wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
	301	draw_sprite_line(wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
303	302
304	303	if (!(flip & 0x02))
305	304	{
r21060	r21061
322	321	}
323	322
324	323
325		static void draw_sprite_line_basic( running_machine &machine, int wide, UINT16* dest, UINT8* destpri, int flip, int xpos, int pri, int realxsize, int palt, int draw )
	324	void pgm_state::draw_sprite_line_basic( int wide, UINT16* dest, UINT8* destpri, int flip, int xpos, int pri, int realxsize, int palt, int draw )
326	325	{
327		pgm_state *state = machine.driver_data<pgm_state>();
328	326	int xcnt,xcntdraw;
329	327	int xoffset = 0;
330	328	int xdrawpos = 0;
331		UINT8 *adata = state->m_sprite_a_region;
332		size_t  adatasize = state->m_sprite_a_region_size - 1;
	329	UINT8 *adata = m_sprite_a_region;
	330	size_t  adatasize = m_sprite_a_region_size - 1;
333	331
334	332	UINT16 msk;
335	333	UINT16 srcdat;
r21060	r21061
343	341	{
344	342	int x;
345	343
346		msk = ((state->m_bdata[(state->m_boffset + 1) & state->m_bdatasize] << 8) |( state->m_bdata[(state->m_boffset + 0) & state->m_bdatasize] << 0));
	344	msk = ((m_bdata[(m_boffset + 1) & m_bdatasize] << 8) |( m_bdata[(m_boffset + 0) & m_bdatasize] << 0));
347	345
348	346	for (x = 0; x < 16; x++)
349	347	{
350	348	if (!(msk & 0x0001))
351	349	{
352		srcdat = adata[state->m_aoffset & adatasize] + palt * 32;
353		state->m_aoffset++;
	350	srcdat = adata[m_aoffset & adatasize] + palt * 32;
	351	m_aoffset++;
354	352
355	353	if (draw)
356	354	{
r21060	r21061
376	374	msk >>= 1;
377	375	}
378	376
379		state->m_boffset += 2;
	377	m_boffset += 2;
380	378	}
381	379	}
382	380	else
r21060	r21061
385	383	{
386	384	int x;
387	385
388		msk = ((state->m_bdata[(state->m_boffset + 1) & state->m_bdatasize] << 8) |( state->m_bdata[(state->m_boffset + 0) & state->m_bdatasize] << 0));
	386	msk = ((m_bdata[(m_boffset + 1) & m_bdatasize] << 8) |( m_bdata[(m_boffset + 0) & m_bdatasize] << 0));
389	387
390	388	for (x = 0; x < 16; x++)
391	389	{
392	390	if (!(msk & 0x0001))
393	391	{
394		srcdat = adata[state->m_aoffset & adatasize] + palt * 32;
395		state->m_aoffset++;
	392	srcdat = adata[m_aoffset & adatasize] + palt * 32;
	393	m_aoffset++;
396	394
397	395	if (draw)
398	396	{
r21060	r21061
418	416	msk >>= 1;
419	417	}
420	418
421		state->m_boffset += 2;
	419	m_boffset += 2;
422	420	}
423	421	}
424	422	}
r21060	r21061
428	426	simplified version for non-zoomed cases, a bit faster
429	427	*************************************************************************/
430	428
431		static void draw_sprite_new_basic( pgm_state *state, running_machine &machine, int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, int pri )
	429	void pgm_state::draw_sprite_new_basic( int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, int pri )
432	430	{
433	431	int ycnt;
434	432	int ydrawpos;
r21060	r21061
436	434	UINT8* destpri;
437	435	int ycntdraw;
438	436
439		state->m_aoffset = (state->m_bdata[(state->m_boffset + 3) & state->m_bdatasize] << 24) | (state->m_bdata[(state->m_boffset + 2) & state->m_bdatasize] << 16) |
440		(state->m_bdata[(state->m_boffset + 1) & state->m_bdatasize] << 8) | (state->m_bdata[(state->m_boffset + 0) & state->m_bdatasize] << 0);
441		state->m_aoffset = state->m_aoffset >> 2; state->m_aoffset *= 3;
	437	m_aoffset = (m_bdata[(m_boffset + 3) & m_bdatasize] << 24) | (m_bdata[(m_boffset + 2) & m_bdatasize] << 16) |
	438	(m_bdata[(m_boffset + 1) & m_bdatasize] << 8) | (m_bdata[(m_boffset + 0) & m_bdatasize] << 0);
	439	m_aoffset = m_aoffset >> 2; m_aoffset *= 3;
442	440
443		state->m_boffset+=4;
	441	m_boffset+=4;
444	442
445	443	int realysize = high-1;
446	444	int realxsize = (wide * 16)-1;
r21060	r21061
460	458	{
461	459	dest = &bitmap.pix16(ydrawpos);
462	460	destpri = &priority_bitmap.pix8(ydrawpos);
463		draw_sprite_line_basic(machine, wide, dest, destpri, flip, xpos, pri, realxsize, palt, 1);
	461	draw_sprite_line_basic(wide, dest, destpri, flip, xpos, pri, realxsize, palt, 1);
464	462	}
465	463	else
466	464	{
467		draw_sprite_line_basic(machine, wide, NULL, NULL, flip, xpos, pri, realxsize, palt, 0);
	465	draw_sprite_line_basic(wide, NULL, NULL, flip, xpos, pri, realxsize, palt, 0);
468	466
469	467	if (!(flip & 0x02))
470	468	{
r21060	r21061
484	482	}
485	483
486	484
487		static void draw_sprites( pgm_state *state, running_machine &machine, bitmap_ind16& spritebitmap, UINT16 *sprite_source, bitmap_ind8& priority_bitmap )
	485	void pgm_state::draw_sprites( bitmap_ind16& spritebitmap, UINT16 *sprite_source, bitmap_ind8& priority_bitmap )
488	486	{
489	487	/* ZZZZ Zxxx xxxx xxxx
490	488	zzzz z-yy yyyy yyyy
r21060	r21061
493	491	wwww wwwh hhhh hhhh
494	492	*/
495	493
496		const UINT16 *finish = state->m_spritebufferram + (0xa00 / 2);
	494	const UINT16 *finish = m_spritebufferram + (0xa00 / 2);
497	495
498	496	UINT16* start = sprite_source;
499	497
r21060	r21061
521	519
522	520	UINT32 xzoom, yzoom;
523	521
524		UINT16* sprite_zoomtable = &state->m_videoregs[0x1000 / 2];
	522	UINT16* sprite_zoomtable = &m_videoregs[0x1000 / 2];
525	523
526	524	if (xgrow)
527	525	{
r21060	r21061
544	542
545	543	//if ((priority == 1) && (pri == 0)) break;
546	544
547		state->m_boffset = boff;
548		if ((!xzoom) && (!yzoom)) draw_sprite_new_basic(state, machine, wide, high, xpos, ypos, palt, flip, spritebitmap, priority_bitmap, pri );
549		else draw_sprite_new_zoomed(state, machine, wide, high, xpos, ypos, palt, flip, spritebitmap, priority_bitmap, xzoom, xgrow, yzoom, ygrow, pri );
	545	m_boffset = boff;
	546	if ((!xzoom) && (!yzoom)) draw_sprite_new_basic(wide, high, xpos, ypos, palt, flip, spritebitmap, priority_bitmap, pri );
	547	else draw_sprite_new_zoomed(wide, high, xpos, ypos, palt, flip, spritebitmap, priority_bitmap, xzoom, xgrow, yzoom, ygrow, pri );
550	548
551	549	sprite_source -= 5;
552	550	}
r21060	r21061
650	648
651	649	m_bg_tilemap->draw(bitmap, cliprect, 0, 2);
652	650
653		draw_sprites(this, machine(), bitmap, m_spritebufferram, machine().priority_bitmap);
	651	draw_sprites(bitmap, m_spritebufferram, machine().priority_bitmap);
654	652
655	653	m_tx_tilemap->set_scrolly(0, m_videoregs[0x5000/2]);
656	654	m_tx_tilemap->set_scrollx(0, m_videoregs[0x6000/2]); // Check

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