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r21059 Thursday 14th February, 2013 at 10:36:12 UTC by Miodrag Milanović
Modernization of drivers part 25 (no whatsnew)

[src/mame/drivers]

cyclemb.c dwarfd.c halleys.c jalmah.c jangou.c kingdrby.c ksys573.c limenko.c meritm.c multigam.c namcos11.c namcos12.c namcos23.c nightgal.c nmg5.c peplus.c seattle.c sigmab98.c taitogn.c taitotz.c tmaster.c vegas.c viper.c zn.c

trunk/src/mame/drivers/jangou.c

r21058	r21059
91	91	DECLARE_MACHINE_RESET(common);
92	92	UINT32 screen_update_jangou(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
93	93	TIMER_CALLBACK_MEMBER(cvsd_bit_timer_callback);
	94	UINT8 jangou_gfx_nibble( UINT16 niboffset );
	95	void plot_jangou_gfx_pixel( UINT8 pix, int x, int y );
94	96	};
95	97
96	98
r21058	r21059
177	179	w [$17]
178	180	*/
179	181
180		static UINT8 jangou_gfx_nibble( running_machine &machine, UINT16 niboffset )
	182	UINT8 jangou_state::jangou_gfx_nibble( UINT16 niboffset )
181	183	{
182		const UINT8 *const blit_rom = machine.root_device().memregion("gfx")->base();
	184	const UINT8 *const blit_rom = memregion("gfx")->base();
183	185
184	186	if (niboffset & 1)
185	187	return (blit_rom[(niboffset >> 1) & 0xffff] & 0xf0) >> 4;
r21058	r21059
187	189	return (blit_rom[(niboffset >> 1) & 0xffff] & 0x0f);
188	190	}
189	191
190		static void plot_jangou_gfx_pixel( running_machine &machine, UINT8 pix, int x, int y )
	192	void jangou_state::plot_jangou_gfx_pixel( UINT8 pix, int x, int y )
191	193	{
192		jangou_state *state = machine.driver_data<jangou_state>();
193	194	if (y < 0 || y >= 512)
194	195	return;
195	196	if (x < 0 || x >= 512)
196	197	return;
197	198
198	199	if (x & 1)
199		state->m_blit_buffer[(y * 256) + (x >> 1)] = (state->m_blit_buffer[(y * 256) + (x >> 1)] & 0x0f) | ((pix << 4) & 0xf0);
	200	m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0x0f) | ((pix << 4) & 0xf0);
200	201	else
201		state->m_blit_buffer[(y * 256) + (x >> 1)] = (state->m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
	202	m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
202	203	}
203	204
204	205	WRITE8_MEMBER(jangou_state::blitter_process_w)
r21058	r21059
233	234	{
234	235	int drawx = (x + xcount) & 0xff;
235	236	int drawy = (y + ycount) & 0xff;
236		UINT8 dat = jangou_gfx_nibble(machine(), src + count);
	237	UINT8 dat = jangou_gfx_nibble(src + count);
237	238	UINT8 cur_pen_hi = m_pen_data[(dat & 0xf0) >> 4];
238	239	UINT8 cur_pen_lo = m_pen_data[(dat & 0x0f) >> 0];
239	240
240	241	dat = cur_pen_lo | (cur_pen_hi << 4);
241	242
242	243	if ((dat & 0xff) != 0)
243		plot_jangou_gfx_pixel(machine(), dat, drawx, drawy);
	244	plot_jangou_gfx_pixel(dat, drawx, drawy);
244	245
245	246	if (!flipx)
246	247	count--;

trunk/src/mame/drivers/limenko.c

r21058	r21059
88	88	TILE_GET_INFO_MEMBER(get_fg_tile_info);
89	89	virtual void video_start();
90	90	UINT32 screen_update_limenko(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	91	void draw_sprites(UINT32 *sprites, const rectangle &cliprect, int count);
	92	void copy_sprites(bitmap_ind16 &bitmap, bitmap_ind16 &sprites_bitmap, bitmap_ind8 &priority_bitmap, const rectangle &cliprect);
91	93	};
92	94
93
94		static void draw_sprites(running_machine &machine, UINT32 *sprites, const rectangle &cliprect, int count);
95
96	95	/*****************************************************************************************************
97	96	MISC FUNCTIONS
98	97	*****************************************************************************************************/
r21058	r21059
156	155	if(m_spriteram_bit)
157	156	{
158	157	// draw the sprites to the frame buffer
159		draw_sprites(machine(),m_spriteram2,clip,m_prev_sprites_count);
	158	draw_sprites(m_spriteram2,clip,m_prev_sprites_count);
160	159	}
161	160	else
162	161	{
163	162	// draw the sprites to the frame buffer
164		draw_sprites(machine(),m_spriteram,clip,m_prev_sprites_count);
	163	draw_sprites(m_spriteram,clip,m_prev_sprites_count);
165	164	}
166	165
167	166	// buffer the next number of sprites to draw
r21058	r21059
420	419	}
421	420
422	421	// sprites aren't tile based (except for 8x8 ones)
423		static void draw_sprites(running_machine &machine, UINT32 *sprites, const rectangle &cliprect, int count)
	422	void limenko_state::draw_sprites(UINT32 *sprites, const rectangle &cliprect, int count)
424	423	{
425		limenko_state *state = machine.driver_data<limenko_state>();
426	424	int i;
427	425
428		UINT8 *base_gfx = state->memregion("gfx1")->base();
429		UINT8 *gfx_max  = base_gfx + state->memregion("gfx1")->bytes();
	426	UINT8 *base_gfx = memregion("gfx1")->base();
	427	UINT8 *gfx_max  = base_gfx + memregion("gfx1")->bytes();
430	428
431	429	UINT8 *gfxdata;
432	430
r21058	r21059
463	461	continue;
464	462
465	463	/* prepare GfxElement on the fly */
466		gfx_element gfx(machine, gfxdata, width, height, width, 0, 256);
	464	gfx_element gfx(machine(), gfxdata, width, height, width, 0, 256);
467	465
468		draw_single_sprite(state->m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x,y,pri);
	466	draw_single_sprite(m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x,y,pri);
469	467
470	468	// wrap around x
471		draw_single_sprite(state->m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x-512,y,pri);
	469	draw_single_sprite(m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x-512,y,pri);
472	470
473	471	// wrap around y
474		draw_single_sprite(state->m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x,y-512,pri);
	472	draw_single_sprite(m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x,y-512,pri);
475	473
476	474	// wrap around x and y
477		draw_single_sprite(state->m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x-512,y-512,pri);
	475	draw_single_sprite(m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x-512,y-512,pri);
478	476	}
479	477	}
480	478
481		static void copy_sprites(running_machine &machine, bitmap_ind16 &bitmap, bitmap_ind16 &sprites_bitmap, bitmap_ind8 &priority_bitmap, const rectangle &cliprect)
	479	void limenko_state::copy_sprites(bitmap_ind16 &bitmap, bitmap_ind16 &sprites_bitmap, bitmap_ind8 &priority_bitmap, const rectangle &cliprect)
482	480	{
483		limenko_state *state = machine.driver_data<limenko_state>();
484	481	int y;
485	482	for( y=cliprect.min_y; y<=cliprect.max_y; y++ )
486	483	{
487	484	UINT16 *source = &sprites_bitmap.pix16(y);
488	485	UINT16 *dest = &bitmap.pix16(y);
489	486	UINT8 *dest_pri = &priority_bitmap.pix8(y);
490		UINT8 *source_pri = &state->m_sprites_bitmap_pri.pix8(y);
	487	UINT8 *source_pri = &m_sprites_bitmap_pri.pix8(y);
491	488
492	489	int x;
493	490	for( x=cliprect.min_x; x<=cliprect.max_x; x++ )
r21058	r21059
537	534	m_fg_tilemap->draw(bitmap, cliprect, 0,1);
538	535
539	536	if(m_videoreg[0] & 8)
540		copy_sprites(machine(), bitmap, m_sprites_bitmap, machine().priority_bitmap, cliprect);
	537	copy_sprites(bitmap, m_sprites_bitmap, machine().priority_bitmap, cliprect);
541	538
542	539	return 0;
543	540	}

trunk/src/mame/drivers/dwarfd.c

r21058	r21059
351	351	virtual void palette_init();
352	352	UINT32 screen_update_dwarfd(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
353	353	TIMER_DEVICE_CALLBACK_MEMBER(dwarfd_interrupt);
	354	void drawCrt( bitmap_rgb32 &bitmap,const rectangle &cliprect );
354	355	};
355	356
356	357
r21058	r21059
783	784	{
784	785	}
785	786
786		static void drawCrt( running_machine &machine, bitmap_rgb32 &bitmap,const rectangle &cliprect )
	787	void dwarfd_state::drawCrt( bitmap_rgb32 &bitmap,const rectangle &cliprect )
787	788	{
788		dwarfd_state *state = machine.driver_data<dwarfd_state>();
789	789	int x, y;
790	790	for (y = 0; y < maxy; y++)
791	791	{
r21058	r21059
804	804	while (b == 0)
805	805	{
806	806	if (count < 0x8000)
807		tile = state->m_videobuf[count++];
	807	tile = m_videobuf[count++];
808	808	else
809	809	return;
810	810
r21058	r21059
823	823	}
824	824	if ((tile & 0xc0) == 0x80)
825	825	{
826		state->m_bank = (tile >> 2) & 3;
	826	m_bank = (tile >> 2) & 3;
827	827	}
828	828	if ((tile & 0xc0) == 0xc0)
829	829	{
830	830	b = 1;
831		tile = machine.rand() & 0x7f;//(tile >> 2) & 0xf;
	831	tile = machine().rand() & 0x7f;//(tile >> 2) & 0xf;
832	832	}
833	833	}
834	834	else
835	835	b = 1;
836	836	}
837		drawgfx_transpen(bitmap, cliprect, machine.gfx[0],
838		tile + (state->m_bank + bank2) * 128,
	837	drawgfx_transpen(bitmap, cliprect, machine().gfx[0],
	838	tile + (m_bank + bank2) * 128,
839	839	0,
840	840	0, 0,
841	841	x*8,y*8,0);
r21058	r21059
847	847	UINT32 dwarfd_state::screen_update_dwarfd(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
848	848	{
849	849	bitmap.fill(get_black_pen(machine()), cliprect);
850		drawCrt(machine(), bitmap, cliprect);
	850	drawCrt(bitmap, cliprect);
851	851	return 0;
852	852	}
853	853

trunk/src/mame/drivers/meritm.c

r21058	r21059
245	245	TIMER_DEVICE_CALLBACK_MEMBER(meritm_interrupt);
246	246	TIMER_DEVICE_CALLBACK_MEMBER(vblank_start_tick);
247	247	TIMER_DEVICE_CALLBACK_MEMBER(vblank_end_tick);
	248	void ds1204_w( ds1204_t *ds1204, int rst, int clk, int dq );
	249	int ds1204_r(ds1204_t *ds1204);
	250	void ds1204_init(const UINT8* key, const UINT8* nvram);
	251	void meritm_crt250_switch_banks(  );
	252	void meritm_switch_banks(  );
	253	UINT8 binary_to_BCD(UINT8 data);
248	254	};
249	255
250	256
r21058	r21059
265	271	#define DS1204_STATE_WRITE_SECURITY_MATCH   3
266	272	#define DS1204_STATE_READ_NVRAM         4
267	273
268		static void ds1204_w( ds1204_t *ds1204, int rst, int clk, int dq )
	274	void meritm_state::ds1204_w( ds1204_t *ds1204, int rst, int clk, int dq )
269	275	{
270	276	//logerror("ds1204_w: rst = %d, clk = %d, dq = %d\n", rst, clk, dq );
271	277	if ( rst == 0 )
r21058	r21059
344	350	}
345	351	};
346	352
347		static int ds1204_r(ds1204_t *ds1204)
	353	int meritm_state::ds1204_r(ds1204_t *ds1204)
348	354	{
349	355	//logerror("ds1204_r\n");
350	356	return ds1204->out_bit;
351	357	};
352	358
353		static void ds1204_init(running_machine &machine, const UINT8* key, const UINT8* nvram)
	359	void meritm_state::ds1204_init(const UINT8* key, const UINT8* nvram)
354	360	{
355		meritm_state *state = machine.driver_data<meritm_state>();
356		memset(&state->m_ds1204, 0, sizeof(state->m_ds1204));
	361	memset(&m_ds1204, 0, sizeof(m_ds1204));
357	362	if (key)
358		memcpy(state->m_ds1204.key, key, sizeof(state->m_ds1204.key));
	363	memcpy(m_ds1204.key, key, sizeof(m_ds1204.key));
359	364	if (nvram)
360		memcpy(state->m_ds1204.nvram, nvram, sizeof(state->m_ds1204.nvram));
	365	memcpy(m_ds1204.nvram, nvram, sizeof(m_ds1204.nvram));
361	366
362		state_save_register_item(machine, "ds1204", NULL, 0, state->m_ds1204.state);
363		state_save_register_item(machine, "ds1204", NULL, 0, state->m_ds1204.read_ptr);
364		state_save_register_item(machine, "ds1204", NULL, 0, state->m_ds1204.last_clk);
365		state_save_register_item(machine, "ds1204", NULL, 0, state->m_ds1204.out_bit);
366		state_save_register_item_array(machine, "ds1204", NULL, 0, state->m_ds1204.command);
	367	state_save_register_item(machine(), "ds1204", NULL, 0, m_ds1204.state);
	368	state_save_register_item(machine(), "ds1204", NULL, 0, m_ds1204.read_ptr);
	369	state_save_register_item(machine(), "ds1204", NULL, 0, m_ds1204.last_clk);
	370	state_save_register_item(machine(), "ds1204", NULL, 0, m_ds1204.out_bit);
	371	state_save_register_item_array(machine(), "ds1204", NULL, 0, m_ds1204.command);
367	372	};
368	373
369	374	/*************************************
r21058	r21059
498	503	*************************************/
499	504
500	505
501		static void meritm_crt250_switch_banks( running_machine &machine )
	506	void meritm_state::meritm_crt250_switch_banks(  )
502	507	{
503		meritm_state *state = machine.driver_data<meritm_state>();
504		int rombank = (state->m_bank & 0x07) ^ 0x07;
	508	int rombank = (m_bank & 0x07) ^ 0x07;
505	509
506		//logerror( "CRT250: Switching banks: rom = %0x (bank = %x)\n", rombank, state->m_bank );
507		state->membank("bank1")->set_entry(rombank );
	510	//logerror( "CRT250: Switching banks: rom = %0x (bank = %x)\n", rombank, m_bank );
	511	membank("bank1")->set_entry(rombank );
508	512	};
509	513
510	514	WRITE8_MEMBER(meritm_state::meritm_crt250_bank_w)
511	515	{
512		meritm_crt250_switch_banks(machine());
	516	meritm_crt250_switch_banks();
513	517	};
514	518
515		static void meritm_switch_banks( running_machine &machine )
	519	void meritm_state::meritm_switch_banks(  )
516	520	{
517		meritm_state *state = machine.driver_data<meritm_state>();
518		int rambank = (state->m_psd_a15 >> 2) & 0x3;
519		int rombank = (((state->m_bank >> 3) & 0x3) << 5) |
520		(((state->m_psd_a15 >> 1) & 0x1) << 4) |
521		(((state->m_bank & 0x07) ^ 0x07) << 1) |
522		(state->m_psd_a15 & 0x1);
	521	int rambank = (m_psd_a15 >> 2) & 0x3;
	522	int rombank = (((m_bank >> 3) & 0x3) << 5) |
	523	(((m_psd_a15 >> 1) & 0x1) << 4) |
	524	(((m_bank & 0x07) ^ 0x07) << 1) |
	525	(m_psd_a15 & 0x1);
523	526
524		//logerror( "Switching banks: rom = %0x (bank = %x), ram = %0x\n", rombank, state->m_bank, rambank);
525		state->membank("bank1")->set_entry(rombank );
526		state->membank("bank2")->set_entry(rombank | 0x01);
527		state->membank("bank3")->set_entry(rambank);
	527	//logerror( "Switching banks: rom = %0x (bank = %x), ram = %0x\n", rombank, m_bank, rambank);
	528	membank("bank1")->set_entry(rombank );
	529	membank("bank2")->set_entry(rombank | 0x01);
	530	membank("bank3")->set_entry(rambank);
528	531	};
529	532
530	533	WRITE8_MEMBER(meritm_state::meritm_psd_a15_w)
531	534	{
532	535	m_psd_a15 = data;
533	536	//logerror( "Writing PSD_A15 with %02x at PC=%04X\n", data, space.device().safe_pc() );
534		meritm_switch_banks(machine());
	537	meritm_switch_banks();
535	538	};
536	539
537	540	WRITE8_MEMBER(meritm_state::meritm_bank_w)
538	541	{
539		meritm_switch_banks(machine());
	542	meritm_switch_banks();
540	543	};
541	544
542	545	/*************************************
r21058	r21059
626	629	}
627	630	};
628	631
629		static UINT8 binary_to_BCD(UINT8 data)
	632	UINT8 meritm_state::binary_to_BCD(UINT8 data)
630	633	{
631	634	data %= 100;
632	635
r21058	r21059
1107	1110	{
1108	1111	membank("bank1")->configure_entries(0, 8, memregion("maincpu")->base(), 0x10000);
1109	1112	m_bank = 0xff;
1110		meritm_crt250_switch_banks(machine());
	1113	meritm_crt250_switch_banks();
1111	1114	MACHINE_START_CALL_MEMBER(merit_common);
1112	1115	state_save_register_global(machine(), m_bank);
1113	1116
r21058	r21059
1135	1138	membank("bank3")->configure_entries(0, 4, m_ram, 0x2000);
1136	1139	m_bank = 0xff;
1137	1140	m_psd_a15 = 0;
1138		meritm_switch_banks(machine());
	1141	meritm_switch_banks();
1139	1142	MACHINE_START_CALL_MEMBER(merit_common);
1140	1143	pc16552d_init(machine(), 0, UART_CLK, NULL, pc16650d_tx_callback);
1141	1144	state_save_register_global(machine(), m_bank);
r21058	r21059
2003	2006	static const UINT8 pitbossm_ds1204_nvram[16] =
2004	2007	{ 0x16, 0x90, 0xa0, 0x52, 0xd8, 0x6c, 0x12, 0xaf, 0x36, 0x22, 0x61, 0x35, 0x0d, 0x58, 0x0c, 0x00 };
2005	2008
2006		ds1204_init(machine(), pitbossm_ds1204_key, pitbossm_ds1204_nvram);
	2009	ds1204_init(pitbossm_ds1204_key, pitbossm_ds1204_nvram);
2007	2010
2008	2011	};
2009	2012
r21058	r21059
2015	2018	static const UINT8 pbst30b_ds1204_nvram[16] =
2016	2019	{ 0x3e, 0x9a, 0x3c, 0x3f, 0x1d, 0x51, 0x72, 0xc9, 0x28, 0x2c, 0x1d, 0x2d, 0x0e, 0x56, 0x41, 0x00 };
2017	2020
2018		ds1204_init(machine(), pbst30b_ds1204_key, pbst30b_ds1204_nvram);
	2021	ds1204_init(pbst30b_ds1204_key, pbst30b_ds1204_nvram);
2019	2022
2020	2023	};
2021	2024
r21058	r21059
2027	2030	static const UINT8 pbst30b_ds1204_nvram[16] =
2028	2031	{ 0xa9, 0xdb, 0x41, 0xf8, 0xe4, 0x42, 0x20, 0x6e, 0xde, 0xaf, 0x4f, 0x046, 0x3d, 0x55, 0x44, 0x00 };
2029	2032
2030		ds1204_init(machine(), pbst30b_ds1204_key, pbst30b_ds1204_nvram);
	2033	ds1204_init(pbst30b_ds1204_key, pbst30b_ds1204_nvram);
2031	2034
2032	2035	};
2033	2036
r21058	r21059
2039	2042	static const UINT8 pitbosmt_ds1204_nvram[16] =
2040	2043	{ 0x00, 0xfe, 0x03, 0x03, 0x08, 0x00, 0xa2, 0x03, 0x4b, 0x07, 0x00, 0xe6, 0x02, 0xd3, 0x05, 0x00 };
2041	2044
2042		ds1204_init(machine(), pitbosmt_ds1204_key, pitbosmt_ds1204_nvram);
	2045	ds1204_init(pitbosmt_ds1204_key, pitbosmt_ds1204_nvram);
2043	2046
2044	2047	};
2045	2048
r21058	r21059
2051	2054	static const UINT8 megat3_ds1204_nvram[16] =
2052	2055	{ 0x51, 0xa1, 0xc0, 0x7c, 0x27, 0x6e, 0x51, 0xb9, 0xa5, 0xb2, 0x27, 0x0c, 0xb9, 0x88, 0x82, 0x2c };
2053	2056
2054		ds1204_init(machine(), megat3_ds1204_key, megat3_ds1204_nvram);
	2057	ds1204_init(megat3_ds1204_key, megat3_ds1204_nvram);
2055	2058
2056	2059	};
2057	2060
r21058	r21059
2063	2066	static const UINT8 megat3_ds1204_nvram[16] =
2064	2067	{ 0x99, 0x53, 0xfc, 0x29, 0x3a, 0x95, 0x8b, 0x58, 0xca, 0xca, 0x00, 0xc2, 0x30, 0x62, 0x0b, 0x96 };
2065	2068
2066		ds1204_init(machine(), megat3_ds1204_key, megat3_ds1204_nvram);
	2069	ds1204_init(megat3_ds1204_key, megat3_ds1204_nvram);
2067	2070
2068	2071	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xfff8, 0xffff, read8_delegate(FUNC(meritm_state::meritm_ds1644_r), this), write8_delegate(FUNC(meritm_state::meritm_ds1644_w), this));
2069	2072
r21058	r21059
2074	2077	static const UINT8 megat4_ds1204_nvram[16] =
2075	2078	{ 0xe3, 0x08, 0x39, 0xd8, 0x4c, 0xbb, 0xc4, 0xf8, 0xf0, 0xe2, 0xd8, 0x77, 0xa8, 0x3d, 0x95, 0x02 };
2076	2079
2077		ds1204_init(machine(), 0, megat4_ds1204_nvram);
	2080	ds1204_init(0, megat4_ds1204_nvram);
2078	2081	}
2079	2082
2080	2083	DRIVER_INIT_MEMBER(meritm_state,megat4c)
r21058	r21059
2085	2088	static const UINT8 megat4_ds1204_nvram[16] =
2086	2089	{ 0xe3, 0x08, 0x39, 0xd8, 0x4c, 0xbb, 0xc4, 0xf8, 0xf0, 0xe2, 0xd8, 0x77, 0xa8, 0x3d, 0x95, 0x02 };
2087	2090
2088		ds1204_init(machine(), megat4c_ds1204_key, megat4_ds1204_nvram);
	2091	ds1204_init(megat4c_ds1204_key, megat4_ds1204_nvram);
2089	2092	}
2090	2093
2091	2094	DRIVER_INIT_MEMBER(meritm_state,megat4te)
r21058	r21059
2093	2096	static const UINT8 megat4te_ds1204_nvram[16] =
2094	2097	{ 0x05, 0x21, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
2095	2098
2096		ds1204_init(machine(), 0, megat4te_ds1204_nvram);
	2099	ds1204_init(0, megat4te_ds1204_nvram);
2097	2100
2098	2101	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xfff8, 0xffff, read8_delegate(FUNC(meritm_state::meritm_ds1644_r), this), write8_delegate(FUNC(meritm_state::meritm_ds1644_w), this));
2099	2102
r21058	r21059
2104	2107	static const UINT8 megat4te_ds1204_nvram[16] =
2105	2108	{ 0x11, 0x04, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
2106	2109
2107		ds1204_init(machine(), 0, megat4te_ds1204_nvram);
	2110	ds1204_init(0, megat4te_ds1204_nvram);
2108	2111
2109	2112	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xfff8, 0xffff, read8_delegate(FUNC(meritm_state::meritm_ds1644_r), this), write8_delegate(FUNC(meritm_state::meritm_ds1644_w), this));
2110	2113
r21058	r21059
2115	2118	static const UINT8 megat5_ds1204_nvram[16] =
2116	2119	{ 0x06, 0x23, 0x97, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
2117	2120
2118		ds1204_init(machine(), 0, megat5_ds1204_nvram);
	2121	ds1204_init(0, megat5_ds1204_nvram);
2119	2122
2120	2123	}
2121	2124
r21058	r21059
2124	2127	static const UINT8 megat5_ds1204_nvram[16] =
2125	2128	{ 0x08, 0x22, 0x97, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
2126	2129
2127		ds1204_init(machine(), 0, megat5_ds1204_nvram);
	2130	ds1204_init(0, megat5_ds1204_nvram);
2128	2131
2129	2132	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xfff8, 0xffff, read8_delegate(FUNC(meritm_state::meritm_ds1644_r), this), write8_delegate(FUNC(meritm_state::meritm_ds1644_w), this));
2130	2133
r21058	r21059
2135	2138	static const UINT8 megat6_ds1204_nvram[16] =
2136	2139	{ 0x07, 0x15, 0x98, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
2137	2140
2138		ds1204_init(machine(), 0, megat6_ds1204_nvram);
	2141	ds1204_init(0, megat6_ds1204_nvram);
2139	2142
2140	2143	}
2141	2144

trunk/src/mame/drivers/seattle.c

r21058	r21059
496	496	virtual void machine_reset();
497	497	UINT32 screen_update_seattle(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
498	498	TIMER_CALLBACK_MEMBER(galileo_timer_callback);
	499	void ethernet_interrupt_machine(int state);
	500	void update_vblank_irq();
	501	UINT32 pci_bridge_r(address_space &space, UINT8 reg, UINT8 type);
	502	void pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data);
	503	UINT32 pci_3dfx_r(address_space &space, UINT8 reg, UINT8 type);
	504	void pci_3dfx_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data);
	505	UINT32 pci_ide_r(address_space &space, UINT8 reg, UINT8 type);
	506	void pci_ide_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data);
	507	void update_galileo_irqs();
	508	int galileo_dma_fetch_next(address_space &space, int which);
	509	void galileo_perform_dma(address_space &space, int which);
	510	void galileo_reset();
	511	void widget_reset();
	512	void update_widget_irq();
	513	void init_common(int ioasic, int serialnum, int yearoffs, int config);
499	514	};
500	515
501
502	516	/*************************************
503	517	*
504		*  Prototypes
505		*
506		*************************************/
507
508		static void vblank_assert(device_t *device, int state);
509		static void update_vblank_irq(running_machine &machine);
510		static void galileo_reset(running_machine &machine);
511
512		static void galileo_perform_dma(address_space &space, int which);
513		static void voodoo_stall(device_t *device, int stall);
514		static void widget_reset(running_machine &machine);
515		static void update_widget_irq(running_machine &machine);
516
517
518
519		/*************************************
520		*
521	518	*  Video start and update
522	519	*
523	520	*************************************/
r21058	r21059
607	604	}
608	605
609	606	/* reset the other devices */
610		galileo_reset(machine());
	607	galileo_reset();
611	608	if (m_board_config == SEATTLE_WIDGET_CONFIG)
612		widget_reset(machine());
	609	widget_reset();
613	610	}
614	611
615	612
r21058	r21059
633	630	*
634	631	*************************************/
635	632
636		static void ethernet_interrupt_machine(running_machine &machine, int state)
	633	void seattle_state::ethernet_interrupt_machine(int state)
637	634	{
638		seattle_state *drvstate = machine.driver_data<seattle_state>();
639		drvstate->m_ethernet_irq_state = state;
640		if (drvstate->m_board_config == FLAGSTAFF_CONFIG)
	635	m_ethernet_irq_state = state;
	636	if (m_board_config == FLAGSTAFF_CONFIG)
641	637	{
642		UINT8 assert = drvstate->m_ethernet_irq_state && (*drvstate->m_interrupt_enable & (1 << ETHERNET_IRQ_SHIFT));
643		if (drvstate->m_ethernet_irq_num != 0)
644		machine.device("maincpu")->execute().set_input_line(drvstate->m_ethernet_irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
	638	UINT8 assert = m_ethernet_irq_state && (*m_interrupt_enable & (1 << ETHERNET_IRQ_SHIFT));
	639	if (m_ethernet_irq_num != 0)
	640	machine().device("maincpu")->execute().set_input_line(m_ethernet_irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
645	641	}
646		else if (drvstate->m_board_config == SEATTLE_WIDGET_CONFIG)
647		update_widget_irq(machine);
	642	else if (m_board_config == SEATTLE_WIDGET_CONFIG)
	643	update_widget_irq();
648	644	}
649	645
650	646	static void ethernet_interrupt(device_t *device, int state)
651	647	{
652		ethernet_interrupt_machine(device->machine(), state);
	648	seattle_state *drvstate = device->machine().driver_data<seattle_state>();
	649	drvstate->ethernet_interrupt_machine(state);
653	650	}
654	651
655	652
r21058	r21059
728	725	}
729	726
730	727	/* update the states */
731		update_vblank_irq(machine());
732		ethernet_interrupt_machine(machine(), m_ethernet_irq_state);
	728	update_vblank_irq();
	729	ethernet_interrupt_machine(m_ethernet_irq_state);
733	730	}
734	731
735	732
r21058	r21059
740	737	if (old != *m_interrupt_enable)
741	738	{
742	739	if (m_vblank_latch)
743		update_vblank_irq(machine());
	740	update_vblank_irq();
744	741	if (m_ethernet_irq_state)
745		ethernet_interrupt_machine(machine(), m_ethernet_irq_state);
	742	ethernet_interrupt_machine(m_ethernet_irq_state);
746	743	}
747	744	}
748	745
r21058	r21059
754	751	*
755	752	*************************************/
756	753
757		static void update_vblank_irq(running_machine &machine)
	754	void seattle_state::update_vblank_irq()
758	755	{
759		seattle_state *drvstate = machine.driver_data<seattle_state>();
760	756	int state = CLEAR_LINE;
761	757
762	758	/* skip if no interrupt configured */
763		if (drvstate->m_vblank_irq_num == 0)
	759	if (m_vblank_irq_num == 0)
764	760	return;
765	761
766	762	/* if the VBLANK has been latched, and the interrupt is enabled, assert */
767		if (drvstate->m_vblank_latch && (*drvstate->m_interrupt_enable & (1 << VBLANK_IRQ_SHIFT)))
	763	if (m_vblank_latch && (*m_interrupt_enable & (1 << VBLANK_IRQ_SHIFT)))
768	764	state = ASSERT_LINE;
769		machine.device("maincpu")->execute().set_input_line(drvstate->m_vblank_irq_num, state);
	765	machine().device("maincpu")->execute().set_input_line(m_vblank_irq_num, state);
770	766	}
771	767
772	768
r21058	r21059
774	770	{
775	771	/* clear the latch and update the IRQ */
776	772	m_vblank_latch = 0;
777		update_vblank_irq(machine());
	773	update_vblank_irq();
778	774	}
779	775
780	776
r21058	r21059
788	784	if ((state && !(*drvstate->m_interrupt_enable & 0x100)) || (!state && (*drvstate->m_interrupt_enable & 0x100)))
789	785	{
790	786	drvstate->m_vblank_latch = 1;
791		update_vblank_irq(device->machine());
	787	drvstate->update_vblank_irq();
792	788	}
793	789	}
794	790
r21058	r21059
800	796	*
801	797	*************************************/
802	798
803		static UINT32 pci_bridge_r(address_space &space, UINT8 reg, UINT8 type)
	799	UINT32 seattle_state::pci_bridge_r(address_space &space, UINT8 reg, UINT8 type)
804	800	{
805		seattle_state *state = space.machine().driver_data<seattle_state>();
806		UINT32 result = state->m_galileo.pci_bridge_regs[reg];
	801	UINT32 result = m_galileo.pci_bridge_regs[reg];
807	802
808	803	switch (reg)
809	804	{
r21058	r21059
822	817	}
823	818
824	819
825		static void pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
826		{
827		seattle_state *state = space.machine().driver_data<seattle_state>();
828		state->m_galileo.pci_bridge_regs[reg] = data;
	820	void seattle_state::pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
	821	{
	822	m_galileo.pci_bridge_regs[reg] = data;
829	823	if (LOG_PCI)
830	824	logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, data);
831	825	}
r21058	r21059
838	832	*
839	833	*************************************/
840	834
841		static UINT32 pci_3dfx_r(address_space &space, UINT8 reg, UINT8 type)
842		{
843		seattle_state *state = space.machine().driver_data<seattle_state>();
844		UINT32 result = state->m_galileo.pci_3dfx_regs[reg];
	835	UINT32 seattle_state::pci_3dfx_r(address_space &space, UINT8 reg, UINT8 type)
	836	{
	837	UINT32 result = m_galileo.pci_3dfx_regs[reg];
845	838
846	839	switch (reg)
847	840	{
r21058	r21059
860	853	}
861	854
862	855
863		static void pci_3dfx_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
	856	void seattle_state::pci_3dfx_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
864	857	{
865		seattle_state *state = space.machine().driver_data<seattle_state>();
866		state->m_galileo.pci_3dfx_regs[reg] = data;
	858	m_galileo.pci_3dfx_regs[reg] = data;
867	859
868	860	switch (reg)
869	861	{
870	862	case 0x04:      /* address register */
871		state->m_galileo.pci_3dfx_regs[reg] &= 0xff000000;
	863	m_galileo.pci_3dfx_regs[reg] &= 0xff000000;
872	864	if (data != 0x08000000)
873	865	logerror("3dfx not mapped where we expect it! (%08X)\n", data);
874	866	break;
875	867
876	868	case 0x10:      /* initEnable register */
877		voodoo_set_init_enable(state->m_voodoo, data);
	869	voodoo_set_init_enable(m_voodoo, data);
878	870	break;
879	871	}
880	872	if (LOG_PCI)
r21058	r21059
889	881	*
890	882	*************************************/
891	883
892		static UINT32 pci_ide_r(address_space &space, UINT8 reg, UINT8 type)
	884	UINT32 seattle_state::pci_ide_r(address_space &space, UINT8 reg, UINT8 type)
893	885	{
894		seattle_state *state = space.machine().driver_data<seattle_state>();
895		UINT32 result = state->m_galileo.pci_ide_regs[reg];
	886	UINT32 result = m_galileo.pci_ide_regs[reg];
896	887
897	888	switch (reg)
898	889	{
r21058	r21059
911	902	}
912	903
913	904
914		static void pci_ide_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
	905	void seattle_state::pci_ide_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
915	906	{
916		seattle_state *state = space.machine().driver_data<seattle_state>();
917		state->m_galileo.pci_ide_regs[reg] = data;
	907	m_galileo.pci_ide_regs[reg] = data;
918	908	if (LOG_PCI)
919	909	logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, data);
920	910	}
r21058	r21059
927	917	*
928	918	*************************************/
929	919
930		static void update_galileo_irqs(running_machine &machine)
	920	void seattle_state::update_galileo_irqs()
931	921	{
932		seattle_state *drvstate = machine.driver_data<seattle_state>();
933	922	int state = CLEAR_LINE;
934	923
935	924	/* if any unmasked interrupts are live, we generate */
936		if (drvstate->m_galileo.reg[GREG_INT_STATE] & drvstate->m_galileo.reg[GREG_INT_MASK])
	925	if (m_galileo.reg[GREG_INT_STATE] & m_galileo.reg[GREG_INT_MASK])
937	926	state = ASSERT_LINE;
938		machine.device("maincpu")->execute().set_input_line(GALILEO_IRQ_NUM, state);
	927	machine().device("maincpu")->execute().set_input_line(GALILEO_IRQ_NUM, state);
939	928
940	929	if (LOG_GALILEO)
941	930	logerror("Galileo IRQ %s\n", (state == ASSERT_LINE) ? "asserted" : "cleared");
r21058	r21059
963	952
964	953	/* trigger the interrupt */
965	954	m_galileo.reg[GREG_INT_STATE] |= 1 << (GINT_T0EXP_SHIFT + which);
966		update_galileo_irqs(machine());
	955	update_galileo_irqs();
967	956	}
968	957
969	958
r21058	r21059
974	963	*
975	964	*************************************/
976	965
977		static int galileo_dma_fetch_next(address_space &space, int which)
	966	int seattle_state::galileo_dma_fetch_next(address_space &space, int which)
978	967	{
979		seattle_state *state = space.machine().driver_data<seattle_state>();
980		galileo_data &galileo = state->m_galileo;
	968	galileo_data &galileo = m_galileo;
981	969	offs_t address = 0;
982	970	UINT32 data;
983	971
r21058	r21059
991	979	if (galileo.reg[GREG_DMA0_CONTROL + which] & 0x400)
992	980	{
993	981	galileo.reg[GREG_INT_STATE] |= 1 << (GINT_DMA0COMP_SHIFT + which);
994		update_galileo_irqs(space.machine());
	982	update_galileo_irqs();
995	983	}
996	984	galileo.reg[GREG_DMA0_CONTROL + which] &= ~0x5000;
997	985	return 0;
r21058	r21059
1016	1004	}
1017	1005
1018	1006
1019		static void galileo_perform_dma(address_space &space, int which)
	1007	void seattle_state::galileo_perform_dma(address_space &space, int which)
1020	1008	{
1021		seattle_state *state = space.machine().driver_data<seattle_state>();
1022		galileo_data &galileo = state->m_galileo;
	1009	galileo_data &galileo = m_galileo;
1023	1010	do
1024	1011	{
1025	1012	offs_t srcaddr = galileo.reg[GREG_DMA0_SOURCE + which];
r21058	r21059
1061	1048	while (bytesleft >= 4)
1062	1049	{
1063	1050	/* if the voodoo is stalled, stop early */
1064		if (state->m_voodoo_stalled)
	1051	if (m_voodoo_stalled)
1065	1052	{
1066	1053	if (LOG_DMA)
1067	1054	logerror("Stalled on voodoo with %d bytes left\n", bytesleft);
r21058	r21059
1069	1056	}
1070	1057
1071	1058	/* write the data and advance */
1072		voodoo_w(state->m_voodoo, space, (dstaddr & 0xffffff) / 4, space.read_dword(srcaddr), 0xffffffff);
	1059	voodoo_w(m_voodoo, space, (dstaddr & 0xffffff) / 4, space.read_dword(srcaddr), 0xffffffff);
1073	1060	srcaddr += srcinc;
1074	1061	dstaddr += dstinc;
1075	1062	bytesleft -= 4;
r21058	r21059
1102	1089	if (!(galileo.reg[GREG_DMA0_CONTROL + which] & 0x400))
1103	1090	{
1104	1091	galileo.reg[GREG_INT_STATE] |= 1 << (GINT_DMA0COMP_SHIFT + which);
1105		update_galileo_irqs(space.machine());
	1092	update_galileo_irqs();
1106	1093	}
1107	1094	} while (galileo_dma_fetch_next(space, which));
1108	1095
r21058	r21059
1117	1104	*
1118	1105	*************************************/
1119	1106
1120		static void galileo_reset(running_machine &machine)
	1107	void seattle_state::galileo_reset()
1121	1108	{
1122		seattle_state *state = machine.driver_data<seattle_state>();
1123		memset(&state->m_galileo.reg, 0, sizeof(state->m_galileo.reg));
	1109	memset(&m_galileo.reg, 0, sizeof(m_galileo.reg));
1124	1110	}
1125	1111
1126	1112
r21058	r21059
1296	1282	if (LOG_GALILEO)
1297	1283	logerror("%08X:Galileo write to IRQ clear = %08X & %08X\n", offset*4, data, mem_mask);
1298	1284	galileo.reg[offset] = oldata & data;
1299		update_galileo_irqs(machine());
	1285	update_galileo_irqs();
1300	1286	break;
1301	1287
1302	1288	case GREG_CONFIG_DATA:
r21058	r21059
1411	1397	state->m_galileo.dma_stalled_on_voodoo[which] = FALSE;
1412	1398
1413	1399	/* resume execution */
1414		galileo_perform_dma(space, which);
	1400	state->galileo_perform_dma(space, which);
1415	1401	break;
1416	1402	}
1417	1403
r21058	r21059
1550	1536	*
1551	1537	*************************************/
1552	1538
1553		static void widget_reset(running_machine &machine)
	1539	void seattle_state::widget_reset()
1554	1540	{
1555		seattle_state *state = machine.driver_data<seattle_state>();
1556		UINT8 saved_irq = state->m_widget.irq_num;
1557		memset(&state->m_widget, 0, sizeof(state->m_widget));
1558		state->m_widget.irq_num = saved_irq;
	1541	UINT8 saved_irq = m_widget.irq_num;
	1542	memset(&m_widget, 0, sizeof(m_widget));
	1543	m_widget.irq_num = saved_irq;
1559	1544	}
1560	1545
1561	1546
1562		static void update_widget_irq(running_machine &machine)
	1547	void seattle_state::update_widget_irq()
1563	1548	{
1564		seattle_state *drvstate = machine.driver_data<seattle_state>();
1565		UINT8 state = drvstate->m_ethernet_irq_state << WINT_ETHERNET_SHIFT;
1566		UINT8 mask = drvstate->m_widget.irq_mask;
1567		UINT8 assert = ((mask & state) != 0) && (*drvstate->m_interrupt_enable & (1 << WIDGET_IRQ_SHIFT));
	1549	UINT8 state = m_ethernet_irq_state << WINT_ETHERNET_SHIFT;
	1550	UINT8 mask = m_widget.irq_mask;
	1551	UINT8 assert = ((mask & state) != 0) && (*m_interrupt_enable & (1 << WIDGET_IRQ_SHIFT));
1568	1552
1569	1553	/* update the IRQ state */
1570		if (drvstate->m_widget.irq_num != 0)
1571		machine.device("maincpu")->execute().set_input_line(drvstate->m_widget.irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
	1554	if (m_widget.irq_num != 0)
	1555	machine().device("maincpu")->execute().set_input_line(m_widget.irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
1572	1556	}
1573	1557
1574	1558
r21058	r21059
1617	1601
1618	1602	case WREG_INTERRUPT:
1619	1603	m_widget.irq_mask = data;
1620		update_widget_irq(machine());
	1604	update_widget_irq();
1621	1605	break;
1622	1606
1623	1607	case WREG_ANALOG:
r21058	r21059
2856	2840	*
2857	2841	*************************************/
2858	2842
2859		static void init_common(running_machine &machine, int ioasic, int serialnum, int yearoffs, int config)
	2843	void seattle_state::init_common(int ioasic, int serialnum, int yearoffs, int config)
2860	2844	{
2861		seattle_state *state = machine.driver_data<seattle_state>();
2862	2845
2863	2846	/* initialize the subsystems */
2864		midway_ioasic_init(machine, ioasic, serialnum, yearoffs, ioasic_irq);
	2847	midway_ioasic_init(machine(),ioasic, serialnum, yearoffs, ioasic_irq);
2865	2848
2866	2849	/* switch off the configuration */
2867		state->m_board_config = config;
	2850	m_board_config = config;
2868	2851	switch (config)
2869	2852	{
2870	2853	case PHOENIX_CONFIG:
2871	2854	/* original Phoenix board only has 4MB of RAM */
2872		machine.device("maincpu")->memory().space(AS_PROGRAM).unmap_readwrite(0x00400000, 0x007fffff);
	2855	machine().device("maincpu")->memory().space(AS_PROGRAM).unmap_readwrite(0x00400000, 0x007fffff);
2873	2856	break;
2874	2857
2875	2858	case SEATTLE_WIDGET_CONFIG:
2876	2859	/* set up the widget board */
2877		machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16c00000, 0x16c0001f, read32_delegate(FUNC(seattle_state::widget_r),state), write32_delegate(FUNC(seattle_state::widget_w),state));
	2860	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16c00000, 0x16c0001f, read32_delegate(FUNC(seattle_state::widget_r),this), write32_delegate(FUNC(seattle_state::widget_w),this));
2878	2861	break;
2879	2862
2880	2863	case FLAGSTAFF_CONFIG:
2881	2864	/* set up the analog inputs */
2882		machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x14000000, 0x14000003, read32_delegate(FUNC(seattle_state::analog_port_r),state), write32_delegate(FUNC(seattle_state::analog_port_w),state));
	2865	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x14000000, 0x14000003, read32_delegate(FUNC(seattle_state::analog_port_r),this), write32_delegate(FUNC(seattle_state::analog_port_w),this));
2883	2866
2884	2867	/* set up the ethernet controller */
2885		machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16c00000, 0x16c0003f, read32_delegate(FUNC(seattle_state::ethernet_r),state), write32_delegate(FUNC(seattle_state::ethernet_w),state));
	2868	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16c00000, 0x16c0003f, read32_delegate(FUNC(seattle_state::ethernet_r),this), write32_delegate(FUNC(seattle_state::ethernet_w),this));
2886	2869	break;
2887	2870	}
2888	2871	}
r21058	r21059
2891	2874	DRIVER_INIT_MEMBER(seattle_state,wg3dh)
2892	2875	{
2893	2876	dcs2_init(machine(), 2, 0x3839);
2894		init_common(machine(), MIDWAY_IOASIC_STANDARD, 310/* others? */, 80, PHOENIX_CONFIG);
	2877	init_common(MIDWAY_IOASIC_STANDARD, 310/* others? */, 80, PHOENIX_CONFIG);
2895	2878
2896	2879	/* speedups */
2897	2880	mips3drc_add_hotspot(machine().device("maincpu"), 0x8004413C, 0x0C0054B4, 250);     /* confirmed */
r21058	r21059
2903	2886	DRIVER_INIT_MEMBER(seattle_state,mace)
2904	2887	{
2905	2888	dcs2_init(machine(), 2, 0x3839);
2906		init_common(machine(), MIDWAY_IOASIC_MACE, 319/* others? */, 80, SEATTLE_CONFIG);
	2889	init_common(MIDWAY_IOASIC_MACE, 319/* others? */, 80, SEATTLE_CONFIG);
2907	2890
2908	2891	/* speedups */
2909	2892	mips3drc_add_hotspot(machine().device("maincpu"), 0x800108F8, 0x8C420000, 250);     /* confirmed */
r21058	r21059
2913	2896	DRIVER_INIT_MEMBER(seattle_state,sfrush)
2914	2897	{
2915	2898	cage_init(machine(), 0x5236);
2916		init_common(machine(), MIDWAY_IOASIC_STANDARD, 315/* no alternates */, 100, FLAGSTAFF_CONFIG);
	2899	init_common(MIDWAY_IOASIC_STANDARD, 315/* no alternates */, 100, FLAGSTAFF_CONFIG);
2917	2900
2918	2901	/* speedups */
2919	2902	mips3drc_add_hotspot(machine().device("maincpu"), 0x80059F34, 0x3C028012, 250);     /* confirmed */
r21058	r21059
2925	2908	DRIVER_INIT_MEMBER(seattle_state,sfrushrk)
2926	2909	{
2927	2910	cage_init(machine(), 0x5329);
2928		init_common(machine(), MIDWAY_IOASIC_SFRUSHRK, 331/* unknown */, 100, FLAGSTAFF_CONFIG);
	2911	init_common(MIDWAY_IOASIC_SFRUSHRK, 331/* unknown */, 100, FLAGSTAFF_CONFIG);
2929	2912
2930	2913	/* speedups */
2931	2914	mips3drc_add_hotspot(machine().device("maincpu"), 0x800343E8, 0x3C028012, 250);     /* confirmed */
r21058	r21059
2938	2921	DRIVER_INIT_MEMBER(seattle_state,calspeed)
2939	2922	{
2940	2923	dcs2_init(machine(), 2, 0x39c0);
2941		init_common(machine(), MIDWAY_IOASIC_CALSPEED, 328/* others? */, 100, SEATTLE_WIDGET_CONFIG);
	2924	init_common(MIDWAY_IOASIC_CALSPEED, 328/* others? */, 100, SEATTLE_WIDGET_CONFIG);
2942	2925	midway_ioasic_set_auto_ack(1);
2943	2926
2944	2927	/* speedups */
r21058	r21059
2950	2933	DRIVER_INIT_MEMBER(seattle_state,vaportrx)
2951	2934	{
2952	2935	dcs2_init(machine(), 2, 0x39c2);
2953		init_common(machine(), MIDWAY_IOASIC_VAPORTRX, 324/* 334? unknown */, 100, SEATTLE_WIDGET_CONFIG);
	2936	init_common(MIDWAY_IOASIC_VAPORTRX, 324/* 334? unknown */, 100, SEATTLE_WIDGET_CONFIG);
2954	2937
2955	2938	/* speedups */
2956	2939	mips3drc_add_hotspot(machine().device("maincpu"), 0x80049F14, 0x3C028020, 250);     /* confirmed */
r21058	r21059
2962	2945	DRIVER_INIT_MEMBER(seattle_state,biofreak)
2963	2946	{
2964	2947	dcs2_init(machine(), 2, 0x3835);
2965		init_common(machine(), MIDWAY_IOASIC_STANDARD, 231/* no alternates */, 80, SEATTLE_CONFIG);
	2948	init_common(MIDWAY_IOASIC_STANDARD, 231/* no alternates */, 80, SEATTLE_CONFIG);
2966	2949
2967	2950	/* speedups */
2968	2951	}
r21058	r21059
2971	2954	DRIVER_INIT_MEMBER(seattle_state,blitz)
2972	2955	{
2973	2956	dcs2_init(machine(), 2, 0x39c2);
2974		init_common(machine(), MIDWAY_IOASIC_BLITZ99, 444/* or 528 */, 80, SEATTLE_CONFIG);
	2957	init_common(MIDWAY_IOASIC_BLITZ99, 444/* or 528 */, 80, SEATTLE_CONFIG);
2975	2958
2976	2959	/* for some reason, the code in the ROM appears buggy; this is a small patch to fix it */
2977	2960	m_rombase[0x934/4] += 4;
r21058	r21059
2985	2968	DRIVER_INIT_MEMBER(seattle_state,blitz99)
2986	2969	{
2987	2970	dcs2_init(machine(), 2, 0x0afb);
2988		init_common(machine(), MIDWAY_IOASIC_BLITZ99, 481/* or 484 or 520 */, 80, SEATTLE_CONFIG);
	2971	init_common(MIDWAY_IOASIC_BLITZ99, 481/* or 484 or 520 */, 80, SEATTLE_CONFIG);
2989	2972
2990	2973	/* speedups */
2991	2974	mips3drc_add_hotspot(machine().device("maincpu"), 0x8014E41C, 0x3C038025, 250);     /* confirmed */
r21058	r21059
2996	2979	DRIVER_INIT_MEMBER(seattle_state,blitz2k)
2997	2980	{
2998	2981	dcs2_init(machine(), 2, 0x0b5d);
2999		init_common(machine(), MIDWAY_IOASIC_BLITZ99, 494/* or 498 */, 80, SEATTLE_CONFIG);
	2982	init_common(MIDWAY_IOASIC_BLITZ99, 494/* or 498 */, 80, SEATTLE_CONFIG);
3000	2983
3001	2984	/* speedups */
3002	2985	mips3drc_add_hotspot(machine().device("maincpu"), 0x8015773C, 0x3C038025, 250);     /* confirmed */
r21058	r21059
3007	2990	DRIVER_INIT_MEMBER(seattle_state,carnevil)
3008	2991	{
3009	2992	dcs2_init(machine(), 2, 0x0af7);
3010		init_common(machine(), MIDWAY_IOASIC_CARNEVIL, 469/* 469 or 486 or 528 */, 80, SEATTLE_CONFIG);
	2993	init_common(MIDWAY_IOASIC_CARNEVIL, 469/* 469 or 486 or 528 */, 80, SEATTLE_CONFIG);
3011	2994
3012	2995	/* set up the gun */
3013	2996	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16800000, 0x1680001f, read32_delegate(FUNC(seattle_state::carnevil_gun_r),this), write32_delegate(FUNC(seattle_state::carnevil_gun_w),this));
r21058	r21059
3021	3004	DRIVER_INIT_MEMBER(seattle_state,hyprdriv)
3022	3005	{
3023	3006	dcs2_init(machine(), 2, 0x0af7);
3024		init_common(machine(), MIDWAY_IOASIC_HYPRDRIV, 469/* unknown */, 80, SEATTLE_WIDGET_CONFIG);
	3007	init_common(MIDWAY_IOASIC_HYPRDRIV, 469/* unknown */, 80, SEATTLE_WIDGET_CONFIG);
3025	3008
3026	3009	/* speedups */
3027	3010	mips3drc_add_hotspot(machine().device("maincpu"), 0x801643BC, 0x3C03801B, 250);     /* confirmed */

trunk/src/mame/drivers/tmaster.c

r21058	r21059
138	138	UINT16 m_addr;
139	139	UINT32 m_gfx_offs;
140	140	UINT32 m_gfx_size;
141		int (*m_compute_addr) (UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high);
	141	int (tmaster_state::*m_compute_addr) (UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high);
142	142	UINT16 m_galgames_cart;
143	143	UINT32 m_palette_offset;
144	144	UINT8 m_palette_index;
r21058	r21059
185	185	DECLARE_VIDEO_START(galgames);
186	186	UINT32 screen_update_tmaster(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
187	187	TIMER_DEVICE_CALLBACK_MEMBER(tm3k_interrupt);
	188	UINT8 binary_to_BCD(UINT8 data);
	189	int tmaster_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high);
	190	int galgames_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high);
	191	void tmaster_draw();
	192	void galgames_update_rombank(UINT32 cart);
188	193	};
189	194
190	195
r21058	r21059
248	253	***************************************************************************/
249	254
250	255
251		static UINT8 binary_to_BCD(UINT8 data)
	256	UINT8 tmaster_state::binary_to_BCD(UINT8 data)
252	257	{
253	258	data %= 100;
254	259
r21058	r21059
328	333
329	334	***************************************************************************/
330	335
331		static int tmaster_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high)
	336	int tmaster_state::tmaster_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high)
332	337	{
333	338	return (reg_low & 0xff) | ((reg_mid & 0x1ff) << 8) | (reg_high << 17);
334	339	}
335	340
336		static int galgames_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high)
	341	int tmaster_state::galgames_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high)
337	342	{
338	343	return reg_low | (reg_mid << 16);
339	344	}
r21058	r21059
350	355	}
351	356	}
352	357
353		m_compute_addr = tmaster_compute_addr;
	358	m_compute_addr = &tmaster_state::tmaster_compute_addr;
354	359	}
355	360
356	361	VIDEO_START_MEMBER(tmaster_state,galgames)
357	362	{
358	363	VIDEO_START_CALL_MEMBER( tmaster );
359		m_compute_addr = galgames_compute_addr;
	364	m_compute_addr = &tmaster_state::galgames_compute_addr;
360	365	}
361	366
362	367	UINT32 tmaster_state::screen_update_tmaster(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
r21058	r21059
392	397	COMBINE_DATA( &m_addr );
393	398	}
394	399
395		static void tmaster_draw(running_machine &machine)
	400	void tmaster_state::tmaster_draw()
396	401	{
397		tmaster_state *state = machine.driver_data<tmaster_state>();
398	402	int x,y,x0,x1,y0,y1,dx,dy,flipx,flipy,sx,sy,sw,sh, addr, mode, layer,buffer, color;
399	403
400		UINT8 *gfxdata  =   state->memregion( "blitter" )->base() + state->m_gfx_offs;
	404	UINT8 *gfxdata  =   memregion( "blitter" )->base() + m_gfx_offs;
401	405
402	406	UINT16 pen;
403	407
404		buffer  =   (state->m_regs[0x02/2] >> 8) & 3;   // 1 bit per layer, selects the currently displayed buffer
405		sw      =    state->m_regs[0x04/2];
406		sx      =    state->m_regs[0x06/2];
407		sh      =    state->m_regs[0x08/2] + 1;
408		sy      =    state->m_regs[0x0a/2];
409		addr    =   (*state->m_compute_addr)(
410		state->m_regs[0x0c/2],
411		state->m_regs[0x0e/2], state->m_addr);
412		mode    =    state->m_regs[0x10/2];
	408	buffer  =   (m_regs[0x02/2] >> 8) & 3;   // 1 bit per layer, selects the currently displayed buffer
	409	sw      =    m_regs[0x04/2];
	410	sx      =    m_regs[0x06/2];
	411	sh      =    m_regs[0x08/2] + 1;
	412	sy      =    m_regs[0x0a/2];
	413	addr    =   (this->*m_compute_addr)(
	414	m_regs[0x0c/2],
	415	m_regs[0x0e/2], m_addr);
	416	mode    =    m_regs[0x10/2];
413	417
414	418	layer   =   (mode >> 7) & 1;    // layer to draw to
415	419	buffer  =   ((mode >> 6) & 1) ^ ((buffer >> layer) & 1);    // bit 6 selects whether to use the opposite buffer to that displayed
416		bitmap_ind16 &bitmap    =   state->m_bitmap[layer][buffer];
	420	bitmap_ind16 &bitmap    =   m_bitmap[layer][buffer];
417	421
418	422	addr <<= 1;
419	423
420	424	#ifdef MAME_DEBUG
421	425	#if 0
422		logerror("%s: blit w %03x, h %02x, x %03x, y %02x, src %06x, fill/addr %04x, repl/color %04x, mode %02x\n", machine.describe_context(),
423		sw,sh,sx,sy, addr, state->m_addr, state->m_color, mode
	426	logerror("%s: blit w %03x, h %02x, x %03x, y %02x, src %06x, fill/addr %04x, repl/color %04x, mode %02x\n", machine().describe_context(),
	427	sw,sh,sx,sy, addr, m_addr, m_color, mode
424	428	);
425	429	#endif
426	430	#endif
r21058	r21059
437	441	sx = (sx & 0x7fff) - (sx & 0x8000);
438	442	sy = (sy & 0x7fff) - (sy & 0x8000);
439	443
440		color = (state->m_color & 0x0f) << 8;
	444	color = (m_color & 0x0f) << 8;
441	445
442	446	switch (mode & 0x20)
443	447	{
444	448	case 0x00:                          // blit with transparency
445		if (addr > state->m_gfx_size - sw*sh)
	449	if (addr > m_gfx_size - sw*sh)
446	450	{
447		logerror("%s: blit error, addr %06x out of bounds\n", machine.describe_context(),addr);
448		addr = state->m_gfx_size - sw*sh;
	451	logerror("%s: blit error, addr %06x out of bounds\n", machine().describe_context(),addr);
	452	addr = m_gfx_size - sw*sh;
449	453	}
450	454
451	455	if ( mode & 0x200 )
452	456	{
453	457	// copy from ROM, replacing occurrences of src pen with dst pen
454	458
455		UINT8 dst_pen = (state->m_color >> 8) & 0xff;
456		UINT8 src_pen = (state->m_color >> 0) & 0xff;
	459	UINT8 dst_pen = (m_color >> 8) & 0xff;
	460	UINT8 src_pen = (m_color >> 0) & 0xff;
457	461
458	462	for (y = y0; y != y1; y += dy)
459	463	{
r21058	r21059
487	491	break;
488	492
489	493	case 0x20:                          // solid fill
490		pen = ((state->m_addr >> 8) & 0xff) + color;
	494	pen = ((m_addr >> 8) & 0xff) + color;
491	495
492	496	if ((pen & 0xff) == 0xff)
493	497	pen = 0xff;
r21058	r21059
511	515	switch (offset*2)
512	516	{
513	517	case 0x0e:
514		tmaster_draw(machine());
	518	tmaster_draw();
515	519	machine().device("maincpu")->execute().set_input_line(2, HOLD_LINE);
516	520	break;
517	521	}
r21058	r21059
669	673
670	674	// Carts (preliminary, PIC communication is not implemented)
671	675
672		static void galgames_update_rombank(running_machine &machine, UINT32 cart)
	676	void tmaster_state::galgames_update_rombank(UINT32 cart)
673	677	{
674		tmaster_state *state = machine.driver_data<tmaster_state>();
675		state->m_galgames_cart = cart;
	678	m_galgames_cart = cart;
676	679
677		state->m_gfx_offs = 0x200000 * cart;
	680	m_gfx_offs = 0x200000 * cart;
678	681
679		if (state->membank(GALGAMES_BANK_000000_R)->entry() == GALGAMES_RAM)
680		state->membank(GALGAMES_BANK_200000_R)->set_entry(GALGAMES_ROM0 + state->m_galgames_cart);  // rom
	682	if (membank(GALGAMES_BANK_000000_R)->entry() == GALGAMES_RAM)
	683	membank(GALGAMES_BANK_200000_R)->set_entry(GALGAMES_ROM0 + m_galgames_cart);  // rom
681	684
682		state->membank(GALGAMES_BANK_240000_R)->set_entry(GALGAMES_ROM0 + state->m_galgames_cart);  // rom
	685	membank(GALGAMES_BANK_240000_R)->set_entry(GALGAMES_ROM0 + m_galgames_cart);  // rom
683	686	}
684	687
685	688	WRITE16_MEMBER(tmaster_state::galgames_cart_sel_w)
r21058	r21059
703	706	case 0x03:
704	707	case 0x04:
705	708	machine().device<eeprom_device>(galgames_eeprom_names[data & 0xff])->set_cs_line(CLEAR_LINE);
706		galgames_update_rombank(machine(), data & 0xff);
	709	galgames_update_rombank(data & 0xff);
707	710	break;
708	711
709	712	default:
710	713	machine().device<eeprom_device>(galgames_eeprom_names[0])->set_cs_line(CLEAR_LINE);
711		galgames_update_rombank(machine(), 0);
	714	galgames_update_rombank(0);
712	715	logerror("%06x: unknown cart sel = %04x\n", space.device().safe_pc(), data);
713	716	break;
714	717	}
r21058	r21059
730	733	if ((data & 0xf7) == 0x05)
731	734	{
732	735	membank(GALGAMES_BANK_000000_R)->set_entry(GALGAMES_RAM);   // ram
733		galgames_update_rombank(machine(), m_galgames_cart);
	736	galgames_update_rombank(m_galgames_cart);
734	737	logerror("%06x: romram bank = %04x\n", space.device().safe_pc(), data);
735	738	}
736	739	else
r21058	r21059
972	975
973	976	membank(GALGAMES_BANK_240000_R)->set_entry(GALGAMES_ROM0);  // rom
974	977
975		galgames_update_rombank(machine(), 0);
	978	galgames_update_rombank(0);
976	979
977	980	machine().device("maincpu")->reset();
978	981	}

trunk/src/mame/drivers/zn.c

r21058	r21059
124	124	DECLARE_MACHINE_RESET(coh1002v);
125	125	DECLARE_MACHINE_RESET(coh1002m);
126	126	INTERRUPT_GEN_MEMBER(qsound_interrupt);
	127	inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
	128	inline UINT8 psxreadbyte( UINT32 *p_n_psxram, UINT32 n_address );
	129	inline void psxwritebyte( UINT32 *p_n_psxram, UINT32 n_address, UINT8 n_data );
	130	void zn_driver_init(  );
	131	void atpsx_dma_read(UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
	132	void atpsx_dma_write(UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
	133	void jdredd_vblank(screen_device &screen, bool vblank_state);
127	134	};
128	135
129		INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
	136	inline void ATTR_PRINTF(3,4) zn_state::verboselog( int n_level, const char *s_fmt, ... )
130	137	{
131	138	if( VERBOSE_LEVEL >= n_level )
132	139	{
r21058	r21059
135	142	va_start( v, s_fmt );
136	143	vsprintf( buf, s_fmt, v );
137	144	va_end( v );
138		logerror( "%s: %s", machine.describe_context(), buf );
	145	logerror( "%s: %s", machine().describe_context(), buf );
139	146	}
140	147	}
141	148
142	149	#ifdef UNUSED_FUNCTION
143		INLINE UINT8 psxreadbyte( UINT32 *p_n_psxram, UINT32 n_address )
	150	inline UINT8 zn_state::psxreadbyte( UINT32 *p_n_psxram, UINT32 n_address )
144	151	{
145	152	return *( (UINT8 *)p_n_psxram + BYTE4_XOR_LE( n_address ) );
146	153	}
147	154	#endif
148	155
149		INLINE void psxwritebyte( UINT32 *p_n_psxram, UINT32 n_address, UINT8 n_data )
	156	inline void zn_state::psxwritebyte( UINT32 *p_n_psxram, UINT32 n_address, UINT8 n_data )
150	157	{
151	158	*( (UINT8 *)p_n_psxram + BYTE4_XOR_LE( n_address ) ) = n_data;
152	159	}
r21058	r21059
312	319
313	320	READ32_MEMBER(zn_state::znsecsel_r)
314	321	{
315		verboselog( machine(), 2, "znsecsel_r( %08x, %08x )\n", offset, mem_mask );
	322	verboselog(2, "znsecsel_r( %08x, %08x )\n", offset, mem_mask );
316	323	return m_n_znsecsel;
317	324	}
318	325
r21058	r21059
324	331	m_znsec1->select( ( m_n_znsecsel >> 3 ) & 1 );
325	332	m_zndip->select( ( m_n_znsecsel & 0x8c ) != 0x8c );
326	333
327		verboselog( machine(), 2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	334	verboselog(2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
328	335	}
329	336
330	337	READ32_MEMBER(zn_state::boardconfig_r)
r21058	r21059
360	367
361	368	READ32_MEMBER(zn_state::unknown_r)
362	369	{
363		verboselog( machine(), 0, "unknown_r( %08x, %08x )\n", offset, mem_mask );
	370	verboselog(0, "unknown_r( %08x, %08x )\n", offset, mem_mask );
364	371	return 0xffffffff;
365	372	}
366	373
r21058	r21059
374	381	*/
375	382	if( ( data & ~0x23 ) != 0 )
376	383	{
377		verboselog( machine(), 0, "coin_w %08x\n", data );
	384	verboselog(0, "coin_w %08x\n", data );
378	385	}
379	386	}
380	387
r21058	r21059
406	413	static ADDRESS_MAP_START( link_map, AS_PROGRAM, 8, zn_state )
407	414	ADDRESS_MAP_END
408	415
409		static void zn_driver_init( running_machine &machine )
	416	void zn_state::zn_driver_init(  )
410	417	{
411		zn_state *state = machine.driver_data<zn_state>();
412	418	int n_game;
413	419
414	420	n_game = 0;
415	421	while( zn_config_table[ n_game ].s_name != NULL )
416	422	{
417		if( strcmp( machine.system().name, zn_config_table[ n_game ].s_name ) == 0 )
	423	if( strcmp( machine().system().name, zn_config_table[ n_game ].s_name ) == 0 )
418	424	{
419		state->m_znsec0->init( zn_config_table[ n_game ].p_n_mainsec );
420		state->m_znsec1->init( zn_config_table[ n_game ].p_n_gamesec );
	425	m_znsec0->init( zn_config_table[ n_game ].p_n_mainsec );
	426	m_znsec1->init( zn_config_table[ n_game ].p_n_gamesec );
421	427	//          psx_sio_install_handler( machine, 0, sio_pad_handler );
422	428	break;
423	429	}
r21058	r21059
591	597	READ32_MEMBER(zn_state::capcom_kickharness_r)
592	598	{
593	599	/* required for buttons 4,5&6 */
594		verboselog( machine(), 2, "capcom_kickharness_r( %08x, %08x )\n", offset, mem_mask );
	600	verboselog(2, "capcom_kickharness_r( %08x, %08x )\n", offset, mem_mask );
595	601	return 0xffffffff;
596	602	}
597	603
r21058	r21059
626	632	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank ( 0x1fb80000, 0x1fbfffff, "bank3" );     /* country rom */
627	633	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb60000, 0x1fb60003, write32_delegate(FUNC(zn_state::zn_qsound_w),this));
628	634
629		zn_driver_init(machine());
	635	zn_driver_init();
630	636
631	637	if( strcmp( machine().system().name, "glpracr" ) == 0 ||
632	638	strcmp( machine().system().name, "glpracr2l" ) == 0 )
r21058	r21059
842	848	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank ( 0x1fb80000, 0x1fbfffff, "bank3" );     /* country rom */
843	849	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb60000, 0x1fb60003, write32_delegate(FUNC(zn_state::zn_qsound_w),this));
844	850
845		zn_driver_init(machine());
	851	zn_driver_init();
846	852	}
847	853
848	854	MACHINE_RESET_MEMBER(zn_state,coh3002c)
r21058	r21059
1088	1094	{
1089	1095	device_t *mb3773 = machine().device("mb3773");
1090	1096	mb3773_set_ck(mb3773, (data & 0x20) >> 5);
1091		verboselog( machine(), 1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	1097	verboselog(1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
1092	1098	membank( "bank1" )->set_base( memregion( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) );
1093	1099	}
1094	1100
r21058	r21059
1127	1133	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1fb80000, 0x1fb80003, read32_delegate(FUNC(zn_state::taitofx1a_ymsound_r),this), write32_delegate(FUNC(zn_state::taitofx1a_ymsound_w),this));
1128	1134	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_bank( 0x1fbe0000, 0x1fbe0000 + ( m_taitofx1_eeprom_size1 - 1 ), "bank2" );
1129	1135
1130		zn_driver_init(machine());
	1136	zn_driver_init();
1131	1137	}
1132	1138
1133	1139	MACHINE_RESET_MEMBER(zn_state,coh1000ta)
r21058	r21059
1186	1192
1187	1193	WRITE32_MEMBER(zn_state::taitofx1b_volume_w)
1188	1194	{
1189		verboselog( machine(), 1, "taitofx1_volume_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	1195	verboselog(1, "taitofx1_volume_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
1190	1196	}
1191	1197
1192	1198	WRITE32_MEMBER(zn_state::taitofx1b_sound_w)
1193	1199	{
1194		verboselog( machine(), 1, "taitofx1_sound_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	1200	verboselog(1, "taitofx1_sound_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
1195	1201	}
1196	1202
1197	1203	READ32_MEMBER(zn_state::taitofx1b_sound_r)
1198	1204	{
1199	1205	UINT32 data = 0; // bit 0 = busy?
1200		verboselog( machine(), 1, "taitofx1_sound_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	1206	verboselog(1, "taitofx1_sound_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
1201	1207	return data;
1202	1208	}
1203	1209
r21058	r21059
1217	1223	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler     ( 0x1fbc0000, 0x1fbc0003, read32_delegate(FUNC(zn_state::taitofx1b_sound_r),this));
1218	1224	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_bank( 0x1fbe0000, 0x1fbe0000 + ( m_taitofx1_eeprom_size2 - 1 ), "bank3" );
1219	1225
1220		zn_driver_init(machine());
	1226	zn_driver_init();
1221	1227	}
1222	1228
1223	1229	MACHINE_RESET_MEMBER(zn_state,coh1000tb)
r21058	r21059
1354	1360	*2                  - Unpopulated DIP28 socket
1355	1361	*/
1356	1362
1357		static void atpsx_dma_read( zn_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
	1363	void zn_state::atpsx_dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
1358	1364	{
1359		device_t *ide = state->machine().device("ide");
	1365	device_t *ide = machine().device("ide");
1360	1366
1361	1367	logerror("DMA read: %d bytes (%d words) to %08x\n", n_size<<2, n_size, n_address);
1362	1368
r21058	r21059
1369	1375
1370	1376	/* dma size is in 32-bit words, convert to bytes */
1371	1377	n_size <<= 2;
1372		address_space &space = state->machine().firstcpu->space(AS_PROGRAM);
	1378	address_space &space = machine().firstcpu->space(AS_PROGRAM);
1373	1379	while( n_size > 0 )
1374	1380	{
1375	1381	psxwritebyte( p_n_psxram, n_address, ide_controller32_r( ide, space, 0x1f0 / 4, 0x000000ff ) );
r21058	r21059
1378	1384	}
1379	1385	}
1380	1386
1381		static void atpsx_dma_write( zn_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
	1387	void zn_state::atpsx_dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
1382	1388	{
1383	1389	logerror("DMA write from %08x for %d bytes\n", n_address, n_size<<2);
1384	1390	}
r21058	r21059
1393	1399	machine().device("maincpu")->memory().space(AS_PROGRAM).nop_readwrite                     ( 0x1f7e8000, 0x1f7e8003);
1394	1400	machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler( *ide, 0x1f7f4000, 0x1f7f4fff, FUNC(ide_controller32_r), FUNC(ide_controller32_w) );
1395	1401
1396		zn_driver_init(machine());
	1402	zn_driver_init();
1397	1403	}
1398	1404
1399	1405	MACHINE_RESET_MEMBER(zn_state,coh1000w)
r21058	r21059
1408	1414
1409	1415	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
1410	1416	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin10))
1411		MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( atpsx_dma_read ), (zn_state *) owner ) )
1412		MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( atpsx_dma_write ), (zn_state *) owner ) )
	1417	MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( zn_state::atpsx_dma_read ), (zn_state *) owner ) )
	1418	MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( zn_state::atpsx_dma_write ), (zn_state *) owner ) )
1413	1419	MACHINE_CONFIG_END
1414	1420
1415	1421	/*
r21058	r21059
1580	1586	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fa10300, 0x1fa10303, write32_delegate(FUNC(zn_state::coh1002e_bank_w),this));
1581	1587	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb00000, 0x1fb00007, write32_delegate(FUNC(zn_state::coh1002e_latch_w),this));
1582	1588
1583		zn_driver_init(machine());
	1589	zn_driver_init();
1584	1590	}
1585	1591
1586	1592	MACHINE_RESET_MEMBER(zn_state,coh1002e)
r21058	r21059
1722	1728	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fa10300, 0x1fa10303, write32_delegate(FUNC(zn_state::bam2_sec_w),this));
1723	1729	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb00000, 0x1fb00007, write32_delegate(FUNC(zn_state::bam2_mcu_w),this));
1724	1730
1725		zn_driver_init(machine());
	1731	zn_driver_init();
1726	1732	}
1727	1733
1728	1734	MACHINE_RESET_MEMBER(zn_state,bam2)
r21058	r21059
1963	1969	return m_jdredd_gun_mux;
1964	1970	}
1965	1971
1966		void jdredd_vblank(zn_state *state, screen_device &screen, bool vblank_state)
	1972	void zn_state::jdredd_vblank(screen_device &screen, bool vblank_state)
1967	1973	{
1968	1974	int x;
1969	1975	int y;
1970	1976
1971	1977	if( vblank_state )
1972	1978	{
1973		state->m_jdredd_gun_mux = !state->m_jdredd_gun_mux;
	1979	m_jdredd_gun_mux = !m_jdredd_gun_mux;
1974	1980
1975		if( state->m_jdredd_gun_mux == 0 )
	1981	if( m_jdredd_gun_mux == 0 )
1976	1982	{
1977		x = state->ioport("GUN1X")->read();
1978		y = state->ioport("GUN1Y")->read();
	1983	x = ioport("GUN1X")->read();
	1984	y = ioport("GUN1Y")->read();
1979	1985	}
1980	1986	else
1981	1987	{
1982		x = state->ioport("GUN2X")->read();
1983		y = state->ioport("GUN2Y")->read();
	1988	x = ioport("GUN2X")->read();
	1989	y = ioport("GUN2Y")->read();
1984	1990	}
1985	1991
1986	1992	if( x > 0x393 && x < 0xcb2 &&
1987	1993	y > 0x02d && y < 0x217 )
1988	1994	{
1989		state->m_gpu->lightgun_set( x, y );
	1995	m_gpu->lightgun_set( x, y );
1990	1996	}
1991	1997	}
1992	1998	}
1993	1999
1994	2000	WRITE32_MEMBER(zn_state::acpsx_00_w)
1995	2001	{
1996		verboselog( machine(), 0, "acpsx_00_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	2002	verboselog(0, "acpsx_00_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
1997	2003	}
1998	2004
1999	2005	WRITE32_MEMBER(zn_state::acpsx_10_w)
2000	2006	{
2001		verboselog( machine(), 0, "acpsx_10_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	2007	verboselog(0, "acpsx_10_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
2002	2008	}
2003	2009
2004	2010	WRITE32_MEMBER(zn_state::nbajamex_80_w)
2005	2011	{
2006		verboselog( machine(), 0, "nbajamex_80_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	2012	verboselog(0, "nbajamex_80_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
2007	2013	psxirq_device *psxirq = (psxirq_device *) machine().device("maincpu:irq");
2008	2014	psxirq->intin10(1);
2009	2015	}
r21058	r21059
2011	2017	READ32_MEMBER(zn_state::nbajamex_08_r)
2012	2018	{
2013	2019	UINT32 data = 0xffffffff;
2014		verboselog( machine(), 0, "nbajamex_08_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	2020	verboselog(0, "nbajamex_08_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
2015	2021	return data;
2016	2022	}
2017	2023
2018	2024	READ32_MEMBER(zn_state::nbajamex_80_r)
2019	2025	{
2020	2026	UINT32 data = 0xffffffff;
2021		verboselog( machine(), 0, "nbajamex_80_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	2027	verboselog(0, "nbajamex_80_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
2022	2028	return data;
2023	2029	}
2024	2030
r21058	r21059
2048	2054	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x1fbfff90, 0x1fbfff9f, read32_delegate(FUNC(zn_state::jdredd_ide_r),this), write32_delegate(FUNC(zn_state::jdredd_ide_w),this) );
2049	2055	}
2050	2056
2051		zn_driver_init(machine());
	2057	zn_driver_init();
2052	2058	}
2053	2059
2054	2060	MACHINE_RESET_MEMBER(zn_state,coh1000a)
r21058	r21059
2069	2075	static MACHINE_CONFIG_DERIVED( coh1000a_ide, zn1_2mb_vram )
2070	2076
2071	2077	MCFG_DEVICE_MODIFY( "gpu" )
2072		MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( jdredd_vblank ), (zn_state *) owner ) )
	2078	MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( zn_state::jdredd_vblank ), (zn_state *) owner ) )
2073	2079
2074	2080	MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000a )
2075	2081
r21058	r21059
2203	2209	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank ( 0x1f000000, 0x1f7fffff, "bank1" ); /* banked rom */
2204	2210	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb00000, 0x1fb00003, write32_delegate(FUNC(zn_state::coh1001l_bnk_w),this) );
2205	2211
2206		zn_driver_init(machine());
	2212	zn_driver_init();
2207	2213	}
2208	2214
2209	2215	MACHINE_RESET_MEMBER(zn_state,coh1001l)
r21058	r21059
2245	2251	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank ( 0x1fb00000, 0x1fbfffff, "bank2" );
2246	2252	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb00000, 0x1fb00003, write32_delegate(FUNC(zn_state::coh1002v_bnk_w),this));
2247	2253
2248		zn_driver_init(machine());
	2254	zn_driver_init();
2249	2255	}
2250	2256
2251	2257	MACHINE_RESET_MEMBER(zn_state,coh1002v)
r21058	r21059
2418	2424
2419	2425	WRITE32_MEMBER(zn_state::coh1002m_bank_w)
2420	2426	{
2421		verboselog( machine(), 1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	2427	verboselog(1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
2422	2428	membank( "bank1" )->set_base( memregion( "user2" )->base() + ((data>>16) * 0x800000) );
2423	2429	}
2424	2430
r21058	r21059
2447	2453	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1fb00000, 0x1fb00003, read32_delegate(FUNC(zn_state::cbaj_z80_r),this), write32_delegate(FUNC(zn_state::cbaj_z80_w),this));
2448	2454	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler    ( 0x1fb00004, 0x1fb00007, write32_delegate(FUNC(zn_state::coh1002m_bank_w),this));
2449	2455
2450		zn_driver_init(machine());
	2456	zn_driver_init();
2451	2457	}
2452	2458
2453	2459	MACHINE_RESET_MEMBER(zn_state,coh1002m)

trunk/src/mame/drivers/viper.c

r21058	r21059
351	351	INTERRUPT_GEN_MEMBER(viper_vblank);
352	352	TIMER_CALLBACK_MEMBER(epic_global_timer_callback);
353	353	TIMER_CALLBACK_MEMBER(ds2430_timer_callback);
	354	const char* epic_get_register_name(UINT32 reg);
	355	void epic_update_interrupts();
	356	void mpc8240_interrupt(int irq);
	357	void mpc8240_epic_init();
	358	void mpc8240_epic_reset(void);
	359	int ds2430_insert_cmd_bit(int bit);
	360	void DS2430_w(int bit);
354	361	};
355	362
356	363	UINT32 viper_state::screen_update_viper(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
r21058	r21059
454	461	/*****************************************************************************/
455	462	// MPC8240 Embedded Programmable Interrupt Controller (EPIC)
456	463
457		static void mpc8240_interrupt(running_machine &machine, int irq);
458
459	464	#define MPC8240_IRQ0                0
460	465	#define MPC8240_IRQ1                1
461	466	#define MPC8240_IRQ2                2
r21058	r21059
530	535	static MPC8240_EPIC epic;
531	536
532	537	#if VIPER_DEBUG_EPIC_REGS
533		static const char* epic_get_register_name(UINT32 reg)
	538	const viper_state::char* epic_get_register_name(UINT32 reg)
534	539	{
535	540	switch (reg >> 16)
536	541	{
r21058	r21059
663	668	epic.global_timer[timer_num].timer->reset();
664	669	}
665	670
666		mpc8240_interrupt(machine(), MPC8240_GTIMER0_IRQ + timer_num);
	671	mpc8240_interrupt(MPC8240_GTIMER0_IRQ + timer_num);
667	672	}
668	673
669	674
670		static void epic_update_interrupts(running_machine &machine)
	675	void viper_state::epic_update_interrupts()
671	676	{
672	677	int i;
673	678
r21058	r21059
709	714	printf("vector = %02X\n", epic.iack);
710	715	#endif
711	716
712		machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
	717	machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
713	718	}
714	719	else
715	720	{
716		machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
	721	machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
717	722	}
718	723	}
719	724
r21058	r21059
783	788	if (epic.i2c_cr & 0x40)
784	789	{
785	790	printf("I2C interrupt\n");
786		mpc8240_interrupt(machine(), MPC8240_I2C_IRQ);
	791	mpc8240_interrupt(MPC8240_I2C_IRQ);
787	792
788	793	// set interrupt flag in status register
789	794	epic.i2c_sr |= 0x2;
r21058	r21059
802	807	/*if (epic.i2c_cr & 0x40)
803	808	{
804	809	printf("I2C interrupt\n");
805		mpc8240_interrupt(machine, MPC8240_I2C_IRQ);
	810	mpc8240_interrupt(MPC8240_I2C_IRQ);
806	811
807	812	// set interrupt flag in status register
808	813	epic.i2c_sr |= 0x2;
r21058	r21059
886	891	{
887	892	case 0x00a0:            // Offset 0x600A0 - IACK
888	893	{
889		epic_update_interrupts(machine());
	894	epic_update_interrupts();
890	895
891	896	if (epic.active_irq >= 0)
892	897	{
r21058	r21059
988	993	#if VIPER_DEBUG_EPIC_I2C
989	994	printf("I2C interrupt\n");
990	995	#endif
991		mpc8240_interrupt(machine(), MPC8240_I2C_IRQ);
	996	mpc8240_interrupt(MPC8240_I2C_IRQ);
992	997
993	998	// set interrupt flag in status register
994	999	epic.i2c_sr |= 0x2;
r21058	r21059
1010	1015	#if VIPER_DEBUG_EPIC_I2C
1011	1016	printf("I2C interrupt\n");
1012	1017	#endif
1013		mpc8240_interrupt(machine(), MPC8240_I2C_IRQ);
	1018	mpc8240_interrupt(MPC8240_I2C_IRQ);
1014	1019
1015	1020	// set interrupt flag in status register
1016	1021	epic.i2c_sr |= 0x2;
r21058	r21059
1051	1056	epic.irq[MPC8240_GTIMER0_IRQ + timer_num].priority = (data >> 16) & 0xf;
1052	1057	epic.irq[MPC8240_GTIMER0_IRQ + timer_num].vector = data & 0xff;
1053	1058
1054		epic_update_interrupts(machine());
	1059	epic_update_interrupts();
1055	1060	break;
1056	1061	}
1057	1062	case 0x1130:            // Offset 0x41130 - Global timer 0 destination register
r21058	r21059
1063	1068
1064	1069	epic.irq[MPC8240_GTIMER0_IRQ + timer_num].destination = data & 0x1;
1065	1070
1066		epic_update_interrupts(machine());
	1071	epic_update_interrupts();
1067	1072	break;
1068	1073	}
1069	1074	case 0x1110:            // Offset 0x41110 - Global timer 0 base count register
r21058	r21059
1123	1128	epic.irq[MPC8240_IRQ0 + irq].priority = (data >> 16) & 0xf;
1124	1129	epic.irq[MPC8240_IRQ0 + irq].vector = data & 0xff;
1125	1130
1126		epic_update_interrupts(machine());
	1131	epic_update_interrupts();
1127	1132	break;
1128	1133	}
1129	1134	case 0x1020:            // Offset 0x51020 - I2C IRQ vector/priority register
r21058	r21059
1132	1137	epic.irq[MPC8240_I2C_IRQ].priority = (data >> 16) & 0xf;
1133	1138	epic.irq[MPC8240_I2C_IRQ].vector = data & 0xff;
1134	1139
1135		epic_update_interrupts(machine());
	1140	epic_update_interrupts();
1136	1141	break;
1137	1142	}
1138	1143	case 0x0210:            // Offset 0x50210 - IRQ0 destination register
r21058	r21059
1156	1161
1157	1162	epic.irq[MPC8240_IRQ0 + irq].destination = data & 0x1;
1158	1163
1159		epic_update_interrupts(machine());
	1164	epic_update_interrupts();
1160	1165	break;
1161	1166	}
1162	1167	case 0x1030:            // Offset 0x51030 - I2C IRQ destination register
1163	1168	{
1164	1169	epic.irq[MPC8240_I2C_IRQ].destination = data & 0x1;
1165		epic_update_interrupts(machine());
	1170	epic_update_interrupts();
1166	1171	break;
1167	1172	}
1168	1173	}
r21058	r21059
1182	1187	epic.irq[epic.active_irq].active = 0;
1183	1188	epic.active_irq = -1;
1184	1189
1185		epic_update_interrupts(machine());
	1190	epic_update_interrupts();
1186	1191	break;
1187	1192	}
1188	1193	break;
r21058	r21059
1200	1205	}
1201	1206	*/
1202	1207
1203		static void mpc8240_interrupt(running_machine &machine, int irq)
	1208	void viper_state::mpc8240_interrupt(int irq)
1204	1209	{
1205	1210	epic.irq[irq].pending = 1;
1206		epic_update_interrupts(machine);
	1211	epic_update_interrupts();
1207	1212	}
1208	1213
1209		static void mpc8240_epic_init(running_machine &machine)
	1214	void viper_state::mpc8240_epic_init()
1210	1215	{
1211		viper_state *state = machine.driver_data<viper_state>();
1212		epic.global_timer[0].timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),state));
1213		epic.global_timer[1].timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),state));
1214		epic.global_timer[2].timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),state));
1215		epic.global_timer[3].timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),state));
	1216	epic.global_timer[0].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),this));
	1217	epic.global_timer[1].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),this));
	1218	epic.global_timer[2].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),this));
	1219	epic.global_timer[3].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),this));
1216	1220	}
1217	1221
1218		static void mpc8240_epic_reset(void)
	1222	void viper_state::mpc8240_epic_reset(void)
1219	1223	{
1220	1224	int i;
1221	1225
r21058	r21059
1706	1710	}
1707	1711
1708	1712
1709		static int ds2430_insert_cmd_bit(int bit)
	1713	int viper_state::ds2430_insert_cmd_bit(int bit)
1710	1714	{
1711	1715	ds2430_data <<= 1;
1712	1716	ds2430_data |= bit & 1;
r21058	r21059
1722	1726	return 0;
1723	1727	}
1724	1728
1725		static void DS2430_w(int bit)
	1729	void viper_state::DS2430_w(int bit)
1726	1730	{
1727	1731	switch (ds2430_state)
1728	1732	{
r21058	r21059
1986	1990
1987	1991	INTERRUPT_GEN_MEMBER(viper_state::viper_vblank)
1988	1992	{
1989		mpc8240_interrupt(machine(), MPC8240_IRQ0);
	1993	mpc8240_interrupt(MPC8240_IRQ0);
1990	1994	//mpc8240_interrupt(device.machine, MPC8240_IRQ3);
1991	1995	}
1992	1996
1993	1997	static void voodoo_vblank(device_t *device, int state)
1994	1998	{
1995		mpc8240_interrupt(device->machine(), MPC8240_IRQ4);
	1999	viper_state *drvstate = device->machine().driver_data<viper_state>();
	2000	drvstate->mpc8240_interrupt(MPC8240_IRQ4);
1996	2001	}
1997	2002
1998	2003	void viper_state::machine_start()
1999	2004	{
2000	2005	ds2430_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::ds2430_timer_callback),this));
2001	2006	ds2430_bit_timer = machine().device<timer_device>("ds2430_timer2");
2002		mpc8240_epic_init(machine());
	2007	mpc8240_epic_init();
2003	2008
2004	2009	/* set conservative DRC options */
2005	2010	ppcdrc_set_options(machine().device("maincpu"), PPCDRC_COMPATIBLE_OPTIONS);

trunk/src/mame/drivers/namcos12.c

r21058	r21059
1096	1096	DECLARE_DRIVER_INIT(ghlpanic);
1097	1097	DECLARE_DRIVER_INIT(ptblank2);
1098	1098	DECLARE_MACHINE_RESET(namcos12);
	1099	inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
	1100	void namcos12_rom_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
	1101	void namcos12_sub_irq( screen_device &screen, bool vblank_state );
	1102	void system11gun_install(  );
1099	1103	};
1100	1104
1101		INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
	1105	inline void ATTR_PRINTF(3,4) namcos12_state::verboselog( int n_level, const char *s_fmt, ... )
1102	1106	{
1103	1107	if( VERBOSE_LEVEL >= n_level )
1104	1108	{
r21058	r21059
1107	1111	va_start( v, s_fmt );
1108	1112	vsprintf( buf, s_fmt, v );
1109	1113	va_end( v );
1110		logerror( "%s: %s", machine.describe_context(), buf );
	1114	logerror( "%s: %s", machine().describe_context(), buf );
1111	1115	}
1112	1116	}
1113	1117
1114	1118	WRITE32_MEMBER(namcos12_state::sharedram_w)
1115	1119	{
1116		verboselog( machine(), 1, "sharedram_w( %08x, %08x, %08x )\n", ( offset * 4 ), data, mem_mask );
	1120	verboselog(1, "sharedram_w( %08x, %08x, %08x )\n", ( offset * 4 ), data, mem_mask );
1117	1121	COMBINE_DATA( &m_sharedram[ offset ] );
1118	1122	}
1119	1123
1120	1124	READ32_MEMBER(namcos12_state::sharedram_r)
1121	1125	{
1122		verboselog( machine(), 1, "sharedram_r( %08x, %08x ) %08x\n", ( offset * 4 ), mem_mask, m_sharedram[ offset ] );
	1126	verboselog(1, "sharedram_r( %08x, %08x ) %08x\n", ( offset * 4 ), mem_mask, m_sharedram[ offset ] );
1123	1127	return m_sharedram[ offset ];
1124	1128	}
1125	1129
r21058	r21059
1159	1163
1160	1164	membank( "bank1" )->set_entry( m_n_bankoffset );
1161	1165
1162		verboselog( machine(), 1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_bankoffset );
	1166	verboselog(1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_bankoffset );
1163	1167	}
1164	1168
1165	1169	WRITE32_MEMBER(namcos12_state::dmaoffset_w)
r21058	r21059
1172	1176	{
1173	1177	m_n_dmaoffset = ( ( offset * 4 ) + 2 ) | ( data & 0xffff0000 );
1174	1178	}
1175		verboselog( machine(), 1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_dmaoffset );
	1179	verboselog(1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_dmaoffset );
1176	1180	}
1177	1181
1178		static void namcos12_rom_read( namcos12_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
	1182	void namcos12_state::namcos12_rom_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
1179	1183	{
1180	1184	const char *n_region;
1181	1185	int n_offset;
r21058	r21059
1187	1191	INT32 n_ramleft;
1188	1192
1189	1193	// TODO: the check for going past the end of ram should be in dma.c
1190		UINT32 m_n_psxramsize = state->memshare("share1")->bytes();
	1194	UINT32 m_n_psxramsize = memshare("share1")->bytes();
1191	1195
1192		if(state->m_has_tektagt_dma && !state->m_n_dmaoffset)
	1196	if(m_has_tektagt_dma && !m_n_dmaoffset)
1193	1197	{
1194	1198	n_region = "user2";
1195		n_offset = state->m_n_tektagdmaoffset & 0x7fffffff;
1196		verboselog( state->machine(), 1, "namcos12_rom_read( %08x, %08x ) tektagt %08x\n", n_address, n_size, n_offset );
	1199	n_offset = m_n_tektagdmaoffset & 0x7fffffff;
	1200	verboselog(1, "namcos12_rom_read( %08x, %08x ) tektagt %08x\n", n_address, n_size, n_offset );
1197	1201	}
1198		else if( ( state->m_n_dmaoffset >= 0x80000000 ) || ( state->m_n_dmabias == 0x1f300000 ) )
	1202	else if( ( m_n_dmaoffset >= 0x80000000 ) || ( m_n_dmabias == 0x1f300000 ) )
1199	1203	{
1200	1204	n_region = "user1";
1201		n_offset = state->m_n_dmaoffset & 0x003fffff;
1202		verboselog( state->machine(), 1, "namcos12_rom_read( %08x, %08x ) boot %08x\n", n_address, n_size, n_offset );
	1205	n_offset = m_n_dmaoffset & 0x003fffff;
	1206	verboselog(1, "namcos12_rom_read( %08x, %08x ) boot %08x\n", n_address, n_size, n_offset );
1203	1207	}
1204	1208	else
1205	1209	{
1206	1210	n_region = "user2";
1207		n_offset = state->m_n_dmaoffset & 0x7fffffff;
1208		verboselog( state->machine(), 1, "namcos12_rom_read( %08x, %08x ) game %08x\n", n_address, n_size, n_offset );
	1211	n_offset = m_n_dmaoffset & 0x7fffffff;
	1212	verboselog(1, "namcos12_rom_read( %08x, %08x ) game %08x\n", n_address, n_size, n_offset );
1209	1213	}
1210	1214
1211		source = (UINT16 *) state->memregion( n_region )->base();
1212		n_romleft = ( state->memregion( n_region )->bytes() - n_offset ) / 4;
	1215	source = (UINT16 *) memregion( n_region )->base();
	1216	n_romleft = ( memregion( n_region )->bytes() - n_offset ) / 4;
1213	1217	if( n_size > n_romleft )
1214	1218	{
1215		verboselog( state->machine(), 1, "namcos12_rom_read dma truncated %d to %d passed end of rom\n", n_size, n_romleft );
	1219	verboselog(1, "namcos12_rom_read dma truncated %d to %d passed end of rom\n", n_size, n_romleft );
1216	1220	n_size = n_romleft;
1217	1221	}
1218	1222
r21058	r21059
1221	1225	n_ramleft = ( m_n_psxramsize - n_address ) / 4;
1222	1226	if( n_size > n_ramleft )
1223	1227	{
1224		verboselog( state->machine(), 1, "namcos12_rom_read dma truncated %d to %d passed end of ram\n", n_size, n_ramleft );
	1228	verboselog(1, "namcos12_rom_read dma truncated %d to %d passed end of ram\n", n_size, n_ramleft );
1225	1229	n_size = n_ramleft;
1226	1230	}
1227	1231
r21058	r21059
1238	1242	}
1239	1243	}
1240	1244
1241		static void namcos12_sub_irq( namcos12_state *state, screen_device &screen, bool vblank_state )
	1245	void namcos12_state::namcos12_sub_irq( screen_device &screen, bool vblank_state )
1242	1246	{
1243		irq1_line_pulse( state->machine().device( "sub" ) );
	1247	irq1_line_pulse( *machine().device( "sub" ) );
1244	1248	}
1245	1249
1246	1250	WRITE32_MEMBER(namcos12_state::s12_dma_bias_w)
r21058	r21059
1279	1283	output_set_value("P2_Start_lamp", (~data & 0x04)>>2);
1280	1284
1281	1285
1282		verboselog( machine(), 1, "system11gun_w: outputs (%08x %08x)\n", data, mem_mask );
	1286	verboselog(1, "system11gun_w: outputs (%08x %08x)\n", data, mem_mask );
1283	1287	}
1284	1288	if( ACCESSING_BITS_16_31 )
1285	1289	{
1286		verboselog( machine(), 2, "system11gun_w: start reading (%08x %08x)\n", data, mem_mask );
	1290	verboselog(2, "system11gun_w: start reading (%08x %08x)\n", data, mem_mask );
1287	1291	}
1288	1292	}
1289	1293
r21058	r21059
1305	1309	data = ( ioport("LIGHT1_Y")->read() ) | ( ( ioport("LIGHT1_Y")->read() + 1 ) << 16 );
1306	1310	break;
1307	1311	}
1308		verboselog( machine(), 2, "system11gun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
	1312	verboselog(2, "system11gun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
1309	1313	return data;
1310	1314	}
1311	1315
1312		static void system11gun_install( running_machine &machine )
	1316	void namcos12_state::system11gun_install(  )
1313	1317	{
1314		namcos12_state *state = machine.driver_data<namcos12_state>();
1315		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f788000, 0x1f788003, write32_delegate(FUNC(namcos12_state::system11gun_w),state));
1316		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler (0x1f780000, 0x1f78000f, read32_delegate(FUNC(namcos12_state::system11gun_r),state));
	1318	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f788000, 0x1f788003, write32_delegate(FUNC(namcos12_state::system11gun_w),this));
	1319	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler (0x1f780000, 0x1f78000f, read32_delegate(FUNC(namcos12_state::system11gun_r),this));
1317	1320	}
1318	1321
1319	1322	WRITE32_MEMBER(namcos12_state::kcoff_w)
r21058	r21059
1606	1609	/* patch out wait for dma 5 to complete */
1607	1610	*( (UINT32 *)( memregion( "user1" )->base() + 0x331c4 ) ) = 0;
1608	1611
1609		system11gun_install(machine());
	1612	system11gun_install();
1610	1613	}
1611	1614
1612	1615	DRIVER_INIT_MEMBER(namcos12_state,ghlpanic)
1613	1616	{
1614	1617	DRIVER_INIT_CALL(namcos12);
1615	1618
1616		system11gun_install(machine());
	1619	system11gun_install();
1617	1620	}
1618	1621
1619	1622	static MACHINE_CONFIG_START( coh700, namcos12_state )
r21058	r21059
1621	1624	MCFG_CPU_ADD( "maincpu", CXD8661R, XTAL_100MHz )
1622	1625	MCFG_CPU_PROGRAM_MAP( namcos12_map)
1623	1626
1624		MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( namcos12_rom_read ), (namcos12_state *) owner ) )
	1627	MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( namcos12_state::namcos12_rom_read ), (namcos12_state *) owner ) )
1625	1628
1626	1629	MCFG_CPU_ADD("sub", H83002, 16737350 )
1627	1630	MCFG_CPU_PROGRAM_MAP( s12h8rwmap)
r21058	r21059
1633	1636
1634	1637	/* video hardware */
1635	1638	MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8654Q, 0x200000, XTAL_53_693175MHz )
1636		MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( namcos12_sub_irq ), (namcos12_state *) owner ) )
	1639	MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( namcos12_state::namcos12_sub_irq ), (namcos12_state *) owner ) )
1637	1640
1638	1641	/* sound hardware */
1639	1642	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")

trunk/src/mame/drivers/ksys573.c

r21058	r21059
557	557	int m_atapi_xfermod;
558	558
559	559	UINT32 m_n_security_control;
560		void (*m_security_callback)( running_machine &machine, int data );
	560	void (ksys573_state::*m_security_callback)( int data );
561	561
562	562	UINT8 m_gx700pwbf_output_data[ 4 ];
563		void (*m_gx700pwfbf_output_callback)( running_machine &machine, int offset, int data );
	563	void (ksys573_state::*m_gx700pwfbf_output_callback)( int offset, int data );
564	564	UINT16 m_gx894pwbba_output_data[ 8 ];
565		void (*m_gx894pwbba_output_callback)( running_machine &machine, int offset, int data );
	565	void (ksys573_state::*m_gx894pwbba_output_callback)( int offset, int data );
566	566
567	567	UINT32 m_stage_mask;
568	568	struct
r21058	r21059
645	645	DECLARE_DRIVER_INIT(konami573);
646	646	DECLARE_MACHINE_RESET(konami573);
647	647	TIMER_CALLBACK_MEMBER(atapi_xfer_end);
	648	inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
	649	void atapi_init();
	650	void cdrom_dma_read( UINT32 *ram, UINT32 n_address, INT32 n_size );
	651	void cdrom_dma_write( UINT32 *ram, UINT32 n_address, INT32 n_size );
	652	void flash_init(  );
	653	void update_mode(  );
	654	void sys573_vblank(screen_device &screen, bool vblank_state);
	655	void gx700pwbf_output( int offset, UINT8 data );
	656	void gx700pwfbf_init( void (ksys573_state::*output_callback_func)( int offset, int data ) );
	657	void gn845pwbb_do_w( int offset, int data );
	658	void gn845pwbb_clk_w( int offset, int data );
	659	void gn845pwbb_output_callback( int offset, int data );
	660	char *binary( char *s, UINT32 data );
	661	void gx894pwbba_output( int offset, UINT8 data );
	662	void gx894pwbba_init( void (ksys573_state::*output_callback_func)( int offset, int data ) );
	663	void ddrsolo_output_callback( int offset, int data );
	664	void drmn_output_callback( int offset, int data );
	665	void dmx_output_callback( int offset, int data );
	666	void salarymc_lamp_callback( int data );
	667	void hyperbbc_lamp_callback( int data );
	668	void mamboagg_output_callback( int offset, int data );
	669	void punchmania_output_callback( int offset, int data );
648	670	};
649	671
650		INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
	672	void ATTR_PRINTF(3,4) ksys573_state::verboselog( int n_level, const char *s_fmt, ... )
651	673	{
652	674	if( VERBOSE_LEVEL >= n_level )
653	675	{
r21058	r21059
656	678	va_start( v, s_fmt );
657	679	vsprintf( buf, s_fmt, v );
658	680	va_end( v );
659		logerror( "%s: %s", machine.describe_context(), buf );
	681	logerror( "%s: %s", machine().describe_context(), buf );
660	682	}
661	683	}
662	684
663	685	WRITE32_MEMBER(ksys573_state::mb89371_w)
664	686	{
665		verboselog( machine(), 2, "mb89371_w %08x %08x %08x\n", offset, mem_mask, data );
	687	verboselog(2, "mb89371_w %08x %08x %08x\n", offset, mem_mask, data );
666	688	}
667	689
668	690	READ32_MEMBER(ksys573_state::mb89371_r)
669	691	{
670	692	UINT32 data = 0xffffffff;
671		verboselog( machine(), 2, "mb89371_r %08x %08x %08x\n", offset, mem_mask, data );
	693	verboselog(2, "mb89371_r %08x %08x %08x\n", offset, mem_mask, data );
672	694	return data;
673	695	}
674	696
r21058	r21059
698	720	data |= ( 1 << 27 );
699	721	}
700	722
701		verboselog( machine(), 2, "jamma_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
	723	verboselog(2, "jamma_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
702	724
703	725	return data;
704	726	}
705	727
706	728	READ32_MEMBER(ksys573_state::control_r)
707	729	{
708		verboselog( machine(), 2, "control_r( %08x, %08x ) %08x\n", offset, mem_mask, m_control );
	730	verboselog(2, "control_r( %08x, %08x ) %08x\n", offset, mem_mask, m_control );
709	731
710	732	return m_control;
711	733	}
r21058	r21059
718	740	COMBINE_DATA(&m_control);
719	741	control = m_control;
720	742
721		verboselog( machine(), 2, "control_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
	743	verboselog(2, "control_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
722	744
723	745	m_flash_bank = -1;
724	746
r21058	r21059
730	752	if( m_flash_device[0][0] != NULL && ( control & ~0x43 ) == 0x00 )
731	753	{
732	754	m_flash_bank = (0 << 8) + ( ( control & 3 ) * 2 );
733		if( m_flash_bank != old_bank ) verboselog( machine(), 1, "onboard %d\n", control & 3 );
	755	if( m_flash_bank != old_bank ) verboselog(1, "onboard %d\n", control & 3 );
734	756	}
735	757	else if( m_flash_device[1][0] != NULL && ( control & ~0x47 ) == 0x10 )
736	758	{
737	759	m_flash_bank = (1 << 8) + ( ( control & 7 ) * 2 );
738		if( m_flash_bank != old_bank ) verboselog( machine(), 1, "pccard1 %d\n", control & 7 );
	760	if( m_flash_bank != old_bank ) verboselog(1, "pccard1 %d\n", control & 7 );
739	761	}
740	762	else if( m_flash_device[2][0] != NULL && ( control & ~0x47 ) == 0x20 )
741	763	{
742	764	m_flash_bank = (2 << 8) + ( ( control & 7 ) * 2 );
743		if( m_flash_bank != old_bank ) verboselog( machine(), 1, "pccard2 %d\n", control & 7 );
	765	if( m_flash_bank != old_bank ) verboselog(1, "pccard2 %d\n", control & 7 );
744	766	}
745	767	else if( m_flash_device[3][0] != NULL && ( control & ~0x47 ) == 0x20 )
746	768	{
747	769	m_flash_bank = (3 << 8) + ( ( control & 7 ) * 2 );
748		if( m_flash_bank != old_bank ) verboselog( machine(), 1, "pccard3 %d\n", control & 7 );
	770	if( m_flash_bank != old_bank ) verboselog(1, "pccard3 %d\n", control & 7 );
749	771	}
750	772	else if( m_flash_device[4][0] != NULL && ( control & ~0x47 ) == 0x28 )
751	773	{
752	774	m_flash_bank = (4 << 8) + ( ( control & 7 ) * 2 );
753		if( m_flash_bank != old_bank ) verboselog( machine(), 1, "pccard4 %d\n", control & 7 );
	775	if( m_flash_bank != old_bank ) verboselog(1, "pccard4 %d\n", control & 7 );
754	776	}
755	777	}
756	778
r21058	r21059
763	785
764	786	m_atapi_timer->adjust(attotime::never);
765	787
766		//  verboselog( machine(), 2, "atapi_xfer_end( %d ) atapi_xferlen = %d, atapi_xfermod=%d\n", x, atapi_xfermod, atapi_xferlen );
	788	//  verboselog(2, "atapi_xfer_end( %d ) atapi_xferlen = %d, atapi_xfermod=%d\n", x, atapi_xfermod, atapi_xferlen );
767	789
768	790	//  mame_printf_debug("ATAPI: xfer_end.  xferlen = %d, atapi_xfermod = %d\n", atapi_xferlen, atapi_xfermod);
769	791
r21058	r21059
818	840
819	841	m_psxirq->intin10(1);
820	842
821		verboselog( machine(), 2, "atapi_xfer_end: %d %d\n", m_atapi_xferlen, m_atapi_xfermod );
	843	verboselog(2, "atapi_xfer_end: %d %d\n", m_atapi_xferlen, m_atapi_xfermod );
822	844	}
823	845
824	846	READ32_MEMBER(ksys573_state::atapi_r)
r21058	r21059
851	873	m_atapi_xfermod = 0;
852	874	}
853	875
854		verboselog( machine(), 2, "atapi_r: atapi_xferlen=%d\n", m_atapi_xferlen );
	876	verboselog(2, "atapi_r: atapi_xferlen=%d\n", m_atapi_xferlen );
855	877	if( m_atapi_xferlen != 0 )
856	878	{
857	879	atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_SERVDSC;
r21058	r21059
876	898	data |= ( m_atapi_data[m_atapi_data_ptr++] << 8 );
877	899	if( m_atapi_data_ptr >= m_atapi_data_len )
878	900	{
879		//              verboselog( machine(), 2, "atapi_r: read all bytes\n" );
	901	//              verboselog(2, "atapi_r: read all bytes\n" );
880	902	m_atapi_data_ptr = 0;
881	903	m_atapi_data_len = 0;
882	904
r21058	r21059
909	931	switch( reg )
910	932	{
911	933	case ATAPI_REG_DATA:
912		verboselog( machine(), 1, "atapi_r: data=%02x\n", data );
	934	verboselog(1, "atapi_r: data=%02x\n", data );
913	935	break;
914	936	case ATAPI_REG_ERRFEAT:
915		verboselog( machine(), 1, "atapi_r: errfeat=%02x\n", data );
	937	verboselog(1, "atapi_r: errfeat=%02x\n", data );
916	938	break;
917	939	case ATAPI_REG_INTREASON:
918		verboselog( machine(), 1, "atapi_r: intreason=%02x\n", data );
	940	verboselog(1, "atapi_r: intreason=%02x\n", data );
919	941	break;
920	942	case ATAPI_REG_SAMTAG:
921		verboselog( machine(), 1, "atapi_r: samtag=%02x\n", data );
	943	verboselog(1, "atapi_r: samtag=%02x\n", data );
922	944	break;
923	945	case ATAPI_REG_COUNTLOW:
924		verboselog( machine(), 1, "atapi_r: countlow=%02x\n", data );
	946	verboselog(1, "atapi_r: countlow=%02x\n", data );
925	947	break;
926	948	case ATAPI_REG_COUNTHIGH:
927		verboselog( machine(), 1, "atapi_r: counthigh=%02x\n", data );
	949	verboselog(1, "atapi_r: counthigh=%02x\n", data );
928	950	break;
929	951	case ATAPI_REG_DRIVESEL:
930		verboselog( machine(), 1, "atapi_r: drivesel=%02x\n", data );
	952	verboselog(1, "atapi_r: drivesel=%02x\n", data );
931	953	break;
932	954	case ATAPI_REG_CMDSTATUS:
933		verboselog( machine(), 1, "atapi_r: cmdstatus=%02x\n", data );
	955	verboselog(1, "atapi_r: cmdstatus=%02x\n", data );
934	956	break;
935	957	}
936	958
r21058	r21059
939	961	data <<= shift;
940	962	}
941	963
942		verboselog( machine(), 2, "atapi_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
	964	verboselog(2, "atapi_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
943	965	return data;
944	966	}
945	967
r21058	r21059
949	971	UINT8 *atapi_data = m_atapi_data;
950	972	int reg;
951	973
952		verboselog( machine(), 2, "atapi_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
	974	verboselog(2, "atapi_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
953	975
954	976	if (mem_mask == 0x0000ffff) // word-wide command write
955	977	{
956		verboselog( machine(), 2, "atapi_w: data=%04x\n", data );
	978	verboselog(2, "atapi_w: data=%04x\n", data );
957	979
958	980	//      mame_printf_debug("ATAPI: packet write %04x\n", data);
959	981	atapi_data[m_atapi_data_ptr++] = data & 0xff;
r21058	r21059
979	1001	{
980	1002	int phase;
981	1003
982		verboselog( machine(), 2, "atapi_w: command %02x\n", atapi_data[0]&0xff );
	1004	verboselog(2, "atapi_w: command %02x\n", atapi_data[0]&0xff );
983	1005
984	1006	// reset data pointer for reading SCSI results
985	1007	m_atapi_data_ptr = 0;
r21058	r21059
1066	1088	switch( reg )
1067	1089	{
1068	1090	case ATAPI_REG_DATA:
1069		verboselog( machine(), 1, "atapi_w: data=%02x\n", data );
	1091	verboselog(1, "atapi_w: data=%02x\n", data );
1070	1092	break;
1071	1093	case ATAPI_REG_ERRFEAT:
1072		verboselog( machine(), 1, "atapi_w: errfeat=%02x\n", data );
	1094	verboselog(1, "atapi_w: errfeat=%02x\n", data );
1073	1095	break;
1074	1096	case ATAPI_REG_INTREASON:
1075		verboselog( machine(), 1, "atapi_w: intreason=%02x\n", data );
	1097	verboselog(1, "atapi_w: intreason=%02x\n", data );
1076	1098	break;
1077	1099	case ATAPI_REG_SAMTAG:
1078		verboselog( machine(), 1, "atapi_w: samtag=%02x\n", data );
	1100	verboselog(1, "atapi_w: samtag=%02x\n", data );
1079	1101	break;
1080	1102	case ATAPI_REG_COUNTLOW:
1081		verboselog( machine(), 1, "atapi_w: countlow=%02x\n", data );
	1103	verboselog(1, "atapi_w: countlow=%02x\n", data );
1082	1104	break;
1083	1105	case ATAPI_REG_COUNTHIGH:
1084		verboselog( machine(), 1, "atapi_w: counthigh=%02x\n", data );
	1106	verboselog(1, "atapi_w: counthigh=%02x\n", data );
1085	1107	break;
1086	1108	case ATAPI_REG_DRIVESEL:
1087		verboselog( machine(), 1, "atapi_w: drivesel=%02x\n", data );
	1109	verboselog(1, "atapi_w: drivesel=%02x\n", data );
1088	1110	break;
1089	1111	case ATAPI_REG_CMDSTATUS:
1090		verboselog( machine(), 1, "atapi_w: cmdstatus=%02x\n", data );
	1112	verboselog(1, "atapi_w: cmdstatus=%02x\n", data );
1091	1113	break;
1092	1114	}
1093	1115
r21058	r21059
1178	1200	}
1179	1201	}
1180	1202
1181		static void atapi_init(running_machine &machine)
	1203	void ksys573_state::atapi_init()
1182	1204	{
1183		ksys573_state *state = machine.driver_data<ksys573_state>();
1184	1205
1185		state->m_atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
1186		state->m_atapi_regs[ATAPI_REG_ERRFEAT] = 1;
1187		state->m_atapi_regs[ATAPI_REG_COUNTLOW] = 0x14;
1188		state->m_atapi_regs[ATAPI_REG_COUNTHIGH] = 0xeb;
	1206	m_atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
	1207	m_atapi_regs[ATAPI_REG_ERRFEAT] = 1;
	1208	m_atapi_regs[ATAPI_REG_COUNTLOW] = 0x14;
	1209	m_atapi_regs[ATAPI_REG_COUNTHIGH] = 0xeb;
1189	1210
1190		state->m_atapi_data_ptr = 0;
1191		state->m_atapi_data_len = 0;
1192		state->m_atapi_cdata_wait = 0;
	1211	m_atapi_data_ptr = 0;
	1212	m_atapi_data_len = 0;
	1213	m_atapi_cdata_wait = 0;
1193	1214
1194		state->m_atapi_timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(ksys573_state::atapi_xfer_end),state));
1195		state->m_atapi_timer->adjust(attotime::never);
	1215	m_atapi_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ksys573_state::atapi_xfer_end),this));
	1216	m_atapi_timer->adjust(attotime::never);
1196	1217
1197		state->m_available_cdroms[ 0 ] = cdrom_open( get_disk_handle( machine, ":cdrom0" ) );
1198		state->m_available_cdroms[ 1 ] = cdrom_open( get_disk_handle( machine, ":cdrom1" ) );
	1218	m_available_cdroms[ 0 ] = cdrom_open( get_disk_handle( machine(), ":cdrom0" ) );
	1219	m_available_cdroms[ 1 ] = cdrom_open( get_disk_handle( machine(), ":cdrom1" ) );
1199	1220
1200		state->save_item( NAME(state->m_atapi_regs) );
1201		state->save_item( NAME(state->m_atapi_data) );
1202		state->save_item( NAME(state->m_atapi_data_ptr) );
1203		state->save_item( NAME(state->m_atapi_data_len) );
1204		state->save_item( NAME(state->m_atapi_xferlen) );
1205		state->save_item( NAME(state->m_atapi_xferbase) );
1206		state->save_item( NAME(state->m_atapi_cdata_wait) );
1207		state->save_item( NAME(state->m_atapi_xfermod) );
	1221	save_item( NAME(m_atapi_regs) );
	1222	save_item( NAME(m_atapi_data) );
	1223	save_item( NAME(m_atapi_data_ptr) );
	1224	save_item( NAME(m_atapi_data_len) );
	1225	save_item( NAME(m_atapi_xferlen) );
	1226	save_item( NAME(m_atapi_xferbase) );
	1227	save_item( NAME(m_atapi_cdata_wait) );
	1228	save_item( NAME(m_atapi_xfermod) );
1208	1229	}
1209	1230
1210	1231	WRITE32_MEMBER(ksys573_state::atapi_reset_w)
1211	1232	{
1212	1233	UINT8 *atapi_regs = m_atapi_regs;
1213	1234
1214		verboselog( machine(), 2, "atapi_reset_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
	1235	verboselog(2, "atapi_reset_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
1215	1236
1216	1237	if (data)
1217	1238	{
1218		verboselog( machine(), 2, "atapi_reset_w: reset\n" );
	1239	verboselog(2, "atapi_reset_w: reset\n" );
1219	1240
1220	1241	//      mame_printf_debug("ATAPI reset\n");
1221	1242
r21058	r21059
1233	1254	}
1234	1255	}
1235	1256
1236		static void cdrom_dma_read( ksys573_state *state, UINT32 *ram, UINT32 n_address, INT32 n_size )
	1257	void ksys573_state::cdrom_dma_read( UINT32 *ram, UINT32 n_address, INT32 n_size )
1237	1258	{
1238		verboselog( state->machine(), 2, "cdrom_dma_read( %08x, %08x )\n", n_address, n_size );
	1259	verboselog(2, "cdrom_dma_read( %08x, %08x )\n", n_address, n_size );
1239	1260	//  mame_printf_debug("DMA read: address %08x size %08x\n", n_address, n_size);
1240	1261	}
1241	1262
1242		static void cdrom_dma_write( ksys573_state *state, UINT32 *ram, UINT32 n_address, INT32 n_size )
	1263	void ksys573_state::cdrom_dma_write( UINT32 *ram, UINT32 n_address, INT32 n_size )
1243	1264	{
1244		state->m_p_n_psxram = ram;
	1265	m_p_n_psxram = ram;
1245	1266
1246		verboselog( state->machine(), 2, "cdrom_dma_write( %08x, %08x )\n", n_address, n_size );
	1267	verboselog(2, "cdrom_dma_write( %08x, %08x )\n", n_address, n_size );
1247	1268	//  mame_printf_debug("DMA write: address %08x size %08x\n", n_address, n_size);
1248	1269
1249		state->m_atapi_xferbase = n_address;
	1270	m_atapi_xferbase = n_address;
1250	1271
1251		verboselog( state->machine(), 2, "atapi_xfer_end: %d %d\n", state->m_atapi_xferlen, state->m_atapi_xfermod );
	1272	verboselog(2, "atapi_xfer_end: %d %d\n", m_atapi_xferlen, m_atapi_xfermod );
1252	1273
1253	1274	// set a transfer complete timer (Note: CYCLES_PER_SECTOR can't be lower than 2000 or the BIOS ends up "out of order")
1254		state->m_atapi_timer->adjust(state->machine().device<cpu_device>("maincpu")->cycles_to_attotime((ATAPI_CYCLES_PER_SECTOR * (state->m_atapi_xferlen/2048))));
	1275	m_atapi_timer->adjust(machine().device<cpu_device>("maincpu")->cycles_to_attotime((ATAPI_CYCLES_PER_SECTOR * (m_atapi_xferlen/2048))));
1255	1276	}
1256	1277
1257	1278	WRITE32_MEMBER(ksys573_state::security_w)
r21058	r21059
1259	1280	int security_cart_number = m_security_cart_number;
1260	1281	COMBINE_DATA( &m_n_security_control );
1261	1282
1262		verboselog( machine(), 2, "security_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
	1283	verboselog(2, "security_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
1263	1284
1264	1285	if( ACCESSING_BITS_0_15 )
1265	1286	{
r21058	r21059
1281	1302
1282	1303	if( m_security_callback != NULL )
1283	1304	{
1284		(*m_security_callback)( machine(), data & 0xff );
	1305	(this->*m_security_callback)( data & 0xff );
1285	1306	}
1286	1307	}
1287	1308
r21058	r21059
1291	1312	READ32_MEMBER(ksys573_state::security_r)
1292	1313	{
1293	1314	UINT32 data = m_n_security_control;
1294		verboselog( machine(), 2, "security_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
	1315	verboselog(2, "security_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
1295	1316	return data;
1296	1317	}
1297	1318
r21058	r21059
1318	1339	}
1319	1340	}
1320	1341
1321		verboselog( machine(), 2, "flash_r( %08x, %04x) %04x bank = %04x\n", offset, mem_mask, data, m_flash_bank );
	1342	verboselog(2, "flash_r( %08x, %04x) %04x bank = %04x\n", offset, mem_mask, data, m_flash_bank );
1322	1343
1323	1344	return data;
1324	1345	}
1325	1346
1326	1347	WRITE16_MEMBER(ksys573_state::flash_w)
1327	1348	{
1328		verboselog( machine(), 2, "flash_w( %08x, %04x, %04x) bank = %04x\n", offset, mem_mask, data, m_flash_bank );
	1349	verboselog(2, "flash_w( %08x, %04x, %04x) bank = %04x\n", offset, mem_mask, data, m_flash_bank );
1329	1350
1330	1351	if( m_flash_bank < 0 )
1331	1352	{
r21058	r21059
1369	1390
1370	1391
1371	1392
1372		static void flash_init( running_machine &machine )
	1393	void ksys573_state::flash_init(  )
1373	1394	{
1374	1395	// find onboard flash devices
1375		ksys573_state *state = machine.driver_data<ksys573_state>();
1376	1396	astring tempstr;
1377	1397	for (int index = 0; index < 8; index++)
1378		state->m_flash_device[0][index] = machine.device<fujitsu_29f016a_device>(tempstr.format("onboard.%d", index));
	1398	m_flash_device[0][index] = machine().device<fujitsu_29f016a_device>(tempstr.format("onboard.%d", index));
1379	1399
1380	1400	// find pccard flash devices
1381	1401	for (int card = 1; card <= 4; card++)
1382	1402	for (int index = 0; index < 16; index++)
1383		state->m_flash_device[card][index] = machine.device<fujitsu_29f016a_device>(tempstr.format("pccard%d.%d", card, index));
	1403	m_flash_device[card][index] = machine().device<fujitsu_29f016a_device>(tempstr.format("pccard%d.%d", card, index));
1384	1404
1385		state->save_item( NAME(state->m_flash_bank) );
1386		state->save_item( NAME(state->m_control) );
	1405	save_item( NAME(m_flash_bank) );
	1406	save_item( NAME(m_control) );
1387	1407	}
1388	1408
1389		static void update_mode( running_machine &machine )
	1409	void ksys573_state::update_mode(  )
1390	1410	{
1391		ksys573_state *state = machine.driver_data<ksys573_state>();
1392		int cart = state->ioport("CART")->read();
1393		int cd = state->ioport( "CD" )->read();
	1411	int cart = ioport("CART")->read();
	1412	int cd = ioport( "CD" )->read();
1394	1413	cdrom_file *new_cdrom;
1395	1414
1396		if( state->machine().device<device_secure_serial_flash>("game_eeprom") )
	1415	if( machine().device<device_secure_serial_flash>("game_eeprom") )
1397	1416	{
1398		state->m_security_cart_number = cart;
	1417	m_security_cart_number = cart;
1399	1418	}
1400	1419	else
1401	1420	{
1402		state->m_security_cart_number = 0;
	1421	m_security_cart_number = 0;
1403	1422	}
1404	1423
1405		if( state->m_available_cdroms[ 1 ] != NULL )
	1424	if( m_available_cdroms[ 1 ] != NULL )
1406	1425	{
1407		new_cdrom = state->m_available_cdroms[ cd ];
	1426	new_cdrom = m_available_cdroms[ cd ];
1408	1427	}
1409	1428	else
1410	1429	{
1411		new_cdrom = state->m_available_cdroms[ 0 ];
	1430	new_cdrom = m_available_cdroms[ 0 ];
1412	1431	}
1413	1432
1414	1433	void *current_cdrom;
1415		state->m_cr589->GetDevice( &current_cdrom );
	1434	m_cr589->GetDevice( &current_cdrom );
1416	1435
1417	1436	if( current_cdrom != new_cdrom )
1418	1437	{
1419	1438	current_cdrom = new_cdrom;
1420	1439
1421		state->m_cr589->SetDevice( new_cdrom );
	1440	m_cr589->SetDevice( new_cdrom );
1422	1441	}
1423	1442	}
1424	1443
1425	1444	DRIVER_INIT_MEMBER(ksys573_state,konami573)
1426	1445	{
1427		atapi_init(machine());
	1446	atapi_init();
1428	1447
1429	1448	save_item( NAME(m_n_security_control) );
1430	1449
1431		flash_init(machine());
	1450	flash_init();
1432	1451	}
1433	1452
1434	1453	MACHINE_RESET_MEMBER(ksys573_state,konami573)
1435	1454	{
1436	1455	m_flash_bank = -1;
1437	1456
1438		update_mode(machine());
	1457	update_mode();
1439	1458	}
1440	1459
1441		void sys573_vblank(ksys573_state *state, screen_device &screen, bool vblank_state)
	1460	void ksys573_state::sys573_vblank(screen_device &screen, bool vblank_state)
1442	1461	{
1443		update_mode(state->machine());
	1462	update_mode();
1444	1463
1445	1464	/// TODO: emulate the memory controller board
1446		if( strcmp( state->machine().system().name, "ddr2ml" ) == 0 )
	1465	if( strcmp( machine().system().name, "ddr2ml" ) == 0 )
1447	1466	{
1448	1467	/* patch out security-plate error */
1449	1468
1450		UINT32 *p_n_psxram = (UINT32 *)state->memshare("share1")->ptr();
	1469	UINT32 *p_n_psxram = (UINT32 *)memshare("share1")->ptr();
1451	1470
1452	1471	/* install cd */
1453	1472
r21058	r21059
1467	1486	p_n_psxram[ 0x1f850 / 4 ] = 0x08007e22;
1468	1487	}
1469	1488	}
1470		else if( strcmp( state->machine().system().name, "ddr2mla" ) == 0 )
	1489	else if( strcmp( machine().system().name, "ddr2mla" ) == 0 )
1471	1490	{
1472	1491	/* patch out security-plate error */
1473	1492
1474		UINT32 *p_n_psxram = (UINT32 *)state->memshare("share1")->ptr();
	1493	UINT32 *p_n_psxram = (UINT32 *)memshare("share1")->ptr();
1475	1494	/* 8001f850: jal $8003221c */
1476	1495	if( p_n_psxram[ 0x1f850 / 4 ] == 0x0c00c887 )
1477	1496	{
r21058	r21059
1521	1540	break;
1522	1541
1523	1542	default:
1524		verboselog(machine(), 0, "ge765pwbba_r: unhandled offset %08x %08x\n", offset, mem_mask);
	1543	verboselog(0, "ge765pwbba_r: unhandled offset %08x %08x\n", offset, mem_mask);
1525	1544	break;
1526	1545	}
1527	1546
1528		verboselog(machine(), 2, "ge765pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data);
	1547	verboselog(2, "ge765pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data);
1529	1548	return data;
1530	1549	}
1531	1550
r21058	r21059
1560	1579	break;
1561	1580
1562	1581	default:
1563		verboselog(machine(), 0, "ge765pwbba_w: unhandled offset %08x %08x %08x\n", offset, mem_mask, data);
	1582	verboselog(0, "ge765pwbba_w: unhandled offset %08x %08x %08x\n", offset, mem_mask, data);
1564	1583	break;
1565	1584	}
1566	1585
1567		verboselog(machine(), 2, "ge765pwbba_w( %08x, %08x, %08x )\n", offset, mem_mask, data);
	1586	verboselog(2, "ge765pwbba_w( %08x, %08x, %08x )\n", offset, mem_mask, data);
1568	1587	}
1569	1588
1570	1589	DRIVER_INIT_MEMBER(ksys573_state,ge765pwbba)
r21058	r21059
1607	1626	break;
1608	1627	}
1609	1628
1610		verboselog( machine(), 2, "gx700pwbf_io_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
	1629	verboselog(2, "gx700pwbf_io_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
1611	1630
1612	1631	return data;
1613	1632	}
1614	1633
1615		static void gx700pwbf_output( running_machine &machine, int offset, UINT8 data )
	1634	void ksys573_state::gx700pwbf_output( int offset, UINT8 data )
1616	1635	{
1617		ksys573_state *state = machine.driver_data<ksys573_state>();
1618	1636
1619		if( state->m_gx700pwfbf_output_callback != NULL )
	1637	if( m_gx700pwfbf_output_callback != NULL )
1620	1638	{
1621	1639	int i;
1622	1640	static const int shift[] = { 7, 6, 1, 0, 5, 4, 3, 2 };
1623	1641	for( i = 0; i < 8; i++ )
1624	1642	{
1625		int oldbit = ( state->m_gx700pwbf_output_data[ offset ] >> shift[ i ] ) & 1;
	1643	int oldbit = ( m_gx700pwbf_output_data[ offset ] >> shift[ i ] ) & 1;
1626	1644	int newbit = ( data >> shift[ i ] ) & 1;
1627	1645	if( oldbit != newbit )
1628	1646	{
1629		(*state->m_gx700pwfbf_output_callback)( machine, ( offset * 8 ) + i, newbit );
	1647	(this->*m_gx700pwfbf_output_callback)( ( offset * 8 ) + i, newbit );
1630	1648	}
1631	1649	}
1632	1650	}
1633		state->m_gx700pwbf_output_data[ offset ] = data;
	1651	m_gx700pwbf_output_data[ offset ] = data;
1634	1652	}
1635	1653
1636	1654	WRITE32_MEMBER(ksys573_state::gx700pwbf_io_w)
1637	1655	{
1638		verboselog( machine(), 2, "gx700pwbf_io_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
	1656	verboselog(2, "gx700pwbf_io_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
1639	1657
1640	1658	switch( offset )
1641	1659	{
r21058	r21059
1643	1661
1644	1662	if( ACCESSING_BITS_0_15 )
1645	1663	{
1646		gx700pwbf_output( machine(), 0, data & 0xff );
	1664	gx700pwbf_output( 0, data & 0xff );
1647	1665	}
1648	1666	break;
1649	1667
1650	1668	case 0x22:
1651	1669	if( ACCESSING_BITS_0_15 )
1652	1670	{
1653		gx700pwbf_output( machine(), 1, data & 0xff );
	1671	gx700pwbf_output( 1, data & 0xff );
1654	1672	}
1655	1673	break;
1656	1674
1657	1675	case 0x24:
1658	1676	if( ACCESSING_BITS_0_15 )
1659	1677	{
1660		gx700pwbf_output( machine(), 2, data & 0xff );
	1678	gx700pwbf_output( 2, data & 0xff );
1661	1679	}
1662	1680	break;
1663	1681
1664	1682	case 0x26:
1665	1683	if( ACCESSING_BITS_0_15 )
1666	1684	{
1667		gx700pwbf_output( machine(), 3, data & 0xff );
	1685	gx700pwbf_output( 3, data & 0xff );
1668	1686	}
1669	1687	break;
1670	1688
r21058	r21059
1674	1692	}
1675	1693	}
1676	1694
1677		static void gx700pwfbf_init( running_machine &machine, void (*output_callback_func)( running_machine &machine, int offset, int data ) )
	1695	void ksys573_state::gx700pwfbf_init( void (ksys573_state::*output_callback_func)( int offset, int data ) )
1678	1696	{
1679		ksys573_state *state = machine.driver_data<ksys573_state>();
1680	1697
1681		memset( state->m_gx700pwbf_output_data, 0, sizeof( state->m_gx700pwbf_output_data ) );
	1698	memset( m_gx700pwbf_output_data, 0, sizeof( m_gx700pwbf_output_data ) );
1682	1699
1683		state->m_gx700pwfbf_output_callback = output_callback_func;
	1700	m_gx700pwfbf_output_callback = output_callback_func;
1684	1701
1685		machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1f640000, 0x1f6400ff, read32_delegate(FUNC(ksys573_state::gx700pwbf_io_r),state), write32_delegate(FUNC(ksys573_state::gx700pwbf_io_w),state));
	1702	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1f640000, 0x1f6400ff, read32_delegate(FUNC(ksys573_state::gx700pwbf_io_r),this), write32_delegate(FUNC(ksys573_state::gx700pwbf_io_w),this));
1686	1703
1687		state->save_item( NAME(state->m_gx700pwbf_output_data) );
	1704	save_item( NAME(m_gx700pwbf_output_data) );
1688	1705	}
1689	1706
1690	1707	/*
r21058	r21059
1708	1725	0, 4, 0, 6
1709	1726	};
1710	1727
1711		static void gn845pwbb_do_w( running_machine &machine, int offset, int data )
	1728	void ksys573_state::gn845pwbb_do_w( int offset, int data )
1712	1729	{
1713		ksys573_state *state = machine.driver_data<ksys573_state>();
1714	1730
1715		state->m_stage[ offset ].DO = !data;
	1731	m_stage[ offset ].DO = !data;
1716	1732	}
1717	1733
1718		static void gn845pwbb_clk_w( running_machine &machine, int offset, int data )
	1734	void ksys573_state::gn845pwbb_clk_w( int offset, int data )
1719	1735	{
1720		ksys573_state *state = machine.driver_data<ksys573_state>();
1721	1736	int clk = !data;
1722	1737
1723		if( clk != state->m_stage[ offset ].clk )
	1738	if( clk != m_stage[ offset ].clk )
1724	1739	{
1725		state->m_stage[ offset ].clk = clk;
	1740	m_stage[ offset ].clk = clk;
1726	1741
1727	1742	if( clk )
1728	1743	{
1729		state->m_stage[ offset ].shift = ( state->m_stage[ offset ].shift >> 1 ) | ( state->m_stage[ offset ].DO << 12 );
	1744	m_stage[ offset ].shift = ( m_stage[ offset ].shift >> 1 ) | ( m_stage[ offset ].DO << 12 );
1730	1745
1731		switch( state->m_stage[ offset ].state )
	1746	switch( m_stage[ offset ].state )
1732	1747	{
1733	1748	case DDR_STAGE_IDLE:
1734		if( state->m_stage[ offset ].shift == 0xc90 )
	1749	if( m_stage[ offset ].shift == 0xc90 )
1735	1750	{
1736		state->m_stage[ offset ].state = DDR_STAGE_INIT;
1737		state->m_stage[ offset ].bit = 0;
1738		state->m_stage_mask = 0xfffff9f9;
	1751	m_stage[ offset ].state = DDR_STAGE_INIT;
	1752	m_stage[ offset ].bit = 0;
	1753	m_stage_mask = 0xfffff9f9;
1739	1754	}
1740	1755	break;
1741	1756
1742	1757	case DDR_STAGE_INIT:
1743		state->m_stage[ offset ].bit++;
1744		if( state->m_stage[ offset ].bit < 22 )
	1758	m_stage[ offset ].bit++;
	1759	if( m_stage[ offset ].bit < 22 )
1745	1760	{
1746		int a = ( ( ( ( ~0x06 ) | mask[ state->m_stage[ 0 ].bit ] ) & 0xff ) << 8 );
1747		int b = ( ( ( ( ~0x06 ) | mask[ state->m_stage[ 1 ].bit ] ) & 0xff ) << 0 );
	1761	int a = ( ( ( ( ~0x06 ) | mask[ m_stage[ 0 ].bit ] ) & 0xff ) << 8 );
	1762	int b = ( ( ( ( ~0x06 ) | mask[ m_stage[ 1 ].bit ] ) & 0xff ) << 0 );
1748	1763
1749		state->m_stage_mask = 0xffff0000 | a | b;
	1764	m_stage_mask = 0xffff0000 | a | b;
1750	1765	}
1751	1766	else
1752	1767	{
1753		state->m_stage[ offset ].bit = 0;
1754		state->m_stage[ offset ].state = DDR_STAGE_IDLE;
	1768	m_stage[ offset ].bit = 0;
	1769	m_stage[ offset ].state = DDR_STAGE_IDLE;
1755	1770
1756		state->m_stage_mask = 0xffffffff;
	1771	m_stage_mask = 0xffffffff;
1757	1772	}
1758	1773	break;
1759	1774	}
1760	1775	}
1761	1776	}
1762	1777
1763		verboselog( machine, 2, "stage: %dp data clk=%d state=%d d0=%d shift=%08x bit=%d stage_mask=%08x\n", offset + 1, clk,
1764		state->m_stage[ offset ].state, state->m_stage[ offset ].DO, state->m_stage[ offset ].shift, state->m_stage[ offset ].bit, state->m_stage_mask );
	1778	verboselog( 2, "stage: %dp data clk=%d state=%d d0=%d shift=%08x bit=%d stage_mask=%08x\n", offset + 1, clk,
	1779	m_stage[ offset ].state, m_stage[ offset ].DO, m_stage[ offset ].shift, m_stage[ offset ].bit, m_stage_mask );
1765	1780	}
1766	1781
1767	1782	CUSTOM_INPUT_MEMBER(ksys573_state::gn845pwbb_read)
r21058	r21059
1769	1784	return ioport("STAGE")->read() & m_stage_mask;
1770	1785	}
1771	1786
1772		static void gn845pwbb_output_callback( running_machine &machine, int offset, int data )
	1787	void ksys573_state::gn845pwbb_output_callback( int offset, int data )
1773	1788	{
1774	1789	switch( offset )
1775	1790	{
r21058	r21059
1790	1805	break;
1791	1806
1792	1807	case 4:
1793		gn845pwbb_do_w( machine, 0, !data );
	1808	gn845pwbb_do_w( 0, !data );
1794	1809	break;
1795	1810
1796	1811	case 7:
1797		gn845pwbb_clk_w( machine, 0, !data );
	1812	gn845pwbb_clk_w( 0, !data );
1798	1813	break;
1799	1814
1800	1815	case 8:
r21058	r21059
1814	1829	break;
1815	1830
1816	1831	case 12:
1817		gn845pwbb_do_w( machine, 1, !data );
	1832	gn845pwbb_do_w( 1, !data );
1818	1833	break;
1819	1834
1820	1835	case 15:
1821		gn845pwbb_clk_w( machine, 1, !data );
	1836	gn845pwbb_clk_w( 1, !data );
1822	1837	break;
1823	1838
1824	1839	case 17:
r21058	r21059
1861	1876	DRIVER_INIT_CALL(konami573);
1862	1877
1863	1878	m_stage_mask = 0xffffffff;
1864		gx700pwfbf_init( machine(), gn845pwbb_output_callback );
	1879	gx700pwfbf_init( &ksys573_state::gn845pwbb_output_callback );
1865	1880
1866	1881	save_item( NAME(m_stage_mask) );
1867	1882	}
r21058	r21059
1885	1900	break;
1886	1901
1887	1902	default:
1888		verboselog( machine(), 0, "gtrfrks_io_r: unhandled offset %08x, %08x\n", offset, mem_mask );
	1903	verboselog(0, "gtrfrks_io_r: unhandled offset %08x, %08x\n", offset, mem_mask );
1889	1904	break;
1890	1905	}
1891	1906
1892		verboselog( machine(), 2, "gtrfrks_io_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
	1907	verboselog(2, "gtrfrks_io_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
1893	1908	return data;
1894	1909	}
1895	1910
1896	1911	WRITE32_MEMBER(ksys573_state::gtrfrks_io_w)
1897	1912	{
1898		verboselog( machine(), 2, "gtrfrks_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data );
	1913	verboselog(2, "gtrfrks_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data );
1899	1914
1900	1915	switch( offset )
1901	1916	{
r21058	r21059
1910	1925	break;
1911	1926
1912	1927	default:
1913		verboselog( machine(), 0, "gtrfrks_io_w: unhandled offset %08x, %08x\n", offset, mem_mask );
	1928	verboselog(0, "gtrfrks_io_w: unhandled offset %08x, %08x\n", offset, mem_mask );
1914	1929	break;
1915	1930	}
1916	1931	}
r21058	r21059
2025	2040	break;
2026	2041	}
2027	2042
2028		verboselog( machine(), 2, "gx894pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
	2043	verboselog(2, "gx894pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
2029	2044	//  printf( "%08x: gx894pwbba_r( %08x, %08x ) %08x\n", space.device().safe_pc(), offset, mem_mask, data );
2030	2045	return data;
2031	2046	}
2032	2047
2033		static char *binary( char *s, UINT32 data )
	2048	char *ksys573_state::binary( char *s, UINT32 data )
2034	2049	{
2035	2050	int i;
2036	2051	for( i = 0; i < 32; i++ )
r21058	r21059
2041	2056	return s;
2042	2057	}
2043	2058
2044		static void gx894pwbba_output( running_machine &machine, int offset, UINT8 data )
	2059	void ksys573_state::gx894pwbba_output( int offset, UINT8 data )
2045	2060	{
2046		ksys573_state *state = machine.driver_data<ksys573_state>();
2047	2061
2048		if( state->m_gx894pwbba_output_callback != NULL )
	2062	if( m_gx894pwbba_output_callback != NULL )
2049	2063	{
2050	2064	int i;
2051	2065	static const int shift[] = { 0, 2, 3, 1 };
2052	2066	for( i = 0; i < 4; i++ )
2053	2067	{
2054		int oldbit = ( state->m_gx894pwbba_output_data[ offset ] >> shift[ i ] ) & 1;
	2068	int oldbit = ( m_gx894pwbba_output_data[ offset ] >> shift[ i ] ) & 1;
2055	2069	int newbit = ( data >> shift[ i ] ) & 1;
2056	2070	if( oldbit != newbit )
2057	2071	{
2058		(*state->m_gx894pwbba_output_callback)( machine, ( offset * 4 ) + i, newbit );
	2072	(this->*m_gx894pwbba_output_callback)( ( offset * 4 ) + i, newbit );
2059	2073	}
2060	2074	}
2061	2075	}
2062		state->m_gx894pwbba_output_data[ offset ] = data;
	2076	m_gx894pwbba_output_data[ offset ] = data;
2063	2077	}
2064	2078
2065	2079	WRITE32_MEMBER(ksys573_state::gx894pwbba_w)
r21058	r21059
2074	2088	return;
2075	2089	}
2076	2090
2077		verboselog( machine(), 2, "gx894pwbba_w( %08x, %08x, %08x) %s\n", offset, mem_mask, data, binary( buff, data ) );
	2091	verboselog(2, "gx894pwbba_w( %08x, %08x, %08x) %s\n", offset, mem_mask, data, binary( buff, data ) );
2078	2092
2079	2093	switch( offset )
2080	2094	{
r21058	r21059
2146	2160	case 0x38:
2147	2161	if( ACCESSING_BITS_16_31 )
2148	2162	{
2149		gx894pwbba_output( machine(), 0, ( data >> 28 ) & 0xf );
	2163	gx894pwbba_output( 0, ( data >> 28 ) & 0xf );
2150	2164	}
2151	2165	if( ACCESSING_BITS_0_15 )
2152	2166	{
2153		gx894pwbba_output( machine(), 1, ( data >> 12 ) & 0xf );
	2167	gx894pwbba_output( 1, ( data >> 12 ) & 0xf );
2154	2168	}
2155	2169	COMBINE_DATA( &m_a );
2156	2170	break;
2157	2171	case 0x39:
2158	2172	if( ACCESSING_BITS_16_31 )
2159	2173	{
2160		gx894pwbba_output( machine(), 7, ( data >> 28 ) & 0xf );
	2174	gx894pwbba_output( 7, ( data >> 28 ) & 0xf );
2161	2175	}
2162	2176	if( ACCESSING_BITS_0_15 )
2163	2177	{
2164		gx894pwbba_output( machine(), 3, ( data >> 12 ) & 0xf );
	2178	gx894pwbba_output( 3, ( data >> 12 ) & 0xf );
2165	2179	}
2166	2180	COMBINE_DATA( &m_b );
2167	2181	break;
r21058	r21059
2199	2213
2200	2214	if( ACCESSING_BITS_16_31 )
2201	2215	{
2202		gx894pwbba_output( machine(), 4, ( data >> 28 ) & 0xf );
	2216	gx894pwbba_output( 4, ( data >> 28 ) & 0xf );
2203	2217	}
2204	2218	COMBINE_DATA( &m_c );
2205	2219	break;
2206	2220	case 0x3f:
2207	2221	if( ACCESSING_BITS_16_31 )
2208	2222	{
2209		gx894pwbba_output( machine(), 2, ( data >> 28 ) & 0xf );
	2223	gx894pwbba_output( 2, ( data >> 28 ) & 0xf );
2210	2224	}
2211	2225	if( ACCESSING_BITS_0_15 )
2212	2226	{
2213		gx894pwbba_output( machine(), 5, ( data >> 12 ) & 0xf );
	2227	gx894pwbba_output( 5, ( data >> 12 ) & 0xf );
2214	2228	}
2215	2229	COMBINE_DATA( &m_d );
2216	2230	break;
r21058	r21059
2224	2238	}
2225	2239	}
2226	2240
2227		static void gx894pwbba_init( running_machine &machine, void (*output_callback_func)( running_machine &machine, int offset, int data ) )
	2241	void ksys573_state::gx894pwbba_init( void (ksys573_state::*output_callback_func)( int offset, int data ) )
2228	2242	{
2229		ksys573_state *state = machine.driver_data<ksys573_state>();
2230	2243	int gx894_ram_size = 24 * 1024 * 1024;
2231	2244
2232		state->m_gx894pwbba_output_callback = output_callback_func;
	2245	m_gx894pwbba_output_callback = output_callback_func;
2233	2246
2234		machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1f640000, 0x1f6400ff, read32_delegate(FUNC(ksys573_state::gx894pwbba_r),state), write32_delegate(FUNC(ksys573_state::gx894pwbba_w),state));
	2247	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1f640000, 0x1f6400ff, read32_delegate(FUNC(ksys573_state::gx894pwbba_r),this), write32_delegate(FUNC(ksys573_state::gx894pwbba_w),this));
2235	2248
2236		state->m_gx894_ram_write_offset = 0;
2237		state->m_gx894_ram_read_offset = 0;
2238		state->m_gx894_ram = auto_alloc_array( machine, UINT16, gx894_ram_size/2 );
	2249	m_gx894_ram_write_offset = 0;
	2250	m_gx894_ram_read_offset = 0;
	2251	m_gx894_ram = auto_alloc_array( machine(), UINT16, gx894_ram_size/2 );
2239	2252
2240		state->save_item( NAME(state->m_gx894pwbba_output_data) );
2241		state->save_pointer( NAME(state->m_gx894_ram), gx894_ram_size / 4 );
	2253	save_item( NAME(m_gx894pwbba_output_data) );
	2254	save_pointer( NAME(m_gx894_ram), gx894_ram_size / 4 );
2242	2255	}
2243	2256
2244	2257	/* ddr digital */
r21058	r21059
2247	2260	{
2248	2261	DRIVER_INIT_CALL(konami573);
2249	2262
2250		gx894pwbba_init( machine(), gn845pwbb_output_callback );
	2263	gx894pwbba_init( &ksys573_state::gn845pwbb_output_callback );
2251	2264	}
2252	2265
2253	2266	/* guitar freaks digital */
r21058	r21059
2256	2269	{
2257	2270	DRIVER_INIT_CALL(konami573);
2258	2271
2259		gx894pwbba_init( machine(), NULL );
	2272	gx894pwbba_init( NULL );
2260	2273	machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1f600000, 0x1f6000ff, read32_delegate(FUNC(ksys573_state::gtrfrks_io_r),this), write32_delegate(FUNC(ksys573_state::gtrfrks_io_w),this) );
2261	2274	}
2262	2275
2263	2276	/* ddr solo */
2264	2277
2265		static void ddrsolo_output_callback( running_machine &machine, int offset, int data )
	2278	void ksys573_state::ddrsolo_output_callback( int offset, int data )
2266	2279	{
2267	2280	switch( offset )
2268	2281	{
r21058	r21059
2319	2332	{
2320	2333	DRIVER_INIT_CALL(konami573);
2321	2334
2322		gx894pwbba_init( machine(), ddrsolo_output_callback );
	2335	gx894pwbba_init( &ksys573_state::ddrsolo_output_callback );
2323	2336	}
2324	2337
2325	2338	/* drummania */
2326	2339
2327		static void drmn_output_callback( running_machine &machine, int offset, int data )
	2340	void ksys573_state::drmn_output_callback( int offset, int data )
2328	2341	{
2329	2342	switch( offset )
2330	2343	{
r21058	r21059
2392	2405	{
2393	2406	DRIVER_INIT_CALL(konami573);
2394	2407
2395		gx700pwfbf_init( machine(), drmn_output_callback );
	2408	gx700pwfbf_init( &ksys573_state::drmn_output_callback );
2396	2409	}
2397	2410
2398	2411	DRIVER_INIT_MEMBER(ksys573_state,drmndigital)
2399	2412	{
2400	2413	DRIVER_INIT_CALL(konami573);
2401	2414
2402		gx894pwbba_init( machine(), drmn_output_callback );
	2415	gx894pwbba_init( &ksys573_state::drmn_output_callback );
2403	2416	}
2404	2417
2405	2418	/* dance maniax */
2406	2419
2407		static void dmx_output_callback( running_machine &machine, int offset, int data )
	2420	void ksys573_state::dmx_output_callback( int offset, int data )
2408	2421	{
2409	2422	switch( offset )
2410	2423	{
r21058	r21059
2524	2537
2525	2538	WRITE32_MEMBER(ksys573_state::dmx_io_w)
2526	2539	{
2527		verboselog( machine(), 2, "dmx_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data );
	2540	verboselog(2, "dmx_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data );
2528	2541
2529	2542	switch( offset )
2530	2543	{
r21058	r21059
2539	2552	break;
2540	2553
2541	2554	default:
2542		verboselog( machine(), 0, "dmx_io_w: unhandled offset %08x, %08x\n", offset, mem_mask );
	2555	verboselog(0, "dmx_io_w: unhandled offset %08x, %08x\n", offset, mem_mask );
2543	2556	break;
2544	2557	}
2545	2558	}
r21058	r21059
2548	2561	{
2549	2562	DRIVER_INIT_CALL(konami573);
2550	2563
2551		gx894pwbba_init( machine(), dmx_output_callback );
	2564	gx894pwbba_init( &ksys573_state::dmx_output_callback );
2552	2565	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f600000, 0x1f6000ff, write32_delegate(FUNC(ksys573_state::dmx_io_w),this) );
2553	2566	}
2554	2567
2555	2568	/* salary man champ */
2556	2569
2557		static void salarymc_lamp_callback( running_machine &machine, int data )
	2570	void ksys573_state::salarymc_lamp_callback( int data )
2558	2571	{
2559		ksys573_state *state = machine.driver_data<ksys573_state>();
2560	2572	int d = ( data >> 7 ) & 1;
2561	2573	int rst = ( data >> 6 ) & 1;
2562	2574	int clk = ( data >> 5 ) & 1;
2563	2575
2564	2576	if( rst )
2565	2577	{
2566		state->m_salarymc_lamp_bits = 0;
2567		state->m_salarymc_lamp_shift = 0;
	2578	m_salarymc_lamp_bits = 0;
	2579	m_salarymc_lamp_shift = 0;
2568	2580	}
2569	2581
2570		if( state->m_salarymc_lamp_clk != clk )
	2582	if( m_salarymc_lamp_clk != clk )
2571	2583	{
2572		state->m_salarymc_lamp_clk = clk;
	2584	m_salarymc_lamp_clk = clk;
2573	2585
2574		if( state->m_salarymc_lamp_clk )
	2586	if( m_salarymc_lamp_clk )
2575	2587	{
2576		state->m_salarymc_lamp_shift <<= 1;
	2588	m_salarymc_lamp_shift <<= 1;
2577	2589
2578		state->m_salarymc_lamp_shift |= d;
	2590	m_salarymc_lamp_shift |= d;
2579	2591
2580		state->m_salarymc_lamp_bits++;
2581		if( state->m_salarymc_lamp_bits == 16 )
	2592	m_salarymc_lamp_bits++;
	2593	if( m_salarymc_lamp_bits == 16 )
2582	2594	{
2583		if( ( state->m_salarymc_lamp_shift & ~0xe38 ) != 0 )
	2595	if( ( m_salarymc_lamp_shift & ~0xe38 ) != 0 )
2584	2596	{
2585		verboselog( machine, 0, "unknown bits in salarymc_lamp_shift %08x\n", state->m_salarymc_lamp_shift & ~0xe38 );
	2597	verboselog( 0, "unknown bits in salarymc_lamp_shift %08x\n", m_salarymc_lamp_shift & ~0xe38 );
2586	2598	}
2587	2599
2588		output_set_value( "player 1 red", ( state->m_salarymc_lamp_shift >> 11 ) & 1 );
2589		output_set_value( "player 1 green", ( state->m_salarymc_lamp_shift >> 10 ) & 1 );
2590		output_set_value( "player 1 blue", ( state->m_salarymc_lamp_shift >> 9 ) & 1 );
	2600	output_set_value( "player 1 red", ( m_salarymc_lamp_shift >> 11 ) & 1 );
	2601	output_set_value( "player 1 green", ( m_salarymc_lamp_shift >> 10 ) & 1 );
	2602	output_set_value( "player 1 blue", ( m_salarymc_lamp_shift >> 9 ) & 1 );
2591	2603
2592		output_set_value( "player 2 red", ( state->m_salarymc_lamp_shift >> 5 ) & 1 );
2593		output_set_value( "player 2 green", ( state->m_salarymc_lamp_shift >> 4 ) & 1 );
2594		output_set_value( "player 2 blue", ( state->m_salarymc_lamp_shift >> 3 ) & 1 );
	2604	output_set_value( "player 2 red", ( m_salarymc_lamp_shift >> 5 ) & 1 );
	2605	output_set_value( "player 2 green", ( m_salarymc_lamp_shift >> 4 ) & 1 );
	2606	output_set_value( "player 2 blue", ( m_salarymc_lamp_shift >> 3 ) & 1 );
2595	2607
2596		state->m_salarymc_lamp_bits = 0;
2597		state->m_salarymc_lamp_shift = 0;
	2608	m_salarymc_lamp_bits = 0;
	2609	m_salarymc_lamp_shift = 0;
2598	2610	}
2599	2611	}
2600	2612	}
r21058	r21059
2604	2616	{
2605	2617	DRIVER_INIT_CALL(konami573);
2606	2618
2607		m_security_callback = salarymc_lamp_callback;
	2619	m_security_callback = &ksys573_state::salarymc_lamp_callback;
2608	2620
2609	2621	save_item( NAME(m_salarymc_lamp_bits) );
2610	2622	save_item( NAME(m_salarymc_lamp_shift) );
r21058	r21059
2613	2625
2614	2626	/* Hyper Bishi Bashi Champ */
2615	2627
2616		static void hyperbbc_lamp_callback( running_machine &machine, int data )
	2628	void ksys573_state::hyperbbc_lamp_callback( int data )
2617	2629	{
2618		ksys573_state *state = machine.driver_data<ksys573_state>();
2619	2630	int red = ( data >> 6 ) & 1;
2620	2631	int blue = ( data >> 5 ) & 1;
2621	2632	int green = ( data >> 4 ) & 1;
2622	2633	int strobe1 = ( data >> 3 ) & 1;
2623	2634	int strobe2 = ( data >> 0 ) & 1;
2624	2635
2625		if( strobe1 && !state->m_hyperbbc_lamp_strobe1 )
	2636	if( strobe1 && !m_hyperbbc_lamp_strobe1 )
2626	2637	{
2627	2638	output_set_value( "player 1 red", red );
2628	2639	output_set_value( "player 1 green", green );
2629	2640	output_set_value( "player 1 blue", blue );
2630	2641	}
2631	2642
2632		state->m_hyperbbc_lamp_strobe1 = strobe1;
	2643	m_hyperbbc_lamp_strobe1 = strobe1;
2633	2644
2634		if( strobe2 && !state->m_hyperbbc_lamp_strobe2 )
	2645	if( strobe2 && !m_hyperbbc_lamp_strobe2 )
2635	2646	{
2636	2647	output_set_value( "player 2 red", red );
2637	2648	output_set_value( "player 2 green", green );
2638	2649	output_set_value( "player 2 blue", blue );
2639	2650	}
2640	2651
2641		state->m_hyperbbc_lamp_strobe2 = strobe2;
	2652	m_hyperbbc_lamp_strobe2 = strobe2;
2642	2653	}
2643	2654
2644	2655	DRIVER_INIT_MEMBER(ksys573_state,hyperbbc)
2645	2656	{
2646	2657	DRIVER_INIT_CALL(konami573);
2647	2658
2648		m_security_callback = hyperbbc_lamp_callback;
	2659	m_security_callback = &ksys573_state::hyperbbc_lamp_callback;
2649	2660
2650	2661	save_item( NAME(m_hyperbbc_lamp_strobe1) );
2651	2662	save_item( NAME(m_hyperbbc_lamp_strobe2) );
r21058	r21059
2653	2664
2654	2665	/* Mambo A Go Go */
2655	2666
2656		static void mamboagg_output_callback( running_machine &machine, int offset, int data )
	2667	void ksys573_state::mamboagg_output_callback( int offset, int data )
2657	2668	{
2658	2669	switch( offset )
2659	2670	{
r21058	r21059
2683	2694
2684	2695	WRITE32_MEMBER(ksys573_state::mamboagg_io_w)
2685	2696	{
2686		verboselog( machine(), 2, "mamboagg_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data );
	2697	verboselog(2, "mamboagg_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data );
2687	2698
2688	2699	switch( offset )
2689	2700	{
r21058	r21059
2694	2705	break;
2695	2706
2696	2707	default:
2697		verboselog( machine(), 0, "mamboagg_io_w: unhandled offset %08x, %08x\n", offset, mem_mask );
	2708	verboselog(0, "mamboagg_io_w: unhandled offset %08x, %08x\n", offset, mem_mask );
2698	2709	break;
2699	2710	}
2700	2711	}
r21058	r21059
2703	2714	{
2704	2715	DRIVER_INIT_CALL(konami573);
2705	2716
2706		gx894pwbba_init( machine(), mamboagg_output_callback );
	2717	gx894pwbba_init( &ksys573_state::mamboagg_output_callback );
2707	2718	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f600000, 0x1f6000ff, write32_delegate(FUNC(ksys573_state::mamboagg_io_w),this));
2708	2719	}
2709	2720
r21058	r21059
2748	2759
2749	2760	int pad_light[ 6 ];
2750	2761
2751		static void punchmania_output_callback( running_machine &machine, int offset, int data )
	2762	void ksys573_state::punchmania_output_callback( int offset, int data )
2752	2763	{
2753		ksys573_state *state = machine.driver_data<ksys573_state>();
2754		double *pad_position = state->m_pad_position;
	2764	double *pad_position = m_pad_position;
2755	2765	char pad[ 7 ];
2756	2766
2757	2767	switch( offset )
r21058	r21059
2881	2891	{
2882	2892	DRIVER_INIT_CALL(konami573);
2883	2893
2884		gx700pwfbf_init( machine(), punchmania_output_callback );
	2894	gx700pwfbf_init( &ksys573_state::punchmania_output_callback );
2885	2895	}
2886	2896
2887	2897	/* GunMania */
r21058	r21059
2974	2984	break;
2975	2985	}
2976	2986
2977		verboselog( machine(), 2, "gunmania_w %08x %08x %08x\n", offset, mem_mask, data );
	2987	verboselog(2, "gunmania_w %08x %08x %08x\n", offset, mem_mask, data );
2978	2988	}
2979	2989
2980	2990	CUSTOM_INPUT_MEMBER(ksys573_state::gunmania_tank_shutter_sensor)
r21058	r21059
3013	3023	break;
3014	3024	}
3015	3025
3016		verboselog( machine(), 2, "gunmania_r %08x %08x %08x\n", offset, mem_mask, data );
	3026	verboselog(2, "gunmania_r %08x %08x %08x\n", offset, mem_mask, data );
3017	3027	return data;
3018	3028	}
3019	3029
r21058	r21059
3055	3065	MCFG_CPU_ADD( "maincpu", CXD8530CQ, XTAL_67_7376MHz )
3056	3066	MCFG_CPU_PROGRAM_MAP( konami573_map )
3057	3067
3058		MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( cdrom_dma_read ), (ksys573_state *) owner ) )
3059		MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( cdrom_dma_write ), (ksys573_state *) owner ) )
	3068	MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( ksys573_state::cdrom_dma_read ), (ksys573_state *) owner ) )
	3069	MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( ksys573_state::cdrom_dma_write ), (ksys573_state *) owner ) )
3060	3070
3061	3071	MCFG_MACHINE_RESET_OVERRIDE(ksys573_state, konami573 )
3062	3072
r21058	r21059
3074	3084
3075	3085	/* video hardware */
3076	3086	MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8561Q, 0x200000, XTAL_53_693175MHz )
3077		MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( sys573_vblank ), (ksys573_state *) owner ) )
	3087	MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( ksys573_state::sys573_vblank ), (ksys573_state *) owner ) )
3078	3088
3079	3089	/* sound hardware */
3080	3090	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")

trunk/src/mame/drivers/taitogn.c

r21058	r21059
393	393	DECLARE_DRIVER_INIT(coh3002t_mp);
394	394	DECLARE_DRIVER_INIT(coh3002t);
395	395	DECLARE_MACHINE_RESET(coh3002t);
	396	void rf5c296_reg_w(ATTR_UNUSED UINT8 reg, UINT8 data);
	397	UINT8 rf5c296_reg_r(ATTR_UNUSED UINT8 reg);
	398	UINT32 gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_mask);
	399	void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
	400	void install_handlers(int mode);
396	401	};
397	402
398	403
399	404	// rf5c296 is very inaccurate at that point, it hardcodes the gnet config
400	405
401		static void rf5c296_reg_w(ATTR_UNUSED running_machine &machine, UINT8 reg, UINT8 data)
	406	void taitogn_state::rf5c296_reg_w(ATTR_UNUSED UINT8 reg, UINT8 data)
402	407	{
403		taitogn_state *state = machine.driver_data<taitogn_state>();
404		//  fprintf(stderr, "rf5c296_reg_w %02x, %02x (%s)\n", reg, data, machine.describe_context());
	408	//  fprintf(stderr, "rf5c296_reg_w %02x, %02x (%s)\n", reg, data, machine().describe_context());
405	409	switch (reg)
406	410	{
407	411	// Interrupt and General Control Register
r21058	r21059
409	413	// Check for card reset
410	414	if (!(data & 0x40))
411	415	{
412		ide_controller_device *card = (ide_controller_device *) machine.device(":card");
	416	ide_controller_device *card = (ide_controller_device *) machine().device(":card");
413	417
414	418	card->reset();
415		state->m_locked = 0x1ff;
	419	m_locked = 0x1ff;
416	420	card->ide_set_gnet_readlock(1);
417	421	}
418	422	break;
r21058	r21059
422	426	}
423	427	}
424	428
425		static UINT8 rf5c296_reg_r(ATTR_UNUSED running_machine &machine, UINT8 reg)
	429	UINT8 taitogn_state::rf5c296_reg_r(ATTR_UNUSED UINT8 reg)
426	430	{
427		//  fprintf(stderr, "rf5c296_reg_r %02x (%s)\n", reg, machine.describe_context());
	431	//  fprintf(stderr, "rf5c296_reg_r %02x (%s)\n", reg, machine().describe_context());
428	432	return 0x00;
429	433	}
430	434
r21058	r21059
439	443	if(ACCESSING_BITS_0_7)
440	444	m_rf5c296_reg = data;
441	445	if(ACCESSING_BITS_8_15)
442		rf5c296_reg_w(machine(), m_rf5c296_reg, data >> 8);
	446	rf5c296_reg_w(m_rf5c296_reg, data >> 8);
443	447	}
444	448	}
445	449
r21058	r21059
455	459	if(ACCESSING_BITS_0_7)
456	460	res |= m_rf5c296_reg;
457	461	if(ACCESSING_BITS_8_15)
458		res |= rf5c296_reg_r(machine(), m_rf5c296_reg) << 8;
	462	res |= rf5c296_reg_r(m_rf5c296_reg) << 8;
459	463	return res;
460	464	}
461	465
r21058	r21059
507	511
508	512	// Flash handling
509	513
510		static UINT32 gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_mask)
	514	UINT32 taitogn_state::gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_mask)
511	515	{
512	516	UINT32 res = 0;
513	517	offset *= 2;
r21058	r21059
518	522	return res;
519	523	}
520	524
521		static void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask)
	525	void taitogn_state::gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask)
522	526	{
523	527	offset *= 2;
524	528	if(ACCESSING_BITS_0_15)
r21058	r21059
578	582	gen_flash_w(m_sndflash[2], offset, data, mem_mask);
579	583	}
580	584
581		static void install_handlers(running_machine &machine, int mode)
	585	void taitogn_state::install_handlers(int mode)
582	586	{
583		taitogn_state *state = machine.driver_data<taitogn_state>();
584		address_space &a = machine.device("maincpu")->memory().space(AS_PROGRAM);
	587	address_space &a = machine().device("maincpu")->memory().space(AS_PROGRAM);
585	588	if(mode == 0) {
586	589	// Mode 0 has access to the subbios, the mn102 flash and the rf5c296 mem zone
587		a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_subbios_r),state), write32_delegate(FUNC(taitogn_state::flash_subbios_w),state));
588		a.install_readwrite_handler(0x1f200000, 0x1f2fffff, read32_delegate(FUNC(taitogn_state::rf5c296_mem_r),state), write32_delegate(FUNC(taitogn_state::rf5c296_mem_w),state));
589		a.install_readwrite_handler(0x1f300000, 0x1f37ffff, read32_delegate(FUNC(taitogn_state::flash_mn102_r),state), write32_delegate(FUNC(taitogn_state::flash_mn102_w),state));
	590	a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_subbios_r),this), write32_delegate(FUNC(taitogn_state::flash_subbios_w),this));
	591	a.install_readwrite_handler(0x1f200000, 0x1f2fffff, read32_delegate(FUNC(taitogn_state::rf5c296_mem_r),this), write32_delegate(FUNC(taitogn_state::rf5c296_mem_w),this));
	592	a.install_readwrite_handler(0x1f300000, 0x1f37ffff, read32_delegate(FUNC(taitogn_state::flash_mn102_r),this), write32_delegate(FUNC(taitogn_state::flash_mn102_w),this));
590	593	a.nop_readwrite(0x1f380000, 0x1f5fffff);
591	594
592	595	} else {
593	596	// Mode 1 has access to the 3 samples flashes
594		a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_s1_r),state), write32_delegate(FUNC(taitogn_state::flash_s1_w),state));
595		a.install_readwrite_handler(0x1f200000, 0x1f3fffff, read32_delegate(FUNC(taitogn_state::flash_s2_r),state), write32_delegate(FUNC(taitogn_state::flash_s2_w),state));
596		a.install_readwrite_handler(0x1f400000, 0x1f5fffff, read32_delegate(FUNC(taitogn_state::flash_s3_r),state), write32_delegate(FUNC(taitogn_state::flash_s3_w),state));
	597	a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_s1_r),this), write32_delegate(FUNC(taitogn_state::flash_s1_w),this));
	598	a.install_readwrite_handler(0x1f200000, 0x1f3fffff, read32_delegate(FUNC(taitogn_state::flash_s2_r),this), write32_delegate(FUNC(taitogn_state::flash_s2_w),this));
	599	a.install_readwrite_handler(0x1f400000, 0x1f5fffff, read32_delegate(FUNC(taitogn_state::flash_s3_r),this), write32_delegate(FUNC(taitogn_state::flash_s3_w),this));
597	600	}
598	601	}
599	602
r21058	r21059
634	637	#endif
635	638
636	639	if((p ^ m_control) & 0x04)
637		install_handlers(machine(), m_control & 4 ? 1 : 0);
	640	install_handlers(m_control & 4 ? 1 : 0);
638	641	}
639	642
640	643	WRITE32_MEMBER(taitogn_state::control2_w)
r21058	r21059
785	788	MACHINE_RESET_MEMBER(taitogn_state,coh3002t)
786	789	{
787	790	m_locked = 0x1ff;
788		install_handlers(machine(), 0);
	791	install_handlers(0);
789	792	m_control = 0;
790	793
791	794	ide_controller_device *card = (ide_controller_device *) machine().device(":card");

trunk/src/mame/drivers/nightgal.c

r21058	r21059
127	127	required_ioport m_io_dswc;
128	128
129	129	UINT8 nightgal_gfx_nibble( int niboffset );
	130	void plot_nightgal_gfx_pixel( UINT8 pix, int x, int y );
130	131	};
131	132
132	133
r21058	r21059
176	177	}
177	178	}
178	179
179		static void plot_nightgal_gfx_pixel( running_machine &machine, UINT8 pix, int x, int y )
	180	void nightgal_state::plot_nightgal_gfx_pixel( UINT8 pix, int x, int y )
180	181	{
181		nightgal_state *state = machine.driver_data<nightgal_state>();
182	182	if (y >= 512) return;
183	183	if (x >= 512) return;
184	184	if (y < 0) return;
185	185	if (x < 0) return;
186	186
187	187	if (x & 1)
188		state->m_blit_buffer[(y * 256) + (x >> 1)] = (state->m_blit_buffer[(y * 256) + (x >> 1)] & 0x0f) | ((pix << 4) & 0xf0);
	188	m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0x0f) | ((pix << 4) & 0xf0);
189	189	else
190		state->m_blit_buffer[(y * 256) + (x >> 1)] = (state->m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
	190	m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
191	191	}
192	192
193	193	WRITE8_MEMBER(nightgal_state::nsc_true_blitter_w)
r21058	r21059
231	231	dat = cur_pen_lo | (cur_pen_hi << 4);
232	232
233	233	if ((dat & 0xff) != 0)
234		plot_nightgal_gfx_pixel(machine(), dat, drawx, drawy);
	234	plot_nightgal_gfx_pixel(dat, drawx, drawy);
235	235
236	236	if (!flipx)
237	237	count--;
r21058	r21059
286	286	dat = cur_pen_lo | cur_pen_hi << 4;
287	287
288	288	if ((dat & 0xff) != 0)
289		plot_nightgal_gfx_pixel(machine(), dat, drawx, drawy);
	289	plot_nightgal_gfx_pixel(dat, drawx, drawy);
290	290
291	291	if (!flipx)
292	292	count--;

trunk/src/mame/drivers/nmg5.c

r21058	r21059
279	279	virtual void machine_reset();
280	280	virtual void video_start();
281	281	UINT32 screen_update_nmg5(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	282	void draw_bitmap( bitmap_ind16 &bitmap );
282	283	};
283	284
284	285
r21058	r21059
854	855
855	856
856	857
857		static void draw_bitmap( running_machine &machine, bitmap_ind16 &bitmap )
	858	void nmg5_state::draw_bitmap( bitmap_ind16 &bitmap )
858	859	{
859		nmg5_state *state = machine.driver_data<nmg5_state>();
860	860	int yyy = 256;
861	861	int xxx = 512 / 4;
862	862	UINT16 x, y, count;
r21058	r21059
869	869	{
870	870	for (x = 0; x < xxx; x++)
871	871	{
872		pix = (state->m_bitmap[count] & 0xf000) >> 12;
	872	pix = (m_bitmap[count] & 0xf000) >> 12;
873	873	if (pix) bitmap.pix16(y + yoff, x * 4 + 0 + xoff) = pix + 0x300;
874		pix = (state->m_bitmap[count] & 0x0f00) >> 8;
	874	pix = (m_bitmap[count] & 0x0f00) >> 8;
875	875	if (pix) bitmap.pix16(y + yoff, x * 4 + 1 + xoff) = pix + 0x300;
876		pix = (state->m_bitmap[count] & 0x00f0) >> 4;
	876	pix = (m_bitmap[count] & 0x00f0) >> 4;
877	877	if (pix) bitmap.pix16(y + yoff, x * 4 + 2 + xoff) = pix + 0x300;
878		pix = (state->m_bitmap[count] & 0x000f) >> 0;
	878	pix = (m_bitmap[count] & 0x000f) >> 0;
879	879	if (pix) bitmap.pix16(y + yoff, x * 4 + 3 + xoff) = pix + 0x300;
880	880
881	881	count++;
r21058	r21059
897	897	{
898	898	m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
899	899	m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
900		draw_bitmap(machine(), bitmap);
	900	draw_bitmap(bitmap);
901	901	}
902	902	else if (m_priority_reg == 1)
903	903	{
904		draw_bitmap(machine(), bitmap);
	904	draw_bitmap(bitmap);
905	905	m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
906	906	m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
907	907	}
908	908	else if (m_priority_reg == 2)
909	909	{
910	910	m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
911		draw_bitmap(machine(), bitmap);
	911	draw_bitmap(bitmap);
912	912	m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
913	913	}
914	914	else if (m_priority_reg == 3)
915	915	{
916	916	m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
917	917	m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
918		draw_bitmap(machine(), bitmap);
	918	draw_bitmap(bitmap);
919	919	}
920	920	else if (m_priority_reg == 7)
921	921	{
922	922	m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
923		draw_bitmap(machine(), bitmap);
	923	draw_bitmap(bitmap);
924	924	m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
925	925	}
926	926	return 0;

trunk/src/mame/drivers/namcos23.c

r21058	r21059
1486	1486	UINT32 screen_update_s23(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
1487	1487	INTERRUPT_GEN_MEMBER(s23_interrupt);
1488	1488	TIMER_CALLBACK_MEMBER(c361_timer_cb);
	1489	UINT8 nthbyte(const UINT32 *pSource, int offs);
	1490	UINT16 nthword(const UINT32 *pSource, int offs);
	1491	inline INT32 u32_to_s24(UINT32 v);
	1492	inline INT32 u32_to_s10(UINT32 v);
	1493	INT32 *p3d_getv(UINT16 id);
	1494	INT16 *p3d_getm(UINT16 id);
	1495	void p3d_matrix_set(const UINT16 *p, int size);
	1496	void p3d_vector_set(const UINT16 *p, int size);
	1497	void p3d_scaling_set(const UINT16 *p, int size);
	1498	void p3d_vector_matrix_mul(const UINT16 *p, int size);
	1499	void p3d_matrix_vector_mul(const UINT16 *p, int size);
	1500	void p3d_matrix_matrix_mul(const UINT16 *p, int size);
	1501	void p3d_render(const UINT16 *p, int size, bool use_scaling);
	1502	void p3d_flush(const UINT16 *p, int size);
	1503	void p3d_dma(address_space &space, UINT32 adr, UINT32 size);
	1504	void render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv);
	1505	void render_apply_matrot(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, INT32 &x, INT32 &y, INT32 &z);
	1506	void render_project(poly_vertex &pv);
	1507	void render_one_model(const namcos23_render_entry *re);
	1508	void render_flush(bitmap_rgb32 &bitmap);
	1509	void render_run(bitmap_rgb32 &bitmap);
1489	1510	};
1490	1511
1491	1512
1492		static UINT8 nthbyte(const UINT32 *pSource, int offs)
	1513	UINT8 namcos23_state::nthbyte(const UINT32 *pSource, int offs)
1493	1514	{
1494	1515	pSource += offs/4;
1495	1516	return (pSource[0]<<((offs&3)*8))>>24;
1496	1517	}
1497	1518
1498		static UINT16 nthword(const UINT32 *pSource, int offs)
	1519	UINT16 namcos23_state::nthword(const UINT32 *pSource, int offs)
1499	1520	{
1500	1521	pSource += offs/2;
1501	1522	return (pSource[0]<<((offs&1)*16))>>16;
r21058	r21059
1513	1534
1514	1535	// 3D hardware, to throw at least in part in video/namcos23.c
1515	1536
1516		INLINE INT32 u32_to_s24(UINT32 v)
	1537	inline INT32 namcos23_state::u32_to_s24(UINT32 v)
1517	1538	{
1518	1539	return v & 0x800000 ? v | 0xff000000 : v & 0xffffff;
1519	1540	}
1520	1541
1521		INLINE INT32 u32_to_s10(UINT32 v)
	1542	inline INT32 namcos23_state::u32_to_s10(UINT32 v)
1522	1543	{
1523	1544	return v & 0x200 ? v | 0xfffffe00 : v & 0x1ff;
1524	1545	}
r21058	r21059
1533	1554	return UINT8(l);
1534	1555	}
1535	1556
1536		static INT32 *p3d_getv(namcos23_state *state, UINT16 id)
	1557	INT32 *namcos23_state::p3d_getv(UINT16 id)
1537	1558	{
1538	1559	if(id == 0x8000)
1539		return state->m_light_vector;
	1560	return m_light_vector;
1540	1561	if(id >= 0x100)
1541	1562	{
1542		memset(state->m_spv, 0, sizeof(state->m_spv));
1543		return state->m_spv;
	1563	memset(m_spv, 0, sizeof(m_spv));
	1564	return m_spv;
1544	1565	}
1545		return state->m_vectors[id];
	1566	return m_vectors[id];
1546	1567	}
1547	1568
1548		static INT16 *p3d_getm(namcos23_state *state, UINT16 id)
	1569	INT16 *namcos23_state::p3d_getm(UINT16 id)
1549	1570	{
1550	1571	if(id >= 0x100)
1551	1572	{
1552		memset(state->m_spm, 0, sizeof(state->m_spm));
1553		return state->m_spm;
	1573	memset(m_spm, 0, sizeof(m_spm));
	1574	return m_spm;
1554	1575	}
1555		return state->m_matrices[id];
	1576	return m_matrices[id];
1556	1577	}
1557	1578
1558		static void p3d_matrix_set(namcos23_state *state, const UINT16 *p, int size)
	1579	void namcos23_state::p3d_matrix_set(const UINT16 *p, int size)
1559	1580	{
1560	1581	if(size != 10)
1561	1582	{
1562	1583	logerror("WARNING: p3d_matrix_set with size %d\n", size);
1563	1584	return;
1564	1585	}
1565		INT16 *t = p3d_getm(state, *p++);
	1586	INT16 *t = p3d_getm(*p++);
1566	1587	for(int i=0; i<9; i++)
1567	1588	t[i] = *p++;
1568	1589	}
1569	1590
1570		static void p3d_vector_set(namcos23_state *state, const UINT16 *p, int size)
	1591	void namcos23_state::p3d_vector_set(const UINT16 *p, int size)
1571	1592	{
1572	1593	if(size != 7)
1573	1594	{
1574	1595	logerror("WARNING: p3d_vector_set with size %d\n", size);
1575	1596	return;
1576	1597	}
1577		INT32 *t = p3d_getv(state, *p++);
	1598	INT32 *t = p3d_getv(*p++);
1578	1599	for(int i=0; i<3; i++)
1579	1600	{
1580	1601	t[i] = u32_to_s24((p[0] << 16) | p[1]);
r21058	r21059
1583	1604	}
1584	1605
1585	1606
1586		static void p3d_scaling_set(namcos23_state *state, const UINT16 *p, int size)
	1607	void namcos23_state::p3d_scaling_set(const UINT16 *p, int size)
1587	1608	{
1588	1609	if(size != 1)
1589	1610	{
1590	1611	logerror("WARNING: p3d_scaling_set with size %d\n", size);
1591	1612	return;
1592	1613	}
1593		state->m_scaling = *p;
	1614	m_scaling = *p;
1594	1615	}
1595	1616
1596		static void p3d_vector_matrix_mul(namcos23_state *state, const UINT16 *p, int size)
	1617	void namcos23_state::p3d_vector_matrix_mul(const UINT16 *p, int size)
1597	1618	{
1598	1619	if(size != 4)
1599	1620	{
r21058	r21059
1603	1624	if(p[2] != 0xffff)
1604	1625	logerror("WARNING: p3d_vector_matrix_mul with +2=%04x\n", p[2]);
1605	1626
1606		INT32 *t       = p3d_getv(state, p[0]);
1607		const INT16 *m = p3d_getm(state, p[1]);
1608		const INT32 *v = p3d_getv(state, p[3]);
	1627	INT32 *t       = p3d_getv(p[0]);
	1628	const INT16 *m = p3d_getm(p[1]);
	1629	const INT32 *v = p3d_getv(p[3]);
1609	1630
1610	1631	t[0] = INT32((m[0]*INT64(v[0]) + m[3]*INT64(v[1]) + m[6]*INT64(v[2])) >> 14);
1611	1632	t[1] = INT32((m[1]*INT64(v[0]) + m[4]*INT64(v[1]) + m[7]*INT64(v[2])) >> 14);
1612	1633	t[2] = INT32((m[2]*INT64(v[0]) + m[5]*INT64(v[1]) + m[8]*INT64(v[2])) >> 14);
1613	1634	}
1614	1635
1615		static void p3d_matrix_vector_mul(namcos23_state *state, const UINT16 *p, int size)
	1636	void namcos23_state::p3d_matrix_vector_mul(const UINT16 *p, int size)
1616	1637	{
1617	1638	if(size != 4)
1618	1639	{
r21058	r21059
1622	1643	if(p[2] != 0xffff)
1623	1644	logerror("WARNING: p3d_matrix_vector_mul with +2=%04x\n", p[2]);
1624	1645
1625		INT32 *t       = p3d_getv(state, p[0]);
1626		const INT16 *m = p3d_getm(state, p[1]);
1627		const INT32 *v = p3d_getv(state, p[3]);
	1646	INT32 *t       = p3d_getv(p[0]);
	1647	const INT16 *m = p3d_getm(p[1]);
	1648	const INT32 *v = p3d_getv(p[3]);
1628	1649
1629	1650	t[0] = INT32((m[0]*INT64(v[0]) + m[1]*INT64(v[1]) + m[2]*INT64(v[2])) >> 14);
1630	1651	t[1] = INT32((m[3]*INT64(v[0]) + m[4]*INT64(v[1]) + m[7]*INT64(v[2])) >> 14);
r21058	r21059
1632	1653	}
1633	1654
1634	1655
1635		static void p3d_matrix_matrix_mul(namcos23_state *state, const UINT16 *p, int size)
	1656	void namcos23_state::p3d_matrix_matrix_mul(const UINT16 *p, int size)
1636	1657	{
1637	1658	if(size != 4)
1638	1659	{
r21058	r21059
1642	1663	if(p[2] != 0xffff)
1643	1664	logerror("WARNING: p3d_matrix_matrix_mul with +2=%04x\n", p[2]);
1644	1665
1645		INT16 *t        = p3d_getm(state, p[0]);
1646		const INT16 *m1 = p3d_getm(state, p[1]);
1647		const INT16 *m2 = p3d_getm(state, p[3]);
	1666	INT16 *t        = p3d_getm(p[0]);
	1667	const INT16 *m1 = p3d_getm(p[1]);
	1668	const INT16 *m2 = p3d_getm(p[3]);
1648	1669
1649	1670	t[0] = INT16((m1[0]*m2[0] + m1[1]*m2[3] + m1[2]*m2[6]) >> 14);
1650	1671	t[1] = INT16((m1[0]*m2[1] + m1[1]*m2[4] + m1[2]*m2[7]) >> 14);
r21058	r21059
1658	1679	}
1659	1680
1660	1681
1661		static void p3d_render(namcos23_state *state, const UINT16 *p, int size, bool use_scaling)
	1682	void namcos23_state::p3d_render(const UINT16 *p, int size, bool use_scaling)
1662	1683	{
1663		render_t &render = state->m_render;
	1684	render_t &render = m_render;
1664	1685
1665	1686	if(size != 3)
1666	1687	{
r21058	r21059
1677	1698	}
1678	1699
1679	1700	// Vector and matrix may be inverted
1680		const INT16 *m = p3d_getm(state, p[1]);
1681		const INT32 *v = p3d_getv(state, p[2]);
	1701	const INT16 *m = p3d_getm(p[1]);
	1702	const INT32 *v = p3d_getv(p[2]);
1682	1703
1683	1704	namcos23_render_entry *re = render.entries[render.cur] + render.count[render.cur];
1684	1705	re->type = MODEL;
1685	1706	re->model.model = p[0];
1686		re->model.scaling = use_scaling ? state->m_scaling / 16384.0 : 1.0;
	1707	re->model.scaling = use_scaling ? m_scaling / 16384.0 : 1.0;
1687	1708	memcpy(re->model.m, m, sizeof(re->model.m));
1688	1709	memcpy(re->model.v, v, sizeof(re->model.v));
1689	1710	if(0)
r21058	r21059
1698	1719	}
1699	1720
1700	1721
1701		static void p3d_flush(namcos23_state *state, const UINT16 *p, int size)
	1722	void namcos23_state::p3d_flush(const UINT16 *p, int size)
1702	1723	{
1703		render_t &render = state->m_render;
	1724	render_t &render = m_render;
1704	1725
1705	1726	if(size != 0)
1706	1727	{
r21058	r21059
1713	1734	render.count[render.cur]++;
1714	1735	}
1715	1736
1716		static void p3d_dma(address_space &space, UINT32 adr, UINT32 size)
	1737	void namcos23_state::p3d_dma(address_space &space, UINT32 adr, UINT32 size)
1717	1738	{
1718		namcos23_state *state = space.machine().driver_data<namcos23_state>();
1719	1739	UINT16 buffer[256];
1720	1740	adr &= 0x1fffffff;
1721	1741	int pos = 0;
r21058	r21059
1753	1773
1754	1774	switch(h1)
1755	1775	{
1756		case 0x0040: p3d_matrix_set(state, buffer, psize); break;
1757		case 0x0050: p3d_vector_set(state, buffer, psize); break;
1758		case 0x0000: p3d_matrix_matrix_mul(state, buffer, psize); break;
1759		case 0x0810: p3d_matrix_vector_mul(state, buffer, psize); break;
1760		case 0x1010: p3d_vector_matrix_mul(state, buffer, psize); break;
1761		case 0x4400: p3d_scaling_set(state, buffer, psize); break;
1762		case 0x8000: p3d_render(state, buffer, psize, false); break;
1763		case 0x8080: p3d_render(state, buffer, psize, true); break;
1764		case 0xc000: p3d_flush(state, buffer, psize); break;
	1776	case 0x0040: p3d_matrix_set(buffer, psize); break;
	1777	case 0x0050: p3d_vector_set(buffer, psize); break;
	1778	case 0x0000: p3d_matrix_matrix_mul(buffer, psize); break;
	1779	case 0x0810: p3d_matrix_vector_mul(buffer, psize); break;
	1780	case 0x1010: p3d_vector_matrix_mul(buffer, psize); break;
	1781	case 0x4400: p3d_scaling_set(buffer, psize); break;
	1782	case 0x8000: p3d_render(buffer, psize, false); break;
	1783	case 0x8080: p3d_render(buffer, psize, true); break;
	1784	case 0xc000: p3d_flush(buffer, psize); break;
1765	1785	default:
1766	1786	if(0)
1767	1787	{
r21058	r21059
1840	1860	}
1841	1861	}
1842	1862
1843		static void render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv)
	1863	void namcos23_state::render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv)
1844	1864	{
1845	1865	pv.x =    (INT32((re->model.m[0]*INT64(xi) + re->model.m[3]*INT64(yi) + re->model.m[6]*INT64(zi)) >> 14)*re->model.scaling + re->model.v[0])/16384.0;
1846	1866	pv.y =    (INT32((re->model.m[1]*INT64(xi) + re->model.m[4]*INT64(yi) + re->model.m[7]*INT64(zi)) >> 14)*re->model.scaling + re->model.v[1])/16384.0;
1847	1867	pv.p[0] = (INT32((re->model.m[2]*INT64(xi) + re->model.m[5]*INT64(yi) + re->model.m[8]*INT64(zi)) >> 14)*re->model.scaling + re->model.v[2])/16384.0;
1848	1868	}
1849	1869
1850		static void render_apply_matrot(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, INT32 &x, INT32 &y, INT32 &z)
	1870	void namcos23_state::render_apply_matrot(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, INT32 &x, INT32 &y, INT32 &z)
1851	1871	{
1852	1872	x = (re->model.m[0]*xi + re->model.m[3]*yi + re->model.m[6]*zi) >> 14;
1853	1873	y = (re->model.m[1]*xi + re->model.m[4]*yi + re->model.m[7]*zi) >> 14;
1854	1874	z = (re->model.m[2]*xi + re->model.m[5]*yi + re->model.m[8]*zi) >> 14;
1855	1875	}
1856	1876
1857		static void render_project(poly_vertex &pv)
	1877	void namcos23_state::render_project(poly_vertex &pv)
1858	1878	{
1859	1879	// 768 validated by the title screen size on tc2:
1860	1880	// texture is 640x480, x range is 3.125, y range is 2.34375, z is 3.75
r21058	r21059
1886	1906	return pens[color];
1887	1907	}
1888	1908
1889		static void render_one_model(running_machine &machine, const namcos23_render_entry *re)
	1909	void namcos23_state::render_one_model(const namcos23_render_entry *re)
1890	1910	{
1891		namcos23_state *state = machine.driver_data<namcos23_state>();
1892		render_t &render = state->m_render;
1893		UINT32 adr = state->m_ptrom[re->model.model];
1894		if(adr >= state->m_ptrom_limit)
	1911	render_t &render = m_render;
	1912	UINT32 adr = m_ptrom[re->model.model];
	1913	if(adr >= m_ptrom_limit)
1895	1914	{
1896	1915	logerror("WARNING: model %04x base address %08x out-of-bounds - pointram?\n", re->model.model, adr);
1897	1916	return;
1898	1917	}
1899	1918
1900		while(adr < state->m_ptrom_limit)
	1919	while(adr < m_ptrom_limit)
1901	1920	{
1902	1921	poly_vertex pv[15];
1903	1922
1904		UINT32 type = state->m_ptrom[adr++];
1905		UINT32 h    = state->m_ptrom[adr++];
	1923	UINT32 type = m_ptrom[adr++];
	1924	UINT32 h    = m_ptrom[adr++];
1906	1925
1907	1926
1908	1927	float tbase = (type >> 24) << 12;
r21058	r21059
1923	1942	adr += ne;
1924	1943	}
1925	1944	else
1926		light = state->m_ptrom[adr++];
	1945	light = m_ptrom[adr++];
1927	1946
1928	1947	float minz = FLT_MAX;
1929	1948	float maxz = FLT_MIN;
1930	1949
1931	1950	for(int i=0; i<ne; i++)
1932	1951	{
1933		UINT32 v1 = state->m_ptrom[adr++];
1934		UINT32 v2 = state->m_ptrom[adr++];
1935		UINT32 v3 = state->m_ptrom[adr++];
	1952	UINT32 v1 = m_ptrom[adr++];
	1953	UINT32 v2 = m_ptrom[adr++];
	1954	UINT32 v3 = m_ptrom[adr++];
1936	1955
1937	1956	render_apply_transform(u32_to_s24(v1), u32_to_s24(v2), u32_to_s24(v3), re, pv[i]);
1938	1957	pv[i].p[1] = (((v1 >> 20) & 0xf00) | ((v2 >> 24 & 0xff))) + 0.5;
r21058	r21059
1953	1972	break;
1954	1973	case 3:
1955	1974	{
1956		UINT32 norm = state->m_ptrom[extptr++];
	1975	UINT32 norm = m_ptrom[extptr++];
1957	1976	INT32 nx = u32_to_s10(norm >> 20);
1958	1977	INT32 ny = u32_to_s10(norm >> 10);
1959	1978	INT32 nz = u32_to_s10(norm);
1960	1979	INT32 nrx, nry, nrz;
1961	1980	render_apply_matrot(nx, ny, nz, re, nrx, nry, nrz);
1962	1981
1963		float lsi = float(nrx*state->m_light_vector[0] + nry*state->m_light_vector[1] + nrz*state->m_light_vector[2])/4194304.0;
	1982	float lsi = float(nrx*m_light_vector[0] + nry*m_light_vector[1] + nrz*m_light_vector[2])/4194304.0;
1964	1983	if(lsi < 0)
1965	1984	lsi = 0;
1966	1985
r21058	r21059
1987	2006	}
1988	2007	p->zkey = 0.5*(minz+maxz);
1989	2008	p->front = !(h & 0x00000001);
1990		p->rd.machine = &machine;
	2009	p->rd.machine = &machine();
1991	2010	p->rd.texture_lookup = render_texture_lookup_nocache_point;
1992		p->rd.pens = machine.pens + (color << 8);
	2011	p->rd.pens = machine().pens + (color << 8);
1993	2012	render.poly_count++;
1994	2013	}
1995	2014
r21058	r21059
2009	2028	return p1->zkey < p2->zkey ? 1 : p1->zkey > p2->zkey ? -1 : 0;
2010	2029	}
2011	2030
2012		static void render_flush(running_machine &machine, bitmap_rgb32 &bitmap)
	2031	void namcos23_state::render_flush(bitmap_rgb32 &bitmap)
2013	2032	{
2014		namcos23_state *state = machine.driver_data<namcos23_state>();
2015		render_t &render = state->m_render;
	2033	render_t &render = m_render;
2016	2034
2017	2035	if(!render.poly_count)
2018	2036	return;
r21058	r21059
2034	2052	render.poly_count = 0;
2035	2053	}
2036	2054
2037		static void render_run(running_machine &machine, bitmap_rgb32 &bitmap)
	2055	void namcos23_state::render_run(bitmap_rgb32 &bitmap)
2038	2056	{
2039		namcos23_state *state = machine.driver_data<namcos23_state>();
2040		render_t &render = state->m_render;
	2057	render_t &render = m_render;
2041	2058	const namcos23_render_entry *re = render.entries[!render.cur];
2042	2059
2043	2060	render.poly_count = 0;
r21058	r21059
2046	2063	switch(re->type)
2047	2064	{
2048	2065	case MODEL:
2049		render_one_model(machine, re);
	2066	render_one_model(re);
2050	2067	break;
2051	2068	case FLUSH:
2052		render_flush(machine, bitmap);
	2069	render_flush(bitmap);
2053	2070	break;
2054	2071	}
2055	2072	re++;
2056	2073	}
2057		render_flush(machine, bitmap);
	2074	render_flush(bitmap);
2058	2075
2059	2076	poly_wait(render.polymgr, "render_run");
2060	2077	}
r21058	r21059
2138	2155	update_mixer();
2139	2156	bitmap.fill(m_c404.bgcolor, cliprect);
2140	2157
2141		render_run(machine(), bitmap);
	2158	render_run(bitmap);
2142	2159
2143	2160	m_bgtilemap->set_palette_offset(m_c404.palbase);
2144	2161	if (m_c404.layer & 4)

trunk/src/mame/drivers/kingdrby.c

r21058	r21059
111	111	DECLARE_PALETTE_INIT(kingdrby);
112	112	DECLARE_PALETTE_INIT(kingdrbb);
113	113	UINT32 screen_update_kingdrby(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	114	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
114	115	};
115	116
116	117
r21058	r21059
183	184	0x22, 0x22, 0x22, 0x22, 0x22, 0x11, 0x22, 0x22
184	185	};
185	186
186		static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
	187	void kingdrby_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
187	188	{
188		kingdrby_state *state = machine.driver_data<kingdrby_state>();
189		UINT8 *spriteram = state->m_spriteram;
	189	UINT8 *spriteram = m_spriteram;
190	190	int count = 0;
191	191
192	192	/*sprites not fully understood.*/
r21058	r21059
217	217	{
218	218	for(dy=0;dy<h;dy++)
219	219	for(dx=0;dx<w;dx++)
220		drawgfx_transpen(bitmap,cliprect,machine.gfx[0],spr_offs++,colour,1,0,((x+16*w)-(dx+1)*16),(y+dy*16),0);
	220	drawgfx_transpen(bitmap,cliprect,machine().gfx[0],spr_offs++,colour,1,0,((x+16*w)-(dx+1)*16),(y+dy*16),0);
221	221	}
222	222	else
223	223	{
224	224	for(dy=0;dy<h;dy++)
225	225	for(dx=0;dx<w;dx++)
226		drawgfx_transpen(bitmap,cliprect,machine.gfx[0],spr_offs++,colour,0,0,(x+dx*16),(y+dy*16),0);
	226	drawgfx_transpen(bitmap,cliprect,machine().gfx[0],spr_offs++,colour,0,0,(x+dx*16),(y+dy*16),0);
227	227	}
228	228	}
229	229	}
r21058	r21059
243	243
244	244	/*TILEMAP_DRAW_CATEGORY + TILEMAP_DRAW_OPAQUE doesn't suit well?*/
245	245	m_sc0_tilemap->draw(bitmap, cliprect, 0,0);
246		draw_sprites(machine(),bitmap,cliprect);
	246	draw_sprites(bitmap,cliprect);
247	247	m_sc1_tilemap->draw(bitmap, cliprect, TILEMAP_DRAW_CATEGORY(1),0);
248	248	m_sc0w_tilemap->draw(bitmap, clip, 0,0);
249	249

trunk/src/mame/drivers/multigam.c

r21058	r21059
146	146	DECLARE_MACHINE_START(supergm3);
147	147	UINT32 screen_update_multigam(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
148	148	TIMER_CALLBACK_MEMBER(mmc1_resync_callback);
	149	void set_videorom_bank( int start, int count, int bank, int bank_size_in_kb);
	150	void set_videoram_bank( int start, int count, int bank, int bank_size_in_kb);
	151	void multigam_init_mmc3(UINT8 *prg_base, int prg_size, int chr_bank_base);
	152	void multigam_init_mapper02(UINT8* prg_base, int prg_size);
	153	void multigam_init_mmc1(UINT8 *prg_base, int prg_size, int chr_bank_base);
	154	void supergm3_set_bank();
	155	void multigm3_decrypt(UINT8* mem, int memsize, const UINT8* decode_nibble);
149	156	};
150	157
151	158
r21058	r21059
203	210
204	211	static const char * const banknames[] = { "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8", "bank9" };
205	212
206		static void set_videorom_bank(running_machine& machine, int start, int count, int bank, int bank_size_in_kb)
	213	void multigam_state::set_videorom_bank( int start, int count, int bank, int bank_size_in_kb)
207	214	{
208	215	int i;
209	216	int offset = bank * (bank_size_in_kb * 0x400);
r21058	r21059
211	218	/* count determines the size of the area mapped in KB */
212	219	for (i = 0; i < count; i++, offset += 0x400)
213	220	{
214		machine.root_device().membank(banknames[i + start])->set_base(machine.root_device().memregion("gfx1")->base() + offset);
	221	membank(banknames[i + start])->set_base(memregion("gfx1")->base() + offset);
215	222	}
216	223	}
217	224
218		static void set_videoram_bank(running_machine& machine, int start, int count, int bank, int bank_size_in_kb)
	225	void multigam_state::set_videoram_bank( int start, int count, int bank, int bank_size_in_kb)
219	226	{
220		multigam_state *state = machine.driver_data<multigam_state>();
221	227	int i;
222	228	int offset = bank * (bank_size_in_kb * 0x400);
223	229	/* bank_size_in_kb is used to determine how large the "bank" parameter is */
224	230	/* count determines the size of the area mapped in KB */
225	231	for (i = 0; i < count; i++, offset += 0x400)
226	232	{
227		state->membank(banknames[i + start])->set_base(state->m_vram + offset);
	233	membank(banknames[i + start])->set_base(m_vram + offset);
228	234	}
229	235	}
230	236
r21058	r21059
466	472	case 1: /* char banking */
467	473	data &= 0xfe;
468	474	page ^= (cmd << 1);
469		set_videorom_bank(machine(), page, 2, m_multigam3_mmc3_chr_bank_base + data, 1);
	475	set_videorom_bank(page, 2, m_multigam3_mmc3_chr_bank_base + data, 1);
470	476	break;
471	477
472	478	case 2: /* char banking */
r21058	r21059
474	480	case 4: /* char banking */
475	481	case 5: /* char banking */
476	482	page ^= cmd + 2;
477		set_videorom_bank(machine(), page, 1, m_multigam3_mmc3_chr_bank_base + data, 1);
	483	set_videorom_bank(page, 1, m_multigam3_mmc3_chr_bank_base + data, 1);
478	484	break;
479	485
480	486	case 6: /* program banking */
r21058	r21059
559	565	}
560	566	}
561	567
562		static void multigam_init_mmc3(running_machine &machine, UINT8 *prg_base, int prg_size, int chr_bank_base)
	568	void multigam_state::multigam_init_mmc3(UINT8 *prg_base, int prg_size, int chr_bank_base)
563	569	{
564		multigam_state *state = machine.driver_data<multigam_state>();
565		UINT8* dst = state->memregion("maincpu")->base();
	570	UINT8* dst = memregion("maincpu")->base();
566	571
567	572	// Tom & Jerry in Super Game III enables 6000 ram, but does not read/write it
568	573	// however, it expects ROM from 6000 there (code jumps to $6xxx)
569		memcpy(state->m_multigmc_mmc3_6000_ram, dst + 0x6000, 0x2000);
	574	memcpy(m_multigmc_mmc3_6000_ram, dst + 0x6000, 0x2000);
570	575
571	576	memcpy(&dst[0x8000], prg_base + (prg_size - 0x4000), 0x4000);
572	577	memcpy(&dst[0xc000], prg_base + (prg_size - 0x4000), 0x4000);
573	578
574		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mmc3_rom_switch_w),state));
	579	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mmc3_rom_switch_w),this));
575	580
576		state->m_multigam3_mmc3_banks[0] = 0x1e;
577		state->m_multigam3_mmc3_banks[1] = 0x1f;
578		state->m_multigam3_mmc3_scanline_counter = 0;
579		state->m_multigam3_mmc3_scanline_latch = 0;
580		state->m_multigam3_mmc3_4screen = 0;
581		state->m_multigam3_mmc3_last_bank = 0xff;
582		state->m_multigam3_mmc3_prg_base = prg_base;
583		state->m_multigam3_mmc3_chr_bank_base = chr_bank_base;
584		state->m_multigam3_mmc3_prg_size = prg_size;
	581	m_multigam3_mmc3_banks[0] = 0x1e;
	582	m_multigam3_mmc3_banks[1] = 0x1f;
	583	m_multigam3_mmc3_scanline_counter = 0;
	584	m_multigam3_mmc3_scanline_latch = 0;
	585	m_multigam3_mmc3_4screen = 0;
	586	m_multigam3_mmc3_last_bank = 0xff;
	587	m_multigam3_mmc3_prg_base = prg_base;
	588	m_multigam3_mmc3_chr_bank_base = chr_bank_base;
	589	m_multigam3_mmc3_prg_size = prg_size;
585	590	};
586	591
587	592	WRITE8_MEMBER(multigam_state::multigm3_mapper2_w)
588	593	{
589	594	if (m_game_gfx_bank & 0x80)
590	595	{
591		set_videorom_bank(machine(), 0, 8, (m_game_gfx_bank & 0x3c)  + (data & 0x3), 8);
	596	set_videorom_bank(0, 8, (m_game_gfx_bank & 0x3c)  + (data & 0x3), 8);
592	597	}
593	598	else
594	599	{
r21058	r21059
598	603
599	604	WRITE8_MEMBER(multigam_state::multigm3_switch_gfx_rom)
600	605	{
601		set_videorom_bank(machine(), 0, 8, data & 0x3f, 8);
	606	set_videorom_bank(0, 8, data & 0x3f, 8);
602	607	set_mirroring(data & 0x40 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
603	608	m_game_gfx_bank = data;
604	609	};
r21058	r21059
611	616
612	617	if (data == 0xa8)
613	618	{
614		multigam_init_mmc3(machine(), src + 0xa0000, 0x40000, 0x180);
	619	multigam_init_mmc3(src + 0xa0000, 0x40000, 0x180);
615	620	return;
616	621	}
617	622	else
r21058	r21059
674	679	memcpy(mem + 0x8000, m_mapper02_prg_base + 0x4000*(data & bankmask), 0x4000);
675	680	}
676	681
677		static void multigam_init_mapper02(running_machine &machine, UINT8* prg_base, int prg_size)
	682	void multigam_state::multigam_init_mapper02(UINT8* prg_base, int prg_size)
678	683	{
679		multigam_state *state = machine.driver_data<multigam_state>();
680		ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
681		UINT8* mem = state->memregion("maincpu")->base();
	684	ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
	685	UINT8* mem = memregion("maincpu")->base();
682	686	memcpy(mem + 0x8000, prg_base + prg_size - 0x8000, 0x8000);
683		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mapper02_rom_switch_w),state));
	687	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mapper02_rom_switch_w),this));
684	688
685		state->m_mapper02_prg_base = prg_base;
686		state->m_mapper02_prg_size = prg_size;
	689	m_mapper02_prg_base = prg_base;
	690	m_mapper02_prg_size = prg_size;
687	691	ppu->set_scanline_callback(0);
688	692	}
689	693
r21058	r21059
779	783
780	784	case 1: /* video rom banking - bank 0 - 4k or 8k */
781	785	if (m_mmc1_chr_bank_base == 0)
782		set_videoram_bank(machine(), 0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4);
	786	set_videoram_bank(0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4);
783	787	else
784		set_videorom_bank(machine(), 0, (m_vrom4k) ? 4 : 8, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4);
	788	set_videorom_bank(0, (m_vrom4k) ? 4 : 8, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4);
785	789	break;
786	790
787	791	case 2: /* video rom banking - bank 1 - 4k only */
788	792	if (m_vrom4k)
789	793	{
790	794	if (m_mmc1_chr_bank_base == 0)
791		set_videoram_bank(machine(), 0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4);
	795	set_videoram_bank(0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4);
792	796	else
793		set_videorom_bank(machine(), 4, 4, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4);
	797	set_videorom_bank(4, 4, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4);
794	798	}
795	799	break;
796	800
r21058	r21059
827	831	}
828	832	}
829	833
830		static void multigam_init_mmc1(running_machine &machine, UINT8 *prg_base, int prg_size, int chr_bank_base)
	834	void multigam_state::multigam_init_mmc1(UINT8 *prg_base, int prg_size, int chr_bank_base)
831	835	{
832		multigam_state *state = machine.driver_data<multigam_state>();
833		UINT8* dst = state->memregion("maincpu")->base();
834		ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
	836	UINT8* dst = memregion("maincpu")->base();
	837	ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
835	838
836	839	memcpy(&dst[0x8000], prg_base + (prg_size - 0x8000), 0x8000);
837	840
838		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::mmc1_rom_switch_w),state));
	841	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::mmc1_rom_switch_w),this));
839	842
840		state->m_mmc1_reg_write_enable = 1;
841		state->m_mmc1_rom_mask = (prg_size / 0x4000) - 1;
842		state->m_mmc1_prg_base = prg_base;
843		state->m_mmc1_prg_size = prg_size;
844		state->m_mmc1_chr_bank_base = chr_bank_base;
	843	m_mmc1_reg_write_enable = 1;
	844	m_mmc1_rom_mask = (prg_size / 0x4000) - 1;
	845	m_mmc1_prg_base = prg_base;
	846	m_mmc1_prg_size = prg_size;
	847	m_mmc1_chr_bank_base = chr_bank_base;
845	848
846	849	ppu->set_scanline_callback(0);
847	850	};
r21058	r21059
869	872	*/
870	873
871	874
872		static void supergm3_set_bank(running_machine &machine)
	875	void multigam_state::supergm3_set_bank()
873	876	{
874		multigam_state *state = machine.driver_data<multigam_state>();
875		ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
876		UINT8* mem = state->memregion("maincpu")->base();
	877	ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
	878	UINT8* mem = memregion("maincpu")->base();
877	879
878	880	// video bank
879		if (state->m_supergm3_chr_bank == 0x10 ||
880		state->m_supergm3_chr_bank == 0x40 )
	881	if (m_supergm3_chr_bank == 0x10 ||
	882	m_supergm3_chr_bank == 0x40 )
881	883	{
882	884	// VRAM
883	885	ppu->space(AS_PROGRAM).install_read_bank(0x0000, 0x1fff, "bank1");
884	886	ppu->space(AS_PROGRAM).install_write_bank(0x0000, 0x1fff, "bank1");
885		state->membank("bank1")->set_base(state->m_vram);
	887	membank("bank1")->set_base(m_vram);
886	888
887		if (state->m_supergm3_chr_bank == 0x40)
888		state->set_mirroring(PPU_MIRROR_VERT);
	889	if (m_supergm3_chr_bank == 0x40)
	890	set_mirroring(PPU_MIRROR_VERT);
889	891	}
890	892	else
891	893	{
r21058	r21059
899	901	ppu->space(AS_PROGRAM).install_read_bank(0x1c00, 0x1fff, "bank9");
900	902	ppu->space(AS_PROGRAM).unmap_write(0x0000, 0x1fff);
901	903
902		set_videorom_bank(machine, 0, 8, 0, 8);
	904	set_videorom_bank(0, 8, 0, 8);
903	905	}
904	906
905	907	// prg bank
906		if ((state->m_supergm3_prg_bank & 0x80) == 0)
	908	if ((m_supergm3_prg_bank & 0x80) == 0)
907	909	{
908	910	// title screen
909	911	memcpy(mem + 0x8000, mem + 0x18000, 0x8000);
910		state->membank("bank10")->set_base(mem + 0x6000);
	912	membank("bank10")->set_base(mem + 0x6000);
911	913	ppu->set_scanline_callback(0);
912	914	}
913		else if ((state->m_supergm3_prg_bank & 0x40) == 0)
	915	else if ((m_supergm3_prg_bank & 0x40) == 0)
914	916	{
915	917	// mapper 02
916		multigam_init_mapper02(machine,
917		machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
	918	multigam_init_mapper02(memregion("user1")->base() + (m_supergm3_prg_bank & 0x1f)*0x20000,
918	919	0x20000);
919	920	}
920		else if (state->m_supergm3_chr_bank & 0x10)
	921	else if (m_supergm3_chr_bank & 0x10)
921	922	{
922	923	// MMC3
923		multigam_init_mmc3(machine,
924		machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
925		(state->m_supergm3_prg_bank & 0x20) ? 0x20000 : 0x40000,
926		(state->m_supergm3_chr_bank & 0x0f)*0x80);
	924	multigam_init_mmc3(memregion("user1")->base() + (m_supergm3_prg_bank & 0x1f)*0x20000,
	925	(m_supergm3_prg_bank & 0x20) ? 0x20000 : 0x40000,
	926	(m_supergm3_chr_bank & 0x0f)*0x80);
927	927	}
928	928	else
929	929	{
930	930	//MMC1
931		multigam_init_mmc1(machine,
932		machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
	931	multigam_init_mmc1(memregion("user1")->base() + (m_supergm3_prg_bank & 0x1f)*0x20000,
933	932	0x20000,
934		(state->m_supergm3_chr_bank & 0x0f)*0x80/4 );
	933	(m_supergm3_chr_bank & 0x0f)*0x80/4 );
935	934	}
936	935	}
937	936
r21058	r21059
943	942	WRITE8_MEMBER(multigam_state::supergm3_chr_bank_w)
944	943	{
945	944	m_supergm3_chr_bank = data;
946		supergm3_set_bank(machine());
	945	supergm3_set_bank();
947	946	}
948	947
949	948	/******************************************************
r21058	r21059
1176	1175	machine().device("ppu")->memory().space(AS_PROGRAM).install_read_bank(0x1800, 0x1bff, "bank8");
1177	1176	machine().device("ppu")->memory().space(AS_PROGRAM).install_read_bank(0x1c00, 0x1fff, "bank9");
1178	1177
1179		set_videorom_bank(machine(), 0, 8, 0, 8);
	1178	set_videorom_bank(0, 8, 0, 8);
1180	1179	};
1181	1180
1182	1181	MACHINE_START_MEMBER(multigam_state,supergm3)
r21058	r21059
1365	1364	multigam_switch_prg_rom(space, 0x0, 0x01);
1366	1365	}
1367	1366
1368		static void multigm3_decrypt(UINT8* mem, int memsize, const UINT8* decode_nibble)
	1367	void multigam_state::multigm3_decrypt(UINT8* mem, int memsize, const UINT8* decode_nibble)
1369	1368	{
1370	1369	int i;
1371	1370	for (i = 0; i < memsize; i++)

trunk/src/mame/drivers/jalmah.c

r21058	r21059
207	207	UINT32 screen_update_jalmah(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
208	208	UINT32 screen_update_urashima(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
209	209	TIMER_DEVICE_CALLBACK_MEMBER(jalmah_mcu_sim);
	210	void jalmah_priority_system();
	211	void draw_sc0_layer(bitmap_ind16 &bitmap, const rectangle &cliprect);
	212	void draw_sc1_layer(bitmap_ind16 &bitmap, const rectangle &cliprect);
	213	void draw_sc2_layer(bitmap_ind16 &bitmap, const rectangle &cliprect);
	214	void draw_sc3_layer(bitmap_ind16 &bitmap, const rectangle &cliprect);
	215	void daireika_palette_dma(UINT16 val);
	216	void daireika_mcu_run();
	217	void mjzoomin_mcu_run();
	218	void urashima_mcu_run();
	219	void second_mcu_run();
210	220	};
211	221
212	222
r21058	r21059
366	376	In the end the final results always are one bit assigned to each priority (i.e. most
367	377	priority = 8, then 4, 2 and finally 1).
368	378	***************************************************************************************/
369		static void jalmah_priority_system(running_machine &machine)
	379	void jalmah_state::jalmah_priority_system()
370	380	{
371		jalmah_state *state = machine.driver_data<jalmah_state>();
372		UINT8 *pri_rom = state->memregion("user1")->base();
	381	UINT8 *pri_rom = memregion("user1")->base();
373	382	UINT8 i;
374	383	UINT8 prinum[0x10];
375	384
376		state->m_sc0_prin = 0;
377		state->m_sc1_prin = 0;
378		state->m_sc2_prin = 0;
379		state->m_sc3_prin = 0;
	385	m_sc0_prin = 0;
	386	m_sc1_prin = 0;
	387	m_sc2_prin = 0;
	388	m_sc3_prin = 0;
380	389
381	390	for(i=0;i<0x10;i++)
382	391	{
383		prinum[i] = pri_rom[i+state->m_pri*0x10];
	392	prinum[i] = pri_rom[i+m_pri*0x10];
384	393
385		if(prinum[i] == 0) { state->m_sc0_prin++; }
386		if(prinum[i] == 1) { state->m_sc1_prin++; }
387		if(prinum[i] == 2) { state->m_sc2_prin++; }
388		if(prinum[i] == 3) { state->m_sc3_prin++; }
	394	if(prinum[i] == 0) { m_sc0_prin++; }
	395	if(prinum[i] == 1) { m_sc1_prin++; }
	396	if(prinum[i] == 2) { m_sc2_prin++; }
	397	if(prinum[i] == 3) { m_sc3_prin++; }
389	398	}
390	399
391		//popmessage("%02x %02x %02x %02x",state->m_sc0_prin,state->m_sc1_prin,state->m_sc2_prin,state->m_sc3_prin);
	400	//popmessage("%02x %02x %02x %02x",m_sc0_prin,m_sc1_prin,m_sc2_prin,m_sc3_prin);
392	401	}
393	402
394		static void draw_sc0_layer(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
	403	void jalmah_state::draw_sc0_layer(bitmap_ind16 &bitmap, const rectangle &cliprect)
395	404	{
396		jalmah_state *state = machine.driver_data<jalmah_state>();
397		switch(state->m_jm_vregs[0] & 3)
	405	switch(m_jm_vregs[0] & 3)
398	406	{
399		case 0: state->m_sc0_tilemap_0->draw(bitmap, cliprect, 0,0); break;
400		case 1: state->m_sc0_tilemap_1->draw(bitmap, cliprect, 0,0); break;
401		case 2: state->m_sc0_tilemap_2->draw(bitmap, cliprect, 0,0); break;
402		case 3: state->m_sc0_tilemap_3->draw(bitmap, cliprect, 0,0); break;
	407	case 0: m_sc0_tilemap_0->draw(bitmap, cliprect, 0,0); break;
	408	case 1: m_sc0_tilemap_1->draw(bitmap, cliprect, 0,0); break;
	409	case 2: m_sc0_tilemap_2->draw(bitmap, cliprect, 0,0); break;
	410	case 3: m_sc0_tilemap_3->draw(bitmap, cliprect, 0,0); break;
403	411	}
404	412	}
405	413
406		static void draw_sc1_layer(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
	414	void jalmah_state::draw_sc1_layer(bitmap_ind16 &bitmap, const rectangle &cliprect)
407	415	{
408		jalmah_state *state = machine.driver_data<jalmah_state>();
409		switch(state->m_jm_vregs[1] & 3)
	416	switch(m_jm_vregs[1] & 3)
410	417	{
411		case 0: state->m_sc1_tilemap_0->draw(bitmap, cliprect, 0,0); break;
412		case 1: state->m_sc1_tilemap_1->draw(bitmap, cliprect, 0,0); break;
413		case 2: state->m_sc1_tilemap_2->draw(bitmap, cliprect, 0,0); break;
414		case 3: state->m_sc1_tilemap_3->draw(bitmap, cliprect, 0,0); break;
	418	case 0: m_sc1_tilemap_0->draw(bitmap, cliprect, 0,0); break;
	419	case 1: m_sc1_tilemap_1->draw(bitmap, cliprect, 0,0); break;
	420	case 2: m_sc1_tilemap_2->draw(bitmap, cliprect, 0,0); break;
	421	case 3: m_sc1_tilemap_3->draw(bitmap, cliprect, 0,0); break;
415	422	}
416	423	}
417	424
418		static void draw_sc2_layer(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
	425	void jalmah_state::draw_sc2_layer(bitmap_ind16 &bitmap, const rectangle &cliprect)
419	426	{
420		jalmah_state *state = machine.driver_data<jalmah_state>();
421		switch(state->m_jm_vregs[2] & 3)
	427	switch(m_jm_vregs[2] & 3)
422	428	{
423		case 0: state->m_sc2_tilemap_0->draw(bitmap, cliprect, 0,0); break;
424		case 1: state->m_sc2_tilemap_1->draw(bitmap, cliprect, 0,0); break;
425		case 2: state->m_sc2_tilemap_2->draw(bitmap, cliprect, 0,0); break;
426		case 3: state->m_sc2_tilemap_3->draw(bitmap, cliprect, 0,0); break;
	429	case 0: m_sc2_tilemap_0->draw(bitmap, cliprect, 0,0); break;
	430	case 1: m_sc2_tilemap_1->draw(bitmap, cliprect, 0,0); break;
	431	case 2: m_sc2_tilemap_2->draw(bitmap, cliprect, 0,0); break;
	432	case 3: m_sc2_tilemap_3->draw(bitmap, cliprect, 0,0); break;
427	433	}
428	434	}
429	435
430		static void draw_sc3_layer(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
	436	void jalmah_state::draw_sc3_layer(bitmap_ind16 &bitmap, const rectangle &cliprect)
431	437	{
432		jalmah_state *state = machine.driver_data<jalmah_state>();
433		switch(state->m_jm_vregs[3] & 3)
	438	switch(m_jm_vregs[3] & 3)
434	439	{
435	440	case 0:
436		case 1: state->m_sc3_tilemap_0->draw(bitmap, cliprect, 0,0); break;
437		case 2: state->m_sc3_tilemap_2->draw(bitmap, cliprect, 0,0); break;
438		case 3: state->m_sc3_tilemap_3->draw(bitmap, cliprect, 0,0); break;
	441	case 1: m_sc3_tilemap_0->draw(bitmap, cliprect, 0,0); break;
	442	case 2: m_sc3_tilemap_2->draw(bitmap, cliprect, 0,0); break;
	443	case 3: m_sc3_tilemap_3->draw(bitmap, cliprect, 0,0); break;
439	444	}
440	445	}
441	446
r21058	r21059
443	448	{
444	449	UINT16 *jm_scrollram = m_jm_scrollram;
445	450	UINT8 cur_prin;
446		jalmah_priority_system(machine());
	451	jalmah_priority_system();
447	452
448	453	m_sc0_tilemap_0->set_scrollx(0, jm_scrollram[0] & 0xfff);
449	454	m_sc0_tilemap_1->set_scrollx(0, jm_scrollram[0] & 0x7ff);
r21058	r21059
490	495
491	496	for(cur_prin=1;cur_prin<=0x8;cur_prin<<=1)
492	497	{
493		if(cur_prin==m_sc0_prin) { draw_sc0_layer(machine(),bitmap,cliprect); }
494		if(cur_prin==m_sc1_prin) { draw_sc1_layer(machine(),bitmap,cliprect); }
495		if(cur_prin==m_sc2_prin) { draw_sc2_layer(machine(),bitmap,cliprect); }
496		if(cur_prin==m_sc3_prin) { draw_sc3_layer(machine(),bitmap,cliprect); }
	498	if(cur_prin==m_sc0_prin) { draw_sc0_layer(bitmap,cliprect); }
	499	if(cur_prin==m_sc1_prin) { draw_sc1_layer(bitmap,cliprect); }
	500	if(cur_prin==m_sc2_prin) { draw_sc2_layer(bitmap,cliprect); }
	501	if(cur_prin==m_sc3_prin) { draw_sc3_layer(bitmap,cliprect); }
497	502	}
498	503
499	504	return 0;
r21058	r21059
712	717
713	718
714	719	#define MCU_READ(tag, _bit_, _offset_, _retval_) \
715		if((0xffff - machine.root_device().ioport(tag)->read()) & _bit_) { jm_shared_ram[_offset_] = _retval_; }
	720	if((0xffff - ioport(tag)->read()) & _bit_) { jm_shared_ram[_offset_] = _retval_; }
716	721
717	722	/*Funky "DMA" / protection thing*/
718	723	/*---- -x-- "DMA" execute.*/
r21058	r21059
728	733	}
729	734
730	735	/*same as $f00c0 sub-routine,but with additional work-around,to remove from here...*/
731		static void daireika_palette_dma(running_machine &machine, UINT16 val)
	736	void jalmah_state::daireika_palette_dma(UINT16 val)
732	737	{
733		//jalmah_state *state = machine.driver_data<jalmah_state>();
734		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	738	address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM);
735	739	UINT32 index_1, index_2, src_addr, tmp_addr;
736	740	/*a0=301c0+jm_shared_ram[0x540/2] & 0xf00 */
737	741	/*a1=88000*/
r21058	r21059
750	754	}
751	755
752	756	/*RAM-based protection handlings*/
753		static void daireika_mcu_run(running_machine &machine)
	757	void jalmah_state::daireika_mcu_run()
754	758	{
755		jalmah_state *state = machine.driver_data<jalmah_state>();
756		UINT16 *jm_shared_ram = state->m_jm_shared_ram;
	759	UINT16 *jm_shared_ram = m_jm_shared_ram;
757	760
758		if(((jm_shared_ram[0x550/2] & 0xf00) == 0x700) && ((jm_shared_ram[0x540/2] & 0xf00) != state->m_dma_old))
	761	if(((jm_shared_ram[0x550/2] & 0xf00) == 0x700) && ((jm_shared_ram[0x540/2] & 0xf00) != m_dma_old))
759	762	{
760		state->m_dma_old = jm_shared_ram[0x540/2] & 0xf00;
761		daireika_palette_dma(machine,((jm_shared_ram[0x540/2] & 0x0f00) >> 8));
	763	m_dma_old = jm_shared_ram[0x540/2] & 0xf00;
	764	daireika_palette_dma(((jm_shared_ram[0x540/2] & 0x0f00) >> 8));
762	765	}
763	766
764		if(state->m_test_mode)  //service_mode
	767	if(m_test_mode)  //service_mode
765	768	{
766		jm_shared_ram[0x000/2] = machine.root_device().ioport("KEY0")->read();
767		jm_shared_ram[0x002/2] = machine.root_device().ioport("KEY1")->read();
768		jm_shared_ram[0x004/2] = machine.root_device().ioport("KEY2")->read();
769		jm_shared_ram[0x006/2] = machine.root_device().ioport("KEY3")->read();
770		jm_shared_ram[0x008/2] = machine.root_device().ioport("KEY4")->read();
771		jm_shared_ram[0x00a/2] = machine.root_device().ioport("KEY5")->read();
	769	jm_shared_ram[0x000/2] = ioport("KEY0")->read();
	770	jm_shared_ram[0x002/2] = ioport("KEY1")->read();
	771	jm_shared_ram[0x004/2] = ioport("KEY2")->read();
	772	jm_shared_ram[0x006/2] = ioport("KEY3")->read();
	773	jm_shared_ram[0x008/2] = ioport("KEY4")->read();
	774	jm_shared_ram[0x00a/2] = ioport("KEY5")->read();
772	775	}
773	776	else
774	777	{
r21058	r21059
795	798	MCU_READ("KEY1", 0x0002, 0x000/2, 0x13);        /*CHI   (trusted)*/
796	799	MCU_READ("KEY0", 0x0004, 0x000/2, 0x14);        /*START1*/
797	800	}
798		state->m_prg_prot++;
799		if(state->m_prg_prot > 0x10) { state->m_prg_prot = 0; }
800		jm_shared_ram[0x00e/2] = state->m_prg_prot;
	801	m_prg_prot++;
	802	if(m_prg_prot > 0x10) { m_prg_prot = 0; }
	803	jm_shared_ram[0x00e/2] = m_prg_prot;
801	804	}
802	805
803		static void mjzoomin_mcu_run(running_machine &machine)
	806	void jalmah_state::mjzoomin_mcu_run()
804	807	{
805		jalmah_state *state = machine.driver_data<jalmah_state>();
806		UINT16 *jm_shared_ram = state->m_jm_shared_ram;
	808	UINT16 *jm_shared_ram = m_jm_shared_ram;
807	809
808		if(state->m_test_mode)  //service_mode
	810	if(m_test_mode)  //service_mode
809	811	{
810		jm_shared_ram[0x000/2] = state->ioport("KEY0")->read();
811		jm_shared_ram[0x002/2] = state->ioport("KEY1")->read();
812		jm_shared_ram[0x004/2] = state->ioport("KEY2")->read();
813		jm_shared_ram[0x006/2] = state->ioport("KEY3")->read();
814		jm_shared_ram[0x008/2] = state->ioport("KEY4")->read();
815		jm_shared_ram[0x00a/2] = state->ioport("KEY5")->read();
	812	jm_shared_ram[0x000/2] = ioport("KEY0")->read();
	813	jm_shared_ram[0x002/2] = ioport("KEY1")->read();
	814	jm_shared_ram[0x004/2] = ioport("KEY2")->read();
	815	jm_shared_ram[0x006/2] = ioport("KEY3")->read();
	816	jm_shared_ram[0x008/2] = ioport("KEY4")->read();
	817	jm_shared_ram[0x00a/2] = ioport("KEY5")->read();
816	818	}
817	819	else
818	820	{
r21058	r21059
839	841	MCU_READ("KEY1", 0x0002, 0x000/2, 0x13);        /*CHI   (trusted)*/
840	842	MCU_READ("KEY0", 0x0004, 0x000/2, 0x14);        /*START1*/
841	843	}
842		jm_shared_ram[0x00c/2] = machine.rand() & 0xffff;
843		state->m_prg_prot++;
844		if(state->m_prg_prot > 0x10) { state->m_prg_prot = 0; }
845		jm_shared_ram[0x00e/2] = state->m_prg_prot;
	844	jm_shared_ram[0x00c/2] = machine().rand() & 0xffff;
	845	m_prg_prot++;
	846	if(m_prg_prot > 0x10) { m_prg_prot = 0; }
	847	jm_shared_ram[0x00e/2] = m_prg_prot;
846	848	}
847	849
848		static void urashima_mcu_run(running_machine &machine)
	850	void jalmah_state::urashima_mcu_run()
849	851	{
850		jalmah_state *state = machine.driver_data<jalmah_state>();
851		UINT16 *jm_shared_ram = state->m_jm_shared_ram;
	852	UINT16 *jm_shared_ram = m_jm_shared_ram;
852	853
853		if(state->m_test_mode)  //service_mode
	854	if(m_test_mode)  //service_mode
854	855	{
855		jm_shared_ram[0x300/2] = state->ioport("KEY0")->read();
856		jm_shared_ram[0x302/2] = state->ioport("KEY1")->read();
857		jm_shared_ram[0x304/2] = state->ioport("KEY2")->read();
858		jm_shared_ram[0x306/2] = state->ioport("KEY3")->read();
859		jm_shared_ram[0x308/2] = state->ioport("KEY4")->read();
860		jm_shared_ram[0x30a/2] = state->ioport("KEY5")->read();
	856	jm_shared_ram[0x300/2] = ioport("KEY0")->read();
	857	jm_shared_ram[0x302/2] = ioport("KEY1")->read();
	858	jm_shared_ram[0x304/2] = ioport("KEY2")->read();
	859	jm_shared_ram[0x306/2] = ioport("KEY3")->read();
	860	jm_shared_ram[0x308/2] = ioport("KEY4")->read();
	861	jm_shared_ram[0x30a/2] = ioport("KEY5")->read();
861	862	}
862	863	else
863	864	{
r21058	r21059
884	885	MCU_READ("KEY1", 0x0002, 0x300/2, 0x13);        /*CHI   (trusted)*/
885	886	MCU_READ("KEY0", 0x0004, 0x300/2, 0x14);        /*START1*/
886	887	}
887		jm_shared_ram[0x30c/2] = machine.rand() & 0xffff;
888		state->m_prg_prot++;
889		if(state->m_prg_prot > 0x10) { state->m_prg_prot = 0; }
890		jm_shared_ram[0x30e/2] = state->m_prg_prot;
	888	jm_shared_ram[0x30c/2] = machine().rand() & 0xffff;
	889	m_prg_prot++;
	890	if(m_prg_prot > 0x10) { m_prg_prot = 0; }
	891	jm_shared_ram[0x30e/2] = m_prg_prot;
891	892	}
892	893
893		static void second_mcu_run(running_machine &machine)
	894	void jalmah_state::second_mcu_run()
894	895	{
895		jalmah_state *state = machine.driver_data<jalmah_state>();
896		UINT16 *jm_shared_ram = state->m_jm_shared_ram;
897		if(state->m_test_mode)  //service_mode
	896	UINT16 *jm_shared_ram = m_jm_shared_ram;
	897	if(m_test_mode)  //service_mode
898	898	{
899		jm_shared_ram[0x200/2] = state->ioport("KEY0")->read();
900		jm_shared_ram[0x202/2] = state->ioport("KEY1")->read();
901		jm_shared_ram[0x204/2] = state->ioport("KEY2")->read();
	899	jm_shared_ram[0x200/2] = ioport("KEY0")->read();
	900	jm_shared_ram[0x202/2] = ioport("KEY1")->read();
	901	jm_shared_ram[0x204/2] = ioport("KEY2")->read();
902	902	}
903	903	else
904	904	{
r21058	r21059
927	927
928	928	//      MCU_READ("KEY0", 0x0004, 0x7b8/2, 0x03);        /*START1(correct?)  */
929	929	}
930		jm_shared_ram[0x20c/2] = machine.rand() & 0xffff; //kakumei2
	930	jm_shared_ram[0x20c/2] = machine().rand() & 0xffff; //kakumei2
931	931
932	932	}
933	933
r21058	r21059
943	943	#define KAKUMEI2_MCU (0x22)
944	944	#define SUCHIPI_MCU  (0x23)
945	945	*/
946		case MJZOOMIN_MCU: mjzoomin_mcu_run(machine()); break;
947		case DAIREIKA_MCU: daireika_mcu_run(machine()); break;
948		case URASHIMA_MCU: urashima_mcu_run(machine()); break;
	946	case MJZOOMIN_MCU: mjzoomin_mcu_run(); break;
	947	case DAIREIKA_MCU: daireika_mcu_run(); break;
	948	case URASHIMA_MCU: urashima_mcu_run(); break;
949	949	case KAKUMEI_MCU:
950	950	case KAKUMEI2_MCU:
951		case SUCHIPI_MCU:  second_mcu_run(machine()); break;
	951	case SUCHIPI_MCU:  second_mcu_run(); break;
952	952	}
953	953	}
954	954

trunk/src/mame/drivers/sigmab98.c

r21058	r21059
179	179	void screen_eof_sammymdl(screen_device &screen, bool state);
180	180	INTERRUPT_GEN_MEMBER(gegege_vblank_interrupt);
181	181	TIMER_DEVICE_CALLBACK_MEMBER(sammymd1_irq);
	182	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri_mask);
182	183	};
183	184
184	185
r21058	r21059
224	225
225	226	***************************************************************************/
226	227
227		static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri_mask)
	228	void sigmab98_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri_mask)
228	229	{
229		sigmab98_state *state = machine.driver_data<sigmab98_state>();
230		UINT8 *end      =   state->m_spriteram - 0x10;
231		UINT8 *s        =   end + state->m_spriteram.bytes();
	230	UINT8 *end      =   m_spriteram - 0x10;
	231	UINT8 *s        =   end + m_spriteram.bytes();
232	232
233	233	for ( ; s != end; s -= 0x10 )
234	234	{
r21058	r21059
296	296	{
297	297	for (x = x0; x != x1; x += dx)
298	298	{
299		drawgfxzoom_transpen(   bitmap, cliprect, machine.gfx[gfx],
	299	drawgfxzoom_transpen(   bitmap, cliprect, machine().gfx[gfx],
300	300	code++, color,
301	301	flipx, flipy,
302	302	(sx + x * dim) / 0x10000, (sy + y * dim) / 0x10000,
r21058	r21059
325	325	bitmap.fill(get_black_pen(machine()), cliprect);
326	326
327	327	// Draw from priority 3 (bottom, converted to a bitmask) to priority 0 (top)
328		draw_sprites(machine(), bitmap, cliprect, layers_ctrl & 8);
329		draw_sprites(machine(), bitmap, cliprect, layers_ctrl & 4);
330		draw_sprites(machine(), bitmap, cliprect, layers_ctrl & 2);
331		draw_sprites(machine(), bitmap, cliprect, layers_ctrl & 1);
	328	draw_sprites(bitmap, cliprect, layers_ctrl & 8);
	329	draw_sprites(bitmap, cliprect, layers_ctrl & 4);
	330	draw_sprites(bitmap, cliprect, layers_ctrl & 2);
	331	draw_sprites(bitmap, cliprect, layers_ctrl & 1);
332	332
333	333	return 0;
334	334	}

trunk/src/mame/drivers/peplus.c

r21058	r21059
268	268	virtual void palette_init();
269	269	UINT32 screen_update_peplus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
270	270	TIMER_CALLBACK_MEMBER(assert_lp_cb);
	271	void peplus_load_superdata(const char *bank_name);
	272	void peplus_init();
271	273	};
272	274
273	275	static const UINT8  id_022[8] = { 0x00, 0x01, 0x04, 0x09, 0x13, 0x16, 0x18, 0x00 };
r21058	r21059
311	313	* Memory Copy *
312	314	***************/
313	315
314		static void peplus_load_superdata(running_machine &machine, const char *bank_name)
	316	void peplus_state::peplus_load_superdata(const char *bank_name)
315	317	{
316		peplus_state *state = machine.driver_data<peplus_state>();
317		UINT8 *super_data = state->memregion(bank_name)->base();
	318	UINT8 *super_data = memregion(bank_name)->base();
318	319
319	320	/* Distribute Superboard Data */
320		memcpy(state->m_s3000_ram, &super_data[0x3000], 0x1000);
321		memcpy(state->m_s5000_ram, &super_data[0x5000], 0x1000);
322		memcpy(state->m_s7000_ram, &super_data[0x7000], 0x1000);
323		memcpy(state->m_sb000_ram, &super_data[0xb000], 0x1000);
324		memcpy(state->m_sd000_ram, &super_data[0xd000], 0x1000);
325		memcpy(state->m_sf000_ram, &super_data[0xf000], 0x1000);
	321	memcpy(m_s3000_ram, &super_data[0x3000], 0x1000);
	322	memcpy(m_s5000_ram, &super_data[0x5000], 0x1000);
	323	memcpy(m_s7000_ram, &super_data[0x7000], 0x1000);
	324	memcpy(m_sb000_ram, &super_data[0xb000], 0x1000);
	325	memcpy(m_sd000_ram, &super_data[0xd000], 0x1000);
	326	memcpy(m_sf000_ram, &super_data[0xf000], 0x1000);
326	327	}
327	328
328	329
r21058	r21059
431	432	if (offset == 0x1fff && m_wingboard && data < 5)
432	433	{
433	434	sprintf(bank_name, "user%d", data + 1);
434		peplus_load_superdata(machine(), bank_name);
	435	peplus_load_superdata(bank_name);
435	436	}
436	437
437	438	m_cmos_ram[offset] = data;
r21058	r21059
1377	1378	*****************/
1378	1379
1379	1380	/* Normal board */
1380		static void peplus_init(running_machine &machine)
	1381	void peplus_state::peplus_init()
1381	1382	{
1382		peplus_state *state = machine.driver_data<peplus_state>();
1383	1383	/* default : no address to patch in program RAM to enable autohold feature */
1384		state->m_autohold_addr = 0;
	1384	m_autohold_addr = 0;
1385	1385	}
1386	1386
1387	1387
r21058	r21059
1394	1394	{
1395	1395	m_wingboard = FALSE;
1396	1396	m_jumper_e16_e17 = FALSE;
1397		peplus_init(machine());
	1397	peplus_init();
1398	1398	}
1399	1399
1400	1400	/* Superboard */
r21058	r21059
1402	1402	{
1403	1403	m_wingboard = FALSE;
1404	1404	m_jumper_e16_e17 = FALSE;
1405		peplus_load_superdata(machine(), "user1");
	1405	peplus_load_superdata("user1");
1406	1406
1407		peplus_init(machine());
	1407	peplus_init();
1408	1408	}
1409	1409
1410	1410	/* Superboard with Attached Wingboard */
r21058	r21059
1412	1412	{
1413	1413	m_wingboard = TRUE;
1414	1414	m_jumper_e16_e17 = TRUE;
1415		peplus_load_superdata(machine(), "user1");
	1415	peplus_load_superdata("user1");
1416	1416
1417		peplus_init(machine());
	1417	peplus_init();
1418	1418	}
1419	1419
1420	1420

trunk/src/mame/drivers/vegas.c

r21058	r21059
505	505	UINT32 screen_update_vegas(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
506	506	TIMER_CALLBACK_MEMBER(nile_timer_callback);
507	507	void remap_dynamic_addresses();
	508	void update_nile_irqs();
	509	void update_sio_irqs();
	510	inline void _add_dynamic_address(offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname);
	511	inline void _add_dynamic_device_address(device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname);
	512
	513	void init_common(int ioasic, int serialnum);
508	514	};
509	515
510	516
r21058	r21059
843	849	*
844	850	*************************************/
845	851
846		static void update_nile_irqs(running_machine &machine)
	852	void vegas_state::update_nile_irqs()
847	853	{
848		vegas_state *state = machine.driver_data<vegas_state>();
849		UINT32 intctll = state->m_nile_regs[NREG_INTCTRL+0];
850		UINT32 intctlh = state->m_nile_regs[NREG_INTCTRL+1];
	854	UINT32 intctll = m_nile_regs[NREG_INTCTRL+0];
	855	UINT32 intctlh = m_nile_regs[NREG_INTCTRL+1];
851	856	UINT8 irq[6];
852	857	int i;
853	858
854	859	/* check for UART transmit IRQ enable and synthsize one */
855		if (state->m_nile_regs[NREG_UARTIER] & 2)
856		state->m_nile_irq_state |= 0x0010;
	860	if (m_nile_regs[NREG_UARTIER] & 2)
	861	m_nile_irq_state |= 0x0010;
857	862	else
858		state->m_nile_irq_state &= ~0x0010;
	863	m_nile_irq_state &= ~0x0010;
859	864
860	865	irq[0] = irq[1] = irq[2] = irq[3] = irq[4] = irq[5] = 0;
861		state->m_nile_regs[NREG_INTSTAT0+0] = 0;
862		state->m_nile_regs[NREG_INTSTAT0+1] = 0;
863		state->m_nile_regs[NREG_INTSTAT1+0] = 0;
864		state->m_nile_regs[NREG_INTSTAT1+1] = 0;
	866	m_nile_regs[NREG_INTSTAT0+0] = 0;
	867	m_nile_regs[NREG_INTSTAT0+1] = 0;
	868	m_nile_regs[NREG_INTSTAT1+0] = 0;
	869	m_nile_regs[NREG_INTSTAT1+1] = 0;
865	870
866	871	/* handle the lower interrupts */
867	872	for (i = 0; i < 8; i++)
868		if (state->m_nile_irq_state & (1 << i))
	873	if (m_nile_irq_state & (1 << i))
869	874	if ((intctll >> (4*i+3)) & 1)
870	875	{
871	876	int vector = (intctll >> (4*i)) & 7;
872	877	if (vector < 6)
873	878	{
874	879	irq[vector] = 1;
875		state->m_nile_regs[NREG_INTSTAT0 + vector/2] |= 1 << (i + 16*(vector&1));
	880	m_nile_regs[NREG_INTSTAT0 + vector/2] |= 1 << (i + 16*(vector&1));
876	881	}
877	882	}
878	883
879	884	/* handle the upper interrupts */
880	885	for (i = 0; i < 8; i++)
881		if (state->m_nile_irq_state & (1 << (i+8)))
	886	if (m_nile_irq_state & (1 << (i+8)))
882	887	if ((intctlh >> (4*i+3)) & 1)
883	888	{
884	889	int vector = (intctlh >> (4*i)) & 7;
885	890	if (vector < 6)
886	891	{
887	892	irq[vector] = 1;
888		state->m_nile_regs[NREG_INTSTAT0 + vector/2] |= 1 << (i + 8 + 16*(vector&1));
	893	m_nile_regs[NREG_INTSTAT0 + vector/2] |= 1 << (i + 8 + 16*(vector&1));
889	894	}
890	895	}
891	896
r21058	r21059
896	901	if (irq[i])
897	902	{
898	903	if (LOG_NILE_IRQS) logerror(" 1");
899		machine.device("maincpu")->execute().set_input_line(MIPS3_IRQ0 + i, ASSERT_LINE);
	904	machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ0 + i, ASSERT_LINE);
900	905	}
901	906	else
902	907	{
903	908	if (LOG_NILE_IRQS) logerror(" 0");
904		machine.device("maincpu")->execute().set_input_line(MIPS3_IRQ0 + i, CLEAR_LINE);
	909	machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ0 + i, CLEAR_LINE);
905	910	}
906	911	}
907	912	if (LOG_NILE_IRQS) logerror("\n");
r21058	r21059
929	934	if (which == 3)
930	935	m_nile_irq_state |= 1 << 5;
931	936
932		update_nile_irqs(machine());
	937	update_nile_irqs();
933	938	}
934	939
935	940
r21058	r21059
1073	1078	case NREG_INTCTRL+1:    /* Interrupt control */
1074	1079	if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt control(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
1075	1080	logit = 0;
1076		update_nile_irqs(space.machine());
	1081	state->update_nile_irqs();
1077	1082	break;
1078	1083
1079	1084	case NREG_INTSTAT0+0:   /* Interrupt status 0 */
1080	1085	case NREG_INTSTAT0+1:   /* Interrupt status 0 */
1081	1086	if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 0(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
1082	1087	logit = 0;
1083		update_nile_irqs(space.machine());
	1088	state->update_nile_irqs();
1084	1089	break;
1085	1090
1086	1091	case NREG_INTSTAT1+0:   /* Interrupt status 1 */
1087	1092	case NREG_INTSTAT1+1:   /* Interrupt status 1 */
1088	1093	if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 1/enable(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
1089	1094	logit = 0;
1090		update_nile_irqs(space.machine());
	1095	state->update_nile_irqs();
1091	1096	break;
1092	1097
1093	1098	case NREG_INTCLR+0:     /* Interrupt clear */
r21058	r21059
1095	1100	if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt clear(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
1096	1101	logit = 0;
1097	1102	state->m_nile_irq_state &= ~(state->m_nile_regs[offset] & ~0xf00);
1098		update_nile_irqs(space.machine());
	1103	state->update_nile_irqs();
1099	1104	break;
1100	1105
1101	1106	case NREG_INTPPES+0:    /* PCI Interrupt control */
r21058	r21059
1170	1175	logit = 0;
1171	1176	break;
1172	1177	case NREG_UARTIER:      /* serial interrupt enable */
1173		update_nile_irqs(space.machine());
	1178	state->update_nile_irqs();
1174	1179	break;
1175	1180
1176	1181	case NREG_VID:
r21058	r21059
1227	1232	m_nile_irq_state |= 0x800;
1228	1233	else
1229	1234	m_nile_irq_state &= ~0x800;
1230		update_nile_irqs(machine());
	1235	update_nile_irqs();
1231	1236	}
1232	1237
1233	1238
r21058	r21059
1238	1243	*
1239	1244	*************************************/
1240	1245
1241		static void update_sio_irqs(running_machine &machine)
	1246	void vegas_state::update_sio_irqs()
1242	1247	{
1243		vegas_state *state = machine.driver_data<vegas_state>();
1244		if (state->m_sio_irq_state & state->m_sio_irq_enable)
1245		state->m_nile_irq_state |= 0x400;
	1248	if (m_sio_irq_state & m_sio_irq_enable)
	1249	m_nile_irq_state |= 0x400;
1246	1250	else
1247		state->m_nile_irq_state &= ~0x400;
1248		update_nile_irqs(machine);
	1251	m_nile_irq_state &= ~0x400;
	1252	update_nile_irqs();
1249	1253	}
1250	1254
1251	1255
r21058	r21059
1255	1259	if (!drvstate->m_vblank_state && state)
1256	1260	{
1257	1261	drvstate->m_sio_irq_state |= 0x20;
1258		update_sio_irqs(device->machine());
	1262	drvstate->update_sio_irqs();
1259	1263	}
1260	1264	drvstate->m_vblank_state = state;
1261	1265
r21058	r21059
1274	1278	drvstate->m_sio_irq_state |= 0x04;
1275	1279	else
1276	1280	drvstate->m_sio_irq_state &= ~0x04;
1277		update_sio_irqs(machine);
	1281	drvstate->update_sio_irqs();
1278	1282	}
1279	1283
1280	1284
r21058	r21059
1285	1289	drvstate->m_sio_irq_state |= 0x10;
1286	1290	else
1287	1291	drvstate->m_sio_irq_state &= ~0x10;
1288		update_sio_irqs(device->machine());
	1292	drvstate->update_sio_irqs();
1289	1293	}
1290	1294
1291	1295
r21058	r21059
1314	1318	if (!(data & 0x08))
1315	1319	{
1316	1320	state->m_sio_irq_state &= ~0x20;
1317		update_sio_irqs(space.machine());
	1321	state->update_sio_irqs();
1318	1322	}
1319	1323	}
1320	1324	}
r21058	r21059
1333	1337	if (ACCESSING_BITS_0_7)
1334	1338	{
1335	1339	state->m_sio_irq_enable = data;
1336		update_sio_irqs(space.machine());
	1340	state->update_sio_irqs();
1337	1341	}
1338	1342	}
1339	1343
r21058	r21059
1507	1511	*
1508	1512	*************************************/
1509	1513
1510		#define add_dynamic_address(st,s,e,r,w)         _add_dynamic_address(st,s,e,r,w,#r,#w)
1511		#define add_dynamic_device_address(st,d,s,e,r,w)    _add_dynamic_device_address(st,d,s,e,r,w,#r,#w)
	1514	#define add_dynamic_address(s,e,r,w)         _add_dynamic_address(s,e,r,w,#r,#w)
	1515	#define add_dynamic_device_address(d,s,e,r,w)    _add_dynamic_device_address(d,s,e,r,w,#r,#w)
1512	1516
1513		INLINE void _add_dynamic_address(vegas_state *state, offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname)
	1517	inline void vegas_state::_add_dynamic_address(offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname)
1514	1518	{
1515		dynamic_address *dynamic = state->m_dynamic;
1516		dynamic[state->m_dynamic_count].start = start;
1517		dynamic[state->m_dynamic_count].end = end;
1518		dynamic[state->m_dynamic_count].mread = read;
1519		dynamic[state->m_dynamic_count].mwrite = write;
1520		dynamic[state->m_dynamic_count].dread = NULL;
1521		dynamic[state->m_dynamic_count].dwrite = NULL;
1522		dynamic[state->m_dynamic_count].device = NULL;
1523		dynamic[state->m_dynamic_count].rdname = rdname;
1524		dynamic[state->m_dynamic_count].wrname = wrname;
1525		state->m_dynamic_count++;
	1519	dynamic_address *dynamic = m_dynamic;
	1520	dynamic[m_dynamic_count].start = start;
	1521	dynamic[m_dynamic_count].end = end;
	1522	dynamic[m_dynamic_count].mread = read;
	1523	dynamic[m_dynamic_count].mwrite = write;
	1524	dynamic[m_dynamic_count].dread = NULL;
	1525	dynamic[m_dynamic_count].dwrite = NULL;
	1526	dynamic[m_dynamic_count].device = NULL;
	1527	dynamic[m_dynamic_count].rdname = rdname;
	1528	dynamic[m_dynamic_count].wrname = wrname;
	1529	m_dynamic_count++;
1526	1530	}
1527	1531
1528		INLINE void _add_dynamic_device_address(vegas_state *state, device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname)
	1532	inline void vegas_state::_add_dynamic_device_address(device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname)
1529	1533	{
1530		dynamic_address *dynamic = state->m_dynamic;
1531		dynamic[state->m_dynamic_count].start = start;
1532		dynamic[state->m_dynamic_count].end = end;
1533		dynamic[state->m_dynamic_count].mread = NULL;
1534		dynamic[state->m_dynamic_count].mwrite = NULL;
1535		dynamic[state->m_dynamic_count].dread = read;
1536		dynamic[state->m_dynamic_count].dwrite = write;
1537		dynamic[state->m_dynamic_count].device = device;
1538		dynamic[state->m_dynamic_count].rdname = rdname;
1539		dynamic[state->m_dynamic_count].wrname = wrname;
1540		state->m_dynamic_count++;
	1534	dynamic_address *dynamic = m_dynamic;
	1535	dynamic[m_dynamic_count].start = start;
	1536	dynamic[m_dynamic_count].end = end;
	1537	dynamic[m_dynamic_count].mread = NULL;
	1538	dynamic[m_dynamic_count].mwrite = NULL;
	1539	dynamic[m_dynamic_count].dread = read;
	1540	dynamic[m_dynamic_count].dwrite = write;
	1541	dynamic[m_dynamic_count].device = device;
	1542	dynamic[m_dynamic_count].rdname = rdname;
	1543	dynamic[m_dynamic_count].wrname = wrname;
	1544	m_dynamic_count++;
1541	1545	}
1542	1546
1543	1547
r21058	r21059
1561	1565	base = m_nile_regs[NREG_DCS2] & 0x1fffff00;
1562	1566	if (base >= m_rambase.bytes())
1563	1567	{
1564		add_dynamic_address(this, base + 0x0000, base + 0x0003, sio_irq_clear_r, sio_irq_clear_w);
1565		add_dynamic_address(this, base + 0x1000, base + 0x1003, sio_irq_enable_r, sio_irq_enable_w);
1566		add_dynamic_address(this, base + 0x2000, base + 0x2003, sio_irq_cause_r, NULL);
1567		add_dynamic_address(this, base + 0x3000, base + 0x3003, sio_irq_status_r, NULL);
1568		add_dynamic_address(this, base + 0x4000, base + 0x4003, sio_led_r, sio_led_w);
1569		add_dynamic_address(this, base + 0x5000, base + 0x5007, NOP_HANDLER, NULL);
1570		add_dynamic_address(this, base + 0x6000, base + 0x6003, NULL, cmos_unlock_w);
1571		add_dynamic_address(this, base + 0x7000, base + 0x7003, NULL, vegas_watchdog_w);
	1568	add_dynamic_address(base + 0x0000, base + 0x0003, sio_irq_clear_r, sio_irq_clear_w);
	1569	add_dynamic_address(base + 0x1000, base + 0x1003, sio_irq_enable_r, sio_irq_enable_w);
	1570	add_dynamic_address(base + 0x2000, base + 0x2003, sio_irq_cause_r, NULL);
	1571	add_dynamic_address(base + 0x3000, base + 0x3003, sio_irq_status_r, NULL);
	1572	add_dynamic_address(base + 0x4000, base + 0x4003, sio_led_r, sio_led_w);
	1573	add_dynamic_address(base + 0x5000, base + 0x5007, NOP_HANDLER, NULL);
	1574	add_dynamic_address(base + 0x6000, base + 0x6003, NULL, cmos_unlock_w);
	1575	add_dynamic_address(base + 0x7000, base + 0x7003, NULL, vegas_watchdog_w);
1572	1576	}
1573	1577
1574	1578	/* DCS3 */
1575	1579	base = m_nile_regs[NREG_DCS3] & 0x1fffff00;
1576	1580	if (base >= m_rambase.bytes())
1577		add_dynamic_address(this, base + 0x0000, base + 0x0003, analog_port_r, analog_port_w);
	1581	add_dynamic_address(base + 0x0000, base + 0x0003, analog_port_r, analog_port_w);
1578	1582
1579	1583	/* DCS4 */
1580	1584	base = m_nile_regs[NREG_DCS4] & 0x1fffff00;
1581	1585	if (base >= m_rambase.bytes())
1582		add_dynamic_address(this, base + 0x0000, base + 0x7fff, timekeeper_r, timekeeper_w);
	1586	add_dynamic_address(base + 0x0000, base + 0x7fff, timekeeper_r, timekeeper_w);
1583	1587
1584	1588	/* DCS5 */
1585	1589	base = m_nile_regs[NREG_DCS5] & 0x1fffff00;
1586	1590	if (base >= m_rambase.bytes())
1587		add_dynamic_address(this, base + 0x0000, base + 0x0003, sio_r, sio_w);
	1591	add_dynamic_address(base + 0x0000, base + 0x0003, sio_r, sio_w);
1588	1592
1589	1593	/* DCS6 */
1590	1594	base = m_nile_regs[NREG_DCS6] & 0x1fffff00;
1591	1595	if (base >= m_rambase.bytes())
1592	1596	{
1593		add_dynamic_address(this, base + 0x0000, base + 0x003f, midway_ioasic_packed_r, midway_ioasic_packed_w);
1594		add_dynamic_address(this, base + 0x1000, base + 0x1003, NULL, asic_fifo_w);
	1597	add_dynamic_address(base + 0x0000, base + 0x003f, midway_ioasic_packed_r, midway_ioasic_packed_w);
	1598	add_dynamic_address(base + 0x1000, base + 0x1003, NULL, asic_fifo_w);
1595	1599	if (m_dcs_idma_cs != 0)
1596		add_dynamic_address(this, base + 0x3000, base + 0x3003, NULL, dcs3_fifo_full_w);
	1600	add_dynamic_address(base + 0x3000, base + 0x3003, NULL, dcs3_fifo_full_w);
1597	1601	if (m_dcs_idma_cs == 6)
1598	1602	{
1599		add_dynamic_address(this, base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
1600		add_dynamic_address(this, base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
	1603	add_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
	1604	add_dynamic_address(base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
1601	1605	}
1602	1606	}
1603	1607
r21058	r21059
1605	1609	base = m_nile_regs[NREG_DCS7] & 0x1fffff00;
1606	1610	if (base >= m_rambase.bytes())
1607	1611	{
1608		add_dynamic_device_address(this, ethernet, base + 0x1000, base + 0x100f, ethernet_r, ethernet_w);
	1612	add_dynamic_device_address(ethernet, base + 0x1000, base + 0x100f, ethernet_r, ethernet_w);
1609	1613	if (m_dcs_idma_cs == 7)
1610	1614	{
1611		add_dynamic_address(this, base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
1612		add_dynamic_address(this, base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
	1615	add_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
	1616	add_dynamic_address(base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
1613	1617	}
1614	1618	}
1615	1619
r21058	r21059
1619	1623	base = m_nile_regs[NREG_PCIW1] & 0x1fffff00;
1620	1624	if (base >= m_rambase.bytes())
1621	1625	{
1622		add_dynamic_address(this, base + (1 << (21 + 4)) + 0x0000, base + (1 << (21 + 4)) + 0x00ff, pci_3dfx_r, pci_3dfx_w);
1623		add_dynamic_address(this, base + (1 << (21 + 5)) + 0x0000, base + (1 << (21 + 5)) + 0x00ff, pci_ide_r, pci_ide_w);
	1626	add_dynamic_address(base + (1 << (21 + 4)) + 0x0000, base + (1 << (21 + 4)) + 0x00ff, pci_3dfx_r, pci_3dfx_w);
	1627	add_dynamic_address(base + (1 << (21 + 5)) + 0x0000, base + (1 << (21 + 5)) + 0x00ff, pci_ide_r, pci_ide_w);
1624	1628	}
1625	1629	}
1626	1630
r21058	r21059
1630	1634	/* IDE controller */
1631	1635	base = m_pci_ide_regs[0x04] & 0xfffffff0;
1632	1636	if (base >= m_rambase.bytes() && base < 0x20000000)
1633		add_dynamic_device_address(this, ide, base + 0x0000, base + 0x000f, ide_main_r, ide_main_w);
	1637	add_dynamic_device_address(ide, base + 0x0000, base + 0x000f, ide_main_r, ide_main_w);
1634	1638
1635	1639	base = m_pci_ide_regs[0x05] & 0xfffffffc;
1636	1640	if (base >= m_rambase.bytes() && base < 0x20000000)
1637		add_dynamic_device_address(this, ide, base + 0x0000, base + 0x0003, ide_alt_r, ide_alt_w);
	1641	add_dynamic_device_address(ide, base + 0x0000, base + 0x0003, ide_alt_r, ide_alt_w);
1638	1642
1639	1643	base = m_pci_ide_regs[0x08] & 0xfffffff0;
1640	1644	if (base >= m_rambase.bytes() && base < 0x20000000)
1641		add_dynamic_device_address(this, ide, base + 0x0000, base + 0x0007, ide_bus_master32_r, ide_bus_master32_w);
	1645	add_dynamic_device_address(ide, base + 0x0000, base + 0x0007, ide_bus_master32_r, ide_bus_master32_w);
1642	1646
1643	1647	/* 3dfx card */
1644	1648	base = m_pci_3dfx_regs[0x04] & 0xfffffff0;
1645	1649	if (base >= m_rambase.bytes() && base < 0x20000000)
1646	1650	{
1647	1651	if (voodoo_type == TYPE_VOODOO_2)
1648		add_dynamic_device_address(this, m_voodoo, base + 0x000000, base + 0xffffff, voodoo_r, voodoo_w);
	1652	add_dynamic_device_address(m_voodoo, base + 0x000000, base + 0xffffff, voodoo_r, voodoo_w);
1649	1653	else
1650		add_dynamic_device_address(this, m_voodoo, base + 0x000000, base + 0x1ffffff, banshee_r, banshee_w);
	1654	add_dynamic_device_address(m_voodoo, base + 0x000000, base + 0x1ffffff, banshee_r, banshee_w);
1651	1655	}
1652	1656
1653	1657	if (voodoo_type >= TYPE_VOODOO_BANSHEE)
1654	1658	{
1655	1659	base = m_pci_3dfx_regs[0x05] & 0xfffffff0;
1656	1660	if (base >= m_rambase.bytes() && base < 0x20000000)
1657		add_dynamic_device_address(this, m_voodoo, base + 0x0000000, base + 0x1ffffff, banshee_fb_r, banshee_fb_w);
	1661	add_dynamic_device_address(m_voodoo, base + 0x0000000, base + 0x1ffffff, banshee_fb_r, banshee_fb_w);
1658	1662
1659	1663	base = m_pci_3dfx_regs[0x06] & 0xfffffff0;
1660	1664	if (base >= m_rambase.bytes() && base < 0x20000000)
1661		add_dynamic_device_address(this, m_voodoo, base + 0x0000000, base + 0x00000ff, banshee_io_r, banshee_io_w);
	1665	add_dynamic_device_address(m_voodoo, base + 0x0000000, base + 0x00000ff, banshee_io_r, banshee_io_w);
1662	1666
1663	1667	base = m_pci_3dfx_regs[0x0c] & 0xffff0000;
1664	1668	if (base >= m_rambase.bytes() && base < 0x20000000)
1665		add_dynamic_device_address(this, m_voodoo, base + 0x0000000, base + 0x000ffff, banshee_rom_r, NULL);
	1669	add_dynamic_device_address(m_voodoo, base + 0x0000000, base + 0x000ffff, banshee_rom_r, NULL);
1666	1670	}
1667	1671	}
1668	1672
r21058	r21059
2473	2477	*
2474	2478	*************************************/
2475	2479
2476		static void init_common(running_machine &machine, int ioasic, int serialnum)
	2480	void vegas_state::init_common(int ioasic, int serialnum)
2477	2481	{
2478	2482	/* initialize the subsystems */
2479		midway_ioasic_init(machine, ioasic, serialnum, 80, ioasic_irq);
	2483	midway_ioasic_init(machine(), ioasic, serialnum, 80, ioasic_irq);
2480	2484	midway_ioasic_set_auto_ack(1);
2481	2485	}
2482	2486
r21058	r21059
2484	2488	DRIVER_INIT_MEMBER(vegas_state,gauntleg)
2485	2489	{
2486	2490	dcs2_init(machine(), 4, 0x0b5d);
2487		init_common(machine(), MIDWAY_IOASIC_CALSPEED, 340/* 340=39", 322=27", others? */);
	2491	init_common(MIDWAY_IOASIC_CALSPEED, 340/* 340=39", 322=27", others? */);
2488	2492
2489	2493	/* speedups */
2490	2494	mips3drc_add_hotspot(machine().device("maincpu"), 0x80015430, 0x8CC38060, 250);     /* confirmed */
r21058	r21059
2497	2501	DRIVER_INIT_MEMBER(vegas_state,gauntdl)
2498	2502	{
2499	2503	dcs2_init(machine(), 4, 0x0b5d);
2500		init_common(machine(), MIDWAY_IOASIC_GAUNTDL, 346/* 347, others? */);
	2504	init_common(MIDWAY_IOASIC_GAUNTDL, 346/* 347, others? */);
2501	2505
2502	2506	/* speedups */
2503	2507	mips3drc_add_hotspot(machine().device("maincpu"), 0x800158B8, 0x8CC3CC40, 250);     /* confirmed */
r21058	r21059
2510	2514	DRIVER_INIT_MEMBER(vegas_state,warfa)
2511	2515	{
2512	2516	dcs2_init(machine(), 4, 0x0b5d);
2513		init_common(machine(), MIDWAY_IOASIC_MACE, 337/* others? */);
	2517	init_common(MIDWAY_IOASIC_MACE, 337/* others? */);
2514	2518
2515	2519	/* speedups */
2516	2520	mips3drc_add_hotspot(machine().device("maincpu"), 0x8009436C, 0x0C031663, 250);     /* confirmed */
r21058	r21059
2520	2524	DRIVER_INIT_MEMBER(vegas_state,tenthdeg)
2521	2525	{
2522	2526	dcs2_init(machine(), 4, 0x0afb);
2523		init_common(machine(), MIDWAY_IOASIC_GAUNTDL, 330/* others? */);
	2527	init_common(MIDWAY_IOASIC_GAUNTDL, 330/* others? */);
2524	2528
2525	2529	/* speedups */
2526	2530	mips3drc_add_hotspot(machine().device("maincpu"), 0x80051CD8, 0x0C023C15, 250);     /* confirmed */
r21058	r21059
2533	2537	DRIVER_INIT_MEMBER(vegas_state,roadburn)
2534	2538	{
2535	2539	dcs2_init(machine(), 4, 0); /* no place to hook :-( */
2536		init_common(machine(), MIDWAY_IOASIC_STANDARD, 325/* others? */);
	2540	init_common(MIDWAY_IOASIC_STANDARD, 325/* others? */);
2537	2541	}
2538	2542
2539	2543
2540	2544	DRIVER_INIT_MEMBER(vegas_state,nbashowt)
2541	2545	{
2542	2546	dcs2_init(machine(), 4, 0);
2543		init_common(machine(), MIDWAY_IOASIC_MACE, 528/* or 478 or 487 */);
	2547	init_common(MIDWAY_IOASIC_MACE, 528/* or 478 or 487 */);
2544	2548	}
2545	2549
2546	2550
2547	2551	DRIVER_INIT_MEMBER(vegas_state,nbanfl)
2548	2552	{
2549	2553	dcs2_init(machine(), 4, 0);
2550		init_common(machine(), MIDWAY_IOASIC_BLITZ99, 498/* or 478 or 487 */);
	2554	init_common(MIDWAY_IOASIC_BLITZ99, 498/* or 478 or 487 */);
2551	2555	/* NOT: MACE */
2552	2556	}
2553	2557
r21058	r21059
2555	2559	DRIVER_INIT_MEMBER(vegas_state,sf2049)
2556	2560	{
2557	2561	dcs2_init(machine(), 8, 0);
2558		init_common(machine(), MIDWAY_IOASIC_STANDARD, 336/* others? */);
	2562	init_common(MIDWAY_IOASIC_STANDARD, 336/* others? */);
2559	2563	}
2560	2564
2561	2565
2562	2566	DRIVER_INIT_MEMBER(vegas_state,sf2049se)
2563	2567	{
2564	2568	dcs2_init(machine(), 8, 0);
2565		init_common(machine(), MIDWAY_IOASIC_SFRUSHRK, 336/* others? */);
	2569	init_common(MIDWAY_IOASIC_SFRUSHRK, 336/* others? */);
2566	2570	}
2567	2571
2568	2572
2569	2573	DRIVER_INIT_MEMBER(vegas_state,sf2049te)
2570	2574	{
2571	2575	dcs2_init(machine(), 8, 0);
2572		init_common(machine(), MIDWAY_IOASIC_SFRUSHRK, 348/* others? */);
	2576	init_common(MIDWAY_IOASIC_SFRUSHRK, 348/* others? */);
2573	2577	}
2574	2578
2575	2579
2576	2580	DRIVER_INIT_MEMBER(vegas_state,cartfury)
2577	2581	{
2578	2582	dcs2_init(machine(), 4, 0);
2579		init_common(machine(), MIDWAY_IOASIC_CARNEVIL, 495/* others? */);
	2583	init_common(MIDWAY_IOASIC_CARNEVIL, 495/* others? */);
2580	2584	}
2581	2585
2582	2586

trunk/src/mame/drivers/namcos11.c

r21058	r21059
344	344	TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq0_cb);
345	345	TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq2_cb);
346	346	TIMER_DEVICE_CALLBACK_MEMBER(mcu_adc_cb);
	347	inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
	348	inline void bankswitch_rom8( address_space &space, const char *bank, int n_data );
	349	inline void bankswitch_rom64( address_space &space, const char *bank, int n_data );
	350	void namcos11_init_common(int n_daughterboard);
347	351	};
348	352
349		INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
	353	inline void ATTR_PRINTF(3,4) namcos11_state::verboselog( int n_level, const char *s_fmt, ... )
350	354	{
351	355	if( VERBOSE_LEVEL >= n_level )
352	356	{
r21058	r21059
355	359	va_start( v, s_fmt );
356	360	vsprintf( buf, s_fmt, v );
357	361	va_end( v );
358		logerror( "%s: %s", machine.describe_context(), buf );
	362	logerror( "%s: %s", machine().describe_context(), buf );
359	363	}
360	364	}
361	365
362	366	WRITE32_MEMBER(namcos11_state::keycus_w)
363	367	{
364		verboselog( machine(), 1, "keycus_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	368	verboselog(1, "keycus_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
365	369	COMBINE_DATA( &m_keycus[ offset ] );
366	370	}
367	371
r21058	r21059
383	387	( ( namcos11_keycus[ 1 ] >> 8 ) & 0xf );
384	388	break;
385	389	}
386		verboselog( machine(), 1, "keycus_c406_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	390	verboselog(1, "keycus_c406_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
387	391	return data;
388	392	}
389	393
r21058	r21059
400	404	data = ( data & 0x0000ffff ) | 0x000f0000;
401	405	break;
402	406	}
403		verboselog( machine(), 1, "keycus_c409_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	407	verboselog(1, "keycus_c409_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
404	408	return data;
405	409	}
406	410
r21058	r21059
435	439	( ( ( n_value / 10000 ) % 10 ) << 16 );
436	440	break;
437	441	}
438		verboselog( machine(), 1, "keycus_c410_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	442	verboselog(1, "keycus_c410_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
439	443	return data;
440	444	}
441	445
r21058	r21059
469	473	break;
470	474	}
471	475
472		verboselog( machine(), 1, "keycus_c411_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	476	verboselog(1, "keycus_c411_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
473	477	return data;
474	478	}
475	479
r21058	r21059
504	508	( ( ( n_value / 1 ) % 10 ) << 16 );
505	509	break;
506	510	}
507		verboselog( machine(), 1, "keycus_c430_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	511	verboselog(1, "keycus_c430_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
508	512	return data;
509	513	}
510	514
r21058	r21059
537	541	data = ( data & 0xffff0000 ) | ( ( n_value / 10000 ) % 10 );
538	542	break;
539	543	}
540		verboselog( machine(), 1, "keycus_c431_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	544	verboselog(1, "keycus_c431_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
541	545	return data;
542	546	}
543	547
r21058	r21059
571	575	break;
572	576	}
573	577
574		verboselog( machine(), 1, "keycus_c432_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	578	verboselog(1, "keycus_c432_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
575	579	return data;
576	580	}
577	581
r21058	r21059
592	596	}
593	597	break;
594	598	}
595		verboselog( machine(), 1, "keycus_c442_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	599	verboselog(1, "keycus_c442_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
596	600	return data;
597	601	}
598	602
r21058	r21059
625	629	}
626	630	break;
627	631	}
628		verboselog( machine(), 1, "keycus_c443_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
	632	verboselog(1, "keycus_c443_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
629	633	return data;
630	634	}
631	635
632		INLINE void bankswitch_rom8( address_space &space, const char *bank, int n_data )
	636	inline void namcos11_state::bankswitch_rom8( address_space &space, const char *bank, int n_data )
633	637	{
634		space.machine().root_device().membank( bank )->set_entry( ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
	638	membank( bank )->set_entry( ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
635	639	}
636	640
637	641	static const char * const bankname[] = { "bank1", "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8" };
638	642
639	643	WRITE32_MEMBER(namcos11_state::bankswitch_rom32_w)
640	644	{
641		verboselog( machine(), 2, "bankswitch_rom32_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	645	verboselog(2, "bankswitch_rom32_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
642	646
643	647	if( ACCESSING_BITS_0_15 )
644	648	{
r21058	r21059
652	656
653	657	WRITE32_MEMBER(namcos11_state::bankswitch_rom64_upper_w)
654	658	{
655		verboselog( machine(), 2, "bankswitch_rom64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	659	verboselog(2, "bankswitch_rom64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
656	660
657	661	if( ACCESSING_BITS_0_15 )
658	662	{
r21058	r21059
664	668	}
665	669	}
666	670
667		INLINE void bankswitch_rom64( address_space &space, const char *bank, int n_data )
	671	inline void namcos11_state::bankswitch_rom64( address_space &space, const char *bank, int n_data )
668	672	{
669		namcos11_state *state = space.machine().driver_data<namcos11_state>();
670
671	673	/* todo: verify behaviour */
672		state->membank( bank )->set_entry( ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ state->m_n_bankoffset ) );
	674	membank( bank )->set_entry( ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ m_n_bankoffset ) );
673	675	}
674	676
675	677	WRITE32_MEMBER(namcos11_state::bankswitch_rom64_w)
676	678	{
677		verboselog( machine(), 2, "bankswitch_rom64_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
	679	verboselog(2, "bankswitch_rom64_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
678	680
679	681	if( ACCESSING_BITS_0_15 )
680	682	{
r21058	r21059
695	697	output_set_value( "recoil0", !( data & 0x02 ) );
696	698	output_set_value( "recoil1", !( data & 0x01 ) );
697	699
698		verboselog( machine(), 1, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask );
	700	verboselog(1, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask );
699	701	}
700	702	if( ACCESSING_BITS_16_31 )
701	703	{
702		verboselog( machine(), 2, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask );
	704	verboselog(2, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask );
703	705	}
704	706	}
705	707
r21058	r21059
721	723	data = ( ioport( "GUN2Y" )->read() ) | ( ( ioport( "GUN2Y" )->read() + 1 ) << 16 );
722	724	break;
723	725	}
724		verboselog( machine(), 2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
	726	verboselog(2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
725	727	return data;
726	728	}
727	729
r21058	r21059
867	869	COMBINE_DATA(&m_su_83);
868	870	}
869	871
870		static void namcos11_init_common(running_machine &machine, int n_daughterboard)
	872	void namcos11_state::namcos11_init_common(int n_daughterboard)
871	873	{
872		namcos11_state *state = machine.driver_data<namcos11_state>();
873	874
874	875	// C76 idle skipping, large speedboost
875	876	if (C76_SPEEDUP)
876	877	{
877		state->save_item( NAME(state->m_su_83) );
878		machine.device("c76")->memory().space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos11_state::c76_speedup_r),state), write16_delegate(FUNC(namcos11_state::c76_speedup_w),state));
	878	save_item( NAME(m_su_83) );
	879	machine().device("c76")->memory().space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos11_state::c76_speedup_r),this), write16_delegate(FUNC(namcos11_state::c76_speedup_w),this));
879	880	}
880	881
881	882	if (!n_daughterboard)
882	883	{
883		machine.device("maincpu")->memory().space(AS_PROGRAM).nop_write(0x1fa10020, 0x1fa1002f);
	884	machine().device("maincpu")->memory().space(AS_PROGRAM).nop_write(0x1fa10020, 0x1fa1002f);
884	885	return;
885	886	}
886	887
887	888	// init banks
888	889	int bank;
889		UINT32 len = machine.root_device().memregion( "user2" )->bytes();
890		UINT8 *rgn = machine.root_device().memregion( "user2" )->base();
	890	UINT32 len = memregion( "user2" )->bytes();
	891	UINT8 *rgn = memregion( "user2" )->base();
891	892
892		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f000000, 0x1f0fffff, "bank1" );
893		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f100000, 0x1f1fffff, "bank2" );
894		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f200000, 0x1f2fffff, "bank3" );
895		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f300000, 0x1f3fffff, "bank4" );
896		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f400000, 0x1f4fffff, "bank5" );
897		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f500000, 0x1f5fffff, "bank6" );
898		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f600000, 0x1f6fffff, "bank7" );
899		machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f700000, 0x1f7fffff, "bank8" );
	893	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f000000, 0x1f0fffff, "bank1" );
	894	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f100000, 0x1f1fffff, "bank2" );
	895	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f200000, 0x1f2fffff, "bank3" );
	896	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f300000, 0x1f3fffff, "bank4" );
	897	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f400000, 0x1f4fffff, "bank5" );
	898	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f500000, 0x1f5fffff, "bank6" );
	899	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f600000, 0x1f6fffff, "bank7" );
	900	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f700000, 0x1f7fffff, "bank8" );
900	901
901	902	for (bank = 0; bank < 8; bank++)
902	903	{
903		state->membank(bankname[bank])->configure_entries(0, len / ( 1024 * 1024 ), rgn, 1024 * 1024 );
904		state->membank(bankname[bank])->set_entry(0 );
	904	membank(bankname[bank])->configure_entries(0, len / ( 1024 * 1024 ), rgn, 1024 * 1024 );
	905	membank(bankname[bank])->set_entry(0 );
905	906	}
906	907
907	908	if (n_daughterboard == 32)
908	909	{
909		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom32_w),state));
	910	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom32_w),this));
910	911	}
911	912	if (n_daughterboard == 64)
912	913	{
913		state->m_n_bankoffset = 0;
914		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f080000, 0x1f080003, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_upper_w),state));
915		machine.device("maincpu")->memory().space(AS_PROGRAM).nop_read(0x1fa10020, 0x1fa1002f);
916		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_w),state));
917		state->save_item( NAME(state->m_n_bankoffset) );
	914	m_n_bankoffset = 0;
	915	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f080000, 0x1f080003, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_upper_w),this));
	916	machine().device("maincpu")->memory().space(AS_PROGRAM).nop_read(0x1fa10020, 0x1fa1002f);
	917	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_w),this));
	918	save_item( NAME(m_n_bankoffset) );
918	919	}
919	920	}
920	921
921	922	DRIVER_INIT_MEMBER(namcos11_state,tekken)
922	923	{
923		namcos11_init_common(machine(), 32);
	924	namcos11_init_common(32);
924	925	}
925	926
926	927	DRIVER_INIT_MEMBER(namcos11_state,tekken2)
927	928	{
928	929	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c406_r),this));
929		namcos11_init_common(machine(), 32);
	930	namcos11_init_common(32);
930	931	}
931	932
932	933	DRIVER_INIT_MEMBER(namcos11_state,souledge)
933	934	{
934	935	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c409_r),this));
935		namcos11_init_common(machine(), 32);
	936	namcos11_init_common(32);
936	937	}
937	938
938	939	DRIVER_INIT_MEMBER(namcos11_state,dunkmnia)
939	940	{
940	941	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c410_r),this));
941		namcos11_init_common(machine(), 32);
	942	namcos11_init_common(32);
942	943	}
943	944
944	945	DRIVER_INIT_MEMBER(namcos11_state,primglex)
945	946	{
946	947	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c411_r),this));
947		namcos11_init_common(machine(), 32);
	948	namcos11_init_common(32);
948	949	}
949	950
950	951	DRIVER_INIT_MEMBER(namcos11_state,xevi3dg)
951	952	{
952	953	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c430_r),this));
953		namcos11_init_common(machine(), 32);
	954	namcos11_init_common(32);
954	955	}
955	956
956	957	DRIVER_INIT_MEMBER(namcos11_state,danceyes)
957	958	{
958	959	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c431_r),this));
959		namcos11_init_common(machine(), 32);
	960	namcos11_init_common(32);
960	961	}
961	962
962	963	DRIVER_INIT_MEMBER(namcos11_state,pocketrc)
r21058	r21059
965	966	machine().device("c76")->memory().space(AS_IO).install_read_handler(M37710_ADC1_L, M37710_ADC1_L, read8_delegate(FUNC(namcos11_state::pocketrc_gas_r),this));
966	967
967	968	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c432_r),this));
968		namcos11_init_common(machine(), 32);
	969	namcos11_init_common(32);
969	970	}
970	971
971	972	DRIVER_INIT_MEMBER(namcos11_state,starswep)
972	973	{
973	974	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c442_r),this));
974		namcos11_init_common(machine(), 0);
	975	namcos11_init_common(0);
975	976	}
976	977
977	978	DRIVER_INIT_MEMBER(namcos11_state,myangel3)
978	979	{
979	980	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c443_r),this));
980		namcos11_init_common(machine(), 64);
	981	namcos11_init_common(64);
981	982	}
982	983
983	984	DRIVER_INIT_MEMBER(namcos11_state,ptblank2ua)
984	985	{
985	986	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c443_r),this));
986		namcos11_init_common(machine(), 64);
	987	namcos11_init_common(64);
987	988
988	989	machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f788000, 0x1f788003, write32_delegate(FUNC(namcos11_state::lightgun_w),this));
989	990	machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler (0x1f780000, 0x1f78000f, read32_delegate(FUNC(namcos11_state::lightgun_r),this));

trunk/src/mame/drivers/taitotz.c

r21058	r21059
614	614	DECLARE_READ8_MEMBER(tlcs_ide1_r);
615	615	DECLARE_WRITE8_MEMBER(tlcs_ide1_w);
616	616	DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
	617	void taitotz_exit();
	618	void draw_tile(taitotz_state *state, UINT32 pos, UINT32 tile);
	619	UINT32 video_mem_r(taitotz_state *state, UINT32 address);
	620	void video_mem_w(taitotz_state *state, UINT32 address, UINT32 data);
	621	UINT32 video_reg_r(taitotz_state *state, UINT32 reg);
	622	void video_reg_w(taitotz_state *state, UINT32 reg, UINT32 data);
	623	void init_taitotz_152();
	624	void init_taitotz_111a();
617	625	};
618	626
619	627	/*
620		static void taitotz_exit(running_machine &machine)
	628	void taitotz_state::taitotz_exit()
621	629	{
622	630
623		taitotz_state *state = machine.driver_data<taitotz_state>();
624	631
625	632	FILE *file;
626	633	int i;
r21058	r21059
628	635	file = fopen("screen_ram.bin","wb");
629	636	for (i=0; i < 0x200000; i++)
630	637	{
631		fputc((UINT8)(state->m_screen_ram[i] >> 24), file);
632		fputc((UINT8)(state->m_screen_ram[i] >> 16), file);
633		fputc((UINT8)(state->m_screen_ram[i] >> 8), file);
634		fputc((UINT8)(state->m_screen_ram[i] >> 0), file);
	638	fputc((UINT8)(m_screen_ram[i] >> 24), file);
	639	fputc((UINT8)(m_screen_ram[i] >> 16), file);
	640	fputc((UINT8)(m_screen_ram[i] >> 8), file);
	641	fputc((UINT8)(m_screen_ram[i] >> 0), file);
635	642	}
636	643	fclose(file);
637	644
638	645	file = fopen("frame_ram.bin","wb");
639	646	for (i=0; i < 0x80000; i++)
640	647	{
641		fputc((UINT8)(state->m_frame_ram[i] >> 24), file);
642		fputc((UINT8)(state->m_frame_ram[i] >> 16), file);
643		fputc((UINT8)(state->m_frame_ram[i] >> 8), file);
644		fputc((UINT8)(state->m_frame_ram[i] >> 0), file);
	648	fputc((UINT8)(m_frame_ram[i] >> 24), file);
	649	fputc((UINT8)(m_frame_ram[i] >> 16), file);
	650	fputc((UINT8)(m_frame_ram[i] >> 8), file);
	651	fputc((UINT8)(m_frame_ram[i] >> 0), file);
645	652	}
646	653	fclose(file);
647	654
648	655	file = fopen("texture_ram.bin","wb");
649	656	for (i=0; i < 0x800000; i++)
650	657	{
651		fputc((UINT8)(state->m_texture_ram[i] >> 24), file);
652		fputc((UINT8)(state->m_texture_ram[i] >> 16), file);
653		fputc((UINT8)(state->m_texture_ram[i] >> 8), file);
654		fputc((UINT8)(state->m_texture_ram[i] >> 0), file);
	658	fputc((UINT8)(m_texture_ram[i] >> 24), file);
	659	fputc((UINT8)(m_texture_ram[i] >> 16), file);
	660	fputc((UINT8)(m_texture_ram[i] >> 8), file);
	661	fputc((UINT8)(m_texture_ram[i] >> 0), file);
655	662	}
656	663	fclose(file);
657	664
r21058	r21059
1396	1403	return 0;
1397	1404	}
1398	1405
1399		static void draw_tile(taitotz_state *state, UINT32 pos, UINT32 tile)
	1406	void taitotz_state::draw_tile(taitotz_state *state, UINT32 pos, UINT32 tile)
1400	1407	{
1401	1408	int tileu = (tile & 0x1f) * 16;
1402	1409	int tilev = ((tile >> 5)) * 16;
r21058	r21059
1404	1411	int tilex = (pos & 0x1f) * 16;
1405	1412	int tiley = ((pos >> 5) & 0x1f) * 16;
1406	1413
1407		UINT16 *src_tile = (UINT16*)&state->m_screen_ram[0x180000];
1408		UINT16 *dst = (UINT16*)&state->m_screen_ram[state->m_scr_base];
	1414	UINT16 *src_tile = (UINT16*)&m_screen_ram[0x180000];
	1415	UINT16 *dst = (UINT16*)&m_screen_ram[m_scr_base];
1409	1416
1410	1417	int v = tilev;
1411	1418
r21058	r21059
1438	1445	batlgr2 into 0x9e0000
1439	1446	*/
1440	1447
1441		static UINT32 video_mem_r(taitotz_state *state, UINT32 address)
	1448	UINT32 taitotz_state::video_mem_r(taitotz_state *state, UINT32 address)
1442	1449	{
1443	1450	if (address >= 0x800000 && address < 0x1000000)
1444	1451	{
1445		return state->m_screen_ram[address - 0x800000];
	1452	return m_screen_ram[address - 0x800000];
1446	1453	}
1447	1454	else if (address >= 0x1000000 && address < 0x1800000)
1448	1455	{
1449		return state->m_texture_ram[address - 0x1000000];
	1456	return m_texture_ram[address - 0x1000000];
1450	1457	}
1451	1458	else if (address >= 0x1800000 && address < 0x1880000)
1452	1459	{
1453		return state->m_frame_ram[address - 0x1800000];
	1460	return m_frame_ram[address - 0x1800000];
1454	1461	}
1455	1462	else
1456	1463	{
r21058	r21059
1459	1466	}
1460	1467	}
1461	1468
1462		static void video_mem_w(taitotz_state *state, UINT32 address, UINT32 data)
	1469	void taitotz_state::video_mem_w(taitotz_state *state, UINT32 address, UINT32 data)
1463	1470	{
1464	1471	if (address >= 0x800000 && address < 0x1000000)
1465	1472	{
1466		state->m_screen_ram[address - 0x800000] = data;
	1473	m_screen_ram[address - 0x800000] = data;
1467	1474	}
1468	1475	else if (address >= 0x1000000 && address < 0x1800000)
1469	1476	{
1470		state->m_texture_ram[address - 0x1000000] = data;
	1477	m_texture_ram[address - 0x1000000] = data;
1471	1478	}
1472	1479	else if (address >= 0x1800000 && address < 0x1880000)
1473	1480	{
1474		state->m_frame_ram[address - 0x1800000] = data;
	1481	m_frame_ram[address - 0x1800000] = data;
1475	1482	}
1476	1483	else
1477	1484	{
r21058	r21059
1479	1486	}
1480	1487	}
1481	1488
1482		static UINT32 video_reg_r(taitotz_state *state, UINT32 reg)
	1489	UINT32 taitotz_state::video_reg_r(taitotz_state *state, UINT32 reg)
1483	1490	{
1484	1491	switch ((reg >> 28) & 0xf)
1485	1492	{
r21058	r21059
1487	1494	{
1488	1495	if (reg == 0x10000105)      // Gets spammed a lot. Probably a status register.
1489	1496	{
1490		state->m_reg105 ^= 0xffffffff;
1491		return state->m_reg105;
	1497	m_reg105 ^= 0xffffffff;
	1498	return m_reg105;
1492	1499	}
1493	1500
1494	1501	logerror("video_reg_r: reg: %08X\n", reg);
r21058	r21059
1503	1510
1504	1511	if (subreg < 0x10)
1505	1512	{
1506		return state->m_video_unk_reg[subreg];
	1513	return m_video_unk_reg[subreg];
1507	1514	}
1508	1515	break;
1509	1516	}
r21058	r21059
1542	1549	video_reg_w: r: 20000004 d: 00000000
1543	1550	*/
1544	1551
1545		static void video_reg_w(taitotz_state *state, UINT32 reg, UINT32 data)
	1552	void taitotz_state::video_reg_w(taitotz_state *state, UINT32 reg, UINT32 data)
1546	1553	{
1547	1554	switch ((reg >> 28) & 0xf)
1548	1555	{
r21058	r21059
1563	1570	int subreg = reg & 0xfffffff;
1564	1571	if (subreg < 0x10)
1565	1572	{
1566		state->m_video_unk_reg[subreg] = data;
	1573	m_video_unk_reg[subreg] = data;
1567	1574	}
1568	1575	logerror("video_reg_w: reg: %08X data: %08X\n", reg, data);
1569	1576	break;
r21058	r21059
1577	1584	}
1578	1585	case 0xb:       // RAM write?
1579	1586	{
1580		video_mem_w(state, state->m_video_ram_ptr, data);
1581		state->m_video_ram_ptr++;
	1587	video_mem_w(state, m_video_ram_ptr, data);
	1588	m_video_ram_ptr++;
1582	1589	break;
1583	1590	}
1584	1591	default:
r21058	r21059
2596	2603
2597	2604
2598	2605	// Init for BIOS v1.52
2599		static void init_taitotz_152(running_machine &machine)
	2606	void taitotz_state::init_taitotz_152()
2600	2607	{
2601		UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
	2608	UINT32 *rom = (UINT32*)machine().root_device().memregion("user1")->base();
2602	2609	rom[(0x2c87c^4)/4] = 0x38600000;    // skip sound load timeout...
2603	2610	//  rom[(0x2c620^4)/4] = 0x48000014;    // ID check skip (not needed with correct serial number)
2604	2611	}
2605	2612
2606	2613	// Init for BIOS 1.11a
2607		static void init_taitotz_111a(running_machine &machine)
	2614	void taitotz_state::init_taitotz_111a()
2608	2615	{
2609		UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
	2616	UINT32 *rom = (UINT32*)machine().root_device().memregion("user1")->base();
2610	2617	rom[(0x2b748^4)/4] = 0x480000b8;    // skip sound load timeout
2611	2618	}
2612	2619
r21058	r21059
2624	2631
2625	2632	DRIVER_INIT_MEMBER(taitotz_state,landhigh)
2626	2633	{
2627		init_taitotz_152(machine());
	2634	init_taitotz_152();
2628	2635
2629	2636	m_hdd_serial_number = LANDHIGH_HDD_SERIAL;
2630	2637
r21058	r21059
2635	2642
2636	2643	DRIVER_INIT_MEMBER(taitotz_state,batlgear)
2637	2644	{
2638		init_taitotz_111a(machine());
	2645	init_taitotz_111a();
2639	2646
2640	2647	// unknown, not used by BIOS 1.11a
2641	2648	m_hdd_serial_number = NULL;
r21058	r21059
2647	2654
2648	2655	DRIVER_INIT_MEMBER(taitotz_state,batlgr2)
2649	2656	{
2650		init_taitotz_152(machine());
	2657	init_taitotz_152();
2651	2658
2652	2659	m_hdd_serial_number = BATLGR2_HDD_SERIAL;
2653	2660
r21058	r21059
2658	2665
2659	2666	DRIVER_INIT_MEMBER(taitotz_state,batlgr2a)
2660	2667	{
2661		init_taitotz_152(machine());
	2668	init_taitotz_152();
2662	2669
2663	2670	m_hdd_serial_number = BATLGR2A_HDD_SERIAL;
2664	2671
r21058	r21059
2669	2676
2670	2677	DRIVER_INIT_MEMBER(taitotz_state,pwrshovl)
2671	2678	{
2672		init_taitotz_111a(machine());
	2679	init_taitotz_111a();
2673	2680
2674	2681	// unknown, not used by BIOS 1.11a
2675	2682	m_hdd_serial_number = NULL;
r21058	r21059
2681	2688
2682	2689	DRIVER_INIT_MEMBER(taitotz_state,raizpin)
2683	2690	{
2684		init_taitotz_152(machine());
	2691	init_taitotz_152();
2685	2692
2686	2693	m_hdd_serial_number = RAIZPIN_HDD_SERIAL;
2687	2694

trunk/src/mame/drivers/halleys.c

r21058	r21059
269	269	TIMER_CALLBACK_MEMBER(blitter_reset);
270	270	TIMER_DEVICE_CALLBACK_MEMBER(halleys_scanline);
271	271	TIMER_DEVICE_CALLBACK_MEMBER(benberob_scanline);
	272	void halleys_decode_rgb(UINT32 *r, UINT32 *g, UINT32 *b, int addr, int data);
	273	void copy_scroll_op(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy);
	274	void copy_scroll_xp(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy);
	275	void copy_fixed_xp(bitmap_ind16 &bitmap, UINT16 *source);
	276	void copy_fixed_2b(bitmap_ind16 &bitmap, UINT16 *source);
	277	void filter_bitmap(bitmap_ind16 &bitmap, int mask);
	278	void init_common();
272	279	};
273	280
274	281
r21058	r21059
1159	1166	}
1160	1167	}
1161	1168
1162		static void halleys_decode_rgb(running_machine &machine, UINT32 *r, UINT32 *g, UINT32 *b, int addr, int data)
	1169	void halleys_state::halleys_decode_rgb(UINT32 *r, UINT32 *g, UINT32 *b, int addr, int data)
1163	1170	{
1164	1171	/*
1165	1172	proms contain:
1166	1173	00 00 00 00 c5 0b f3 17 fd cf 1f ef df bf 7f ff
1167	1174	00 00 00 00 01 61 29 26 0b f5 e2 17 57 fb cf f7
1168	1175	*/
1169		halleys_state *state = machine.driver_data<halleys_state>();
1170	1176	int latch1_273, latch2_273;
1171	1177	UINT8 *sram_189;
1172	1178	UINT8 *prom_6330;
r21058	r21059
1174	1180	int bit0, bit1, bit2, bit3, bit4;
1175	1181
1176	1182	// the four 16x4-bit SN74S189 SRAM chips are assumed be the game's 32-byte palette RAM
1177		sram_189 = state->m_generic_paletteram_8;
	1183	sram_189 = m_generic_paletteram_8;
1178	1184
1179	1185	// each of the three 32-byte 6330 PROM is wired to an RGB component output
1180		prom_6330 = state->memregion("proms")->base();
	1186	prom_6330 = memregion("proms")->base();
1181	1187
1182	1188	// latch1 holds 8 bits from the selected palette RAM address
1183	1189	latch1_273 = sram_189[addr];
r21058	r21059
1229	1235	palette_set_color(machine(), offset+SP_ALPHA, MAKE_RGB(r, g, b));
1230	1236	palette_set_color(machine(), offset+SP_COLLD, MAKE_RGB(r, g, b));
1231	1237
1232		halleys_decode_rgb(machine(), &r, &g, &b, offset, 0);
	1238	halleys_decode_rgb(&r, &g, &b, offset, 0);
1233	1239	palette_set_color(machine(), offset+0x20, MAKE_RGB(r, g, b));
1234	1240	}
1235	1241
r21058	r21059
1263	1269	}
1264	1270
1265	1271
1266		static void copy_scroll_op(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
	1272	void halleys_state::copy_scroll_op(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
1267	1273	{
1268	1274	//--------------------------------------------------------------------------
1269	1275
r21058	r21059
1300	1306	}
1301	1307
1302	1308
1303		static void copy_scroll_xp(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
	1309	void halleys_state::copy_scroll_xp(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
1304	1310	{
1305	1311	//--------------------------------------------------------------------------
1306	1312
r21058	r21059
1358	1364
1359	1365
1360	1366
1361		static void copy_fixed_xp(bitmap_ind16 &bitmap, UINT16 *source)
	1367	void halleys_state::copy_fixed_xp(bitmap_ind16 &bitmap, UINT16 *source)
1362	1368	{
1363	1369	UINT16 *esi, *edi;
1364	1370	int dst_pitch, ecx, edx;
r21058	r21059
1393	1399	}
1394	1400
1395	1401
1396		static void copy_fixed_2b(bitmap_ind16 &bitmap, UINT16 *source)
	1402	void halleys_state::copy_fixed_2b(bitmap_ind16 &bitmap, UINT16 *source)
1397	1403	{
1398	1404	UINT16 *esi, *edi;
1399	1405	int dst_pitch, ecx, edx;
r21058	r21059
1440	1446	}
1441	1447
1442	1448
1443		static void filter_bitmap(running_machine &machine, bitmap_ind16 &bitmap, int mask)
	1449	void halleys_state::filter_bitmap(bitmap_ind16 &bitmap, int mask)
1444	1450	{
1445		halleys_state *state = machine.driver_data<halleys_state>();
1446	1451	int dst_pitch;
1447	1452
1448	1453	UINT32 *pal_ptr, *edi;
1449	1454	int esi, eax, ebx, ecx, edx;
1450	1455
1451		pal_ptr = state->m_internal_palette;
	1456	pal_ptr = m_internal_palette;
1452	1457	esi = mask | 0xffffff00;
1453	1458	edi = (UINT32*)&bitmap.pix16(VIS_MINY, VIS_MINX + CLIP_W);
1454	1459	dst_pitch = bitmap.rowpixels() >> 1;
r21058	r21059
1504	1509	// HALF-HACK: apply RGB filter when the following conditions are met
1505	1510	i = m_io_ram[0xa0];
1506	1511	j = m_io_ram[0xa1];
1507		if (m_io_ram[0x2b] && (i>0xc6 && i<0xfe) && (j==0xc0 || j==0xed)) filter_bitmap(machine(), bitmap, i);
	1512	if (m_io_ram[0x2b] && (i>0xc6 && i<0xfe) && (j==0xc0 || j==0xed)) filter_bitmap(bitmap, i);
1508	1513	return 0;
1509	1514	}
1510	1515
r21058	r21059
2148	2153	//**************************************************************************
2149	2154	// Driver Initializations
2150	2155
2151		static void init_common(running_machine &machine)
	2156	void halleys_state::init_common()
2152	2157	{
2153		halleys_state *state = machine.driver_data<halleys_state>();
2154	2158	UINT8 *buf, *rom;
2155	2159	int addr, i;
2156	2160	UINT8 al, ah, dl, dh;
2157	2161
2158	2162
2159	2163	// allocate memory for unpacked graphics
2160		buf = auto_alloc_array(machine, UINT8, 0x100000);
2161		state->m_gfx_plane02 = buf;
2162		state->m_gfx_plane13 = buf + 0x80000;
	2164	buf = auto_alloc_array(machine(), UINT8, 0x100000);
	2165	m_gfx_plane02 = buf;
	2166	m_gfx_plane13 = buf + 0x80000;
2163	2167
2164	2168
2165	2169	// allocate memory for render layers
2166		buf = auto_alloc_array(machine, UINT8, SCREEN_BYTESIZE * MAX_LAYERS);
2167		for (i=0; i<MAX_LAYERS; buf+=SCREEN_BYTESIZE, i++) state->m_render_layer[i] = (UINT16*)buf;
	2170	buf = auto_alloc_array(machine(), UINT8, SCREEN_BYTESIZE * MAX_LAYERS);
	2171	for (i=0; i<MAX_LAYERS; buf+=SCREEN_BYTESIZE, i++) m_render_layer[i] = (UINT16*)buf;
2168	2172
2169	2173
2170	2174	// allocate memory for pre-processed ROMs
2171		state->m_gfx1_base = auto_alloc_array(machine, UINT8, 0x20000);
	2175	m_gfx1_base = auto_alloc_array(machine(), UINT8, 0x20000);
2172	2176
2173	2177
2174	2178	// allocate memory for alpha table
2175		state->m_alpha_table = auto_alloc_array(machine, UINT32, 0x10000);
	2179	m_alpha_table = auto_alloc_array(machine(), UINT32, 0x10000);
2176	2180
2177	2181
2178	2182	// allocate memory for internal palette
2179		state->m_internal_palette = auto_alloc_array(machine, UINT32, PALETTE_SIZE);
	2183	m_internal_palette = auto_alloc_array(machine(), UINT32, PALETTE_SIZE);
2180	2184
2181	2185
2182	2186	// allocate memory for hardware collision list
2183		state->m_collision_list = auto_alloc_array(machine, UINT8, MAX_SPRITES);
	2187	m_collision_list = auto_alloc_array(machine(), UINT8, MAX_SPRITES);
2184	2188
2185	2189
2186	2190	// decrypt main program ROM
2187		rom = state->m_cpu1_base = state->memregion("maincpu")->base();
2188		buf = state->m_gfx1_base;
	2191	rom = m_cpu1_base = memregion("maincpu")->base();
	2192	buf = m_gfx1_base;
2189	2193
2190	2194	for (i=0; i<0x10000; i++)
2191	2195	{
r21058	r21059
2197	2201
2198	2202
2199	2203	// swap graphics ROM addresses and unpack each pixel
2200		rom = machine.root_device().memregion("gfx1")->base();
2201		buf = state->m_gfx_plane02;
	2204	rom = memregion("gfx1")->base();
	2205	buf = m_gfx_plane02;
2202	2206
2203	2207	for (i=0xffff; i>=0; i--)
2204	2208	{
2205	2209	al = rom[i];
2206	2210	ah = rom[i+0x10000];
2207		state->m_gfx1_base[0xffff-i] = al;
2208		state->m_gfx1_base[0x1ffff-i] = ah;
	2211	m_gfx1_base[0xffff-i] = al;
	2212	m_gfx1_base[0x1ffff-i] = ah;
2209	2213
2210	2214	buf[0] = dl = (al    & 1) | (ah<<2 & 4);  dl <<= 1;
2211	2215	buf[1] = dh = (al>>1 & 1) | (ah<<1 & 4);  dh <<= 1;
r21058	r21059
2233	2237	{
2234	2238	m_game_id = GAME_BENBEROB;
2235	2239
2236		init_common(machine());
	2240	init_common();
2237	2241
2238	2242	m_blitter_reset_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(halleys_state::blitter_reset),this));
2239	2243	}
r21058	r21059
2244	2248	m_game_id = GAME_HALLEYS;
2245	2249	m_collision_detection = 0xb114;
2246	2250
2247		init_common(machine());
	2251	init_common();
2248	2252	}
2249	2253
2250	2254	DRIVER_INIT_MEMBER(halleys_state,halley87)
r21058	r21059
2252	2256	m_game_id = GAME_HALLEYS;
2253	2257	m_collision_detection = 0xb10d;
2254	2258
2255		init_common(machine());
	2259	init_common();
2256	2260	}
2257	2261
2258	2262

trunk/src/mame/drivers/cyclemb.c

r21058	r21059
121	121	virtual void palette_init();
122	122	UINT32 screen_update_cyclemb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
123	123	UINT32 screen_update_skydest(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	124	void cyclemb_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	125	void cyclemb_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	126	void skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	127	void skydest_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	128	void skydest_i8741_reset();
124	129	};
125	130
126	131
r21058	r21059
157	162	{
158	163	}
159	164
160		static void cyclemb_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	165	void cyclemb_state::cyclemb_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
161	166	{
162		cyclemb_state *state = screen.machine().driver_data<cyclemb_state>();
163	167	gfx_element *gfx = screen.machine().gfx[0];
164	168	int x,y,count;
165		UINT8 flip_screen = state->flip_screen();
166
167	169	count = 0;
168	170
169	171	for (y=0;y<32;y++)
170	172	{
171	173	for (x=0;x<64;x++)
172	174	{
173		int attr = state->m_cram[count];
174		int tile = (state->m_vram[count]) | ((attr & 3)<<8);
	175	int attr = m_cram[count];
	176	int tile = (m_vram[count]) | ((attr & 3)<<8);
175	177	int color = ((attr & 0xf8) >> 3) ^ 0x1f;
176	178	int odd_line = y & 1 ? 0x40 : 0x00;
177		//      int sx_offs = flip_screen ? 512 : 0
178		int scrollx = ((state->m_vram[(y/2)+odd_line]) + (state->m_cram[(y/2)+odd_line]<<8) + 48) & 0x1ff;
	179	//      int sx_offs = flip_screen() ? 512 : 0
	180	int scrollx = ((m_vram[(y/2)+odd_line]) + (m_cram[(y/2)+odd_line]<<8) + 48) & 0x1ff;
179	181
180	182	if(!(attr & 4))
181	183	color += 0x20;//screen.machine().rand();
182	184
183		if(flip_screen)
	185	if(flip_screen())
184	186	{
185	187	drawgfx_opaque(bitmap,cliprect,gfx,tile,color,1,1,512-(x*8)-scrollx,256-(y*8));
186	188	/* wrap-around */
r21058	r21059
209	211	bank 3
210	212	---- ---x [1] sprite enable flag?
211	213	*/
212		static void cyclemb_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	214	void cyclemb_state::cyclemb_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
213	215	{
214		cyclemb_state *state = screen.machine().driver_data<cyclemb_state>();
215		UINT8 flip_screen = state->flip_screen();
216	216	UINT8 col,fx,fy,region;
217	217	UINT16 spr_offs,i;
218	218	INT16 x,y;
r21058	r21059
228	228
229	229	for(i=0;i<0x40;i+=2)
230	230	{
231		y = 0xf1 - state->m_obj2_ram[i];
232		x = state->m_obj2_ram[i+1] - 56;
233		spr_offs = (state->m_obj1_ram[i+0]);
234		spr_offs += ((state->m_obj3_ram[i+0] & 3) << 8);
235		col = (state->m_obj1_ram[i+1] & 0x3f);
236		region = ((state->m_obj3_ram[i] & 0x10) >> 4) + 1;
	231	y = 0xf1 - m_obj2_ram[i];
	232	x = m_obj2_ram[i+1] - 56;
	233	spr_offs = (m_obj1_ram[i+0]);
	234	spr_offs += ((m_obj3_ram[i+0] & 3) << 8);
	235	col = (m_obj1_ram[i+1] & 0x3f);
	236	region = ((m_obj3_ram[i] & 0x10) >> 4) + 1;
237	237	if(region == 2)
238	238	{
239	239	spr_offs >>= 2;
240		//spr_offs += ((state->m_obj3_ram[i+0] & 3) << 5);
	240	//spr_offs += ((m_obj3_ram[i+0] & 3) << 5);
241	241	y-=16;
242	242	}
243	243
244		if(state->m_obj3_ram[i+1] & 1)
	244	if(m_obj3_ram[i+1] & 1)
245	245	x+=256;
246		//if(state->m_obj3_ram[i+1] & 2)
	246	//if(m_obj3_ram[i+1] & 2)
247	247	//              x-=256;
248		fx = (state->m_obj3_ram[i+0] & 4) >> 2;
249		fy = (state->m_obj3_ram[i+0] & 8) >> 3;
	248	fx = (m_obj3_ram[i+0] & 4) >> 2;
	249	fy = (m_obj3_ram[i+0] & 8) >> 3;
250	250
251		if(flip_screen)
	251	if(flip_screen())
252	252	{
253	253	fx = !fx;
254	254	fy = !fy;
r21058	r21059
258	258	}
259	259
260	260
261		static void skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	261	void cyclemb_state::skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
262	262	{
263		cyclemb_state *state = screen.machine().driver_data<cyclemb_state>();
264	263	gfx_element *gfx = screen.machine().gfx[0];
265	264	int x,y;
266		//UINT8 flip_screen = state->flip_screen();
267	265
268	266
269	267	for (y=0;y<32;y++)
r21058	r21059
272	270	{
273	271	/* upper bits of the first address of cram seems to be related to colour cycling */
274	272
275		int attr = state->m_cram[x+y*64];
276		int tile = (state->m_vram[x+y*64]) | ((attr & 3)<<8);
	273	int attr = m_cram[x+y*64];
	274	int tile = (m_vram[x+y*64]) | ((attr & 3)<<8);
277	275	int color = ((attr & 0xfc) >> 2);
278		int scrollx = state->m_vram[0*64+0];
279		scrollx |= (state->m_cram[0*64+0] & 0x01)<<8;
	276	int scrollx = m_vram[0*64+0];
	277	scrollx |= (m_cram[0*64+0] & 0x01)<<8;
280	278
281		int cycle = (state->m_cram[0*64+0] & 0xf0)>>4;
	279	int cycle = (m_cram[0*64+0] & 0xf0)>>4;
282	280
283	281	color ^= 0x3f;
284	282	// hardcoded to thie palette bit?
r21058	r21059
288	286
289	287	int scrolly;
290	288	if (x<32)
291		scrolly = state->m_vram[(x)*64+0];
	289	scrolly = m_vram[(x)*64+0];
292	290	else
293		scrolly = state->m_vram[(x-32)*64+1];
	291	scrolly = m_vram[(x-32)*64+1];
294	292
295	293
296	294	drawgfx_opaque(bitmap,cliprect,gfx,tile,color,0,0,x*8+scrollx,((y*8)-scrolly)&0xff);
r21058	r21059
313	311	---- ---x [1] sprite enable flag?
314	312	*/
315	313
316		static void skydest_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	314	void cyclemb_state::skydest_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
317	315	{
318		cyclemb_state *state = screen.machine().driver_data<cyclemb_state>();
319		UINT8 flip_screen = state->flip_screen();
320	316	UINT8 col,fx,fy,region;
321	317	UINT16 spr_offs,i;
322	318	INT16 x,y;
323	319
324		//  popmessage("%d %d",state->m_obj2_ram[0x0d], 0xf1 - state->m_obj2_ram[0x0c+1] + 68);
	320	//  popmessage("%d %d",m_obj2_ram[0x0d], 0xf1 - m_obj2_ram[0x0c+1] + 68);
325	321
326	322	for(i=0;i<0x80;i+=2)
327	323	{
328		y = state->m_obj2_ram[i] - 1;
329		x = state->m_obj2_ram[i+1];
	324	y = m_obj2_ram[i] - 1;
	325	x = m_obj2_ram[i+1];
330	326
331		if(state->m_obj3_ram[i+1] & 1)
	327	if(m_obj3_ram[i+1] & 1)
332	328	x |= 0x100;
333	329
334	330	x = 0x138 - x;
335	331
336		spr_offs = (state->m_obj1_ram[i+0]);
337		spr_offs += ((state->m_obj3_ram[i+0] & 3) << 8);
338		col = (state->m_obj1_ram[i+1] & 0x3f);
339		region = ((state->m_obj3_ram[i] & 0x10) >> 4) + 1;
	332	spr_offs = (m_obj1_ram[i+0]);
	333	spr_offs += ((m_obj3_ram[i+0] & 3) << 8);
	334	col = (m_obj1_ram[i+1] & 0x3f);
	335	region = ((m_obj3_ram[i] & 0x10) >> 4) + 1;
340	336	if(region == 2)
341	337	{
342	338	spr_offs >>= 2;
343		//  spr_offs += ((state->m_obj3_ram[i+0] & 3) << 5);
	339	//  spr_offs += ((m_obj3_ram[i+0] & 3) << 5);
344	340	x-=16;
345	341	}
346	342
347	343
348		fx = (state->m_obj3_ram[i+0] & 4) >> 2;
349		fy = (state->m_obj3_ram[i+0] & 8) >> 3;
	344	fx = (m_obj3_ram[i+0] & 4) >> 2;
	345	fy = (m_obj3_ram[i+0] & 8) >> 3;
350	346
351		if(flip_screen)
	347	if(flip_screen())
352	348	{
353	349	fx = !fx;
354	350	fy = !fy;
r21058	r21059
407	403	// a bunch of other things are setted here
408	404	}
409	405
410		static void skydest_i8741_reset(running_machine &machine)
	406	void cyclemb_state::skydest_i8741_reset()
411	407	{
412		cyclemb_state *state = machine.driver_data<cyclemb_state>();
413	408
414		state->m_mcu[0].rxd = 0;
415		state->m_mcu[0].txd = 0;
416		state->m_mcu[0].rst = 0;
417		state->m_mcu[0].state = 0;
418		state->m_mcu[0].packet_type = 0;
	409	m_mcu[0].rxd = 0;
	410	m_mcu[0].txd = 0;
	411	m_mcu[0].rst = 0;
	412	m_mcu[0].state = 0;
	413	m_mcu[0].packet_type = 0;
419	414	}
420	415
421	416	READ8_MEMBER( cyclemb_state::skydest_i8741_0_r )
r21058	r21059
595	590
596	591	void cyclemb_state::machine_reset()
597	592	{
598		skydest_i8741_reset(machine());
	593	skydest_i8741_reset();
599	594	}
600	595
601	596

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