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r20912 Sunday 10th February, 2013 at 21:04:05 UTC by Wilbert Pol
(MESS) pc6001.c: Reduce tagmap lookups (nw)

[src/mess/drivers]

pc6001.c

trunk/src/mess/drivers/pc6001.c

r20911	r20912
139	139	{
140	140	public:
141	141	pc6001_state(const machine_config &mconfig, device_type type, const char *tag)
142		: driver_device(mconfig, type, tag),
143		m_ppi(*this, "ppi8255")
144		,
145		m_ram(*this, "ram"){ }
	142	: driver_device(mconfig, type, tag)
	143	, m_ppi(*this, "ppi8255")
	144	, m_ram(*this, "ram")
	145	, m_maincpu(*this, "maincpu")
	146	, m_cassette(*this, CASSETTE_TAG)
	147	, m_region_maincpu(*this, "maincpu")
	148	, m_region_gfx1(*this, "gfx1")
	149	, m_region_cas(*this, "cas")
	150	, m_region_cart_img(*this, "cart_img")
	151	, m_io_mode4_dsw(*this, "MODE4_DSW")
	152	, m_io_p1(*this, "P1")
	153	, m_io_p2(*this, "P2")
	154	, m_io_key1(*this, "key1")
	155	, m_io_key2(*this, "key2")
	156	, m_io_key3(*this, "key3")
	157	, m_io_key_modifiers(*this, "key_modifiers")
	158	, m_bank1(*this, "bank1")
	159	, m_bank2(*this, "bank2")
	160	, m_bank3(*this, "bank3")
	161	, m_bank4(*this, "bank4")
	162	, m_bank5(*this, "bank5")
	163	, m_bank6(*this, "bank6")
	164	, m_bank7(*this, "bank7")
	165	, m_bank8(*this, "bank8")
	166	{ }
146	167
147	168	required_device<i8255_device> m_ppi;
148	169
r20911	r20912
245	266	DECLARE_WRITE8_MEMBER(pc6001_8255_portc_w);
246	267	DECLARE_READ8_MEMBER(pc6001_8255_portc_r);
247	268	DECLARE_DEVICE_IMAGE_LOAD_MEMBER(pc6001_cass);
	269
	270	protected:
	271	required_device<cpu_device> m_maincpu;
	272	required_device<device_t> m_cassette;
	273	required_memory_region m_region_maincpu;
	274	required_memory_region m_region_gfx1;
	275	required_memory_region m_region_cas;
	276	required_memory_region m_region_cart_img;
	277	required_ioport m_io_mode4_dsw;
	278	required_ioport m_io_p1;
	279	required_ioport m_io_p2;
	280	required_ioport m_io_key1;
	281	required_ioport m_io_key2;
	282	required_ioport m_io_key3;
	283	required_ioport m_io_key_modifiers;
	284	required_memory_bank m_bank1;
	285	optional_memory_bank m_bank2;
	286	optional_memory_bank m_bank3;
	287	optional_memory_bank m_bank4;
	288	optional_memory_bank m_bank5;
	289	optional_memory_bank m_bank6;
	290	optional_memory_bank m_bank7;
	291	optional_memory_bank m_bank8;
	292
	293	void draw_gfx_mode4(bitmap_ind16 &bitmap,const rectangle &cliprect,int attr);
	294	void draw_bitmap_2bpp(bitmap_ind16 &bitmap,const rectangle &cliprect, int attr);
	295	void draw_tile_3bpp(bitmap_ind16 &bitmap,const rectangle &cliprect,int x,int y,int tile,int attr);
	296	void draw_tile_text(bitmap_ind16 &bitmap,const rectangle &cliprect,int x,int y,int tile,int attr,int has_mc6847);
	297	void draw_border(bitmap_ind16 &bitmap,const rectangle &cliprect,int attr,int has_mc6847);
	298	void pc6001_screen_draw(bitmap_ind16 &bitmap,const rectangle &cliprect, int has_mc6847);
	299	UINT8 check_joy_press();
	300	UINT8 check_keyboard_press();
	301	void vram_bank_change(UINT8 vram_bank);
248	302	};
249	303
250	304
r20911	r20912
269	323	}
270	324
271	325	/* this is known as gfx mode 4 */
272		static void draw_gfx_mode4(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int attr)
	326	void pc6001_state::draw_gfx_mode4(bitmap_ind16 &bitmap,const rectangle &cliprect,int attr)
273	327	{
274		pc6001_state *state = machine.driver_data<pc6001_state>();
275	328	int x,y,xi;
276	329	int fgcol,color;
277	330	int col_setting;
r20911	r20912
287	340	{ 0, 5, 2, 7 }, //Pink / Green
288	341	{ 0, 2, 5, 7 }, //Green / Pink
289	342	};
290		col_setting = machine.root_device().ioport("MODE4_DSW")->read() & 7;
	343	col_setting = m_io_mode4_dsw->read() & 7;
291	344
292	345	if((attr & 0x0c) != 0x0c)
293	346	popmessage("Mode 4 vram attr != 0x0c, contact MESSdev");
r20911	r20912
296	349	{
297	350	for(x=0;x<32;x++)
298	351	{
299		int tile = state->m_video_ram[(x+(y*32))+0x200];
	352	int tile = m_video_ram[(x+(y*32))+0x200];
300	353
301	354	if(col_setting == 0x00) //monochrome
302	355	{
r20911	r20912
306	359
307	360	color = ((tile)>>(7-xi) & 1) ? fgcol : 0;
308	361
309		bitmap.pix16((y+24), (x*8+xi)+32) = machine.pens[color];
	362	bitmap.pix16((y+24), (x*8+xi)+32) = machine().pens[color];
310	363	}
311	364	}
312	365	else
r20911	r20912
317	370
318	371	color = (attr & 2) ? (pen_wattr[col_setting-1][fgcol]) : (pen_gattr[col_setting-1][fgcol]);
319	372
320		bitmap.pix16((y+24), ((x*8+xi*2)+0)+32) = machine.pens[color];
321		bitmap.pix16((y+24), ((x*8+xi*2)+1)+32) = machine.pens[color];
	373	bitmap.pix16((y+24), ((x*8+xi*2)+0)+32) = machine().pens[color];
	374	bitmap.pix16((y+24), ((x*8+xi*2)+1)+32) = machine().pens[color];
322	375	}
323	376	}
324	377	}
325	378	}
326	379	}
327	380
328		static void draw_bitmap_2bpp(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect, int attr)
	381	void pc6001_state::draw_bitmap_2bpp(bitmap_ind16 &bitmap,const rectangle &cliprect, int attr)
329	382	{
330		pc6001_state *state = machine.driver_data<pc6001_state>();
331	383	int color,x,y,xi,yi;
332	384
333	385	int shrink_x = 2*4;
r20911	r20912
341	393	{
342	394	for(x=0;x<w;x++)
343	395	{
344		int tile = state->m_video_ram[(x+(y*32))+0x200];
	396	int tile = m_video_ram[(x+(y*32))+0x200];
345	397
346	398	for(yi=0;yi<shrink_y;yi++)
347	399	{
r20911	r20912
352	404	color = ((tile >> i) & 3)+8;
353	405	color+= col_bank;
354	406
355		bitmap.pix16(((y*shrink_y+yi)+24), (x*shrink_x+((shrink_x-1)-xi))+32) = machine.pens[color];
	407	bitmap.pix16(((y*shrink_y+yi)+24), (x*shrink_x+((shrink_x-1)-xi))+32) = machine().pens[color];
356	408	}
357	409	}
358	410	}
r20911	r20912
364	416	{
365	417	for(x=0;x<w;x++)
366	418	{
367		int tile = state->m_video_ram[(x+((y/3)*32))+0x200];
	419	int tile = m_video_ram[(x+((y/3)*32))+0x200];
368	420
369	421	for(yi=0;yi<shrink_y;yi++)
370	422	{
r20911	r20912
375	427	color = ((tile >> i) & 3)+8;
376	428	color+= col_bank;
377	429
378		bitmap.pix16((((y+0)*shrink_y+yi)+24), (x*shrink_x+((shrink_x-1)-xi))+32) = machine.pens[color];
379		bitmap.pix16((((y+1)*shrink_y+yi)+24), (x*shrink_x+((shrink_x-1)-xi))+32) = machine.pens[color];
380		bitmap.pix16((((y+2)*shrink_y+yi)+24), (x*shrink_x+((shrink_x-1)-xi))+32) = machine.pens[color];
	430	bitmap.pix16((((y+0)*shrink_y+yi)+24), (x*shrink_x+((shrink_x-1)-xi))+32) = machine().pens[color];
	431	bitmap.pix16((((y+1)*shrink_y+yi)+24), (x*shrink_x+((shrink_x-1)-xi))+32) = machine().pens[color];
	432	bitmap.pix16((((y+2)*shrink_y+yi)+24), (x*shrink_x+((shrink_x-1)-xi))+32) = machine().pens[color];
381	433	}
382	434	}
383	435	}
r20911	r20912
385	437	}
386	438	}
387	439
388		static void draw_tile_3bpp(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int x,int y,int tile,int attr)
	440	void pc6001_state::draw_tile_3bpp(bitmap_ind16 &bitmap,const rectangle &cliprect,int x,int y,int tile,int attr)
389	441	{
390	442	int color,pen,xi,yi;
391	443
r20911	r20912
412	464
413	465	color = ((tile >> i) & 1) ? pen+8 : 0;
414	466
415		bitmap.pix16(((y*12+(11-yi))+24), (x*8+(7-xi))+32) = machine.pens[color];
	467	bitmap.pix16(((y*12+(11-yi))+24), (x*8+(7-xi))+32) = machine().pens[color];
416	468	}
417	469	}
418	470	}
419	471
420		static void draw_tile_text(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int x,int y,int tile,int attr,int has_mc6847)
	472	void pc6001_state::draw_tile_text(bitmap_ind16 &bitmap,const rectangle &cliprect,int x,int y,int tile,int attr,int has_mc6847)
421	473	{
422	474	int xi,yi,pen,fgcol,color;
423		UINT8 *gfx_data = machine.root_device().memregion("gfx1")->base();
	475	UINT8 *gfx_data = m_region_gfx1->base();
424	476
425	477	for(yi=0;yi<12;yi++)
426	478	{
r20911	r20912
448	500	color = pen ? fgcol : 0;
449	501	}
450	502
451		bitmap.pix16(((y*12+yi)+24), (x*8+xi)+32) = machine.pens[color];
	503	bitmap.pix16(((y*12+yi)+24), (x*8+xi)+32) = machine().pens[color];
452	504	}
453	505	}
454	506	}
455	507
456		static void draw_border(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int attr,int has_mc6847)
	508	void pc6001_state::draw_border(bitmap_ind16 &bitmap,const rectangle &cliprect,int attr,int has_mc6847)
457	509	{
458	510	int x,y,color;
459	511
r20911	r20912
470	522	else
471	523	color = 0; //FIXME: other modes not yet checked
472	524
473		bitmap.pix16(y, x) = machine.pens[color];
	525	bitmap.pix16(y, x) = machine().pens[color];
474	526	}
475	527	}
476	528	}
477	529
478		static void pc6001_screen_draw(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect, int has_mc6847)
	530	void pc6001_state::pc6001_screen_draw(bitmap_ind16 &bitmap,const rectangle &cliprect, int has_mc6847)
479	531	{
480		pc6001_state *state = machine.driver_data<pc6001_state>();
481	532	int x,y;
482	533	int tile,attr;
483	534
484		attr = state->m_video_ram[0];
	535	attr = m_video_ram[0];
485	536
486		draw_border(machine,bitmap,cliprect,attr,has_mc6847);
	537	draw_border(bitmap,cliprect,attr,has_mc6847);
487	538
488	539	if(attr & 0x80) // gfx mode
489	540	{
490	541	if(attr & 0x10) // 256x192x1 mode (FIXME: might be a different trigger)
491	542	{
492		draw_gfx_mode4(machine,bitmap,cliprect,attr);
	543	draw_gfx_mode4(bitmap,cliprect,attr);
493	544	}
494	545	else // 128x192x2 mode
495	546	{
496		draw_bitmap_2bpp(machine,bitmap,cliprect,attr);
	547	draw_bitmap_2bpp(bitmap,cliprect,attr);
497	548	}
498	549	}
499	550	else // text mode
r20911	r20912
502	553	{
503	554	for(x=0;x<32;x++)
504	555	{
505		tile = state->m_video_ram[(x+(y*32))+0x200];
506		attr = state->m_video_ram[(x+(y*32)) & 0x1ff];
	556	tile = m_video_ram[(x+(y*32))+0x200];
	557	attr = m_video_ram[(x+(y*32)) & 0x1ff];
507	558
508	559	if(attr & 0x40)
509	560	{
510		draw_tile_3bpp(machine,bitmap,cliprect,x,y,tile,attr);
	561	draw_tile_3bpp(bitmap,cliprect,x,y,tile,attr);
511	562	}
512	563	else
513	564	{
514		draw_tile_text(machine,bitmap,cliprect,x,y,tile,attr,has_mc6847);
	565	draw_tile_text(bitmap,cliprect,x,y,tile,attr,has_mc6847);
515	566	}
516	567	}
517	568	}
r20911	r20912
520	571
521	572	UINT32 pc6001_state::screen_update_pc6001(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
522	573	{
523		pc6001_screen_draw(machine(),bitmap,cliprect,1);
	574	pc6001_screen_draw(bitmap,cliprect,1);
524	575
525	576	return 0;
526	577	}
r20911	r20912
622	673	else if(m_exgfx_text_mode)
623	674	{
624	675	int xi,yi,pen,fgcol,bgcol,color;
625		UINT8 *gfx_data = machine().root_device().memregion("gfx1")->base();
	676	UINT8 *gfx_data = m_region_gfx1->base();
626	677
627	678	for(y=0;y<20;y++)
628	679	{
r20911	r20912
660	711	else
661	712	{
662	713	attr = m_video_ram[0];
663		pc6001_screen_draw(machine(),bitmap,cliprect,0);
	714	pc6001_screen_draw(bitmap,cliprect,0);
664	715	}
665	716
666	717	return 0;
r20911	r20912
670	721	{
671	722	int x,y,tile,attr;
672	723	int xi,yi,pen,fgcol,bgcol,color;
673		UINT8 *gfx_data = memregion("gfx1")->base();
	724	UINT8 *gfx_data = m_region_gfx1->base();
674	725
675	726
676	727	if(m_sr_video_mode & 8) // text mode
r20911	r20912
769	820	if((!(m_sys_latch & 8)) && data & 0x8) //PLAY tape cmd
770	821	{
771	822	m_cas_switch = 1;
772		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
773		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_PLAY,CASSETTE_MASK_UISTATE);
	823	//m_cassette->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
	824	//m_cassette->change_state(CASSETTE_PLAY,CASSETTE_MASK_UISTATE);
774	825	}
775	826	if((m_sys_latch & 8) && ((data & 0x8) == 0)) //STOP tape cmd
776	827	{
777	828	m_cas_switch = 0;
778		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
779		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_STOPPED,CASSETTE_MASK_UISTATE);
	829	//m_cassette->change_state(CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
	830	//m_cassette->change_state(CASSETTE_STOPPED,CASSETTE_MASK_UISTATE);
780	831	//m_irq_vector = 0x00;
781		//machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	832	//m_maincpu->set_input_line(0, ASSERT_LINE);
782	833	}
783	834
784	835	m_sys_latch = data;
r20911	r20912
811	862
812	863	static UINT8 pc6001_get_char_rom(running_machine &machine, UINT8 ch, int line)
813	864	{
814		UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
	865	UINT8 *gfx = m_region_gfx1->base();
815	866	return gfx[ch*16+line];
816	867	}
817	868	#endif
r20911	r20912
852	903	m_port_c_8255 |= 0xa8;
853	904
854	905	{
855		UINT8 *gfx_data = memregion("gfx1")->base();
856		UINT8 *ext_rom = memregion("cart_img")->base();
	906	UINT8 *gfx_data = m_region_gfx1->base();
	907	UINT8 *ext_rom = m_region_cart_img->base();
857	908
858	909	//printf("%02x\n",data);
859	910
860	911	if((data & 0x0f) == 0x05)
861		membank("bank1")->set_base(&ext_rom[0x2000]);
	912	m_bank1->set_base(&ext_rom[0x2000]);
862	913	if((data & 0x0f) == 0x04)
863		membank("bank1")->set_base(&gfx_data[0]);
	914	m_bank1->set_base(&gfx_data[0]);
864	915	}
865	916	}
866	917	m_ppi->write(space,offset,data);
r20911	r20912
1058	1109
1059	1110	WRITE8_MEMBER(pc6001_state::pc6001m2_bank_r0_w)
1060	1111	{
1061		UINT8 *ROM = memregion("maincpu")->base();
1062		UINT8 *gfx_data = memregion("gfx1")->base();
	1112	UINT8 *ROM = m_region_maincpu->base();
	1113	UINT8 *gfx_data = m_region_gfx1->base();
1063	1114
1064	1115	//  bankaddress = 0x10000 + (0x4000 * ((data & 0x40)>>6));
1065	1116	//  membank(1)->set_base(&ROM[bankaddress]);
r20911	r20912
1067	1118	m_bank_r0 = data;
1068	1119
1069	1120	//  printf("%02x BANK | %02x\n",data,m_bank_opt);
1070		membank("bank1")->set_base(&ROM[banksw_table_r0[(data & 0xf)+(m_bank_opt*0x10)][0]]);
1071		membank("bank2")->set_base(&ROM[banksw_table_r0[(data & 0xf)+(m_bank_opt*0x10)][1]]);
1072		membank("bank3")->set_base(&ROM[banksw_table_r0[((data & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
	1121	m_bank1->set_base(&ROM[banksw_table_r0[(data & 0xf)+(m_bank_opt*0x10)][0]]);
	1122	m_bank2->set_base(&ROM[banksw_table_r0[(data & 0xf)+(m_bank_opt*0x10)][1]]);
	1123	m_bank3->set_base(&ROM[banksw_table_r0[((data & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
1073	1124	if(!m_gfx_bank_on)
1074		membank("bank4")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1125	m_bank4->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1075	1126	else
1076		membank("bank4")->set_base(&gfx_data[m_cgrom_bank_addr]);
	1127	m_bank4->set_base(&gfx_data[m_cgrom_bank_addr]);
1077	1128	}
1078	1129
1079	1130	WRITE8_MEMBER(pc6001_state::pc6001m2_bank_r1_w)
1080	1131	{
1081		UINT8 *ROM = memregion("maincpu")->base();
	1132	UINT8 *ROM = m_region_maincpu->base();
1082	1133
1083	1134	//  bankaddress = 0x10000 + (0x4000 * ((data & 0x40)>>6));
1084	1135	//  membank(1)->set_base(&ROM[bankaddress]);
r20911	r20912
1086	1137	m_bank_r1 = data;
1087	1138
1088	1139	//  printf("%02x BANK\n",data);
1089		membank("bank5")->set_base(&ROM[banksw_table_r1[(data & 0xf)+(m_bank_opt*0x10)][0]]);
1090		membank("bank6")->set_base(&ROM[banksw_table_r1[(data & 0xf)+(m_bank_opt*0x10)][1]]);
1091		membank("bank7")->set_base(&ROM[banksw_table_r1[((data & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
1092		membank("bank8")->set_base(&ROM[banksw_table_r1[((data & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1140	m_bank5->set_base(&ROM[banksw_table_r1[(data & 0xf)+(m_bank_opt*0x10)][0]]);
	1141	m_bank6->set_base(&ROM[banksw_table_r1[(data & 0xf)+(m_bank_opt*0x10)][1]]);
	1142	m_bank7->set_base(&ROM[banksw_table_r1[((data & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
	1143	m_bank8->set_base(&ROM[banksw_table_r1[((data & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1093	1144	}
1094	1145
1095	1146	WRITE8_MEMBER(pc6001_state::pc6001m2_bank_w0_w)
r20911	r20912
1099	1150
1100	1151	WRITE8_MEMBER(pc6001_state::pc6001m2_opt_bank_w)
1101	1152	{
1102		UINT8 *ROM = memregion("maincpu")->base();
1103		UINT8 *gfx_data = memregion("gfx1")->base();
	1153	UINT8 *ROM = m_region_maincpu->base();
	1154	UINT8 *gfx_data = m_region_gfx1->base();
1104	1155
1105	1156	/*
1106	1157	0 - TVROM / VOICE ROM
r20911	r20912
1110	1161	*/
1111	1162	m_bank_opt = data & 3;
1112	1163
1113		membank("bank1")->set_base(&ROM[banksw_table_r0[(m_bank_r0 & 0xf)+(m_bank_opt*0x10)][0]]);
1114		membank("bank2")->set_base(&ROM[banksw_table_r0[(m_bank_r0 & 0xf)+(m_bank_opt*0x10)][1]]);
1115		membank("bank3")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
	1164	m_bank1->set_base(&ROM[banksw_table_r0[(m_bank_r0 & 0xf)+(m_bank_opt*0x10)][0]]);
	1165	m_bank2->set_base(&ROM[banksw_table_r0[(m_bank_r0 & 0xf)+(m_bank_opt*0x10)][1]]);
	1166	m_bank3->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
1116	1167	if(!m_gfx_bank_on)
1117		membank("bank4")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1168	m_bank4->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1118	1169	else
1119		membank("bank4")->set_base(&gfx_data[m_cgrom_bank_addr]);
1120		membank("bank4")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1121		membank("bank5")->set_base(&ROM[banksw_table_r1[(m_bank_r1 & 0xf)+(m_bank_opt*0x10)][0]]);
1122		membank("bank6")->set_base(&ROM[banksw_table_r1[(m_bank_r1 & 0xf)+(m_bank_opt*0x10)][1]]);
1123		membank("bank7")->set_base(&ROM[banksw_table_r1[((m_bank_r1 & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
1124		membank("bank8")->set_base(&ROM[banksw_table_r1[((m_bank_r1 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1170	m_bank4->set_base(&gfx_data[m_cgrom_bank_addr]);
	1171	m_bank4->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1172	m_bank5->set_base(&ROM[banksw_table_r1[(m_bank_r1 & 0xf)+(m_bank_opt*0x10)][0]]);
	1173	m_bank6->set_base(&ROM[banksw_table_r1[(m_bank_r1 & 0xf)+(m_bank_opt*0x10)][1]]);
	1174	m_bank7->set_base(&ROM[banksw_table_r1[((m_bank_r1 & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
	1175	m_bank8->set_base(&ROM[banksw_table_r1[((m_bank_r1 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1125	1176
1126	1177	}
1127	1178
1128	1179	WRITE8_MEMBER(pc6001_state::work_ram0_w)
1129	1180	{
1130		UINT8 *ROM = memregion("maincpu")->base();
	1181	UINT8 *ROM = m_region_maincpu->base();
1131	1182	ROM[offset+((m_bank_w & 0x01) ? WRAM(0) : EXWRAM(0))] = data;
1132	1183	}
1133	1184
1134	1185	WRITE8_MEMBER(pc6001_state::work_ram1_w)
1135	1186	{
1136		UINT8 *ROM = memregion("maincpu")->base();
	1187	UINT8 *ROM = m_region_maincpu->base();
1137	1188	ROM[offset+((m_bank_w & 0x01) ? WRAM(1) : EXWRAM(1))] = data;
1138	1189	}
1139	1190
1140	1191	WRITE8_MEMBER(pc6001_state::work_ram2_w)
1141	1192	{
1142		UINT8 *ROM = memregion("maincpu")->base();
	1193	UINT8 *ROM = m_region_maincpu->base();
1143	1194	ROM[offset+((m_bank_w & 0x04) ? WRAM(2) : EXWRAM(2))] = data;
1144	1195	}
1145	1196
1146	1197	WRITE8_MEMBER(pc6001_state::work_ram3_w)
1147	1198	{
1148		UINT8 *ROM = memregion("maincpu")->base();
	1199	UINT8 *ROM = m_region_maincpu->base();
1149	1200	ROM[offset+((m_bank_w & 0x04) ? WRAM(3) : EXWRAM(3))] = data;
1150	1201	}
1151	1202
1152	1203	WRITE8_MEMBER(pc6001_state::work_ram4_w)
1153	1204	{
1154		UINT8 *ROM = memregion("maincpu")->base();
	1205	UINT8 *ROM = m_region_maincpu->base();
1155	1206	ROM[offset+((m_bank_w & 0x10) ? WRAM(4) : EXWRAM(4))] = data;
1156	1207	}
1157	1208
1158	1209	WRITE8_MEMBER(pc6001_state::work_ram5_w)
1159	1210	{
1160		UINT8 *ROM = memregion("maincpu")->base();
	1211	UINT8 *ROM = m_region_maincpu->base();
1161	1212	ROM[offset+((m_bank_w & 0x10) ? WRAM(5) : EXWRAM(5))] = data;
1162	1213	}
1163	1214
1164	1215	WRITE8_MEMBER(pc6001_state::work_ram6_w)
1165	1216	{
1166		UINT8 *ROM = memregion("maincpu")->base();
	1217	UINT8 *ROM = m_region_maincpu->base();
1167	1218	ROM[offset+((m_bank_w & 0x40) ? WRAM(6) : EXWRAM(6))] = data;
1168	1219	}
1169	1220
1170	1221	WRITE8_MEMBER(pc6001_state::work_ram7_w)
1171	1222	{
1172		UINT8 *ROM = memregion("maincpu")->base();
	1223	UINT8 *ROM = m_region_maincpu->base();
1173	1224	ROM[offset+((m_bank_w & 0x40) ? WRAM(7) : EXWRAM(7))] = data;
1174	1225	}
1175	1226
r20911	r20912
1194	1245	m_port_c_8255 |= 0xa8;
1195	1246
1196	1247	{
1197		UINT8 *ROM = memregion("maincpu")->base();
1198		UINT8 *gfx_data = memregion("gfx1")->base();
	1248	UINT8 *ROM = m_region_maincpu->base();
	1249	UINT8 *gfx_data = m_region_gfx1->base();
1199	1250
1200	1251	//printf("%02x\n",data);
1201	1252
1202	1253	if((data & 0x0f) == 0x05)
1203	1254	{
1204	1255	m_gfx_bank_on = 0;
1205		membank("bank4")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1256	m_bank4->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1206	1257	}
1207	1258	if((data & 0x0f) == 0x04)
1208	1259	{
1209	1260	m_gfx_bank_on = 1;
1210		membank("bank4")->set_base(&gfx_data[m_cgrom_bank_addr]);
	1261	m_bank4->set_base(&gfx_data[m_cgrom_bank_addr]);
1211	1262	}
1212	1263	}
1213	1264	}
1214	1265	m_ppi->write(space,offset,data);
1215	1266	}
1216	1267
1217		static void vram_bank_change(running_machine &machine,UINT8 vram_bank)
	1268	void pc6001_state::vram_bank_change(UINT8 vram_bank)
1218	1269	{
1219		pc6001_state *state = machine.driver_data<pc6001_state>();
1220		UINT8 *work_ram = state->memregion("maincpu")->base();
	1270	UINT8 *work_ram = m_region_maincpu->base();
1221	1271
1222	1272	//  popmessage("%02x",vram_bank);
1223	1273
1224	1274	switch(vram_bank & 0x66)
1225	1275	{
1226		case 0x00: state->m_video_ram = work_ram + 0x8000 + 0x28000; break; //4 color mode
1227		case 0x02: state->m_video_ram = work_ram + 0xc000 + 0x28000; break;
1228		case 0x04: state->m_video_ram = work_ram + 0x8000 + 0x28000; break;
1229		case 0x06: state->m_video_ram = work_ram + 0xc000 + 0x28000; break;
1230		case 0x20: state->m_video_ram = work_ram + 0xc000 + 0x28000; break; //4 color mode
1231		case 0x22: state->m_video_ram = work_ram + 0xe000 + 0x28000; break;
1232		case 0x24: state->m_video_ram = work_ram + 0xc000 + 0x28000; break;
1233		case 0x26: state->m_video_ram = work_ram + 0xe000 + 0x28000; break;
1234		case 0x40: state->m_video_ram = work_ram + 0x0000 + 0x28000; break; //4 color mode
1235		case 0x42: state->m_video_ram = work_ram + 0x8000 + 0x28000; break;
1236		case 0x44: state->m_video_ram = work_ram + 0x0000 + 0x28000; break;
1237		case 0x46: state->m_video_ram = work_ram + 0x8000 + 0x28000; break;
1238		case 0x60: state->m_video_ram = work_ram + 0x4000 + 0x28000; break; //4 color mode
1239		case 0x62: state->m_video_ram = work_ram + 0xa000 + 0x28000; break;
1240		case 0x64: state->m_video_ram = work_ram + 0x4000 + 0x28000; break;
1241		case 0x66: state->m_video_ram = work_ram + 0xa000 + 0x28000; break;
	1276	case 0x00: m_video_ram = work_ram + 0x8000 + 0x28000; break; //4 color mode
	1277	case 0x02: m_video_ram = work_ram + 0xc000 + 0x28000; break;
	1278	case 0x04: m_video_ram = work_ram + 0x8000 + 0x28000; break;
	1279	case 0x06: m_video_ram = work_ram + 0xc000 + 0x28000; break;
	1280	case 0x20: m_video_ram = work_ram + 0xc000 + 0x28000; break; //4 color mode
	1281	case 0x22: m_video_ram = work_ram + 0xe000 + 0x28000; break;
	1282	case 0x24: m_video_ram = work_ram + 0xc000 + 0x28000; break;
	1283	case 0x26: m_video_ram = work_ram + 0xe000 + 0x28000; break;
	1284	case 0x40: m_video_ram = work_ram + 0x0000 + 0x28000; break; //4 color mode
	1285	case 0x42: m_video_ram = work_ram + 0x8000 + 0x28000; break;
	1286	case 0x44: m_video_ram = work_ram + 0x0000 + 0x28000; break;
	1287	case 0x46: m_video_ram = work_ram + 0x8000 + 0x28000; break;
	1288	case 0x60: m_video_ram = work_ram + 0x4000 + 0x28000; break; //4 color mode
	1289	case 0x62: m_video_ram = work_ram + 0xa000 + 0x28000; break;
	1290	case 0x64: m_video_ram = work_ram + 0x4000 + 0x28000; break;
	1291	case 0x66: m_video_ram = work_ram + 0xa000 + 0x28000; break;
1242	1292	}
1243	1293	}
1244	1294
r20911	r20912
1247	1297	if((!(m_sys_latch & 8)) && data & 0x8) //PLAY tape cmd
1248	1298	{
1249	1299	m_cas_switch = 1;
1250		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
1251		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_PLAY,CASSETTE_MASK_UISTATE);
	1300	//m_cassette->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
	1301	//m_cassette->change_state(CASSETTE_PLAY,CASSETTE_MASK_UISTATE);
1252	1302	}
1253	1303	if((m_sys_latch & 8) && ((data & 0x8) == 0)) //STOP tape cmd
1254	1304	{
1255	1305	m_cas_switch = 0;
1256		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
1257		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_STOPPED,CASSETTE_MASK_UISTATE);
	1306	//m_cassette->change_state(CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
	1307	//m_cassette->change_state(CASSETTE_STOPPED,CASSETTE_MASK_UISTATE);
1258	1308	//m_irq_vector = 0x00;
1259		//machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	1309	//m_maincpu->set_input_line(0, ASSERT_LINE);
1260	1310	}
1261	1311
1262	1312	m_sys_latch = data;
1263	1313
1264	1314	m_timer_irq_mask = data & 1;
1265		vram_bank_change(machine(),(m_ex_vram_bank & 0x06) | ((m_sys_latch & 0x06) << 4));
	1315	vram_bank_change((m_ex_vram_bank & 0x06) | ((m_sys_latch & 0x06) << 4));
1266	1316
1267	1317	//printf("%02x B0\n",data);
1268	1318	}
r20911	r20912
1273	1323	//static const UINT32 startaddr[] = {WRAM(6), WRAM(6), WRAM(0), WRAM(4) };
1274	1324
1275	1325	m_ex_vram_bank = data;
1276		vram_bank_change(machine(),(m_ex_vram_bank & 0x06) | ((m_sys_latch & 0x06) << 4));
	1326	vram_bank_change((m_ex_vram_bank & 0x06) | ((m_sys_latch & 0x06) << 4));
1277	1327
1278	1328	m_exgfx_text_mode = ((data & 2) == 0);
1279	1329	m_cgrom_bank_addr = (data & 2) ? 0x0000 : 0x2000;
r20911	r20912
1365	1415	{
1366	1416	if(IRQ_LOG) printf("Timer IRQ called %02x\n",m_timer_irq_vector);
1367	1417	m_irq_vector = m_timer_irq_vector;
1368		machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	1418	m_maincpu->set_input_line(0, ASSERT_LINE);
1369	1419	}
1370	1420	}
1371	1421
r20911	r20912
1514	1564
1515	1565	WRITE8_MEMBER(pc6001_state::pc6001sr_bank_rn_w)
1516	1566	{
1517		static const char *const bank_name[8] = { "bank1","bank2","bank3", "bank4", "bank5", "bank6", "bank7", "bank8" };
1518		UINT8 *ROM = memregion("maincpu")->base();
	1567	memory_bank *bank[8] = { m_bank1, m_bank2, m_bank3, m_bank4, m_bank5, m_bank6, m_bank7, m_bank8 };
	1568	UINT8 *ROM = m_region_maincpu->base();
1519	1569	UINT8 bank_num;
1520	1570
1521	1571	m_sr_bank_r[offset] = data;
r20911	r20912
1523	1573
1524	1574	switch(data & 0xf0)
1525	1575	{
1526		case 0xf0: membank(bank_name[offset])->set_base(&ROM[SR_SYSROM_1(bank_num)]); break;
1527		case 0xe0: membank(bank_name[offset])->set_base(&ROM[SR_SYSROM_2(bank_num)]); break;
1528		case 0xd0: membank(bank_name[offset])->set_base(&ROM[SR_CGROM1(bank_num)]); break;
1529		case 0xc0: membank(bank_name[offset])->set_base(&ROM[SR_EXROM0(bank_num)]); break;
1530		case 0xb0: membank(bank_name[offset])->set_base(&ROM[SR_EXROM1(bank_num)]); break;
1531		case 0x20: membank(bank_name[offset])->set_base(&ROM[SR_EXRAM0(bank_num)]); break;
1532		case 0x00: membank(bank_name[offset])->set_base(&ROM[SR_WRAM0(bank_num)]); break;
1533		default:   membank(bank_name[offset])->set_base(&ROM[SR_NULL(bank_num)]); break;
	1576	case 0xf0: bank[offset]->set_base(&ROM[SR_SYSROM_1(bank_num)]); break;
	1577	case 0xe0: bank[offset]->set_base(&ROM[SR_SYSROM_2(bank_num)]); break;
	1578	case 0xd0: bank[offset]->set_base(&ROM[SR_CGROM1(bank_num)]); break;
	1579	case 0xc0: bank[offset]->set_base(&ROM[SR_EXROM0(bank_num)]); break;
	1580	case 0xb0: bank[offset]->set_base(&ROM[SR_EXROM1(bank_num)]); break;
	1581	case 0x20: bank[offset]->set_base(&ROM[SR_EXRAM0(bank_num)]); break;
	1582	case 0x00: bank[offset]->set_base(&ROM[SR_WRAM0(bank_num)]); break;
	1583	default:   bank[offset]->set_base(&ROM[SR_NULL(bank_num)]); break;
1534	1584	}
1535	1585	}
1536	1586
r20911	r20912
1546	1596
1547	1597	#define SR_WRAM_BANK_W(_v_) \
1548	1598	{ \
1549		UINT8 *ROM = memregion("maincpu")->base(); \
	1599	UINT8 *ROM = m_region_maincpu->base(); \
1550	1600	UINT8 bank_num; \
1551	1601	bank_num = m_sr_bank_w[_v_] & 0x0f; \
1552	1602	if((m_sr_bank_w[_v_] & 0xf0) != 0x20) \
r20911	r20912
1573	1623
1574	1624	WRITE8_MEMBER(pc6001_state::pc6001sr_vram_bank_w)
1575	1625	{
1576		UINT8 *work_ram = memregion("maincpu")->base();
	1626	UINT8 *work_ram = m_region_maincpu->base();
1577	1627
1578	1628	m_video_ram = work_ram + 0x70000 + ((data & 0x0f)*0x1000);
1579	1629	}
r20911	r20912
1583	1633	if((!(m_sys_latch & 8)) && data & 0x8) //PLAY tape cmd
1584	1634	{
1585	1635	m_cas_switch = 1;
1586		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
1587		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_PLAY,CASSETTE_MASK_UISTATE);
	1636	//m_cassette->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
	1637	//m_cassette->change_state(CASSETTE_PLAY,CASSETTE_MASK_UISTATE);
1588	1638	}
1589	1639	if((m_sys_latch & 8) && ((data & 0x8) == 0)) //STOP tape cmd
1590	1640	{
1591	1641	m_cas_switch = 0;
1592		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
1593		//machine().device(CASSETTE_TAG )->change_state(CASSETTE_STOPPED,CASSETTE_MASK_UISTATE);
	1642	//m_cassette->change_state(CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
	1643	//m_cassette->change_state(CASSETTE_STOPPED,CASSETTE_MASK_UISTATE);
1594	1644	//m_irq_vector = 0x00;
1595		//machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	1645	//m_maincpu->set_input_line(0, ASSERT_LINE);
1596	1646	}
1597	1647
1598	1648	m_sys_latch = data;
1599	1649
1600	1650	m_timer_irq_mask = data & 1;
1601		//vram_bank_change(machine(),(m_ex_vram_bank & 0x06) | ((m_sys_latch & 0x06) << 4));
	1651	//vram_bank_change((m_ex_vram_bank & 0x06) | ((m_sys_latch & 0x06) << 4));
1602	1652
1603	1653	//printf("%02x B0\n",data);
1604	1654	}
r20911	r20912
1624	1674
1625	1675	if(0)
1626	1676	{
1627		UINT8 *gfx_data = memregion("gfx1")->base();
1628		UINT8 *ext_rom = memregion("cart_img")->base();
	1677	UINT8 *gfx_data = m_region_gfx1->base();
	1678	UINT8 *ext_rom = m_region_cart_img->base();
1629	1679
1630	1680	//printf("%02x\n",data);
1631	1681
1632	1682	if((data & 0x0f) == 0x05)
1633		membank("bank1")->set_base(&ext_rom[0x2000]);
	1683	m_bank1->set_base(&ext_rom[0x2000]);
1634	1684	if((data & 0x0f) == 0x04)
1635		membank("bank1")->set_base(&gfx_data[0]);
	1685	m_bank1->set_base(&gfx_data[0]);
1636	1686	}
1637	1687	}
1638	1688	m_ppi->write(space,offset,data);
r20911	r20912
1838	1888	PORT_BIT(0x00000020,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("STOP") PORT_CODE(KEYCODE_ESC)
1839	1889	INPUT_PORTS_END
1840	1890
1841		static UINT8 check_joy_press(running_machine &machine);
1842
1843	1891	INTERRUPT_GEN_MEMBER(pc6001_state::pc6001_interrupt)
1844	1892	{
1845		m_cur_keycode = check_joy_press(machine());
	1893	m_cur_keycode = check_joy_press();
1846	1894	if(IRQ_LOG) printf("Stick IRQ called 0x16\n");
1847	1895	m_irq_vector = 0x16;
1848	1896	device.execute().set_input_line(0, ASSERT_LINE);
r20911	r20912
1852	1900	{
1853	1901	m_kludge^= 1;
1854	1902
1855		m_cur_keycode = check_joy_press(machine());
	1903	m_cur_keycode = check_joy_press();
1856	1904	if(IRQ_LOG) printf("VRTC IRQ called 0x16\n");
1857	1905	m_irq_vector = (m_kludge) ? 0x22 : 0x16;
1858	1906	device.execute().set_input_line(0, ASSERT_LINE);
r20911	r20912
1932	1980	DEVCB_NULL
1933	1981	};
1934	1982
1935		static UINT8 check_keyboard_press(running_machine &machine)
	1983	UINT8 pc6001_state::check_keyboard_press()
1936	1984	{
1937		static const char *const portnames[3] = { "key1","key2","key3" };
	1985	ioport_port *ports[3] = { m_io_key1, m_io_key2, m_io_key3 };
1938	1986	int i,port_i,scancode;
1939	1987	UINT8 shift_pressed,caps_lock;
1940	1988	scancode = 0;
1941	1989
1942		shift_pressed = (machine.root_device().ioport("key_modifiers")->read() & 2)>>1;
1943		caps_lock = (machine.root_device().ioport("key_modifiers")->read() & 8)>>3;
	1990	shift_pressed = (m_io_key_modifiers->read() & 2)>>1;
	1991	caps_lock = (m_io_key_modifiers->read() & 8)>>3;
1944	1992
1945	1993	for(port_i=0;port_i<3;port_i++)
1946	1994	{
1947	1995	for(i=0;i<32;i++)
1948	1996	{
1949		if((machine.root_device().ioport(portnames[port_i])->read()>>i) & 1)
	1997	if((ports[port_i]->read()>>i) & 1)
1950	1998	{
1951	1999	if((shift_pressed != caps_lock) && scancode >= 0x41 && scancode <= 0x5f)
1952	2000	scancode+=0x20;
r20911	r20912
1975	2023	return 0;
1976	2024	}
1977	2025
1978		static UINT8 check_joy_press(running_machine &machine)
	2026	UINT8 pc6001_state::check_joy_press()
1979	2027	{
1980		UINT8 p1_key = machine.root_device().ioport("P1")->read() ^ 0xff;
1981		UINT8 shift_key = machine.root_device().ioport("key_modifiers")->read() & 0x02;
1982		UINT8 space_key = machine.root_device().ioport("key2")->read() & 0x01;
	2028	UINT8 p1_key = m_io_p1->read() ^ 0xff;
	2029	UINT8 shift_key = m_io_key_modifiers->read() & 0x02;
	2030	UINT8 space_key = m_io_key2->read() & 0x01;
1983	2031	UINT8 joy_press;
1984	2032
1985	2033	/*
r20911	r20912
2020	2068	#if 0
2021	2069	static UINT8 cas_data_i = 0x80,cas_data_poll;
2022	2070	//m_cur_keycode = gfx_data[m_cas_offset++];
2023		if((machine().device<cassette_image_device>(CASSETTE_TAG))->input() > 0.03)
	2071	if(m_cassette->input() > 0.03)
2024	2072	cas_data_poll|= cas_data_i;
2025	2073	else
2026	2074	cas_data_poll&=~cas_data_i;
r20911	r20912
2030	2078	cas_data_i = 0x80;
2031	2079	/* data ready, poll irq */
2032	2080	m_irq_vector = 0x08;
2033		machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	2081	m_maincpu->set_input_line(0, ASSERT_LINE);
2034	2082	}
2035	2083	else
2036	2084	cas_data_i>>=1;
2037	2085	#else
2038		UINT8 *cas_data = machine().root_device().memregion("cas")->base();
	2086	UINT8 *cas_data = m_region_cas->base();
2039	2087
2040	2088	m_cur_keycode = cas_data[m_cas_offset++];
2041	2089	popmessage("%04x %04x",m_cas_offset,m_cas_maxsize);
r20911	r20912
2045	2093	m_cas_switch = 0;
2046	2094	if(IRQ_LOG) printf("Tape-E IRQ 0x12\n");
2047	2095	m_irq_vector = 0x12;
2048		machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	2096	m_maincpu->set_input_line(0, ASSERT_LINE);
2049	2097	}
2050	2098	else
2051	2099	{
2052	2100	if(IRQ_LOG) printf("Tape-D IRQ 0x08\n");
2053	2101	m_irq_vector = 0x08;
2054		machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	2102	m_maincpu->set_input_line(0, ASSERT_LINE);
2055	2103	}
2056	2104	#endif
2057	2105	}
r20911	r20912
2059	2107
2060	2108	TIMER_DEVICE_CALLBACK_MEMBER(pc6001_state::keyboard_callback)
2061	2109	{
2062		address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2063		UINT32 key1 = machine().root_device().ioport("key1")->read();
2064		UINT32 key2 = machine().root_device().ioport("key2")->read();
2065		UINT32 key3 = machine().root_device().ioport("key3")->read();
2066		//  UINT8 p1_key = machine().root_device().ioport("P1")->read();
	2110	UINT32 key1 = m_io_key1->read();
	2111	UINT32 key2 = m_io_key2->read();
	2112	UINT32 key3 = m_io_key3->read();
	2113	//  UINT8 p1_key = m_io_p1->read();
2067	2114
2068	2115	if(m_cas_switch == 0)
2069	2116	{
2070	2117	if((key1 != m_old_key1) || (key2 != m_old_key2) || (key3 != m_old_key3))
2071	2118	{
2072		m_cur_keycode = check_keyboard_press(space.machine());
	2119	m_cur_keycode = check_keyboard_press();
2073	2120	if(IRQ_LOG) printf("KEY IRQ 0x02\n");
2074	2121	m_irq_vector = 0x02;
2075		machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	2122	m_maincpu->set_input_line(0, ASSERT_LINE);
2076	2123	m_old_key1 = key1;
2077	2124	m_old_key2 = key2;
2078	2125	m_old_key3 = key3;
r20911	r20912
2080	2127	#if 0
2081	2128	else /* joypad polling */
2082	2129	{
2083		m_cur_keycode = check_joy_press(space.machine());
	2130	m_cur_keycode = check_joy_press();
2084	2131	if(m_cur_keycode)
2085	2132	{
2086	2133	m_irq_vector = 0x16;
2087		machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	2134	m_maincpu->set_input_line(0, ASSERT_LINE);
2088	2135	}
2089	2136	}
2090	2137	#endif
r20911	r20912
2103	2150
2104	2151	void pc6001_state::machine_reset()
2105	2152	{
2106		UINT8 *work_ram = memregion("maincpu")->base();
	2153	UINT8 *work_ram = m_region_maincpu->base();
2107	2154
2108	2155	m_video_ram =  work_ram + 0xc000;
2109	2156
2110	2157	m_port_c_8255=0;
2111	2158
2112		machine().device("maincpu")->execute().set_irq_acknowledge_callback(pc6001_irq_callback);
	2159	m_maincpu->set_irq_acknowledge_callback(pc6001_irq_callback);
2113	2160	m_cas_switch = 0;
2114	2161	m_cas_offset = 0;
2115	2162	m_timer_irq_mask = 1;
r20911	r20912
2120	2167
2121	2168	MACHINE_RESET_MEMBER(pc6001_state,pc6001m2)
2122	2169	{
2123		UINT8 *work_ram = machine().root_device().memregion("maincpu")->base();
	2170	UINT8 *work_ram = m_region_maincpu->base();
2124	2171
2125	2172	m_video_ram = work_ram + 0xc000 + 0x28000;
2126	2173
2127	2174	m_port_c_8255=0;
2128	2175
2129		machine().device("maincpu")->execute().set_irq_acknowledge_callback(pc6001_irq_callback);
	2176	m_maincpu->set_irq_acknowledge_callback(pc6001_irq_callback);
2130	2177	m_cas_switch = 0;
2131	2178	m_cas_offset = 0;
2132	2179
2133	2180	/* set default bankswitch */
2134	2181	{
2135		UINT8 *ROM = memregion("maincpu")->base();
	2182	UINT8 *ROM = m_region_maincpu->base();
2136	2183	m_bank_r0 = 0x71;
2137		membank("bank1")->set_base(&ROM[BASICROM(0)]);
2138		membank("bank2")->set_base(&ROM[BASICROM(1)]);
2139		membank("bank3")->set_base(&ROM[EXROM(0)]);
2140		membank("bank4")->set_base(&ROM[EXROM(1)]);
	2184	m_bank1->set_base(&ROM[BASICROM(0)]);
	2185	m_bank2->set_base(&ROM[BASICROM(1)]);
	2186	m_bank3->set_base(&ROM[EXROM(0)]);
	2187	m_bank4->set_base(&ROM[EXROM(1)]);
2141	2188	m_bank_r1 = 0xdd;
2142		membank("bank5")->set_base(&ROM[WRAM(4)]);
2143		membank("bank6")->set_base(&ROM[WRAM(5)]);
2144		membank("bank7")->set_base(&ROM[WRAM(6)]);
2145		membank("bank8")->set_base(&ROM[WRAM(7)]);
	2189	m_bank5->set_base(&ROM[WRAM(4)]);
	2190	m_bank6->set_base(&ROM[WRAM(5)]);
	2191	m_bank7->set_base(&ROM[WRAM(6)]);
	2192	m_bank8->set_base(&ROM[WRAM(7)]);
2146	2193	m_bank_opt = 0x02; //tv rom
2147	2194	m_bank_w = 0x50; //enable write to work ram 4,5,6,7
2148	2195	m_gfx_bank_on = 0;
r20911	r20912
2155	2202
2156	2203	MACHINE_RESET_MEMBER(pc6001_state,pc6001sr)
2157	2204	{
2158		UINT8 *work_ram = machine().root_device().memregion("maincpu")->base();
	2205	UINT8 *work_ram = m_region_maincpu->base();
2159	2206
2160	2207	m_video_ram = work_ram + 0x70000;
2161	2208
2162	2209	m_port_c_8255=0;
2163	2210
2164		machine().device("maincpu")->execute().set_irq_acknowledge_callback(pc6001_irq_callback);
	2211	m_maincpu->set_irq_acknowledge_callback(pc6001_irq_callback);
2165	2212	m_cas_switch = 0;
2166	2213	m_cas_offset = 0;
2167	2214
2168	2215	/* set default bankswitch */
2169	2216	{
2170		UINT8 *ROM = memregion("maincpu")->base();
2171		m_sr_bank_r[0] = 0xf8; membank("bank1")->set_base(&ROM[SR_SYSROM_1(0x08)]);
2172		m_sr_bank_r[1] = 0xfa; membank("bank2")->set_base(&ROM[SR_SYSROM_1(0x0a)]);
2173		m_sr_bank_r[2] = 0xb0; membank("bank3")->set_base(&ROM[SR_EXROM1(0x00)]);
2174		m_sr_bank_r[3] = 0xc0; membank("bank4")->set_base(&ROM[SR_EXROM0(0x00)]);
2175		m_sr_bank_r[4] = 0x08; membank("bank5")->set_base(&ROM[SR_WRAM0(0x08)]);
2176		m_sr_bank_r[5] = 0x0a; membank("bank6")->set_base(&ROM[SR_WRAM0(0x0a)]);
2177		m_sr_bank_r[6] = 0x0c; membank("bank7")->set_base(&ROM[SR_WRAM0(0x0c)]);
2178		m_sr_bank_r[7] = 0x0e; membank("bank8")->set_base(&ROM[SR_WRAM0(0x0e)]);
	2217	UINT8 *ROM = m_region_maincpu->base();
	2218	m_sr_bank_r[0] = 0xf8; m_bank1->set_base(&ROM[SR_SYSROM_1(0x08)]);
	2219	m_sr_bank_r[1] = 0xfa; m_bank2->set_base(&ROM[SR_SYSROM_1(0x0a)]);
	2220	m_sr_bank_r[2] = 0xb0; m_bank3->set_base(&ROM[SR_EXROM1(0x00)]);
	2221	m_sr_bank_r[3] = 0xc0; m_bank4->set_base(&ROM[SR_EXROM0(0x00)]);
	2222	m_sr_bank_r[4] = 0x08; m_bank5->set_base(&ROM[SR_WRAM0(0x08)]);
	2223	m_sr_bank_r[5] = 0x0a; m_bank6->set_base(&ROM[SR_WRAM0(0x0a)]);
	2224	m_sr_bank_r[6] = 0x0c; m_bank7->set_base(&ROM[SR_WRAM0(0x0c)]);
	2225	m_sr_bank_r[7] = 0x0e; m_bank8->set_base(&ROM[SR_WRAM0(0x0e)]);
2179	2226	//      m_bank_opt = 0x02; //tv rom
2180	2227
2181	2228	/* enable default work RAM writes */
r20911	r20912
2264	2311
2265	2312	DEVICE_IMAGE_LOAD_MEMBER( pc6001_state,pc6001_cass )
2266	2313	{
2267		pc6001_state *state = image.device().machine().driver_data<pc6001_state>();
2268		UINT8 *cas = state->memregion("cas")->base();
	2314	UINT8 *cas = m_region_cas->base();
2269	2315	UINT32 size;
2270	2316
2271	2317	size = image.length();
r20911	r20912
2275	2321	return IMAGE_INIT_FAIL;
2276	2322	}
2277	2323
2278		state->m_cas_maxsize = size;
	2324	m_cas_maxsize = size;
2279	2325
2280	2326	return IMAGE_INIT_PASS;
2281	2327	}

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