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r20864 Saturday 9th February, 2013 at 13:37:18 UTC by Wilbert Pol
(MESS) pmd85.c: Reduce tagmap lookups (nw)

[src/mess/includes]	pmd85.h
[src/mess/machine]	pmd85.c
[src/mess/video]	pmd85.c

trunk/src/mess/machine/pmd85.c

r20863	r20864
10	10	***************************************************************************/
11	11
12	12	#include "emu.h"
13		#include "imagedev/cassette.h"
14	13	#include "cpu/i8085/i8085.h"
15		#include "machine/i8255.h"
16	14	#include "includes/pmd85.h"
17		#include "machine/i8251.h"
18	15	#include "machine/pit8253.h"
19		#include "machine/ram.h"
20	16
21	17
22
23	18	enum {PMD85_LED_1, PMD85_LED_2, PMD85_LED_3};
24	19	enum {PMD85_1, PMD85_2, PMD85_2A, PMD85_2B, PMD85_3, ALFA, MATO, C2717};
25	20
26	21
27	22
28		static void pmd851_update_memory(running_machine &machine)
	23	void pmd85_state::pmd851_update_memory()
29	24	{
30		pmd85_state *state = machine.driver_data<pmd85_state>();
31		address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM);
32		UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
	25	address_space& space = m_maincpu->space(AS_PROGRAM);
	26	UINT8 *ram = m_ram->pointer();
33	27
34		if (state->m_startup_mem_map)
	28	if (m_startup_mem_map)
35	29	{
36		UINT8 *mem = state->memregion("maincpu")->base();
	30	UINT8 *mem = m_region_maincpu->base();
37	31
38	32	space.unmap_write(0x0000, 0x0fff);
39	33	space.nop_write(0x1000, 0x1fff);
r20863	r20864
43	37	space.nop_read(0x1000, 0x1fff);
44	38	space.nop_read(0x3000, 0x3fff);
45	39
46		state->membank("bank1")->set_base(mem + 0x010000);
47		state->membank("bank3")->set_base(mem + 0x010000);
48		state->membank("bank5")->set_base(ram + 0xc000);
	40	m_bank1->set_base(mem + 0x010000);
	41	m_bank3->set_base(mem + 0x010000);
	42	m_bank5->set_base(ram + 0xc000);
49	43
50		state->membank("bank6")->set_base(mem + 0x010000);
51		state->membank("bank7")->set_base(mem + 0x010000);
52		state->membank("bank8")->set_base(ram + 0xc000);
	44	m_bank6->set_base(mem + 0x010000);
	45	m_bank7->set_base(mem + 0x010000);
	46	m_bank8->set_base(ram + 0xc000);
53	47	}
54	48	else
55	49	{
r20863	r20864
62	56	space.install_read_bank(0x1000, 0x1fff, "bank2");
63	57	space.install_read_bank(0x3000, 0x3fff, "bank4");
64	58
65		state->membank("bank1")->set_base(ram);
66		state->membank("bank2")->set_base(ram + 0x1000);
67		state->membank("bank3")->set_base(ram + 0x2000);
68		state->membank("bank4")->set_base(ram + 0x3000);
69		state->membank("bank5")->set_base(ram + 0x4000);
	59	m_bank1->set_base(ram);
	60	m_bank2->set_base(ram + 0x1000);
	61	m_bank3->set_base(ram + 0x2000);
	62	m_bank4->set_base(ram + 0x3000);
	63	m_bank5->set_base(ram + 0x4000);
70	64	}
71	65	}
72	66
73		static void pmd852a_update_memory(running_machine &machine)
	67	void pmd85_state::pmd852a_update_memory()
74	68	{
75		pmd85_state *state = machine.driver_data<pmd85_state>();
76		address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM);
77		UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
	69	address_space& space = m_maincpu->space(AS_PROGRAM);
	70	UINT8 *ram = m_ram->pointer();
78	71
79		if (state->m_startup_mem_map)
	72	if (m_startup_mem_map)
80	73	{
81		UINT8 *mem = state->memregion("maincpu")->base();
	74	UINT8 *mem = m_region_maincpu->base();
82	75
83	76	space.unmap_write(0x0000, 0x0fff);
84	77	space.unmap_write(0x2000, 0x2fff);
85	78
86		state->membank("bank1")->set_base(mem + 0x010000);
87		state->membank("bank2")->set_base(ram + 0x9000);
88		state->membank("bank3")->set_base(mem + 0x010000);
89		state->membank("bank4")->set_base(ram + 0xb000);
90		state->membank("bank5")->set_base(ram + 0xc000);
91		state->membank("bank6")->set_base(mem + 0x010000);
92		state->membank("bank7")->set_base(ram + 0x9000);
93		state->membank("bank8")->set_base(mem + 0x010000);
94		state->membank("bank9")->set_base(ram + 0xb000);
95		state->membank("bank10")->set_base(ram + 0xc000);
	79	m_bank1->set_base(mem + 0x010000);
	80	m_bank2->set_base(ram + 0x9000);
	81	m_bank3->set_base(mem + 0x010000);
	82	m_bank4->set_base(ram + 0xb000);
	83	m_bank5->set_base(ram + 0xc000);
	84	m_bank6->set_base(mem + 0x010000);
	85	m_bank7->set_base(ram + 0x9000);
	86	m_bank8->set_base(mem + 0x010000);
	87	m_bank9->set_base(ram + 0xb000);
	88	m_bank10->set_base(ram + 0xc000);
96	89
97	90	}
98	91	else
r20863	r20864
100	93	space.install_write_bank(0x0000, 0x0fff, "bank1");
101	94	space.install_write_bank(0x2000, 0x2fff, "bank3");
102	95
103		state->membank("bank1")->set_base(ram);
104		state->membank("bank2")->set_base(ram + 0x1000);
105		state->membank("bank3")->set_base(ram + 0x2000);
106		state->membank("bank4")->set_base(ram + 0x5000);
107		state->membank("bank5")->set_base(ram + 0x4000);
	96	m_bank1->set_base(ram);
	97	m_bank2->set_base(ram + 0x1000);
	98	m_bank3->set_base(ram + 0x2000);
	99	m_bank4->set_base(ram + 0x5000);
	100	m_bank5->set_base(ram + 0x4000);
108	101	}
109	102	}
110	103
111		static void pmd853_update_memory(running_machine &machine)
	104	void pmd85_state::pmd853_update_memory()
112	105	{
113		pmd85_state *state = machine.driver_data<pmd85_state>();
114		UINT8 *mem = state->memregion("maincpu")->base();
115		UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
	106	UINT8 *mem = m_region_maincpu->base();
	107	UINT8 *ram = m_ram->pointer();
116	108
117		if (state->m_startup_mem_map)
	109	if (m_startup_mem_map)
118	110	{
119		state->membank("bank1")->set_base(mem + 0x010000);
120		state->membank("bank2")->set_base(mem + 0x010000);
121		state->membank("bank3")->set_base(mem + 0x010000);
122		state->membank("bank4")->set_base(mem + 0x010000);
123		state->membank("bank5")->set_base(mem + 0x010000);
124		state->membank("bank6")->set_base(mem + 0x010000);
125		state->membank("bank7")->set_base(mem + 0x010000);
126		state->membank("bank8")->set_base(mem + 0x010000);
127		state->membank("bank9")->set_base(ram);
128		state->membank("bank10")->set_base(ram + 0x2000);
129		state->membank("bank11")->set_base(ram + 0x4000);
130		state->membank("bank12")->set_base(ram + 0x6000);
131		state->membank("bank13")->set_base(ram + 0x8000);
132		state->membank("bank14")->set_base(ram + 0xa000);
133		state->membank("bank15")->set_base(ram + 0xc000);
134		state->membank("bank16")->set_base(ram + 0xe000);
	111	m_bank1->set_base(mem + 0x010000);
	112	m_bank2->set_base(mem + 0x010000);
	113	m_bank3->set_base(mem + 0x010000);
	114	m_bank4->set_base(mem + 0x010000);
	115	m_bank5->set_base(mem + 0x010000);
	116	m_bank6->set_base(mem + 0x010000);
	117	m_bank7->set_base(mem + 0x010000);
	118	m_bank8->set_base(mem + 0x010000);
	119	m_bank9->set_base(ram);
	120	m_bank10->set_base(ram + 0x2000);
	121	m_bank11->set_base(ram + 0x4000);
	122	m_bank12->set_base(ram + 0x6000);
	123	m_bank13->set_base(ram + 0x8000);
	124	m_bank14->set_base(ram + 0xa000);
	125	m_bank15->set_base(ram + 0xc000);
	126	m_bank16->set_base(ram + 0xe000);
135	127	}
136	128	else
137	129	{
138		state->membank("bank1")->set_base(ram);
139		state->membank("bank2")->set_base(ram + 0x2000);
140		state->membank("bank3")->set_base(ram + 0x4000);
141		state->membank("bank4")->set_base(ram + 0x6000);
142		state->membank("bank5")->set_base(ram + 0x8000);
143		state->membank("bank6")->set_base(ram + 0xa000);
144		state->membank("bank7")->set_base(ram + 0xc000);
145		state->membank("bank8")->set_base(state->m_pmd853_memory_mapping ? mem + 0x010000 : ram + 0xe000);
	130	m_bank1->set_base(ram);
	131	m_bank2->set_base(ram + 0x2000);
	132	m_bank3->set_base(ram + 0x4000);
	133	m_bank4->set_base(ram + 0x6000);
	134	m_bank5->set_base(ram + 0x8000);
	135	m_bank6->set_base(ram + 0xa000);
	136	m_bank7->set_base(ram + 0xc000);
	137	m_bank8->set_base(m_pmd853_memory_mapping ? mem + 0x010000 : ram + 0xe000);
146	138	}
147	139	}
148	140
149		static void alfa_update_memory(running_machine &machine)
	141	void pmd85_state::alfa_update_memory()
150	142	{
151		pmd85_state *state = machine.driver_data<pmd85_state>();
152		address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM);
153		UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
	143	address_space& space = m_maincpu->space(AS_PROGRAM);
	144	UINT8 *ram = m_ram->pointer();
154	145
155		if (state->m_startup_mem_map)
	146	if (m_startup_mem_map)
156	147	{
157		UINT8 *mem = state->memregion("maincpu")->base();
	148	UINT8 *mem = m_region_maincpu->base();
158	149
159	150	space.unmap_write(0x0000, 0x0fff);
160	151	space.unmap_write(0x1000, 0x33ff);
161	152	space.nop_write(0x3400, 0x3fff);
162	153
163		state->membank("bank1")->set_base(mem + 0x010000);
164		state->membank("bank2")->set_base(mem + 0x011000);
165		state->membank("bank4")->set_base(ram + 0xc000);
166		state->membank("bank5")->set_base(mem + 0x010000);
167		state->membank("bank6")->set_base(mem + 0x011000);
168		state->membank("bank7")->set_base(ram + 0xc000);
	154	m_bank1->set_base(mem + 0x010000);
	155	m_bank2->set_base(mem + 0x011000);
	156	m_bank4->set_base(ram + 0xc000);
	157	m_bank5->set_base(mem + 0x010000);
	158	m_bank6->set_base(mem + 0x011000);
	159	m_bank7->set_base(ram + 0xc000);
169	160	}
170	161	else
171	162	{
r20863	r20864
173	164	space.install_write_bank(0x1000, 0x33ff, "bank2");
174	165	space.install_write_bank(0x3400, 0x3fff, "bank3");
175	166
176		state->membank("bank1")->set_base(ram);
177		state->membank("bank2")->set_base(ram + 0x1000);
178		state->membank("bank3")->set_base(ram + 0x3400);
179		state->membank("bank4")->set_base(ram + 0x4000);
	167	m_bank1->set_base(ram);
	168	m_bank2->set_base(ram + 0x1000);
	169	m_bank3->set_base(ram + 0x3400);
	170	m_bank4->set_base(ram + 0x4000);
180	171	}
181	172	}
182	173
183		static void mato_update_memory(running_machine &machine)
	174	void pmd85_state::mato_update_memory()
184	175	{
185		pmd85_state *state = machine.driver_data<pmd85_state>();
186		address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM);
187		UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
	176	address_space& space = m_maincpu->space(AS_PROGRAM);
	177	UINT8 *ram = m_ram->pointer();
188	178
189		if (state->m_startup_mem_map)
	179	if (m_startup_mem_map)
190	180	{
191		UINT8 *mem = state->memregion("maincpu")->base();
	181	UINT8 *mem = m_region_maincpu->base();
192	182
193	183	space.unmap_write(0x0000, 0x3fff);
194	184
195		state->membank("bank1")->set_base(mem + 0x010000);
196		state->membank("bank2")->set_base(ram + 0xc000);
197		state->membank("bank3")->set_base(mem + 0x010000);
198		state->membank("bank4")->set_base(ram + 0xc000);
	185	m_bank1->set_base(mem + 0x010000);
	186	m_bank2->set_base(ram + 0xc000);
	187	m_bank3->set_base(mem + 0x010000);
	188	m_bank4->set_base(ram + 0xc000);
199	189	}
200	190	else
201	191	{
202	192	space.install_write_bank(0x0000, 0x3fff, "bank1");
203	193
204		state->membank("bank1")->set_base(ram);
205		state->membank("bank2")->set_base(ram + 0x4000);
	194	m_bank1->set_base(ram);
	195	m_bank2->set_base(ram + 0x4000);
206	196	}
207	197	}
208	198
209		static void c2717_update_memory(running_machine &machine)
	199	void pmd85_state::c2717_update_memory()
210	200	{
211		pmd85_state *state = machine.driver_data<pmd85_state>();
212		address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM);
213		UINT8 *mem = state->memregion("maincpu")->base();
214		UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
	201	address_space& space = m_maincpu->space(AS_PROGRAM);
	202	UINT8 *mem = m_region_maincpu->base();
	203	UINT8 *ram = m_ram->pointer();
215	204
216		if (state->m_startup_mem_map)
	205	if (m_startup_mem_map)
217	206	{
218	207	space.unmap_write(0x0000, 0x3fff);
219	208
220		state->membank("bank1")->set_base(mem + 0x010000);
221		state->membank("bank2")->set_base(ram + 0x4000);
222		state->membank("bank3")->set_base(mem + 0x010000);
223		state->membank("bank4")->set_base(ram + 0xc000);
	209	m_bank1->set_base(mem + 0x010000);
	210	m_bank2->set_base(ram + 0x4000);
	211	m_bank3->set_base(mem + 0x010000);
	212	m_bank4->set_base(ram + 0xc000);
224	213	}
225	214	else
226	215	{
227	216	space.install_write_bank(0x0000, 0x3fff, "bank1");
228		state->membank("bank1")->set_base(ram);
229		state->membank("bank2")->set_base(ram + 0x4000);
	217	m_bank1->set_base(ram);
	218	m_bank2->set_base(ram + 0x4000);
230	219	}
231	220	}
232	221
r20863	r20864
245	234
246	235	READ8_MEMBER(pmd85_state::pmd85_ppi_0_portb_r)
247	236	{
248		static const char *const keynames[] = {
249		"KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5", "KEY6", "KEY7",
250		"KEY8", "KEY9", "KEY10", "KEY11", "KEY12", "KEY13", "KEY14", "KEY15"
251		};
252
253		return machine().root_device().ioport(keynames[(m_ppi_port_outputs[0][0] & 0x0f)])->read() & machine().root_device().ioport("KEY15")->read();
	237	return m_io_port[(m_ppi_port_outputs[0][0] & 0x0f)]->read() & m_io_port[15]->read();
254	238	}
255	239
256	240	READ8_MEMBER(pmd85_state::pmd85_ppi_0_portc_r)
r20863	r20864
287	271	{
288	272	int i;
289	273	UINT8 data = 0xff;
290		static const char *const keynames[] = { "KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5", "KEY6", "KEY7" };
291	274
292	275	for (i = 0; i < 8; i++)
293	276	{
294	277	if (!BIT(m_ppi_port_outputs[0][0], i))
295		data &= machine().root_device().ioport(keynames[i])->read();
	278	data &= m_io_port[i]->read();
296	279	}
297	280	return data;
298	281	}
299	282
300	283	READ8_MEMBER(pmd85_state::mato_ppi_0_portc_r)
301	284	{
302		return machine().root_device().ioport("KEY8")->read() | 0x8f;
	285	return m_io_port[8]->read() | 0x8f;
303	286	}
304	287
305	288	WRITE8_MEMBER(pmd85_state::mato_ppi_0_portc_w)
r20863	r20864
502	485
503	486	READ8_MEMBER(pmd85_state::pmd85_io_r)
504	487	{
505		i8251_device *uart = machine().device<i8251_device>("uart");
506	488	if (m_startup_mem_map)
507	489	{
508	490	return 0xff;
r20863	r20864
514	496	switch (offset & 0x80)
515	497	{
516	498	case 0x80:  /* Motherboard 8255 */
517		return machine().device<i8255_device>("ppi8255_0")->read(space, offset & 0x03);
	499	return m_ppi8255_0->read(space, offset & 0x03);
518	500	}
519	501	break;
520	502	case 0x08:  /* ROM module connector */
r20863	r20864
530	512	switch (offset & 0x80)
531	513	{
532	514	case 0x80:  /* ROM module 8255 */
533		return machine().device<i8255_device>("ppi8255_3")->read(space, offset & 0x03);
	515	return m_ppi8255_3->read(space, offset & 0x03);
534	516	}
535	517	}
536	518	break;
r20863	r20864
545	527	case 0x10:  /* 8251 (casette recorder, V24) */
546	528	switch (offset & 0x01)
547	529	{
548		case 0x00: return uart->data_r(space, offset & 0x01);
549		case 0x01: return uart->status_r(space, offset & 0x01);
	530	case 0x00: return m_uart->data_r(space, offset & 0x01);
	531	case 0x01: return m_uart->status_r(space, offset & 0x01);
550	532	}
551	533	break;
552	534	case 0x40:      /* 8255 (GPIO/0, GPIO/1) */
553		return machine().device<i8255_device>("ppi8255_1")->read(space, offset & 0x03);
	535	return m_ppi8255_1->read(space, offset & 0x03);
554	536	case 0x50:  /* 8253 */
555		return pit8253_r( machine().device("pit8253"), space, offset & 0x03);
	537	return pit8253_r( m_pit8253, space, offset & 0x03);
556	538	case 0x70:  /* 8255 (IMS-2) */
557		return machine().device<i8255_device>("ppi8255_2")->read(space, offset & 0x03);
	539	return m_ppi8255_2->read(space, offset & 0x03);
558	540	}
559	541	break;
560	542	case 0x80:  /* external interfaces */
r20863	r20864
569	551
570	552	WRITE8_MEMBER(pmd85_state::pmd85_io_w)
571	553	{
572		i8251_device *uart = machine().device<i8251_device>("uart");
573	554	if (m_startup_mem_map)
574	555	{
575	556	m_startup_mem_map = 0;
576		(*update_memory)(machine());
	557	(this->*update_memory)();
577	558	}
578	559
579	560	switch (offset & 0x0c)
r20863	r20864
582	563	switch (offset & 0x80)
583	564	{
584	565	case 0x80:  /* Motherboard 8255 */
585		machine().device<i8255_device>("ppi8255_0")->write(space, offset & 0x03, data);
	566	m_ppi8255_0->write(space, offset & 0x03, data);
586	567	/* PMD-85.3 memory banking */
587	568	if ((offset & 0x03) == 0x03)
588	569	{
589	570	m_pmd853_memory_mapping = data & 0x01;
590		(*update_memory)(machine());
	571	(this->*update_memory)();
591	572	}
592	573	break;
593	574	}
r20863	r20864
605	586	switch (offset & 0x80)
606	587	{
607	588	case 0x80:  /* ROM module 8255 */
608		machine().device<i8255_device>("ppi8255_3")->write(space, offset & 0x03, data);
	589	m_ppi8255_3->write(space, offset & 0x03, data);
609	590	break;
610	591	}
611	592	}
r20863	r20864
621	602	case 0x10:  /* 8251 (casette recorder, V24) */
622	603	switch (offset & 0x01)
623	604	{
624		case 0x00: uart->data_w(space, offset & 0x01, data); break;
625		case 0x01: uart->control_w(space, offset & 0x01, data); break;
	605	case 0x00: m_uart->data_w(space, offset & 0x01, data); break;
	606	case 0x01: m_uart->control_w(space, offset & 0x01, data); break;
626	607	}
627	608	break;
628	609	case 0x40:      /* 8255 (GPIO/0, GPIO/0) */
629		machine().device<i8255_device>("ppi8255_1")->write(space, offset & 0x03, data);
	610	m_ppi8255_1->write(space, offset & 0x03, data);
630	611	break;
631	612	case 0x50:  /* 8253 */
632		pit8253_w(machine().device("pit8253"), space, offset & 0x03, data);
	613	pit8253_w(m_pit8253, space, offset & 0x03, data);
633	614	logerror ("8253 writing. Address: %02x, Data: %02x\n", offset, data);
634	615	break;
635	616	case 0x70:  /* 8255 (IMS-2) */
636		machine().device<i8255_device>("ppi8255_2")->write(space, offset & 0x03, data);
	617	m_ppi8255_2->write(space, offset & 0x03, data);
637	618	break;
638	619	}
639	620	break;
r20863	r20864
667	648	switch (offset & 0x80)
668	649	{
669	650	case 0x80:  /* Motherboard 8255 */
670		return machine().device<i8255_device>("ppi8255_0")->read(space, offset & 0x03);
	651	return m_ppi8255_0->read(space, offset & 0x03);
671	652	}
672	653	break;
673	654	}
r20863	r20864
681	662	if (m_startup_mem_map)
682	663	{
683	664	m_startup_mem_map = 0;
684		(*update_memory)(machine());
	665	(this->*update_memory)();
685	666	}
686	667
687	668	switch (offset & 0x0c)
r20863	r20864
690	671	switch (offset & 0x80)
691	672	{
692	673	case 0x80:  /* Motherboard 8255 */
693		return machine().device<i8255_device>("ppi8255_0")->write(space, offset & 0x03, data);
	674	return m_ppi8255_0->write(space, offset & 0x03, data);
694	675	}
695	676	break;
696	677	}
r20863	r20864
773	754
774	755	TIMER_CALLBACK_MEMBER(pmd85_state::pmd85_cassette_timer_callback)
775	756	{
776		i8251_device *uart = machine().device<i8251_device>("uart");
777		serial_source_device *ser = machine().device<serial_source_device>("sercas");
778	757	int data;
779	758	int current_level;
780	759
781		if (!(machine().root_device().ioport("DSW0")->read() & 0x02))   /* V.24 / Tape Switch */
	760	if (!(m_io_dsw0->read() & 0x02))   /* V.24 / Tape Switch */
782	761	{
783	762	/* tape reading */
784		if (machine().device<cassette_image_device>(CASSETTE_TAG)->get_state()&CASSETTE_PLAY)
	763	if (m_cassette->get_state()&CASSETTE_PLAY)
785	764	{
786	765	switch (m_model)
787	766	{
788	767	case PMD85_1:
789	768	if (m_clk_level_tape)
790	769	{
791		m_previous_level = ((machine().device<cassette_image_device>(CASSETTE_TAG))->input() > 0.038) ? 1 : 0;
	770	m_previous_level = (m_cassette->input() > 0.038) ? 1 : 0;
792	771	m_clk_level_tape = 0;
793	772	}
794	773	else
795	774	{
796		current_level = ((machine().device<cassette_image_device>(CASSETTE_TAG))->input() > 0.038) ? 1 : 0;
	775	current_level = (m_cassette->input() > 0.038) ? 1 : 0;
797	776
798	777	if (m_previous_level!=current_level)
799	778	{
800	779	data = (!m_previous_level && current_level) ? 1 : 0;
801	780
802		ser->send_bit(data);
803		uart->receive_clock();
	781	m_sercas->send_bit(data);
	782	m_uart->receive_clock();
804	783
805	784	m_clk_level_tape = 1;
806	785	}
r20863	r20864
817	796	}
818	797
819	798	/* tape writing */
820		if (machine().device<cassette_image_device>(CASSETTE_TAG)->get_state()&CASSETTE_RECORD)
	799	if (m_cassette->get_state()&CASSETTE_RECORD)
821	800	{
822		data = ser->get_in_data_bit();
	801	data = m_sercas->get_in_data_bit();
823	802	data ^= m_clk_level_tape;
824		machine().device<cassette_image_device>(CASSETTE_TAG)->output(data&0x01 ? 1 : -1);
	803	m_cassette->output(data&0x01 ? 1 : -1);
825	804
826	805	if (!m_clk_level_tape)
827		uart->transmit_clock();
	806	m_uart->transmit_clock();
828	807
829	808	m_clk_level_tape = m_clk_level_tape ? 0 : 1;
830	809
r20863	r20864
834	813	m_clk_level_tape = 1;
835	814
836	815	if (!m_clk_level)
837		uart->transmit_clock();
	816	m_uart->transmit_clock();
838	817	m_clk_level = m_clk_level ? 0 : 1;
839	818	}
840	819	}
r20863	r20864
846	825
847	826	DIRECT_UPDATE_MEMBER(pmd85_state::pmd85_opbaseoverride)
848	827	{
849		if (ioport("RESET")->read() & 0x01)
	828	if (m_io_reset->read() & 0x01)
850	829	machine().scheduler().timer_set(attotime::from_usec(10), timer_expired_delegate(FUNC(pmd85_state::pmd_reset),this));
851	830	return address;
852	831	}
853	832
854		static void pmd85_common_driver_init (running_machine &machine)
	833	void pmd85_state::pmd85_common_driver_init()
855	834	{
856		pmd85_state *state = machine.driver_data<pmd85_state>();
857		state->m_previous_level = 0;
858		state->m_clk_level = state->m_clk_level_tape = 1;
859		state->m_cassette_timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(pmd85_state::pmd85_cassette_timer_callback),state));
860		state->m_cassette_timer->adjust(attotime::zero, 0, attotime::from_hz(2400));
	835	static const char *const keynames[] = {
	836	"KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5", "KEY6", "KEY7",
	837	"KEY8", "KEY9", "KEY10", "KEY11", "KEY12", "KEY13", "KEY14", "KEY15"
	838	};
	839
	840	for ( int i = 0; i < 16; i++ )
	841	{
	842	m_io_port[i] = ioport( keynames[i] );
	843	}
	844
	845	m_previous_level = 0;
	846	m_clk_level = m_clk_level_tape = 1;
	847	m_cassette_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pmd85_state::pmd85_cassette_timer_callback),this));
	848	m_cassette_timer->adjust(attotime::zero, 0, attotime::from_hz(2400));
861	849	}
862	850
863	851	DRIVER_INIT_MEMBER(pmd85_state,pmd851)
864	852	{
865	853	m_model = PMD85_1;
866		update_memory = pmd851_update_memory;
867		pmd85_common_driver_init(machine());
	854	update_memory = &pmd85_state::pmd851_update_memory;
	855	pmd85_common_driver_init();
868	856	}
869	857
870	858	DRIVER_INIT_MEMBER(pmd85_state,pmd852a)
871	859	{
872	860	m_model = PMD85_2A;
873		update_memory = pmd852a_update_memory;
874		pmd85_common_driver_init(machine());
	861	update_memory = &pmd85_state::pmd852a_update_memory;
	862	pmd85_common_driver_init();
875	863	}
876	864
877	865	DRIVER_INIT_MEMBER(pmd85_state,pmd853)
878	866	{
879	867	m_model = PMD85_3;
880		update_memory = pmd853_update_memory;
881		pmd85_common_driver_init(machine());
	868	update_memory = &pmd85_state::pmd853_update_memory;
	869	pmd85_common_driver_init();
882	870	}
883	871
884	872	DRIVER_INIT_MEMBER(pmd85_state,alfa)
885	873	{
886	874	m_model = ALFA;
887		update_memory = alfa_update_memory;
888		pmd85_common_driver_init(machine());
	875	update_memory = &pmd85_state::alfa_update_memory;
	876	pmd85_common_driver_init();
889	877	}
890	878
891	879	DRIVER_INIT_MEMBER(pmd85_state,mato)
892	880	{
893	881	m_model = MATO;
894		update_memory = mato_update_memory;
	882	update_memory = &pmd85_state::mato_update_memory;
	883
	884	static const char *const keynames[] = {
	885	"KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5", "KEY6", "KEY7", "KEY8"
	886	};
	887
	888	for ( int i = 0; i < 9; i++ )
	889	{
	890	m_io_port[i] = ioport( keynames[i] );
	891	}
	892	for ( int i = 9; i < 16; i++ )
	893	{
	894	m_io_port[i] = NULL;
	895	}
895	896	}
896	897
897	898	DRIVER_INIT_MEMBER(pmd85_state,c2717)
898	899	{
899	900	m_model = C2717;
900		update_memory = c2717_update_memory;
901		pmd85_common_driver_init(machine());
	901	update_memory = &pmd85_state::c2717_update_memory;
	902	pmd85_common_driver_init();
902	903	}
903	904
904	905	TIMER_CALLBACK_MEMBER(pmd85_state::setup_machine_state)
905	906	{
906	907	if (m_model != MATO)
907	908	{
908		i8251_device *uart = machine().device<i8251_device>("uart");
909		serial_source_device *ser = machine().device<serial_source_device>("sercas");
910		uart->connect(ser);
	909	m_uart->connect(m_sercas);
911	910	}
912	911	}
913	912
r20863	r20864
923	922	case PMD85_2A:
924	923	case PMD85_3:
925	924	case C2717:
926		m_rom_module_present = (machine().root_device().ioport("DSW0")->read() & 0x01) ? 1 : 0;
	925	m_rom_module_present = (m_io_dsw0->read() & 0x01) ? 1 : 0;
927	926	break;
928	927	case ALFA:
929	928	case MATO:
r20863	r20864
935	934	m_ppi_port_outputs[i][j] = 0;
936	935
937	936	/* memory initialization */
938		memset(machine().device<ram_device>(RAM_TAG)->pointer(), 0, sizeof(unsigned char)*0x10000);
	937	memset(m_ram->pointer(), 0, sizeof(unsigned char)*0x10000);
939	938	m_pmd853_memory_mapping = 1;
940	939	m_startup_mem_map = 1;
941		update_memory(machine());
	940	(this->*update_memory)();
942	941
943	942	machine().scheduler().timer_set(attotime::zero, timer_expired_delegate(FUNC(pmd85_state::setup_machine_state),this));
944	943
945		machine().device("maincpu")->memory().space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(pmd85_state::pmd85_opbaseoverride), this));
	944	m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(pmd85_state::pmd85_opbaseoverride), this));
946	945	}

trunk/src/mess/includes/pmd85.h

r20863	r20864
7	7	#ifndef PMD85_H_
8	8	#define PMD85_H_
9	9
	10	#include "machine/i8251.h"
10	11	#include "machine/i8255.h"
	12	#include "imagedev/cassette.h"
	13	#include "machine/ram.h"
11	14
	15
12	16	class pmd85_state : public driver_device
13	17	{
14	18	public:
15	19	pmd85_state(const machine_config &mconfig, device_type type, const char *tag)
16		: driver_device(mconfig, type, tag) { }
	20	: driver_device(mconfig, type, tag)
	21	, m_maincpu(*this, "maincpu")
	22	, m_ram(*this, RAM_TAG)
	23	, m_cassette(*this, CASSETTE_TAG)
	24	, m_sercas(*this, "sercas")
	25	, m_pit8253(*this, "pit8253")
	26	, m_uart(*this, "uart")
	27	, m_ppi8255_0(*this, "ppi8255_0")
	28	, m_ppi8255_1(*this, "ppi8255_1")
	29	, m_ppi8255_2(*this, "ppi8255_2")
	30	, m_ppi8255_3(*this, "ppi8255_3")
	31	, m_region_maincpu(*this, "maincpu")
	32	, m_bank1(*this, "bank1")
	33	, m_bank2(*this, "bank2")
	34	, m_bank3(*this, "bank3")
	35	, m_bank4(*this, "bank4")
	36	, m_bank5(*this, "bank5")
	37	, m_bank6(*this, "bank6")
	38	, m_bank7(*this, "bank7")
	39	, m_bank8(*this, "bank8")
	40	, m_bank9(*this, "bank9")
	41	, m_bank10(*this, "bank10")
	42	, m_bank11(*this, "bank11")
	43	, m_bank12(*this, "bank12")
	44	, m_bank13(*this, "bank13")
	45	, m_bank14(*this, "bank14")
	46	, m_bank15(*this, "bank15")
	47	, m_bank16(*this, "bank16")
	48	, m_io_reset(*this, "RESET")
	49	, m_io_dsw0(*this, "DSW0")
	50	{ }
17	51
18	52	UINT8 m_rom_module_present;
19	53	UINT8 m_ppi_port_outputs[4][3];
r20863	r20864
24	58	int m_clk_level_tape;
25	59	UINT8 m_model;
26	60	emu_timer * m_cassette_timer;
27		void (*update_memory)(running_machine &);
	61	void (pmd85_state::*update_memory)();
28	62	DECLARE_READ8_MEMBER(pmd85_io_r);
29	63	DECLARE_WRITE8_MEMBER(pmd85_io_w);
30	64	DECLARE_READ8_MEMBER(mato_io_r);
r20863	r20864
70	104	DECLARE_WRITE8_MEMBER(pmd85_ppi_3_porta_w);
71	105	DECLARE_WRITE8_MEMBER(pmd85_ppi_3_portb_w);
72	106	DECLARE_WRITE8_MEMBER(pmd85_ppi_3_portc_w);
	107
	108	protected:
	109	required_device<cpu_device> m_maincpu;
	110	required_device<ram_device> m_ram;
	111	required_device<cassette_image_device> m_cassette;
	112	required_device<serial_source_device> m_sercas;
	113	required_device<device_t> m_pit8253;
	114	optional_device<i8251_device> m_uart;
	115	optional_device<i8255_device> m_ppi8255_0;
	116	optional_device<i8255_device> m_ppi8255_1;
	117	optional_device<i8255_device> m_ppi8255_2;
	118	optional_device<i8255_device> m_ppi8255_3;
	119	required_memory_region m_region_maincpu;
	120	required_memory_bank m_bank1;
	121	required_memory_bank m_bank2;
	122	required_memory_bank m_bank3;
	123	required_memory_bank m_bank4;
	124	optional_memory_bank m_bank5;
	125	optional_memory_bank m_bank6;
	126	optional_memory_bank m_bank7;
	127	optional_memory_bank m_bank8;
	128	optional_memory_bank m_bank9;
	129	optional_memory_bank m_bank10;
	130	optional_memory_bank m_bank11;
	131	optional_memory_bank m_bank12;
	132	optional_memory_bank m_bank13;
	133	optional_memory_bank m_bank14;
	134	optional_memory_bank m_bank15;
	135	optional_memory_bank m_bank16;
	136	required_ioport m_io_reset;
	137	optional_ioport m_io_dsw0;
	138	ioport_port *m_io_port[16];
	139
	140	void pmd851_update_memory();
	141	void pmd852a_update_memory();
	142	void pmd853_update_memory();
	143	void alfa_update_memory();
	144	void mato_update_memory();
	145	void c2717_update_memory();
	146	void pmd85_common_driver_init();
	147	void pmd85_draw_scanline(bitmap_ind16 &bitmap, int pmd85_scanline);
73	148	};
74	149
75	150

trunk/src/mess/video/pmd85.c

r20863	r20864
10	10
11	11	#include "emu.h"
12	12	#include "includes/pmd85.h"
13		#include "machine/ram.h"
14	13
15	14	const unsigned char pmd85_palette[3*3] =
16	15	{
r20863	r20864
32	31	{
33	32	}
34	33
35		static void pmd85_draw_scanline(running_machine &machine,bitmap_ind16 &bitmap, int pmd85_scanline)
	34	void pmd85_state::pmd85_draw_scanline(bitmap_ind16 &bitmap, int pmd85_scanline)
36	35	{
37	36	int x, i;
38	37	int pen0, pen1;
r20863	r20864
42	41	UINT16 *scanline = &bitmap.pix16(pmd85_scanline);
43	42
44	43	/* address of current line in PMD-85 video memory */
45		UINT8* pmd85_video_ram_line = machine.device<ram_device>(RAM_TAG)->pointer() + 0xc000 + 0x40*pmd85_scanline;
	44	UINT8* pmd85_video_ram_line = m_ram->pointer() + 0xc000 + 0x40*pmd85_scanline;
46	45
47	46	for (x=0; x<288; x+=6)
48	47	{
r20863	r20864
61	60	int pmd85_scanline;
62	61
63	62	for (pmd85_scanline=0; pmd85_scanline<256; pmd85_scanline++)
64		pmd85_draw_scanline (machine(),bitmap, pmd85_scanline);
	63	{
	64	pmd85_draw_scanline(bitmap, pmd85_scanline);
	65	}
65	66	return 0;
66	67	}

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