trunk/src/mess/machine/bbc.c
| r20849 | r20850 | |
| 37 | 37 | /* for the model A just address the 4 on board ROM sockets */ |
| 38 | 38 | WRITE8_MEMBER(bbc_state::bbc_page_selecta_w) |
| 39 | 39 | { |
| 40 | | membank("bank4")->set_base(machine().root_device().memregion("user1")->base()+((data&0x03)<<14)); |
| 40 | membank("bank4")->set_base(m_region_user1->base()+((data&0x03)<<14)); |
| 41 | 41 | } |
| 42 | 42 | |
| 43 | 43 | |
| 44 | 44 | WRITE8_MEMBER(bbc_state::bbc_memorya1_w) |
| 45 | 45 | { |
| 46 | | memregion("maincpu")->base()[offset]=data; |
| 46 | m_region_maincpu->base()[offset]=data; |
| 47 | 47 | } |
| 48 | 48 | |
| 49 | 49 | /************************* |
| r20849 | r20850 | |
| 57 | 57 | m_rombank=data&0x0f; |
| 58 | 58 | if (m_rombank!=1) |
| 59 | 59 | { |
| 60 | | membank("bank4")->set_base(machine().root_device().memregion("user1")->base() + (m_rombank << 14)); |
| 60 | membank("bank4")->set_base(m_region_user1->base() + (m_rombank << 14)); |
| 61 | 61 | } |
| 62 | 62 | else |
| 63 | 63 | { |
| 64 | | membank("bank4")->set_base(machine().root_device().memregion("user2")->base() + ((m_DFSType) << 14)); |
| 64 | membank("bank4")->set_base(m_region_user2->base() + ((m_DFSType) << 14)); |
| 65 | 65 | } |
| 66 | 66 | } |
| 67 | 67 | |
| r20849 | r20850 | |
| 70 | 70 | { |
| 71 | 71 | if (m_RAMSize) |
| 72 | 72 | { |
| 73 | | memregion("maincpu")->base()[offset + 0x4000] = data; |
| 73 | m_region_maincpu->base()[offset + 0x4000] = data; |
| 74 | 74 | } |
| 75 | 75 | else |
| 76 | 76 | { |
| 77 | | memregion("maincpu")->base()[offset] = data; |
| 77 | m_region_maincpu->base()[offset] = data; |
| 78 | 78 | } |
| 79 | 79 | |
| 80 | 80 | } |
| r20849 | r20850 | |
| 94 | 94 | if (m_rombank == 1) |
| 95 | 95 | { |
| 96 | 96 | // special DFS case for Acorn DFS E00 Hack that can write to the DFS RAM Bank; |
| 97 | | if (m_DFSType == 3) memregion("user2")->base()[((m_DFSType) << 14) + offset] = data; |
| 97 | if (m_DFSType == 3) m_region_user2->base()[((m_DFSType) << 14) + offset] = data; |
| 98 | 98 | } else |
| 99 | 99 | { |
| 100 | 100 | switch (m_SWRAMtype) |
| 101 | 101 | { |
| 102 | | case 1: if (bbc_SWRAMtype1[m_userport]) memregion("user1")->base()[(m_userport << 14) + offset] = data; |
| 103 | | case 2: if (bbc_SWRAMtype2[m_rombank]) memregion("user1")->base()[(m_rombank << 14) + offset] = data; |
| 104 | | case 3: if (bbc_SWRAMtype3[m_rombank]) memregion("user1")->base()[(m_rombank << 14) + offset] = data; |
| 102 | case 1: if (bbc_SWRAMtype1[m_userport]) m_region_user1->base()[(m_userport << 14) + offset] = data; |
| 103 | case 2: if (bbc_SWRAMtype2[m_rombank]) m_region_user1->base()[(m_rombank << 14) + offset] = data; |
| 104 | case 3: if (bbc_SWRAMtype3[m_rombank]) m_region_user1->base()[(m_rombank << 14) + offset] = data; |
| 105 | 105 | } |
| 106 | 106 | } |
| 107 | 107 | } |
| r20849 | r20850 | |
| 138 | 138 | if (m_pagedRAM) |
| 139 | 139 | { |
| 140 | 140 | /* if paged ram then set 8000 to afff to read from the ram 8000 to afff */ |
| 141 | | membank("bank4")->set_base(machine().root_device().memregion("maincpu")->base() + 0x8000); |
| 141 | membank("bank4")->set_base(m_region_maincpu->base() + 0x8000); |
| 142 | 142 | } |
| 143 | 143 | else |
| 144 | 144 | { |
| 145 | 145 | /* if paged rom then set the rom to be read from 8000 to afff */ |
| 146 | | membank("bank4")->set_base(machine().root_device().memregion("user1")->base() + (m_rombank << 14)); |
| 146 | membank("bank4")->set_base(m_region_user1->base() + (m_rombank << 14)); |
| 147 | 147 | }; |
| 148 | 148 | |
| 149 | 149 | /* set the rom to be read from b000 to bfff */ |
| r20849 | r20850 | |
| 155 | 155 | m_vdusel=(data>>7)&0x01; |
| 156 | 156 | bbcbp_setvideoshadow(machine(), m_vdusel); |
| 157 | 157 | //need to make the video display do a full screen refresh for the new memory area |
| 158 | | membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base()+0x3000); |
| 158 | membank("bank2")->set_base(m_region_maincpu->base()+0x3000); |
| 159 | 159 | } |
| 160 | 160 | } |
| 161 | 161 | |
| r20849 | r20850 | |
| 166 | 166 | |
| 167 | 167 | WRITE8_MEMBER(bbc_state::bbc_memorybp1_w) |
| 168 | 168 | { |
| 169 | | memregion("maincpu")->base()[offset]=data; |
| 169 | m_region_maincpu->base()[offset]=data; |
| 170 | 170 | } |
| 171 | 171 | |
| 172 | 172 | |
| r20849 | r20850 | |
| 182 | 182 | |
| 183 | 183 | DIRECT_UPDATE_MEMBER(bbc_state::bbcbp_direct_handler) |
| 184 | 184 | { |
| 185 | | UINT8 *ram = memregion("maincpu")->base(); |
| 185 | UINT8 *ram = m_region_maincpu->base(); |
| 186 | 186 | if (m_vdusel == 0) |
| 187 | 187 | { |
| 188 | 188 | // not in shadow ram mode so just read normal ram |
| r20849 | r20850 | |
| 207 | 207 | |
| 208 | 208 | WRITE8_MEMBER(bbc_state::bbc_memorybp2_w) |
| 209 | 209 | { |
| 210 | | UINT8 *ram = memregion("maincpu")->base(); |
| 210 | UINT8 *ram = m_region_maincpu->base(); |
| 211 | 211 | if (m_vdusel==0) |
| 212 | 212 | { |
| 213 | 213 | // not in shadow ram mode so just write to normal ram |
| r20849 | r20850 | |
| 235 | 235 | { |
| 236 | 236 | if (m_pagedRAM) |
| 237 | 237 | { |
| 238 | | memregion("maincpu")->base()[offset+0x8000]=data; |
| 238 | m_region_maincpu->base()[offset+0x8000]=data; |
| 239 | 239 | } |
| 240 | 240 | } |
| 241 | 241 | |
| r20849 | r20850 | |
| 255 | 255 | { |
| 256 | 256 | if (m_pagedRAM) |
| 257 | 257 | { |
| 258 | | memregion("maincpu")->base()[offset+0x8000]=data; |
| 258 | m_region_maincpu->base()[offset+0x8000]=data; |
| 259 | 259 | } |
| 260 | 260 | else |
| 261 | 261 | { |
| 262 | 262 | if (bbc_b_plus_sideways_ram_banks[m_rombank]) |
| 263 | 263 | { |
| 264 | | memregion("user1")->base()[offset+(m_rombank<<14)]=data; |
| 264 | m_region_user1->base()[offset+(m_rombank<<14)]=data; |
| 265 | 265 | } |
| 266 | 266 | } |
| 267 | 267 | } |
| r20849 | r20850 | |
| 270 | 270 | { |
| 271 | 271 | if (bbc_b_plus_sideways_ram_banks[m_rombank]) |
| 272 | 272 | { |
| 273 | | memregion("user1")->base()[offset+(m_rombank<<14)+0x3000]=data; |
| 273 | m_region_user1->base()[offset+(m_rombank<<14)+0x3000]=data; |
| 274 | 274 | } |
| 275 | 275 | } |
| 276 | 276 | |
| r20849 | r20850 | |
| 360 | 360 | |
| 361 | 361 | if (m_ACCCON_Y) |
| 362 | 362 | { |
| 363 | | membank("bank7")->set_base(machine().root_device().memregion("maincpu")->base() + 0x9000); |
| 363 | membank("bank7")->set_base(m_region_maincpu->base() + 0x9000); |
| 364 | 364 | } |
| 365 | 365 | else |
| 366 | 366 | { |
| 367 | | membank("bank7")->set_base(machine().root_device().memregion("user1")->base() + 0x40000); |
| 367 | membank("bank7")->set_base(m_region_user1->base() + 0x40000); |
| 368 | 368 | } |
| 369 | 369 | |
| 370 | 370 | bbcbp_setvideoshadow(machine(), m_ACCCON_D); |
| r20849 | r20850 | |
| 372 | 372 | |
| 373 | 373 | if (m_ACCCON_X) |
| 374 | 374 | { |
| 375 | | membank("bank2")->set_base(machine().root_device().memregion( "maincpu" )->base() + 0xb000 ); |
| 375 | membank("bank2")->set_base(m_region_maincpu->base() + 0xb000 ); |
| 376 | 376 | } |
| 377 | 377 | else |
| 378 | 378 | { |
| 379 | | membank("bank2")->set_base(machine().root_device().memregion( "maincpu" )->base() + 0x3000 ); |
| 379 | membank("bank2")->set_base(m_region_maincpu->base() + 0x3000 ); |
| 380 | 380 | } |
| 381 | 381 | |
| 382 | 382 | /* ACCCON_TST controls paging of rom reads in the 0xFC00-0xFEFF reigon */ |
| r20849 | r20850 | |
| 384 | 384 | /* if 1 the the ROM is paged in for reads but writes still go to I/O */ |
| 385 | 385 | if (m_ACCCON_TST) |
| 386 | 386 | { |
| 387 | | membank("bank8")->set_base(machine().root_device().memregion("user1")->base()+0x43c00); |
| 387 | membank("bank8")->set_base(m_region_user1->base()+0x43c00); |
| 388 | 388 | space.install_read_bank(0xFC00,0xFEFF,"bank8"); |
| 389 | 389 | } |
| 390 | 390 | else |
| r20849 | r20850 | |
| 410 | 410 | |
| 411 | 411 | if (m_pagedRAM) |
| 412 | 412 | { |
| 413 | | membank("bank4")->set_base(machine().root_device().memregion("maincpu")->base() + 0x8000); |
| 413 | membank("bank4")->set_base(m_region_maincpu->base() + 0x8000); |
| 414 | 414 | membank("bank5")->set_entry(m_rombank); |
| 415 | 415 | } |
| 416 | 416 | else |
| 417 | 417 | { |
| 418 | | membank("bank4")->set_base(machine().root_device().memregion("user1")->base() + ((m_rombank) << 14)); |
| 418 | membank("bank4")->set_base(m_region_user1->base() + ((m_rombank) << 14)); |
| 419 | 419 | membank("bank5")->set_entry(m_rombank); |
| 420 | 420 | } |
| 421 | 421 | } |
| r20849 | r20850 | |
| 424 | 424 | |
| 425 | 425 | WRITE8_MEMBER(bbc_state::bbc_memorybm1_w) |
| 426 | 426 | { |
| 427 | | memregion("maincpu")->base()[offset] = data; |
| 427 | m_region_maincpu->base()[offset] = data; |
| 428 | 428 | } |
| 429 | 429 | |
| 430 | 430 | |
| r20849 | r20850 | |
| 432 | 432 | { |
| 433 | 433 | if (m_ACCCON_X) |
| 434 | 434 | { |
| 435 | | membank( "bank2" )->set_base( memregion( "maincpu" )->base() + 0xb000 ); |
| 435 | membank( "bank2" )->set_base( m_region_maincpu->base() + 0xb000 ); |
| 436 | 436 | } |
| 437 | 437 | else |
| 438 | 438 | { |
| 439 | 439 | if (m_ACCCON_E && bbcm_vdudriverset(machine())) |
| 440 | 440 | { |
| 441 | | membank( "bank2" )->set_base( machine().root_device().memregion( "maincpu" )->base() + 0xb000 ); |
| 441 | membank( "bank2" )->set_base( m_region_maincpu->base() + 0xb000 ); |
| 442 | 442 | } |
| 443 | 443 | else |
| 444 | 444 | { |
| 445 | | membank( "bank2" )->set_base( machine().root_device().memregion( "maincpu" )->base() + 0x3000 ); |
| 445 | membank( "bank2" )->set_base( m_region_maincpu->base() + 0x3000 ); |
| 446 | 446 | } |
| 447 | 447 | } |
| 448 | 448 | |
| r20849 | r20850 | |
| 453 | 453 | |
| 454 | 454 | WRITE8_MEMBER(bbc_state::bbc_memorybm2_w) |
| 455 | 455 | { |
| 456 | | UINT8 *ram = memregion("maincpu")->base(); |
| 456 | UINT8 *ram = m_region_maincpu->base(); |
| 457 | 457 | if (m_ACCCON_X) |
| 458 | 458 | { |
| 459 | 459 | ram[offset + 0xb000] = data; |
| r20849 | r20850 | |
| 481 | 481 | { |
| 482 | 482 | if (m_pagedRAM) |
| 483 | 483 | { |
| 484 | | memregion("maincpu")->base()[offset+0x8000]=data; |
| 484 | m_region_maincpu->base()[offset+0x8000]=data; |
| 485 | 485 | } |
| 486 | 486 | else |
| 487 | 487 | { |
| 488 | 488 | if (bbc_master_sideways_ram_banks[m_rombank]) |
| 489 | 489 | { |
| 490 | | memregion("user1")->base()[offset+(m_rombank<<14)]=data; |
| 490 | m_region_user1->base()[offset+(m_rombank<<14)]=data; |
| 491 | 491 | } |
| 492 | 492 | } |
| 493 | 493 | } |
| r20849 | r20850 | |
| 497 | 497 | { |
| 498 | 498 | if (bbc_master_sideways_ram_banks[m_rombank]) |
| 499 | 499 | { |
| 500 | | memregion("user1")->base()[offset+(m_rombank<<14)+0x1000]=data; |
| 500 | m_region_user1->base()[offset+(m_rombank<<14)+0x1000]=data; |
| 501 | 501 | } |
| 502 | 502 | } |
| 503 | 503 | |
| r20849 | r20850 | |
| 506 | 506 | { |
| 507 | 507 | if (m_ACCCON_Y) |
| 508 | 508 | { |
| 509 | | memregion("maincpu")->base()[offset+0x9000]=data; |
| 509 | m_region_maincpu->base()[offset+0x9000]=data; |
| 510 | 510 | } |
| 511 | 511 | } |
| 512 | 512 | |
| r20849 | r20850 | |
| 541 | 541 | /* Now handled in bbcm_ACCCON_write PHS - 2008-10-11 */ |
| 542 | 542 | // if ( m_ACCCON_TST ) |
| 543 | 543 | // { |
| 544 | | // return memregion("user1")->base()[offset+0x43c00]; |
| 544 | // return m_region_user1->base()[offset+0x43c00]; |
| 545 | 545 | // }; |
| 546 | 546 | |
| 547 | 547 | if (offset<=0x0ff) /* FRED */ |
| r20849 | r20850 | |
| 1915 | 1915 | ***************************************/ |
| 1916 | 1916 | DEVICE_IMAGE_LOAD_MEMBER( bbc_state, bbcb_cart ) |
| 1917 | 1917 | { |
| 1918 | | UINT8 *mem = machine().root_device().memregion("user1")->base(); |
| 1918 | UINT8 *mem = m_region_user1->base(); |
| 1919 | 1919 | int size, read_; |
| 1920 | 1920 | int addr = 0; |
| 1921 | 1921 | int index = 0; |
| r20849 | r20850 | |
| 1991 | 1991 | |
| 1992 | 1992 | MACHINE_RESET_MEMBER(bbc_state,bbca) |
| 1993 | 1993 | { |
| 1994 | | UINT8 *ram = machine().root_device().memregion("maincpu")->base(); |
| 1994 | UINT8 *ram = m_region_maincpu->base(); |
| 1995 | 1995 | m_RAMSize = 1; |
| 1996 | 1996 | membank("bank1")->set_base(ram); |
| 1997 | 1997 | membank("bank3")->set_base(ram); |
| 1998 | 1998 | |
| 1999 | | membank("bank4")->set_base(machine().root_device().memregion("user1")->base()); /* bank 4 is the paged ROMs from 8000 to bfff */ |
| 2000 | | membank("bank7")->set_base(memregion("user1")->base()+0x10000); /* bank 7 points at the OS rom from c000 to ffff */ |
| 1999 | membank("bank4")->set_base(m_region_user1->base()); /* bank 4 is the paged ROMs from 8000 to bfff */ |
| 2000 | membank("bank7")->set_base(m_region_user1->base()+0x10000); /* bank 7 points at the OS rom from c000 to ffff */ |
| 2001 | 2001 | |
| 2002 | 2002 | bbcb_IC32_initialise(this); |
| 2003 | 2003 | } |
| r20849 | r20850 | |
| 2024 | 2024 | |
| 2025 | 2025 | MACHINE_RESET_MEMBER(bbc_state,bbcb) |
| 2026 | 2026 | { |
| 2027 | | UINT8 *ram = memregion("maincpu")->base(); |
| 2027 | UINT8 *ram = m_region_maincpu->base(); |
| 2028 | 2028 | m_DFSType= (machine().root_device().ioport("BBCCONFIG")->read() >> 0) & 0x07; |
| 2029 | 2029 | m_SWRAMtype = (machine().root_device().ioport("BBCCONFIG")->read() >> 3) & 0x03; |
| 2030 | 2030 | m_RAMSize= (machine().root_device().ioport("BBCCONFIG")->read() >> 5) & 0x01; |
| r20849 | r20850 | |
| 2043 | 2043 | m_memorySize=16; |
| 2044 | 2044 | } |
| 2045 | 2045 | |
| 2046 | | membank("bank4")->set_base(machine().root_device().memregion("user1")->base()); /* bank 4 is the paged ROMs from 8000 to bfff */ |
| 2047 | | membank("bank7")->set_base(machine().root_device().memregion("user1")->base() + 0x40000); /* bank 7 points at the OS rom from c000 to ffff */ |
| 2046 | membank("bank4")->set_base(m_region_user1->base()); /* bank 4 is the paged ROMs from 8000 to bfff */ |
| 2047 | membank("bank7")->set_base(m_region_user1->base() + 0x40000); /* bank 7 points at the OS rom from c000 to ffff */ |
| 2048 | 2048 | |
| 2049 | 2049 | bbcb_IC32_initialise(this); |
| 2050 | 2050 | |
| r20849 | r20850 | |
| 2064 | 2064 | { |
| 2065 | 2065 | m_mc6850_clock = 0; |
| 2066 | 2066 | |
| 2067 | | machine().device("maincpu")->memory().space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(bbc_state::bbcbp_direct_handler), this)); |
| 2067 | m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(bbc_state::bbcbp_direct_handler), this)); |
| 2068 | 2068 | |
| 2069 | 2069 | /* bank 6 is the paged ROMs from b000 to bfff */ |
| 2070 | | membank("bank6")->configure_entries(0, 16, memregion("user1")->base() + 0x3000, 1<<14); |
| 2070 | membank("bank6")->configure_entries(0, 16, m_region_user1->base() + 0x3000, 1<<14); |
| 2071 | 2071 | } |
| 2072 | 2072 | |
| 2073 | 2073 | MACHINE_RESET_MEMBER(bbc_state,bbcbp) |
| 2074 | 2074 | { |
| 2075 | | membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base()); |
| 2076 | | membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base()+0x03000); /* bank 2 screen/shadow ram from 3000 to 7fff */ |
| 2077 | | membank("bank4")->set_base(machine().root_device().memregion("user1")->base()); /* bank 4 is paged ROM or RAM from 8000 to afff */ |
| 2075 | membank("bank1")->set_base(m_region_maincpu->base()); |
| 2076 | membank("bank2")->set_base(m_region_maincpu->base()+0x03000); /* bank 2 screen/shadow ram from 3000 to 7fff */ |
| 2077 | membank("bank4")->set_base(m_region_user1->base()); /* bank 4 is paged ROM or RAM from 8000 to afff */ |
| 2078 | 2078 | membank("bank6")->set_entry(0); |
| 2079 | | membank("bank7")->set_base(memregion("user1")->base()+0x40000); /* bank 7 points at the OS rom from c000 to ffff */ |
| 2079 | membank("bank7")->set_base(m_region_user1->base()+0x40000); /* bank 7 points at the OS rom from c000 to ffff */ |
| 2080 | 2080 | |
| 2081 | 2081 | bbcb_IC32_initialise(this); |
| 2082 | 2082 | |
| r20849 | r20850 | |
| 2090 | 2090 | { |
| 2091 | 2091 | m_mc6850_clock = 0; |
| 2092 | 2092 | |
| 2093 | | machine().device("maincpu")->memory().space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(bbc_state::bbcm_direct_handler), this)); |
| 2093 | m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(bbc_state::bbcm_direct_handler), this)); |
| 2094 | 2094 | |
| 2095 | 2095 | /* bank 5 is the paged ROMs from 9000 to bfff */ |
| 2096 | | membank("bank5")->configure_entries(0, 16, machine().root_device().memregion("user1")->base()+0x01000, 1<<14); |
| 2096 | membank("bank5")->configure_entries(0, 16, m_region_user1->base()+0x01000, 1<<14); |
| 2097 | 2097 | |
| 2098 | 2098 | /* Set ROM/IO bank to point to rom */ |
| 2099 | | membank( "bank8" )->set_base( memregion("user1")->base()+0x43c00); |
| 2100 | | machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0xFC00, 0xFEFF, "bank8"); |
| 2099 | membank( "bank8" )->set_base( m_region_user1->base()+0x43c00); |
| 2100 | m_maincpu->space(AS_PROGRAM).install_read_bank(0xFC00, 0xFEFF, "bank8"); |
| 2101 | 2101 | } |
| 2102 | 2102 | |
| 2103 | 2103 | MACHINE_RESET_MEMBER(bbc_state,bbcm) |
| 2104 | 2104 | { |
| 2105 | | membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base()); /* bank 1 regular lower ram from 0000 to 2fff */ |
| 2106 | | membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base() + 0x3000); /* bank 2 screen/shadow ram from 3000 to 7fff */ |
| 2107 | | membank("bank4")->set_base(machine().root_device().memregion("user1")->base()); /* bank 4 is paged ROM or RAM from 8000 to 8fff */ |
| 2105 | membank("bank1")->set_base(m_region_maincpu->base()); /* bank 1 regular lower ram from 0000 to 2fff */ |
| 2106 | membank("bank2")->set_base(m_region_maincpu->base() + 0x3000); /* bank 2 screen/shadow ram from 3000 to 7fff */ |
| 2107 | membank("bank4")->set_base(m_region_user1->base()); /* bank 4 is paged ROM or RAM from 8000 to 8fff */ |
| 2108 | 2108 | membank("bank5")->set_entry(0); |
| 2109 | | membank("bank7")->set_base(memregion("user1")->base() + 0x40000); /* bank 6 OS rom of RAM from c000 to dfff */ |
| 2109 | membank("bank7")->set_base(m_region_user1->base() + 0x40000); /* bank 6 OS rom of RAM from c000 to dfff */ |
| 2110 | 2110 | |
| 2111 | 2111 | bbcb_IC32_initialise(this); |
| 2112 | 2112 | |